; -------------------------------------------------------------------------------- ; @Title: ATSAM4S On-Chip Peripherals ; @Props: Released ; @Author: EMK, TPP, ZUO, JRK ; @Changelog: 2012-07-04 ; 2015-05-29 ZUO ; @Manufacturer: ATMEL - Atmel Corporation ; @Doc: ; ReferenceManual_11100.pdf (Rev. 11100A, 2011-10-28) ; doc11100.pdf (Rev. 11100B, 2012-07-31) ; Atmel_11100_32-bit-Cortex-M4-Microcontroller_SAM4S_Datasheet.pdf (Rev. 11100E, 2013-07-24) ; Atmel_11100S_32-bit-Cortex-M4-Microcontroller_SAM4S_Summary-Datasheet.pdf (Rev. 11100DS, 2013-07-24) ; Atmel-11100-32-bit Cortex-M4-Microcontroller-SAM4S_Datasheet.pdf (Rev. 11100I, 2015-04-03) ; @Core: Cortex-M4 ; @Chip: ATSAM4S4C, ATSAM4S4B, ATSAM4S4A, ATSAM4S2C, ATSAM4S2B, ATSAM4S2A ; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: peratsam4s.per 17736 2024-04-08 09:26:07Z kwisniewski $ tree.close "Core Registers (Cortex-M4)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 12. group.long 0x08++0x03 line.long 0x00 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes" bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes" bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes" textline " " bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes" bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes" group.long 0x10++0x0B line.long 0x00 "SYST_CSR,SysTick Control and Status Register" rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted" bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core" bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick" textline " " bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled" line.long 0x04 "SYST_RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0" line.long 0x08 "SYST_CVR,SysTick Current Value Register" rgroup.long 0x1C++0x03 line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing" rgroup.long 0xD00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code" bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..." bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number" bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xD04++0x23 line.long 0x00 "ICSR,Interrupt Control State Register" bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active" bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending" bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed" textline " " bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending" bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed" bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active" textline " " bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending" hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field" bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active" textline " " hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception" line.long 0x04 "VTOR,Vector Table Offset Register" hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address" line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key" rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big" bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" textline " " bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested" bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear" bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset" line.long 0x0C "SCR,System Control Register" bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" line.long 0x10 "CCR,Configuration Control Register" bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled" bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled" bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled" textline " " bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment" bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled" bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled" bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed" bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level" line.long 0x14 "SHPR1,SSystem Handler Priority Register 1" hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7" hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)" hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)" textline " " hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)" line.long 0x18 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)" hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10" hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9" textline " " hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8" line.long 0x1C "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)" hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)" hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13" textline " " hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)" line.long 0x20 "SHCSR,System Handler Control and State Register" bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled" bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled" bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled" textline " " bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending" bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending" bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending" textline " " bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending" bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active" bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active" textline " " bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active" bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active" bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active" textline " " bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active" bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active" group.byte 0xD28++0x1 line.byte 0x00 "MMFSR,MemManage Status Register" bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred" textline " " bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred" bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred" bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred" line.byte 0x01 "BFSR,Bus Fault Status Register" bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred" textline " " bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred" bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred" bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred" textline " " bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred" group.word 0xD2A++0x1 line.word 0x00 "USAFAULT,Usage Fault Status Register" bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error" bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error" bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error" textline " " bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error" bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error" bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error" group.long 0xD2C++0x07 line.long 0x00 "HFSR,Hard Fault Status Register" bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred" bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred" bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred" line.long 0x04 "DFSR,Debug Fault Status Register" bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted" bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred" bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred" textline " " bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed" bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested" group.long 0xD34++0x0B line.long 0x00 "MMFAR,MemManage Fault Address Register" line.long 0x04 "BFAR,BusFault Address Register" line.long 0x08 "AFSR,Auxiliary Fault Status Register" group.long 0xD88++0x03 line.long 0x00 "CPACR,Coprocessor Access Control Register" bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access" textline " " bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access" textline " " bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access" textline " " bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access" wgroup.long 0xF00++0x03 line.long 0x00 "STIR,Software Trigger Interrupt Register" hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered" width 10. tree "Feature Registers" rgroup.long 0xD40++0x0B line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..." line.long 0x04 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..." line.long 0x08 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..." hgroup.long 0xD4C++0x03 hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long 0xD50++0x03 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..." bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..." textline " " bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored" bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..." hgroup.long 0xD54++0x03 hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" rgroup.long 0xD58++0x03 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..." rgroup.long 0xD60++0x13 line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0" bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..." bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..." bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..." textline " " bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..." line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1" bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..." bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..." bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..." textline " " bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..." line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..." bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..." bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..." bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..." bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..." textline " " bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..." line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..." bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..." bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..." textline " " bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..." bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..." textline " " bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..." line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..." bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..." textline " " bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..." bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..." bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..." tree.end width 6. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0C "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0C "CID3,Component ID3" tree.end width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported" group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8 group.long 0xD9C++0x03 "Region 8" saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 8 (not implemented)" saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9 group.long 0xD9C++0x03 "Region 9" saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 9 (not implemented)" saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA group.long 0xD9C++0x03 "Region 10" saveout 0xD98 %l 0xA line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xA line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 10 (not implemented)" saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB group.long 0xD9C++0x03 "Region 11" saveout 0xD98 %l 0xB line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xB line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 11 (not implemented)" saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC group.long 0xD9C++0x03 "Region 12" saveout 0xD98 %l 0xC line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xC line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 12 (not implemented)" saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD group.long 0xD9C++0x03 "Region 13" saveout 0xD98 %l 0xD line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xD line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 13 (not implemented)" saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE group.long 0xD9C++0x03 "Region 14" saveout 0xD98 %l 0xE line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xE line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 14 (not implemented)" saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF group.long 0xD9C++0x03 "Region 15" saveout 0xD98 %l 0xF line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xF line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 15 (not implemented)" saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" textline " " textline " " endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 6. rgroup.long 0x04++0x03 line.long 0x00 "ICTR,Interrupt Controller Type Register" bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..." tree "Interrupt Enable Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x100++0x03 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x100++0x7 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x100++0x0B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x100++0x0F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x100++0x13 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x100++0x17 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x100++0x1B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x100++0x1F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x100++0x1F hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" endif tree.end tree "Interrupt Pending Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x200++0x03 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x200++0x07 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x200++0x0B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x200++0x0F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x200++0x13 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x200++0x17 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x200++0x1B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x200++0x1F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x200++0x1F hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" endif tree.end tree "Interrupt Active Bit Registers" width 9. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) rgroup.long 0x300++0x03 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) rgroup.long 0x300++0x07 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) rgroup.long 0x300++0x0B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) rgroup.long 0x300++0x0F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) rgroup.long 0x300++0x13 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) rgroup.long 0x300++0x17 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) rgroup.long 0x300++0x1B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) rgroup.long 0x300++0x1F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" line.long 0x1c "ACTIVE8,Active Bit Register 8" bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x300++0x1F hide.long 0x00 "ACTIVE1,Active Bit Register 1" hide.long 0x04 "ACTIVE2,Active Bit Register 2" hide.long 0x08 "ACTIVE3,Active Bit Register 3" hide.long 0x0c "ACTIVE4,Active Bit Register 4" hide.long 0x10 "ACTIVE5,Active Bit Register 5" hide.long 0x14 "ACTIVE6,Active Bit Register 6" hide.long 0x18 "ACTIVE7,Active Bit Register 7" hide.long 0x1c "ACTIVE8,Active Bit Register 8" endif tree.end tree "Interrupt Priority Registers" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x400++0x1F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x400++0x3F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x400++0x5F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x400++0x7F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x400++0x9F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x400++0xBF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x400++0xDF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x400++0xEF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" line.long 0xE0 "IPR56,Interrupt Priority Register" hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority" hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority" hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority" hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority" line.long 0xE4 "IPR57,Interrupt Priority Register" hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority" hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority" hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority" hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority" line.long 0xE8 "IPR58,Interrupt Priority Register" hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority" hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority" hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority" hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority" line.long 0xEC "IPR59,Interrupt Priority Register" hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority" hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority" hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority" hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority" else hgroup.long 0x400++0xEF hide.long 0x0 "IPR0,Interrupt Priority Register" hide.long 0x4 "IPR1,Interrupt Priority Register" hide.long 0x8 "IPR2,Interrupt Priority Register" hide.long 0xC "IPR3,Interrupt Priority Register" hide.long 0x10 "IPR4,Interrupt Priority Register" hide.long 0x14 "IPR5,Interrupt Priority Register" hide.long 0x18 "IPR6,Interrupt Priority Register" hide.long 0x1C "IPR7,Interrupt Priority Register" hide.long 0x20 "IPR8,Interrupt Priority Register" hide.long 0x24 "IPR9,Interrupt Priority Register" hide.long 0x28 "IPR10,Interrupt Priority Register" hide.long 0x2C "IPR11,Interrupt Priority Register" hide.long 0x30 "IPR12,Interrupt Priority Register" hide.long 0x34 "IPR13,Interrupt Priority Register" hide.long 0x38 "IPR14,Interrupt Priority Register" hide.long 0x3C "IPR15,Interrupt Priority Register" hide.long 0x40 "IPR16,Interrupt Priority Register" hide.long 0x44 "IPR17,Interrupt Priority Register" hide.long 0x48 "IPR18,Interrupt Priority Register" hide.long 0x4C "IPR19,Interrupt Priority Register" hide.long 0x50 "IPR20,Interrupt Priority Register" hide.long 0x54 "IPR21,Interrupt Priority Register" hide.long 0x58 "IPR22,Interrupt Priority Register" hide.long 0x5C "IPR23,Interrupt Priority Register" hide.long 0x60 "IPR24,Interrupt Priority Register" hide.long 0x64 "IPR25,Interrupt Priority Register" hide.long 0x68 "IPR26,Interrupt Priority Register" hide.long 0x6C "IPR27,Interrupt Priority Register" hide.long 0x70 "IPR28,Interrupt Priority Register" hide.long 0x74 "IPR29,Interrupt Priority Register" hide.long 0x78 "IPR30,Interrupt Priority Register" hide.long 0x7C "IPR31,Interrupt Priority Register" hide.long 0x80 "IPR32,Interrupt Priority Register" hide.long 0x84 "IPR33,Interrupt Priority Register" hide.long 0x88 "IPR34,Interrupt Priority Register" hide.long 0x8C "IPR35,Interrupt Priority Register" hide.long 0x90 "IPR36,Interrupt Priority Register" hide.long 0x94 "IPR37,Interrupt Priority Register" hide.long 0x98 "IPR38,Interrupt Priority Register" hide.long 0x9C "IPR39,Interrupt Priority Register" hide.long 0xA0 "IPR40,Interrupt Priority Register" hide.long 0xA4 "IPR41,Interrupt Priority Register" hide.long 0xA8 "IPR42,Interrupt Priority Register" hide.long 0xAC "IPR43,Interrupt Priority Register" hide.long 0xB0 "IPR44,Interrupt Priority Register" hide.long 0xB4 "IPR45,Interrupt Priority Register" hide.long 0xB8 "IPR46,Interrupt Priority Register" hide.long 0xBC "IPR47,Interrupt Priority Register" hide.long 0xC0 "IPR48,Interrupt Priority Register" hide.long 0xC4 "IPR49,Interrupt Priority Register" hide.long 0xC8 "IPR50,Interrupt Priority Register" hide.long 0xCC "IPR51,Interrupt Priority Register" hide.long 0xD0 "IPR52,Interrupt Priority Register" hide.long 0xD4 "IPR53,Interrupt Priority Register" hide.long 0xD8 "IPR54,Interrupt Priority Register" hide.long 0xDC "IPR55,Interrupt Priority Register" hide.long 0xE0 "IPR56,Interrupt Priority Register" hide.long 0xE4 "IPR57,Interrupt Priority Register" hide.long 0xE8 "IPR58,Interrupt Priority Register" hide.long 0xEC "IPR59,Interrupt Priority Register" endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end sif CORENAME()=="CORTEXM4F" tree "Floating-point Unit (FPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 8. group.long 0xF34++0x0B line.long 0x00 "FPCCR,Floating-Point Context Control Register" bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled" bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled" bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able" textline " " bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able" bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able" bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able" textline " " bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread" bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged" bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active" line.long 0x04 "FPCAR,Floating-Point Context Address Register" hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame" line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register" bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative" bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation" bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode" textline " " bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero" rgroup.long 0xF40++0x07 line.long 0x00 "MVFR0,Media and FP Feature Register 0" bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..." bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..." bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..." textline " " bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..." bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..." bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..." bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..." line.long 0x04 "MVFR1,Media and FP Feature Register 1" bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..." bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..." textline " " bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..." bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..." width 0xB else newline textline "COREDEBUG component base address not specified" newline endif tree.end endif tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 7. group.long 0xD30++0x03 line.long 0x00 "DFSR,Debug Fault Status Register" eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated" eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered" eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated" newline eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated" eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated" newline hgroup.long 0xDF0++0x03 hide.long 0x00 "DHCSR,Debug Halting Control and Status Register" in newline wgroup.long 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write" hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register" group.long 0xDF8++0x03 line.long 0x00 "DCRDR,Debug Core Register Data Register" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000) group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" newline bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" newline bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" else group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" newline bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" newline bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" endif width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Flash Patch and Breakpoint Unit (FPB)" sif COMPonent.AVAILABLE("FPB") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1)) width 10. group.long 0x00++0x07 line.long 0x00 "FP_CTRL,Flash Patch Control Register" bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..." rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127" bitfld.long 0x00 1. " KEY ,Key Field" "Low,High" bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled" textline "" line.long 0x04 "FP_REMAP,Flash Patch Remap Register" bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region" hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00) group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00) group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00) group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00) group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00) group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00) group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00) group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00) group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif width 6. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end width 0xB else newline textline "FPB component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 15. group.long 0x00++0x1B line.long 0x00 "DWT_CTRL,Control Register" rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported" rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported" textline " " rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported" rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported" bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled" bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled" bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled" bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled" bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled" bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]" bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]" textline " " bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled" line.long 0x04 "DWT_CYCCNT,Cycle Count Register" line.long 0x08 "DWT_CPICNT,CPI Count Register" hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter" line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register" hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter" line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register" hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter" line.long 0x14 "DWT_LSUCNT,LSU Count Register" hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter" line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count Register" hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter" rgroup.long 0x1C++0x03 line.long 0x00 "DWT_PCSR,Program Counter Sample register" textline " " group.long 0x20++0x07 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" line.long 0x04 "DWT_MASK0,DWT Mask Registers 0" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" else group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x30)++0x07 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" line.long 0x04 "DWT_MASK1,DWT Mask Registers 1" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20) group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00) group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x40)++0x07 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" line.long 0x04 "DWT_MASK2,DWT Mask Registers 2" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20) group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x50)++0x07 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" line.long 0x04 "DWT_MASK3,DWT Mask Registers 3" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20) group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00) group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif width 6. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end width 0x0B else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end config 16. 8. tree "RSTC (Reset Controller)" base ad:0x400E1400 width 9. wgroup.long 0x00++0x03 line.long 0x00 "RSTC_CR,Control Register" hexmask.long.byte 0x00 24.--31. 1. " KEY ,Password" sif !cpuis("ATSAMA5D2?") bitfld.long 0x00 3. " EXTRST ,External Reset" "No effect,NRST asserted" endif sif (cpuis("ATSAMV7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2*")) textline " " bitfld.long 0x00 0. " PROCRST ,Processor Reset" "No effect,Processor reset" else textline " " bitfld.long 0x00 2. " PERRST ,Peripheral Reset" "No effect,Peripherals reset" bitfld.long 0x00 0. " PROCRST ,Processor Reset" "No effect,Processor reset" endif hgroup.long 0x04++0x03 hide.long 0x00 "RSTC_SR,Status Register" in group.long 0x08++0x03 line.long 0x00 "RSTC_MR,Mode Register" hexmask.long.byte 0x00 24.--31. 1. " KEY ,Password" sif (!cpuis("ATSAMA5D41")&&!cpuis("ATSAMA5D42")&&!cpuis("ATSAMA5D43")&&!cpuis("ATSAMA5D44")&&!cpuis("ATSAMA5D2?")) bitfld.long 0x00 8.--11. " ERSTL ,External Reset Length" "2 slow clock cycles (60 us),4 slow clock cycles (120 us),8 slow clock cycles (240 us),16 slow clock cycles (480 us),32 slow clock cycles (960 us),64 slow clock cycles (1.92 ms),128 slow clock cycles (3.84 ms),256 slow clock cycles (7.68 ms),512 slow clock cycles (15.36 ms),1024 slow clock cycles (30.72 ms),2048 slow clock cycles (61.44 ms),4096 slow clock cycles (122.88 ms),8192 slow clock cycles (245.76 ms),16384 slow clock cycles (491.52 ms),32768 slow clock cycles (0.98304 s),65536 slow clock cycles (1.96608 s)" endif sif (!cpuis("ATSAMA5D31")&&!cpuis("ATSAMA5D33")&&!cpuis("ATSAMA5D34")&&!cpuis("ATSAMA5D35")&&!cpuis("ATSAMA5D36")) textline " " bitfld.long 0x00 4. " URSTIEN ,User Reset Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " URSTEN ,User Reset Enable" "Disabled,Enabled" endif width 0x0B tree.end tree "RTT (Real-time Timer)" base ad:0x400E1430 width 4. group.long 0x00++0x07 line.long 0x00 "MR,Real-Time Timer Mode Register" sif (cpuis("ATSAM4E*")||cpuis("ATSAM4N*")||cpuis("ATSAM4S*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")) bitfld.long 0x00 24. " RTC1HZ ,Real-time clock 1Hz clock selection" "16-bit prescaler,RTC 1 Hz clock" bitfld.long 0x00 20. " RTTDIS ,Real-time timer disable" "No,Yes" newline endif bitfld.long 0x00 18. " RTTRST ,Real-time timer restart" "No restart,Restart" bitfld.long 0x00 17. " RTTINCIEN ,Real-time timer increment interrupt enable" "Disabled,Enabled" bitfld.long 0x00 16. " ALMIEN ,Alarm interrupt enable" "Disabled,Enabled" hexmask.long.word 0x00 0.--15. 1. " RTPRES ,Real-time timer prescaler value" line.long 0x04 "AR,Real-Time Timer Alarm Register" rgroup.long 0x08++0x03 line.long 0x00 "VR,Real-Time Timer Value Register" newline hgroup.long 0x0C++0x03 hide.long 0x00 "SR,Real-Time Timer Status Register" in width 0x0B tree.end tree "RTC (Real-time Clock)" base ad:0x400E1460 width 8. group.long 0x00++0x03 line.long 0x00 "CR,Control Register" bitfld.long 0x00 16.--17. " CALEVSEL ,Calendar Event Selection" "Week change,Month change,Year change,?..." bitfld.long 0x00 8.--9. " TIMEVSEL ,Time Event Selection" "Minute change,Hour change,Every midnight,Every noon" bitfld.long 0x00 1. " UPDCAL ,Update Request Calendar Register" "No effect,Stopped" textline " " bitfld.long 0x00 0. " UPDTIM ,Update Request Time Register" "No effect,Stopped" group.long 0x04++0x03 line.long 0x00 "MR,Mode Register" sif (cpuis("ATSAM4S*")||cpuis("ATSAMV7*")||cpuis("ATSAME70*")) bitfld.long 0x00 28.--29. " TPERIOD ,Period of the Output Pulse" "1 s,500 ms,250 ms,125 ms" bitfld.long 0x00 24.--26. " THIGH ,High Duration of the Output Pulse" "31.2 ms,15.6 ms,3.91 ms,976 us,488 us,122 us,30.5 us,15.2 us" textline " " bitfld.long 0x00 20.--22. " OUT1 ,RTCOUT1 Output Source Selection" "NO_WAVE,1 Hz wave,32 Hz wave,64 Hz wave,512 Hz wave,ALARM_TOGGLE,ALARM_FLAG,PROG_PULSE" bitfld.long 0x00 16.--18. " OUT0 ,RTCOUT0 Output Source Selection" "NO_WAVE,1 Hz wave,32 Hz wave,64 Hz wave,512 Hz wave,ALARM_TOGGLE,ALARM_FLAG,PROG_PULSE" textline " " endif bitfld.long 0x00 15. " HIGHPPM ,HIGH PPM Correction" "Lower range,Higher range" hexmask.long.byte 0x00 8.--14. 1. " CORRECTION ,Slow Clock Correction" bitfld.long 0x00 4. " NEGPPM ,NEGative PPM Correction" "Positive,Negative" textline " " bitfld.long 0x00 1. " PERSIAN ,PERSIAN Calendar" "Gregorian,Persian" bitfld.long 0x00 0. " HRMOD ,12/24 Hour Mode" "24,12" if (((per.l(ad:0x400E1460+0x04)&0x1)==0x1)&&(per.l(ad:0x400E1460+0x08)&0x300000)==0x0) group.long 0x08++0x3 line.long 0x00 "TIMR,Time Register" bitfld.long 0x00 22. " AMPM ,Ante Meridiem Post Meridiem Indicator" "AM,PM" bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,-,-" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-" bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-" bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,?..." elif (((per.l(ad:0x400E1460+0x04)&0x1)==0x1)&&(per.l(ad:0x400E1460+0x08)&0x300000)==0x100000) group.long 0x08++0x3 line.long 0x00 "TIMR,Time Register" bitfld.long 0x00 22. " AMPM ,Ante Meridiem Post Meridiem Indicator" "AM,PM" bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,-,-" bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-" bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-" bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,?..." elif (((per.l(ad:0x400E1460+0x04)&0x1)==0x1)&&(per.l(ad:0x400E1460+0x08)&0x300000)==(0x200000||0x300000)) group.long 0x08++0x3 line.long 0x00 "TIMR,Time Register" bitfld.long 0x00 22. " AMPM ,Ante Meridiem Post Meridiem Indicator" "AM,PM" bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,-,-" bitfld.long 0x00 16.--19. "," "-,-,-,-,-,-,-,-,-,- ,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-" bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-" bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,?..." elif (((per.l(ad:0x400E1460+0x04)&0x1)==0x0)&&(per.l(ad:0x400E1460+0x08)&0x300000)==0x200000) group.long 0x08++0x3 line.long 0x00 "TIMR,Time Register" bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,2,-" bitfld.long 0x00 16.--19. "," "0,1,2,3,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-" bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-" bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,?..." elif (((per.l(ad:0x400E1460+0x04)&0x1)==0x0)&&(per.l(ad:0x400E1460+0x08)&0x300000)==(0x0||0x100000)) group.long 0x08++0x3 line.long 0x00 "TIMR,Time Register" bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,2,-" bitfld.long 0x00 16.--19. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-" bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-" bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,?..." else group.long 0x08++0x3 line.long 0x00 "TIMR,Time Register" bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,2,-" bitfld.long 0x00 16.--19. "," "-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-" bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-" bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,?..." endif if ((per.l(ad:0x400E1460+0x04)&0x02)==0x00) if ((per.l(ad:0x400E1460+0x0C)&0x30)==0x10) if ((per.l(ad:0x400E1460+0x0C)&0x1F0000)==0x20000) group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,-" bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..." bitfld.long 0x00 0.--3. "," "-,-,-,-,-,-,-,-,-,9,?..." elif ((per.l(ad:0x400E1460+0x0C)&0x30000000)==0x30000000) if ((per.l(ad:0x400E1460+0x0C)&0x1F0000)==(0x010000||0x030000||0x050000||0x070000||0x080000)) group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,-,-,-,-,-,-,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..." bitfld.long 0x00 0.--3. "," "-,-,-,-,-,-,-,-,-,9,?..." elif ((per.l(ad:0x400E1460+0x0C)&0x1F0000)==(0x040000||0x060000||0x090000)) group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,-,-,-,-,-,-,-,-,-,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..." bitfld.long 0x00 0.--3. "," "-,-,-,-,-,-,-,-,-,9,?..." elif ((per.l(ad:0x400E1460+0x0C)&0x1F0000)==(0x110000)) group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,-,-,-,-,-,-,-,-,-,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,-,-,-,-,-,-,-,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..." bitfld.long 0x00 0.--3. "," "-,-,-,-,-,-,-,-,-,9,?..." elif ((per.l(ad:0x400E1460+0x0C)&0x1F0000)==(0x100000||0x120000)) group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,-,-,-,-,-,-,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,-,-,-,-,-,-,-,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..." bitfld.long 0x00 0.--3. "," "-,-,-,-,-,-,-,-,-,9,?..." else group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,-,-,-,-,-,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..." bitfld.long 0x00 0.--3. "," "-,-,-,-,-,-,-,-,-,9,?..." endif elif ((per.l(ad:0x400E1460+0x0C)&0x100000)==0x100000) group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,,-,-,?..." bitfld.long 0x00 0.--3. "," "-,-,-,-,-,-,-,-,-,9,?..." else group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..." bitfld.long 0x00 0.--3. "," "-,-,-,-,-,-,-,-,-,9,?..." endif else if ((per.l(ad:0x400E1460+0x0C)&0x1F0000)==0x20000) group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,-" bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..." bitfld.long 0x00 0.--3. "," "0,-,-,-,-,-,-,-,-,-,?..." elif ((per.l(ad:0x400E1460+0x0C)&0x30000000)==0x30000000) if ((per.l(ad:0x400E1460+0x0C)&0x1F0000)==(0x10000||0x30000||0x50000||0x70000||0x70000)) group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..." bitfld.long 0x00 0.--3. "," "0,-,-,-,-,-,-,-,-,-,?..." elif ((per.l(ad:0x400E1460+0x0C)&0x1F0000)==(0x40000||0x60000||0x90000)) group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,-,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..." bitfld.long 0x00 0.--3. "," "0,-,-,-,-,-,-,-,-,-,?..." elif ((per.l(ad:0x400E1460+0x0C)&0x1F0000)==(0x110000)) group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,-,-,-,-,-,-,-,-,-,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,-,-,-,-,-,-,-,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..." bitfld.long 0x00 0.--3. "," "0,-,-,-,-,-,-,-,-,-,?..." elif ((per.l(ad:0x400E1460+0x0C)&0x1F0000)==(0x100000||0x120000)) group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,-,-,-,-,-,-,-,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..." bitfld.long 0x00 0.--3. "," "0,-,-,-,-,-,-,-,-,-,?..." else group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..." bitfld.long 0x00 0.--3. "," "0,-,-,-,-,-,-,-,-,-,?..." endif elif ((per.l(ad:0x400E1460+0x0C)&0x100000)==0x100000) group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..." bitfld.long 0x00 0.--3. "," "0,-,-,-,-,-,-,-,-,-,?..." else group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,2,-,-,?..." bitfld.long 0x00 0.--3. "," "0,-,-,-,-,-,-,-,-,-,?..." endif endif else if ((per.l(ad:0x400E1460+0x0C)&0x30000000)==0x30000000) if ((per.l(ad:0x400E1460+0x0C)&0x1F0000)==(0x010000||0x020000||0x030000||0x040000||0x050000||0x060000)) group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Saturday,Sunday,Monday,Tuesday,Wednesday,Thursday,Friday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,-,-,-,?..." bitfld.long 0x00 0.--3. "," "-,-,-,3,4,-,-,-,-,-,?..." elif ((per.l(ad:0x400E1460+0x0C)&0x1F0000)==(0x070000||0x080000||0x090000)) group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,-,-,-,-,-,-,-,-,-,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Saturday,Sunday,Monday,Tuesday,Wednesday,Thursday,Friday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,-,-,-,?..." bitfld.long 0x00 0.--3. "," "-,-,-,3,4,-,-,-,-,-,?..." elif ((per.l(ad:0x400E1460+0x0C)&0x1F0000)==(0x100000||0x110000||0x120000)) group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,-,-,-,-,-,-,-,-,-,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Saturday,Sunday,Monday,Tuesday,Wednesday,Thursday,Friday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,-,-,-,-,-,-,-,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,-,-,-,?..." bitfld.long 0x00 0.--3. "," "-,-,-,3,4,-,-,-,-,-,?..." else group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Saturday,Sunday,Monday,Tuesday,Wednesday,Thursday,Friday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,-,-,-,?..." bitfld.long 0x00 0.--3. "," "-,-,-,3,4,-,-,-,-,-,?..." endif elif ((per.l(ad:0x400E1460+0x0C)&0x100000)==0x100000) group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Saturday,Sunday,Monday,Tuesday,Wednesday,Thursday,Friday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,-,-,-,?..." bitfld.long 0x00 0.--3. "," "-,-,-,3,4,-,-,-,-,-,?..." else group.long 0x0C++0x3 line.long 0x00 "CALR,Calendar Register" bitfld.long 0x00 28.--29. " DATE ,Current Date" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 21.--23. " DAY ,CurrentDAY in Current Week" "-,Saturday,Sunday,Monday,Tuesday,Wednesday,Thursday,Friday" textline " " bitfld.long 0x00 20. " MONTH ,Current Month" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 12.--15. " YEAR ,CurrentYEAR" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 4.--6. " CENT ,Current Century" "-,1,-,-,-,?..." bitfld.long 0x00 0.--3. "," "-,-,-,3,4,-,-,-,-,-,?..." endif endif if (((per.l(ad:0x400E1460+0x04)&0x1)==0x1)&&(per.l(ad:0x400E1460+0x10)&0x300000)==0x0) group.long 0x10++0x03 line.long 0x00 "TIMALR,Time Alarm Register" bitfld.long 0x00 23. " HOUREN ,Hour Alarm Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " AMPM ,AM/PM Indicator" "AM,PM" bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,-,-" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 15. " MINEN ,Minute Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-" bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 7. " SECEN ,Second Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-" bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,?..." elif (((per.l(ad:0x400E1460+0x04)&0x1)==0x1)&&(per.l(ad:0x400E1460+0x10)&0x300000)==0x100000) group.long 0x10++0x03 line.long 0x00 "TIMALR,Time Alarm Register" bitfld.long 0x00 23. " HOUREN ,Hour Alarm Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " AMPM ,AM/PM Indicator" "AM,PM" bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,-,-" bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 15. " MINEN ,Minute Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-" bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 7. " SECEN ,Second Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-" bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,?..." elif (((per.l(ad:0x400E1460+0x04)&0x1)==0x1)&&(per.l(ad:0x400E1460+0x10)&0x300000)==(0x200000||0x300000)) group.long 0x10++0x03 line.long 0x00 "TIMALR,Time Alarm Register" bitfld.long 0x00 23. " HOUREN ,Hour Alarm Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " AMPM ,AM/PM Indicator" "AM,PM" bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,-,-" bitfld.long 0x00 16.--19. "," "-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 15. " MINEN ,Minute Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-" bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 7. " SECEN ,Second Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-" bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,?..." elif (((per.l(ad:0x400E1460+0x04)&0x1)==0x0)&&(per.l(ad:0x400E1460+0x10)&0x300000)==0x200000) group.long 0x10++0x03 line.long 0x00 "TIMALR,Time Alarm Register" bitfld.long 0x00 23. " HOUREN ,Hour Alarm Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,2,-" bitfld.long 0x00 16.--19. "," "0,1,2,3,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 15. " MINEN ,Minute Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-" bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 7. " SECEN ,Second Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-" bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,?..." elif (((per.l(ad:0x400E1460+0x04)&0x1)==0x0)&&(per.l(ad:0x400E1460+0x10)&0x300000)==(0x0||0x100000)) group.long 0x10++0x03 line.long 0x00 "TIMALR,Time Alarm Register" bitfld.long 0x00 23. " HOUREN ,Hour Alarm Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,2,-" bitfld.long 0x00 16.--19. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 15. " MINEN ,Minute Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-" bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 7. " SECEN ,Second Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-" bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,?..." else group.long 0x10++0x03 line.long 0x00 "TIMALR,Time Alarm Register" bitfld.long 0x00 23. " HOUREN ,Hour Alarm Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " HOUR ,Current Hour" "0,1,2,-" bitfld.long 0x00 16.--19. "," "-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 15. " MINEN ,Minute Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 12.--14. " MIN ,Current Minute" "0,1,2,3,4,5,-,-" bitfld.long 0x00 8.--11. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 7. " SECEN ,Second Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 4.--6. " SEC ,Current Second" "0,1,2,3,4,5,-,-" bitfld.long 0x00 0.--3. "," "0,1,2,3,4,5,6,7,8,9,?..." endif if ((per.l(ad:0x400E1460+0x04)&0x8)==0x00) if ((per.l(ad:0x400E1460+0x14)&0x1F0000)==0x20000) group.long 0x14++0x03 line.long 0x00 "CALALR,Calendar Alarm Register" bitfld.long 0x00 31. " DATEEN , DATE Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DATE ,Current DATE" "0,1,2,-" bitfld.long 0x00 24.--27. "," "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 23. " MTHEN , MONTH Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MONTH ,Current MONTH" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." elif ((per.l(ad:0x400E1460+0x14)&0x30000000)==0x30100000) if ((per.l(ad:0x400E1460+0x14)&0x1F0000)==(0x10000||0x30000||0x50000||0x70000||0x70000)) group.long 0x14++0x03 line.long 0x00 "CALALR,Calendar Alarm Register" bitfld.long 0x00 31. " DATEEN , DATE Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DATE ,Current DATE" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 23. " MTHEN , MONTH Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MONTH ,Current MONTH" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." elif ((per.l(ad:0x400E1460+0x14)&0x1F0000)==(0x40000||0x60000||0x90000)) group.long 0x14++0x03 line.long 0x00 "CALALR,Calendar Alarm Register" bitfld.long 0x00 31. " DATEEN , DATE Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DATE ,Current DATE" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,- ,-,?..." textline " " bitfld.long 0x00 23. " MTHEN , MONTH Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MONTH ,Current MONTH" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." elif ((per.l(ad:0x400E1460+0x14)&0x1F0000)==(0x110000)) group.long 0x14++0x03 line.long 0x00 "CALALR,Calendar Alarm Register" bitfld.long 0x00 31. " DATEEN , DATE Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DATE ,Current DATE" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,-,-,-,-,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 23. " MTHEN , MONTH Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MONTH ,Current MONTH" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,-,-,-,-,-,-,-,?..." elif ((per.l(ad:0x400E1460+0x14)&0x1F0000)==(0x100000||0x120000)) group.long 0x14++0x03 line.long 0x00 "CALALR,Calendar Alarm Register" bitfld.long 0x00 31. " DATEEN , DATE Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DATE ,Current DATE" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 23. " MTHEN , MONTH Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MONTH ,Current MONTH" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,-,-,-,-,-,-,-,?..." else group.long 0x14++0x03 line.long 0x00 "CALALR,Calendar Alarm Register" bitfld.long 0x00 31. " DATEEN , DATE Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DATE ,Current DATE" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 23. " MTHEN , MONTH Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MONTH ,Current MONTH" "0,1" bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,?..." endif elif ((per.l(ad:0x400E1460+0x14)&0x100000)==0x100000) group.long 0x14++0x03 line.long 0x00 "CALALR,Calendar Alarm Register" bitfld.long 0x00 31. " DATEEN , DATE Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DATE ,Current DATE" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 23. " MTHEN , MONTH Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MONTH ,Current MONTH" "0,1" bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,?..." else group.long 0x14++0x03 line.long 0x00 "CALALR,Calendar Alarm Register" bitfld.long 0x00 31. " DATEEN , DATE Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DATE ,Current DATE" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 23. " MTHEN , MONTH Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MONTH ,Current MONTH" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." endif else if ((per.l(ad:0x400E1460+0x14)&0x30000000)==0x30100000) if ((per.l(ad:0x400E1460+0x14)&0x1F0000)==(0x10000||0x20000||0x30000||0x40000||0x50000||0x60000)) group.long 0x14++0x03 line.long 0x00 "CALALR,Calendar Alarm Register" bitfld.long 0x00 31. " DATEEN , DATE Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DATE ,Current DATE" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 23. " MTHEN , MONTH Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MONTH ,Current MONTH" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." elif ((per.l(ad:0x400E1460+0x14)&0x1F0000)==(0x70000||0x80000||0x90000)) group.long 0x14++0x03 line.long 0x00 "CALALR,Calendar Alarm Register" bitfld.long 0x00 31. " DATEEN , DATE Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DATE ,Current DATE" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,-,-,-,-,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 23. " MTHEN , MONTH Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MONTH ,Current MONTH" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." elif ((per.l(ad:0x400E1460+0x14)&0x1F0000)==(0x100000||0x110000||0x120000)) group.long 0x14++0x03 line.long 0x00 "CALALR,Calendar Alarm Register" bitfld.long 0x00 31. " DATEEN , DATE Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DATE ,Current DATE" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,-,-,-,-,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 23. " MTHEN , MONTH Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MONTH ,Current MONTH" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,-,-,-,-,-,-,-,?..." else group.long 0x14++0x03 line.long 0x00 "CALALR,Calendar Alarm Register" bitfld.long 0x00 31. " DATEEN , DATE Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DATE ,Current DATE" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 23. " MTHEN , MONTH Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MONTH ,Current MONTH" "0,1" bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,?..." endif elif ((per.l(ad:0x400E1460+0x14)&0x100000)==0x100000) group.long 0x14++0x03 line.long 0x00 "CALALR,Calendar Alarm Register" bitfld.long 0x00 31. " DATEEN , DATE Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DATE ,Current DATE" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 23. " MTHEN , MONTH Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MONTH ,Current MONTH" "0,1" bitfld.long 0x00 16.--19. "," "0,1,2,-,-,-,-,-,-,-,?..." else group.long 0x14++0x03 line.long 0x00 "CALALR,Calendar Alarm Register" bitfld.long 0x00 31. " DATEEN , DATE Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DATE ,Current DATE" "0,1,2,3" bitfld.long 0x00 24.--27. "," "0,1,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 23. " MTHEN , MONTH Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 20. " MONTH ,Current MONTH" "0,1" bitfld.long 0x00 16.--19. "," "-,1,2,3,4,5,6,7,8,9,?..." endif endif rgroup.long 0x18++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 5. " TDERR ,Time and/or Date Free Running Error" "Not occurred,Occurred" bitfld.long 0x00 4. " CALEV ,Calendar Event" "Not occurred,Occurred" bitfld.long 0x00 3. " TIMEV ,Time Event" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " SEC ,Second Event" "Not occurred,Occurred" bitfld.long 0x00 1. " ALARM ,Alarm Flag" "Not occurred,Occurred" bitfld.long 0x00 0. " ACKUPD ,Acknowledge for Update" "No,Yes" wgroup.long 0x1C++0x03 line.long 0x00 "SCCR,Status Clear Command Register" bitfld.long 0x00 5. " TDERR ,Time and/or Date Free Running Error Clear" "No effect,Clear" bitfld.long 0x00 4. " CALCLR ,Calendar Event Clear" "No effect,Clear" bitfld.long 0x00 3. " TIMCLR ,Time Event Clear" "No effect,Clear" textline " " bitfld.long 0x00 2. " SECCLR ,Second Event Clear" "No effect,Clear" bitfld.long 0x00 1. " ALRCLR ,Alarm Flag Clear" "No effect,Clear" bitfld.long 0x00 0. " ACKCLR ,Acknowledge for Update Clear" "No effect,Clear" textline " " sif cpuis("ATSAME70*") wgroup.long 0x20++0x07 line.long 0x00 "IER,RTC Interrupt Enable Register" bitfld.long 0x00 5. " TDERREN ,Time and/or Date Error Interrupt Enable" "No effect,Enable" line.long 0x04 "IDR,RTC Interrupt Disable Register" bitfld.long 0x04 5. " TDERRDIS ,Time and/or Date Error Interrupt Disable" "No effect,Disable" endif group.long 0x28++0x03 line.long 0x00 "IMR,Interrupt Mask Register" sif (cpuis("ATSAMA5D4*")||cpuis("ATSAM4S*")||cpuis("ATSAMV7")||cpuis("ATSAME70*")||cpuis("ATSAMG55")) setclrfld.long 0x00 5. -0x08 5. -0x04 5. " TDERR_set/clr ,Time and/or Date Event Interrupt Mask" "Masked,Not masked" textline " " endif setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CAL_set/clr ,Calendar Event Interrupt Mask" "Masked,Not masked" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " TIM_set/clr ,Time Event Interrupt Mask" "Masked,Not masked" textline " " setclrfld.long 0x00 2. -0x08 2. -0x04 2. " SEC_set/clr ,Second Event Interrupt Mask" "Masked,Not masked" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " ALR_set/clr ,Alarm Interrupt Mask" "Masked,Not masked" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " ACK_set/clr ,Acknowledge for Update Interrupt Mask" "Masked,Not masked" rgroup.long 0x2C++0x03 line.long 0x00 "VER,Valid Entry Register" bitfld.long 0x00 3. " NVCALALR ,Non-Valid Calendar Alarm" "Not detected,Detected" bitfld.long 0x00 2. " NVTIMALR ,Non-valid Time Alarm" "Not detected,Detected" textline " " bitfld.long 0x00 1. " NVCAL ,Non-valid Calendar" "Not detected,Detected" bitfld.long 0x00 0. " NVTIM ,Non-valid Time" "Not detected,Detected" sif cpuis("ATSAMA5D4*") textline " " rgroup.long 0xB0++0x03 line.long 0x00 "TSTR0,TimeStamp Time Register 0" bitfld.long 0x00 31. " BACKUP ,System Mode of the Tamper" "Not backup,Backup" bitfld.long 0x00 24.--27. " TEVCNT ,Tamper Events Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 22. " AMPM ,AM/PM Indicator of the Tamper" "AM,PM" bitfld.long 0x00 16.--21. " HOUR ,Hours of the Tamper" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." hexmask.long.byte 0x00 8.--14. 1. " MIN ,Minutes of the Tamper" hexmask.long.byte 0x00 0.--6. 1. " SEC ,Seconds of the Tamper" rgroup.long 0xBC++0x03 line.long 0x00 "TSTR1,TimeStamp Time Register 1" bitfld.long 0x00 31. " BACKUP ,System Mode of the Tamper" "Not backup,Backup" bitfld.long 0x00 22. " AMPM ,AM/PM Indicator of the Tamper" "AM,PM" bitfld.long 0x00 16.--21. " HOUR ,Hours of the Tamper" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." hexmask.long.byte 0x00 8.--14. 1. " MIN ,Minutes of the Tamper" hexmask.long.byte 0x00 0.--6. 1. " SEC ,Seconds of the Tamper" rgroup.long 0xB4++0x03 line.long 0x00 "TSDR0,TimeStamp Date Register 0" bitfld.long 0x00 24.--29. " DATE ,Date of the Tamper" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,?..." bitfld.long 0x00 21.--23. " DAY ,Day of the Tamper" ",1,2,3,4,5,6,7" bitfld.long 0x00 16.--20. " MONTH ,Month of the Tamper" ",1,2,3,4,5,6,7,8,9,10,11,12,?..." hexmask.long.byte 0x00 8.--15. 1. " YEAR ,Year of the Tamper" hexmask.long.byte 0x00 0.--6. 1. " CENT ,Century of the Tamper" rgroup.long 0xC0++0x03 line.long 0x00 "TSDR1,TimeStamp Date Register 1" bitfld.long 0x00 24.--29. " DATE ,Date of the Tamper" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,?..." bitfld.long 0x00 21.--23. " DAY ,Day of the Tamper" ",1,2,3,4,5,6,7" bitfld.long 0x00 16.--20. " MONTH ,Month of the Tamper" ",1,2,3,4,5,6,7,8,9,10,11,12,?..." hexmask.long.byte 0x00 8.--15. 1. " YEAR ,Year of the Tamper" hexmask.long.byte 0x00 0.--6. 1. " CENT ,Century of the Tamper" hgroup.long 0xB8++0x03 hide.long 0x00 "TSSR0,TimeStamp Source Register 0" in hgroup.long 0xC4++0x03 hide.long 0x00 "TSSR1,TimeStamp Source Register 1" in endif width 0x0B tree.end tree "WDT (Watchdog Timer)" base ad:0x400E1450 width 4. wgroup.long 0x00++0x03 line.long 0x00 "CR,Control Register" hexmask.long.byte 0x00 24.--31. 1. " KEY ,Password" bitfld.long 0x00 0. " WDRSTT ,Watchdog restart" "No effect,Restart" sif cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D4*")||cpuis("ATSAMA5D2*") group.long 0x04++0x03 line.long 0x00 "MR,Mode Register" bitfld.long 0x00 29. " WDIDLEHLT ,Watchdog idle halt" "Not halted,Halted" bitfld.long 0x00 28. " WDDBGHLT ,Watchdog debug halt" "Not halted,Halted" hexmask.long.word 0x00 16.--27. 1. " WDD ,Watchdog delta value" bitfld.long 0x00 15. " WDDIS ,Watchdog disable" "No,Yes" newline bitfld.long 0x00 13. " WDRSTEN ,Watchdog reset enable" "Disabled,Enabled" bitfld.long 0x00 12. " WDFIEN ,Watchdog fault interrupt enable" "Disabled,Enabled" hexmask.long.word 0x00 0.--11. 1. " WDV ,Watchdog counter value" else if ((per.l(ad:0x400E1450+0x04)&0x2000)==0x2000) group.long 0x04++0x03 line.long 0x00 "MR,Mode Register" bitfld.long 0x00 29. " WDIDLEHLT ,Watchdog idle halt" "Running,Stopped" bitfld.long 0x00 28. " WDDBGHLT ,Watchdog debug halt" "Running,Stopped" hexmask.long.word 0x00 16.--27. 1. " WDD ,Watchdog delta value" bitfld.long 0x00 15. " WDDIS ,Watchdog disable" "No,Yes" bitfld.long 0x00 14. " WDRPROC ,Watchdog reset processor" "All resets,Processor reset" newline bitfld.long 0x00 13. " WDRSTEN ,Watchdog reset enable" "Disabled,Enabled" bitfld.long 0x00 12. " WDFIEN ,Watchdog fault interrupt enable" "No effect,Interrupt" hexmask.long.word 0x00 0.--11. 1. " WDV ,Watchdog counter value" else group.long 0x04++0x03 line.long 0x00 "MR,Mode Register" bitfld.long 0x00 29. " WDIDLEHLT ,Watchdog idle halt" "Running,Stopped" bitfld.long 0x00 28. " WDDBGHLT ,Watchdog debug halt" "Running,Stopped" hexmask.long.word 0x00 16.--27. 1. " WDD ,Watchdog delta value" bitfld.long 0x00 15. " WDDIS ,Watchdog disable" "No,Yes" newline bitfld.long 0x00 13. " WDRSTEN ,Watchdog reset enable" "Disabled,Enabled" bitfld.long 0x00 12. " WDFIEN ,Watchdog fault interrupt enable" "No effect,Interrupt" hexmask.long.word 0x00 0.--11. 1. " WDV ,Watchdog counter value" endif endif newline hgroup.long 0x08++0x03 hide.long 0x00 "SR,Status Register" in width 0x0B tree.end tree "SUPC (Supply Controller)" base ad:0x400E1410 width 12. sif (cpuis("ATSAMV7*")||cpuis("ATSAME70*")||cpuis("ATSAM4S*")) if ((per.l(ad:0x400E1410+0xE4)&0x01)==0x00) wgroup.long 0x00++0x03 line.long 0x00 "SUPC_CR,Supply Controller Control Register" hexmask.long.byte 0x00 24.--31. 1. " KEY ,Password key" bitfld.long 0x00 3. " XTALSEL ,Crystal oscillator select" "No effect,Select" bitfld.long 0x00 2. " VROFF ,Voltage regulator off" "No effect,Off" else hgroup.long 0x00++0x03 hide.long 0x00 "SUPC_CR,Supply Controller Control Register" endif else wgroup.long 0x00++0x03 line.long 0x00 "SUPC_CR,Supply Controller Control Register" hexmask.long.byte 0x00 24.--31. 1. " KEY ,Password key" bitfld.long 0x00 3. " XTALSEL ,Crystal oscillator select" "No effect,Select" bitfld.long 0x00 2. " VROFF ,Voltage regulator off" "No effect,Off" endif if ((per.l(ad:0x400E1410+0xE4)&0x01)==0x00) group.long 0x04++0x0F line.long 0x00 "SUPC_SMMR,Supply Controller Supply Monitor Mode Register" bitfld.long 0x00 13. " SMIEN ,Supply monitor interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " SMRSTEN ,Supply monitor reset enable" "Disabled,Enabled" bitfld.long 0x00 8.--10. " SMSMPL ,Supply monitor sampling period" "Disabled,Continuous,32 SLCK,256 SLCK,2048 SLCK,?..." bitfld.long 0x00 0.--3. " SMTH ,Supply monitor threshold" "1.6 V,1.72 V,1.84 V,1.96 V,2.08 V,2.2 V,2.32 V,2.44 V,2.56 V,2.68 V,2.8 V,2.92 V,3.04 V,3.16 V,3.28 V,3.4 V" line.long 0x04 "SUPC_MR,Supply Controller Mode Register" hexmask.long.byte 0x04 24.--31. 1. " KEY ,Password key" bitfld.long 0x04 20. " OSCBYPASS ,Oscillator bypass" "No effect,Bypass" newline sif (cpuis("ATSAMV7*")||cpuis("ATSAME70*")) bitfld.long 0x04 17. " BKUPRETON ,SRAM on in backup mode" "Off,On" elif (!cpuis("ATSAM4S*")) bitfld.long 0x04 15. " BUPPOREN ,Backup area power-on reset enable" "Disabled,Enabled" endif newline bitfld.long 0x04 14. " ONREG ,Voltage regulator enable" "Disabled,Enabled" bitfld.long 0x04 13. " BODDIS ,Brownout detector disable" "No,Yes" bitfld.long 0x04 12. " BODRSTEN ,Brownout detector reset enable" "Disabled,Enabled" line.long 0x08 "SUPC_WUMR,Supply Controller Wake Up Mode Register" bitfld.long 0x08 16.--18. " LPDBC ,Low power debouncer period" "Disabled,2_RTCOUT0,3_RTCOUT0,4_RTCOUT0,5_RTCOUT0,6_RTCOUT0,7_RTCOUT0,8_RTCOUT0" bitfld.long 0x08 12.--14. " WKUPDBC ,Wake up inputs debouncer" "IMMEDIATE,3 SLCK,32 SLCK,512 SLCK,4096 SLCK,32768 SLCK,?..." bitfld.long 0x08 7. " LPDBCCLR ,Low power debouncer clear" "Disabled,Enabled" bitfld.long 0x08 6. " LPDBCEN1 ,Low power debouncer enable WKUP1" "Disabled,Enabled" newline bitfld.long 0x08 5. " LPDBCEN0 ,Low power debouncer enable WKUP0" "Disabled,Enabled" bitfld.long 0x08 3. " RTCEN ,Real time clock wake up enable" "Disabled,Enabled" bitfld.long 0x08 2. " RTTEN ,Real time timer wake up enable" "Disabled,Enabled" bitfld.long 0x08 1. " SMEN ,Supply monitor wake up enable" "Disabled,Enabled" line.long 0x0C "SUPC_WUIR,System Controller Wake Up Inputs Register" sif (cpuis("ATSAM4S*")) bitfld.long 0x0C 31. " WKUPT15 ,Wake up 15 input transition" "High to low,Low to high" bitfld.long 0x0C 30. " WKUPT14 ,Wake up 14 input transition" "High to low,Low to high" newline endif bitfld.long 0x0C 29. " WKUPT13 ,Wake up input 13 transition" "High to low,Low to high" bitfld.long 0x0C 28. " WKUPT12 ,Wake up input 12 transition" "High to low,Low to high" bitfld.long 0x0C 27. " WKUPT11 ,Wake up input 11 transition" "High to low,Low to high" bitfld.long 0x0C 26. " WKUPT10 ,Wake up input 10 transition" "High to low,Low to high" newline bitfld.long 0x0C 25. " WKUPT9 ,Wake up input 9 transition" "High to low,Low to high" bitfld.long 0x0C 24. " WKUPT8 ,Wake up input 8 transition" "High to low,Low to high" bitfld.long 0x0C 23. " WKUPT7 ,Wake up input 7 transition" "High to low,Low to high" bitfld.long 0x0C 22. " WKUPT6 ,Wake up input 6 transition" "High to low,Low to high" newline bitfld.long 0x0C 21. " WKUPT5 ,Wake up input 5 transition" "High to low,Low to high" bitfld.long 0x0C 20. " WKUPT4 ,Wake up input 4 transition" "High to low,Low to high" bitfld.long 0x0C 19. " WKUPT3 ,Wake up input 3 transition" "High to low,Low to high" newline bitfld.long 0x0C 18. " WKUPT2 ,Wake up input 2 transition" "High to low,Low to high" bitfld.long 0x0C 17. " WKUPT1 ,Wake up input 1 transition" "High to low,Low to high" bitfld.long 0x0C 16. " WKUPT0 ,Wake up input 0 transition" "High to low,Low to high" newline sif (cpuis("ATSAM4S*")) bitfld.long 0x0C 15. " WKUPEN15 ,Wake up input 15 enable" "Disabled,Enabled" bitfld.long 0x0C 14. " WKUPEN14 ,Wake up input 14 enable" "Disabled,Enabled" newline endif bitfld.long 0x0C 13. " WKUPEN13 ,Wake up input 13 enable" "Disabled,Enabled" bitfld.long 0x0C 12. " WKUPEN12 ,Wake up input 12 enable" "Disabled,Enabled" bitfld.long 0x0C 11. " WKUPEN11 ,Wake up input 11 enable" "Disabled,Enabled" bitfld.long 0x0C 10. " WKUPEN10 ,Wake up input 10 enable" "Disabled,Enabled" newline bitfld.long 0x0C 9. " WKUPEN9 ,Wake up input 9 enable" "Disabled,Enabled" bitfld.long 0x0C 8. " WKUPEN8 ,Wake up input 8 enable" "Disabled,Enabled" bitfld.long 0x0C 7. " WKUPEN7 ,Wake up input 7 enable" "Disabled,Enabled" bitfld.long 0x0C 6. " WKUPEN6 ,Wake up input 6 enable" "Disabled,Enabled" newline bitfld.long 0x0C 5. " WKUPEN5 ,Wake up input 5 enable" "Disabled,Enabled" bitfld.long 0x0C 4. " WKUPEN4 ,Wake up input 4 enable" "Disabled,Enabled" bitfld.long 0x0C 3. " WKUPEN3 ,Wake up input 3 enable" "Disabled,Enabled" newline bitfld.long 0x0C 2. " WKUPEN2 ,Wake up input 2 enable" "Disabled,Enabled" bitfld.long 0x0C 1. " WKUPEN1 ,Wake up input 1 enable" "Disabled,Enabled" bitfld.long 0x0C 0. " WKUPEN0 ,Wake up input 0 enable" "Disabled,Enabled" else rgroup.long 0x04++0x0F line.long 0x00 "SUPC_SMMR,Supply Controller Supply Monitor Mode Register" bitfld.long 0x00 13. " SMIEN ,Supply monitor interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " SMRSTEN ,Supply monitor reset enable" "Disabled,Enabled" bitfld.long 0x00 8.--10. " SMSMPL ,Supply monitor sampling period" "Disabled,Continuous,32 SLCK,256 SLCK,2048 SLCK,?..." bitfld.long 0x00 0.--3. " SMTH ,Supply monitor threshold" "1.6 V,1.72 V,1.84 V,1.96 V,2.08 V,2.2 V,2.32 V,2.44 V,2.56 V,2.68 V,2.8 V,2.92 V,3.04 V,3.16 V,3.28 V,3.4 V" line.long 0x04 "SUPC_MR,Supply Controller Mode Register" hexmask.long.byte 0x04 24.--31. 1. " KEY ,Password key" bitfld.long 0x04 20. " OSCBYPASS ,Oscillator bypass" "No effect,Bypass" newline sif (cpuis("ATSAMV7*")||cpuis("ATSAME70*")) bitfld.long 0x04 17. " BKUPRETON ,SRAM on in backup mode" "Off,On" else bitfld.long 0x04 15. " BUPPOREN ,Backup area power-on reset enable" "Disabled,Enabled" endif newline bitfld.long 0x04 14. " ONREG ,Voltage regulator enable" "Disabled,Enabled" bitfld.long 0x04 13. " BODDIS ,Brownout detector disable" "No,Yes" bitfld.long 0x04 12. " BODRSTEN ,Brownout detector reset enable" "Disabled,Enabled" line.long 0x08 "SUPC_WUMR,Supply Controller Wake Up Mode Register" bitfld.long 0x08 16.--18. " LPDBC ,Low power debouncer period" "Disabled,2_RTCOUT0,3_RTCOUT0,4_RTCOUT0,5_RTCOUT0,6_RTCOUT0,7_RTCOUT0,8_RTCOUT0" bitfld.long 0x08 12.--14. " WKUPDBC ,Wake up inputs debouncer" "IMMEDIATE,3 SLCK,32 SLCK,512 SLCK,4096 SLCK,32768 SLCK,?..." bitfld.long 0x08 7. " LPDBCCLR ,Low power debouncer clear" "Disabled,Enabled" newline bitfld.long 0x08 6. " LPDBCEN1 ,Low power debouncer enable WKUP1" "Disabled,Enabled" bitfld.long 0x08 5. " LPDBCEN0 ,Low power debouncer enable WKUP0" "Disabled,Enabled" bitfld.long 0x08 3. " RTCEN ,Real time clock wake up enable" "Disabled,Enabled" newline bitfld.long 0x08 2. " RTTEN ,Real time timer wake up enable" "Disabled,Enabled" bitfld.long 0x08 1. " SMEN ,Supply monitor wake up enable" "Disabled,Enabled" line.long 0x0C "SUPC_WUIR,System Controller Wake Up Inputs Register" sif (cpuis("ATSAM4S*")) bitfld.long 0x0C 31. " WKUPT15 ,Wake up input 15 transition" "High to low,Low to high" bitfld.long 0x0C 30. " WKUPT14 ,Wake up input 14 transition" "High to low,Low to high" newline endif bitfld.long 0x0C 29. " WKUPT13 ,Wake up input 13 transition" "High to low,Low to high" bitfld.long 0x0C 28. " WKUPT12 ,Wake up input 12 transition" "High to low,Low to high" bitfld.long 0x0C 27. " WKUPT11 ,Wake up input 11 transition" "High to low,Low to high" bitfld.long 0x0C 26. " WKUPT10 ,Wake up input 10 transition" "High to low,Low to high" newline bitfld.long 0x0C 25. " WKUPT9 ,Wake up input 9 transition" "High to low,Low to high" bitfld.long 0x0C 24. " WKUPT8 ,Wake up input 8 transition" "High to low,Low to high" bitfld.long 0x0C 23. " WKUPT7 ,Wake up input 7 transition" "High to low,Low to high" bitfld.long 0x0C 22. " WKUPT6 ,Wake up input 6 transition" "High to low,Low to high" newline bitfld.long 0x0C 21. " WKUPT5 ,Wake up input 5 transition" "High to low,Low to high" bitfld.long 0x0C 20. " WKUPT4 ,Wake up input 4 transition" "High to low,Low to high" bitfld.long 0x0C 19. " WKUPT3 ,Wake up input 3 transition" "High to low,Low to high" newline bitfld.long 0x0C 18. " WKUPT2 ,Wake up input 2 transition" "High to low,Low to high" bitfld.long 0x0C 17. " WKUPT1 ,Wake up input 1 transition" "High to low,Low to high" bitfld.long 0x0C 16. " WKUPT0 ,Wake up input 0 transition" "High to low,Low to high" newline sif (cpuis("ATSAM4S*")) bitfld.long 0x0C 15. " WKUPEN15 ,Wake up input 15 enable" "Disabled,Enabled" bitfld.long 0x0C 14. " WKUPEN14 ,Wake up input 14 enable" "Disabled,Enabled" newline endif bitfld.long 0x0C 13. " WKUPEN13 ,Wake up input 13 enable" "Disabled,Enabled" bitfld.long 0x0C 12. " WKUPEN12 ,Wake up input 12 enable" "Disabled,Enabled" bitfld.long 0x0C 11. " WKUPEN11 ,Wake up input 11 enable" "Disabled,Enabled" bitfld.long 0x0C 10. " WKUPEN10 ,Wake up input 10 enable" "Disabled,Enabled" newline bitfld.long 0x0C 9. " WKUPEN9 ,Wake up input 9 enable" "Disabled,Enabled" bitfld.long 0x0C 8. " WKUPEN8 ,Wake up input 8 enable" "Disabled,Enabled" bitfld.long 0x0C 7. " WKUPEN7 ,Wake up input 7 enable" "Disabled,Enabled" bitfld.long 0x0C 6. " WKUPEN6 ,Wake up input 6 enable" "Disabled,Enabled" newline bitfld.long 0x0C 5. " WKUPEN5 ,Wake up input 5 enable" "Disabled,Enabled" bitfld.long 0x0C 4. " WKUPEN4 ,Wake up input 4 enable" "Disabled,Enabled" bitfld.long 0x0C 3. " WKUPEN3 ,Wake up input 3 enable" "Disabled,Enabled" newline bitfld.long 0x0C 2. " WKUPEN2 ,Wake up input 2 enable" "Disabled,Enabled" bitfld.long 0x0C 1. " WKUPEN1 ,Wake up input 1 enable" "Disabled,Enabled" bitfld.long 0x0C 0. " WKUPEN0 ,Wake up input 0 enable" "Disabled,Enabled" endif newline hgroup.long 0x14++0x03 hide.long 0x00 "SUPC_SR,Supply Controller Status Register" in newline group.long 0xE4++0x03 line.long 0x00 "SYSC_WPMR,System Controller Write Protection Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write protection key" bitfld.long 0x00 0. " WPEN ,WPEN" "Disabled,Enabled" width 0x0B tree.end tree "GPBR (General Purpose Backup Registers)" base ad:0x400E1490 width 8. sif (cpuis("AT91SAM3S8*")||cpuis("AT91SAM3N*")||cpuis("ATSAM4N*")||cpuis("ATSAM4S*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMG5*")) group.long 0x0++0x03 line.long 0x00 "GPBR0,General Purpose Backup Register 0" group.long 0x4++0x03 line.long 0x00 "GPBR1,General Purpose Backup Register 1" group.long 0x8++0x03 line.long 0x00 "GPBR2,General Purpose Backup Register 2" group.long 0xC++0x03 line.long 0x00 "GPBR3,General Purpose Backup Register 3" group.long 0x10++0x03 line.long 0x00 "GPBR4,General Purpose Backup Register 4" group.long 0x14++0x03 line.long 0x00 "GPBR5,General Purpose Backup Register 5" group.long 0x18++0x03 line.long 0x00 "GPBR6,General Purpose Backup Register 6" group.long 0x1C++0x03 line.long 0x00 "GPBR7,General Purpose Backup Register 7" elif (cpuis("ATSAM4E*")) group.long 0x0++0x03 line.long 0x00 "GPBR0,General Purpose Backup Register 0" group.long 0x4++0x03 line.long 0x00 "GPBR1,General Purpose Backup Register 1" group.long 0x8++0x03 line.long 0x00 "GPBR2,General Purpose Backup Register 2" group.long 0xC++0x03 line.long 0x00 "GPBR3,General Purpose Backup Register 3" group.long 0x10++0x03 line.long 0x00 "GPBR4,General Purpose Backup Register 4" group.long 0x14++0x03 line.long 0x00 "GPBR5,General Purpose Backup Register 5" group.long 0x18++0x03 line.long 0x00 "GPBR6,General Purpose Backup Register 6" group.long 0x1C++0x03 line.long 0x00 "GPBR7,General Purpose Backup Register 7" group.long 0x20++0x03 line.long 0x00 "GPBR8,General Purpose Backup Register 8" group.long 0x24++0x03 line.long 0x00 "GPBR9,General Purpose Backup Register 9" group.long 0x28++0x03 line.long 0x00 "GPBR10,General Purpose Backup Register 10" group.long 0x2C++0x03 line.long 0x00 "GPBR11,General Purpose Backup Register 11" group.long 0x30++0x03 line.long 0x00 "GPBR12,General Purpose Backup Register 12" group.long 0x34++0x03 line.long 0x00 "GPBR13,General Purpose Backup Register 13" group.long 0x38++0x03 line.long 0x00 "GPBR14,General Purpose Backup Register 14" group.long 0x3C++0x03 line.long 0x00 "GPBR15,General Purpose Backup Register 15" group.long 0x40++0x03 line.long 0x00 "GPBR16,General Purpose Backup Register 16" group.long 0x44++0x03 line.long 0x00 "GPBR17,General Purpose Backup Register 17" group.long 0x48++0x03 line.long 0x00 "GPBR18,General Purpose Backup Register 18" group.long 0x4C++0x03 line.long 0x00 "GPBR19,General Purpose Backup Register 19" else group.long 0x0++0x03 line.long 0x00 "GPBR0,General Purpose Backup Register 0" group.long 0x4++0x03 line.long 0x00 "GPBR1,General Purpose Backup Register 1" group.long 0x8++0x03 line.long 0x00 "GPBR2,General Purpose Backup Register 2" group.long 0xC++0x03 line.long 0x00 "GPBR3,General Purpose Backup Register 3" endif width 0x0B tree.end tree.open "EEFC (Enhanced Embedded Flash Controller)" tree "EEFC0" base ad:0x400E0A00 width 10. group.long 0x00++0x03 line.long 0x00 "EEFC_FMR,EEFC Flash Mode Register" sif (cpuis("ATSAM4S*")||cpuis("ATSAM4E*")||cpuis("ATSAM4N*")) bitfld.long 0x00 26. " CLOE ,Code Loops Optimization Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 24. " FAM , Flash Access Mode" "128-bit,64-bit" sif (cpuis("AT91SAM3S16C")||cpuis("AT91SAM3S8B")||cpuis("AT91SAM3S8C")||cpuis("AT91SAM3SD8B")||cpuis("AT91SAM3SD8C")||cpuis("ATSAM4S*")||cpuis("ATSAM4E*")||cpuis("ATSAM4N*")) textline " " bitfld.long 0x00 16. " SCOD ,Sequential Code Optimization Disable" "No,Yes" endif textline " " bitfld.long 0x00 8.--11. " FWS ,Flash Wait State" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x00 0. " FRDY ,Flash Ready Interrupt Enable" "Disabled,Enabled" wgroup.long 0x04++0x03 line.long 0x00 "EEFC_FCR,EEFC Flash Command Register" hexmask.long.byte 0x00 24.--31. 1. " FKEY , Flash Writing Protection Key" textline " " hexmask.long.word 0x00 8.--23. 1. " FARG ,Flash Command Argument" textline " " sif (cpuis("ATSAM4E*")) bitfld.long 0x00 0.--4. " FCMD ,Flash Command" "GETD,WP,WPL,EWP,EWPL,EA,,EPA,SLB,CLB,GLB,SGPB,CGPB,GGPB,STUI,SPUI,GCALB,ES,WUS,EUS,STUS,SPUS,?..." else hexmask.long.byte 0x00 0.--7. 1. " FCMD ,Flash Command" endif hgroup.long 0x08++0x03 hide.long 0x00 "EEFC_FSR,EEFC Flash Status Register" in rgroup.long 0x0c++0x03 line.long 0x00 "EEFC_FRR,EEFC Flash Result Register" hexmask.long 0x00 0.--31. 1. " FVALUE , Flash Result Value" width 0xb tree.end tree "EEFC1" base ad:0x400E0C00 width 10. group.long 0x00++0x03 line.long 0x00 "EEFC_FMR,EEFC Flash Mode Register" sif (cpuis("ATSAM4S*")||cpuis("ATSAM4E*")||cpuis("ATSAM4N*")) bitfld.long 0x00 26. " CLOE ,Code Loops Optimization Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 24. " FAM , Flash Access Mode" "128-bit,64-bit" sif (cpuis("AT91SAM3S16C")||cpuis("AT91SAM3S8B")||cpuis("AT91SAM3S8C")||cpuis("AT91SAM3SD8B")||cpuis("AT91SAM3SD8C")||cpuis("ATSAM4S*")||cpuis("ATSAM4E*")||cpuis("ATSAM4N*")) textline " " bitfld.long 0x00 16. " SCOD ,Sequential Code Optimization Disable" "No,Yes" endif textline " " bitfld.long 0x00 8.--11. " FWS ,Flash Wait State" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x00 0. " FRDY ,Flash Ready Interrupt Enable" "Disabled,Enabled" wgroup.long 0x04++0x03 line.long 0x00 "EEFC_FCR,EEFC Flash Command Register" hexmask.long.byte 0x00 24.--31. 1. " FKEY , Flash Writing Protection Key" textline " " hexmask.long.word 0x00 8.--23. 1. " FARG ,Flash Command Argument" textline " " sif (cpuis("ATSAM4E*")) bitfld.long 0x00 0.--4. " FCMD ,Flash Command" "GETD,WP,WPL,EWP,EWPL,EA,,EPA,SLB,CLB,GLB,SGPB,CGPB,GGPB,STUI,SPUI,GCALB,ES,WUS,EUS,STUS,SPUS,?..." else hexmask.long.byte 0x00 0.--7. 1. " FCMD ,Flash Command" endif hgroup.long 0x08++0x03 hide.long 0x00 "EEFC_FSR,EEFC Flash Status Register" in rgroup.long 0x0c++0x03 line.long 0x00 "EEFC_FRR,EEFC Flash Result Register" hexmask.long 0x00 0.--31. 1. " FVALUE , Flash Result Value" width 0xb tree.end tree.end sif cpuis("ATSAM4SD32*")||cpuis("ATSAM4SD16*")||cpuis("ATSAM4SA16*") tree "CMCC (Cortex M Cache Controller)" base ad:0x4007C000 width 13. rgroup.long 0x00++0x3 line.long 0x00 "CMCC_TYPE,Cache Controller Type Register" bitfld.long 0x00 11.--13. " CLSIZE ,Cache Line Size" "4 bytes,8 bytes,16 bytes,32 bytes,?..." bitfld.long 0x00 8.--10. " CSIZE ,Cache Size" "1 KBytes,2 KBytes,4 KBytes,8 KBytes,?..." bitfld.long 0x00 7. " LCKDOWN ,Lock Down Supported" "Not supported,Supported" textline " " bitfld.long 0x00 5.--6. " WAYNUM ,Number of Way" "Direct Cache,2-WAY,4-WAY,8-WAY" bitfld.long 0x00 4. " RRP ,Random Selection Policy Supported" "Not supported,Supported" bitfld.long 0x00 3. " LRUP ,Least Recently Used Policy Supported" "Not supported,Supported" textline " " bitfld.long 0x00 2. " RANDP ,Random Selection Policy Supported" "Not supported,Supported" bitfld.long 0x00 1. " GCLK ,Dynamic Clock Gating Supported" "Not supported,Supported" bitfld.long 0x00 0. " AP ,Access Port Access Allowed" "Disabled,Enabled" group.long 0x04++0x3 line.long 0x00 "CMCC_CFG,Cache Controller Configuration Register" bitfld.long 0x00 0. " GCLKDIS ,Disable Clock Gating" "No,Yes" sif (cpuis("ATSAM4E*")||cpuis("ATSAM4S*")) wgroup.long 0x08++0x3 line.long 0x00 "CMCC_CTRL,Cache Controller Control Register" bitfld.long 0x00 0. " CEN ,Cache Controller Enable" "Disable,Enable" rgroup.long 0x0C++0x03 line.long 0x00 "CMCC_SR,Cache Controller Status Register" bitfld.long 0x00 0. " CSTS ,Cache Controller Status" "Disabled,Enabled" else wgroup.long 0x08++0x7 line.long 0x00 "CMCC_CTRL,Cache Controller Control Register" bitfld.long 0x00 0. " CEN ,Cache Controller Enable" "Disabled,Enabled" line.long 0x04 "CMCC_SR,Cache Controller Status Register" bitfld.long 0x04 0. " CSTS ,Cache Controller Status" "Disabled,Enabled" endif wgroup.long 0x20++0x13 line.long 0x00 "CMCC_MAINT0,Cache Controller Maintenance Register 0" bitfld.long 0x00 0. " INVALL ,Cache Controller Invalidate All" "No effect,Invalidate" line.long 0x04 "CMCC_MAINT1,Cache Controller Maintenance Register 1" bitfld.long 0x04 30.--31. " WAY ,Invalidate Way" "Way 0,Way 1,Way 2,Way 3" sif (cpuis("ATSAM4E*")||cpuis("ATSAM4S*")) bitfld.long 0x04 4.--8. " INDEX ,Invalidate Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else bitfld.long 0x04 4.--7. " INDEX ,Invalidate Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x28++0x7 line.long 0x00 "CMCC_MCFG,Cache Controller Monitor Configuration Register" bitfld.long 0x00 0.--1. " MODE ,Cache Controller Monitor Counter Mode" "Cycle counter,Instruction hit,Data hit,?..." line.long 0x04 "CMCC_MEN,Cache Controller Monitor Enable Register" bitfld.long 0x04 0. " MENABLE ,Cache Controller Monitor Enable" "Disabled,Enabled" wgroup.long 0x30++0x03 line.long 0x00 "CMCC_MCTRL,Cache Controller Monitor Control Register" bitfld.long 0x00 0. " SWRST ,Monitor" "No effect,Reset" rgroup.long 0x34++0x03 line.long 0x00 "CMCC_MSR,Cache Controller Monitor Status Register" width 0xB tree.end endif tree "CRCCU (Cyclic Redundancy Check Calculation Unit)" base ad:0x40044000 width 0x13 group.long 0x00++0x03 line.long 0x00 "CRCCU_DSCR,CRCCU Descriptor Base Address Register" hexmask.long.tbyte 0x00 9.--31. 0x02 " DSCR ,Descriptor Base Address" group.long 0x10++0x03 line.long 0x00 "CRCCU_DMA_SR,CRCCU DMA Status Register" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " DMASR ,DMA Status Register" "Disabled,Enabled" group.long 0x1C++0x03 line.long 0x00 "CRCCU_DMA_IMR,CRCCU DMA Interrupt Mask Register" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " DMAIMR ,Interrupt Mask Register" "Disabled,Enabled" hgroup.long 0x20++0x03 hide.long 0x00 "CRCCU_DMA_ISR, CRCCU DMA Interrupt Status Register" in wgroup.long 0x34++0x03 line.long 0x00 "CRCCU_CR,CRCCU Control Register" bitfld.long 0x00 0. " RESET ,CRC Computation Reset" "No effect,Reset" group.long 0x38++0x03 line.long 0x00 "CRCCU_MR,CRCCU Mode Register" bitfld.long 0x00 4.--7. " DIVIDER ,Request Divider" "2^1,2^2,2^3,2^4,2^5,2^6,2^7,2^8,2^9,2^10,2^11,2^12,2^13,2^14,2^15,2^16" bitfld.long 0x00 2.--3. " PTYPE ,Primitive Polynomial" "0x04C11DB7,0x1EDC6F41,0x1021,?..." textline " " bitfld.long 0x00 1. " COMPARE ,CRC Compare" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLE ,CRC Enable" "Disabled,Enabled" if ((d.l((ad:0x40044000+0x38))&0x02)==0x02) hgroup.long 0x3C++0x03 hide.long 0x00 "CRCCU_SR,CRCCU Status Register" else rgroup.long 0x3C++0x03 line.long 0x00 "CRCCU_SR,CRCCU Status Register" endif group.long 0x48++0x03 line.long 0x00 "CRCCU_IMR,CRCCU Interrupt Mask Register" sif cpuis("ATSAM4S*") setclrfld.long 0x00 0. -0x08 0. -0x04 0. " ERRIMR ,CRC Error Interrupt Mask Register" "Disabled,Enabled" else setclrfld.long 0x00 0. -0x08 0. -0x04 0. " DMAIMR ,Interrupt Mask Register" "Disabled,Enabled" endif sif cpuis("ATSAM4S*") rgroup.long 0x4C++0x03 line.long 0x00 "CRCCU_ISR, CRCCU Interrupt Status Register" bitfld.long 0x00 0. " ERRISR ,CRC Error Interrupt Status" "No interrupt,Interrupt" else hgroup.long 0x4C++0x03 hide.long 0x00 "CRCCU_ISR, CRCCU Interrupt Status Register" in endif sif (cpuis("ATSAM4L*")) rgroup.long 0xFC++0x03 line.long 0x00 "VERSION, Version Register" hexmask.long.word 0x00 0.--11. 1. " VERSION , Version Number" endif tree "Transfer Control Registers" base ad:(d.l(ad:0x40044000)&0xFFFFFE00) group.long 0x00++0x07 line.long 0x00 "TR_ADDR,Transfer Address Register" line.long 0x04 "TR_CTRL,Transfer Control Register" sif (cpuis("ATSAM4S16C")||cpuis("AT91SAM3S16C")||cpuis("AT91SAM3S8B")||cpuis("AT91SAM3S8C")||cpuis("AT91SAM3SD8B")||cpuis("AT91SAM3SD8C")||cpuis("ATSAM4L*")) bitfld.long 0x04 27. " IEN ,Context Done Interrupt Enable" "Disabled,Enabled" elif (cpuis("ATSAM4S*")) bitfld.long 0x04 27. " IEN ,Context Done Interrupt Enable" "Enabled,Disabled" endif bitfld.long 0x04 24.--25. " TRWIDTH ,Transfer Width Register" "BYTE,HALFWORD,WORD,?..." hexmask.long.word 0x04 0.--15. 1. " BTSIZE ,Buffer Transfer Size" group.long 0x10++0x03 line.long 0x00 "TR_CRC,Transfer Reference Register" tree.end width 0x0B tree.end tree "MATRIX (Bus Matrix)" base ad:0x400E0200 width 14. if ((d.l(ad:0x400E0200+0x1E4)&0x01)==0x00) group.long 0x0++0x03 line.long 0x00 "MATRIX_MCFG0,Bus Matrix Master Configuration Register 0" bitfld.long 0x00 0.--2. " ULBT ,Undefined Length Burst Type" "Infinite,Single,4-beat,8-beat,16-beat,?..." group.long 0x4++0x03 line.long 0x00 "MATRIX_MCFG1,Bus Matrix Master Configuration Register 1" bitfld.long 0x00 0.--2. " ULBT ,Undefined Length Burst Type" "Infinite,Single,4-beat,8-beat,16-beat,?..." group.long 0x8++0x03 line.long 0x00 "MATRIX_MCFG2,Bus Matrix Master Configuration Register 2" bitfld.long 0x00 0.--2. " ULBT ,Undefined Length Burst Type" "Infinite,Single,4-beat,8-beat,16-beat,?..." group.long 0xC++0x03 line.long 0x00 "MATRIX_MCFG3,Bus Matrix Master Configuration Register 3" bitfld.long 0x00 0.--2. " ULBT ,Undefined Length Burst Type" "Infinite,Single,4-beat,8-beat,16-beat,?..." if ((d.l(ad:0x400E0200+0x40)&0x30000)==0x20000) group.long 0x40++0x03 line.long 0x00 "MATRIX_SCFG0,Bus Matrix Slave Configuration Register 0" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." bitfld.long 0x00 18.--20. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" else group.long 0x40++0x03 line.long 0x00 "MATRIX_SCFG0,Bus Matrix Slave Configuration Register 0" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" endif if ((d.l(ad:0x400E0200+0x44)&0x30000)==0x20000) group.long 0x44++0x03 line.long 0x00 "MATRIX_SCFG1,Bus Matrix Slave Configuration Register 1" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." bitfld.long 0x00 18.--20. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" else group.long 0x44++0x03 line.long 0x00 "MATRIX_SCFG1,Bus Matrix Slave Configuration Register 1" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" endif if ((d.l(ad:0x400E0200+0x48)&0x30000)==0x20000) group.long 0x48++0x03 line.long 0x00 "MATRIX_SCFG2,Bus Matrix Slave Configuration Register 2" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." bitfld.long 0x00 18.--20. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" else group.long 0x48++0x03 line.long 0x00 "MATRIX_SCFG2,Bus Matrix Slave Configuration Register 2" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" endif if ((d.l(ad:0x400E0200+0x4C)&0x30000)==0x20000) group.long 0x4C++0x03 line.long 0x00 "MATRIX_SCFG3,Bus Matrix Slave Configuration Register 3" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." bitfld.long 0x00 18.--20. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" else group.long 0x4C++0x03 line.long 0x00 "MATRIX_SCFG3,Bus Matrix Slave Configuration Register 3" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" endif if ((d.l(ad:0x400E0200+0x50)&0x30000)==0x20000) group.long 0x50++0x03 line.long 0x00 "MATRIX_SCFG4,Bus Matrix Slave Configuration Register 4" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." bitfld.long 0x00 18.--20. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" else group.long 0x50++0x03 line.long 0x00 "MATRIX_SCFG4,Bus Matrix Slave Configuration Register 4" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" endif group.long 0x80++0x03 line.long 0x00 "MATRIX_PRAS0,Bus Matrix Priority Register A for Slave 0 Register" bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "Lowest,1,2,Highest" group.long 0x88++0x03 line.long 0x00 "MATRIX_PRAS1,Bus Matrix Priority Register A for Slave 1 Register" bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "Lowest,1,2,Highest" group.long 0x90++0x03 line.long 0x00 "MATRIX_PRAS2,Bus Matrix Priority Register A for Slave 2 Register" bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "Lowest,1,2,Highest" group.long 0x98++0x03 line.long 0x00 "MATRIX_PRAS3,Bus Matrix Priority Register A for Slave 3 Register" bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "Lowest,1,2,Highest" group.long 0xA0++0x03 line.long 0x00 "MATRIX_PRAS4,Bus Matrix Priority Register A for Slave 4 Register" bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "Lowest,1,2,Highest" group.long 0x114++0x03 line.long 0x00 "CCFG_SYSIO,System I/O Configuration Register" bitfld.long 0x00 12. " SYSIO12 ,PB12 or ERASE Assignment" "ERASE,PB12" bitfld.long 0x00 11. " SYSIO11 ,PB11 or DDP Assignment" "DDP,PB11" bitfld.long 0x00 10. " SYSIO10 ,PB10 or DDM Assignment" "DDM,PB10" textline " " bitfld.long 0x00 7. " SYSIO7 ,PB7 or TCK/SWCLK Assignment" "TCK/SWCLK,PB7" bitfld.long 0x00 6. " SYSIO6 ,PB6 or TMS/SWDIO Assignment" "TMS/SWDIO,PB6" bitfld.long 0x00 5. " SYSIO5 ,PB5 or TDO/TRACESWO Assignment" "TDO/TRACESWO,PB5" textline " " bitfld.long 0x00 4. " SYSIO4 ,PB4 or TDI Assignment" "TDI,PB4" else rgroup.long 0x0++0x03 line.long 0x00 "MATRIX_MCFG0,Bus Matrix Master Configuration Register 0" bitfld.long 0x00 0.--2. " ULBT ,Undefined Length Burst Type" "Infinite,Single,4-beat,8-beat,16-beat,?..." rgroup.long 0x4++0x03 line.long 0x00 "MATRIX_MCFG1,Bus Matrix Master Configuration Register 1" bitfld.long 0x00 0.--2. " ULBT ,Undefined Length Burst Type" "Infinite,Single,4-beat,8-beat,16-beat,?..." rgroup.long 0x8++0x03 line.long 0x00 "MATRIX_MCFG2,Bus Matrix Master Configuration Register 2" bitfld.long 0x00 0.--2. " ULBT ,Undefined Length Burst Type" "Infinite,Single,4-beat,8-beat,16-beat,?..." rgroup.long 0xC++0x03 line.long 0x00 "MATRIX_MCFG3,Bus Matrix Master Configuration Register 3" bitfld.long 0x00 0.--2. " ULBT ,Undefined Length Burst Type" "Infinite,Single,4-beat,8-beat,16-beat,?..." if ((d.l(ad:0x400E0200+0x40)&0x30000)==0x20000) rgroup.long 0x40++0x03 line.long 0x00 "MATRIX_SCFG0,Bus Matrix Slave Configuration Register 0" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." bitfld.long 0x00 18.--20. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" else rgroup.long 0x40++0x03 line.long 0x00 "MATRIX_SCFG0,Bus Matrix Slave Configuration Register 0" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" endif if ((d.l(ad:0x400E0200+0x44)&0x30000)==0x20000) rgroup.long 0x44++0x03 line.long 0x00 "MATRIX_SCFG1,Bus Matrix Slave Configuration Register 1" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." bitfld.long 0x00 18.--20. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" else rgroup.long 0x44++0x03 line.long 0x00 "MATRIX_SCFG1,Bus Matrix Slave Configuration Register 1" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" endif if ((d.l(ad:0x400E0200+0x48)&0x30000)==0x20000) rgroup.long 0x48++0x03 line.long 0x00 "MATRIX_SCFG2,Bus Matrix Slave Configuration Register 2" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." bitfld.long 0x00 18.--20. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" else rgroup.long 0x48++0x03 line.long 0x00 "MATRIX_SCFG2,Bus Matrix Slave Configuration Register 2" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" endif if ((d.l(ad:0x400E0200+0x4C)&0x30000)==0x20000) rgroup.long 0x4C++0x03 line.long 0x00 "MATRIX_SCFG3,Bus Matrix Slave Configuration Register 3" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." bitfld.long 0x00 18.--20. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" else rgroup.long 0x4C++0x03 line.long 0x00 "MATRIX_SCFG3,Bus Matrix Slave Configuration Register 3" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" endif if ((d.l(ad:0x400E0200+0x50)&0x30000)==0x20000) rgroup.long 0x50++0x03 line.long 0x00 "MATRIX_SCFG4,Bus Matrix Slave Configuration Register 4" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." bitfld.long 0x00 18.--20. " FIXED_DEFMSTR ,Default Master Fixed Index" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" else rgroup.long 0x50++0x03 line.long 0x00 "MATRIX_SCFG4,Bus Matrix Slave Configuration Register 4" bitfld.long 0x00 24.--25. " ARBT ,Arbitration Type" "Round-Robin,Fixed Priority,?..." textline " " bitfld.long 0x00 16.--17. " DEFMASTR_TYPE ,Default Master Type" "No master,Last,Fixed,?..." hexmask.long.byte 0x00 0.--7. 1. " SLOT_CYCLE ,Burst Allowed Cycles Maximum Number" endif rgroup.long 0x80++0x03 line.long 0x00 "MATRIX_PRAS0,Bus Matrix Priority Register A for Slave 0 Register" bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "Lowest,1,2,Highest" rgroup.long 0x88++0x03 line.long 0x00 "MATRIX_PRAS1,Bus Matrix Priority Register A for Slave 1 Register" bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "Lowest,1,2,Highest" rgroup.long 0x90++0x03 line.long 0x00 "MATRIX_PRAS2,Bus Matrix Priority Register A for Slave 2 Register" bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "Lowest,1,2,Highest" rgroup.long 0x98++0x03 line.long 0x00 "MATRIX_PRAS3,Bus Matrix Priority Register A for Slave 3 Register" bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "Lowest,1,2,Highest" rgroup.long 0xA0++0x03 line.long 0x00 "MATRIX_PRAS4,Bus Matrix Priority Register A for Slave 4 Register" bitfld.long 0x00 16.--17. " M4PR ,Master 4 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 12.--13. " M3PR ,Master 3 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 8.--9. " M2PR ,Master 2 Priority" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 4.--5. " M1PR ,Master 1 Priority" "Lowest,1,2,Highest" bitfld.long 0x00 0.--1. " M0PR ,Master 0 Priority" "Lowest,1,2,Highest" rgroup.long 0x114++0x03 line.long 0x00 "CCFG_SYSIO,System I/O Configuration Register" bitfld.long 0x00 12. " SYSIO12 ,PB12 or ERASE Assignment" "ERASE,PB12" bitfld.long 0x00 11. " SYSIO11 ,PB11 or DDP Assignment" "DDP,PB11" bitfld.long 0x00 10. " SYSIO10 ,PB10 or DDM Assignment" "DDM,PB10" textline " " bitfld.long 0x00 7. " SYSIO7 ,PB7 or TCK/SWCLK Assignment" "TCK/SWCLK,PB7" bitfld.long 0x00 6. " SYSIO6 ,PB6 or TMS/SWDIO Assignment" "TMS/SWDIO,PB6" bitfld.long 0x00 5. " SYSIO5 ,PB5 or TDO/TRACESWO Assignment" "TDO/TRACESWO,PB5" textline " " bitfld.long 0x00 4. " SYSIO4 ,PB4 or TDI Assignment" "TDI,PB4" endif group.long 0x11C++0x3 line.long 0x00 "CCFG_SMCNFCS,SMC NAND Flash Chip select Configuration Register" bitfld.long 0x00 3. " SMC_NFCS3 ,SMC NAND Flash Chip Select 3 Assignment" "Not assigned,Assigned" bitfld.long 0x00 2. " SMC_NFCS2 ,SMC NAND Flash Chip Select 2 Assignment" "Not assigned,Assigned" bitfld.long 0x00 1. " SMC_NFCS1 ,SMC NAND Flash Chip Select 1 Assignment" "Not assigned,Assigned" textline " " bitfld.long 0x00 0. " SMC_NFCS0 ,SMC NAND Flash Chip Select 0 Assignment" "Not assigned,Assigned" group.long 0x1E4++0x03 line.long 0x00 "MATRIX_WPMR,Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write Protect KEY" bitfld.long 0x00 0. " WPEN ,Write Protect Enable" "Disabled,Enabled" hgroup.long 0x1E8++0x03 hide.long 0x00 "MATRIX_WPSR,Write Protect Status Register" in width 0x0B tree.end tree "SMC (Static Memory Controller)" base ad:0x400E0000 width 0x0C sif cpuis("ATSAM4S*") tree "CS0" if ((d.l(ad:0x400E0000+0xE4)&0x01)==0x00) group.long 0x0++0x0F line.long 0x00 "SMC_SETUP0,SMC Setup Register 0" hexmask.long.byte 0x00 24.--29. 1. " NCS_RD_SETUP ,NCS Setup Length in Read Access" hexmask.long.byte 0x00 16.--21. 1. " NRD_SETUP ,NRD Setup Length" textline " " hexmask.long.byte 0x00 8.--13. 1. " NCS_WR_SETUP ,NCS Setup Length in Write Access" hexmask.long.byte 0x00 0.--5. 1. " NWE_SETUP ,NWE Setup Length" line.long 0x04 "SMC_PULSE0,SMC Pulse Register 0" hexmask.long.byte 0x4 24.--30. 1. " NCS_RD_PULSE ,NCS Pulse Length in Read Access" hexmask.long.byte 0x4 16.--22. 1. " NRD_PULSE ,NRD Pulse Length" textline " " hexmask.long.byte 0x4 8.--14. 1. " NCS_WR_PULSE ,NCS Pulse Length in Write Access" hexmask.long.byte 0x4 0.--6. 1. " NWE_PULSE ,NWE Pulse Length" line.long 0x08 "SMC_CYCLE0,SMC Cycle Register 0" hexmask.long.word 0x8 16.--24. 1. " NRD_CYCLE ,Total Read Cycle Length" hexmask.long.word 0x8 0.--8. 1. " NWE_CYCLE ,Total Write Cycle Length" line.long 0x0C "SMC_MODE0,SMC Mode Register 0" bitfld.long 0x0C 28.--29. " PS ,Page Size" "4_BYTE,8_BYTE,16_BYTE,32_BYTE" bitfld.long 0x0C 24. " PMEN ,Page Mode Enabled" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled" bitfld.long 0x0C 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" textline " " bitfld.long 0x0C 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,,Frozen,Ready" textline " " bitfld.long 0x0C 1. " WRITE_MODE ,Write Mode" "NCS,NWE" bitfld.long 0x0C 0. " READ_MODE ,Read Mode" "NCS,NRD" else rgroup.long 0x0++0x0F line.long 0x00 "SMC_SETUP0,SMC Setup Register 0" hexmask.long.byte 0x00 24.--29. 1. " NCS_RD_SETUP ,NCS Setup Length in Read Access" hexmask.long.byte 0x00 16.--21. 1. " NRD_SETUP ,NRD Setup Length" textline " " hexmask.long.byte 0x00 8.--13. 1. " NCS_WR_SETUP ,NCS Setup Length in Write Access" hexmask.long.byte 0x00 0.--5. 1. " NWE_SETUP ,NWE Setup Length" line.long 0x04 "SMC_PULSE0,SMC Pulse Register 0" hexmask.long.byte 0x4 24.--30. 1. " NCS_RD_PULSE ,NCS Pulse Length in Read Access" hexmask.long.byte 0x4 16.--22. 1. " NRD_PULSE ,NRD Pulse Length" textline " " hexmask.long.byte 0x4 8.--14. 1. " NCS_WR_PULSE ,NCS Pulse Length in Write Access" hexmask.long.byte 0x4 0.--6. 1. " NWE_PULSE ,NWE Pulse Length" line.long 0x08 "SMC_CYCLE0,SMC Cycle Register 0" hexmask.long.word 0x8 16.--24. 1. " NRD_CYCLE ,Total Read Cycle Length" hexmask.long.word 0x8 0.--8. 1. " NWE_CYCLE ,Total Write Cycle Length" line.long 0x0C "SMC_MODE0,SMC Mode Register 0" bitfld.long 0x0C 28.--29. " PS ,Page Size" "4_BYTE,8_BYTE,16_BYTE,32_BYTE" bitfld.long 0x0C 24. " PMEN ,Page Mode Enabled" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled" bitfld.long 0x0C 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" textline " " bitfld.long 0x0C 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,,Frozen,Ready" textline " " bitfld.long 0x0C 1. " WRITE_MODE ,Write Mode" "NCS,NWE" bitfld.long 0x0C 0. " READ_MODE ,Read Mode" "NCS,NRD" endif tree.end tree "CS1" if ((d.l(ad:0x400E0000+0xE4)&0x01)==0x00) group.long 0x10++0x0F line.long 0x00 "SMC_SETUP1,SMC Setup Register 1" hexmask.long.byte 0x00 24.--29. 1. " NCS_RD_SETUP ,NCS Setup Length in Read Access" hexmask.long.byte 0x00 16.--21. 1. " NRD_SETUP ,NRD Setup Length" textline " " hexmask.long.byte 0x00 8.--13. 1. " NCS_WR_SETUP ,NCS Setup Length in Write Access" hexmask.long.byte 0x00 0.--5. 1. " NWE_SETUP ,NWE Setup Length" line.long 0x04 "SMC_PULSE1,SMC Pulse Register 1" hexmask.long.byte 0x4 24.--30. 1. " NCS_RD_PULSE ,NCS Pulse Length in Read Access" hexmask.long.byte 0x4 16.--22. 1. " NRD_PULSE ,NRD Pulse Length" textline " " hexmask.long.byte 0x4 8.--14. 1. " NCS_WR_PULSE ,NCS Pulse Length in Write Access" hexmask.long.byte 0x4 0.--6. 1. " NWE_PULSE ,NWE Pulse Length" line.long 0x08 "SMC_CYCLE1,SMC Cycle Register 1" hexmask.long.word 0x8 16.--24. 1. " NRD_CYCLE ,Total Read Cycle Length" hexmask.long.word 0x8 0.--8. 1. " NWE_CYCLE ,Total Write Cycle Length" line.long 0x0C "SMC_MODE1,SMC Mode Register 1" bitfld.long 0x0C 28.--29. " PS ,Page Size" "4_BYTE,8_BYTE,16_BYTE,32_BYTE" bitfld.long 0x0C 24. " PMEN ,Page Mode Enabled" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled" bitfld.long 0x0C 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" textline " " bitfld.long 0x0C 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,,Frozen,Ready" textline " " bitfld.long 0x0C 1. " WRITE_MODE ,Write Mode" "NCS,NWE" bitfld.long 0x0C 0. " READ_MODE ,Read Mode" "NCS,NRD" else rgroup.long 0x10++0x0F line.long 0x00 "SMC_SETUP1,SMC Setup Register 1" hexmask.long.byte 0x00 24.--29. 1. " NCS_RD_SETUP ,NCS Setup Length in Read Access" hexmask.long.byte 0x00 16.--21. 1. " NRD_SETUP ,NRD Setup Length" textline " " hexmask.long.byte 0x00 8.--13. 1. " NCS_WR_SETUP ,NCS Setup Length in Write Access" hexmask.long.byte 0x00 0.--5. 1. " NWE_SETUP ,NWE Setup Length" line.long 0x04 "SMC_PULSE1,SMC Pulse Register 1" hexmask.long.byte 0x4 24.--30. 1. " NCS_RD_PULSE ,NCS Pulse Length in Read Access" hexmask.long.byte 0x4 16.--22. 1. " NRD_PULSE ,NRD Pulse Length" textline " " hexmask.long.byte 0x4 8.--14. 1. " NCS_WR_PULSE ,NCS Pulse Length in Write Access" hexmask.long.byte 0x4 0.--6. 1. " NWE_PULSE ,NWE Pulse Length" line.long 0x08 "SMC_CYCLE1,SMC Cycle Register 1" hexmask.long.word 0x8 16.--24. 1. " NRD_CYCLE ,Total Read Cycle Length" hexmask.long.word 0x8 0.--8. 1. " NWE_CYCLE ,Total Write Cycle Length" line.long 0x0C "SMC_MODE1,SMC Mode Register 1" bitfld.long 0x0C 28.--29. " PS ,Page Size" "4_BYTE,8_BYTE,16_BYTE,32_BYTE" bitfld.long 0x0C 24. " PMEN ,Page Mode Enabled" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled" bitfld.long 0x0C 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" textline " " bitfld.long 0x0C 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,,Frozen,Ready" textline " " bitfld.long 0x0C 1. " WRITE_MODE ,Write Mode" "NCS,NWE" bitfld.long 0x0C 0. " READ_MODE ,Read Mode" "NCS,NRD" endif tree.end tree "CS2" if ((d.l(ad:0x400E0000+0xE4)&0x01)==0x00) group.long 0x20++0x0F line.long 0x00 "SMC_SETUP2,SMC Setup Register 2" hexmask.long.byte 0x00 24.--29. 1. " NCS_RD_SETUP ,NCS Setup Length in Read Access" hexmask.long.byte 0x00 16.--21. 1. " NRD_SETUP ,NRD Setup Length" textline " " hexmask.long.byte 0x00 8.--13. 1. " NCS_WR_SETUP ,NCS Setup Length in Write Access" hexmask.long.byte 0x00 0.--5. 1. " NWE_SETUP ,NWE Setup Length" line.long 0x04 "SMC_PULSE2,SMC Pulse Register 2" hexmask.long.byte 0x4 24.--30. 1. " NCS_RD_PULSE ,NCS Pulse Length in Read Access" hexmask.long.byte 0x4 16.--22. 1. " NRD_PULSE ,NRD Pulse Length" textline " " hexmask.long.byte 0x4 8.--14. 1. " NCS_WR_PULSE ,NCS Pulse Length in Write Access" hexmask.long.byte 0x4 0.--6. 1. " NWE_PULSE ,NWE Pulse Length" line.long 0x08 "SMC_CYCLE2,SMC Cycle Register 2" hexmask.long.word 0x8 16.--24. 1. " NRD_CYCLE ,Total Read Cycle Length" hexmask.long.word 0x8 0.--8. 1. " NWE_CYCLE ,Total Write Cycle Length" line.long 0x0C "SMC_MODE2,SMC Mode Register 2" bitfld.long 0x0C 28.--29. " PS ,Page Size" "4_BYTE,8_BYTE,16_BYTE,32_BYTE" bitfld.long 0x0C 24. " PMEN ,Page Mode Enabled" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled" bitfld.long 0x0C 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" textline " " bitfld.long 0x0C 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,,Frozen,Ready" textline " " bitfld.long 0x0C 1. " WRITE_MODE ,Write Mode" "NCS,NWE" bitfld.long 0x0C 0. " READ_MODE ,Read Mode" "NCS,NRD" else rgroup.long 0x20++0x0F line.long 0x00 "SMC_SETUP2,SMC Setup Register 2" hexmask.long.byte 0x00 24.--29. 1. " NCS_RD_SETUP ,NCS Setup Length in Read Access" hexmask.long.byte 0x00 16.--21. 1. " NRD_SETUP ,NRD Setup Length" textline " " hexmask.long.byte 0x00 8.--13. 1. " NCS_WR_SETUP ,NCS Setup Length in Write Access" hexmask.long.byte 0x00 0.--5. 1. " NWE_SETUP ,NWE Setup Length" line.long 0x04 "SMC_PULSE2,SMC Pulse Register 2" hexmask.long.byte 0x4 24.--30. 1. " NCS_RD_PULSE ,NCS Pulse Length in Read Access" hexmask.long.byte 0x4 16.--22. 1. " NRD_PULSE ,NRD Pulse Length" textline " " hexmask.long.byte 0x4 8.--14. 1. " NCS_WR_PULSE ,NCS Pulse Length in Write Access" hexmask.long.byte 0x4 0.--6. 1. " NWE_PULSE ,NWE Pulse Length" line.long 0x08 "SMC_CYCLE2,SMC Cycle Register 2" hexmask.long.word 0x8 16.--24. 1. " NRD_CYCLE ,Total Read Cycle Length" hexmask.long.word 0x8 0.--8. 1. " NWE_CYCLE ,Total Write Cycle Length" line.long 0x0C "SMC_MODE2,SMC Mode Register 2" bitfld.long 0x0C 28.--29. " PS ,Page Size" "4_BYTE,8_BYTE,16_BYTE,32_BYTE" bitfld.long 0x0C 24. " PMEN ,Page Mode Enabled" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled" bitfld.long 0x0C 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" textline " " bitfld.long 0x0C 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,,Frozen,Ready" textline " " bitfld.long 0x0C 1. " WRITE_MODE ,Write Mode" "NCS,NWE" bitfld.long 0x0C 0. " READ_MODE ,Read Mode" "NCS,NRD" endif tree.end tree "CS3" if ((d.l(ad:0x400E0000+0xE4)&0x01)==0x00) group.long 0x30++0x0F line.long 0x00 "SMC_SETUP3,SMC Setup Register 3" hexmask.long.byte 0x00 24.--29. 1. " NCS_RD_SETUP ,NCS Setup Length in Read Access" hexmask.long.byte 0x00 16.--21. 1. " NRD_SETUP ,NRD Setup Length" textline " " hexmask.long.byte 0x00 8.--13. 1. " NCS_WR_SETUP ,NCS Setup Length in Write Access" hexmask.long.byte 0x00 0.--5. 1. " NWE_SETUP ,NWE Setup Length" line.long 0x04 "SMC_PULSE3,SMC Pulse Register 3" hexmask.long.byte 0x4 24.--30. 1. " NCS_RD_PULSE ,NCS Pulse Length in Read Access" hexmask.long.byte 0x4 16.--22. 1. " NRD_PULSE ,NRD Pulse Length" textline " " hexmask.long.byte 0x4 8.--14. 1. " NCS_WR_PULSE ,NCS Pulse Length in Write Access" hexmask.long.byte 0x4 0.--6. 1. " NWE_PULSE ,NWE Pulse Length" line.long 0x08 "SMC_CYCLE3,SMC Cycle Register 3" hexmask.long.word 0x8 16.--24. 1. " NRD_CYCLE ,Total Read Cycle Length" hexmask.long.word 0x8 0.--8. 1. " NWE_CYCLE ,Total Write Cycle Length" line.long 0x0C "SMC_MODE3,SMC Mode Register 3" bitfld.long 0x0C 28.--29. " PS ,Page Size" "4_BYTE,8_BYTE,16_BYTE,32_BYTE" bitfld.long 0x0C 24. " PMEN ,Page Mode Enabled" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled" bitfld.long 0x0C 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" textline " " bitfld.long 0x0C 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,,Frozen,Ready" textline " " bitfld.long 0x0C 1. " WRITE_MODE ,Write Mode" "NCS,NWE" bitfld.long 0x0C 0. " READ_MODE ,Read Mode" "NCS,NRD" else rgroup.long 0x30++0x0F line.long 0x00 "SMC_SETUP3,SMC Setup Register 3" hexmask.long.byte 0x00 24.--29. 1. " NCS_RD_SETUP ,NCS Setup Length in Read Access" hexmask.long.byte 0x00 16.--21. 1. " NRD_SETUP ,NRD Setup Length" textline " " hexmask.long.byte 0x00 8.--13. 1. " NCS_WR_SETUP ,NCS Setup Length in Write Access" hexmask.long.byte 0x00 0.--5. 1. " NWE_SETUP ,NWE Setup Length" line.long 0x04 "SMC_PULSE3,SMC Pulse Register 3" hexmask.long.byte 0x4 24.--30. 1. " NCS_RD_PULSE ,NCS Pulse Length in Read Access" hexmask.long.byte 0x4 16.--22. 1. " NRD_PULSE ,NRD Pulse Length" textline " " hexmask.long.byte 0x4 8.--14. 1. " NCS_WR_PULSE ,NCS Pulse Length in Write Access" hexmask.long.byte 0x4 0.--6. 1. " NWE_PULSE ,NWE Pulse Length" line.long 0x08 "SMC_CYCLE3,SMC Cycle Register 3" hexmask.long.word 0x8 16.--24. 1. " NRD_CYCLE ,Total Read Cycle Length" hexmask.long.word 0x8 0.--8. 1. " NWE_CYCLE ,Total Write Cycle Length" line.long 0x0C "SMC_MODE3,SMC Mode Register 3" bitfld.long 0x0C 28.--29. " PS ,Page Size" "4_BYTE,8_BYTE,16_BYTE,32_BYTE" bitfld.long 0x0C 24. " PMEN ,Page Mode Enabled" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled" bitfld.long 0x0C 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" textline " " bitfld.long 0x0C 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,,Frozen,Ready" textline " " bitfld.long 0x0C 1. " WRITE_MODE ,Write Mode" "NCS,NWE" bitfld.long 0x0C 0. " READ_MODE ,Read Mode" "NCS,NRD" endif tree.end else tree "CS0" group.long 0x0++0x0F line.long 0x00 "SMC_SETUP0,SMC Setup Register 0" hexmask.long.byte 0x00 24.--29. 1. " NCS_RD_SETUP ,NCS Setup Length in Read Access" hexmask.long.byte 0x00 16.--21. 1. " NRD_SETUP ,NRD Setup Length" textline " " hexmask.long.byte 0x00 8.--13. 1. " NCS_WR_SETUP ,NCS Setup Length in Write Access" hexmask.long.byte 0x00 0.--5. 1. " NWE_SETUP ,NWE Setup Length" line.long 0x04 "SMC_PULSE0,SMC Pulse Register 0" hexmask.long.byte 0x4 24.--30. 1. " NCS_RD_PULSE ,NCS Pulse Length in Read Access" hexmask.long.byte 0x4 16.--22. 1. " NRD_PULSE ,NRD Pulse Length" textline " " hexmask.long.byte 0x4 8.--14. 1. " NCS_WR_PULSE ,NCS Pulse Length in Write Access" hexmask.long.byte 0x4 0.--6. 1. " NWE_PULSE ,NWE Pulse Length" line.long 0x08 "SMC_CYCLE0,SMC Cycle Register 0" hexmask.long.word 0x8 16.--24. 1. " NRD_CYCLE ,Total Read Cycle Length" hexmask.long.word 0x8 0.--8. 1. " NWE_CYCLE ,Total Write Cycle Length" line.long 0x0C "SMC_MODE0,SMC Mode Register 0" bitfld.long 0x0C 28.--29. " PS ,Page Size" "4_BYTE,8_BYTE,16_BYTE,32_BYTE" bitfld.long 0x0C 24. " PMEN ,Page Mode Enabled" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled" bitfld.long 0x0C 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" textline " " bitfld.long 0x0C 12.--13. " DBW ,Data Bus Width" "8_BIT,16_BIT,32_BIT,?..." bitfld.long 0x0C 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,,Frozen,Ready" textline " " bitfld.long 0x0C 1. " WRITE_MODE ,Write Mode" "NCS,NWE" bitfld.long 0x0C 0. " READ_MODE ,Read Mode" "NCS,NRD" tree.end tree "CS1" group.long 0x10++0x0F line.long 0x00 "SMC_SETUP1,SMC Setup Register 1" hexmask.long.byte 0x00 24.--29. 1. " NCS_RD_SETUP ,NCS Setup Length in Read Access" hexmask.long.byte 0x00 16.--21. 1. " NRD_SETUP ,NRD Setup Length" textline " " hexmask.long.byte 0x00 8.--13. 1. " NCS_WR_SETUP ,NCS Setup Length in Write Access" hexmask.long.byte 0x00 0.--5. 1. " NWE_SETUP ,NWE Setup Length" line.long 0x04 "SMC_PULSE1,SMC Pulse Register 1" hexmask.long.byte 0x4 24.--30. 1. " NCS_RD_PULSE ,NCS Pulse Length in Read Access" hexmask.long.byte 0x4 16.--22. 1. " NRD_PULSE ,NRD Pulse Length" textline " " hexmask.long.byte 0x4 8.--14. 1. " NCS_WR_PULSE ,NCS Pulse Length in Write Access" hexmask.long.byte 0x4 0.--6. 1. " NWE_PULSE ,NWE Pulse Length" line.long 0x08 "SMC_CYCLE1,SMC Cycle Register 1" hexmask.long.word 0x8 16.--24. 1. " NRD_CYCLE ,Total Read Cycle Length" hexmask.long.word 0x8 0.--8. 1. " NWE_CYCLE ,Total Write Cycle Length" line.long 0x0C "SMC_MODE1,SMC Mode Register 1" bitfld.long 0x0C 28.--29. " PS ,Page Size" "4_BYTE,8_BYTE,16_BYTE,32_BYTE" bitfld.long 0x0C 24. " PMEN ,Page Mode Enabled" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled" bitfld.long 0x0C 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" textline " " bitfld.long 0x0C 12.--13. " DBW ,Data Bus Width" "8_BIT,16_BIT,32_BIT,?..." bitfld.long 0x0C 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,,Frozen,Ready" textline " " bitfld.long 0x0C 1. " WRITE_MODE ,Write Mode" "NCS,NWE" bitfld.long 0x0C 0. " READ_MODE ,Read Mode" "NCS,NRD" tree.end tree "CS2" group.long 0x20++0x0F line.long 0x00 "SMC_SETUP2,SMC Setup Register 2" hexmask.long.byte 0x00 24.--29. 1. " NCS_RD_SETUP ,NCS Setup Length in Read Access" hexmask.long.byte 0x00 16.--21. 1. " NRD_SETUP ,NRD Setup Length" textline " " hexmask.long.byte 0x00 8.--13. 1. " NCS_WR_SETUP ,NCS Setup Length in Write Access" hexmask.long.byte 0x00 0.--5. 1. " NWE_SETUP ,NWE Setup Length" line.long 0x04 "SMC_PULSE2,SMC Pulse Register 2" hexmask.long.byte 0x4 24.--30. 1. " NCS_RD_PULSE ,NCS Pulse Length in Read Access" hexmask.long.byte 0x4 16.--22. 1. " NRD_PULSE ,NRD Pulse Length" textline " " hexmask.long.byte 0x4 8.--14. 1. " NCS_WR_PULSE ,NCS Pulse Length in Write Access" hexmask.long.byte 0x4 0.--6. 1. " NWE_PULSE ,NWE Pulse Length" line.long 0x08 "SMC_CYCLE2,SMC Cycle Register 2" hexmask.long.word 0x8 16.--24. 1. " NRD_CYCLE ,Total Read Cycle Length" hexmask.long.word 0x8 0.--8. 1. " NWE_CYCLE ,Total Write Cycle Length" line.long 0x0C "SMC_MODE2,SMC Mode Register 2" bitfld.long 0x0C 28.--29. " PS ,Page Size" "4_BYTE,8_BYTE,16_BYTE,32_BYTE" bitfld.long 0x0C 24. " PMEN ,Page Mode Enabled" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled" bitfld.long 0x0C 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" textline " " bitfld.long 0x0C 12.--13. " DBW ,Data Bus Width" "8_BIT,16_BIT,32_BIT,?..." bitfld.long 0x0C 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,,Frozen,Ready" textline " " bitfld.long 0x0C 1. " WRITE_MODE ,Write Mode" "NCS,NWE" bitfld.long 0x0C 0. " READ_MODE ,Read Mode" "NCS,NRD" tree.end tree "CS3" group.long 0x30++0x0F line.long 0x00 "SMC_SETUP3,SMC Setup Register 3" hexmask.long.byte 0x00 24.--29. 1. " NCS_RD_SETUP ,NCS Setup Length in Read Access" hexmask.long.byte 0x00 16.--21. 1. " NRD_SETUP ,NRD Setup Length" textline " " hexmask.long.byte 0x00 8.--13. 1. " NCS_WR_SETUP ,NCS Setup Length in Write Access" hexmask.long.byte 0x00 0.--5. 1. " NWE_SETUP ,NWE Setup Length" line.long 0x04 "SMC_PULSE3,SMC Pulse Register 3" hexmask.long.byte 0x4 24.--30. 1. " NCS_RD_PULSE ,NCS Pulse Length in Read Access" hexmask.long.byte 0x4 16.--22. 1. " NRD_PULSE ,NRD Pulse Length" textline " " hexmask.long.byte 0x4 8.--14. 1. " NCS_WR_PULSE ,NCS Pulse Length in Write Access" hexmask.long.byte 0x4 0.--6. 1. " NWE_PULSE ,NWE Pulse Length" line.long 0x08 "SMC_CYCLE3,SMC Cycle Register 3" hexmask.long.word 0x8 16.--24. 1. " NRD_CYCLE ,Total Read Cycle Length" hexmask.long.word 0x8 0.--8. 1. " NWE_CYCLE ,Total Write Cycle Length" line.long 0x0C "SMC_MODE3,SMC Mode Register 3" bitfld.long 0x0C 28.--29. " PS ,Page Size" "4_BYTE,8_BYTE,16_BYTE,32_BYTE" bitfld.long 0x0C 24. " PMEN ,Page Mode Enabled" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " TDF_MODE ,TDF Optimization" "Disabled,Enabled" bitfld.long 0x0C 16.--19. " TDF_CYCLES ,Data Float Time" "No cycle,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" textline " " bitfld.long 0x0C 12.--13. " DBW ,Data Bus Width" "8_BIT,16_BIT,32_BIT,?..." bitfld.long 0x0C 4.--5. " EXNW_MODE ,NWAIT Mode" "Disabled,,Frozen,Ready" textline " " bitfld.long 0x0C 1. " WRITE_MODE ,Write Mode" "NCS,NWE" bitfld.long 0x0C 0. " READ_MODE ,Read Mode" "NCS,NRD" tree.end endif textline " " group.long 0x80++0x03 line.long 0x00 "SMC_OCMS,SMC OCMS Register" bitfld.long 0x00 19. " CS3SE ,Chip Select 3 Scrambling Enable" "Disabled,Enabled" bitfld.long 0x00 18. " CS2SE ,Chip Select 2 Scrambling Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " CS1SE ,Chip Select 1 Scrambling Enable" "Disabled,Enabled" bitfld.long 0x00 16. " CS0SE ,Chip Select 0 Scrambling Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SMSE ,Static Memory Controller Scrambling Enable" "Disabled,Enabled" wgroup.long 0x84++0x07 line.long 0x00 "SMC_KEY1,SMC OCMS Key1 Register" line.long 0x04 "SMC_KEY2,SMC OCMS Key2 Register" group.long 0xE4++0x03 line.long 0x00 "SMC_WPMR,SMC Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WP_KEY ,Write Protection KEY password" bitfld.long 0x00 0. " WP_PEN ,Write Protection Enable" "Disabled,Enabled" hgroup.long 0xE8++0x03 hide.long 0x00 "SMC_WPSR,SMC Write Protection Status" in width 0x0B tree.end tree "PMC (Power Management Controller)" base ad:0x400E0400 width 12. if ((d.l(ad:0x400E0400+0xE4)&0x01)==0x00) group.long 0x08++0x03 line.long 0x00 "PMC_SCSR,PMC System Clock Status Register" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " PCK2_set/clr ,Programmable Clock 2 Output Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " PCK1_set/clr ,Programmable Clock 1 Output Status" "Disabled,Enabled" setclrfld.long 0x00 8. -0x08 8. -0x04 8. " PCK0_set/clr ,Programmable Clock 0 Output Status" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " UDP_set/clr ,USB Device Port Clock" "Disabled,Enabled" group.long 0x18++0x03 line.long 0x00 "PMC_PCSR,PMC Peripheral Clock Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " PWM_set/clr ,Pulse Width Modulation (Peripheral ID 31) Clock Status" "Disabled,Enabled" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " DACC_set/clr ,Digital To Analog Converter (Peripheral ID 30) Clock Status" "Disabled,Enabled" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " ADC_set/clr ,Analog Digital Converter(Peripheral ID 29)Clock Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. -0x08 28. -0x04 28. " TC5_set/clr ,Timer Counter 5 Controller (Peripheral ID 28) Clock Status" "Disabled,Enabled" setclrfld.long 0x00 27. -0x08 27. -0x04 27. " TC4_set/clr ,Timer Counter 4 Controller (Peripheral ID 27) Clock Status" "Disabled,Enabled" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " TC3_set/clr ,Timer Counter 3 Controller (Peripheral ID 26) Clock Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. -0x08 25. -0x04 25. " TC2_set/clr ,Timer Counter 2 (Peripheral ID 25) Clock Status" "Disabled,Enabled" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " TC1_set/clr ,Timer Counter 1 (Peripheral ID 24) Clock Status" "Disabled,Enabled" setclrfld.long 0x00 23. -0x08 23. -0x04 23. " TC0_set/clr ,Timer Counter 0 (Peripheral ID 23) Clock Status" "Disabled,Enabled" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " SSC_set/clr ,Synchronous Serial Controller (Peripheral ID 22) Clock Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. -0x08 21. -0x04 21. " SPI_set/clr ,Serial Peripheral Interface (Peripheral ID 21) Clock Status" "Disabled,Enabled" setclrfld.long 0x00 20. -0x08 20. -0x04 20. " TWI1_set/clr ,Two-Wire Interface 1 (Peripheral ID 20) Clock Status" "Disabled,Enabled" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " TWI0_set/clr ,Two-Wire Interface 0 (Peripheral ID 19) Clock Status" "Disabled,Enabled" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " HSMCI_set/clr ,High Speed Multimedia Card Interface (Peripheral ID 18) Clock Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. -0x08 15. -0x04 15. " USART1_set/clr ,USART 1 (Peripheral ID 15) Clock Status" "Disabled,Enabled" setclrfld.long 0x00 14. -0x08 14. -0x04 14. " USART0_set/clr ,USART 0 (Peripheral ID 14) Clock Status" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " PIOC_set/clr ,Parallel I/O Controller C (Peripheral ID 13) Clock Status" "Disabled,Enabled" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " PIOB_set/clr ,Parallel I/O Controller B (Peripheral ID 12) Clock Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. -0x08 11. -0x04 11. " PIOA_set/clr ,Parallel I/O Controller A (Peripheral ID 11) Clock Status" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " SMC_set/clr ,Static Memory Controller (Peripheral ID 10) Clock Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " UART1_set/clr ,Universal Asynchronous Receiver Transmitter (Peripheral ID 9) Clock Status" "Disabled,Enabled" setclrfld.long 0x00 8. -0x08 8. -0x04 8. " UART0_set/clr ,Universal Asynchronous Receiver Transmitter (Peripheral ID 8) Clock Status" "Disabled,Enabled" group.long 0x20++0x03 line.long 0x000 "CKGR_MOR,PMC Clock Generator Main Oscillator Register" bitfld.long 0x00 25. " CFDEN ,Clock Failure Detector Enable" "Disabled,Enabled" bitfld.long 0x00 24. " MOSCSEL ,Main Oscillator Selection" "On-Chip RC,Crystal" hexmask.long.byte 0x00 16.--23. 1. " KEY ,Password" textline " " hexmask.long.byte 0x00 8.--15. 1. " MOSCXTST ,Main Crystal Oscillator Start-up Time" bitfld.long 0x00 4.--6. " MOSCRCF ,Main On-Chip RC Oscillator Frequency Selection" "4_MHz,8_MHz,12_MHz,?..." bitfld.long 0x00 3. " MOSCRCEN ,Main On-Chip RC Oscillator Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " WAITMODE ,Wait Mode Command" "No effect,Wait" bitfld.long 0x00 1. " MOSCXTBY ,Main Crystal Oscillator Bypass" "No effect,Bypassed" bitfld.long 0x00 0. " MOSCXTEN ,Main Crystal Oscillator Enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "CKGR_MCFR,PMC Clock Generator Main Clock Frequency Register" bitfld.long 0x00 20. " RCMEAS ,RC Oscillator Frequency Measure" "No effect,Restart" bitfld.long 0x00 16. " MAINRDY ,Main Clock Ready" "Not ready,Ready" hexmask.long.word 0x00 0.--15. 1. " MAINF ,Main Clock Frequency" group.long 0x28++0x3 line.long 0x00 "CKGR_PLLAR,PMC Clock Generator PLL A Register" bitfld.long 0x00 29. " ONE ,Must Be Set to 1" "0,1" hexmask.long.word 0x00 16.--26. 1. " MULA ,PLL A Multiplier" hexmask.long.byte 0x00 8.--13. 1. " PLLACOUNT ,PLL A Counter" hexmask.long.byte 0x00 0.--7. 1. " DIVA ,Divider A" group.long 0x2C++0x03 line.long 0x00 "CKGR_PLLBR,PMC Clock Generator PLL B Register" hexmask.long.word 0x00 16.--26. 1. " MULB ,PLL B Multiplier" hexmask.long.byte 0x00 8.--13. 1. " PLLBCOUNT ,PLL B Counter" hexmask.long.byte 0x00 0.--7. 1. " DIVB ,Divider B" group.long 0x30++0x03 line.long 0x0 "PMC_MCKR,PMC Master Clock Register" bitfld.long 0x00 13. " PLLBDIV2 ,PLLB Divisor by 2" "Clock,Clock/2" bitfld.long 0x00 12. " PLLADIV2 ,PLLA Divisor by 2" "Clock,Clock/2" bitfld.long 0x00 4.--6. " PRES ,Processor Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,Clock/3" bitfld.long 0x00 0.--1. " CSS ,Master Clock Source Selection" "Slow,Main,PLL A,PLL B" group.long 0x38++0x03 line.long 0x00 "PMC_USB,PMC USB Clock Register" bitfld.long 0x00 8.--11. " USBDIV ,Divider for USB Clock" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16" bitfld.long 0x00 0. " USBS ,USB Input Clock Selection" "PLLA,PLLB" group.long 0x40++0x03 line.long 0x00 "PMC_PCK0,PMC Programmable Clock 0 Register" bitfld.long 0x00 4.--6. " PRES ,Programmable Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..." bitfld.long 0x00 0.--2. " CSS ,Master Clock Selection" "Slow,Main,PLLA,PLLB,Master,?..." group.long 0x44++0x03 line.long 0x00 "PMC_PCK1,PMC Programmable Clock 1 Register" bitfld.long 0x00 4.--6. " PRES ,Programmable Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..." bitfld.long 0x00 0.--2. " CSS ,Master Clock Selection" "Slow,Main,PLLA,PLLB,Master,?..." group.long 0x48++0x03 line.long 0x00 "PMC_PCK2,PMC Programmable Clock 2 Register" bitfld.long 0x00 4.--6. " PRES ,Programmable Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..." bitfld.long 0x00 0.--2. " CSS ,Master Clock Selection" "Slow,Main,PLLA,PLLB,Master,?..." group.long 0x6C++0x03 line.long 0x00 "PMC_IMR,Interrupt Enable\Mask Register" setclrfld.long 0x00 18. -0x0C 18. -0x08 18. " CFDEV_set/clr ,Clock Failure Detector Event" "Disabled,Enabled" setclrfld.long 0x00 17. -0x0C 17. -0x08 17. " MOSCRCS_set/clr ,Main On-Chip RC Oscillator Mask" "Disabled,Enabled" setclrfld.long 0x00 16. -0x0C 16. -0x08 16. " MOSCSELS_set/clr ,Main Oscillator Selection Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x0C 10. -0x08 10. " PCKRDY2_set/clr ,Programmable Clock Ready 2 Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. -0x0C 9. -0x08 9. " PCKRDY1_set/clr ,Programmable Clock Ready 1 Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 8. -0x0C 8. -0x08 8. " PCKRDY0_set/clr ,Programmable Clock Ready 0 Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x0C 3. -0x08 3. " MCKRDY_set/clr ,Master Clock Ready Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x0C 2. -0x08 2. " LOCKB_set/clr ,PLL B Lock Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x0C 1. -0x08 1. " LOCKA_set/clr ,PLL A Lock Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 0. -0x0C 0. -0x08 0. " MOSCXTS_set/clr ,Main Oscillator Status Interrupt Mask" "Disabled,Enabled" hgroup.long 0x68++0x3 hide.long 0x00 "PMC_SR,PMC Status Register" in group.long 0x70++0x3 line.long 0x00 "PMC_FSMR,PMC Fast Startup Mode Register" bitfld.long 0x00 21.--22. " FLPM ,Flash Low Power Mode" "FLASH_STANDBY,FLASH_DEEP_POWERDOWN,FLASH_IDLE,?..." bitfld.long 0x00 20. " LPM ,Low Power Mode" "Idle,Wait" bitfld.long 0x00 18. " USBAL ,USB Alarm Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " RTCAL ,RTC Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 16. " RTTAL ,RTT Alarm Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " FSTT15 ,Fast Startup Input Enable 15" "Disabled,Enabled" bitfld.long 0x00 14. " FSTT14 ,Fast Startup Input Enable 14" "Disabled,Enabled" bitfld.long 0x00 13. " FSTT13 ,Fast Startup Input Enable 13" "Disabled,Enabled" bitfld.long 0x00 12. " FSTT12 ,Fast Startup Input Enable 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " FSTT11 ,Fast Startup Input Enable 11" "Disabled,Enabled" bitfld.long 0x00 10. " FSTT10 ,Fast Startup Input Enable 10" "Disabled,Enabled" bitfld.long 0x00 9. " FSTT9 ,Fast Startup Input Enable 9" "Disabled,Enabled" bitfld.long 0x00 8. " FSTT8 ,Fast Startup Input Enable 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " FSTT7 ,Fast Startup Input Enable 7" "Disabled,Enabled" bitfld.long 0x00 6. " FSTT6 ,Fast Startup Input Enable 6" "Disabled,Enabled" bitfld.long 0x00 5. " FSTT5 ,Fast Startup Input Enable 5" "Disabled,Enabled" bitfld.long 0x00 4. " FSTT4 ,Fast Startup Input Enable 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " FSTT3 ,Fast Startup Input Enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " FSTT2 ,Fast Startup Input Enable 2" "Disabled,Enabled" bitfld.long 0x00 1. " FSTT1 ,Fast Startup Input Enable 1" "Disabled,Enabled" bitfld.long 0x00 0. " FSTT0 ,Fast Startup Input Enable 0" "Disabled,Enabled" group.long 0x74++0x03 line.long 0x00 "PMC_FSPR,PMC Fast Startup Polarity Register" bitfld.long 0x00 15. " FSTP15 ,Fast Startup Input Polarity 15" "Low,High" bitfld.long 0x00 14. " FSTP14 ,Fast Startup Input Polarity 14" "Low,High" bitfld.long 0x00 13. " FSTP13 ,Fast Startup Input Polarity 13" "Low,High" bitfld.long 0x00 12. " FSTP12 ,Fast Startup Input Polarity 12" "Low,High" textline " " bitfld.long 0x00 11. " FSTP11 ,Fast Startup Input Polarity 11" "Low,High" bitfld.long 0x00 10. " FSTP10 ,Fast Startup Input Polarity 10" "Low,High" bitfld.long 0x00 9. " FSTP9 ,Fast Startup Input Polarity 9" "Low,High" bitfld.long 0x00 8. " FSTP8 ,Fast Startup Input Polarity 8" "Low,High" textline " " bitfld.long 0x00 7. " FSTP7 ,Fast Startup Input Polarity 7" "Low,High" bitfld.long 0x00 6. " FSTP6 ,Fast Startup Input Polarity 6" "Low,High" bitfld.long 0x00 5. " FSTP5 ,Fast Startup Input Polarity 5" "Low,High" bitfld.long 0x00 4. " FSTP4 ,Fast Startup Input Polarity 4" "Low,High" textline " " bitfld.long 0x00 3. " FSTP3 ,Fast Startup Input Polarity 3" "Low,High" bitfld.long 0x00 2. " FSTP2 ,Fast Startup Input Polarity 2" "Low,High" bitfld.long 0x00 1. " FSTP1 ,Fast Startup Input Polarity 1" "Low,High" bitfld.long 0x00 0. " FSTP0 ,Fast Startup Input Polarity 0" "Low,High" wgroup.long 0x78++0x03 line.long 0x00 "PMC_FOCR,PMC Fault Output Clear Register" bitfld.long 0x00 0. " FOCLR ,Fault Output Clear" "No effect,Clear" group.long 0xE4++0x03 line.long 0x00 "PMC_WPMR,PMC Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WP_KEY ,Write Protection KEY password" bitfld.long 0x00 0. " WP_PEN ,Write Protection Enable" "Disabled,Enabled" hgroup.long 0xE8++0x03 hide.long 0x00 "PMC_WPSR,Write Protect Status Register" in group.long 0x108++0x03 line.long 0x00 "PMC_PCSR1,PMC Peripheral Clock Status Register 1" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " UDP_set/clr ,USB Device Port (Peripheral ID 34)" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " ACC_set/clr ,Analog Comparator (Peripheral ID 33)" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CRCCU_set/clr ,CRC Calculation Unit (Peripheral ID 32)" "Disabled,Enabled" group.long 0x110++0x03 line.long 0x00 "PMC_OCR,PMC Oscillator Calibration Register" bitfld.long 0x00 23. " SEL12 ,Selection of RC Oscillator Calibration bits for 12 Mhz" "Flash memory,Written in CAL12" hexmask.long.byte 0x00 16.--22. 1. " CAL12 ,RC Oscillator Calibration bits for 12 Mhz" textline " " bitfld.long 0x00 15. " SEL8 ,Selection of RC Oscillator Calibration bits for 8 Mhz" "Flash memory,Written in CAL8" hexmask.long.byte 0x00 8.--14. 1. " CAL8 ,RC Oscillator Calibration bits for 8 Mhz" textline " " bitfld.long 0x00 7. " SEL4 ,Selection of RC Oscillator Calibration bits for 4 Mhz" "Flash memory,Written in CAL4" hexmask.long.byte 0x00 0.--6. 1. " CAL4 ,RC Oscillator Calibration bits for 4 Mhz" else rgroup.long 0x08++0x03 line.long 0x00 "PMC_SCSR,PMC System Clock Status Register" bitfld.long 0x00 10. " PCK2_set/clr ,Programmable Clock 2 Output Status" "Disabled,Enabled" bitfld.long 0x00 9. " PCK1_set/clr ,Programmable Clock 1 Output Status" "Disabled,Enabled" bitfld.long 0x00 8. " PCK0_set/clr ,Programmable Clock 0 Output Status" "Disabled,Enabled" bitfld.long 0x00 7. " UDP_set/clr ,USB Device Port Clock" "Disabled,Enabled" rgroup.long 0x18++0x03 line.long 0x00 "PMC_PCSR,PMC Peripheral Clock Status Register" bitfld.long 0x00 31. " PWM_set/clr ,Pulse Width Modulation (Peripheral ID 31) Clock Status" "Disabled,Enabled" bitfld.long 0x00 30. " DACC_set/clr ,Digital To Analog Converter (Peripheral ID 30) Clock Status" "Disabled,Enabled" bitfld.long 0x00 29. " ADC_set/clr ,Analog Digital Converter(Peripheral ID 29)Clock Status" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TC5_set/clr ,Timer Counter 5 Controller (Peripheral ID 28) Clock Status" "Disabled,Enabled" bitfld.long 0x00 27. " TC4_set/clr ,Timer Counter 4 Controller (Peripheral ID 27) Clock Status" "Disabled,Enabled" bitfld.long 0x00 26. " TC3_set/clr ,Timer Counter 3 Controller (Peripheral ID 26) Clock Status" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " TC2_set/clr ,Timer Counter 2 (Peripheral ID 25) Clock Status" "Disabled,Enabled" bitfld.long 0x00 24. " TC1_set/clr ,Timer Counter 1 (Peripheral ID 24) Clock Status" "Disabled,Enabled" bitfld.long 0x00 23. " TC0_set/clr ,Timer Counter 0 (Peripheral ID 23) Clock Status" "Disabled,Enabled" bitfld.long 0x00 22. " SSC_set/clr ,Synchronous Serial Controller (Peripheral ID 22) Clock Status" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " SPI_set/clr ,Serial Peripheral Interface (Peripheral ID 21) Clock Status" "Disabled,Enabled" bitfld.long 0x00 20. " TWI1_set/clr ,Two-Wire Interface 1 (Peripheral ID 20) Clock Status" "Disabled,Enabled" bitfld.long 0x00 19. " TWI0_set/clr ,Two-Wire Interface 0 (Peripheral ID 19) Clock Status" "Disabled,Enabled" bitfld.long 0x00 18. " HSMCI_set/clr ,High Speed Multimedia Card Interface (Peripheral ID 18) Clock Status" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " USART1_set/clr ,USART 1 (Peripheral ID 15) Clock Status" "Disabled,Enabled" bitfld.long 0x00 14. " USART0_set/clr ,USART 0 (Peripheral ID 14) Clock Status" "Disabled,Enabled" bitfld.long 0x00 13. " PIOC_set/clr ,Parallel I/O Controller C (Peripheral ID 13) Clock Status" "Disabled,Enabled" bitfld.long 0x00 12. " PIOB_set/clr ,Parallel I/O Controller B (Peripheral ID 12) Clock Status" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " PIOA_set/clr ,Parallel I/O Controller A (Peripheral ID 11) Clock Status" "Disabled,Enabled" bitfld.long 0x00 10. " SMC_set/clr ,Static Memory Controller (Peripheral ID 10) Clock Status" "Disabled,Enabled" bitfld.long 0x00 9. " UART1_set/clr ,Universal Asynchronous Receiver Transmitter (Peripheral ID 9) Clock Status" "Disabled,Enabled" bitfld.long 0x00 8. " UART0_set/clr ,Universal Asynchronous Receiver Transmitter (Peripheral ID 8) Clock Status" "Disabled,Enabled" rgroup.long 0x20++0x03 line.long 0x000 "CKGR_MOR,PMC Clock Generator Main Oscillator Register" bitfld.long 0x00 25. " CFDEN ,Clock Failure Detector Enable" "Disabled,Enabled" bitfld.long 0x00 24. " MOSCSEL ,Main Oscillator Selection" "On-Chip RC,Crystal" hexmask.long.byte 0x00 16.--23. 1. " KEY ,Password" textline " " hexmask.long.byte 0x00 8.--15. 1. " MOSCXTST ,Main Crystal Oscillator Start-up Time" bitfld.long 0x00 4.--6. " MOSCRCF ,Main On-Chip RC Oscillator Frequency Selection" "4_MHz,8_MHz,12_MHz,?..." bitfld.long 0x00 3. " MOSCRCEN ,Main On-Chip RC Oscillator Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " WAITMODE ,Wait Mode Command" "No effect,Wait" bitfld.long 0x00 1. " MOSCXTBY ,Main Crystal Oscillator Bypass" "No effect,Bypassed" bitfld.long 0x00 0. " MOSCXTEN ,Main Crystal Oscillator Enable" "Disabled,Enabled" rgroup.long 0x24++0x03 line.long 0x00 "CKGR_MCFR,PMC Clock Generator Main Clock Frequency Register" bitfld.long 0x00 20. " RCMEAS ,RC Oscillator Frequency Measure" "No effect,Restart" bitfld.long 0x00 16. " MAINRDY ,Main Clock Ready" "Not ready,Ready" hexmask.long.word 0x00 0.--15. 1. " MAINF ,Main Clock Frequency" rgroup.long 0x28++0x3 line.long 0x00 "CKGR_PLLAR,PMC Clock Generator PLL A Register" bitfld.long 0x00 29. " ONE ,Must Be Set to 1" "0,1" hexmask.long.word 0x00 16.--26. 1. " MULA ,PLL A Multiplier" hexmask.long.byte 0x00 8.--13. 1. " PLLACOUNT ,PLL A Counter" hexmask.long.byte 0x00 0.--7. 1. " DIVA ,Divider A" rgroup.long 0x2C++0x03 line.long 0x00 "CKGR_PLLBR,PMC Clock Generator PLL B Register" hexmask.long.word 0x00 16.--26. 1. " MULB ,PLL B Multiplier" hexmask.long.byte 0x00 8.--13. 1. " PLLBCOUNT ,PLL B Counter" hexmask.long.byte 0x00 0.--7. 1. " DIVB ,Divider B" rgroup.long 0x30++0x03 line.long 0x0 "PMC_MCKR,PMC Master Clock Register" bitfld.long 0x00 13. " PLLBDIV2 ,PLLB Divisor by 2" "Clock,Clock/2" bitfld.long 0x00 12. " PLLADIV2 ,PLLA Divisor by 2" "Clock,Clock/2" bitfld.long 0x00 4.--6. " PRES ,Processor Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,Clock/3" bitfld.long 0x00 0.--1. " CSS ,Master Clock Source Selection" "Slow,Main,PLL A,PLL B" rgroup.long 0x38++0x03 line.long 0x00 "PMC_USB,PMC USB Clock Register" bitfld.long 0x00 8.--11. " USBDIV ,Divider for USB Clock" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16" bitfld.long 0x00 0. " USBS ,USB Input Clock Selection" "PLLA,PLLB" rgroup.long 0x40++0x03 line.long 0x00 "PMC_PCK0,PMC Programmable Clock 0 Register" bitfld.long 0x00 4.--6. " PRES ,Programmable Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..." bitfld.long 0x00 0.--2. " CSS ,Master Clock Selection" "Slow,Main,PLLA,PLLB,Master,?..." rgroup.long 0x44++0x03 line.long 0x00 "PMC_PCK1,PMC Programmable Clock 1 Register" bitfld.long 0x00 4.--6. " PRES ,Programmable Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..." bitfld.long 0x00 0.--2. " CSS ,Master Clock Selection" "Slow,Main,PLLA,PLLB,Master,?..." rgroup.long 0x48++0x03 line.long 0x00 "PMC_PCK2,PMC Programmable Clock 2 Register" bitfld.long 0x00 4.--6. " PRES ,Programmable Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..." bitfld.long 0x00 0.--2. " CSS ,Master Clock Selection" "Slow,Main,PLLA,PLLB,Master,?..." group.long 0x6C++0x03 line.long 0x00 "PMC_IMR,Interrupt Enable\Mask Register" setclrfld.long 0x00 18. -0x0C 18. -0x08 18. " CFDEV_set/clr ,Clock Failure Detector Event" "Disabled,Enabled" setclrfld.long 0x00 17. -0x0C 17. -0x08 17. " MOSCRCS_set/clr ,Main On-Chip RC Oscillator Mask" "Disabled,Enabled" setclrfld.long 0x00 16. -0x0C 16. -0x08 16. " MOSCSELS_set/clr ,Main Oscillator Selection Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x0C 10. -0x08 10. " PCKRDY2_set/clr ,Programmable Clock Ready 2 Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. -0x0C 9. -0x08 9. " PCKRDY1_set/clr ,Programmable Clock Ready 1 Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 8. -0x0C 8. -0x08 8. " PCKRDY0_set/clr ,Programmable Clock Ready 0 Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x0C 3. -0x08 3. " MCKRDY_set/clr ,Master Clock Ready Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x0C 2. -0x08 2. " LOCKB_set/clr ,PLL B Lock Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x0C 1. -0x08 1. " LOCKA_set/clr ,PLL A Lock Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 0. -0x0C 0. -0x08 0. " MOSCXTS_set/clr ,Main Oscillator Status Interrupt Mask" "Disabled,Enabled" hgroup.long 0x68++0x3 hide.long 0x00 "PMC_SR,PMC Status Register" in rgroup.long 0x70++0x3 line.long 0x00 "PMC_FSMR,PMC Fast Startup Mode Register" bitfld.long 0x00 21.--22. " FLPM ,Flash Low Power Mode" "FLASH_STANDBY,FLASH_DEEP_POWERDOWN,FLASH_IDLE,?..." bitfld.long 0x00 20. " LPM ,Low Power Mode" "Idle,Wait" bitfld.long 0x00 18. " USBAL ,USB Alarm Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " RTCAL ,RTC Alarm Enable" "Disabled,Enabled" bitfld.long 0x00 16. " RTTAL ,RTT Alarm Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " FSTT15 ,Fast Startup Input Enable 15" "Disabled,Enabled" bitfld.long 0x00 14. " FSTT14 ,Fast Startup Input Enable 14" "Disabled,Enabled" bitfld.long 0x00 13. " FSTT13 ,Fast Startup Input Enable 13" "Disabled,Enabled" bitfld.long 0x00 12. " FSTT12 ,Fast Startup Input Enable 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " FSTT11 ,Fast Startup Input Enable 11" "Disabled,Enabled" bitfld.long 0x00 10. " FSTT10 ,Fast Startup Input Enable 10" "Disabled,Enabled" bitfld.long 0x00 9. " FSTT9 ,Fast Startup Input Enable 9" "Disabled,Enabled" bitfld.long 0x00 8. " FSTT8 ,Fast Startup Input Enable 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " FSTT7 ,Fast Startup Input Enable 7" "Disabled,Enabled" bitfld.long 0x00 6. " FSTT6 ,Fast Startup Input Enable 6" "Disabled,Enabled" bitfld.long 0x00 5. " FSTT5 ,Fast Startup Input Enable 5" "Disabled,Enabled" bitfld.long 0x00 4. " FSTT4 ,Fast Startup Input Enable 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " FSTT3 ,Fast Startup Input Enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " FSTT2 ,Fast Startup Input Enable 2" "Disabled,Enabled" bitfld.long 0x00 1. " FSTT1 ,Fast Startup Input Enable 1" "Disabled,Enabled" bitfld.long 0x00 0. " FSTT0 ,Fast Startup Input Enable 0" "Disabled,Enabled" rgroup.long 0x74++0x03 line.long 0x00 "PMC_FSPR,PMC Fast Startup Polarity Register" bitfld.long 0x00 15. " FSTP15 ,Fast Startup Input Polarity 15" "Low,High" bitfld.long 0x00 14. " FSTP14 ,Fast Startup Input Polarity 14" "Low,High" bitfld.long 0x00 13. " FSTP13 ,Fast Startup Input Polarity 13" "Low,High" bitfld.long 0x00 12. " FSTP12 ,Fast Startup Input Polarity 12" "Low,High" textline " " bitfld.long 0x00 11. " FSTP11 ,Fast Startup Input Polarity 11" "Low,High" bitfld.long 0x00 10. " FSTP10 ,Fast Startup Input Polarity 10" "Low,High" bitfld.long 0x00 9. " FSTP9 ,Fast Startup Input Polarity 9" "Low,High" bitfld.long 0x00 8. " FSTP8 ,Fast Startup Input Polarity 8" "Low,High" textline " " bitfld.long 0x00 7. " FSTP7 ,Fast Startup Input Polarity 7" "Low,High" bitfld.long 0x00 6. " FSTP6 ,Fast Startup Input Polarity 6" "Low,High" bitfld.long 0x00 5. " FSTP5 ,Fast Startup Input Polarity 5" "Low,High" bitfld.long 0x00 4. " FSTP4 ,Fast Startup Input Polarity 4" "Low,High" textline " " bitfld.long 0x00 3. " FSTP3 ,Fast Startup Input Polarity 3" "Low,High" bitfld.long 0x00 2. " FSTP2 ,Fast Startup Input Polarity 2" "Low,High" bitfld.long 0x00 1. " FSTP1 ,Fast Startup Input Polarity 1" "Low,High" bitfld.long 0x00 0. " FSTP0 ,Fast Startup Input Polarity 0" "Low,High" wgroup.long 0x78++0x03 line.long 0x00 "PMC_FOCR,PMC Fault Output Clear Register" bitfld.long 0x00 0. " FOCLR ,Fault Output Clear" "No effect,Clear" group.long 0xE4++0x03 line.long 0x00 "PMC_WPMR,PMC Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WP_KEY ,Write Protection KEY password" bitfld.long 0x00 0. " WP_PEN ,Write Protection Enable" "Disabled,Enabled" hgroup.long 0xE8++0x03 hide.long 0x00 "PMC_WPSR,Write Protect Status Register" in rgroup.long 0x108++0x03 line.long 0x00 "PMC_PCSR1,PMC Peripheral Clock Status Register 1" bitfld.long 0x00 2. " UDP_set/clr ,USB Device Port (Peripheral ID 34)" "Disabled,Enabled" bitfld.long 0x00 1. " ACC_set/clr ,Analog Comparator (Peripheral ID 33)" "Disabled,Enabled" bitfld.long 0x00 0. " CRCCU_set/clr ,CRC Calculation Unit (Peripheral ID 32)" "Disabled,Enabled" rgroup.long 0x110++0x03 line.long 0x00 "PMC_OCR,PMC Oscillator Calibration Register" bitfld.long 0x00 23. " SEL12 ,Selection of RC Oscillator Calibration bits for 12 Mhz" "Flash memory,Written in CAL12" hexmask.long.byte 0x00 16.--22. 1. " CAL12 ,RC Oscillator Calibration bits for 12 Mhz" textline " " bitfld.long 0x00 15. " SEL8 ,Selection of RC Oscillator Calibration bits for 8 Mhz" "Flash memory,Written in CAL8" hexmask.long.byte 0x00 8.--14. 1. " CAL8 ,RC Oscillator Calibration bits for 8 Mhz" textline " " bitfld.long 0x00 7. " SEL4 ,Selection of RC Oscillator Calibration bits for 4 Mhz" "Flash memory,Written in CAL4" hexmask.long.byte 0x00 0.--6. 1. " CAL4 ,RC Oscillator Calibration bits for 4 Mhz" endif width 0x0B tree.end tree "CHIPID (Chip Identifier)" base ad:0x400E0740 width 13. rgroup.long 0x00++0x07 line.long 0x00 "CHIPID_CIDR,Chip ID Register" bitfld.long 0x00 31. " EXT ,Extension flag" "Not implemented,Implemented" bitfld.long 0x00 28.--30. " NVPTYP ,Nonvolatile program memory type" "ROM,Romless/flash,Embedded flash,ROM & embedded flash,SRAM emulating ROM,?..." textline " " hexmask.long.byte 0x00 20.--27. 1. " ARCH ,Architecture identifier" sif (cpuis("ATSAM4LC*")||cpuis("ATSAM4LS*")) bitfld.long 0x00 16.--19. " SRAMSIZ ,Internal SRAM size" "48-KB,1-KB,2-KB,6-KB,24-KB,4-KB,80-KB,160-KB,8-KB,16-KB,32-KB,64-KB,128-KB,256-KB,96-KB,512-KB" elif ((cpuis("ATSAM4S*"))||(cpuis("ATSAMV7*"))||(cpuis("ATSAME70*"))) bitfld.long 0x00 16.--19. " SRAMSIZ ,Internal SRAM size" "48-KB,192-KB,384-KB,6-KB,24-KB,4-KB,80-KB,160-KB,8-KB,16-KB,32-KB,64-KB,128-KB,256-KB,96-KB,512-KB" else bitfld.long 0x00 16.--19. " SRAMSIZ ,Internal SRAM size" "48-KB,1-KB,2-KB,6-KB,112-KB,4-KB,80-KB,160-KB,8-KB,16-KB,32-KB,64-KB,128-KB,256-KB,96-KB,512-KB" endif textline " " bitfld.long 0x00 12.--15. " NVPSIZ2 ,Second nonvolatile program memory size" "Disabled,8-KB,16-KB,32-KB,,64-KB,,128-KB,,256-KB,512-KB,,1-MB,,2-MB,?..." sif ((cpuis("ATSAM4S*"))||(cpuis("ATSAMV7*"))||(cpuis("ATSAME70*"))) bitfld.long 0x00 8.--11. " NVPSIZ ,Nonvolatile program memory size" "Disabled,8-KB,16-KB,32-KB,,64-KB,,128-KB,160-KB,256-KB,512-KB,,1-MB,,2-MB,?..." else bitfld.long 0x00 8.--11. " NVPSIZ ,Nonvolatile program memory size" "Disabled,8-KB,16-KB,32-KB,,64-KB,,128-KB,,256-KB,512-KB,,1-MB,,2-MB,?..." endif textline " " sif (cpuis("AT91SAM3S16C")||cpuis("AT91SAM3S8B")||cpuis("AT91SAM3S8C")||cpuis("AT91SAM3SD8B")||cpuis("AT91SAM3SD8C")) bitfld.long 0x00 5.--7. " EPROC ,Embedded processor" "ARM946ES,ARM7TDMI,Cortex-m3,ARM920T,ARM926EJS,Cortex-a5,Cortex-a5,?..." hexmask.long.byte 0x00 0.--4. 1. " VERSION ,Device version" elif (cpuis("AT91SAM3S*")) bitfld.long 0x00 5.--7. " EPROC ,Embedded processor" "ARM946ES,ARM7TDMI,Cortex-m3,ARM920T,ARM926EJS,?..." hexmask.long.byte 0x00 0.--4. 1. " VERSION ,Device version" elif (cpuis("AT91SAM3A*")||cpuis("AT91SAM3N*")||cpuis("AT91SAM3X4C")||cpuis("AT91SAM3X4E")||cpuis("AT91SAM3X8C")||cpuis("AT91SAM3X8E")) bitfld.long 0x00 5.--7. " EPROC ,Embedded processor" ",ARM946ES,ARM7TDMI,Cortex-m3,ARM920T,ARM926EJS,Cortex-a5,?..." hexmask.long.byte 0x00 0.--4. 1. " VERSION ,Device version" elif (cpuis("ATSAM4LC*")||cpuis("ATSAM4LS*")) bitfld.long 0x00 5.--7. " EPROC ,Embedded processor" ",ARM946ES,ARM7TDMI,Cortex-m3,ARM920T,ARM926EJS,Cortex-a5,Cortex-m4" hexmask.long.byte 0x00 0.--4. 1. " VERSION ,Device version" elif ((cpuis("ATSAM4S*"))||(cpuis("ATSAMV70*"))||(cpuis("ATSAME70*"))) bitfld.long 0x00 5.--7. " EPROC ,Embedded processor" "Cortex-m7,ARM946ES,ARM7TDMI,Cortex-m3,ARM920T,ARM926EJS,Cortex-a5,Cortex-m4" hexmask.long.byte 0x00 0.--4. 1. " VERSION ,Device version" elif (cpuis("ATSAMV71*")) bitfld.long 0x00 5.--7. " EPROC ,Embedded processor" "Cortex-m7,ARM946ES,ARM7TDMI,Cortex-m3,ARM920T,ARM926EJS,Cortex-a5,Cortex-m4" bitfld.long 0x00 0.--4. " VERSION ,Device version" "MRLA,MRLB,Version 2,Version 3,Version 4,Version 5,Version 6,Version 7,Version 8,Version 9,Version 10,Version 11,Version 12,Version 13,Version 14,Version 15,Version 16,Version 17,Version 18,Version 19,Version 20,Version 21,Version 22,Version 23,Version 24,Version 25,Version 26,Version 27,Version 28,Version 29,Version 30,Version 31" else bitfld.long 0x00 5.--7. " EPROC ,Embedded processor" ",ARM946E-S,ARM7TDMI,Cortex-m3,ARM920T,ARM926EJ-S,?..." bitfld.long 0x00 0.--4. " VERSION ,Device version" "Version 0,Version 1,Version 2,Version 3,Version 4,Version 5,Version 6,Version 7,Version 8,Version 9,Version 10,Version 11,Version 12,Version 13,Version 14,Version 15,Version 16,Version 17,Version 18,Version 19,Version 20,Version 21,Version 22,Version 23,Version 24,Version 25,Version 26,Version 27,Version 28,Version 29,Version 30,Version 31" endif sif (cpuis("ATSAM4LS*")||cpuis("ATSAM4LC*")) line.long 0x04 "EXID,Extension Register" bitfld.long 0x04 24.--26. " PACKAGE ,Package type" "24-pin,32-pin,48-pin,64-pin,100-pin,144-pin,?..." bitfld.long 0x04 3. " LCD ,LCD option" "Not implemented,Implemented" textline " " sif (cpuis("ATSAM4LC*")) bitfld.long 0x04 2. " USBFULL ,USB configuration" "Device-only,Device and host" elif (cpuis("ATSAM4LS*")) bitfld.long 0x04 2. " USBFULL ,USB configuration" "Device-only,?..." endif bitfld.long 0x04 1. " USB ,USB option" "Not implemented,Implemented" textline " " bitfld.long 0x04 0. " AES ,AES option" "Not implemented,Implemented" else line.long 0x04 "CHIPID_EXID,Chip ID Extension Register" endif width 0x0B tree.end tree.open "PIO (Parallel Input/Output)" sif cpuis("ATSAM4S*C") tree "Port A" base ad:0x400E0E00 if ((d.l(ad:0x400E0E00+0xE4)&0x01)==0x00) width 13. group.long 0x08++0x03 line.long 0x00 "PIO_PSR,PIO Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Status" "Peripheral,PIO" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Status" "Peripheral,PIO" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Status" "Peripheral,PIO" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Status" "Peripheral,PIO" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Status" "Peripheral,PIO" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Status" "Peripheral,PIO" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Status" "Peripheral,PIO" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Status" "Peripheral,PIO" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Status" "Peripheral,PIO" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Status" "Peripheral,PIO" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Status" "Peripheral,PIO" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Status" "Peripheral,PIO" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Status" "Peripheral,PIO" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Status" "Peripheral,PIO" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Status" "Peripheral,PIO" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Status" "Peripheral,PIO" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Status" "Peripheral,PIO" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Status" "Peripheral,PIO" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Status" "Peripheral,PIO" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Status" "Peripheral,PIO" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Status" "Peripheral,PIO" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Status" "Peripheral,PIO" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Status" "Peripheral,PIO" group.long 0x18++0x03 line.long 0x00 "PIO_OSR,PIO Output Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Output Status" "Input,Output" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Output Status" "Input,Output" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Output Status" "Input,Output" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Output Status" "Input,Output" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Output Status" "Input,Output" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Output Status" "Input,Output" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Output Status" "Input,Output" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Output Status" "Input,Output" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Output Status" "Input,Output" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Output Status" "Input,Output" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Output Status" "Input,Output" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Output Status" "Input,Output" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Output Status" "Input,Output" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Output Status" "Input,Output" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Output Status" "Input,Output" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Output Status" "Input,Output" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Output Status" "Input,Output" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Status" "Input,Output" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Status" "Input,Output" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Status" "Input,Output" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Status" "Input,Output" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Status" "Input,Output" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Status" "Input,Output" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Status" "Input,Output" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Status" "Input,Output" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Status" "Input,Output" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Status" "Input,Output" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Status" "Input,Output" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Status" "Input,Output" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Status" "Input,Output" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Status" "Input,Output" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Status" "Input,Output" group.long 0x28++0x03 line.long 0x00 "PIO_IFSR,PIO Input Filter Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Filer Status" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "PIO_ODSR,PIO Output Data Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Output Data Status" "Low,High" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Output Data Status" "Low,High" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Output Data Status" "Low,High" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Output Data Status" "Low,High" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Output Data Status" "Low,High" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Output Data Status" "Low,High" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Output Data Status" "Low,High" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Output Data Status" "Low,High" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Output Data Status" "Low,High" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Output Data Status" "Low,High" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Output Data Status" "Low,High" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Output Data Status" "Low,High" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Data Status" "Low,High" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Data Status" "Low,High" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Data Status" "Low,High" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Data Status" "Low,High" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Data Status" "Low,High" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Data Status" "Low,High" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Data Status" "Low,High" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Data Status" "Low,High" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Data Status" "Low,High" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Data Status" "Low,High" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Data Status" "Low,High" textline " " rgroup.long 0x3C++0x03 line.long 0x00 "PIO_PDSR,PIO Pin Data Status Register" bitfld.long 0x00 31. " P31 ,PIO31 Output Data Status" "Low,High" bitfld.long 0x00 30. " P30 ,PIO30 Output Data Status" "Low,High" bitfld.long 0x00 29. " P29 ,PIO29 Output Data Status" "Low,High" bitfld.long 0x00 28. " P28 ,PIO28 Output Data Status" "Low,High" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Output Data Status" "Low,High" bitfld.long 0x00 26. " P26 ,PIO26 Output Data Status" "Low,High" bitfld.long 0x00 25. " P25 ,PIO25 Output Data Status" "Low,High" bitfld.long 0x00 24. " P24 ,PIO24 Output Data Status" "Low,High" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Output Data Status" "Low,High" bitfld.long 0x00 22. " P22 ,PIO22 Output Data Status" "Low,High" bitfld.long 0x00 21. " P21 ,PIO21 Output Data Status" "Low,High" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Output Data Status" "Low,High" bitfld.long 0x00 19. " P19 ,PIO19 Output Data Status" "Low,High" bitfld.long 0x00 18. " P18 ,PIO18 Output Data Status" "Low,High" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Output Data Status" "Low,High" bitfld.long 0x00 16. " P16 ,PIO16 Output Data Status" "Low,High" bitfld.long 0x00 15. " P15 ,PIO15 Output Data Status" "Low,High" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Output Data Status" "Low,High" bitfld.long 0x00 13. " P13 ,PIO13 Output Data Status" "Low,High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Output Data Status" "Low,High" bitfld.long 0x00 11. " P11 ,PIO11 Output Data Status" "Low,High" bitfld.long 0x00 10. " P10 ,PIO10 Output Data Status" "Low,High" bitfld.long 0x00 9. " P9 ,PIO9 Output Data Status" "Low,High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Output Data Status" "Low,High" bitfld.long 0x00 7. " P7 ,PIO7 Output Data Status" "Low,High" bitfld.long 0x00 6. " P6 ,PIO6 Output Data Status" "Low,High" bitfld.long 0x00 5. " P5 ,PIO5 Output Data Status" "Low,High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Output Data Status" "Low,High" bitfld.long 0x00 3. " P3 ,PIO3 Output Data Status" "Low,High" bitfld.long 0x00 2. " P2 ,PIO2 Output Data Status" "Low,High" bitfld.long 0x00 1. " P1 ,PIO1 Output Data Status" "Low,High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Output Data Status" "Low,High" textline " " group.long 0x48++0x03 line.long 0x00 "PIO_IMR,PIO Interrupt Mask Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Change Interrupt Mask" "Disabled,Enabled" hgroup.long 0x4c++0x03 hide.long 0x00 "ISR,PIO Interrupt Status Register" in group.long 0x58++0x03 line.long 0x00 "PIO_MDSR,PIO Multi-driver Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Multi Drive Status" "Disabled,Enabled" group.long 0x68++0x03 line.long 0x00 "PIO_PUSR,PIO Pull Up Status Register" setclrfld.long 0x00 31. -0x04 31. -0x08 31. " P31_set/clr ,PIO31 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 30. -0x04 30. -0x08 30. " P30_set/clr ,PIO30 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 29. -0x04 29. -0x08 29. " P29_set/clr ,PIO29 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 28. -0x04 28. -0x08 28. " P28_set/clr ,PIO28 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 27. -0x04 27. -0x08 27. " P27_set/clr ,PIO27 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 26. -0x04 26. -0x08 26. " P26_set/clr ,PIO26 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 25. -0x04 25. -0x08 25. " P25_set/clr ,PIO25 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 24. -0x04 24. -0x08 24. " P24_set/clr ,PIO24 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 23. -0x04 23. -0x08 23. " P23_set/clr ,PIO23 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 22. -0x04 22. -0x08 22. " P22_set/clr ,PIO22 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 21. -0x04 21. -0x08 21. " P21_set/clr ,PIO21 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 20. -0x04 20. -0x08 20. " P20_set/clr ,PIO20 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 19. -0x04 19. -0x08 19. " P19_set/clr ,PIO19 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 18. -0x04 18. -0x08 18. " P18_set/clr ,PIO18 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 17. -0x04 17. -0x08 17. " P17_set/clr ,PIO17 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 16. -0x04 16. -0x08 16. " P16_set/clr ,PIO16 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 15. -0x04 15. -0x08 15. " P15_set/clr ,PIO15 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 14. -0x04 14. -0x08 14. " P14_set/clr ,PIO14 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 13. -0x04 13. -0x08 13. " P13_set/clr ,PIO13 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " P5_set/clr ,PIO5 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Pull Up Status" "Enabled,Disabled" textline " " group.long 0x70++0x07 line.long 0x00 "PIO_ABCDSR1,PIO Peripheral ABCD Select Register 1" bitfld.long 0x00 31. " P31 ,PIO31 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 30. " P30 ,PIO30 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 29. " P29 ,PIO29 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 28. " P28 ,PIO28 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 26. " P26 ,PIO26 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 25. " P25 ,PIO25 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 24. " P24 ,PIO24 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 22. " P22 ,PIO22 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 21. " P21 ,PIO21 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 19. " P19 ,PIO19 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 18. " P18 ,PIO18 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 16. " P16 ,PIO16 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 15. " P15 ,PIO15 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 13. " P13 ,PIO13 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 11. " P11 ,PIO11 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 10. " P10 ,PIO10 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 9. " P9 ,PIO9 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 7. " P7 ,PIO7 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 6. " P6 ,PIO6 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 5. " P5 ,PIO5 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 3. " P3 ,PIO3 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 2. " P2 ,PIO2 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 1. " P1 ,PIO1 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Peripheral Select" "A/C function,B/D function" line.long 0x04 "ABCDSR2,PIO Peripheral ABCD Select Register 2" bitfld.long 0x04 31. " P31 ,PIO31 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 30. " P30 ,PIO30 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 29. " P29 ,PIO29 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 28. " P28 ,PIO28 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 27. " P27 ,PIO27 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 26. " P26 ,PIO26 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 25. " P25 ,PIO25 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 24. " P24 ,PIO24 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 23. " P23 ,PIO23 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 22. " P22 ,PIO22 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 21. " P21 ,PIO21 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 20. " P20 ,PIO20 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 19. " P19 ,PIO19 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 18. " P18 ,PIO18 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 17. " P17 ,PIO17 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 16. " P16 ,PIO16 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 15. " P15 ,PIO15 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 14. " P14 ,PIO14 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 13. " P13 ,PIO13 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 12. " P12 ,PIO12 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 11. " P11 ,PIO11 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 10. " P10 ,PIO10 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 9. " P9 ,PIO9 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 8. " P8 ,PIO8 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 7. " P7 ,PIO7 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 6. " P6 ,PIO6 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 5. " P5 ,PIO5 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 4. " P4 ,PIO4 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 3. " P3 ,PIO3 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 2. " P2 ,PIO2 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 1. " P1 ,PIO1 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 0. " P0 ,PIO0 Peripheral Select" "A/B function,C/D function" textline " " group.long 0x88++0x03 line.long 0x00 "PIO_IFSCSR,PIO Input Filter Slow Clock Status Register" setclrfld.long 0x00 31. -0x04 31. -0x08 31. " P31_set/clr ,PIO31 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 30. -0x04 30. -0x08 30. " P30_set/clr ,PIO30 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 29. -0x04 29. -0x08 29. " P29_set/clr ,PIO29 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 28. -0x04 28. -0x08 28. " P28_set/clr ,PIO28 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 27. -0x04 27. -0x08 27. " P27_set/clr ,PIO27 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 26. -0x04 26. -0x08 26. " P26_set/clr ,PIO26 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 25. -0x04 25. -0x08 25. " P25_set/clr ,PIO25 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 24. -0x04 24. -0x08 24. " P24_set/clr ,PIO24 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 23. -0x04 23. -0x08 23. " P23_set/clr ,PIO23 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 22. -0x04 22. -0x08 22. " P22_set/clr ,PIO22 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 21. -0x04 21. -0x08 21. " P21_set/clr ,PIO21 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 20. -0x04 20. -0x08 20. " P20_set/clr ,PIO20 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 19. -0x04 19. -0x08 19. " P19_set/clr ,PIO19 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 18. -0x04 18. -0x08 18. " P18_set/clr ,PIO18 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 17. -0x04 17. -0x08 17. " P17_set/clr ,PIO17 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 16. -0x04 16. -0x08 16. " P16_set/clr ,PIO16 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 15. -0x04 15. -0x08 15. " P15_set/clr ,PIO15 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 14. -0x04 14. -0x08 14. " P14_set/clr ,PIO14 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 13. -0x04 13. -0x08 13. " P13_set/clr ,PIO13 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" group.long 0x8C++0x03 line.long 0x00 "PIO_SCDR,PIO Slow Clock Divider Debouncing Register" hexmask.long.word 0x00 0.--13. 1. " DIV ,Slow Clock Divider Selection for Debouncing" group.long 0x98++0x03 line.long 0x00 "PIO_PPDSR,PIO Pad Pull Down Status Register" setclrfld.long 0x00 31. -0x04 31. -0x08 31. " P31_set/clr ,PIO31 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 30. -0x04 30. -0x08 30. " P30_set/clr ,PIO30 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 29. -0x04 29. -0x08 29. " P29_set/clr ,PIO29 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 28. -0x04 28. -0x08 28. " P28_set/clr ,PIO28 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 27. -0x04 27. -0x08 27. " P27_set/clr ,PIO27 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 26. -0x04 26. -0x08 26. " P26_set/clr ,PIO26 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 25. -0x04 25. -0x08 25. " P25_set/clr ,PIO25 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 24. -0x04 24. -0x08 24. " P24_set/clr ,PIO24 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 23. -0x04 23. -0x08 23. " P23_set/clr ,PIO23 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 22. -0x04 22. -0x08 22. " P22_set/clr ,PIO22 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 21. -0x04 21. -0x08 21. " P21_set/clr ,PIO21 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 20. -0x04 20. -0x08 20. " P20_set/clr ,PIO20 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 19. -0x04 19. -0x08 19. " P19_set/clr ,PIO19 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 18. -0x04 18. -0x08 18. " P18_set/clr ,PIO18 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 17. -0x04 17. -0x08 17. " P17_set/clr ,PIO17 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 16. -0x04 16. -0x08 16. " P16_set/clr ,PIO16 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 15. -0x04 15. -0x08 15. " P15_set/clr ,PIO15 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 14. -0x04 14. -0x08 14. " P14_set/clr ,PIO14 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 13. -0x04 13. -0x08 13. " P13_set/clr ,PIO13 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " P5_set/clr ,PIO5 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Pull Down Status" "Enabled,Disabled" group.long 0xA8++0x03 line.long 0x00 "PIO_OWSR,PIO Output Write Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Write Status" "Not affected,Affected" width 0x0B else width 13. rgroup.long 0x08++0x03 line.long 0x00 "PIO_PSR,PIO Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Status" "Peripheral,PIO" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Status" "Peripheral,PIO" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Status" "Peripheral,PIO" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Status" "Peripheral,PIO" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Status" "Peripheral,PIO" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Status" "Peripheral,PIO" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Status" "Peripheral,PIO" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Status" "Peripheral,PIO" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Status" "Peripheral,PIO" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Status" "Peripheral,PIO" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Status" "Peripheral,PIO" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Status" "Peripheral,PIO" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Status" "Peripheral,PIO" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Status" "Peripheral,PIO" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Status" "Peripheral,PIO" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Status" "Peripheral,PIO" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Status" "Peripheral,PIO" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Status" "Peripheral,PIO" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Status" "Peripheral,PIO" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Status" "Peripheral,PIO" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Status" "Peripheral,PIO" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Status" "Peripheral,PIO" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Status" "Peripheral,PIO" rgroup.long 0x18++0x03 line.long 0x00 "PIO_OSR,PIO Output Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Output Status" "Input,Output" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Output Status" "Input,Output" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Output Status" "Input,Output" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Output Status" "Input,Output" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Output Status" "Input,Output" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Output Status" "Input,Output" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Output Status" "Input,Output" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Output Status" "Input,Output" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Output Status" "Input,Output" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Output Status" "Input,Output" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Output Status" "Input,Output" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Output Status" "Input,Output" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Output Status" "Input,Output" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Output Status" "Input,Output" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Output Status" "Input,Output" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Output Status" "Input,Output" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Output Status" "Input,Output" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Output Status" "Input,Output" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Output Status" "Input,Output" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Output Status" "Input,Output" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Output Status" "Input,Output" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Output Status" "Input,Output" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Output Status" "Input,Output" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Output Status" "Input,Output" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Output Status" "Input,Output" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Output Status" "Input,Output" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Output Status" "Input,Output" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Output Status" "Input,Output" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Output Status" "Input,Output" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Output Status" "Input,Output" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Output Status" "Input,Output" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Output Status" "Input,Output" rgroup.long 0x28++0x03 line.long 0x00 "PIO_IFSR,PIO Input Filter Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Input Filer Status" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "PIO_ODSR,PIO Output Data Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Output Data Status" "Low,High" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Output Data Status" "Low,High" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Output Data Status" "Low,High" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Output Data Status" "Low,High" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Output Data Status" "Low,High" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Output Data Status" "Low,High" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Output Data Status" "Low,High" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Output Data Status" "Low,High" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Output Data Status" "Low,High" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Output Data Status" "Low,High" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Output Data Status" "Low,High" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Output Data Status" "Low,High" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Data Status" "Low,High" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Data Status" "Low,High" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Data Status" "Low,High" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Data Status" "Low,High" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Data Status" "Low,High" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Data Status" "Low,High" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Data Status" "Low,High" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Data Status" "Low,High" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Data Status" "Low,High" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Data Status" "Low,High" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Data Status" "Low,High" textline " " rgroup.long 0x3C++0x03 line.long 0x00 "PIO_PDSR,PIO Pin Data Status Register" bitfld.long 0x00 31. " P31 ,PIO31 Output Data Status" "Low,High" bitfld.long 0x00 30. " P30 ,PIO30 Output Data Status" "Low,High" bitfld.long 0x00 29. " P29 ,PIO29 Output Data Status" "Low,High" bitfld.long 0x00 28. " P28 ,PIO28 Output Data Status" "Low,High" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Output Data Status" "Low,High" bitfld.long 0x00 26. " P26 ,PIO26 Output Data Status" "Low,High" bitfld.long 0x00 25. " P25 ,PIO25 Output Data Status" "Low,High" bitfld.long 0x00 24. " P24 ,PIO24 Output Data Status" "Low,High" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Output Data Status" "Low,High" bitfld.long 0x00 22. " P22 ,PIO22 Output Data Status" "Low,High" bitfld.long 0x00 21. " P21 ,PIO21 Output Data Status" "Low,High" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Output Data Status" "Low,High" bitfld.long 0x00 19. " P19 ,PIO19 Output Data Status" "Low,High" bitfld.long 0x00 18. " P18 ,PIO18 Output Data Status" "Low,High" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Output Data Status" "Low,High" bitfld.long 0x00 16. " P16 ,PIO16 Output Data Status" "Low,High" bitfld.long 0x00 15. " P15 ,PIO15 Output Data Status" "Low,High" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Output Data Status" "Low,High" bitfld.long 0x00 13. " P13 ,PIO13 Output Data Status" "Low,High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Output Data Status" "Low,High" bitfld.long 0x00 11. " P11 ,PIO11 Output Data Status" "Low,High" bitfld.long 0x00 10. " P10 ,PIO10 Output Data Status" "Low,High" bitfld.long 0x00 9. " P9 ,PIO9 Output Data Status" "Low,High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Output Data Status" "Low,High" bitfld.long 0x00 7. " P7 ,PIO7 Output Data Status" "Low,High" bitfld.long 0x00 6. " P6 ,PIO6 Output Data Status" "Low,High" bitfld.long 0x00 5. " P5 ,PIO5 Output Data Status" "Low,High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Output Data Status" "Low,High" bitfld.long 0x00 3. " P3 ,PIO3 Output Data Status" "Low,High" bitfld.long 0x00 2. " P2 ,PIO2 Output Data Status" "Low,High" bitfld.long 0x00 1. " P1 ,PIO1 Output Data Status" "Low,High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Output Data Status" "Low,High" textline " " group.long 0x48++0x03 line.long 0x00 "PIO_IMR,PIO Interrupt Mask Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Change Interrupt Mask" "Disabled,Enabled" hgroup.long 0x4c++0x03 hide.long 0x00 "ISR,PIO Interrupt Status Register" in rgroup.long 0x58++0x03 line.long 0x00 "PIO_MDSR,PIO Multi-driver Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Multi Drive Status" "Disabled,Enabled" rgroup.long 0x68++0x03 line.long 0x00 "PIO_PUSR,PIO Pull Up Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Pull Up Status" "Enabled,Disabled" textline " " rgroup.long 0x70++0x07 line.long 0x00 "PIO_ABCDSR1,PIO Peripheral ABCD Select Register 1" bitfld.long 0x00 31. " P31 ,PIO31 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 30. " P30 ,PIO30 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 29. " P29 ,PIO29 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 28. " P28 ,PIO28 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 26. " P26 ,PIO26 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 25. " P25 ,PIO25 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 24. " P24 ,PIO24 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 22. " P22 ,PIO22 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 21. " P21 ,PIO21 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 19. " P19 ,PIO19 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 18. " P18 ,PIO18 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 16. " P16 ,PIO16 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 15. " P15 ,PIO15 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 13. " P13 ,PIO13 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 11. " P11 ,PIO11 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 10. " P10 ,PIO10 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 9. " P9 ,PIO9 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 7. " P7 ,PIO7 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 6. " P6 ,PIO6 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 5. " P5 ,PIO5 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 3. " P3 ,PIO3 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 2. " P2 ,PIO2 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 1. " P1 ,PIO1 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Peripheral Select" "A/C function,B/D function" line.long 0x04 "ABCDSR2,PIO Peripheral ABCD Select Register 2" bitfld.long 0x04 31. " P31 ,PIO31 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 30. " P30 ,PIO30 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 29. " P29 ,PIO29 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 28. " P28 ,PIO28 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 27. " P27 ,PIO27 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 26. " P26 ,PIO26 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 25. " P25 ,PIO25 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 24. " P24 ,PIO24 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 23. " P23 ,PIO23 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 22. " P22 ,PIO22 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 21. " P21 ,PIO21 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 20. " P20 ,PIO20 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 19. " P19 ,PIO19 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 18. " P18 ,PIO18 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 17. " P17 ,PIO17 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 16. " P16 ,PIO16 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 15. " P15 ,PIO15 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 14. " P14 ,PIO14 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 13. " P13 ,PIO13 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 12. " P12 ,PIO12 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 11. " P11 ,PIO11 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 10. " P10 ,PIO10 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 9. " P9 ,PIO9 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 8. " P8 ,PIO8 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 7. " P7 ,PIO7 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 6. " P6 ,PIO6 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 5. " P5 ,PIO5 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 4. " P4 ,PIO4 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 3. " P3 ,PIO3 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 2. " P2 ,PIO2 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 1. " P1 ,PIO1 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 0. " P0 ,PIO0 Peripheral Select" "A/B function,C/D function" textline " " group.long 0x88++0x03 line.long 0x00 "PIO_IFSCSR,PIO Input Filter Slow Clock Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" group.long 0x8C++0x03 line.long 0x00 "PIO_SCDR,PIO Slow Clock Divider Debouncing Register" hexmask.long.word 0x00 0.--13. 1. " DIV ,Slow Clock Divider Selection for Debouncing" rgroup.long 0x98++0x03 line.long 0x00 "PIO_PPDSR,PIO Pad Pull Down Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Pull Down Status" "Enabled,Disabled" rgroup.long 0xA8++0x03 line.long 0x00 "PIO_OWSR,PIO Output Write Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Output Write Status" "Not affected,Affected" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Output Write Status" "Not affected,Affected" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Output Write Status" "Not affected,Affected" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Output Write Status" "Not affected,Affected" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Output Write Status" "Not affected,Affected" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Output Write Status" "Not affected,Affected" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Output Write Status" "Not affected,Affected" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Output Write Status" "Not affected,Affected" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Output Write Status" "Not affected,Affected" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Output Write Status" "Not affected,Affected" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Output Write Status" "Not affected,Affected" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Output Write Status" "Not affected,Affected" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Output Write Status" "Not affected,Affected" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Output Write Status" "Not affected,Affected" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Output Write Status" "Not affected,Affected" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Output Write Status" "Not affected,Affected" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Output Write Status" "Not affected,Affected" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Output Write Status" "Not affected,Affected" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Output Write Status" "Not affected,Affected" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Output Write Status" "Not affected,Affected" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Output Write Status" "Not affected,Affected" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Output Write Status" "Not affected,Affected" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Output Write Status" "Not affected,Affected" width 0x0B endif width 13. textline " " group.long 0xB8++0x03 line.long 0x00 "PIO_AIMMR,PIO Additional Interrupt Modes Mask Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Peripheral CD Status" "Both Edge,Registers" textline " " wgroup.long 0xC0++0x03 line.long 0x00 "PIO_ESR,Edge Interrupt Source Selection Select Register" bitfld.long 0x00 31. " P31 ,PIO31 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 30. " P30 ,PIO30 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 29. " P29 ,PIO29 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 28. " P28 ,PIO28 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 26. " P26 ,PIO26 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 25. " P25 ,PIO25 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 24. " P24 ,PIO24 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 22. " P22 ,PIO22 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 21. " P21 ,PIO21 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 19. " P19 ,PIO19 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 18. " P18 ,PIO18 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 16. " P16 ,PIO16 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 15. " P15 ,PIO15 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 13. " P13 ,PIO13 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 11. " P11 ,PIO11 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 10. " P10 ,PIO10 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 9. " P9 ,PIO9 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 7. " P7 ,PIO7 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 6. " P6 ,PIO6 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 5. " P5 ,PIO5 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 3. " P3 ,PIO3 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 2. " P2 ,PIO2 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 1. " P1 ,PIO1 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge Interrupt Source Selection" "No effect,Edge" wgroup.long 0xC4++0x03 line.long 0x00 "PIO_LSR,Level Interrupt Source Selection Status Register" bitfld.long 0x00 31. " P31 ,PIO31 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 30. " P30 ,PIO30 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 29. " P29 ,PIO29 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 28. " P28 ,PIO28 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 26. " P26 ,PIO26 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 25. " P25 ,PIO25 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 24. " P24 ,PIO24 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 22. " P22 ,PIO22 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 21. " P21 ,PIO21 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 19. " P19 ,PIO19 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 18. " P18 ,PIO18 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 16. " P16 ,PIO16 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 15. " P15 ,PIO15 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 13. " P13 ,PIO13 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 11. " P11 ,PIO11 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 10. " P10 ,PIO10 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 9. " P9 ,PIO9 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 7. " P7 ,PIO7 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 6. " P6 ,PIO6 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 5. " P5 ,PIO5 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 3. " P3 ,PIO3 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 2. " P2 ,PIO2 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 1. " P1 ,PIO1 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Level Interrupt Source Selection" "No effect,Level" rgroup.long 0xC8++0x03 line.long 0x00 "PIO_ELSR,Edge/Level Interrupt Source Selection Status Register" bitfld.long 0x00 31. " P31 ,PIO31 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 30. " P30 ,PIO30 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 29. " P29 ,PIO29 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 28. " P28 ,PIO28 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 26. " P26 ,PIO26 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 25. " P25 ,PIO25 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 24. " P24 ,PIO24 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 22. " P22 ,PIO22 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 21. " P21 ,PIO21 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 19. " P19 ,PIO19 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 18. " P18 ,PIO18 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 16. " P16 ,PIO16 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 15. " P15 ,PIO15 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 13. " P13 ,PIO13 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 11. " P11 ,PIO11 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 10. " P10 ,PIO10 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 9. " P9 ,PIO9 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 7. " P7 ,PIO7 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 6. " P6 ,PIO6 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 5. " P5 ,PIO5 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 3. " P3 ,PIO3 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 2. " P2 ,PIO2 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 1. " P1 ,PIO1 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge/Level Interrupt Source Selection" "Edge,Level" wgroup.long 0xD8++0x03 line.long 0x00 "PIO_FELLSR,Falling Edge/Low-Level Select Register" bitfld.long 0x00 31. " P31 ,PIO31 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 30. " P30 ,PIO30 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 29. " P29 ,PIO29 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 28. " P28 ,PIO28 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 26. " P26 ,PIO26 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 25. " P25 ,PIO25 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 24. " P24 ,PIO24 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 22. " P22 ,PIO22 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 21. " P21 ,PIO21 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 19. " P19 ,PIO19 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 18. " P18 ,PIO18 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 16. " P16 ,PIO16 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 15. " P15 ,PIO15 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 13. " P13 ,PIO13 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 11. " P11 ,PIO11 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 10. " P10 ,PIO10 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 9. " P9 ,PIO9 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 7. " P7 ,PIO7 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 6. " P6 ,PIO6 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 5. " P5 ,PIO5 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 3. " P3 ,PIO3 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 2. " P2 ,PIO2 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 1. " P1 ,PIO1 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" wgroup.long 0xD8++0x03 line.long 0x00 "PIO_REHLSR,PIO Rising Edge/High-Level Select Register" bitfld.long 0x00 31. " P31 ,PIO31 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 30. " P30 ,PIO30 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 29. " P29 ,PIO29 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 28. " P28 ,PIO28 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 26. " P26 ,PIO26 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 25. " P25 ,PIO25 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 24. " P24 ,PIO24 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 22. " P22 ,PIO22 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 21. " P21 ,PIO21 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 19. " P19 ,PIO19 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 18. " P18 ,PIO18 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 16. " P16 ,PIO16 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 15. " P15 ,PIO15 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 13. " P13 ,PIO13 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 11. " P11 ,PIO11 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 10. " P10 ,PIO10 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 9. " P9 ,PIO9 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 7. " P7 ,PIO7 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 6. " P6 ,PIO6 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 5. " P5 ,PIO5 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 3. " P3 ,PIO3 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 2. " P2 ,PIO2 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 1. " P1 ,PIO1 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" rgroup.long 0xD8++0x03 line.long 0x00 "PIO_FRLHSR,PIO Fall/Rise - Low/High Status Register" bitfld.long 0x00 31. " P31 ,PIO31 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 30. " P30 ,PIO30 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 29. " P29 ,PIO29 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 28. " P28 ,PIO28 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 26. " P26 ,PIO26 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 25. " P25 ,PIO25 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 24. " P24 ,PIO24 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 22. " P22 ,PIO22 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 21. " P21 ,PIO21 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 19. " P19 ,PIO19 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 18. " P18 ,PIO18 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 16. " P16 ,PIO16 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 15. " P15 ,PIO15 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 13. " P13 ,PIO13 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 11. " P11 ,PIO11 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 10. " P10 ,PIO10 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 9. " P9 ,PIO9 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 7. " P7 ,PIO7 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 6. " P6 ,PIO6 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 5. " P5 ,PIO5 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 3. " P3 ,PIO3 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 2. " P2 ,PIO2 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 1. " P1 ,PIO1 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" rgroup.long 0xE0++0x03 line.long 0x00 "PIO_LOCKSR,PIO Lock Status Register" bitfld.long 0x00 31. " P31 ,PIO31 Lock Status" "Not locked,Locked" bitfld.long 0x00 30. " P30 ,PIO30 Lock Status" "Not locked,Locked" bitfld.long 0x00 29. " P29 ,PIO29 Lock Status" "Not locked,Locked" bitfld.long 0x00 28. " P28 ,PIO28 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Lock Status" "Not locked,Locked" bitfld.long 0x00 26. " P26 ,PIO26 Lock Status" "Not locked,Locked" bitfld.long 0x00 25. " P25 ,PIO25 Lock Status" "Not locked,Locked" bitfld.long 0x00 24. " P24 ,PIO24 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Lock Status" "Not locked,Locked" bitfld.long 0x00 22. " P22 ,PIO22 Lock Status" "Not locked,Locked" bitfld.long 0x00 21. " P21 ,PIO21 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Lock Status" "Not locked,Locked" bitfld.long 0x00 19. " P19 ,PIO19 Lock Status" "Not locked,Locked" bitfld.long 0x00 18. " P18 ,PIO18 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Lock Status" "Not locked,Locked" bitfld.long 0x00 16. " P16 ,PIO16 Lock Status" "Not locked,Locked" bitfld.long 0x00 15. " P15 ,PIO15 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Lock Status" "Not locked,Locked" bitfld.long 0x00 13. " P13 ,PIO13 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Lock Status" "Not locked,Locked" bitfld.long 0x00 11. " P11 ,PIO11 Lock Status" "Not locked,Locked" bitfld.long 0x00 10. " P10 ,PIO10 Lock Status" "Not locked,Locked" bitfld.long 0x00 9. " P9 ,PIO9 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Lock Status" "Not locked,Locked" bitfld.long 0x00 7. " P7 ,PIO7 Lock Status" "Not locked,Locked" bitfld.long 0x00 6. " P6 ,PIO6 Lock Status" "Not locked,Locked" bitfld.long 0x00 5. " P5 ,PIO5 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Lock Status" "Not locked,Locked" bitfld.long 0x00 3. " P3 ,PIO3 Lock Status" "Not locked,Locked" bitfld.long 0x00 2. " P2 ,PIO2 Lock Status" "Not locked,Locked" bitfld.long 0x00 1. " P1 ,PIO1 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Lock Status" "Not locked,Locked" group.long 0xE4++0x03 line.long 0x00 "PIO_WPMR,PIO Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write Protect KEY" bitfld.long 0x00 0. " WPEN ,Write Protect Enable" "Disabled,Enabled" hgroup.long 0xe8++0x03 hide.long 0x00 "WPSR,PIO Write Protect Status Register" in group.long 0x100++0x03 line.long 0x00 "PIO_SCHMITT,PIO Schmitt Trigger Register" bitfld.long 0x00 31. " SCHMITT31 ,Schmitt Trigger 31 Disable" "No,Yes" bitfld.long 0x00 30. " SCHMITT30 ,Schmitt Trigger 30 Disable" "No,Yes" bitfld.long 0x00 29. " SCHMITT29 ,Schmitt Trigger 29 Disable" "No,Yes" bitfld.long 0x00 28. " SCHMITT28 ,Schmitt Trigger 28 Disable" "No,Yes" textline " " bitfld.long 0x00 27. " SCHMITT27 ,Schmitt Trigger 27 Disable" "No,Yes" bitfld.long 0x00 26. " SCHMITT26 ,Schmitt Trigger 26 Disable" "No,Yes" bitfld.long 0x00 25. " SCHMITT25 ,Schmitt Trigger 25 Disable" "No,Yes" bitfld.long 0x00 24. " SCHMITT24 ,Schmitt Trigger 24 Disable" "No,Yes" textline " " bitfld.long 0x00 23. " SCHMITT23 ,Schmitt Trigger 23 Disable" "No,Yes" bitfld.long 0x00 22. " SCHMITT22 ,Schmitt Trigger 22 Disable" "No,Yes" bitfld.long 0x00 21. " SCHMITT21 ,Schmitt Trigger 21 Disable" "No,Yes" textline " " bitfld.long 0x00 20. " SCHMITT20 ,Schmitt Trigger 20 Disable" "No,Yes" bitfld.long 0x00 19. " SCHMITT19 ,Schmitt Trigger 19 Disable" "No,Yes" bitfld.long 0x00 18. " SCHMITT18 ,Schmitt Trigger 18 Disable" "No,Yes" textline " " bitfld.long 0x00 17. " SCHMITT17 ,Schmitt Trigger 17 Disable" "No,Yes" bitfld.long 0x00 16. " SCHMITT16 ,Schmitt Trigger 16 Disable" "No,Yes" bitfld.long 0x00 15. " SCHMITT15 ,Schmitt Trigger 15 Disable" "No,Yes" textline " " bitfld.long 0x00 14. " SCHMITT14 ,Schmitt Trigger 14 Disable" "No,Yes" bitfld.long 0x00 13. " SCHMITT13 ,Schmitt Trigger 13 Disable" "No,Yes" textline " " bitfld.long 0x00 12. " SCHMITT12 ,Schmitt Trigger 12 Disable" "No,Yes" bitfld.long 0x00 11. " SCHMITT11 ,Schmitt Trigger 11 Disable" "No,Yes" bitfld.long 0x00 10. " SCHMITT10 ,Schmitt Trigger 10 Disable" "No,Yes" bitfld.long 0x00 9. " SCHMITT9 ,Schmitt Trigger 9 Disable" "No,Yes" textline " " bitfld.long 0x00 8. " SCHMITT8 ,Schmitt Trigger 8 Disable" "No,Yes" bitfld.long 0x00 7. " SCHMITT7 ,Schmitt Trigger 7 Disable" "No,Yes" bitfld.long 0x00 6. " SCHMITT6 ,Schmitt Trigger 6 Disable" "No,Yes" bitfld.long 0x00 5. " SCHMITT5 ,Schmitt Trigger 5 Disable" "No,Yes" textline " " bitfld.long 0x00 4. " SCHMITT4 ,Schmitt Trigger 4 Disable" "No,Yes" bitfld.long 0x00 3. " SCHMITT3 ,Schmitt Trigger 3 Disable" "No,Yes" bitfld.long 0x00 2. " SCHMITT2 ,Schmitt Trigger 2 Disable" "No,Yes" bitfld.long 0x00 1. " SCHMITT1 ,Schmitt Trigger 1 Disable" "No,Yes" textline " " bitfld.long 0x00 0. " SCHMITT0 ,Schmitt Trigger 0 Disable" "No,Yes" textline " " tree "Parallel Capture" if ((d.l(ad:0x400E0E00+0xE4)&0x01)==0x00) group.long 0x150++0x03 line.long 0x00 "PIO_PCMR,PIO Parallel Capture Mode Register" bitfld.long 0x00 11. " FRSTS ,Parallel Capture Mode First Sample" "Even index,Odd index" bitfld.long 0x00 10. " HALFS ,Parallel Capture Mode Half Sampling" "All data,One time out of two" textline " " bitfld.long 0x00 9. " ALWYS ,Parallel Capture Mode Always Sampling" "No,Yes" bitfld.long 0x00 4.--5. " DSIZE ,Parallel Capture Mode Data Size" "8 bit,16 bit,32 bit,?..." textline " " bitfld.long 0x00 0. " PCEN ,Parallel Capture Mode Enable" "Disabled,Enabled" else rgroup.long 0x150++0x03 line.long 0x00 "PIO_PCMR,PIO Parallel Capture Mode Register" bitfld.long 0x00 11. " FRSTS ,Parallel Capture Mode First Sample" "Even index,Odd index" bitfld.long 0x00 10. " HALFS ,Parallel Capture Mode Half Sampling" "All data,One time out of two" textline " " bitfld.long 0x00 9. " ALWYS ,Parallel Capture Mode Always Sampling" "No,Yes" bitfld.long 0x00 4.--5. " DSIZE ,Parallel Capture Mode Data Size" "8 bit,16 bit,32 bit," textline " " bitfld.long 0x00 0. " PCEN ,Parallel Capture Mode Enable" "Disabled,Enabled" endif group.long 0x15C++0x03 line.long 0x00 "PIO_PCIMR,PIO Parallel Capture Interrupt Mask Register" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXBUFF_set/clr ,Reception Buffer Full Interrupt Enable" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " ENDRX_set/clr ,End of Reception Transfer Interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " OVRE_set/clr ,Parallel Capture Mode Overrun Error Interrupt Enable" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " DRDY_set/clr ,Parallel Capture Mode Data Ready Interrupt Enable" "Disabled,Enabled" hgroup.long 0x160++0x03 hide.long 0x00 "PIO_PCISR,PIO Parallel Capture Interrupt Status Register" if (d.l(ad:0x400E0E00+0x150)&0x30)==0x00 rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" hexmask.long.byte 0x00 0.--7. 1. " RDATA ,Parallel Capture Mode Reception Data" elif (d.l(ad:0x400E0E00+0x150)&0x30)==0x10 rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" hexmask.long.word 0x00 0.--15. 1. " RDATA ,Parallel Capture Mode Reception Data" else rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" endif tree.end width 0xB tree "PDC (Peripheral DMA Controller)" base ad:(0x400E0E00+0x68) width 9. group.long 0x100++0x01F line.long 0x00 "PIOA_RPR,Receive Pointer Register" line.long 0x04 "PIOA_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "PIOA_TPR,Transmit Pointer Register" line.long 0x0c "PIOA_TCR,Transmit Counter Register" hexmask.long.word 0x0C 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "PIOA_RNPR,Receive Next Pointer Register" line.long 0x14 "PIOA_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "PIOA_TNPR,Transmit Next Pointer Register" line.long 0x1c "PIOA_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "PIOA_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disable" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enable" bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disable" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enable" rgroup.long 0x124++0x03 line.long 0x00 "PIOA_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0x0B tree.end tree.end tree "Port B" base ad:0x400E1000 if ((d.l(ad:0x400E1000+0xE4)&0x01)==0x00) width 13. group.long 0x08++0x03 line.long 0x00 "PIO_PSR,PIO Status Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Status" "Peripheral,PIO" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Status" "Peripheral,PIO" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Status" "Peripheral,PIO" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Status" "Peripheral,PIO" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Status" "Peripheral,PIO" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Status" "Peripheral,PIO" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Status" "Peripheral,PIO" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Status" "Peripheral,PIO" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Status" "Peripheral,PIO" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Status" "Peripheral,PIO" group.long 0x18++0x03 line.long 0x00 "PIO_OSR,PIO Output Status Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Status" "Input,Output" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Status" "Input,Output" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Status" "Input,Output" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Status" "Input,Output" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Status" "Input,Output" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Status" "Input,Output" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Status" "Input,Output" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Status" "Input,Output" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Status" "Input,Output" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Status" "Input,Output" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Status" "Input,Output" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Status" "Input,Output" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Status" "Input,Output" group.long 0x28++0x03 line.long 0x00 "PIO_IFSR,PIO Input Filter Status Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Filer Status" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "PIO_ODSR,PIO Output Data Status Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Data Status" "Low,High" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Data Status" "Low,High" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Data Status" "Low,High" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Data Status" "Low,High" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Data Status" "Low,High" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Data Status" "Low,High" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Data Status" "Low,High" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Data Status" "Low,High" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Data Status" "Low,High" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Data Status" "Low,High" textline " " rgroup.long 0x3C++0x03 line.long 0x00 "PIO_PDSR,PIO Pin Data Status Register" bitfld.long 0x00 12. " P12 ,PIO12 Output Data Status" "Low,High" bitfld.long 0x00 11. " P11 ,PIO11 Output Data Status" "Low,High" bitfld.long 0x00 10. " P10 ,PIO10 Output Data Status" "Low,High" bitfld.long 0x00 9. " P9 ,PIO9 Output Data Status" "Low,High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Output Data Status" "Low,High" bitfld.long 0x00 7. " P7 ,PIO7 Output Data Status" "Low,High" bitfld.long 0x00 6. " P6 ,PIO6 Output Data Status" "Low,High" bitfld.long 0x00 5. " P5 ,PIO5 Output Data Status" "Low,High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Output Data Status" "Low,High" bitfld.long 0x00 3. " P3 ,PIO3 Output Data Status" "Low,High" bitfld.long 0x00 2. " P2 ,PIO2 Output Data Status" "Low,High" bitfld.long 0x00 1. " P1 ,PIO1 Output Data Status" "Low,High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Output Data Status" "Low,High" textline " " group.long 0x48++0x03 line.long 0x00 "PIO_IMR,PIO Interrupt Mask Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Change Interrupt Mask" "Disabled,Enabled" hgroup.long 0x4c++0x03 hide.long 0x00 "ISR,PIO Interrupt Status Register" in group.long 0x58++0x03 line.long 0x00 "PIO_MDSR,PIO Multi-driver Status Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Multi Drive Status" "Disabled,Enabled" group.long 0x68++0x03 line.long 0x00 "PIO_PUSR,PIO Pull Up Status Register" setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " P5_set/clr ,PIO5 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Pull Up Status" "Enabled,Disabled" textline " " group.long 0x70++0x07 line.long 0x00 "PIO_ABCDSR1,PIO Peripheral ABCD Select Register 1" bitfld.long 0x00 12. " P12 ,PIO12 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 11. " P11 ,PIO11 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 10. " P10 ,PIO10 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 9. " P9 ,PIO9 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 7. " P7 ,PIO7 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 6. " P6 ,PIO6 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 5. " P5 ,PIO5 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 3. " P3 ,PIO3 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 2. " P2 ,PIO2 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 1. " P1 ,PIO1 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Peripheral Select" "A/C function,B/D function" line.long 0x04 "ABCDSR2,PIO Peripheral ABCD Select Register 2" bitfld.long 0x04 12. " P12 ,PIO12 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 11. " P11 ,PIO11 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 10. " P10 ,PIO10 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 9. " P9 ,PIO9 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 8. " P8 ,PIO8 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 7. " P7 ,PIO7 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 6. " P6 ,PIO6 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 5. " P5 ,PIO5 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 4. " P4 ,PIO4 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 3. " P3 ,PIO3 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 2. " P2 ,PIO2 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 1. " P1 ,PIO1 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 0. " P0 ,PIO0 Peripheral Select" "A/B function,C/D function" textline " " group.long 0x88++0x03 line.long 0x00 "PIO_IFSCSR,PIO Input Filter Slow Clock Status Register" setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" group.long 0x8C++0x03 line.long 0x00 "PIO_SCDR,PIO Slow Clock Divider Debouncing Register" hexmask.long.word 0x00 0.--13. 1. " DIV ,Slow Clock Divider Selection for Debouncing" group.long 0x98++0x03 line.long 0x00 "PIO_PPDSR,PIO Pad Pull Down Status Register" setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " P5_set/clr ,PIO5 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Pull Down Status" "Enabled,Disabled" group.long 0xA8++0x03 line.long 0x00 "PIO_OWSR,PIO Output Write Status Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Write Status" "Not affected,Affected" width 0x0B else width 13. rgroup.long 0x08++0x03 line.long 0x00 "PIO_PSR,PIO Status Register" bitfld.long 0x00 12. " P12_set/clr ,PIO12 Status" "Peripheral,PIO" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Status" "Peripheral,PIO" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Status" "Peripheral,PIO" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Status" "Peripheral,PIO" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Status" "Peripheral,PIO" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Status" "Peripheral,PIO" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Status" "Peripheral,PIO" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Status" "Peripheral,PIO" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Status" "Peripheral,PIO" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Status" "Peripheral,PIO" rgroup.long 0x18++0x03 line.long 0x00 "PIO_OSR,PIO Output Status Register" bitfld.long 0x00 12. " P12_set/clr ,PIO12 Output Status" "Input,Output" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Output Status" "Input,Output" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Output Status" "Input,Output" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Output Status" "Input,Output" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Output Status" "Input,Output" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Output Status" "Input,Output" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Output Status" "Input,Output" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Output Status" "Input,Output" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Output Status" "Input,Output" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Output Status" "Input,Output" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Output Status" "Input,Output" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Output Status" "Input,Output" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Output Status" "Input,Output" rgroup.long 0x28++0x03 line.long 0x00 "PIO_IFSR,PIO Input Filter Status Register" bitfld.long 0x00 12. " P12_set/clr ,PIO12 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Input Filer Status" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "PIO_ODSR,PIO Output Data Status Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Data Status" "Low,High" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Data Status" "Low,High" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Data Status" "Low,High" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Data Status" "Low,High" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Data Status" "Low,High" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Data Status" "Low,High" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Data Status" "Low,High" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Data Status" "Low,High" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Data Status" "Low,High" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Data Status" "Low,High" textline " " rgroup.long 0x3C++0x03 line.long 0x00 "PIO_PDSR,PIO Pin Data Status Register" bitfld.long 0x00 12. " P12 ,PIO12 Output Data Status" "Low,High" bitfld.long 0x00 11. " P11 ,PIO11 Output Data Status" "Low,High" bitfld.long 0x00 10. " P10 ,PIO10 Output Data Status" "Low,High" bitfld.long 0x00 9. " P9 ,PIO9 Output Data Status" "Low,High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Output Data Status" "Low,High" bitfld.long 0x00 7. " P7 ,PIO7 Output Data Status" "Low,High" bitfld.long 0x00 6. " P6 ,PIO6 Output Data Status" "Low,High" bitfld.long 0x00 5. " P5 ,PIO5 Output Data Status" "Low,High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Output Data Status" "Low,High" bitfld.long 0x00 3. " P3 ,PIO3 Output Data Status" "Low,High" bitfld.long 0x00 2. " P2 ,PIO2 Output Data Status" "Low,High" bitfld.long 0x00 1. " P1 ,PIO1 Output Data Status" "Low,High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Output Data Status" "Low,High" textline " " group.long 0x48++0x03 line.long 0x00 "PIO_IMR,PIO Interrupt Mask Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Change Interrupt Mask" "Disabled,Enabled" hgroup.long 0x4c++0x03 hide.long 0x00 "ISR,PIO Interrupt Status Register" in rgroup.long 0x58++0x03 line.long 0x00 "PIO_MDSR,PIO Multi-driver Status Register" bitfld.long 0x00 12. " P12_set/clr ,PIO12 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Multi Drive Status" "Disabled,Enabled" rgroup.long 0x68++0x03 line.long 0x00 "PIO_PUSR,PIO Pull Up Status Register" bitfld.long 0x00 12. " P12_set/clr ,PIO12 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Pull Up Status" "Enabled,Disabled" textline " " rgroup.long 0x70++0x07 line.long 0x00 "PIO_ABCDSR1,PIO Peripheral ABCD Select Register 1" bitfld.long 0x00 12. " P12 ,PIO12 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 11. " P11 ,PIO11 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 10. " P10 ,PIO10 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 9. " P9 ,PIO9 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 7. " P7 ,PIO7 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 6. " P6 ,PIO6 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 5. " P5 ,PIO5 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 3. " P3 ,PIO3 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 2. " P2 ,PIO2 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 1. " P1 ,PIO1 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Peripheral Select" "A/C function,B/D function" line.long 0x04 "ABCDSR2,PIO Peripheral ABCD Select Register 2" bitfld.long 0x04 12. " P12 ,PIO12 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 11. " P11 ,PIO11 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 10. " P10 ,PIO10 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 9. " P9 ,PIO9 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 8. " P8 ,PIO8 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 7. " P7 ,PIO7 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 6. " P6 ,PIO6 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 5. " P5 ,PIO5 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 4. " P4 ,PIO4 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 3. " P3 ,PIO3 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 2. " P2 ,PIO2 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 1. " P1 ,PIO1 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 0. " P0 ,PIO0 Peripheral Select" "A/B function,C/D function" textline " " group.long 0x88++0x03 line.long 0x00 "PIO_IFSCSR,PIO Input Filter Slow Clock Status Register" bitfld.long 0x00 12. " P12_set/clr ,PIO12 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" group.long 0x8C++0x03 line.long 0x00 "PIO_SCDR,PIO Slow Clock Divider Debouncing Register" hexmask.long.word 0x00 0.--13. 1. " DIV ,Slow Clock Divider Selection for Debouncing" rgroup.long 0x98++0x03 line.long 0x00 "PIO_PPDSR,PIO Pad Pull Down Status Register" bitfld.long 0x00 12. " P12_set/clr ,PIO12 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Pull Down Status" "Enabled,Disabled" rgroup.long 0xA8++0x03 line.long 0x00 "PIO_OWSR,PIO Output Write Status Register" bitfld.long 0x00 12. " P12_set/clr ,PIO12 Output Write Status" "Not affected,Affected" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Output Write Status" "Not affected,Affected" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Output Write Status" "Not affected,Affected" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Output Write Status" "Not affected,Affected" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Output Write Status" "Not affected,Affected" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Output Write Status" "Not affected,Affected" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Output Write Status" "Not affected,Affected" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Output Write Status" "Not affected,Affected" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Output Write Status" "Not affected,Affected" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Output Write Status" "Not affected,Affected" width 0x0B endif width 13. textline " " group.long 0xB8++0x03 line.long 0x00 "PIO_AIMMR,PIO Additional Interrupt Modes Mask Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Peripheral CD Status" "Both Edge,Registers" textline " " wgroup.long 0xC0++0x03 line.long 0x00 "PIO_ESR,Edge Interrupt Source Selection Select Register" bitfld.long 0x00 12. " P12 ,PIO12 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 11. " P11 ,PIO11 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 10. " P10 ,PIO10 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 9. " P9 ,PIO9 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 7. " P7 ,PIO7 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 6. " P6 ,PIO6 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 5. " P5 ,PIO5 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 3. " P3 ,PIO3 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 2. " P2 ,PIO2 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 1. " P1 ,PIO1 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge Interrupt Source Selection" "No effect,Edge" wgroup.long 0xC4++0x03 line.long 0x00 "PIO_LSR,Level Interrupt Source Selection Status Register" bitfld.long 0x00 12. " P12 ,PIO12 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 11. " P11 ,PIO11 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 10. " P10 ,PIO10 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 9. " P9 ,PIO9 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 7. " P7 ,PIO7 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 6. " P6 ,PIO6 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 5. " P5 ,PIO5 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 3. " P3 ,PIO3 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 2. " P2 ,PIO2 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 1. " P1 ,PIO1 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Level Interrupt Source Selection" "No effect,Level" rgroup.long 0xC8++0x03 line.long 0x00 "PIO_ELSR,Edge/Level Interrupt Source Selection Status Register" bitfld.long 0x00 12. " P12 ,PIO12 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 11. " P11 ,PIO11 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 10. " P10 ,PIO10 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 9. " P9 ,PIO9 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 7. " P7 ,PIO7 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 6. " P6 ,PIO6 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 5. " P5 ,PIO5 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 3. " P3 ,PIO3 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 2. " P2 ,PIO2 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 1. " P1 ,PIO1 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge/Level Interrupt Source Selection" "Edge,Level" wgroup.long 0xD8++0x03 line.long 0x00 "PIO_FELLSR,Falling Edge/Low-Level Select Register" bitfld.long 0x00 12. " P12 ,PIO12 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 11. " P11 ,PIO11 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 10. " P10 ,PIO10 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 9. " P9 ,PIO9 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 7. " P7 ,PIO7 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 6. " P6 ,PIO6 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 5. " P5 ,PIO5 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 3. " P3 ,PIO3 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 2. " P2 ,PIO2 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 1. " P1 ,PIO1 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" wgroup.long 0xD8++0x03 line.long 0x00 "PIO_REHLSR,PIO Rising Edge/High-Level Select Register" bitfld.long 0x00 12. " P12 ,PIO12 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 11. " P11 ,PIO11 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 10. " P10 ,PIO10 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 9. " P9 ,PIO9 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 7. " P7 ,PIO7 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 6. " P6 ,PIO6 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 5. " P5 ,PIO5 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 3. " P3 ,PIO3 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 2. " P2 ,PIO2 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 1. " P1 ,PIO1 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" rgroup.long 0xD8++0x03 line.long 0x00 "PIO_FRLHSR,PIO Fall/Rise - Low/High Status Register" bitfld.long 0x00 12. " P12 ,PIO12 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 11. " P11 ,PIO11 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 10. " P10 ,PIO10 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 9. " P9 ,PIO9 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 7. " P7 ,PIO7 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 6. " P6 ,PIO6 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 5. " P5 ,PIO5 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 3. " P3 ,PIO3 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 2. " P2 ,PIO2 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 1. " P1 ,PIO1 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" rgroup.long 0xE0++0x03 line.long 0x00 "PIO_LOCKSR,PIO Lock Status Register" bitfld.long 0x00 12. " P12 ,PIO12 Lock Status" "Not locked,Locked" bitfld.long 0x00 11. " P11 ,PIO11 Lock Status" "Not locked,Locked" bitfld.long 0x00 10. " P10 ,PIO10 Lock Status" "Not locked,Locked" bitfld.long 0x00 9. " P9 ,PIO9 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Lock Status" "Not locked,Locked" bitfld.long 0x00 7. " P7 ,PIO7 Lock Status" "Not locked,Locked" bitfld.long 0x00 6. " P6 ,PIO6 Lock Status" "Not locked,Locked" bitfld.long 0x00 5. " P5 ,PIO5 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Lock Status" "Not locked,Locked" bitfld.long 0x00 3. " P3 ,PIO3 Lock Status" "Not locked,Locked" bitfld.long 0x00 2. " P2 ,PIO2 Lock Status" "Not locked,Locked" bitfld.long 0x00 1. " P1 ,PIO1 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Lock Status" "Not locked,Locked" group.long 0xE4++0x03 line.long 0x00 "PIO_WPMR,PIO Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write Protect KEY" bitfld.long 0x00 0. " WPEN ,Write Protect Enable" "Disabled,Enabled" hgroup.long 0xe8++0x03 hide.long 0x00 "WPSR,PIO Write Protect Status Register" in group.long 0x100++0x03 line.long 0x00 "PIO_SCHMITT,PIO Schmitt Trigger Register" textline " " bitfld.long 0x00 12. " SCHMITT12 ,Schmitt Trigger 12 Disable" "No,Yes" bitfld.long 0x00 11. " SCHMITT11 ,Schmitt Trigger 11 Disable" "No,Yes" bitfld.long 0x00 10. " SCHMITT10 ,Schmitt Trigger 10 Disable" "No,Yes" bitfld.long 0x00 9. " SCHMITT9 ,Schmitt Trigger 9 Disable" "No,Yes" textline " " bitfld.long 0x00 8. " SCHMITT8 ,Schmitt Trigger 8 Disable" "No,Yes" bitfld.long 0x00 7. " SCHMITT7 ,Schmitt Trigger 7 Disable" "No,Yes" bitfld.long 0x00 6. " SCHMITT6 ,Schmitt Trigger 6 Disable" "No,Yes" bitfld.long 0x00 5. " SCHMITT5 ,Schmitt Trigger 5 Disable" "No,Yes" textline " " bitfld.long 0x00 4. " SCHMITT4 ,Schmitt Trigger 4 Disable" "No,Yes" bitfld.long 0x00 3. " SCHMITT3 ,Schmitt Trigger 3 Disable" "No,Yes" bitfld.long 0x00 2. " SCHMITT2 ,Schmitt Trigger 2 Disable" "No,Yes" bitfld.long 0x00 1. " SCHMITT1 ,Schmitt Trigger 1 Disable" "No,Yes" textline " " bitfld.long 0x00 0. " SCHMITT0 ,Schmitt Trigger 0 Disable" "No,Yes" textline " " tree "Parallel Capture" if ((d.l(ad:0x400E1000+0xE4)&0x01)==0x00) group.long 0x150++0x03 line.long 0x00 "PIO_PCMR,PIO Parallel Capture Mode Register" bitfld.long 0x00 11. " FRSTS ,Parallel Capture Mode First Sample" "Even index,Odd index" bitfld.long 0x00 10. " HALFS ,Parallel Capture Mode Half Sampling" "All data,One time out of two" textline " " bitfld.long 0x00 9. " ALWYS ,Parallel Capture Mode Always Sampling" "No,Yes" bitfld.long 0x00 4.--5. " DSIZE ,Parallel Capture Mode Data Size" "8 bit,16 bit,32 bit,?..." textline " " bitfld.long 0x00 0. " PCEN ,Parallel Capture Mode Enable" "Disabled,Enabled" else rgroup.long 0x150++0x03 line.long 0x00 "PIO_PCMR,PIO Parallel Capture Mode Register" bitfld.long 0x00 11. " FRSTS ,Parallel Capture Mode First Sample" "Even index,Odd index" bitfld.long 0x00 10. " HALFS ,Parallel Capture Mode Half Sampling" "All data,One time out of two" textline " " bitfld.long 0x00 9. " ALWYS ,Parallel Capture Mode Always Sampling" "No,Yes" bitfld.long 0x00 4.--5. " DSIZE ,Parallel Capture Mode Data Size" "8 bit,16 bit,32 bit," textline " " bitfld.long 0x00 0. " PCEN ,Parallel Capture Mode Enable" "Disabled,Enabled" endif group.long 0x15C++0x03 line.long 0x00 "PIO_PCIMR,PIO Parallel Capture Interrupt Mask Register" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXBUFF_set/clr ,Reception Buffer Full Interrupt Enable" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " ENDRX_set/clr ,End of Reception Transfer Interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " OVRE_set/clr ,Parallel Capture Mode Overrun Error Interrupt Enable" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " DRDY_set/clr ,Parallel Capture Mode Data Ready Interrupt Enable" "Disabled,Enabled" hgroup.long 0x160++0x03 hide.long 0x00 "PIO_PCISR,PIO Parallel Capture Interrupt Status Register" if (d.l(ad:0x400E1000+0x150)&0x30)==0x00 rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" hexmask.long.byte 0x00 0.--7. 1. " RDATA ,Parallel Capture Mode Reception Data" elif (d.l(ad:0x400E1000+0x150)&0x30)==0x10 rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" hexmask.long.word 0x00 0.--15. 1. " RDATA ,Parallel Capture Mode Reception Data" else rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" endif tree.end width 0xB tree.end tree "Port C" base ad:0x400E1200 if ((d.l(ad:0x400E1200+0xE4)&0x01)==0x00) width 13. group.long 0x08++0x03 line.long 0x00 "PIO_PSR,PIO Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Status" "Peripheral,PIO" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Status" "Peripheral,PIO" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Status" "Peripheral,PIO" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Status" "Peripheral,PIO" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Status" "Peripheral,PIO" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Status" "Peripheral,PIO" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Status" "Peripheral,PIO" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Status" "Peripheral,PIO" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Status" "Peripheral,PIO" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Status" "Peripheral,PIO" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Status" "Peripheral,PIO" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Status" "Peripheral,PIO" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Status" "Peripheral,PIO" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Status" "Peripheral,PIO" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Status" "Peripheral,PIO" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Status" "Peripheral,PIO" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Status" "Peripheral,PIO" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Status" "Peripheral,PIO" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Status" "Peripheral,PIO" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Status" "Peripheral,PIO" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Status" "Peripheral,PIO" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Status" "Peripheral,PIO" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Status" "Peripheral,PIO" group.long 0x18++0x03 line.long 0x00 "PIO_OSR,PIO Output Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Output Status" "Input,Output" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Output Status" "Input,Output" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Output Status" "Input,Output" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Output Status" "Input,Output" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Output Status" "Input,Output" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Output Status" "Input,Output" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Output Status" "Input,Output" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Output Status" "Input,Output" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Output Status" "Input,Output" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Output Status" "Input,Output" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Output Status" "Input,Output" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Output Status" "Input,Output" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Output Status" "Input,Output" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Output Status" "Input,Output" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Output Status" "Input,Output" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Output Status" "Input,Output" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Output Status" "Input,Output" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Status" "Input,Output" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Status" "Input,Output" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Status" "Input,Output" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Status" "Input,Output" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Status" "Input,Output" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Status" "Input,Output" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Status" "Input,Output" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Status" "Input,Output" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Status" "Input,Output" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Status" "Input,Output" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Status" "Input,Output" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Status" "Input,Output" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Status" "Input,Output" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Status" "Input,Output" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Status" "Input,Output" group.long 0x28++0x03 line.long 0x00 "PIO_IFSR,PIO Input Filter Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Filer Status" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "PIO_ODSR,PIO Output Data Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Output Data Status" "Low,High" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Output Data Status" "Low,High" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Output Data Status" "Low,High" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Output Data Status" "Low,High" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Output Data Status" "Low,High" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Output Data Status" "Low,High" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Output Data Status" "Low,High" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Output Data Status" "Low,High" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Output Data Status" "Low,High" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Output Data Status" "Low,High" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Output Data Status" "Low,High" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Output Data Status" "Low,High" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Data Status" "Low,High" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Data Status" "Low,High" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Data Status" "Low,High" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Data Status" "Low,High" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Data Status" "Low,High" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Data Status" "Low,High" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Data Status" "Low,High" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Data Status" "Low,High" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Data Status" "Low,High" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Data Status" "Low,High" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Data Status" "Low,High" textline " " rgroup.long 0x3C++0x03 line.long 0x00 "PIO_PDSR,PIO Pin Data Status Register" bitfld.long 0x00 31. " P31 ,PIO31 Output Data Status" "Low,High" bitfld.long 0x00 30. " P30 ,PIO30 Output Data Status" "Low,High" bitfld.long 0x00 29. " P29 ,PIO29 Output Data Status" "Low,High" bitfld.long 0x00 28. " P28 ,PIO28 Output Data Status" "Low,High" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Output Data Status" "Low,High" bitfld.long 0x00 26. " P26 ,PIO26 Output Data Status" "Low,High" bitfld.long 0x00 25. " P25 ,PIO25 Output Data Status" "Low,High" bitfld.long 0x00 24. " P24 ,PIO24 Output Data Status" "Low,High" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Output Data Status" "Low,High" bitfld.long 0x00 22. " P22 ,PIO22 Output Data Status" "Low,High" bitfld.long 0x00 21. " P21 ,PIO21 Output Data Status" "Low,High" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Output Data Status" "Low,High" bitfld.long 0x00 19. " P19 ,PIO19 Output Data Status" "Low,High" bitfld.long 0x00 18. " P18 ,PIO18 Output Data Status" "Low,High" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Output Data Status" "Low,High" bitfld.long 0x00 16. " P16 ,PIO16 Output Data Status" "Low,High" bitfld.long 0x00 15. " P15 ,PIO15 Output Data Status" "Low,High" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Output Data Status" "Low,High" bitfld.long 0x00 13. " P13 ,PIO13 Output Data Status" "Low,High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Output Data Status" "Low,High" bitfld.long 0x00 11. " P11 ,PIO11 Output Data Status" "Low,High" bitfld.long 0x00 10. " P10 ,PIO10 Output Data Status" "Low,High" bitfld.long 0x00 9. " P9 ,PIO9 Output Data Status" "Low,High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Output Data Status" "Low,High" bitfld.long 0x00 7. " P7 ,PIO7 Output Data Status" "Low,High" bitfld.long 0x00 6. " P6 ,PIO6 Output Data Status" "Low,High" bitfld.long 0x00 5. " P5 ,PIO5 Output Data Status" "Low,High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Output Data Status" "Low,High" bitfld.long 0x00 3. " P3 ,PIO3 Output Data Status" "Low,High" bitfld.long 0x00 2. " P2 ,PIO2 Output Data Status" "Low,High" bitfld.long 0x00 1. " P1 ,PIO1 Output Data Status" "Low,High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Output Data Status" "Low,High" textline " " group.long 0x48++0x03 line.long 0x00 "PIO_IMR,PIO Interrupt Mask Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Change Interrupt Mask" "Disabled,Enabled" hgroup.long 0x4c++0x03 hide.long 0x00 "ISR,PIO Interrupt Status Register" in group.long 0x58++0x03 line.long 0x00 "PIO_MDSR,PIO Multi-driver Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Multi Drive Status" "Disabled,Enabled" group.long 0x68++0x03 line.long 0x00 "PIO_PUSR,PIO Pull Up Status Register" setclrfld.long 0x00 31. -0x04 31. -0x08 31. " P31_set/clr ,PIO31 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 30. -0x04 30. -0x08 30. " P30_set/clr ,PIO30 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 29. -0x04 29. -0x08 29. " P29_set/clr ,PIO29 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 28. -0x04 28. -0x08 28. " P28_set/clr ,PIO28 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 27. -0x04 27. -0x08 27. " P27_set/clr ,PIO27 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 26. -0x04 26. -0x08 26. " P26_set/clr ,PIO26 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 25. -0x04 25. -0x08 25. " P25_set/clr ,PIO25 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 24. -0x04 24. -0x08 24. " P24_set/clr ,PIO24 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 23. -0x04 23. -0x08 23. " P23_set/clr ,PIO23 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 22. -0x04 22. -0x08 22. " P22_set/clr ,PIO22 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 21. -0x04 21. -0x08 21. " P21_set/clr ,PIO21 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 20. -0x04 20. -0x08 20. " P20_set/clr ,PIO20 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 19. -0x04 19. -0x08 19. " P19_set/clr ,PIO19 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 18. -0x04 18. -0x08 18. " P18_set/clr ,PIO18 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 17. -0x04 17. -0x08 17. " P17_set/clr ,PIO17 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 16. -0x04 16. -0x08 16. " P16_set/clr ,PIO16 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 15. -0x04 15. -0x08 15. " P15_set/clr ,PIO15 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 14. -0x04 14. -0x08 14. " P14_set/clr ,PIO14 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 13. -0x04 13. -0x08 13. " P13_set/clr ,PIO13 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " P5_set/clr ,PIO5 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Pull Up Status" "Enabled,Disabled" textline " " group.long 0x70++0x07 line.long 0x00 "PIO_ABCDSR1,PIO Peripheral ABCD Select Register 1" bitfld.long 0x00 31. " P31 ,PIO31 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 30. " P30 ,PIO30 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 29. " P29 ,PIO29 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 28. " P28 ,PIO28 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 26. " P26 ,PIO26 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 25. " P25 ,PIO25 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 24. " P24 ,PIO24 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 22. " P22 ,PIO22 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 21. " P21 ,PIO21 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 19. " P19 ,PIO19 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 18. " P18 ,PIO18 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 16. " P16 ,PIO16 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 15. " P15 ,PIO15 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 13. " P13 ,PIO13 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 11. " P11 ,PIO11 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 10. " P10 ,PIO10 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 9. " P9 ,PIO9 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 7. " P7 ,PIO7 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 6. " P6 ,PIO6 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 5. " P5 ,PIO5 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 3. " P3 ,PIO3 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 2. " P2 ,PIO2 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 1. " P1 ,PIO1 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Peripheral Select" "A/C function,B/D function" line.long 0x04 "ABCDSR2,PIO Peripheral ABCD Select Register 2" bitfld.long 0x04 31. " P31 ,PIO31 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 30. " P30 ,PIO30 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 29. " P29 ,PIO29 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 28. " P28 ,PIO28 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 27. " P27 ,PIO27 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 26. " P26 ,PIO26 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 25. " P25 ,PIO25 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 24. " P24 ,PIO24 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 23. " P23 ,PIO23 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 22. " P22 ,PIO22 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 21. " P21 ,PIO21 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 20. " P20 ,PIO20 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 19. " P19 ,PIO19 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 18. " P18 ,PIO18 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 17. " P17 ,PIO17 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 16. " P16 ,PIO16 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 15. " P15 ,PIO15 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 14. " P14 ,PIO14 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 13. " P13 ,PIO13 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 12. " P12 ,PIO12 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 11. " P11 ,PIO11 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 10. " P10 ,PIO10 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 9. " P9 ,PIO9 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 8. " P8 ,PIO8 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 7. " P7 ,PIO7 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 6. " P6 ,PIO6 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 5. " P5 ,PIO5 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 4. " P4 ,PIO4 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 3. " P3 ,PIO3 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 2. " P2 ,PIO2 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 1. " P1 ,PIO1 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 0. " P0 ,PIO0 Peripheral Select" "A/B function,C/D function" textline " " group.long 0x88++0x03 line.long 0x00 "PIO_IFSCSR,PIO Input Filter Slow Clock Status Register" setclrfld.long 0x00 31. -0x04 31. -0x08 31. " P31_set/clr ,PIO31 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 30. -0x04 30. -0x08 30. " P30_set/clr ,PIO30 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 29. -0x04 29. -0x08 29. " P29_set/clr ,PIO29 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 28. -0x04 28. -0x08 28. " P28_set/clr ,PIO28 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 27. -0x04 27. -0x08 27. " P27_set/clr ,PIO27 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 26. -0x04 26. -0x08 26. " P26_set/clr ,PIO26 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 25. -0x04 25. -0x08 25. " P25_set/clr ,PIO25 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 24. -0x04 24. -0x08 24. " P24_set/clr ,PIO24 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 23. -0x04 23. -0x08 23. " P23_set/clr ,PIO23 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 22. -0x04 22. -0x08 22. " P22_set/clr ,PIO22 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 21. -0x04 21. -0x08 21. " P21_set/clr ,PIO21 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 20. -0x04 20. -0x08 20. " P20_set/clr ,PIO20 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 19. -0x04 19. -0x08 19. " P19_set/clr ,PIO19 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 18. -0x04 18. -0x08 18. " P18_set/clr ,PIO18 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 17. -0x04 17. -0x08 17. " P17_set/clr ,PIO17 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 16. -0x04 16. -0x08 16. " P16_set/clr ,PIO16 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 15. -0x04 15. -0x08 15. " P15_set/clr ,PIO15 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 14. -0x04 14. -0x08 14. " P14_set/clr ,PIO14 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 13. -0x04 13. -0x08 13. " P13_set/clr ,PIO13 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" group.long 0x8C++0x03 line.long 0x00 "PIO_SCDR,PIO Slow Clock Divider Debouncing Register" hexmask.long.word 0x00 0.--13. 1. " DIV ,Slow Clock Divider Selection for Debouncing" group.long 0x98++0x03 line.long 0x00 "PIO_PPDSR,PIO Pad Pull Down Status Register" setclrfld.long 0x00 31. -0x04 31. -0x08 31. " P31_set/clr ,PIO31 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 30. -0x04 30. -0x08 30. " P30_set/clr ,PIO30 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 29. -0x04 29. -0x08 29. " P29_set/clr ,PIO29 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 28. -0x04 28. -0x08 28. " P28_set/clr ,PIO28 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 27. -0x04 27. -0x08 27. " P27_set/clr ,PIO27 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 26. -0x04 26. -0x08 26. " P26_set/clr ,PIO26 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 25. -0x04 25. -0x08 25. " P25_set/clr ,PIO25 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 24. -0x04 24. -0x08 24. " P24_set/clr ,PIO24 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 23. -0x04 23. -0x08 23. " P23_set/clr ,PIO23 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 22. -0x04 22. -0x08 22. " P22_set/clr ,PIO22 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 21. -0x04 21. -0x08 21. " P21_set/clr ,PIO21 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 20. -0x04 20. -0x08 20. " P20_set/clr ,PIO20 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 19. -0x04 19. -0x08 19. " P19_set/clr ,PIO19 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 18. -0x04 18. -0x08 18. " P18_set/clr ,PIO18 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 17. -0x04 17. -0x08 17. " P17_set/clr ,PIO17 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 16. -0x04 16. -0x08 16. " P16_set/clr ,PIO16 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 15. -0x04 15. -0x08 15. " P15_set/clr ,PIO15 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 14. -0x04 14. -0x08 14. " P14_set/clr ,PIO14 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 13. -0x04 13. -0x08 13. " P13_set/clr ,PIO13 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " P5_set/clr ,PIO5 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Pull Down Status" "Enabled,Disabled" group.long 0xA8++0x03 line.long 0x00 "PIO_OWSR,PIO Output Write Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Write Status" "Not affected,Affected" width 0x0B else width 13. rgroup.long 0x08++0x03 line.long 0x00 "PIO_PSR,PIO Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Status" "Peripheral,PIO" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Status" "Peripheral,PIO" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Status" "Peripheral,PIO" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Status" "Peripheral,PIO" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Status" "Peripheral,PIO" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Status" "Peripheral,PIO" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Status" "Peripheral,PIO" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Status" "Peripheral,PIO" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Status" "Peripheral,PIO" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Status" "Peripheral,PIO" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Status" "Peripheral,PIO" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Status" "Peripheral,PIO" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Status" "Peripheral,PIO" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Status" "Peripheral,PIO" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Status" "Peripheral,PIO" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Status" "Peripheral,PIO" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Status" "Peripheral,PIO" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Status" "Peripheral,PIO" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Status" "Peripheral,PIO" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Status" "Peripheral,PIO" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Status" "Peripheral,PIO" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Status" "Peripheral,PIO" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Status" "Peripheral,PIO" rgroup.long 0x18++0x03 line.long 0x00 "PIO_OSR,PIO Output Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Output Status" "Input,Output" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Output Status" "Input,Output" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Output Status" "Input,Output" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Output Status" "Input,Output" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Output Status" "Input,Output" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Output Status" "Input,Output" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Output Status" "Input,Output" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Output Status" "Input,Output" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Output Status" "Input,Output" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Output Status" "Input,Output" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Output Status" "Input,Output" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Output Status" "Input,Output" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Output Status" "Input,Output" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Output Status" "Input,Output" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Output Status" "Input,Output" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Output Status" "Input,Output" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Output Status" "Input,Output" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Output Status" "Input,Output" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Output Status" "Input,Output" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Output Status" "Input,Output" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Output Status" "Input,Output" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Output Status" "Input,Output" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Output Status" "Input,Output" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Output Status" "Input,Output" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Output Status" "Input,Output" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Output Status" "Input,Output" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Output Status" "Input,Output" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Output Status" "Input,Output" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Output Status" "Input,Output" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Output Status" "Input,Output" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Output Status" "Input,Output" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Output Status" "Input,Output" rgroup.long 0x28++0x03 line.long 0x00 "PIO_IFSR,PIO Input Filter Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Input Filer Status" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "PIO_ODSR,PIO Output Data Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Output Data Status" "Low,High" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Output Data Status" "Low,High" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Output Data Status" "Low,High" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Output Data Status" "Low,High" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Output Data Status" "Low,High" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Output Data Status" "Low,High" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Output Data Status" "Low,High" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Output Data Status" "Low,High" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Output Data Status" "Low,High" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Output Data Status" "Low,High" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Output Data Status" "Low,High" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Output Data Status" "Low,High" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Data Status" "Low,High" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Data Status" "Low,High" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Data Status" "Low,High" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Data Status" "Low,High" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Data Status" "Low,High" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Data Status" "Low,High" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Data Status" "Low,High" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Data Status" "Low,High" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Data Status" "Low,High" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Data Status" "Low,High" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Data Status" "Low,High" textline " " rgroup.long 0x3C++0x03 line.long 0x00 "PIO_PDSR,PIO Pin Data Status Register" bitfld.long 0x00 31. " P31 ,PIO31 Output Data Status" "Low,High" bitfld.long 0x00 30. " P30 ,PIO30 Output Data Status" "Low,High" bitfld.long 0x00 29. " P29 ,PIO29 Output Data Status" "Low,High" bitfld.long 0x00 28. " P28 ,PIO28 Output Data Status" "Low,High" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Output Data Status" "Low,High" bitfld.long 0x00 26. " P26 ,PIO26 Output Data Status" "Low,High" bitfld.long 0x00 25. " P25 ,PIO25 Output Data Status" "Low,High" bitfld.long 0x00 24. " P24 ,PIO24 Output Data Status" "Low,High" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Output Data Status" "Low,High" bitfld.long 0x00 22. " P22 ,PIO22 Output Data Status" "Low,High" bitfld.long 0x00 21. " P21 ,PIO21 Output Data Status" "Low,High" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Output Data Status" "Low,High" bitfld.long 0x00 19. " P19 ,PIO19 Output Data Status" "Low,High" bitfld.long 0x00 18. " P18 ,PIO18 Output Data Status" "Low,High" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Output Data Status" "Low,High" bitfld.long 0x00 16. " P16 ,PIO16 Output Data Status" "Low,High" bitfld.long 0x00 15. " P15 ,PIO15 Output Data Status" "Low,High" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Output Data Status" "Low,High" bitfld.long 0x00 13. " P13 ,PIO13 Output Data Status" "Low,High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Output Data Status" "Low,High" bitfld.long 0x00 11. " P11 ,PIO11 Output Data Status" "Low,High" bitfld.long 0x00 10. " P10 ,PIO10 Output Data Status" "Low,High" bitfld.long 0x00 9. " P9 ,PIO9 Output Data Status" "Low,High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Output Data Status" "Low,High" bitfld.long 0x00 7. " P7 ,PIO7 Output Data Status" "Low,High" bitfld.long 0x00 6. " P6 ,PIO6 Output Data Status" "Low,High" bitfld.long 0x00 5. " P5 ,PIO5 Output Data Status" "Low,High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Output Data Status" "Low,High" bitfld.long 0x00 3. " P3 ,PIO3 Output Data Status" "Low,High" bitfld.long 0x00 2. " P2 ,PIO2 Output Data Status" "Low,High" bitfld.long 0x00 1. " P1 ,PIO1 Output Data Status" "Low,High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Output Data Status" "Low,High" textline " " group.long 0x48++0x03 line.long 0x00 "PIO_IMR,PIO Interrupt Mask Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Change Interrupt Mask" "Disabled,Enabled" hgroup.long 0x4c++0x03 hide.long 0x00 "ISR,PIO Interrupt Status Register" in rgroup.long 0x58++0x03 line.long 0x00 "PIO_MDSR,PIO Multi-driver Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Multi Drive Status" "Disabled,Enabled" rgroup.long 0x68++0x03 line.long 0x00 "PIO_PUSR,PIO Pull Up Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Pull Up Status" "Enabled,Disabled" textline " " rgroup.long 0x70++0x07 line.long 0x00 "PIO_ABCDSR1,PIO Peripheral ABCD Select Register 1" bitfld.long 0x00 31. " P31 ,PIO31 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 30. " P30 ,PIO30 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 29. " P29 ,PIO29 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 28. " P28 ,PIO28 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 26. " P26 ,PIO26 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 25. " P25 ,PIO25 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 24. " P24 ,PIO24 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 22. " P22 ,PIO22 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 21. " P21 ,PIO21 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 19. " P19 ,PIO19 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 18. " P18 ,PIO18 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 16. " P16 ,PIO16 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 15. " P15 ,PIO15 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 13. " P13 ,PIO13 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 11. " P11 ,PIO11 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 10. " P10 ,PIO10 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 9. " P9 ,PIO9 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 7. " P7 ,PIO7 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 6. " P6 ,PIO6 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 5. " P5 ,PIO5 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 3. " P3 ,PIO3 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 2. " P2 ,PIO2 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 1. " P1 ,PIO1 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Peripheral Select" "A/C function,B/D function" line.long 0x04 "ABCDSR2,PIO Peripheral ABCD Select Register 2" bitfld.long 0x04 31. " P31 ,PIO31 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 30. " P30 ,PIO30 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 29. " P29 ,PIO29 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 28. " P28 ,PIO28 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 27. " P27 ,PIO27 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 26. " P26 ,PIO26 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 25. " P25 ,PIO25 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 24. " P24 ,PIO24 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 23. " P23 ,PIO23 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 22. " P22 ,PIO22 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 21. " P21 ,PIO21 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 20. " P20 ,PIO20 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 19. " P19 ,PIO19 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 18. " P18 ,PIO18 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 17. " P17 ,PIO17 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 16. " P16 ,PIO16 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 15. " P15 ,PIO15 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 14. " P14 ,PIO14 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 13. " P13 ,PIO13 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 12. " P12 ,PIO12 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 11. " P11 ,PIO11 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 10. " P10 ,PIO10 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 9. " P9 ,PIO9 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 8. " P8 ,PIO8 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 7. " P7 ,PIO7 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 6. " P6 ,PIO6 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 5. " P5 ,PIO5 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 4. " P4 ,PIO4 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 3. " P3 ,PIO3 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 2. " P2 ,PIO2 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 1. " P1 ,PIO1 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 0. " P0 ,PIO0 Peripheral Select" "A/B function,C/D function" textline " " group.long 0x88++0x03 line.long 0x00 "PIO_IFSCSR,PIO Input Filter Slow Clock Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" group.long 0x8C++0x03 line.long 0x00 "PIO_SCDR,PIO Slow Clock Divider Debouncing Register" hexmask.long.word 0x00 0.--13. 1. " DIV ,Slow Clock Divider Selection for Debouncing" rgroup.long 0x98++0x03 line.long 0x00 "PIO_PPDSR,PIO Pad Pull Down Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Pull Down Status" "Enabled,Disabled" rgroup.long 0xA8++0x03 line.long 0x00 "PIO_OWSR,PIO Output Write Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Output Write Status" "Not affected,Affected" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Output Write Status" "Not affected,Affected" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Output Write Status" "Not affected,Affected" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Output Write Status" "Not affected,Affected" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Output Write Status" "Not affected,Affected" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Output Write Status" "Not affected,Affected" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Output Write Status" "Not affected,Affected" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Output Write Status" "Not affected,Affected" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Output Write Status" "Not affected,Affected" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Output Write Status" "Not affected,Affected" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Output Write Status" "Not affected,Affected" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Output Write Status" "Not affected,Affected" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Output Write Status" "Not affected,Affected" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Output Write Status" "Not affected,Affected" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Output Write Status" "Not affected,Affected" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Output Write Status" "Not affected,Affected" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Output Write Status" "Not affected,Affected" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Output Write Status" "Not affected,Affected" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Output Write Status" "Not affected,Affected" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Output Write Status" "Not affected,Affected" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Output Write Status" "Not affected,Affected" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Output Write Status" "Not affected,Affected" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Output Write Status" "Not affected,Affected" width 0x0B endif width 13. textline " " group.long 0xB8++0x03 line.long 0x00 "PIO_AIMMR,PIO Additional Interrupt Modes Mask Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Peripheral CD Status" "Both Edge,Registers" textline " " wgroup.long 0xC0++0x03 line.long 0x00 "PIO_ESR,Edge Interrupt Source Selection Select Register" bitfld.long 0x00 31. " P31 ,PIO31 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 30. " P30 ,PIO30 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 29. " P29 ,PIO29 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 28. " P28 ,PIO28 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 26. " P26 ,PIO26 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 25. " P25 ,PIO25 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 24. " P24 ,PIO24 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 22. " P22 ,PIO22 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 21. " P21 ,PIO21 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 19. " P19 ,PIO19 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 18. " P18 ,PIO18 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 16. " P16 ,PIO16 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 15. " P15 ,PIO15 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 13. " P13 ,PIO13 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 11. " P11 ,PIO11 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 10. " P10 ,PIO10 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 9. " P9 ,PIO9 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 7. " P7 ,PIO7 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 6. " P6 ,PIO6 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 5. " P5 ,PIO5 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 3. " P3 ,PIO3 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 2. " P2 ,PIO2 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 1. " P1 ,PIO1 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge Interrupt Source Selection" "No effect,Edge" wgroup.long 0xC4++0x03 line.long 0x00 "PIO_LSR,Level Interrupt Source Selection Status Register" bitfld.long 0x00 31. " P31 ,PIO31 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 30. " P30 ,PIO30 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 29. " P29 ,PIO29 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 28. " P28 ,PIO28 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 26. " P26 ,PIO26 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 25. " P25 ,PIO25 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 24. " P24 ,PIO24 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 22. " P22 ,PIO22 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 21. " P21 ,PIO21 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 19. " P19 ,PIO19 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 18. " P18 ,PIO18 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 16. " P16 ,PIO16 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 15. " P15 ,PIO15 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 13. " P13 ,PIO13 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 11. " P11 ,PIO11 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 10. " P10 ,PIO10 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 9. " P9 ,PIO9 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 7. " P7 ,PIO7 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 6. " P6 ,PIO6 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 5. " P5 ,PIO5 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 3. " P3 ,PIO3 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 2. " P2 ,PIO2 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 1. " P1 ,PIO1 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Level Interrupt Source Selection" "No effect,Level" rgroup.long 0xC8++0x03 line.long 0x00 "PIO_ELSR,Edge/Level Interrupt Source Selection Status Register" bitfld.long 0x00 31. " P31 ,PIO31 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 30. " P30 ,PIO30 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 29. " P29 ,PIO29 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 28. " P28 ,PIO28 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 26. " P26 ,PIO26 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 25. " P25 ,PIO25 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 24. " P24 ,PIO24 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 22. " P22 ,PIO22 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 21. " P21 ,PIO21 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 19. " P19 ,PIO19 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 18. " P18 ,PIO18 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 16. " P16 ,PIO16 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 15. " P15 ,PIO15 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 13. " P13 ,PIO13 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 11. " P11 ,PIO11 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 10. " P10 ,PIO10 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 9. " P9 ,PIO9 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 7. " P7 ,PIO7 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 6. " P6 ,PIO6 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 5. " P5 ,PIO5 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 3. " P3 ,PIO3 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 2. " P2 ,PIO2 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 1. " P1 ,PIO1 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge/Level Interrupt Source Selection" "Edge,Level" wgroup.long 0xD8++0x03 line.long 0x00 "PIO_FELLSR,Falling Edge/Low-Level Select Register" bitfld.long 0x00 31. " P31 ,PIO31 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 30. " P30 ,PIO30 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 29. " P29 ,PIO29 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 28. " P28 ,PIO28 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 26. " P26 ,PIO26 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 25. " P25 ,PIO25 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 24. " P24 ,PIO24 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 22. " P22 ,PIO22 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 21. " P21 ,PIO21 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 19. " P19 ,PIO19 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 18. " P18 ,PIO18 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 16. " P16 ,PIO16 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 15. " P15 ,PIO15 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 13. " P13 ,PIO13 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 11. " P11 ,PIO11 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 10. " P10 ,PIO10 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 9. " P9 ,PIO9 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 7. " P7 ,PIO7 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 6. " P6 ,PIO6 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 5. " P5 ,PIO5 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 3. " P3 ,PIO3 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 2. " P2 ,PIO2 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 1. " P1 ,PIO1 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" wgroup.long 0xD8++0x03 line.long 0x00 "PIO_REHLSR,PIO Rising Edge/High-Level Select Register" bitfld.long 0x00 31. " P31 ,PIO31 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 30. " P30 ,PIO30 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 29. " P29 ,PIO29 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 28. " P28 ,PIO28 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 26. " P26 ,PIO26 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 25. " P25 ,PIO25 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 24. " P24 ,PIO24 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 22. " P22 ,PIO22 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 21. " P21 ,PIO21 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 19. " P19 ,PIO19 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 18. " P18 ,PIO18 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 16. " P16 ,PIO16 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 15. " P15 ,PIO15 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 13. " P13 ,PIO13 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 11. " P11 ,PIO11 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 10. " P10 ,PIO10 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 9. " P9 ,PIO9 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 7. " P7 ,PIO7 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 6. " P6 ,PIO6 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 5. " P5 ,PIO5 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 3. " P3 ,PIO3 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 2. " P2 ,PIO2 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 1. " P1 ,PIO1 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" rgroup.long 0xD8++0x03 line.long 0x00 "PIO_FRLHSR,PIO Fall/Rise - Low/High Status Register" bitfld.long 0x00 31. " P31 ,PIO31 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 30. " P30 ,PIO30 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 29. " P29 ,PIO29 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 28. " P28 ,PIO28 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 26. " P26 ,PIO26 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 25. " P25 ,PIO25 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 24. " P24 ,PIO24 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 22. " P22 ,PIO22 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 21. " P21 ,PIO21 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 19. " P19 ,PIO19 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 18. " P18 ,PIO18 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 16. " P16 ,PIO16 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 15. " P15 ,PIO15 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 13. " P13 ,PIO13 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 11. " P11 ,PIO11 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 10. " P10 ,PIO10 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 9. " P9 ,PIO9 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 7. " P7 ,PIO7 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 6. " P6 ,PIO6 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 5. " P5 ,PIO5 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 3. " P3 ,PIO3 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 2. " P2 ,PIO2 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 1. " P1 ,PIO1 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" rgroup.long 0xE0++0x03 line.long 0x00 "PIO_LOCKSR,PIO Lock Status Register" bitfld.long 0x00 31. " P31 ,PIO31 Lock Status" "Not locked,Locked" bitfld.long 0x00 30. " P30 ,PIO30 Lock Status" "Not locked,Locked" bitfld.long 0x00 29. " P29 ,PIO29 Lock Status" "Not locked,Locked" bitfld.long 0x00 28. " P28 ,PIO28 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Lock Status" "Not locked,Locked" bitfld.long 0x00 26. " P26 ,PIO26 Lock Status" "Not locked,Locked" bitfld.long 0x00 25. " P25 ,PIO25 Lock Status" "Not locked,Locked" bitfld.long 0x00 24. " P24 ,PIO24 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Lock Status" "Not locked,Locked" bitfld.long 0x00 22. " P22 ,PIO22 Lock Status" "Not locked,Locked" bitfld.long 0x00 21. " P21 ,PIO21 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Lock Status" "Not locked,Locked" bitfld.long 0x00 19. " P19 ,PIO19 Lock Status" "Not locked,Locked" bitfld.long 0x00 18. " P18 ,PIO18 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Lock Status" "Not locked,Locked" bitfld.long 0x00 16. " P16 ,PIO16 Lock Status" "Not locked,Locked" bitfld.long 0x00 15. " P15 ,PIO15 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Lock Status" "Not locked,Locked" bitfld.long 0x00 13. " P13 ,PIO13 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Lock Status" "Not locked,Locked" bitfld.long 0x00 11. " P11 ,PIO11 Lock Status" "Not locked,Locked" bitfld.long 0x00 10. " P10 ,PIO10 Lock Status" "Not locked,Locked" bitfld.long 0x00 9. " P9 ,PIO9 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Lock Status" "Not locked,Locked" bitfld.long 0x00 7. " P7 ,PIO7 Lock Status" "Not locked,Locked" bitfld.long 0x00 6. " P6 ,PIO6 Lock Status" "Not locked,Locked" bitfld.long 0x00 5. " P5 ,PIO5 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Lock Status" "Not locked,Locked" bitfld.long 0x00 3. " P3 ,PIO3 Lock Status" "Not locked,Locked" bitfld.long 0x00 2. " P2 ,PIO2 Lock Status" "Not locked,Locked" bitfld.long 0x00 1. " P1 ,PIO1 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Lock Status" "Not locked,Locked" group.long 0xE4++0x03 line.long 0x00 "PIO_WPMR,PIO Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write Protect KEY" bitfld.long 0x00 0. " WPEN ,Write Protect Enable" "Disabled,Enabled" hgroup.long 0xe8++0x03 hide.long 0x00 "WPSR,PIO Write Protect Status Register" in group.long 0x100++0x03 line.long 0x00 "PIO_SCHMITT,PIO Schmitt Trigger Register" bitfld.long 0x00 31. " SCHMITT31 ,Schmitt Trigger 31 Disable" "No,Yes" bitfld.long 0x00 30. " SCHMITT30 ,Schmitt Trigger 30 Disable" "No,Yes" bitfld.long 0x00 29. " SCHMITT29 ,Schmitt Trigger 29 Disable" "No,Yes" bitfld.long 0x00 28. " SCHMITT28 ,Schmitt Trigger 28 Disable" "No,Yes" textline " " bitfld.long 0x00 27. " SCHMITT27 ,Schmitt Trigger 27 Disable" "No,Yes" bitfld.long 0x00 26. " SCHMITT26 ,Schmitt Trigger 26 Disable" "No,Yes" bitfld.long 0x00 25. " SCHMITT25 ,Schmitt Trigger 25 Disable" "No,Yes" bitfld.long 0x00 24. " SCHMITT24 ,Schmitt Trigger 24 Disable" "No,Yes" textline " " bitfld.long 0x00 23. " SCHMITT23 ,Schmitt Trigger 23 Disable" "No,Yes" bitfld.long 0x00 22. " SCHMITT22 ,Schmitt Trigger 22 Disable" "No,Yes" bitfld.long 0x00 21. " SCHMITT21 ,Schmitt Trigger 21 Disable" "No,Yes" textline " " bitfld.long 0x00 20. " SCHMITT20 ,Schmitt Trigger 20 Disable" "No,Yes" bitfld.long 0x00 19. " SCHMITT19 ,Schmitt Trigger 19 Disable" "No,Yes" bitfld.long 0x00 18. " SCHMITT18 ,Schmitt Trigger 18 Disable" "No,Yes" textline " " bitfld.long 0x00 17. " SCHMITT17 ,Schmitt Trigger 17 Disable" "No,Yes" bitfld.long 0x00 16. " SCHMITT16 ,Schmitt Trigger 16 Disable" "No,Yes" bitfld.long 0x00 15. " SCHMITT15 ,Schmitt Trigger 15 Disable" "No,Yes" textline " " bitfld.long 0x00 14. " SCHMITT14 ,Schmitt Trigger 14 Disable" "No,Yes" bitfld.long 0x00 13. " SCHMITT13 ,Schmitt Trigger 13 Disable" "No,Yes" textline " " bitfld.long 0x00 12. " SCHMITT12 ,Schmitt Trigger 12 Disable" "No,Yes" bitfld.long 0x00 11. " SCHMITT11 ,Schmitt Trigger 11 Disable" "No,Yes" bitfld.long 0x00 10. " SCHMITT10 ,Schmitt Trigger 10 Disable" "No,Yes" bitfld.long 0x00 9. " SCHMITT9 ,Schmitt Trigger 9 Disable" "No,Yes" textline " " bitfld.long 0x00 8. " SCHMITT8 ,Schmitt Trigger 8 Disable" "No,Yes" bitfld.long 0x00 7. " SCHMITT7 ,Schmitt Trigger 7 Disable" "No,Yes" bitfld.long 0x00 6. " SCHMITT6 ,Schmitt Trigger 6 Disable" "No,Yes" bitfld.long 0x00 5. " SCHMITT5 ,Schmitt Trigger 5 Disable" "No,Yes" textline " " bitfld.long 0x00 4. " SCHMITT4 ,Schmitt Trigger 4 Disable" "No,Yes" bitfld.long 0x00 3. " SCHMITT3 ,Schmitt Trigger 3 Disable" "No,Yes" bitfld.long 0x00 2. " SCHMITT2 ,Schmitt Trigger 2 Disable" "No,Yes" bitfld.long 0x00 1. " SCHMITT1 ,Schmitt Trigger 1 Disable" "No,Yes" textline " " bitfld.long 0x00 0. " SCHMITT0 ,Schmitt Trigger 0 Disable" "No,Yes" textline " " tree "Parallel Capture" if ((d.l(ad:0x400E1200+0xE4)&0x01)==0x00) group.long 0x150++0x03 line.long 0x00 "PIO_PCMR,PIO Parallel Capture Mode Register" bitfld.long 0x00 11. " FRSTS ,Parallel Capture Mode First Sample" "Even index,Odd index" bitfld.long 0x00 10. " HALFS ,Parallel Capture Mode Half Sampling" "All data,One time out of two" textline " " bitfld.long 0x00 9. " ALWYS ,Parallel Capture Mode Always Sampling" "No,Yes" bitfld.long 0x00 4.--5. " DSIZE ,Parallel Capture Mode Data Size" "8 bit,16 bit,32 bit,?..." textline " " bitfld.long 0x00 0. " PCEN ,Parallel Capture Mode Enable" "Disabled,Enabled" else rgroup.long 0x150++0x03 line.long 0x00 "PIO_PCMR,PIO Parallel Capture Mode Register" bitfld.long 0x00 11. " FRSTS ,Parallel Capture Mode First Sample" "Even index,Odd index" bitfld.long 0x00 10. " HALFS ,Parallel Capture Mode Half Sampling" "All data,One time out of two" textline " " bitfld.long 0x00 9. " ALWYS ,Parallel Capture Mode Always Sampling" "No,Yes" bitfld.long 0x00 4.--5. " DSIZE ,Parallel Capture Mode Data Size" "8 bit,16 bit,32 bit," textline " " bitfld.long 0x00 0. " PCEN ,Parallel Capture Mode Enable" "Disabled,Enabled" endif group.long 0x15C++0x03 line.long 0x00 "PIO_PCIMR,PIO Parallel Capture Interrupt Mask Register" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXBUFF_set/clr ,Reception Buffer Full Interrupt Enable" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " ENDRX_set/clr ,End of Reception Transfer Interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " OVRE_set/clr ,Parallel Capture Mode Overrun Error Interrupt Enable" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " DRDY_set/clr ,Parallel Capture Mode Data Ready Interrupt Enable" "Disabled,Enabled" hgroup.long 0x160++0x03 hide.long 0x00 "PIO_PCISR,PIO Parallel Capture Interrupt Status Register" if (d.l(ad:0x400E1200+0x150)&0x30)==0x00 rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" hexmask.long.byte 0x00 0.--7. 1. " RDATA ,Parallel Capture Mode Reception Data" elif (d.l(ad:0x400E1200+0x150)&0x30)==0x10 rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" hexmask.long.word 0x00 0.--15. 1. " RDATA ,Parallel Capture Mode Reception Data" else rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" endif tree.end width 0xB tree.end elif cpuis("ATSAM4S*B") tree "Port A" base ad:0x400E0E00 if ((d.l(ad:0x400E0E00+0xE4)&0x01)==0x00) width 13. group.long 0x08++0x03 line.long 0x00 "PIO_PSR,PIO Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Status" "Peripheral,PIO" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Status" "Peripheral,PIO" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Status" "Peripheral,PIO" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Status" "Peripheral,PIO" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Status" "Peripheral,PIO" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Status" "Peripheral,PIO" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Status" "Peripheral,PIO" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Status" "Peripheral,PIO" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Status" "Peripheral,PIO" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Status" "Peripheral,PIO" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Status" "Peripheral,PIO" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Status" "Peripheral,PIO" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Status" "Peripheral,PIO" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Status" "Peripheral,PIO" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Status" "Peripheral,PIO" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Status" "Peripheral,PIO" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Status" "Peripheral,PIO" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Status" "Peripheral,PIO" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Status" "Peripheral,PIO" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Status" "Peripheral,PIO" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Status" "Peripheral,PIO" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Status" "Peripheral,PIO" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Status" "Peripheral,PIO" group.long 0x18++0x03 line.long 0x00 "PIO_OSR,PIO Output Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Output Status" "Input,Output" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Output Status" "Input,Output" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Output Status" "Input,Output" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Output Status" "Input,Output" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Output Status" "Input,Output" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Output Status" "Input,Output" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Output Status" "Input,Output" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Output Status" "Input,Output" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Output Status" "Input,Output" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Output Status" "Input,Output" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Output Status" "Input,Output" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Output Status" "Input,Output" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Output Status" "Input,Output" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Output Status" "Input,Output" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Output Status" "Input,Output" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Output Status" "Input,Output" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Output Status" "Input,Output" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Status" "Input,Output" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Status" "Input,Output" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Status" "Input,Output" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Status" "Input,Output" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Status" "Input,Output" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Status" "Input,Output" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Status" "Input,Output" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Status" "Input,Output" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Status" "Input,Output" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Status" "Input,Output" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Status" "Input,Output" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Status" "Input,Output" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Status" "Input,Output" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Status" "Input,Output" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Status" "Input,Output" group.long 0x28++0x03 line.long 0x00 "PIO_IFSR,PIO Input Filter Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Filer Status" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "PIO_ODSR,PIO Output Data Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Output Data Status" "Low,High" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Output Data Status" "Low,High" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Output Data Status" "Low,High" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Output Data Status" "Low,High" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Output Data Status" "Low,High" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Output Data Status" "Low,High" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Output Data Status" "Low,High" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Output Data Status" "Low,High" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Output Data Status" "Low,High" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Output Data Status" "Low,High" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Output Data Status" "Low,High" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Output Data Status" "Low,High" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Data Status" "Low,High" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Data Status" "Low,High" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Data Status" "Low,High" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Data Status" "Low,High" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Data Status" "Low,High" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Data Status" "Low,High" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Data Status" "Low,High" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Data Status" "Low,High" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Data Status" "Low,High" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Data Status" "Low,High" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Data Status" "Low,High" textline " " rgroup.long 0x3C++0x03 line.long 0x00 "PIO_PDSR,PIO Pin Data Status Register" bitfld.long 0x00 31. " P31 ,PIO31 Output Data Status" "Low,High" bitfld.long 0x00 30. " P30 ,PIO30 Output Data Status" "Low,High" bitfld.long 0x00 29. " P29 ,PIO29 Output Data Status" "Low,High" bitfld.long 0x00 28. " P28 ,PIO28 Output Data Status" "Low,High" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Output Data Status" "Low,High" bitfld.long 0x00 26. " P26 ,PIO26 Output Data Status" "Low,High" bitfld.long 0x00 25. " P25 ,PIO25 Output Data Status" "Low,High" bitfld.long 0x00 24. " P24 ,PIO24 Output Data Status" "Low,High" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Output Data Status" "Low,High" bitfld.long 0x00 22. " P22 ,PIO22 Output Data Status" "Low,High" bitfld.long 0x00 21. " P21 ,PIO21 Output Data Status" "Low,High" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Output Data Status" "Low,High" bitfld.long 0x00 19. " P19 ,PIO19 Output Data Status" "Low,High" bitfld.long 0x00 18. " P18 ,PIO18 Output Data Status" "Low,High" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Output Data Status" "Low,High" bitfld.long 0x00 16. " P16 ,PIO16 Output Data Status" "Low,High" bitfld.long 0x00 15. " P15 ,PIO15 Output Data Status" "Low,High" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Output Data Status" "Low,High" bitfld.long 0x00 13. " P13 ,PIO13 Output Data Status" "Low,High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Output Data Status" "Low,High" bitfld.long 0x00 11. " P11 ,PIO11 Output Data Status" "Low,High" bitfld.long 0x00 10. " P10 ,PIO10 Output Data Status" "Low,High" bitfld.long 0x00 9. " P9 ,PIO9 Output Data Status" "Low,High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Output Data Status" "Low,High" bitfld.long 0x00 7. " P7 ,PIO7 Output Data Status" "Low,High" bitfld.long 0x00 6. " P6 ,PIO6 Output Data Status" "Low,High" bitfld.long 0x00 5. " P5 ,PIO5 Output Data Status" "Low,High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Output Data Status" "Low,High" bitfld.long 0x00 3. " P3 ,PIO3 Output Data Status" "Low,High" bitfld.long 0x00 2. " P2 ,PIO2 Output Data Status" "Low,High" bitfld.long 0x00 1. " P1 ,PIO1 Output Data Status" "Low,High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Output Data Status" "Low,High" textline " " group.long 0x48++0x03 line.long 0x00 "PIO_IMR,PIO Interrupt Mask Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Change Interrupt Mask" "Disabled,Enabled" hgroup.long 0x4c++0x03 hide.long 0x00 "ISR,PIO Interrupt Status Register" in group.long 0x58++0x03 line.long 0x00 "PIO_MDSR,PIO Multi-driver Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Multi Drive Status" "Disabled,Enabled" group.long 0x68++0x03 line.long 0x00 "PIO_PUSR,PIO Pull Up Status Register" setclrfld.long 0x00 31. -0x04 31. -0x08 31. " P31_set/clr ,PIO31 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 30. -0x04 30. -0x08 30. " P30_set/clr ,PIO30 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 29. -0x04 29. -0x08 29. " P29_set/clr ,PIO29 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 28. -0x04 28. -0x08 28. " P28_set/clr ,PIO28 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 27. -0x04 27. -0x08 27. " P27_set/clr ,PIO27 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 26. -0x04 26. -0x08 26. " P26_set/clr ,PIO26 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 25. -0x04 25. -0x08 25. " P25_set/clr ,PIO25 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 24. -0x04 24. -0x08 24. " P24_set/clr ,PIO24 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 23. -0x04 23. -0x08 23. " P23_set/clr ,PIO23 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 22. -0x04 22. -0x08 22. " P22_set/clr ,PIO22 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 21. -0x04 21. -0x08 21. " P21_set/clr ,PIO21 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 20. -0x04 20. -0x08 20. " P20_set/clr ,PIO20 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 19. -0x04 19. -0x08 19. " P19_set/clr ,PIO19 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 18. -0x04 18. -0x08 18. " P18_set/clr ,PIO18 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 17. -0x04 17. -0x08 17. " P17_set/clr ,PIO17 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 16. -0x04 16. -0x08 16. " P16_set/clr ,PIO16 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 15. -0x04 15. -0x08 15. " P15_set/clr ,PIO15 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 14. -0x04 14. -0x08 14. " P14_set/clr ,PIO14 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 13. -0x04 13. -0x08 13. " P13_set/clr ,PIO13 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " P5_set/clr ,PIO5 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Pull Up Status" "Enabled,Disabled" textline " " group.long 0x70++0x07 line.long 0x00 "PIO_ABCDSR1,PIO Peripheral ABCD Select Register 1" bitfld.long 0x00 31. " P31 ,PIO31 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 30. " P30 ,PIO30 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 29. " P29 ,PIO29 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 28. " P28 ,PIO28 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 26. " P26 ,PIO26 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 25. " P25 ,PIO25 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 24. " P24 ,PIO24 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 22. " P22 ,PIO22 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 21. " P21 ,PIO21 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 19. " P19 ,PIO19 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 18. " P18 ,PIO18 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 16. " P16 ,PIO16 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 15. " P15 ,PIO15 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 13. " P13 ,PIO13 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 11. " P11 ,PIO11 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 10. " P10 ,PIO10 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 9. " P9 ,PIO9 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 7. " P7 ,PIO7 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 6. " P6 ,PIO6 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 5. " P5 ,PIO5 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 3. " P3 ,PIO3 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 2. " P2 ,PIO2 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 1. " P1 ,PIO1 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Peripheral Select" "A/C function,B/D function" line.long 0x04 "ABCDSR2,PIO Peripheral ABCD Select Register 2" bitfld.long 0x04 31. " P31 ,PIO31 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 30. " P30 ,PIO30 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 29. " P29 ,PIO29 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 28. " P28 ,PIO28 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 27. " P27 ,PIO27 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 26. " P26 ,PIO26 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 25. " P25 ,PIO25 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 24. " P24 ,PIO24 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 23. " P23 ,PIO23 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 22. " P22 ,PIO22 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 21. " P21 ,PIO21 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 20. " P20 ,PIO20 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 19. " P19 ,PIO19 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 18. " P18 ,PIO18 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 17. " P17 ,PIO17 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 16. " P16 ,PIO16 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 15. " P15 ,PIO15 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 14. " P14 ,PIO14 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 13. " P13 ,PIO13 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 12. " P12 ,PIO12 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 11. " P11 ,PIO11 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 10. " P10 ,PIO10 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 9. " P9 ,PIO9 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 8. " P8 ,PIO8 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 7. " P7 ,PIO7 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 6. " P6 ,PIO6 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 5. " P5 ,PIO5 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 4. " P4 ,PIO4 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 3. " P3 ,PIO3 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 2. " P2 ,PIO2 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 1. " P1 ,PIO1 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 0. " P0 ,PIO0 Peripheral Select" "A/B function,C/D function" textline " " group.long 0x88++0x03 line.long 0x00 "PIO_IFSCSR,PIO Input Filter Slow Clock Status Register" setclrfld.long 0x00 31. -0x04 31. -0x08 31. " P31_set/clr ,PIO31 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 30. -0x04 30. -0x08 30. " P30_set/clr ,PIO30 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 29. -0x04 29. -0x08 29. " P29_set/clr ,PIO29 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 28. -0x04 28. -0x08 28. " P28_set/clr ,PIO28 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 27. -0x04 27. -0x08 27. " P27_set/clr ,PIO27 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 26. -0x04 26. -0x08 26. " P26_set/clr ,PIO26 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 25. -0x04 25. -0x08 25. " P25_set/clr ,PIO25 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 24. -0x04 24. -0x08 24. " P24_set/clr ,PIO24 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 23. -0x04 23. -0x08 23. " P23_set/clr ,PIO23 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 22. -0x04 22. -0x08 22. " P22_set/clr ,PIO22 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 21. -0x04 21. -0x08 21. " P21_set/clr ,PIO21 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 20. -0x04 20. -0x08 20. " P20_set/clr ,PIO20 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 19. -0x04 19. -0x08 19. " P19_set/clr ,PIO19 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 18. -0x04 18. -0x08 18. " P18_set/clr ,PIO18 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 17. -0x04 17. -0x08 17. " P17_set/clr ,PIO17 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 16. -0x04 16. -0x08 16. " P16_set/clr ,PIO16 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 15. -0x04 15. -0x08 15. " P15_set/clr ,PIO15 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 14. -0x04 14. -0x08 14. " P14_set/clr ,PIO14 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 13. -0x04 13. -0x08 13. " P13_set/clr ,PIO13 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" group.long 0x8C++0x03 line.long 0x00 "PIO_SCDR,PIO Slow Clock Divider Debouncing Register" hexmask.long.word 0x00 0.--13. 1. " DIV ,Slow Clock Divider Selection for Debouncing" group.long 0x98++0x03 line.long 0x00 "PIO_PPDSR,PIO Pad Pull Down Status Register" setclrfld.long 0x00 31. -0x04 31. -0x08 31. " P31_set/clr ,PIO31 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 30. -0x04 30. -0x08 30. " P30_set/clr ,PIO30 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 29. -0x04 29. -0x08 29. " P29_set/clr ,PIO29 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 28. -0x04 28. -0x08 28. " P28_set/clr ,PIO28 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 27. -0x04 27. -0x08 27. " P27_set/clr ,PIO27 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 26. -0x04 26. -0x08 26. " P26_set/clr ,PIO26 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 25. -0x04 25. -0x08 25. " P25_set/clr ,PIO25 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 24. -0x04 24. -0x08 24. " P24_set/clr ,PIO24 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 23. -0x04 23. -0x08 23. " P23_set/clr ,PIO23 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 22. -0x04 22. -0x08 22. " P22_set/clr ,PIO22 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 21. -0x04 21. -0x08 21. " P21_set/clr ,PIO21 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 20. -0x04 20. -0x08 20. " P20_set/clr ,PIO20 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 19. -0x04 19. -0x08 19. " P19_set/clr ,PIO19 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 18. -0x04 18. -0x08 18. " P18_set/clr ,PIO18 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 17. -0x04 17. -0x08 17. " P17_set/clr ,PIO17 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 16. -0x04 16. -0x08 16. " P16_set/clr ,PIO16 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 15. -0x04 15. -0x08 15. " P15_set/clr ,PIO15 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 14. -0x04 14. -0x08 14. " P14_set/clr ,PIO14 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 13. -0x04 13. -0x08 13. " P13_set/clr ,PIO13 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " P5_set/clr ,PIO5 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Pull Down Status" "Enabled,Disabled" group.long 0xA8++0x03 line.long 0x00 "PIO_OWSR,PIO Output Write Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Write Status" "Not affected,Affected" width 0x0B else width 13. rgroup.long 0x08++0x03 line.long 0x00 "PIO_PSR,PIO Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Status" "Peripheral,PIO" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Status" "Peripheral,PIO" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Status" "Peripheral,PIO" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Status" "Peripheral,PIO" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Status" "Peripheral,PIO" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Status" "Peripheral,PIO" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Status" "Peripheral,PIO" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Status" "Peripheral,PIO" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Status" "Peripheral,PIO" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Status" "Peripheral,PIO" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Status" "Peripheral,PIO" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Status" "Peripheral,PIO" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Status" "Peripheral,PIO" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Status" "Peripheral,PIO" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Status" "Peripheral,PIO" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Status" "Peripheral,PIO" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Status" "Peripheral,PIO" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Status" "Peripheral,PIO" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Status" "Peripheral,PIO" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Status" "Peripheral,PIO" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Status" "Peripheral,PIO" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Status" "Peripheral,PIO" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Status" "Peripheral,PIO" rgroup.long 0x18++0x03 line.long 0x00 "PIO_OSR,PIO Output Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Output Status" "Input,Output" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Output Status" "Input,Output" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Output Status" "Input,Output" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Output Status" "Input,Output" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Output Status" "Input,Output" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Output Status" "Input,Output" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Output Status" "Input,Output" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Output Status" "Input,Output" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Output Status" "Input,Output" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Output Status" "Input,Output" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Output Status" "Input,Output" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Output Status" "Input,Output" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Output Status" "Input,Output" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Output Status" "Input,Output" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Output Status" "Input,Output" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Output Status" "Input,Output" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Output Status" "Input,Output" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Output Status" "Input,Output" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Output Status" "Input,Output" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Output Status" "Input,Output" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Output Status" "Input,Output" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Output Status" "Input,Output" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Output Status" "Input,Output" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Output Status" "Input,Output" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Output Status" "Input,Output" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Output Status" "Input,Output" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Output Status" "Input,Output" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Output Status" "Input,Output" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Output Status" "Input,Output" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Output Status" "Input,Output" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Output Status" "Input,Output" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Output Status" "Input,Output" rgroup.long 0x28++0x03 line.long 0x00 "PIO_IFSR,PIO Input Filter Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Input Filer Status" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "PIO_ODSR,PIO Output Data Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Output Data Status" "Low,High" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Output Data Status" "Low,High" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Output Data Status" "Low,High" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Output Data Status" "Low,High" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Output Data Status" "Low,High" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Output Data Status" "Low,High" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Output Data Status" "Low,High" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Output Data Status" "Low,High" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Output Data Status" "Low,High" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Output Data Status" "Low,High" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Output Data Status" "Low,High" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Output Data Status" "Low,High" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Data Status" "Low,High" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Data Status" "Low,High" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Data Status" "Low,High" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Data Status" "Low,High" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Data Status" "Low,High" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Data Status" "Low,High" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Data Status" "Low,High" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Data Status" "Low,High" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Data Status" "Low,High" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Data Status" "Low,High" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Data Status" "Low,High" textline " " rgroup.long 0x3C++0x03 line.long 0x00 "PIO_PDSR,PIO Pin Data Status Register" bitfld.long 0x00 31. " P31 ,PIO31 Output Data Status" "Low,High" bitfld.long 0x00 30. " P30 ,PIO30 Output Data Status" "Low,High" bitfld.long 0x00 29. " P29 ,PIO29 Output Data Status" "Low,High" bitfld.long 0x00 28. " P28 ,PIO28 Output Data Status" "Low,High" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Output Data Status" "Low,High" bitfld.long 0x00 26. " P26 ,PIO26 Output Data Status" "Low,High" bitfld.long 0x00 25. " P25 ,PIO25 Output Data Status" "Low,High" bitfld.long 0x00 24. " P24 ,PIO24 Output Data Status" "Low,High" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Output Data Status" "Low,High" bitfld.long 0x00 22. " P22 ,PIO22 Output Data Status" "Low,High" bitfld.long 0x00 21. " P21 ,PIO21 Output Data Status" "Low,High" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Output Data Status" "Low,High" bitfld.long 0x00 19. " P19 ,PIO19 Output Data Status" "Low,High" bitfld.long 0x00 18. " P18 ,PIO18 Output Data Status" "Low,High" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Output Data Status" "Low,High" bitfld.long 0x00 16. " P16 ,PIO16 Output Data Status" "Low,High" bitfld.long 0x00 15. " P15 ,PIO15 Output Data Status" "Low,High" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Output Data Status" "Low,High" bitfld.long 0x00 13. " P13 ,PIO13 Output Data Status" "Low,High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Output Data Status" "Low,High" bitfld.long 0x00 11. " P11 ,PIO11 Output Data Status" "Low,High" bitfld.long 0x00 10. " P10 ,PIO10 Output Data Status" "Low,High" bitfld.long 0x00 9. " P9 ,PIO9 Output Data Status" "Low,High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Output Data Status" "Low,High" bitfld.long 0x00 7. " P7 ,PIO7 Output Data Status" "Low,High" bitfld.long 0x00 6. " P6 ,PIO6 Output Data Status" "Low,High" bitfld.long 0x00 5. " P5 ,PIO5 Output Data Status" "Low,High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Output Data Status" "Low,High" bitfld.long 0x00 3. " P3 ,PIO3 Output Data Status" "Low,High" bitfld.long 0x00 2. " P2 ,PIO2 Output Data Status" "Low,High" bitfld.long 0x00 1. " P1 ,PIO1 Output Data Status" "Low,High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Output Data Status" "Low,High" textline " " group.long 0x48++0x03 line.long 0x00 "PIO_IMR,PIO Interrupt Mask Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Change Interrupt Mask" "Disabled,Enabled" hgroup.long 0x4c++0x03 hide.long 0x00 "ISR,PIO Interrupt Status Register" in rgroup.long 0x58++0x03 line.long 0x00 "PIO_MDSR,PIO Multi-driver Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Multi Drive Status" "Disabled,Enabled" rgroup.long 0x68++0x03 line.long 0x00 "PIO_PUSR,PIO Pull Up Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Pull Up Status" "Enabled,Disabled" textline " " rgroup.long 0x70++0x07 line.long 0x00 "PIO_ABCDSR1,PIO Peripheral ABCD Select Register 1" bitfld.long 0x00 31. " P31 ,PIO31 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 30. " P30 ,PIO30 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 29. " P29 ,PIO29 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 28. " P28 ,PIO28 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 26. " P26 ,PIO26 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 25. " P25 ,PIO25 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 24. " P24 ,PIO24 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 22. " P22 ,PIO22 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 21. " P21 ,PIO21 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 19. " P19 ,PIO19 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 18. " P18 ,PIO18 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 16. " P16 ,PIO16 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 15. " P15 ,PIO15 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 13. " P13 ,PIO13 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 11. " P11 ,PIO11 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 10. " P10 ,PIO10 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 9. " P9 ,PIO9 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 7. " P7 ,PIO7 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 6. " P6 ,PIO6 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 5. " P5 ,PIO5 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 3. " P3 ,PIO3 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 2. " P2 ,PIO2 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 1. " P1 ,PIO1 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Peripheral Select" "A/C function,B/D function" line.long 0x04 "ABCDSR2,PIO Peripheral ABCD Select Register 2" bitfld.long 0x04 31. " P31 ,PIO31 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 30. " P30 ,PIO30 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 29. " P29 ,PIO29 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 28. " P28 ,PIO28 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 27. " P27 ,PIO27 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 26. " P26 ,PIO26 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 25. " P25 ,PIO25 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 24. " P24 ,PIO24 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 23. " P23 ,PIO23 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 22. " P22 ,PIO22 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 21. " P21 ,PIO21 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 20. " P20 ,PIO20 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 19. " P19 ,PIO19 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 18. " P18 ,PIO18 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 17. " P17 ,PIO17 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 16. " P16 ,PIO16 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 15. " P15 ,PIO15 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 14. " P14 ,PIO14 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 13. " P13 ,PIO13 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 12. " P12 ,PIO12 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 11. " P11 ,PIO11 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 10. " P10 ,PIO10 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 9. " P9 ,PIO9 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 8. " P8 ,PIO8 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 7. " P7 ,PIO7 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 6. " P6 ,PIO6 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 5. " P5 ,PIO5 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 4. " P4 ,PIO4 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 3. " P3 ,PIO3 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 2. " P2 ,PIO2 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 1. " P1 ,PIO1 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 0. " P0 ,PIO0 Peripheral Select" "A/B function,C/D function" textline " " group.long 0x88++0x03 line.long 0x00 "PIO_IFSCSR,PIO Input Filter Slow Clock Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" group.long 0x8C++0x03 line.long 0x00 "PIO_SCDR,PIO Slow Clock Divider Debouncing Register" hexmask.long.word 0x00 0.--13. 1. " DIV ,Slow Clock Divider Selection for Debouncing" rgroup.long 0x98++0x03 line.long 0x00 "PIO_PPDSR,PIO Pad Pull Down Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Pull Down Status" "Enabled,Disabled" rgroup.long 0xA8++0x03 line.long 0x00 "PIO_OWSR,PIO Output Write Status Register" bitfld.long 0x00 31. " P31_set/clr ,PIO31 Output Write Status" "Not affected,Affected" bitfld.long 0x00 30. " P30_set/clr ,PIO30 Output Write Status" "Not affected,Affected" bitfld.long 0x00 29. " P29_set/clr ,PIO29 Output Write Status" "Not affected,Affected" bitfld.long 0x00 28. " P28_set/clr ,PIO28 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 27. " P27_set/clr ,PIO27 Output Write Status" "Not affected,Affected" bitfld.long 0x00 26. " P26_set/clr ,PIO26 Output Write Status" "Not affected,Affected" bitfld.long 0x00 25. " P25_set/clr ,PIO25 Output Write Status" "Not affected,Affected" bitfld.long 0x00 24. " P24_set/clr ,PIO24 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 23. " P23_set/clr ,PIO23 Output Write Status" "Not affected,Affected" bitfld.long 0x00 22. " P22_set/clr ,PIO22 Output Write Status" "Not affected,Affected" bitfld.long 0x00 21. " P21_set/clr ,PIO21 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 20. " P20_set/clr ,PIO20 Output Write Status" "Not affected,Affected" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Output Write Status" "Not affected,Affected" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Output Write Status" "Not affected,Affected" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Output Write Status" "Not affected,Affected" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Output Write Status" "Not affected,Affected" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Output Write Status" "Not affected,Affected" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Output Write Status" "Not affected,Affected" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Output Write Status" "Not affected,Affected" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Output Write Status" "Not affected,Affected" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Output Write Status" "Not affected,Affected" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Output Write Status" "Not affected,Affected" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Output Write Status" "Not affected,Affected" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Output Write Status" "Not affected,Affected" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Output Write Status" "Not affected,Affected" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Output Write Status" "Not affected,Affected" width 0x0B endif width 13. textline " " group.long 0xB8++0x03 line.long 0x00 "PIO_AIMMR,PIO Additional Interrupt Modes Mask Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31_set/clr ,PIO31 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30_set/clr ,PIO30 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29_set/clr ,PIO29 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28_set/clr ,PIO28 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27_set/clr ,PIO27 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26_set/clr ,PIO26 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25_set/clr ,PIO25 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24_set/clr ,PIO24 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23_set/clr ,PIO23 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22_set/clr ,PIO22 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21_set/clr ,PIO21 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Peripheral CD Status" "Both Edge,Registers" textline " " wgroup.long 0xC0++0x03 line.long 0x00 "PIO_ESR,Edge Interrupt Source Selection Select Register" bitfld.long 0x00 31. " P31 ,PIO31 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 30. " P30 ,PIO30 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 29. " P29 ,PIO29 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 28. " P28 ,PIO28 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 26. " P26 ,PIO26 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 25. " P25 ,PIO25 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 24. " P24 ,PIO24 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 22. " P22 ,PIO22 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 21. " P21 ,PIO21 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 19. " P19 ,PIO19 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 18. " P18 ,PIO18 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 16. " P16 ,PIO16 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 15. " P15 ,PIO15 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 13. " P13 ,PIO13 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 11. " P11 ,PIO11 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 10. " P10 ,PIO10 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 9. " P9 ,PIO9 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 7. " P7 ,PIO7 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 6. " P6 ,PIO6 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 5. " P5 ,PIO5 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 3. " P3 ,PIO3 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 2. " P2 ,PIO2 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 1. " P1 ,PIO1 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge Interrupt Source Selection" "No effect,Edge" wgroup.long 0xC4++0x03 line.long 0x00 "PIO_LSR,Level Interrupt Source Selection Status Register" bitfld.long 0x00 31. " P31 ,PIO31 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 30. " P30 ,PIO30 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 29. " P29 ,PIO29 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 28. " P28 ,PIO28 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 26. " P26 ,PIO26 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 25. " P25 ,PIO25 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 24. " P24 ,PIO24 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 22. " P22 ,PIO22 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 21. " P21 ,PIO21 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 19. " P19 ,PIO19 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 18. " P18 ,PIO18 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 16. " P16 ,PIO16 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 15. " P15 ,PIO15 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 13. " P13 ,PIO13 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 11. " P11 ,PIO11 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 10. " P10 ,PIO10 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 9. " P9 ,PIO9 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 7. " P7 ,PIO7 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 6. " P6 ,PIO6 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 5. " P5 ,PIO5 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 3. " P3 ,PIO3 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 2. " P2 ,PIO2 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 1. " P1 ,PIO1 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Level Interrupt Source Selection" "No effect,Level" rgroup.long 0xC8++0x03 line.long 0x00 "PIO_ELSR,Edge/Level Interrupt Source Selection Status Register" bitfld.long 0x00 31. " P31 ,PIO31 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 30. " P30 ,PIO30 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 29. " P29 ,PIO29 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 28. " P28 ,PIO28 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 26. " P26 ,PIO26 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 25. " P25 ,PIO25 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 24. " P24 ,PIO24 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 22. " P22 ,PIO22 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 21. " P21 ,PIO21 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 19. " P19 ,PIO19 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 18. " P18 ,PIO18 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 16. " P16 ,PIO16 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 15. " P15 ,PIO15 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 13. " P13 ,PIO13 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 11. " P11 ,PIO11 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 10. " P10 ,PIO10 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 9. " P9 ,PIO9 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 7. " P7 ,PIO7 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 6. " P6 ,PIO6 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 5. " P5 ,PIO5 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 3. " P3 ,PIO3 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 2. " P2 ,PIO2 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 1. " P1 ,PIO1 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge/Level Interrupt Source Selection" "Edge,Level" wgroup.long 0xD8++0x03 line.long 0x00 "PIO_FELLSR,Falling Edge/Low-Level Select Register" bitfld.long 0x00 31. " P31 ,PIO31 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 30. " P30 ,PIO30 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 29. " P29 ,PIO29 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 28. " P28 ,PIO28 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 26. " P26 ,PIO26 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 25. " P25 ,PIO25 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 24. " P24 ,PIO24 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 22. " P22 ,PIO22 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 21. " P21 ,PIO21 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 19. " P19 ,PIO19 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 18. " P18 ,PIO18 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 16. " P16 ,PIO16 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 15. " P15 ,PIO15 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 13. " P13 ,PIO13 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 11. " P11 ,PIO11 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 10. " P10 ,PIO10 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 9. " P9 ,PIO9 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 7. " P7 ,PIO7 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 6. " P6 ,PIO6 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 5. " P5 ,PIO5 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 3. " P3 ,PIO3 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 2. " P2 ,PIO2 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 1. " P1 ,PIO1 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" wgroup.long 0xD8++0x03 line.long 0x00 "PIO_REHLSR,PIO Rising Edge/High-Level Select Register" bitfld.long 0x00 31. " P31 ,PIO31 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 30. " P30 ,PIO30 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 29. " P29 ,PIO29 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 28. " P28 ,PIO28 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 26. " P26 ,PIO26 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 25. " P25 ,PIO25 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 24. " P24 ,PIO24 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 22. " P22 ,PIO22 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 21. " P21 ,PIO21 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 19. " P19 ,PIO19 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 18. " P18 ,PIO18 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 16. " P16 ,PIO16 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 15. " P15 ,PIO15 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 13. " P13 ,PIO13 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 11. " P11 ,PIO11 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 10. " P10 ,PIO10 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 9. " P9 ,PIO9 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 7. " P7 ,PIO7 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 6. " P6 ,PIO6 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 5. " P5 ,PIO5 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 3. " P3 ,PIO3 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 2. " P2 ,PIO2 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 1. " P1 ,PIO1 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" rgroup.long 0xD8++0x03 line.long 0x00 "PIO_FRLHSR,PIO Fall/Rise - Low/High Status Register" bitfld.long 0x00 31. " P31 ,PIO31 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 30. " P30 ,PIO30 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 29. " P29 ,PIO29 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 28. " P28 ,PIO28 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 26. " P26 ,PIO26 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 25. " P25 ,PIO25 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 24. " P24 ,PIO24 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 22. " P22 ,PIO22 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 21. " P21 ,PIO21 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 19. " P19 ,PIO19 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 18. " P18 ,PIO18 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 16. " P16 ,PIO16 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 15. " P15 ,PIO15 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 13. " P13 ,PIO13 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 11. " P11 ,PIO11 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 10. " P10 ,PIO10 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 9. " P9 ,PIO9 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 7. " P7 ,PIO7 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 6. " P6 ,PIO6 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 5. " P5 ,PIO5 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 3. " P3 ,PIO3 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 2. " P2 ,PIO2 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 1. " P1 ,PIO1 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" rgroup.long 0xE0++0x03 line.long 0x00 "PIO_LOCKSR,PIO Lock Status Register" bitfld.long 0x00 31. " P31 ,PIO31 Lock Status" "Not locked,Locked" bitfld.long 0x00 30. " P30 ,PIO30 Lock Status" "Not locked,Locked" bitfld.long 0x00 29. " P29 ,PIO29 Lock Status" "Not locked,Locked" bitfld.long 0x00 28. " P28 ,PIO28 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 27. " P27 ,PIO27 Lock Status" "Not locked,Locked" bitfld.long 0x00 26. " P26 ,PIO26 Lock Status" "Not locked,Locked" bitfld.long 0x00 25. " P25 ,PIO25 Lock Status" "Not locked,Locked" bitfld.long 0x00 24. " P24 ,PIO24 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 23. " P23 ,PIO23 Lock Status" "Not locked,Locked" bitfld.long 0x00 22. " P22 ,PIO22 Lock Status" "Not locked,Locked" bitfld.long 0x00 21. " P21 ,PIO21 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 20. " P20 ,PIO20 Lock Status" "Not locked,Locked" bitfld.long 0x00 19. " P19 ,PIO19 Lock Status" "Not locked,Locked" bitfld.long 0x00 18. " P18 ,PIO18 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Lock Status" "Not locked,Locked" bitfld.long 0x00 16. " P16 ,PIO16 Lock Status" "Not locked,Locked" bitfld.long 0x00 15. " P15 ,PIO15 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Lock Status" "Not locked,Locked" bitfld.long 0x00 13. " P13 ,PIO13 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Lock Status" "Not locked,Locked" bitfld.long 0x00 11. " P11 ,PIO11 Lock Status" "Not locked,Locked" bitfld.long 0x00 10. " P10 ,PIO10 Lock Status" "Not locked,Locked" bitfld.long 0x00 9. " P9 ,PIO9 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Lock Status" "Not locked,Locked" bitfld.long 0x00 7. " P7 ,PIO7 Lock Status" "Not locked,Locked" bitfld.long 0x00 6. " P6 ,PIO6 Lock Status" "Not locked,Locked" bitfld.long 0x00 5. " P5 ,PIO5 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Lock Status" "Not locked,Locked" bitfld.long 0x00 3. " P3 ,PIO3 Lock Status" "Not locked,Locked" bitfld.long 0x00 2. " P2 ,PIO2 Lock Status" "Not locked,Locked" bitfld.long 0x00 1. " P1 ,PIO1 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Lock Status" "Not locked,Locked" group.long 0xE4++0x03 line.long 0x00 "PIO_WPMR,PIO Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write Protect KEY" bitfld.long 0x00 0. " WPEN ,Write Protect Enable" "Disabled,Enabled" hgroup.long 0xe8++0x03 hide.long 0x00 "WPSR,PIO Write Protect Status Register" in group.long 0x100++0x03 line.long 0x00 "PIO_SCHMITT,PIO Schmitt Trigger Register" bitfld.long 0x00 31. " SCHMITT31 ,Schmitt Trigger 31 Disable" "No,Yes" bitfld.long 0x00 30. " SCHMITT30 ,Schmitt Trigger 30 Disable" "No,Yes" bitfld.long 0x00 29. " SCHMITT29 ,Schmitt Trigger 29 Disable" "No,Yes" bitfld.long 0x00 28. " SCHMITT28 ,Schmitt Trigger 28 Disable" "No,Yes" textline " " bitfld.long 0x00 27. " SCHMITT27 ,Schmitt Trigger 27 Disable" "No,Yes" bitfld.long 0x00 26. " SCHMITT26 ,Schmitt Trigger 26 Disable" "No,Yes" bitfld.long 0x00 25. " SCHMITT25 ,Schmitt Trigger 25 Disable" "No,Yes" bitfld.long 0x00 24. " SCHMITT24 ,Schmitt Trigger 24 Disable" "No,Yes" textline " " bitfld.long 0x00 23. " SCHMITT23 ,Schmitt Trigger 23 Disable" "No,Yes" bitfld.long 0x00 22. " SCHMITT22 ,Schmitt Trigger 22 Disable" "No,Yes" bitfld.long 0x00 21. " SCHMITT21 ,Schmitt Trigger 21 Disable" "No,Yes" textline " " bitfld.long 0x00 20. " SCHMITT20 ,Schmitt Trigger 20 Disable" "No,Yes" bitfld.long 0x00 19. " SCHMITT19 ,Schmitt Trigger 19 Disable" "No,Yes" bitfld.long 0x00 18. " SCHMITT18 ,Schmitt Trigger 18 Disable" "No,Yes" textline " " bitfld.long 0x00 17. " SCHMITT17 ,Schmitt Trigger 17 Disable" "No,Yes" bitfld.long 0x00 16. " SCHMITT16 ,Schmitt Trigger 16 Disable" "No,Yes" bitfld.long 0x00 15. " SCHMITT15 ,Schmitt Trigger 15 Disable" "No,Yes" textline " " bitfld.long 0x00 14. " SCHMITT14 ,Schmitt Trigger 14 Disable" "No,Yes" bitfld.long 0x00 13. " SCHMITT13 ,Schmitt Trigger 13 Disable" "No,Yes" textline " " bitfld.long 0x00 12. " SCHMITT12 ,Schmitt Trigger 12 Disable" "No,Yes" bitfld.long 0x00 11. " SCHMITT11 ,Schmitt Trigger 11 Disable" "No,Yes" bitfld.long 0x00 10. " SCHMITT10 ,Schmitt Trigger 10 Disable" "No,Yes" bitfld.long 0x00 9. " SCHMITT9 ,Schmitt Trigger 9 Disable" "No,Yes" textline " " bitfld.long 0x00 8. " SCHMITT8 ,Schmitt Trigger 8 Disable" "No,Yes" bitfld.long 0x00 7. " SCHMITT7 ,Schmitt Trigger 7 Disable" "No,Yes" bitfld.long 0x00 6. " SCHMITT6 ,Schmitt Trigger 6 Disable" "No,Yes" bitfld.long 0x00 5. " SCHMITT5 ,Schmitt Trigger 5 Disable" "No,Yes" textline " " bitfld.long 0x00 4. " SCHMITT4 ,Schmitt Trigger 4 Disable" "No,Yes" bitfld.long 0x00 3. " SCHMITT3 ,Schmitt Trigger 3 Disable" "No,Yes" bitfld.long 0x00 2. " SCHMITT2 ,Schmitt Trigger 2 Disable" "No,Yes" bitfld.long 0x00 1. " SCHMITT1 ,Schmitt Trigger 1 Disable" "No,Yes" textline " " bitfld.long 0x00 0. " SCHMITT0 ,Schmitt Trigger 0 Disable" "No,Yes" textline " " tree "Parallel Capture" if ((d.l(ad:0x400E0E00+0xE4)&0x01)==0x00) group.long 0x150++0x03 line.long 0x00 "PIO_PCMR,PIO Parallel Capture Mode Register" bitfld.long 0x00 11. " FRSTS ,Parallel Capture Mode First Sample" "Even index,Odd index" bitfld.long 0x00 10. " HALFS ,Parallel Capture Mode Half Sampling" "All data,One time out of two" textline " " bitfld.long 0x00 9. " ALWYS ,Parallel Capture Mode Always Sampling" "No,Yes" bitfld.long 0x00 4.--5. " DSIZE ,Parallel Capture Mode Data Size" "8 bit,16 bit,32 bit,?..." textline " " bitfld.long 0x00 0. " PCEN ,Parallel Capture Mode Enable" "Disabled,Enabled" else rgroup.long 0x150++0x03 line.long 0x00 "PIO_PCMR,PIO Parallel Capture Mode Register" bitfld.long 0x00 11. " FRSTS ,Parallel Capture Mode First Sample" "Even index,Odd index" bitfld.long 0x00 10. " HALFS ,Parallel Capture Mode Half Sampling" "All data,One time out of two" textline " " bitfld.long 0x00 9. " ALWYS ,Parallel Capture Mode Always Sampling" "No,Yes" bitfld.long 0x00 4.--5. " DSIZE ,Parallel Capture Mode Data Size" "8 bit,16 bit,32 bit," textline " " bitfld.long 0x00 0. " PCEN ,Parallel Capture Mode Enable" "Disabled,Enabled" endif group.long 0x15C++0x03 line.long 0x00 "PIO_PCIMR,PIO Parallel Capture Interrupt Mask Register" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXBUFF_set/clr ,Reception Buffer Full Interrupt Enable" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " ENDRX_set/clr ,End of Reception Transfer Interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " OVRE_set/clr ,Parallel Capture Mode Overrun Error Interrupt Enable" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " DRDY_set/clr ,Parallel Capture Mode Data Ready Interrupt Enable" "Disabled,Enabled" hgroup.long 0x160++0x03 hide.long 0x00 "PIO_PCISR,PIO Parallel Capture Interrupt Status Register" if (d.l(ad:0x400E0E00+0x150)&0x30)==0x00 rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" hexmask.long.byte 0x00 0.--7. 1. " RDATA ,Parallel Capture Mode Reception Data" elif (d.l(ad:0x400E0E00+0x150)&0x30)==0x10 rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" hexmask.long.word 0x00 0.--15. 1. " RDATA ,Parallel Capture Mode Reception Data" else rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" endif tree.end width 0xB tree "PDC (Peripheral DMA Controller)" base ad:0x400E0E68 width 9. group.long 0x100++0x01F line.long 0x00 "PIOA_RPR,Receive Pointer Register" line.long 0x04 "PIOA_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "PIOA_TPR,Transmit Pointer Register" line.long 0x0c "PIOA_TCR,Transmit Counter Register" hexmask.long.word 0x0C 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "PIOA_RNPR,Receive Next Pointer Register" line.long 0x14 "PIOA_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "PIOA_TNPR,Transmit Next Pointer Register" line.long 0x1c "PIOA_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "PIOA_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disable" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enable" bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disable" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enable" rgroup.long 0x124++0x03 line.long 0x00 "PIOA_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0x0B tree.end tree.end tree "Port B" base ad:0x400E1000 if ((d.l(ad:0x400E1000+0xE4)&0x01)==0x00) width 13. group.long 0x08++0x03 line.long 0x00 "PIO_PSR,PIO Status Register" setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Status" "Peripheral,PIO" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Status" "Peripheral,PIO" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Status" "Peripheral,PIO" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Status" "Peripheral,PIO" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Status" "Peripheral,PIO" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Status" "Peripheral,PIO" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Status" "Peripheral,PIO" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Status" "Peripheral,PIO" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Status" "Peripheral,PIO" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Status" "Peripheral,PIO" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Status" "Peripheral,PIO" group.long 0x18++0x03 line.long 0x00 "PIO_OSR,PIO Output Status Register" setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Status" "Input,Output" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Status" "Input,Output" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Status" "Input,Output" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Status" "Input,Output" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Status" "Input,Output" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Status" "Input,Output" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Status" "Input,Output" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Status" "Input,Output" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Status" "Input,Output" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Status" "Input,Output" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Status" "Input,Output" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Status" "Input,Output" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Status" "Input,Output" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Status" "Input,Output" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Status" "Input,Output" group.long 0x28++0x03 line.long 0x00 "PIO_IFSR,PIO Input Filter Status Register" setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Filer Status" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "PIO_ODSR,PIO Output Data Status Register" setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Data Status" "Low,High" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Data Status" "Low,High" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Data Status" "Low,High" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Data Status" "Low,High" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Data Status" "Low,High" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Data Status" "Low,High" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Data Status" "Low,High" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Data Status" "Low,High" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Data Status" "Low,High" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Data Status" "Low,High" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Data Status" "Low,High" textline " " rgroup.long 0x3C++0x03 line.long 0x00 "PIO_PDSR,PIO Pin Data Status Register" bitfld.long 0x00 14. " P14 ,PIO14 Output Data Status" "Low,High" bitfld.long 0x00 13. " P13 ,PIO13 Output Data Status" "Low,High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Output Data Status" "Low,High" bitfld.long 0x00 11. " P11 ,PIO11 Output Data Status" "Low,High" bitfld.long 0x00 10. " P10 ,PIO10 Output Data Status" "Low,High" bitfld.long 0x00 9. " P9 ,PIO9 Output Data Status" "Low,High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Output Data Status" "Low,High" bitfld.long 0x00 7. " P7 ,PIO7 Output Data Status" "Low,High" bitfld.long 0x00 6. " P6 ,PIO6 Output Data Status" "Low,High" bitfld.long 0x00 5. " P5 ,PIO5 Output Data Status" "Low,High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Output Data Status" "Low,High" bitfld.long 0x00 3. " P3 ,PIO3 Output Data Status" "Low,High" bitfld.long 0x00 2. " P2 ,PIO2 Output Data Status" "Low,High" bitfld.long 0x00 1. " P1 ,PIO1 Output Data Status" "Low,High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Output Data Status" "Low,High" textline " " group.long 0x48++0x03 line.long 0x00 "PIO_IMR,PIO Interrupt Mask Register" setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Change Interrupt Mask" "Disabled,Enabled" hgroup.long 0x4c++0x03 hide.long 0x00 "ISR,PIO Interrupt Status Register" in group.long 0x58++0x03 line.long 0x00 "PIO_MDSR,PIO Multi-driver Status Register" setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Multi Drive Status" "Disabled,Enabled" group.long 0x68++0x03 line.long 0x00 "PIO_PUSR,PIO Pull Up Status Register" setclrfld.long 0x00 14. -0x04 14. -0x08 14. " P14_set/clr ,PIO14 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 13. -0x04 13. -0x08 13. " P13_set/clr ,PIO13 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " P5_set/clr ,PIO5 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Pull Up Status" "Enabled,Disabled" textline " " group.long 0x70++0x07 line.long 0x00 "PIO_ABCDSR1,PIO Peripheral ABCD Select Register 1" bitfld.long 0x00 14. " P14 ,PIO14 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 13. " P13 ,PIO13 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 11. " P11 ,PIO11 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 10. " P10 ,PIO10 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 9. " P9 ,PIO9 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 7. " P7 ,PIO7 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 6. " P6 ,PIO6 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 5. " P5 ,PIO5 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 3. " P3 ,PIO3 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 2. " P2 ,PIO2 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 1. " P1 ,PIO1 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Peripheral Select" "A/C function,B/D function" line.long 0x04 "ABCDSR2,PIO Peripheral ABCD Select Register 2" bitfld.long 0x04 14. " P14 ,PIO14 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 13. " P13 ,PIO13 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 12. " P12 ,PIO12 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 11. " P11 ,PIO11 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 10. " P10 ,PIO10 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 9. " P9 ,PIO9 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 8. " P8 ,PIO8 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 7. " P7 ,PIO7 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 6. " P6 ,PIO6 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 5. " P5 ,PIO5 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 4. " P4 ,PIO4 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 3. " P3 ,PIO3 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 2. " P2 ,PIO2 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 1. " P1 ,PIO1 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 0. " P0 ,PIO0 Peripheral Select" "A/B function,C/D function" textline " " group.long 0x88++0x03 line.long 0x00 "PIO_IFSCSR,PIO Input Filter Slow Clock Status Register" setclrfld.long 0x00 14. -0x04 14. -0x08 14. " P14_set/clr ,PIO14 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 13. -0x04 13. -0x08 13. " P13_set/clr ,PIO13 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" group.long 0x8C++0x03 line.long 0x00 "PIO_SCDR,PIO Slow Clock Divider Debouncing Register" hexmask.long.word 0x00 0.--13. 1. " DIV ,Slow Clock Divider Selection for Debouncing" group.long 0x98++0x03 line.long 0x00 "PIO_PPDSR,PIO Pad Pull Down Status Register" setclrfld.long 0x00 14. -0x04 14. -0x08 14. " P14_set/clr ,PIO14 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 13. -0x04 13. -0x08 13. " P13_set/clr ,PIO13 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " P5_set/clr ,PIO5 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Pull Down Status" "Enabled,Disabled" group.long 0xA8++0x03 line.long 0x00 "PIO_OWSR,PIO Output Write Status Register" setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Write Status" "Not affected,Affected" width 0x0B else width 13. rgroup.long 0x08++0x03 line.long 0x00 "PIO_PSR,PIO Status Register" bitfld.long 0x00 14. " P14_set/clr ,PIO14 Status" "Peripheral,PIO" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Status" "Peripheral,PIO" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Status" "Peripheral,PIO" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Status" "Peripheral,PIO" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Status" "Peripheral,PIO" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Status" "Peripheral,PIO" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Status" "Peripheral,PIO" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Status" "Peripheral,PIO" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Status" "Peripheral,PIO" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Status" "Peripheral,PIO" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Status" "Peripheral,PIO" rgroup.long 0x18++0x03 line.long 0x00 "PIO_OSR,PIO Output Status Register" bitfld.long 0x00 14. " P14_set/clr ,PIO14 Output Status" "Input,Output" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Output Status" "Input,Output" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Output Status" "Input,Output" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Output Status" "Input,Output" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Output Status" "Input,Output" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Output Status" "Input,Output" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Output Status" "Input,Output" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Output Status" "Input,Output" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Output Status" "Input,Output" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Output Status" "Input,Output" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Output Status" "Input,Output" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Output Status" "Input,Output" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Output Status" "Input,Output" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Output Status" "Input,Output" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Output Status" "Input,Output" rgroup.long 0x28++0x03 line.long 0x00 "PIO_IFSR,PIO Input Filter Status Register" bitfld.long 0x00 14. " P14_set/clr ,PIO14 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Input Filer Status" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "PIO_ODSR,PIO Output Data Status Register" setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Data Status" "Low,High" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Data Status" "Low,High" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Data Status" "Low,High" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Data Status" "Low,High" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Data Status" "Low,High" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Data Status" "Low,High" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Data Status" "Low,High" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Data Status" "Low,High" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Data Status" "Low,High" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Data Status" "Low,High" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Data Status" "Low,High" textline " " rgroup.long 0x3C++0x03 line.long 0x00 "PIO_PDSR,PIO Pin Data Status Register" bitfld.long 0x00 14. " P14 ,PIO14 Output Data Status" "Low,High" bitfld.long 0x00 13. " P13 ,PIO13 Output Data Status" "Low,High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Output Data Status" "Low,High" bitfld.long 0x00 11. " P11 ,PIO11 Output Data Status" "Low,High" bitfld.long 0x00 10. " P10 ,PIO10 Output Data Status" "Low,High" bitfld.long 0x00 9. " P9 ,PIO9 Output Data Status" "Low,High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Output Data Status" "Low,High" bitfld.long 0x00 7. " P7 ,PIO7 Output Data Status" "Low,High" bitfld.long 0x00 6. " P6 ,PIO6 Output Data Status" "Low,High" bitfld.long 0x00 5. " P5 ,PIO5 Output Data Status" "Low,High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Output Data Status" "Low,High" bitfld.long 0x00 3. " P3 ,PIO3 Output Data Status" "Low,High" bitfld.long 0x00 2. " P2 ,PIO2 Output Data Status" "Low,High" bitfld.long 0x00 1. " P1 ,PIO1 Output Data Status" "Low,High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Output Data Status" "Low,High" textline " " group.long 0x48++0x03 line.long 0x00 "PIO_IMR,PIO Interrupt Mask Register" setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Change Interrupt Mask" "Disabled,Enabled" hgroup.long 0x4c++0x03 hide.long 0x00 "ISR,PIO Interrupt Status Register" in rgroup.long 0x58++0x03 line.long 0x00 "PIO_MDSR,PIO Multi-driver Status Register" bitfld.long 0x00 14. " P14_set/clr ,PIO14 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Multi Drive Status" "Disabled,Enabled" rgroup.long 0x68++0x03 line.long 0x00 "PIO_PUSR,PIO Pull Up Status Register" bitfld.long 0x00 14. " P14_set/clr ,PIO14 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Pull Up Status" "Enabled,Disabled" textline " " rgroup.long 0x70++0x07 line.long 0x00 "PIO_ABCDSR1,PIO Peripheral ABCD Select Register 1" bitfld.long 0x00 14. " P14 ,PIO14 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 13. " P13 ,PIO13 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 11. " P11 ,PIO11 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 10. " P10 ,PIO10 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 9. " P9 ,PIO9 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 7. " P7 ,PIO7 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 6. " P6 ,PIO6 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 5. " P5 ,PIO5 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 3. " P3 ,PIO3 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 2. " P2 ,PIO2 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 1. " P1 ,PIO1 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Peripheral Select" "A/C function,B/D function" line.long 0x04 "ABCDSR2,PIO Peripheral ABCD Select Register 2" bitfld.long 0x04 14. " P14 ,PIO14 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 13. " P13 ,PIO13 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 12. " P12 ,PIO12 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 11. " P11 ,PIO11 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 10. " P10 ,PIO10 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 9. " P9 ,PIO9 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 8. " P8 ,PIO8 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 7. " P7 ,PIO7 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 6. " P6 ,PIO6 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 5. " P5 ,PIO5 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 4. " P4 ,PIO4 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 3. " P3 ,PIO3 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 2. " P2 ,PIO2 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 1. " P1 ,PIO1 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 0. " P0 ,PIO0 Peripheral Select" "A/B function,C/D function" textline " " group.long 0x88++0x03 line.long 0x00 "PIO_IFSCSR,PIO Input Filter Slow Clock Status Register" bitfld.long 0x00 14. " P14_set/clr ,PIO14 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" group.long 0x8C++0x03 line.long 0x00 "PIO_SCDR,PIO Slow Clock Divider Debouncing Register" hexmask.long.word 0x00 0.--13. 1. " DIV ,Slow Clock Divider Selection for Debouncing" rgroup.long 0x98++0x03 line.long 0x00 "PIO_PPDSR,PIO Pad Pull Down Status Register" bitfld.long 0x00 14. " P14_set/clr ,PIO14 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Pull Down Status" "Enabled,Disabled" rgroup.long 0xA8++0x03 line.long 0x00 "PIO_OWSR,PIO Output Write Status Register" bitfld.long 0x00 14. " P14_set/clr ,PIO14 Output Write Status" "Not affected,Affected" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Output Write Status" "Not affected,Affected" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Output Write Status" "Not affected,Affected" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Output Write Status" "Not affected,Affected" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Output Write Status" "Not affected,Affected" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Output Write Status" "Not affected,Affected" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Output Write Status" "Not affected,Affected" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Output Write Status" "Not affected,Affected" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Output Write Status" "Not affected,Affected" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Output Write Status" "Not affected,Affected" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Output Write Status" "Not affected,Affected" width 0x0B endif width 13. textline " " group.long 0xB8++0x03 line.long 0x00 "PIO_AIMMR,PIO Additional Interrupt Modes Mask Register" setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Peripheral CD Status" "Both Edge,Registers" textline " " wgroup.long 0xC0++0x03 line.long 0x00 "PIO_ESR,Edge Interrupt Source Selection Select Register" bitfld.long 0x00 14. " P14 ,PIO14 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 13. " P13 ,PIO13 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 11. " P11 ,PIO11 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 10. " P10 ,PIO10 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 9. " P9 ,PIO9 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 7. " P7 ,PIO7 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 6. " P6 ,PIO6 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 5. " P5 ,PIO5 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 3. " P3 ,PIO3 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 2. " P2 ,PIO2 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 1. " P1 ,PIO1 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge Interrupt Source Selection" "No effect,Edge" wgroup.long 0xC4++0x03 line.long 0x00 "PIO_LSR,Level Interrupt Source Selection Status Register" bitfld.long 0x00 14. " P14 ,PIO14 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 13. " P13 ,PIO13 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 11. " P11 ,PIO11 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 10. " P10 ,PIO10 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 9. " P9 ,PIO9 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 7. " P7 ,PIO7 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 6. " P6 ,PIO6 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 5. " P5 ,PIO5 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 3. " P3 ,PIO3 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 2. " P2 ,PIO2 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 1. " P1 ,PIO1 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Level Interrupt Source Selection" "No effect,Level" rgroup.long 0xC8++0x03 line.long 0x00 "PIO_ELSR,Edge/Level Interrupt Source Selection Status Register" bitfld.long 0x00 14. " P14 ,PIO14 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 13. " P13 ,PIO13 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 11. " P11 ,PIO11 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 10. " P10 ,PIO10 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 9. " P9 ,PIO9 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 7. " P7 ,PIO7 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 6. " P6 ,PIO6 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 5. " P5 ,PIO5 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 3. " P3 ,PIO3 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 2. " P2 ,PIO2 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 1. " P1 ,PIO1 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge/Level Interrupt Source Selection" "Edge,Level" wgroup.long 0xD8++0x03 line.long 0x00 "PIO_FELLSR,Falling Edge/Low-Level Select Register" bitfld.long 0x00 14. " P14 ,PIO14 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 13. " P13 ,PIO13 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 11. " P11 ,PIO11 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 10. " P10 ,PIO10 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 9. " P9 ,PIO9 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 7. " P7 ,PIO7 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 6. " P6 ,PIO6 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 5. " P5 ,PIO5 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 3. " P3 ,PIO3 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 2. " P2 ,PIO2 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 1. " P1 ,PIO1 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" wgroup.long 0xD8++0x03 line.long 0x00 "PIO_REHLSR,PIO Rising Edge/High-Level Select Register" bitfld.long 0x00 14. " P14 ,PIO14 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 13. " P13 ,PIO13 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 11. " P11 ,PIO11 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 10. " P10 ,PIO10 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 9. " P9 ,PIO9 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 7. " P7 ,PIO7 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 6. " P6 ,PIO6 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 5. " P5 ,PIO5 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 3. " P3 ,PIO3 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 2. " P2 ,PIO2 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 1. " P1 ,PIO1 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" rgroup.long 0xD8++0x03 line.long 0x00 "PIO_FRLHSR,PIO Fall/Rise - Low/High Status Register" bitfld.long 0x00 14. " P14 ,PIO14 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 13. " P13 ,PIO13 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 11. " P11 ,PIO11 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 10. " P10 ,PIO10 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 9. " P9 ,PIO9 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 7. " P7 ,PIO7 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 6. " P6 ,PIO6 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 5. " P5 ,PIO5 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 3. " P3 ,PIO3 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 2. " P2 ,PIO2 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 1. " P1 ,PIO1 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" rgroup.long 0xE0++0x03 line.long 0x00 "PIO_LOCKSR,PIO Lock Status Register" bitfld.long 0x00 14. " P14 ,PIO14 Lock Status" "Not locked,Locked" bitfld.long 0x00 13. " P13 ,PIO13 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Lock Status" "Not locked,Locked" bitfld.long 0x00 11. " P11 ,PIO11 Lock Status" "Not locked,Locked" bitfld.long 0x00 10. " P10 ,PIO10 Lock Status" "Not locked,Locked" bitfld.long 0x00 9. " P9 ,PIO9 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Lock Status" "Not locked,Locked" bitfld.long 0x00 7. " P7 ,PIO7 Lock Status" "Not locked,Locked" bitfld.long 0x00 6. " P6 ,PIO6 Lock Status" "Not locked,Locked" bitfld.long 0x00 5. " P5 ,PIO5 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Lock Status" "Not locked,Locked" bitfld.long 0x00 3. " P3 ,PIO3 Lock Status" "Not locked,Locked" bitfld.long 0x00 2. " P2 ,PIO2 Lock Status" "Not locked,Locked" bitfld.long 0x00 1. " P1 ,PIO1 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Lock Status" "Not locked,Locked" group.long 0xE4++0x03 line.long 0x00 "PIO_WPMR,PIO Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write Protect KEY" bitfld.long 0x00 0. " WPEN ,Write Protect Enable" "Disabled,Enabled" hgroup.long 0xe8++0x03 hide.long 0x00 "WPSR,PIO Write Protect Status Register" in group.long 0x100++0x03 line.long 0x00 "PIO_SCHMITT,PIO Schmitt Trigger Register" bitfld.long 0x00 14. " SCHMITT14 ,Schmitt Trigger 14 Disable" "No,Yes" bitfld.long 0x00 13. " SCHMITT13 ,Schmitt Trigger 13 Disable" "No,Yes" textline " " bitfld.long 0x00 12. " SCHMITT12 ,Schmitt Trigger 12 Disable" "No,Yes" bitfld.long 0x00 11. " SCHMITT11 ,Schmitt Trigger 11 Disable" "No,Yes" bitfld.long 0x00 10. " SCHMITT10 ,Schmitt Trigger 10 Disable" "No,Yes" bitfld.long 0x00 9. " SCHMITT9 ,Schmitt Trigger 9 Disable" "No,Yes" textline " " bitfld.long 0x00 8. " SCHMITT8 ,Schmitt Trigger 8 Disable" "No,Yes" bitfld.long 0x00 7. " SCHMITT7 ,Schmitt Trigger 7 Disable" "No,Yes" bitfld.long 0x00 6. " SCHMITT6 ,Schmitt Trigger 6 Disable" "No,Yes" bitfld.long 0x00 5. " SCHMITT5 ,Schmitt Trigger 5 Disable" "No,Yes" textline " " bitfld.long 0x00 4. " SCHMITT4 ,Schmitt Trigger 4 Disable" "No,Yes" bitfld.long 0x00 3. " SCHMITT3 ,Schmitt Trigger 3 Disable" "No,Yes" bitfld.long 0x00 2. " SCHMITT2 ,Schmitt Trigger 2 Disable" "No,Yes" bitfld.long 0x00 1. " SCHMITT1 ,Schmitt Trigger 1 Disable" "No,Yes" textline " " bitfld.long 0x00 0. " SCHMITT0 ,Schmitt Trigger 0 Disable" "No,Yes" textline " " tree "Parallel Capture" if ((d.l(ad:0x400E1000+0xE4)&0x01)==0x00) group.long 0x150++0x03 line.long 0x00 "PIO_PCMR,PIO Parallel Capture Mode Register" bitfld.long 0x00 11. " FRSTS ,Parallel Capture Mode First Sample" "Even index,Odd index" bitfld.long 0x00 10. " HALFS ,Parallel Capture Mode Half Sampling" "All data,One time out of two" textline " " bitfld.long 0x00 9. " ALWYS ,Parallel Capture Mode Always Sampling" "No,Yes" bitfld.long 0x00 4.--5. " DSIZE ,Parallel Capture Mode Data Size" "8 bit,16 bit,32 bit,?..." textline " " bitfld.long 0x00 0. " PCEN ,Parallel Capture Mode Enable" "Disabled,Enabled" else rgroup.long 0x150++0x03 line.long 0x00 "PIO_PCMR,PIO Parallel Capture Mode Register" bitfld.long 0x00 11. " FRSTS ,Parallel Capture Mode First Sample" "Even index,Odd index" bitfld.long 0x00 10. " HALFS ,Parallel Capture Mode Half Sampling" "All data,One time out of two" textline " " bitfld.long 0x00 9. " ALWYS ,Parallel Capture Mode Always Sampling" "No,Yes" bitfld.long 0x00 4.--5. " DSIZE ,Parallel Capture Mode Data Size" "8 bit,16 bit,32 bit," textline " " bitfld.long 0x00 0. " PCEN ,Parallel Capture Mode Enable" "Disabled,Enabled" endif group.long 0x15C++0x03 line.long 0x00 "PIO_PCIMR,PIO Parallel Capture Interrupt Mask Register" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXBUFF_set/clr ,Reception Buffer Full Interrupt Enable" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " ENDRX_set/clr ,End of Reception Transfer Interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " OVRE_set/clr ,Parallel Capture Mode Overrun Error Interrupt Enable" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " DRDY_set/clr ,Parallel Capture Mode Data Ready Interrupt Enable" "Disabled,Enabled" hgroup.long 0x160++0x03 hide.long 0x00 "PIO_PCISR,PIO Parallel Capture Interrupt Status Register" if (d.l(ad:0x400E1000+0x150)&0x30)==0x00 rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" hexmask.long.byte 0x00 0.--7. 1. " RDATA ,Parallel Capture Mode Reception Data" elif (d.l(ad:0x400E1000+0x150)&0x30)==0x10 rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" hexmask.long.word 0x00 0.--15. 1. " RDATA ,Parallel Capture Mode Reception Data" else rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" endif tree.end width 0xB tree.end else tree "Port A" base ad:0x400E0E00 if ((d.l(ad:0x400E0E00+0xE4)&0x01)==0x00) width 13. group.long 0x08++0x03 line.long 0x00 "PIO_PSR,PIO Status Register" setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Status" "Peripheral,PIO" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Status" "Peripheral,PIO" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Status" "Peripheral,PIO" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Status" "Peripheral,PIO" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Status" "Peripheral,PIO" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Status" "Peripheral,PIO" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Status" "Peripheral,PIO" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Status" "Peripheral,PIO" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Status" "Peripheral,PIO" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Status" "Peripheral,PIO" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Status" "Peripheral,PIO" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Status" "Peripheral,PIO" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Status" "Peripheral,PIO" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Status" "Peripheral,PIO" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Status" "Peripheral,PIO" group.long 0x18++0x03 line.long 0x00 "PIO_OSR,PIO Output Status Register" setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Output Status" "Input,Output" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Output Status" "Input,Output" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Output Status" "Input,Output" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Output Status" "Input,Output" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Output Status" "Input,Output" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Output Status" "Input,Output" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Status" "Input,Output" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Status" "Input,Output" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Status" "Input,Output" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Status" "Input,Output" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Status" "Input,Output" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Status" "Input,Output" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Status" "Input,Output" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Status" "Input,Output" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Status" "Input,Output" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Status" "Input,Output" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Status" "Input,Output" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Status" "Input,Output" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Status" "Input,Output" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Status" "Input,Output" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Status" "Input,Output" group.long 0x28++0x03 line.long 0x00 "PIO_IFSR,PIO Input Filter Status Register" setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Filer Status" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "PIO_ODSR,PIO Output Data Status Register" setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Output Data Status" "Low,High" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Output Data Status" "Low,High" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Output Data Status" "Low,High" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Output Data Status" "Low,High" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Data Status" "Low,High" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Data Status" "Low,High" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Data Status" "Low,High" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Data Status" "Low,High" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Data Status" "Low,High" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Data Status" "Low,High" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Data Status" "Low,High" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Data Status" "Low,High" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Data Status" "Low,High" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Data Status" "Low,High" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Data Status" "Low,High" textline " " rgroup.long 0x3C++0x03 line.long 0x00 "PIO_PDSR,PIO Pin Data Status Register" bitfld.long 0x00 20. " P20 ,PIO20 Output Data Status" "Low,High" bitfld.long 0x00 19. " P19 ,PIO19 Output Data Status" "Low,High" bitfld.long 0x00 18. " P18 ,PIO18 Output Data Status" "Low,High" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Output Data Status" "Low,High" bitfld.long 0x00 16. " P16 ,PIO16 Output Data Status" "Low,High" bitfld.long 0x00 15. " P15 ,PIO15 Output Data Status" "Low,High" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Output Data Status" "Low,High" bitfld.long 0x00 13. " P13 ,PIO13 Output Data Status" "Low,High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Output Data Status" "Low,High" bitfld.long 0x00 11. " P11 ,PIO11 Output Data Status" "Low,High" bitfld.long 0x00 10. " P10 ,PIO10 Output Data Status" "Low,High" bitfld.long 0x00 9. " P9 ,PIO9 Output Data Status" "Low,High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Output Data Status" "Low,High" bitfld.long 0x00 7. " P7 ,PIO7 Output Data Status" "Low,High" bitfld.long 0x00 6. " P6 ,PIO6 Output Data Status" "Low,High" bitfld.long 0x00 5. " P5 ,PIO5 Output Data Status" "Low,High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Output Data Status" "Low,High" bitfld.long 0x00 3. " P3 ,PIO3 Output Data Status" "Low,High" bitfld.long 0x00 2. " P2 ,PIO2 Output Data Status" "Low,High" bitfld.long 0x00 1. " P1 ,PIO1 Output Data Status" "Low,High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Output Data Status" "Low,High" textline " " group.long 0x48++0x03 line.long 0x00 "PIO_IMR,PIO Interrupt Mask Register" setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Change Interrupt Mask" "Disabled,Enabled" hgroup.long 0x4c++0x03 hide.long 0x00 "ISR,PIO Interrupt Status Register" in group.long 0x58++0x03 line.long 0x00 "PIO_MDSR,PIO Multi-driver Status Register" setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Multi Drive Status" "Disabled,Enabled" group.long 0x68++0x03 line.long 0x00 "PIO_PUSR,PIO Pull Up Status Register" setclrfld.long 0x00 20. -0x04 20. -0x08 20. " P20_set/clr ,PIO20 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 19. -0x04 19. -0x08 19. " P19_set/clr ,PIO19 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 18. -0x04 18. -0x08 18. " P18_set/clr ,PIO18 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 17. -0x04 17. -0x08 17. " P17_set/clr ,PIO17 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 16. -0x04 16. -0x08 16. " P16_set/clr ,PIO16 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 15. -0x04 15. -0x08 15. " P15_set/clr ,PIO15 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 14. -0x04 14. -0x08 14. " P14_set/clr ,PIO14 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 13. -0x04 13. -0x08 13. " P13_set/clr ,PIO13 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " P5_set/clr ,PIO5 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Pull Up Status" "Enabled,Disabled" textline " " group.long 0x70++0x07 line.long 0x00 "PIO_ABCDSR1,PIO Peripheral ABCD Select Register 1" bitfld.long 0x00 20. " P20 ,PIO20 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 19. " P19 ,PIO19 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 18. " P18 ,PIO18 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 16. " P16 ,PIO16 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 15. " P15 ,PIO15 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 13. " P13 ,PIO13 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 11. " P11 ,PIO11 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 10. " P10 ,PIO10 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 9. " P9 ,PIO9 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 7. " P7 ,PIO7 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 6. " P6 ,PIO6 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 5. " P5 ,PIO5 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 3. " P3 ,PIO3 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 2. " P2 ,PIO2 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 1. " P1 ,PIO1 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Peripheral Select" "A/C function,B/D function" line.long 0x04 "ABCDSR2,PIO Peripheral ABCD Select Register 2" bitfld.long 0x04 20. " P20 ,PIO20 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 19. " P19 ,PIO19 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 18. " P18 ,PIO18 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 17. " P17 ,PIO17 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 16. " P16 ,PIO16 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 15. " P15 ,PIO15 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 14. " P14 ,PIO14 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 13. " P13 ,PIO13 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 12. " P12 ,PIO12 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 11. " P11 ,PIO11 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 10. " P10 ,PIO10 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 9. " P9 ,PIO9 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 8. " P8 ,PIO8 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 7. " P7 ,PIO7 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 6. " P6 ,PIO6 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 5. " P5 ,PIO5 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 4. " P4 ,PIO4 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 3. " P3 ,PIO3 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 2. " P2 ,PIO2 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 1. " P1 ,PIO1 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 0. " P0 ,PIO0 Peripheral Select" "A/B function,C/D function" textline " " group.long 0x88++0x03 line.long 0x00 "PIO_IFSCSR,PIO Input Filter Slow Clock Status Register" setclrfld.long 0x00 20. -0x04 20. -0x08 20. " P20_set/clr ,PIO20 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 19. -0x04 19. -0x08 19. " P19_set/clr ,PIO19 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 18. -0x04 18. -0x08 18. " P18_set/clr ,PIO18 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 17. -0x04 17. -0x08 17. " P17_set/clr ,PIO17 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 16. -0x04 16. -0x08 16. " P16_set/clr ,PIO16 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 15. -0x04 15. -0x08 15. " P15_set/clr ,PIO15 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 14. -0x04 14. -0x08 14. " P14_set/clr ,PIO14 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 13. -0x04 13. -0x08 13. " P13_set/clr ,PIO13 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" group.long 0x8C++0x03 line.long 0x00 "PIO_SCDR,PIO Slow Clock Divider Debouncing Register" hexmask.long.word 0x00 0.--13. 1. " DIV ,Slow Clock Divider Selection for Debouncing" group.long 0x98++0x03 line.long 0x00 "PIO_PPDSR,PIO Pad Pull Down Status Register" setclrfld.long 0x00 20. -0x04 20. -0x08 20. " P20_set/clr ,PIO20 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 19. -0x04 19. -0x08 19. " P19_set/clr ,PIO19 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 18. -0x04 18. -0x08 18. " P18_set/clr ,PIO18 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 17. -0x04 17. -0x08 17. " P17_set/clr ,PIO17 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 16. -0x04 16. -0x08 16. " P16_set/clr ,PIO16 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 15. -0x04 15. -0x08 15. " P15_set/clr ,PIO15 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 14. -0x04 14. -0x08 14. " P14_set/clr ,PIO14 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 13. -0x04 13. -0x08 13. " P13_set/clr ,PIO13 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " P5_set/clr ,PIO5 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Pull Down Status" "Enabled,Disabled" group.long 0xA8++0x03 line.long 0x00 "PIO_OWSR,PIO Output Write Status Register" setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Write Status" "Not affected,Affected" width 0x0B else width 13. rgroup.long 0x08++0x03 line.long 0x00 "PIO_PSR,PIO Status Register" bitfld.long 0x00 20. " P20_set/clr ,PIO20 Status" "Peripheral,PIO" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Status" "Peripheral,PIO" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Status" "Peripheral,PIO" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Status" "Peripheral,PIO" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Status" "Peripheral,PIO" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Status" "Peripheral,PIO" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Status" "Peripheral,PIO" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Status" "Peripheral,PIO" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Status" "Peripheral,PIO" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Status" "Peripheral,PIO" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Status" "Peripheral,PIO" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Status" "Peripheral,PIO" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Status" "Peripheral,PIO" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Status" "Peripheral,PIO" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Status" "Peripheral,PIO" rgroup.long 0x18++0x03 line.long 0x00 "PIO_OSR,PIO Output Status Register" bitfld.long 0x00 20. " P20_set/clr ,PIO20 Output Status" "Input,Output" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Output Status" "Input,Output" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Output Status" "Input,Output" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Output Status" "Input,Output" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Output Status" "Input,Output" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Output Status" "Input,Output" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Output Status" "Input,Output" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Output Status" "Input,Output" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Output Status" "Input,Output" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Output Status" "Input,Output" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Output Status" "Input,Output" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Output Status" "Input,Output" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Output Status" "Input,Output" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Output Status" "Input,Output" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Output Status" "Input,Output" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Output Status" "Input,Output" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Output Status" "Input,Output" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Output Status" "Input,Output" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Output Status" "Input,Output" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Output Status" "Input,Output" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Output Status" "Input,Output" rgroup.long 0x28++0x03 line.long 0x00 "PIO_IFSR,PIO Input Filter Status Register" bitfld.long 0x00 20. " P20_set/clr ,PIO20 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Input Filer Status" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "PIO_ODSR,PIO Output Data Status Register" setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Output Data Status" "Low,High" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Output Data Status" "Low,High" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Output Data Status" "Low,High" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Output Data Status" "Low,High" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Output Data Status" "Low,High" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Data Status" "Low,High" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Data Status" "Low,High" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Data Status" "Low,High" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Data Status" "Low,High" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Data Status" "Low,High" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Data Status" "Low,High" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Data Status" "Low,High" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Data Status" "Low,High" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Data Status" "Low,High" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Data Status" "Low,High" textline " " rgroup.long 0x3C++0x03 line.long 0x00 "PIO_PDSR,PIO Pin Data Status Register" bitfld.long 0x00 20. " P20 ,PIO20 Output Data Status" "Low,High" bitfld.long 0x00 19. " P19 ,PIO19 Output Data Status" "Low,High" bitfld.long 0x00 18. " P18 ,PIO18 Output Data Status" "Low,High" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Output Data Status" "Low,High" bitfld.long 0x00 16. " P16 ,PIO16 Output Data Status" "Low,High" bitfld.long 0x00 15. " P15 ,PIO15 Output Data Status" "Low,High" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Output Data Status" "Low,High" bitfld.long 0x00 13. " P13 ,PIO13 Output Data Status" "Low,High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Output Data Status" "Low,High" bitfld.long 0x00 11. " P11 ,PIO11 Output Data Status" "Low,High" bitfld.long 0x00 10. " P10 ,PIO10 Output Data Status" "Low,High" bitfld.long 0x00 9. " P9 ,PIO9 Output Data Status" "Low,High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Output Data Status" "Low,High" bitfld.long 0x00 7. " P7 ,PIO7 Output Data Status" "Low,High" bitfld.long 0x00 6. " P6 ,PIO6 Output Data Status" "Low,High" bitfld.long 0x00 5. " P5 ,PIO5 Output Data Status" "Low,High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Output Data Status" "Low,High" bitfld.long 0x00 3. " P3 ,PIO3 Output Data Status" "Low,High" bitfld.long 0x00 2. " P2 ,PIO2 Output Data Status" "Low,High" bitfld.long 0x00 1. " P1 ,PIO1 Output Data Status" "Low,High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Output Data Status" "Low,High" textline " " group.long 0x48++0x03 line.long 0x00 "PIO_IMR,PIO Interrupt Mask Register" setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Change Interrupt Mask" "Disabled,Enabled" hgroup.long 0x4c++0x03 hide.long 0x00 "ISR,PIO Interrupt Status Register" in rgroup.long 0x58++0x03 line.long 0x00 "PIO_MDSR,PIO Multi-driver Status Register" bitfld.long 0x00 20. " P20_set/clr ,PIO20 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Multi Drive Status" "Disabled,Enabled" rgroup.long 0x68++0x03 line.long 0x00 "PIO_PUSR,PIO Pull Up Status Register" bitfld.long 0x00 20. " P20_set/clr ,PIO20 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Pull Up Status" "Enabled,Disabled" textline " " rgroup.long 0x70++0x07 line.long 0x00 "PIO_ABCDSR1,PIO Peripheral ABCD Select Register 1" bitfld.long 0x00 20. " P20 ,PIO20 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 19. " P19 ,PIO19 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 18. " P18 ,PIO18 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 16. " P16 ,PIO16 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 15. " P15 ,PIO15 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 13. " P13 ,PIO13 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 11. " P11 ,PIO11 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 10. " P10 ,PIO10 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 9. " P9 ,PIO9 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 7. " P7 ,PIO7 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 6. " P6 ,PIO6 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 5. " P5 ,PIO5 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 3. " P3 ,PIO3 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 2. " P2 ,PIO2 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 1. " P1 ,PIO1 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Peripheral Select" "A/C function,B/D function" line.long 0x04 "ABCDSR2,PIO Peripheral ABCD Select Register 2" bitfld.long 0x04 20. " P20 ,PIO20 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 19. " P19 ,PIO19 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 18. " P18 ,PIO18 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 17. " P17 ,PIO17 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 16. " P16 ,PIO16 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 15. " P15 ,PIO15 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 14. " P14 ,PIO14 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 13. " P13 ,PIO13 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 12. " P12 ,PIO12 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 11. " P11 ,PIO11 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 10. " P10 ,PIO10 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 9. " P9 ,PIO9 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 8. " P8 ,PIO8 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 7. " P7 ,PIO7 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 6. " P6 ,PIO6 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 5. " P5 ,PIO5 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 4. " P4 ,PIO4 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 3. " P3 ,PIO3 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 2. " P2 ,PIO2 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 1. " P1 ,PIO1 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 0. " P0 ,PIO0 Peripheral Select" "A/B function,C/D function" textline " " group.long 0x88++0x03 line.long 0x00 "PIO_IFSCSR,PIO Input Filter Slow Clock Status Register" bitfld.long 0x00 20. " P20_set/clr ,PIO20 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" group.long 0x8C++0x03 line.long 0x00 "PIO_SCDR,PIO Slow Clock Divider Debouncing Register" hexmask.long.word 0x00 0.--13. 1. " DIV ,Slow Clock Divider Selection for Debouncing" rgroup.long 0x98++0x03 line.long 0x00 "PIO_PPDSR,PIO Pad Pull Down Status Register" bitfld.long 0x00 20. " P20_set/clr ,PIO20 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Pull Down Status" "Enabled,Disabled" rgroup.long 0xA8++0x03 line.long 0x00 "PIO_OWSR,PIO Output Write Status Register" bitfld.long 0x00 20. " P20_set/clr ,PIO20 Output Write Status" "Not affected,Affected" bitfld.long 0x00 19. " P19_set/clr ,PIO19 Output Write Status" "Not affected,Affected" bitfld.long 0x00 18. " P18_set/clr ,PIO18 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 17. " P17_set/clr ,PIO17 Output Write Status" "Not affected,Affected" bitfld.long 0x00 16. " P16_set/clr ,PIO16 Output Write Status" "Not affected,Affected" bitfld.long 0x00 15. " P15_set/clr ,PIO15 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 14. " P14_set/clr ,PIO14 Output Write Status" "Not affected,Affected" bitfld.long 0x00 13. " P13_set/clr ,PIO13 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 12. " P12_set/clr ,PIO12 Output Write Status" "Not affected,Affected" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Output Write Status" "Not affected,Affected" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Output Write Status" "Not affected,Affected" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Output Write Status" "Not affected,Affected" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Output Write Status" "Not affected,Affected" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Output Write Status" "Not affected,Affected" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Output Write Status" "Not affected,Affected" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Output Write Status" "Not affected,Affected" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Output Write Status" "Not affected,Affected" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Output Write Status" "Not affected,Affected" width 0x0B endif width 13. textline " " group.long 0xB8++0x03 line.long 0x00 "PIO_AIMMR,PIO Additional Interrupt Modes Mask Register" setclrfld.long 0x00 20. -0x08 20. -0x04 20. " P20_set/clr ,PIO20 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19_set/clr ,PIO19 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18_set/clr ,PIO18 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17_set/clr ,PIO17 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16_set/clr ,PIO16 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15_set/clr ,PIO15 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14_set/clr ,PIO14 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13_set/clr ,PIO13 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Peripheral CD Status" "Both Edge,Registers" textline " " wgroup.long 0xC0++0x03 line.long 0x00 "PIO_ESR,Edge Interrupt Source Selection Select Register" bitfld.long 0x00 20. " P20 ,PIO20 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 19. " P19 ,PIO19 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 18. " P18 ,PIO18 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 16. " P16 ,PIO16 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 15. " P15 ,PIO15 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 13. " P13 ,PIO13 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 11. " P11 ,PIO11 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 10. " P10 ,PIO10 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 9. " P9 ,PIO9 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 7. " P7 ,PIO7 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 6. " P6 ,PIO6 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 5. " P5 ,PIO5 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 3. " P3 ,PIO3 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 2. " P2 ,PIO2 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 1. " P1 ,PIO1 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge Interrupt Source Selection" "No effect,Edge" wgroup.long 0xC4++0x03 line.long 0x00 "PIO_LSR,Level Interrupt Source Selection Status Register" bitfld.long 0x00 20. " P20 ,PIO20 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 19. " P19 ,PIO19 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 18. " P18 ,PIO18 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 16. " P16 ,PIO16 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 15. " P15 ,PIO15 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 13. " P13 ,PIO13 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 11. " P11 ,PIO11 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 10. " P10 ,PIO10 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 9. " P9 ,PIO9 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 7. " P7 ,PIO7 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 6. " P6 ,PIO6 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 5. " P5 ,PIO5 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 3. " P3 ,PIO3 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 2. " P2 ,PIO2 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 1. " P1 ,PIO1 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Level Interrupt Source Selection" "No effect,Level" rgroup.long 0xC8++0x03 line.long 0x00 "PIO_ELSR,Edge/Level Interrupt Source Selection Status Register" bitfld.long 0x00 20. " P20 ,PIO20 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 19. " P19 ,PIO19 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 18. " P18 ,PIO18 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 16. " P16 ,PIO16 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 15. " P15 ,PIO15 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 13. " P13 ,PIO13 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 11. " P11 ,PIO11 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 10. " P10 ,PIO10 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 9. " P9 ,PIO9 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 7. " P7 ,PIO7 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 6. " P6 ,PIO6 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 5. " P5 ,PIO5 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 3. " P3 ,PIO3 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 2. " P2 ,PIO2 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 1. " P1 ,PIO1 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge/Level Interrupt Source Selection" "Edge,Level" wgroup.long 0xD8++0x03 line.long 0x00 "PIO_FELLSR,Falling Edge/Low-Level Select Register" bitfld.long 0x00 20. " P20 ,PIO20 Edge Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 19. " P19 ,PIO19 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 18. " P18 ,PIO18 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 16. " P16 ,PIO16 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 15. " P15 ,PIO15 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 13. " P13 ,PIO13 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 11. " P11 ,PIO11 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 10. " P10 ,PIO10 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 9. " P9 ,PIO9 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 7. " P7 ,PIO7 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 6. " P6 ,PIO6 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 5. " P5 ,PIO5 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 3. " P3 ,PIO3 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 2. " P2 ,PIO2 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 1. " P1 ,PIO1 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" wgroup.long 0xD8++0x03 line.long 0x00 "PIO_REHLSR,PIO Rising Edge/High-Level Select Register" bitfld.long 0x00 20. " P20 ,PIO20 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 19. " P19 ,PIO19 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 18. " P18 ,PIO18 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 16. " P16 ,PIO16 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 15. " P15 ,PIO15 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 13. " P13 ,PIO13 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 11. " P11 ,PIO11 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 10. " P10 ,PIO10 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 9. " P9 ,PIO9 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 7. " P7 ,PIO7 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 6. " P6 ,PIO6 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 5. " P5 ,PIO5 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 3. " P3 ,PIO3 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 2. " P2 ,PIO2 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 1. " P1 ,PIO1 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" rgroup.long 0xD8++0x03 line.long 0x00 "PIO_FRLHSR,PIO Fall/Rise - Low/High Status Register" bitfld.long 0x00 20. " P20 ,PIO20 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 19. " P19 ,PIO19 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 18. " P18 ,PIO18 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 16. " P16 ,PIO16 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 15. " P15 ,PIO15 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 13. " P13 ,PIO13 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 11. " P11 ,PIO11 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 10. " P10 ,PIO10 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 9. " P9 ,PIO9 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 7. " P7 ,PIO7 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 6. " P6 ,PIO6 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 5. " P5 ,PIO5 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 3. " P3 ,PIO3 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 2. " P2 ,PIO2 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 1. " P1 ,PIO1 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" rgroup.long 0xE0++0x03 line.long 0x00 "PIO_LOCKSR,PIO Lock Status Register" bitfld.long 0x00 20. " P20 ,PIO20 Lock Status" "Not locked,Locked" bitfld.long 0x00 19. " P19 ,PIO19 Lock Status" "Not locked,Locked" bitfld.long 0x00 18. " P18 ,PIO18 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 17. " P17 ,PIO17 Lock Status" "Not locked,Locked" bitfld.long 0x00 16. " P16 ,PIO16 Lock Status" "Not locked,Locked" bitfld.long 0x00 15. " P15 ,PIO15 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 14. " P14 ,PIO14 Lock Status" "Not locked,Locked" bitfld.long 0x00 13. " P13 ,PIO13 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 12. " P12 ,PIO12 Lock Status" "Not locked,Locked" bitfld.long 0x00 11. " P11 ,PIO11 Lock Status" "Not locked,Locked" bitfld.long 0x00 10. " P10 ,PIO10 Lock Status" "Not locked,Locked" bitfld.long 0x00 9. " P9 ,PIO9 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Lock Status" "Not locked,Locked" bitfld.long 0x00 7. " P7 ,PIO7 Lock Status" "Not locked,Locked" bitfld.long 0x00 6. " P6 ,PIO6 Lock Status" "Not locked,Locked" bitfld.long 0x00 5. " P5 ,PIO5 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Lock Status" "Not locked,Locked" bitfld.long 0x00 3. " P3 ,PIO3 Lock Status" "Not locked,Locked" bitfld.long 0x00 2. " P2 ,PIO2 Lock Status" "Not locked,Locked" bitfld.long 0x00 1. " P1 ,PIO1 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Lock Status" "Not locked,Locked" group.long 0xE4++0x03 line.long 0x00 "PIO_WPMR,PIO Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write Protect KEY" bitfld.long 0x00 0. " WPEN ,Write Protect Enable" "Disabled,Enabled" hgroup.long 0xe8++0x03 hide.long 0x00 "WPSR,PIO Write Protect Status Register" in group.long 0x100++0x03 line.long 0x00 "PIO_SCHMITT,PIO Schmitt Trigger Register" bitfld.long 0x00 20. " SCHMITT20 ,Schmitt Trigger 20 Disable" "No,Yes" bitfld.long 0x00 19. " SCHMITT19 ,Schmitt Trigger 19 Disable" "No,Yes" bitfld.long 0x00 18. " SCHMITT18 ,Schmitt Trigger 18 Disable" "No,Yes" textline " " bitfld.long 0x00 17. " SCHMITT17 ,Schmitt Trigger 17 Disable" "No,Yes" bitfld.long 0x00 16. " SCHMITT16 ,Schmitt Trigger 16 Disable" "No,Yes" bitfld.long 0x00 15. " SCHMITT15 ,Schmitt Trigger 15 Disable" "No,Yes" textline " " bitfld.long 0x00 14. " SCHMITT14 ,Schmitt Trigger 14 Disable" "No,Yes" bitfld.long 0x00 13. " SCHMITT13 ,Schmitt Trigger 13 Disable" "No,Yes" textline " " bitfld.long 0x00 12. " SCHMITT12 ,Schmitt Trigger 12 Disable" "No,Yes" bitfld.long 0x00 11. " SCHMITT11 ,Schmitt Trigger 11 Disable" "No,Yes" bitfld.long 0x00 10. " SCHMITT10 ,Schmitt Trigger 10 Disable" "No,Yes" bitfld.long 0x00 9. " SCHMITT9 ,Schmitt Trigger 9 Disable" "No,Yes" textline " " bitfld.long 0x00 8. " SCHMITT8 ,Schmitt Trigger 8 Disable" "No,Yes" bitfld.long 0x00 7. " SCHMITT7 ,Schmitt Trigger 7 Disable" "No,Yes" bitfld.long 0x00 6. " SCHMITT6 ,Schmitt Trigger 6 Disable" "No,Yes" bitfld.long 0x00 5. " SCHMITT5 ,Schmitt Trigger 5 Disable" "No,Yes" textline " " bitfld.long 0x00 4. " SCHMITT4 ,Schmitt Trigger 4 Disable" "No,Yes" bitfld.long 0x00 3. " SCHMITT3 ,Schmitt Trigger 3 Disable" "No,Yes" bitfld.long 0x00 2. " SCHMITT2 ,Schmitt Trigger 2 Disable" "No,Yes" bitfld.long 0x00 1. " SCHMITT1 ,Schmitt Trigger 1 Disable" "No,Yes" textline " " bitfld.long 0x00 0. " SCHMITT0 ,Schmitt Trigger 0 Disable" "No,Yes" textline " " tree "Parallel Capture" if ((d.l(ad:0x400E0E00+0xE4)&0x01)==0x00) group.long 0x150++0x03 line.long 0x00 "PIO_PCMR,PIO Parallel Capture Mode Register" bitfld.long 0x00 11. " FRSTS ,Parallel Capture Mode First Sample" "Even index,Odd index" bitfld.long 0x00 10. " HALFS ,Parallel Capture Mode Half Sampling" "All data,One time out of two" textline " " bitfld.long 0x00 9. " ALWYS ,Parallel Capture Mode Always Sampling" "No,Yes" bitfld.long 0x00 4.--5. " DSIZE ,Parallel Capture Mode Data Size" "8 bit,16 bit,32 bit,?..." textline " " bitfld.long 0x00 0. " PCEN ,Parallel Capture Mode Enable" "Disabled,Enabled" else rgroup.long 0x150++0x03 line.long 0x00 "PIO_PCMR,PIO Parallel Capture Mode Register" bitfld.long 0x00 11. " FRSTS ,Parallel Capture Mode First Sample" "Even index,Odd index" bitfld.long 0x00 10. " HALFS ,Parallel Capture Mode Half Sampling" "All data,One time out of two" textline " " bitfld.long 0x00 9. " ALWYS ,Parallel Capture Mode Always Sampling" "No,Yes" bitfld.long 0x00 4.--5. " DSIZE ,Parallel Capture Mode Data Size" "8 bit,16 bit,32 bit," textline " " bitfld.long 0x00 0. " PCEN ,Parallel Capture Mode Enable" "Disabled,Enabled" endif group.long 0x15C++0x03 line.long 0x00 "PIO_PCIMR,PIO Parallel Capture Interrupt Mask Register" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXBUFF_set/clr ,Reception Buffer Full Interrupt Enable" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " ENDRX_set/clr ,End of Reception Transfer Interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " OVRE_set/clr ,Parallel Capture Mode Overrun Error Interrupt Enable" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " DRDY_set/clr ,Parallel Capture Mode Data Ready Interrupt Enable" "Disabled,Enabled" hgroup.long 0x160++0x03 hide.long 0x00 "PIO_PCISR,PIO Parallel Capture Interrupt Status Register" if (d.l(ad:0x400E0E00+0x150)&0x30)==0x00 rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" hexmask.long.byte 0x00 0.--7. 1. " RDATA ,Parallel Capture Mode Reception Data" elif (d.l(ad:0x400E0E00+0x150)&0x30)==0x10 rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" hexmask.long.word 0x00 0.--15. 1. " RDATA ,Parallel Capture Mode Reception Data" else rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" endif tree.end width 0xB tree "PDC (Peripheral DMA Controller)" base ad:0x400E0E00 width 9. group.long 0x100++0x01F line.long 0x00 "PIOA_RPR,Receive Pointer Register" line.long 0x04 "PIOA_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "PIOA_TPR,Transmit Pointer Register" line.long 0x0c "PIOA_TCR,Transmit Counter Register" hexmask.long.word 0x0C 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "PIOA_RNPR,Receive Next Pointer Register" line.long 0x14 "PIOA_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "PIOA_TNPR,Transmit Next Pointer Register" line.long 0x1c "PIOA_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "PIOA_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disable" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enable" bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disable" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enable" rgroup.long 0x124++0x03 line.long 0x00 "PIOA_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0x0B tree.end tree.end tree "Port B" base ad:0x400E1000 if ((d.l(ad:0x400E1000+0xE4)&0x01)==0x00) width 13. group.long 0x08++0x03 line.long 0x00 "PIO_PSR,PIO Status Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Status" "Peripheral,PIO" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Status" "Peripheral,PIO" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Status" "Peripheral,PIO" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Status" "Peripheral,PIO" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Status" "Peripheral,PIO" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Status" "Peripheral,PIO" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Status" "Peripheral,PIO" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Status" "Peripheral,PIO" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Status" "Peripheral,PIO" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Status" "Peripheral,PIO" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Status" "Peripheral,PIO" group.long 0x18++0x03 line.long 0x00 "PIO_OSR,PIO Output Status Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Status" "Input,Output" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Status" "Input,Output" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Status" "Input,Output" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Status" "Input,Output" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Status" "Input,Output" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Status" "Input,Output" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Status" "Input,Output" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Status" "Input,Output" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Status" "Input,Output" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Status" "Input,Output" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Status" "Input,Output" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Status" "Input,Output" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Status" "Input,Output" group.long 0x28++0x03 line.long 0x00 "PIO_IFSR,PIO Input Filter Status Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Filer Status" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Filer Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Filer Status" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "PIO_ODSR,PIO Output Data Status Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Data Status" "Low,High" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Data Status" "Low,High" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Data Status" "Low,High" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Data Status" "Low,High" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Data Status" "Low,High" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Data Status" "Low,High" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Data Status" "Low,High" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Data Status" "Low,High" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Data Status" "Low,High" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Data Status" "Low,High" textline " " rgroup.long 0x3C++0x03 line.long 0x00 "PIO_PDSR,PIO Pin Data Status Register" bitfld.long 0x00 12. " P12 ,PIO12 Output Data Status" "Low,High" bitfld.long 0x00 11. " P11 ,PIO11 Output Data Status" "Low,High" bitfld.long 0x00 10. " P10 ,PIO10 Output Data Status" "Low,High" bitfld.long 0x00 9. " P9 ,PIO9 Output Data Status" "Low,High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Output Data Status" "Low,High" bitfld.long 0x00 7. " P7 ,PIO7 Output Data Status" "Low,High" bitfld.long 0x00 6. " P6 ,PIO6 Output Data Status" "Low,High" bitfld.long 0x00 5. " P5 ,PIO5 Output Data Status" "Low,High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Output Data Status" "Low,High" bitfld.long 0x00 3. " P3 ,PIO3 Output Data Status" "Low,High" bitfld.long 0x00 2. " P2 ,PIO2 Output Data Status" "Low,High" bitfld.long 0x00 1. " P1 ,PIO1 Output Data Status" "Low,High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Output Data Status" "Low,High" textline " " group.long 0x48++0x03 line.long 0x00 "PIO_IMR,PIO Interrupt Mask Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Change Interrupt Mask" "Disabled,Enabled" hgroup.long 0x4c++0x03 hide.long 0x00 "ISR,PIO Interrupt Status Register" in group.long 0x58++0x03 line.long 0x00 "PIO_MDSR,PIO Multi-driver Status Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Multi Drive Status" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Multi Drive Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Multi Drive Status" "Disabled,Enabled" group.long 0x68++0x03 line.long 0x00 "PIO_PUSR,PIO Pull Up Status Register" setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " P5_set/clr ,PIO5 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Pull Up Status" "Enabled,Disabled" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Pull Up Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Pull Up Status" "Enabled,Disabled" textline " " group.long 0x70++0x07 line.long 0x00 "PIO_ABCDSR1,PIO Peripheral ABCD Select Register 1" bitfld.long 0x00 12. " P12 ,PIO12 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 11. " P11 ,PIO11 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 10. " P10 ,PIO10 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 9. " P9 ,PIO9 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 7. " P7 ,PIO7 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 6. " P6 ,PIO6 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 5. " P5 ,PIO5 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 3. " P3 ,PIO3 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 2. " P2 ,PIO2 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 1. " P1 ,PIO1 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Peripheral Select" "A/C function,B/D function" line.long 0x04 "ABCDSR2,PIO Peripheral ABCD Select Register 2" bitfld.long 0x04 12. " P12 ,PIO12 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 11. " P11 ,PIO11 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 10. " P10 ,PIO10 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 9. " P9 ,PIO9 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 8. " P8 ,PIO8 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 7. " P7 ,PIO7 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 6. " P6 ,PIO6 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 5. " P5 ,PIO5 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 4. " P4 ,PIO4 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 3. " P3 ,PIO3 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 2. " P2 ,PIO2 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 1. " P1 ,PIO1 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 0. " P0 ,PIO0 Peripheral Select" "A/B function,C/D function" textline " " group.long 0x88++0x03 line.long 0x00 "PIO_IFSCSR,PIO Input Filter Slow Clock Status Register" setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" group.long 0x8C++0x03 line.long 0x00 "PIO_SCDR,PIO Slow Clock Divider Debouncing Register" hexmask.long.word 0x00 0.--13. 1. " DIV ,Slow Clock Divider Selection for Debouncing" group.long 0x98++0x03 line.long 0x00 "PIO_PPDSR,PIO Pad Pull Down Status Register" setclrfld.long 0x00 12. -0x04 12. -0x08 12. " P12_set/clr ,PIO12 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 11. -0x04 11. -0x08 11. " P11_set/clr ,PIO11 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 10. -0x04 10. -0x08 10. " P10_set/clr ,PIO10 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 9. -0x04 9. -0x08 9. " P9_set/clr ,PIO9 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 8. -0x04 8. -0x08 8. " P8_set/clr ,PIO8 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 7. -0x04 7. -0x08 7. " P7_set/clr ,PIO7 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 6. -0x04 6. -0x08 6. " P6_set/clr ,PIO6 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 5. -0x04 5. -0x08 5. " P5_set/clr ,PIO5 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 4. -0x04 4. -0x08 4. " P4_set/clr ,PIO4 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 3. -0x04 3. -0x08 3. " P3_set/clr ,PIO3 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 2. -0x04 2. -0x08 2. " P2_set/clr ,PIO2 Pull Down Status" "Enabled,Disabled" setclrfld.long 0x00 1. -0x04 1. -0x08 1. " P1_set/clr ,PIO1 Pull Down Status" "Enabled,Disabled" textline " " setclrfld.long 0x00 0. -0x04 0. -0x08 0. " P0_set/clr ,PIO0 Pull Down Status" "Enabled,Disabled" group.long 0xA8++0x03 line.long 0x00 "PIO_OWSR,PIO Output Write Status Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Write Status" "Not affected,Affected" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Write Status" "Not affected,Affected" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Write Status" "Not affected,Affected" width 0x0B else width 13. rgroup.long 0x08++0x03 line.long 0x00 "PIO_PSR,PIO Status Register" bitfld.long 0x00 12. " P12_set/clr ,PIO12 Status" "Peripheral,PIO" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Status" "Peripheral,PIO" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Status" "Peripheral,PIO" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Status" "Peripheral,PIO" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Status" "Peripheral,PIO" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Status" "Peripheral,PIO" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Status" "Peripheral,PIO" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Status" "Peripheral,PIO" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Status" "Peripheral,PIO" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Status" "Peripheral,PIO" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Status" "Peripheral,PIO" rgroup.long 0x18++0x03 line.long 0x00 "PIO_OSR,PIO Output Status Register" bitfld.long 0x00 12. " P12_set/clr ,PIO12 Output Status" "Input,Output" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Output Status" "Input,Output" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Output Status" "Input,Output" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Output Status" "Input,Output" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Output Status" "Input,Output" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Output Status" "Input,Output" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Output Status" "Input,Output" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Output Status" "Input,Output" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Output Status" "Input,Output" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Output Status" "Input,Output" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Output Status" "Input,Output" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Output Status" "Input,Output" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Output Status" "Input,Output" rgroup.long 0x28++0x03 line.long 0x00 "PIO_IFSR,PIO Input Filter Status Register" bitfld.long 0x00 12. " P12_set/clr ,PIO12 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Input Filer Status" "Disabled,Enabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Input Filer Status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Input Filer Status" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "PIO_ODSR,PIO Output Data Status Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Output Data Status" "Low,High" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Output Data Status" "Low,High" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Output Data Status" "Low,High" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Output Data Status" "Low,High" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Output Data Status" "Low,High" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Output Data Status" "Low,High" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Output Data Status" "Low,High" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Output Data Status" "Low,High" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Output Data Status" "Low,High" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Output Data Status" "Low,High" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Output Data Status" "Low,High" textline " " rgroup.long 0x3C++0x03 line.long 0x00 "PIO_PDSR,PIO Pin Data Status Register" bitfld.long 0x00 12. " P12 ,PIO12 Output Data Status" "Low,High" bitfld.long 0x00 11. " P11 ,PIO11 Output Data Status" "Low,High" bitfld.long 0x00 10. " P10 ,PIO10 Output Data Status" "Low,High" bitfld.long 0x00 9. " P9 ,PIO9 Output Data Status" "Low,High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Output Data Status" "Low,High" bitfld.long 0x00 7. " P7 ,PIO7 Output Data Status" "Low,High" bitfld.long 0x00 6. " P6 ,PIO6 Output Data Status" "Low,High" bitfld.long 0x00 5. " P5 ,PIO5 Output Data Status" "Low,High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Output Data Status" "Low,High" bitfld.long 0x00 3. " P3 ,PIO3 Output Data Status" "Low,High" bitfld.long 0x00 2. " P2 ,PIO2 Output Data Status" "Low,High" bitfld.long 0x00 1. " P1 ,PIO1 Output Data Status" "Low,High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Output Data Status" "Low,High" textline " " group.long 0x48++0x03 line.long 0x00 "PIO_IMR,PIO Interrupt Mask Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Input Change Interrupt Mask" "Disabled,Enabled" hgroup.long 0x4c++0x03 hide.long 0x00 "ISR,PIO Interrupt Status Register" in rgroup.long 0x58++0x03 line.long 0x00 "PIO_MDSR,PIO Multi-driver Status Register" bitfld.long 0x00 12. " P12_set/clr ,PIO12 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Multi Drive Status" "Disabled,Enabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Multi Drive Status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Multi Drive Status" "Disabled,Enabled" rgroup.long 0x68++0x03 line.long 0x00 "PIO_PUSR,PIO Pull Up Status Register" bitfld.long 0x00 12. " P12_set/clr ,PIO12 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Pull Up Status" "Enabled,Disabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Pull Up Status" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Pull Up Status" "Enabled,Disabled" textline " " rgroup.long 0x70++0x07 line.long 0x00 "PIO_ABCDSR1,PIO Peripheral ABCD Select Register 1" bitfld.long 0x00 12. " P12 ,PIO12 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 11. " P11 ,PIO11 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 10. " P10 ,PIO10 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 9. " P9 ,PIO9 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 7. " P7 ,PIO7 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 6. " P6 ,PIO6 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 5. " P5 ,PIO5 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 3. " P3 ,PIO3 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 2. " P2 ,PIO2 Peripheral Select" "A/C function,B/D function" bitfld.long 0x00 1. " P1 ,PIO1 Peripheral Select" "A/C function,B/D function" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Peripheral Select" "A/C function,B/D function" line.long 0x04 "ABCDSR2,PIO Peripheral ABCD Select Register 2" bitfld.long 0x04 12. " P12 ,PIO12 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 11. " P11 ,PIO11 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 10. " P10 ,PIO10 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 9. " P9 ,PIO9 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 8. " P8 ,PIO8 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 7. " P7 ,PIO7 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 6. " P6 ,PIO6 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 5. " P5 ,PIO5 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 4. " P4 ,PIO4 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 3. " P3 ,PIO3 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 2. " P2 ,PIO2 Peripheral Select" "A/B function,C/D function" bitfld.long 0x04 1. " P1 ,PIO1 Peripheral Select" "A/B function,C/D function" textline " " bitfld.long 0x04 0. " P0 ,PIO0 Peripheral Select" "A/B function,C/D function" textline " " group.long 0x88++0x03 line.long 0x00 "PIO_IFSCSR,PIO Input Filter Slow Clock Status Register" bitfld.long 0x00 12. " P12_set/clr ,PIO12 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Glitch or Debouncing Filter Selection Status" "Glitch,Debouncing" group.long 0x8C++0x03 line.long 0x00 "PIO_SCDR,PIO Slow Clock Divider Debouncing Register" hexmask.long.word 0x00 0.--13. 1. " DIV ,Slow Clock Divider Selection for Debouncing" rgroup.long 0x98++0x03 line.long 0x00 "PIO_PPDSR,PIO Pad Pull Down Status Register" bitfld.long 0x00 12. " P12_set/clr ,PIO12 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Pull Down Status" "Enabled,Disabled" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Pull Down Status" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Pull Down Status" "Enabled,Disabled" rgroup.long 0xA8++0x03 line.long 0x00 "PIO_OWSR,PIO Output Write Status Register" bitfld.long 0x00 12. " P12_set/clr ,PIO12 Output Write Status" "Not affected,Affected" bitfld.long 0x00 11. " P11_set/clr ,PIO11 Output Write Status" "Not affected,Affected" bitfld.long 0x00 10. " P10_set/clr ,PIO10 Output Write Status" "Not affected,Affected" bitfld.long 0x00 9. " P9_set/clr ,PIO9 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 8. " P8_set/clr ,PIO8 Output Write Status" "Not affected,Affected" bitfld.long 0x00 7. " P7_set/clr ,PIO7 Output Write Status" "Not affected,Affected" bitfld.long 0x00 6. " P6_set/clr ,PIO6 Output Write Status" "Not affected,Affected" bitfld.long 0x00 5. " P5_set/clr ,PIO5 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 4. " P4_set/clr ,PIO4 Output Write Status" "Not affected,Affected" bitfld.long 0x00 3. " P3_set/clr ,PIO3 Output Write Status" "Not affected,Affected" bitfld.long 0x00 2. " P2_set/clr ,PIO2 Output Write Status" "Not affected,Affected" bitfld.long 0x00 1. " P1_set/clr ,PIO1 Output Write Status" "Not affected,Affected" textline " " bitfld.long 0x00 0. " P0_set/clr ,PIO0 Output Write Status" "Not affected,Affected" width 0x0B endif width 13. textline " " group.long 0xB8++0x03 line.long 0x00 "PIO_AIMMR,PIO Additional Interrupt Modes Mask Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12_set/clr ,PIO12 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11_set/clr ,PIO11 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10_set/clr ,PIO10 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9_set/clr ,PIO9 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8_set/clr ,PIO8 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7_set/clr ,PIO7 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6_set/clr ,PIO6 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5_set/clr ,PIO5 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4_set/clr ,PIO4 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3_set/clr ,PIO3 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2_set/clr ,PIO2 Peripheral CD Status" "Both Edge,Registers" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1_set/clr ,PIO1 Peripheral CD Status" "Both Edge,Registers" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0_set/clr ,PIO0 Peripheral CD Status" "Both Edge,Registers" textline " " wgroup.long 0xC0++0x03 line.long 0x00 "PIO_ESR,Edge Interrupt Source Selection Select Register" bitfld.long 0x00 12. " P12 ,PIO12 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 11. " P11 ,PIO11 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 10. " P10 ,PIO10 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 9. " P9 ,PIO9 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 7. " P7 ,PIO7 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 6. " P6 ,PIO6 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 5. " P5 ,PIO5 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 3. " P3 ,PIO3 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 2. " P2 ,PIO2 Edge Interrupt Source Selection" "No effect,Edge" bitfld.long 0x00 1. " P1 ,PIO1 Edge Interrupt Source Selection" "No effect,Edge" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge Interrupt Source Selection" "No effect,Edge" wgroup.long 0xC4++0x03 line.long 0x00 "PIO_LSR,Level Interrupt Source Selection Status Register" bitfld.long 0x00 12. " P12 ,PIO12 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 11. " P11 ,PIO11 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 10. " P10 ,PIO10 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 9. " P9 ,PIO9 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 7. " P7 ,PIO7 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 6. " P6 ,PIO6 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 5. " P5 ,PIO5 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 3. " P3 ,PIO3 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 2. " P2 ,PIO2 Level Interrupt Source Selection" "No effect,Level" bitfld.long 0x00 1. " P1 ,PIO1 Level Interrupt Source Selection" "No effect,Level" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Level Interrupt Source Selection" "No effect,Level" rgroup.long 0xC8++0x03 line.long 0x00 "PIO_ELSR,Edge/Level Interrupt Source Selection Status Register" bitfld.long 0x00 12. " P12 ,PIO12 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 11. " P11 ,PIO11 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 10. " P10 ,PIO10 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 9. " P9 ,PIO9 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 7. " P7 ,PIO7 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 6. " P6 ,PIO6 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 5. " P5 ,PIO5 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 3. " P3 ,PIO3 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 2. " P2 ,PIO2 Edge/Level Interrupt Source Selection" "Edge,Level" bitfld.long 0x00 1. " P1 ,PIO1 Edge/Level Interrupt Source Selection" "Edge,Level" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge/Level Interrupt Source Selection" "Edge,Level" wgroup.long 0xD8++0x03 line.long 0x00 "PIO_FELLSR,Falling Edge/Low-Level Select Register" bitfld.long 0x00 12. " P12 ,PIO12 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 11. " P11 ,PIO11 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 10. " P10 ,PIO10 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 9. " P9 ,PIO9 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 7. " P7 ,PIO7 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 6. " P6 ,PIO6 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 5. " P5 ,PIO5 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 3. " P3 ,PIO3 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 2. " P2 ,PIO2 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" bitfld.long 0x00 1. " P1 ,PIO1 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Falling Edge/Low-Level Interrupt Selection" "No effect,Falling/Low" wgroup.long 0xD8++0x03 line.long 0x00 "PIO_REHLSR,PIO Rising Edge/High-Level Select Register" bitfld.long 0x00 12. " P12 ,PIO12 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 11. " P11 ,PIO11 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 10. " P10 ,PIO10 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 9. " P9 ,PIO9 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 7. " P7 ,PIO7 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 6. " P6 ,PIO6 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 5. " P5 ,PIO5 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 3. " P3 ,PIO3 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 2. " P2 ,PIO2 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" bitfld.long 0x00 1. " P1 ,PIO1 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Rising Edge/High-Level Interrupt Selection" "No effect,Rising/High" rgroup.long 0xD8++0x03 line.long 0x00 "PIO_FRLHSR,PIO Fall/Rise - Low/High Status Register" bitfld.long 0x00 12. " P12 ,PIO12 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 11. " P11 ,PIO11 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 10. " P10 ,PIO10 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 9. " P9 ,PIO9 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 7. " P7 ,PIO7 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 6. " P6 ,PIO6 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 5. " P5 ,PIO5 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 3. " P3 ,PIO3 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 2. " P2 ,PIO2 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" bitfld.long 0x00 1. " P1 ,PIO1 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Edge /Level Interrupt Source Selection" "Falling/Low,Rising/High" rgroup.long 0xE0++0x03 line.long 0x00 "PIO_LOCKSR,PIO Lock Status Register" bitfld.long 0x00 12. " P12 ,PIO12 Lock Status" "Not locked,Locked" bitfld.long 0x00 11. " P11 ,PIO11 Lock Status" "Not locked,Locked" bitfld.long 0x00 10. " P10 ,PIO10 Lock Status" "Not locked,Locked" bitfld.long 0x00 9. " P9 ,PIO9 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 8. " P8 ,PIO8 Lock Status" "Not locked,Locked" bitfld.long 0x00 7. " P7 ,PIO7 Lock Status" "Not locked,Locked" bitfld.long 0x00 6. " P6 ,PIO6 Lock Status" "Not locked,Locked" bitfld.long 0x00 5. " P5 ,PIO5 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 4. " P4 ,PIO4 Lock Status" "Not locked,Locked" bitfld.long 0x00 3. " P3 ,PIO3 Lock Status" "Not locked,Locked" bitfld.long 0x00 2. " P2 ,PIO2 Lock Status" "Not locked,Locked" bitfld.long 0x00 1. " P1 ,PIO1 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 0. " P0 ,PIO0 Lock Status" "Not locked,Locked" group.long 0xE4++0x03 line.long 0x00 "PIO_WPMR,PIO Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write Protect KEY" bitfld.long 0x00 0. " WPEN ,Write Protect Enable" "Disabled,Enabled" hgroup.long 0xe8++0x03 hide.long 0x00 "WPSR,PIO Write Protect Status Register" in group.long 0x100++0x03 line.long 0x00 "PIO_SCHMITT,PIO Schmitt Trigger Register" textline " " bitfld.long 0x00 12. " SCHMITT12 ,Schmitt Trigger 12 Disable" "No,Yes" bitfld.long 0x00 11. " SCHMITT11 ,Schmitt Trigger 11 Disable" "No,Yes" bitfld.long 0x00 10. " SCHMITT10 ,Schmitt Trigger 10 Disable" "No,Yes" bitfld.long 0x00 9. " SCHMITT9 ,Schmitt Trigger 9 Disable" "No,Yes" textline " " bitfld.long 0x00 8. " SCHMITT8 ,Schmitt Trigger 8 Disable" "No,Yes" bitfld.long 0x00 7. " SCHMITT7 ,Schmitt Trigger 7 Disable" "No,Yes" bitfld.long 0x00 6. " SCHMITT6 ,Schmitt Trigger 6 Disable" "No,Yes" bitfld.long 0x00 5. " SCHMITT5 ,Schmitt Trigger 5 Disable" "No,Yes" textline " " bitfld.long 0x00 4. " SCHMITT4 ,Schmitt Trigger 4 Disable" "No,Yes" bitfld.long 0x00 3. " SCHMITT3 ,Schmitt Trigger 3 Disable" "No,Yes" bitfld.long 0x00 2. " SCHMITT2 ,Schmitt Trigger 2 Disable" "No,Yes" bitfld.long 0x00 1. " SCHMITT1 ,Schmitt Trigger 1 Disable" "No,Yes" textline " " bitfld.long 0x00 0. " SCHMITT0 ,Schmitt Trigger 0 Disable" "No,Yes" textline " " tree "Parallel Capture" if ((d.l(ad:0x400E1000+0xE4)&0x01)==0x00) group.long 0x150++0x03 line.long 0x00 "PIO_PCMR,PIO Parallel Capture Mode Register" bitfld.long 0x00 11. " FRSTS ,Parallel Capture Mode First Sample" "Even index,Odd index" bitfld.long 0x00 10. " HALFS ,Parallel Capture Mode Half Sampling" "All data,One time out of two" textline " " bitfld.long 0x00 9. " ALWYS ,Parallel Capture Mode Always Sampling" "No,Yes" bitfld.long 0x00 4.--5. " DSIZE ,Parallel Capture Mode Data Size" "8 bit,16 bit,32 bit,?..." textline " " bitfld.long 0x00 0. " PCEN ,Parallel Capture Mode Enable" "Disabled,Enabled" else rgroup.long 0x150++0x03 line.long 0x00 "PIO_PCMR,PIO Parallel Capture Mode Register" bitfld.long 0x00 11. " FRSTS ,Parallel Capture Mode First Sample" "Even index,Odd index" bitfld.long 0x00 10. " HALFS ,Parallel Capture Mode Half Sampling" "All data,One time out of two" textline " " bitfld.long 0x00 9. " ALWYS ,Parallel Capture Mode Always Sampling" "No,Yes" bitfld.long 0x00 4.--5. " DSIZE ,Parallel Capture Mode Data Size" "8 bit,16 bit,32 bit," textline " " bitfld.long 0x00 0. " PCEN ,Parallel Capture Mode Enable" "Disabled,Enabled" endif group.long 0x15C++0x03 line.long 0x00 "PIO_PCIMR,PIO Parallel Capture Interrupt Mask Register" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXBUFF_set/clr ,Reception Buffer Full Interrupt Enable" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " ENDRX_set/clr ,End of Reception Transfer Interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " OVRE_set/clr ,Parallel Capture Mode Overrun Error Interrupt Enable" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " DRDY_set/clr ,Parallel Capture Mode Data Ready Interrupt Enable" "Disabled,Enabled" hgroup.long 0x160++0x03 hide.long 0x00 "PIO_PCISR,PIO Parallel Capture Interrupt Status Register" if (d.l(ad:0x400E1000+0x150)&0x30)==0x00 rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" hexmask.long.byte 0x00 0.--7. 1. " RDATA ,Parallel Capture Mode Reception Data" elif (d.l(ad:0x400E1000+0x150)&0x30)==0x10 rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" hexmask.long.word 0x00 0.--15. 1. " RDATA ,Parallel Capture Mode Reception Data" else rgroup.long 0x164++0x3 line.long 0x00 "PIO_PCRHR,PIO Parallel Capture Reception Holding Register" endif tree.end width 0xB tree.end endif tree.end tree "SSC (Synchronous Serial Controller)" base ad:0x40004000 width 13. wgroup.long 0x00++0x03 line.long 0x00 "CR,SSC Control Register" bitfld.long 0x00 15. " SWRST ,Software reset" "No effect,Reset" bitfld.long 0x00 9. " TXDIS ,Transmit disable" "No effect,Disabled" bitfld.long 0x00 8. " TXEN ,Transmit enable" "No effect,Enabled" bitfld.long 0x00 1. " RXDIS ,Receive disable" "No effect,Disabled" newline bitfld.long 0x00 0. " RXEN ,Receive enable" "No effect,Enabled" sif cpuis("ATSAM4S*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*") if ((per.l(ad:0x40004000+0xE4)&0x01)==0x00) group.long 0x04++0x03 line.long 0x00 "CMR,SSC Clock Mode Register" hexmask.long.word 0x00 0.--11. 1. " DIV ,Clock divider" group.long 0x10++0x0F line.long 0x00 "RCMR,SSC Receive Clock Mode Register" hexmask.long.byte 0x00 24.--31. 1. " PERIOD ,Receive period divider selection" hexmask.long.byte 0x00 16.--23. 1. " STTDLY ,Receive start delay" bitfld.long 0x00 12. " STOP ,Receive stop selection" "Completed,Compare 1" bitfld.long 0x00 8.--11. " START ,Receive start selection" "Continuous,Transmit start,Low,High,Falling,Rising,Level change,Any edge,Compare 0,?..." newline bitfld.long 0x00 6.--7. " CKG ,Receive clock gating selection" "No gating,Low,High,?..." bitfld.long 0x00 5. " CKI ,Receive clock inversion (data inputs/frame sync)" "Falling/rising,Rising/falling" bitfld.long 0x00 2.--4. " CKO ,Receive clock output mode selection" "No clock,Continuous,During transfers,?..." bitfld.long 0x00 0.--1. " CKS ,Receive clock selection" "Divided,TK,RK,?..." line.long 0x04 "RFMR,SSC Receive Frame Mode Register" bitfld.long 0x04 28.--31. " FSLEN_EXT ,FSLEN field extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 24. " FSEDGE ,Frame sync edge detection" "Positive,Negative" bitfld.long 0x04 20.--22. " FSOS ,Receive frame sync output selection" "No signal,Negative,Positive,Low,High,Toggled,?..." bitfld.long 0x04 16.--19. " FSLEN ,Receive frame sync length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 8.--11. " DATNB ,Data number per frame" "1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,9 words,10 words,11 words,12 words,13 words,14 words,15 words,16 words" bitfld.long 0x04 7. " MSBF ,Most significant bit first" "LSB,MSB" bitfld.long 0x04 5. " LOOP ,Loop mode" "Normal,Loop" bitfld.long 0x04 0.--4. " DATLEN ,Data length" ",2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit,17-bit,18-bit,19-bit,20-bit,21-bit,22-bit,23-bit,24-bit,25-bit,26-bit,27-bit,28-bit,29-bit,30-bit,31-bit,32-bit" line.long 0x08 "TCMR,SSC Transmit Clock Mode Register" hexmask.long.byte 0x08 24.--31. 1. " PERIOD ,Transmit period divider selection" hexmask.long.byte 0x08 16.--23. 1. " STTDLY ,Transmit start delay" bitfld.long 0x08 8.--11. " START ,Transmit start selection" "Continuous,Receive start,Low,High,Falling,Rising,Level change,Any edge,?..." bitfld.long 0x08 6.--7. " CKG ,Transmit clock gating selection" "No gating,Low,High,?..." newline bitfld.long 0x08 5. " CKI ,Transmit clock inversion (shifted out/sampled)" "Falling/rising,Rising/falling" bitfld.long 0x08 2.--4. " CKO ,Transmit clock output mode selection" "No clock,Continuous,During transfers,?..." bitfld.long 0x08 0.--1. " CKS ,Transmit clock selection" "Divided,RK,TK,?..." line.long 0x0C "TFMR,SSC Transmit Frame Mode Register" bitfld.long 0x0C 28.--31. " FSLEN_EXT ,FSLEN field extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 24. " FSEDGE ,Frame sync edge detection" "Positive,Negative" bitfld.long 0x0C 23. " FSDEN ,Frame sync data enable" "Disabled,Enabled" bitfld.long 0x0C 20.--22. " FSOS ,Transmit frame sync output selection" "No signal,Negative,Positive,Low,High,Toggled,?..." newline bitfld.long 0x0C 16.--19. " FSLEN ,Transmit frame sync length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 8.--11. " DATNB ,Data number per frame" "1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,9 words,10 words,11 words,12 words,13 words,14 words,15 words,16 words" bitfld.long 0x0C 7. " MSBF ,Most significant bit first" "LSB,MSB" bitfld.long 0x0C 5. " DATDEF ,Data default value" "Low,High" newline bitfld.long 0x0C 0.--4. " DATLEN ,Data length" ",2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit,17-bit,18-bit,19-bit,20-bit,21-bit,22-bit,23-bit,24-bit,25-bit,26-bit,27-bit,28-bit,29-bit,30-bit,31-bit,32-bit" else rgroup.long 0x04++0x03 line.long 0x00 "CMR,SSC Clock Mode Register" hexmask.long.word 0x00 0.--11. 1. " DIV ,Clock divider" rgroup.long 0x10++0x0F line.long 0x00 "RCMR,SSC Receive Clock Mode Register" hexmask.long.byte 0x00 24.--31. 1. " PERIOD ,Receive period divider selection" hexmask.long.byte 0x00 16.--23. 1. " STTDLY ,Receive start delay" bitfld.long 0x00 12. " STOP ,Receive stop selection" "Completed,Compare 1" bitfld.long 0x00 8.--11. " START ,Receive start selection" "Continuous,Transmit start,Low,High,Falling,Rising,Level change,Any edge,Compare 0,?..." newline bitfld.long 0x00 6.--7. " CKG ,Receive clock gating selection" "No gating,Low,High,?..." bitfld.long 0x00 5. " CKI ,Receive clock inversion (data inputs/frame sync)" "Falling/rising,Rising/falling" bitfld.long 0x00 2.--4. " CKO ,Receive clock output mode selection" "No clock,Continuous,During transfers,?..." bitfld.long 0x00 0.--1. " CKS ,Receive clock selection" "Divided,TK,RK,?..." line.long 0x04 "RFMR,SSC Receive Frame Mode Register" bitfld.long 0x04 28.--31. " FSLEN_EXT ,FSLEN field extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 24. " FSEDGE ,Frame sync edge detection" "Positive,Negative" bitfld.long 0x04 20.--22. " FSOS ,Receive frame sync output selection" "No signal,Negative,Positive,Low,High,Toggled,?..." bitfld.long 0x04 16.--19. " FSLEN ,Receive frame sync length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 8.--11. " DATNB ,Data number per frame" "1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,9 words,10 words,11 words,12 words,13 words,14 words,15 words,16 words" bitfld.long 0x04 7. " MSBF ,Most significant bit first" "LSB,MSB" bitfld.long 0x04 5. " LOOP ,Loop mode" "Normal,Loop" bitfld.long 0x04 0.--4. " DATLEN ,Data length" ",2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit,17-bit,18-bit,19-bit,20-bit,21-bit,22-bit,23-bit,24-bit,25-bit,26-bit,27-bit,28-bit,29-bit,30-bit,31-bit,32-bit" line.long 0x08 "TCMR,SSC Transmit Clock Mode Register" hexmask.long.byte 0x08 24.--31. 1. " PERIOD ,Transmit period divider selection" hexmask.long.byte 0x08 16.--23. 1. " STTDLY ,Transmit start delay" bitfld.long 0x08 8.--11. " START ,Transmit start selection" "Continuous,Receive start,Low,High,Falling,Rising,Level change,Any edge,?..." bitfld.long 0x08 6.--7. " CKG ,Transmit clock gating selection" "No gating,Low,High,?..." newline bitfld.long 0x08 5. " CKI ,Transmit clock inversion (shifted out/sampled)" "Falling/rising,Rising/falling" bitfld.long 0x08 2.--4. " CKO ,Transmit clock output mode selection" "No clock,Continuous,During transfers,?..." bitfld.long 0x08 0.--1. " CKS ,Transmit clock selection" "Divided,RK,TK,?..." line.long 0x0C "TFMR,SSC Transmit Frame Mode Register" bitfld.long 0x0C 28.--31. " FSLEN_EXT ,FSLEN field extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 24. " FSEDGE ,Frame sync edge detection" "Positive,Negative" bitfld.long 0x0C 23. " FSDEN ,Frame sync data enable" "Disabled,Enabled" bitfld.long 0x0C 20.--22. " FSOS ,Transmit frame sync output selection" "No signal,Negative,Positive,Low,High,Toggled,?..." newline bitfld.long 0x0C 16.--19. " FSLEN ,Transmit frame sync length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 8.--11. " DATNB ,Data number per frame" "1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,9 words,10 words,11 words,12 words,13 words,14 words,15 words,16 words" bitfld.long 0x0C 7. " MSBF ,Most significant bit first" "LSB,MSB" bitfld.long 0x0C 5. " DATDEF ,Data default value" "Low,High" newline bitfld.long 0x0C 0.--4. " DATLEN ,Data length" ",2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit,17-bit,18-bit,19-bit,20-bit,21-bit,22-bit,23-bit,24-bit,25-bit,26-bit,27-bit,28-bit,29-bit,30-bit,31-bit,32-bit" endif else group.long 0x04++0x03 line.long 0x00 "CMR,SSC Clock Mode Register" hexmask.long.word 0x00 0.--11. 1. " DIV ,Clock divider" group.long 0x10++0x0F line.long 0x00 "RCMR,SSC Receive Clock Mode Register" hexmask.long.byte 0x00 24.--31. 1. " PERIOD ,Receive period divider selection" hexmask.long.byte 0x00 16.--23. 1. " STTDLY ,Receive start delay" bitfld.long 0x00 12. " STOP ,Receive stop selection" "Completed,Compare 1" bitfld.long 0x00 8.--11. " START ,Receive start selection" "Continuous,Transmit start,Low,High,Falling,Rising,Level change,Any edge,Compare 0,?..." newline bitfld.long 0x00 6.--7. " CKG ,Receive clock gating selection" "No gating,RF Low,RF High,?..." bitfld.long 0x00 5. " CKI ,Receive clock inversion (data inputs/frame sync)" "Falling/rising,Rising/falling" bitfld.long 0x00 2.--4. " CKO ,Receive clock output mode selection" "No clock,Continuous,During transfers,?..." bitfld.long 0x00 0.--1. " CKS ,Receive clock selection" "Divided,TK,RK,?..." line.long 0x04 "RFMR,SSC Receive Frame Mode Register" bitfld.long 0x04 28.--31. " FSLEN_EXT ,FSLEN field extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 24. " FSEDGE ,Frame sync edge detection" "Positive,Negative" bitfld.long 0x04 20.--22. " FSOS ,Receive frame sync output selection" "No signal,Negative,Positive,Low,High,Toggled,?..." bitfld.long 0x04 16.--19. " FSLEN ,Receive frame sync length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 8.--11. " DATNB ,Data number per frame" "1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,9 words,10 words,11 words,12 words,13 words,14 words,15 words,16 words" bitfld.long 0x04 7. " MSBF ,Most significant bit first" "LSB,MSB" bitfld.long 0x04 5. " LOOP ,Loop mode" "Normal,Loop" bitfld.long 0x04 0.--4. " DATLEN ,Data length" ",2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit,17-bit,18-bit,19-bit,20-bit,21-bit,22-bit,23-bit,24-bit,25-bit,26-bit,27-bit,28-bit,29-bit,30-bit,31-bit,32-bit" line.long 0x08 "TCMR,SSC Transmit Clock Mode Register" hexmask.long.byte 0x08 24.--31. 1. " PERIOD ,Transmit period divider selection" hexmask.long.byte 0x08 16.--23. 1. " STTDLY ,Transmit start delay" bitfld.long 0x08 8.--11. " START ,Transmit start selection" "Continuous,Receive start,Low,High,Falling,Rising,Level change,Any edge,?..." bitfld.long 0x08 6.--7. " CKG ,Transmit clock gating selection" "No gating,Low,High,?..." newline bitfld.long 0x08 5. " CKI ,Transmit clock inversion (shifted out/sampled)" "Falling/rising,Rising/falling" bitfld.long 0x08 2.--4. " CKO ,Transmit clock output mode selection" "No clock,Continuous,During transfers,?..." bitfld.long 0x08 0.--1. " CKS ,Transmit clock selection" "Divided,RK,TK,?..." line.long 0x0C "TFMR,SSC Transmit Frame Mode Register" bitfld.long 0x0C 28.--31. " FSLEN_EXT ,FSLEN field extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 24. " FSEDGE ,Frame sync edge detection" "Positive,Negative" bitfld.long 0x0C 23. " FSDEN ,Frame sync data enable" "Disabled,Enabled" bitfld.long 0x0C 20.--22. " FSOS ,Transmit frame sync output selection" "No signal,Negative,Positive,Low,High,Toggled,?..." newline bitfld.long 0x0C 16.--19. " FSLEN ,Transmit frame sync length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 8.--11. " DATNB ,Data number per frame" "1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,9 words,10 words,11 words,12 words,13 words,14 words,15 words,16 words" bitfld.long 0x0C 7. " MSBF ,Most significant bit first" "LSB,MSB" bitfld.long 0x0C 5. " DATDEF ,Data default value" "Low,High" newline bitfld.long 0x0C 0.--4. " DATLEN ,Data length" ",2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit,17-bit,18-bit,19-bit,20-bit,21-bit,22-bit,23-bit,24-bit,25-bit,26-bit,27-bit,28-bit,29-bit,30-bit,31-bit,32-bit" endif newline hgroup.long 0x20++0x03 hide.long 0x00 "RHR,SSC Receive Holding Register" in newline wgroup.long 0x24++0x03 line.long 0x00 "THR,SSC Transmit Holding Register" newline hgroup.long 0x30++0x03 hide.long 0x00 "RSHR,SSC Receive Synchronization Holding Register" in newline group.long 0x34++0x03 line.long 0x00 "TSHR,SSC Transmit Synchronization Holding Register" hexmask.long.word 0x00 0.--15. 1. " TSDAT ,Transmit synchronization data" sif cpuis("ATSAM4S*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*") if ((per.l(ad:0x40004000+0xE4)&0x01)==0x00) group.long 0x38++0x07 line.long 0x00 "RC0R,SSC Receive Compare 0 Register" hexmask.long.word 0x00 0.--15. 1. " CP0 ,Receive compare data 0" line.long 0x04 "RC1R,SSC Receive Compare 1 Register" hexmask.long.word 0x04 0.--15. 1. " CP1 ,Receive compare data 1" else rgroup.long 0x38++0x07 line.long 0x00 "RC0R,SSC Receive Compare 0 Register" hexmask.long.word 0x00 0.--15. 1. " CP0 ,Receive compare data 0" line.long 0x04 "RC1R,SSC Receive Compare 1 Register" hexmask.long.word 0x04 0.--15. 1. " CP1 ,Receive compare data 1" endif else group.long 0x38++0x07 line.long 0x00 "RC0R,SSC Receive Compare 0 Register" hexmask.long.word 0x00 0.--15. 1. " CP0 ,Receive compare data 0" line.long 0x04 "RC1R,SSC Receive Compare 1 Register" hexmask.long.word 0x04 0.--15. 1. " CP1 ,Receive compare data 1" endif newline hgroup.long 0x40++0x03 hide.long 0x00 "SR,SSC Status Register" in newline group.long 0x4C++0x03 line.long 0x00 "IMR_SET/CLR,SSC Interrupt Mask Set/Clear Register" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " RXSYN ,Rx sync interrupt" "Masked,Unmasked" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " TXSYN ,Tx sync interrupt" "Masked,Unmasked" newline setclrfld.long 0x00 9. -0x08 9. -0x04 9. " CP1 ,Compare 1 interrupt" "Masked,Unmasked" setclrfld.long 0x00 8. -0x08 8. -0x04 8. " CP0 ,Compare 0 interrupt" "Masked,Unmasked" newline sif !cpuis("AT91SAM3A*")&&!cpuis("AT91SAM3X4C")&&!cpuis("AT91SAM3X4E")&&!cpuis("AT91SAM3X8C")&&!cpuis("AT91SAM3X8E")&&!cpuis("ATSAMV7*")&&!cpuis("ATSAMS7*")&&!cpuis("ATSAME70*") setclrfld.long 0x00 7. -0x08 7. -0x04 7. " RXBUFF ,Receive buffer full interrupt" "Masked,Unmasked" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " ENDRX ,Reception end interrupt" "Masked,Unmasked" newline endif setclrfld.long 0x00 5. -0x08 5. -0x04 5. " OVRUN ,Receive overrun interrupt" "Masked,Unmasked" setclrfld.long 0x00 4. -0x08 4. -0x04 4. " RXRDY ,Receive ready interrupt" "Masked,Unmasked" newline sif !cpuis("AT91SAM3A*")&&!cpuis("AT91SAM3X4C")&&!cpuis("AT91SAM3X4E")&&!cpuis("AT91SAM3X8C")&&!cpuis("AT91SAM3X8E")&&!cpuis("ATSAMV7*")&&!cpuis("ATSAMS7*")&&!cpuis("ATSAME70*") setclrfld.long 0x00 3. -0x08 3. -0x04 3. " TXBUFE ,Transmit buffer empty interrupt" "Masked,Unmasked" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " ENDTX ,Transmission end interrupt" "Masked,Unmasked" newline endif setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TXEMPTY ,Transmit empty interrupt" "Masked,Unmasked" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXRDY ,Transmit ready interrupt" "Masked,Unmasked" group.long 0xE4++0x03 line.long 0x00 "WPMR,SSC Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write protect KEY" bitfld.long 0x00 0. " WPEN ,Write protect enable" "Disabled,Enabled" hgroup.long 0xE8++0x03 hide.long 0x00 "WPSR,SSC Write Protect Status Register" in width 0x0B tree "PDC (Peripheral DMA Controller)" base ad:0x40004000 width 9. group.long 0x100++0x01F line.long 0x00 "SSC_RPR,Receive Pointer Register" line.long 0x04 "SSC_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "SSC_TPR,Transmit Pointer Register" line.long 0x0c "SSC_TCR,Transmit Counter Register" hexmask.long.word 0x0C 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "SSC_RNPR,Receive Next Pointer Register" line.long 0x14 "SSC_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "SSC_TNPR,Transmit Next Pointer Register" line.long 0x1c "SSC_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "SSC_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disable" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enable" bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disable" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enable" rgroup.long 0x124++0x03 line.long 0x00 "SSC_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0x0B tree.end tree.end tree "SPI (Serial Peripheral Interface)" base ad:0x40008000 width 13. wgroup.long 0x00++0x03 line.long 0x00 "CR,SPI Control Register" sif cpuis("ATSAME70*") bitfld.long 0x00 31. "FIFODIS,FIFO disable" "No effect,Disabled" bitfld.long 0x00 30. "FIFOEN,FIFO enable" "No effect,Enabled" endif bitfld.long 0x00 24. " LASTXFER ,Last transfer" "No effect,Deasserted" sif cpuis("ATSAME70*") bitfld.long 0x00 17. "RXFCLR,Receive FIFO clear" "Di,Enabled" bitfld.long 0x00 16. "TXFCLR,Transmit FIFO clear" "No effect,Transmitted" endif bitfld.long 0x00 7. " SWRST ,SPI software reset" "No effect,Reset" newline bitfld.long 0x00 1. " SPIDIS ,SPI disable" "No effect,Yes" bitfld.long 0x00 0. " SPIEN ,SPI enable" "No effect,Enabled" sif cpuis("ATSAM4S*")||cpuis("ATSAMV7*")||cpuis("ATSAME70*") if ((per.l(ad:0x40008000+0xE4)&0x01)==0x00) if (((per.l((ad:0x40008000+0x04)))&0x07)==0x01) group.long 0x04++0x03 line.long 0x00 "MR,SPI Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip selects delay" newline bitfld.long 0x00 16.--19. " PCS ,Peripheral chip select" "NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 1011,NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 0111,NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 1011,NPCS = 1110,NPCS = 1101,NPCS = 1110,?..." newline bitfld.long 0x00 7. " LLB ,Local loopback enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " WDRBT ,Wait data read before transfer" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode fault detection disable" "No,Yes" newline bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly,Decoder" bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable" newline bitfld.long 0x00 0. " MSTR ,Master mode" "Slave,Master" elif (((per.l((ad:0x40008000+0x04)))&0x07)==0x05) group.long 0x04++0x03 line.long 0x00 "MR,SPI Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip selects delay" newline bitfld.long 0x00 16.--19. " PCS ,Peripheral chip select" "NPCS = 0000,NPCS = 0001,NPCS = 0010,NPCS = 0011,NPCS = 0100,NPCS = 0101,NPCS = 0110,NPCS = 0111,NPCS = 1000,NPCS = 1001,NPCS = 1010,NPCS = 1011,NPCS = 1100,NPCS = 1101,NPCS = 1110,NPCS = 1111" newline bitfld.long 0x00 7. " LLB ,Local loopback enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " WDRBT ,Wait data read before transfer" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode fault detection disable" "No,Yes" newline bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly,Decoder" bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable" newline bitfld.long 0x00 0. " MSTR ,Master mode" "Slave,Master" elif (((per.l((ad:0x40008000+0x04)))&0x07)==(0x03||0x07)) group.long 0x04++0x03 line.long 0x00 "MR,SPI Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip selects delay" newline newline bitfld.long 0x00 7. " LLB ,Local loopback enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " WDRBT ,Wait data read before transfer" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode fault detection disable" "No,Yes" newline bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly,Decoder" bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable" newline bitfld.long 0x00 0. " MSTR ,Master mode" "Slave,Master" elif (((per.l((ad:0x40008000+0x04)))&0x07)==0x00) group.long 0x04++0x03 line.long 0x00 "MR,SPI Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip selects delay" newline bitfld.long 0x00 16.--19. " PCS ,Peripheral chip select" "NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 1011,NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 0111,NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 1011,NPCS = 1110,NPCS = 1101,NPCS = 1110,?..." newline newline bitfld.long 0x00 5. " WDRBT ,Wait data read before transfer" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode fault detection disable" "No,Yes" newline bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly,Decoder" bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable" newline bitfld.long 0x00 0. " MSTR ,Master mode" "Slave,Master" elif (((per.l((ad:0x40008000+0x04)))&0x07)==0x04) group.long 0x04++0x03 line.long 0x00 "MR,SPI Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip selects delay" newline bitfld.long 0x00 16.--19. " PCS ,Peripheral chip select" "NPCS = 0000,NPCS = 0001,NPCS = 0010,NPCS = 0011,NPCS = 0100,NPCS = 0101,NPCS = 0110,NPCS = 0111,NPCS = 1000,NPCS = 1001,NPCS = 1010,NPCS = 1011,NPCS = 1100,NPCS = 1101,NPCS = 1110,NPCS = 1111" newline newline bitfld.long 0x00 5. " WDRBT ,Wait data read before transfer" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode fault detection disable" "No,Yes" newline bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly,Decoder" bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable" newline bitfld.long 0x00 0. " MSTR ,Master mode" "Slave,Master" else group.long 0x04++0x03 line.long 0x00 "MR,SPI Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip selects belay" newline newline newline bitfld.long 0x00 5. " WDRBT ,Wait data read before transfer" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode fault detection disable" "No,Yes" newline bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly,Decoder" bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable" newline bitfld.long 0x00 0. " MSTR ,Master mode" "Slave,Master" endif else if (((per.l((ad:0x40008000+0x04)))&0x07)==0x01) rgroup.long 0x04++0x03 line.long 0x00 "MR,SPI Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip selects delay" newline bitfld.long 0x00 16.--19. " PCS ,Peripheral chip select" "NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 1011,NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 0111,NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 1011,NPCS = 1110,NPCS = 1101,NPCS = 1110,?..." newline bitfld.long 0x00 7. " LLB ,Local loopback enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " WDRBT ,Wait data read before transfer" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode fault detection disable" "No,Yes" newline bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly,Decoder" bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable" newline bitfld.long 0x00 0. " MSTR ,Master mode" "Slave,Master" elif (((per.l((ad:0x40008000+0x04)))&0x07)==0x05) rgroup.long 0x04++0x03 line.long 0x00 "MR,SPI Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip selects delay" newline bitfld.long 0x00 16.--19. " PCS ,Peripheral chip select" "NPCS = 0000,NPCS = 0001,NPCS = 0010,NPCS = 0011,NPCS = 0100,NPCS = 0101,NPCS = 0110,NPCS = 0111,NPCS = 1000,NPCS = 1001,NPCS = 1010,NPCS = 1011,NPCS = 1100,NPCS = 1101,NPCS = 1110,NPCS = 1111" newline bitfld.long 0x00 7. " LLB ,Local loopback enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " WDRBT ,Wait data read before transfer" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode fault detection disable" "No,Yes" newline bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly,Decoder" bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable" newline bitfld.long 0x00 0. " MSTR ,Master mode" "Slave,Master" elif (((per.l((ad:0x40008000+0x04)))&0x07)==(0x03||0x07)) rgroup.long 0x04++0x03 line.long 0x00 "MR,SPI Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip selects delay" newline newline bitfld.long 0x00 7. " LLB ,Local loopback enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " WDRBT ,Wait data read before transfer" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode fault detection disable" "No,Yes" newline bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly,Decoder" bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable" newline bitfld.long 0x00 0. " MSTR ,Master mode" "Slave,Master" elif (((per.l((ad:0x40008000+0x04)))&0x07)==0x00) rgroup.long 0x04++0x03 line.long 0x00 "MR,SPI Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip selects delay" newline bitfld.long 0x00 16.--19. " PCS ,Peripheral chip select" "NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 1011,NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 0111,NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 1011,NPCS = 1110,NPCS = 1101,NPCS = 1110,?..." newline newline bitfld.long 0x00 5. " WDRBT ,Wait data read before transfer" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode fault detection disable" "No,Yes" newline bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly,Decoder" bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable" newline bitfld.long 0x00 0. " MSTR ,Master mode" "Slave,Master" elif (((per.l((ad:0x40008000+0x04)))&0x07)==0x04) rgroup.long 0x04++0x03 line.long 0x00 "MR,SPI Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip selects delay" newline bitfld.long 0x00 16.--19. " PCS ,Peripheral chip select" "NPCS = 0000,NPCS = 0001,NPCS = 0010,NPCS = 0011,NPCS = 0100,NPCS = 0101,NPCS = 0110,NPCS = 0111,NPCS = 1000,NPCS = 1001,NPCS = 1010,NPCS = 1011,NPCS = 1100,NPCS = 1101,NPCS = 1110,NPCS = 1111" newline newline bitfld.long 0x00 5. " WDRBT ,Wait data read before transfer" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode fault detection disable" "No,Yes" newline bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly,Decoder" bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable" newline bitfld.long 0x00 0. " MSTR ,Master mode" "Slave,Master" else rgroup.long 0x04++0x03 line.long 0x00 "MR,SPI Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip selects delay" newline newline newline bitfld.long 0x00 5. " WDRBT ,Wait data read before transfer" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode fault detection disable" "No,Yes" newline bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly,Decoder" bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable" newline bitfld.long 0x00 0. " MSTR ,Master mode" "Slave,Master" endif endif else if (((per.l((ad:0x40008000+0x04)))&0x07)==0x01) group.long 0x04++0x03 line.long 0x00 "MR,SPI Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip selects delay" newline bitfld.long 0x00 16.--19. " PCS ,Peripheral chip select" "NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 1011,NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 0111,NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 1011,NPCS = 1110,NPCS = 1101,NPCS = 1110,?..." newline bitfld.long 0x00 7. " LLB ,Local loopback enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " WDRBT ,Wait data read before transfer" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode fault detection disable" "No,Yes" newline bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly,Decoder" bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable" newline bitfld.long 0x00 0. " MSTR ,Master mode" "Slave,Master" elif (((per.l((ad:0x40008000+0x04)))&0x07)==0x05) group.long 0x04++0x03 line.long 0x00 "MR,SPI Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip selects delay" newline bitfld.long 0x00 16.--19. " PCS ,Peripheral chip select" "NPCS = 0000,NPCS = 0001,NPCS = 0010,NPCS = 0011,NPCS = 0100,NPCS = 0101,NPCS = 0110,NPCS = 0111,NPCS = 1000,NPCS = 1001,NPCS = 1010,NPCS = 1011,NPCS = 1100,NPCS = 1101,NPCS = 1110,NPCS = 1111" newline bitfld.long 0x00 7. " LLB ,Local loopback enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " WDRBT ,Wait data read before transfer" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode fault detection disable" "No,Yes" newline bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly,Decoder" bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable" newline bitfld.long 0x00 0. " MSTR ,Master mode" "Slave,Master" elif (((per.l((ad:0x40008000+0x04)))&0x07)==(0x03||0x07)) group.long 0x04++0x03 line.long 0x00 "MR,SPI Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip selects delay" newline newline bitfld.long 0x00 7. " LLB ,Local loopback enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " WDRBT ,Wait data read before transfer" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode fault detection disable" "No,Yes" newline bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly,Decoder" bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable" newline bitfld.long 0x00 0. " MSTR ,Master mode" "Slave,Master" elif (((per.l((ad:0x40008000+0x04)))&0x07)==0x00) group.long 0x04++0x03 line.long 0x00 "MR,SPI Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip selects delay" newline bitfld.long 0x00 16.--19. " PCS ,Peripheral chip select" "NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 1011,NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 0111,NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 1011,NPCS = 1110,NPCS = 1101,NPCS = 1110,?..." newline newline bitfld.long 0x00 5. " WDRBT ,Wait data read before transfer" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode fault detection disable" "No,Yes" newline bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly,Decoder" bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable" newline bitfld.long 0x00 0. " MSTR ,Master mode" "Slave,Master" elif (((per.l((ad:0x40008000+0x04)))&0x07)==0x04) group.long 0x04++0x03 line.long 0x00 "MR,SPI Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip selects delay" newline bitfld.long 0x00 16.--19. " PCS ,Peripheral chip select" "NPCS = 0000,NPCS = 0001,NPCS = 0010,NPCS = 0011,NPCS = 0100,NPCS = 0101,NPCS = 0110,NPCS = 0111,NPCS = 1000,NPCS = 1001,NPCS = 1010,NPCS = 1011,NPCS = 1100,NPCS = 1101,NPCS = 1110,NPCS = 1111" newline newline bitfld.long 0x00 5. " WDRBT ,Wait data read before transfer" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode fault detection disable" "No,Yes" newline bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly,Decoder" bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable" newline bitfld.long 0x00 0. " MSTR ,Master mode" "Slave,Master" else group.long 0x04++0x03 line.long 0x00 "MR,SPI Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Chip selects delay" newline newline newline bitfld.long 0x00 5. " WDRBT ,Wait data read before transfer" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode fault detection disable" "No,Yes" newline bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly,Decoder" bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable" newline bitfld.long 0x00 0. " MSTR ,Master mode" "Slave,Master" endif endif hgroup.long 0x08++0x03 hide.long 0x00 "RDR,SPI Receive Data Register" in if (((per.l((ad:0x40008000+0x04)))&0x06)==0x02) wgroup.long 0x0C++0x03 line.long 0x00 "TDR,SPI Transmit Data Register" bitfld.long 0x00 24. " LASTXFER ,Last transfer" "No effect,Deasserted" bitfld.long 0x00 16.--19. " PCS ,Peripheral chip select" "NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 1011,NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 0111,NPCS = 1110,NPCS = 1101,NPCS = 1110,NPCS = 1011,NPCS = 1110,NPCS = 1101,NPCS = 1110,?..." newline hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit data" elif (((per.l((ad:0x40008000+0x04)))&0x06)==0x06) wgroup.long 0x0C++0x03 line.long 0x00 "TDR,SPI Transmit Data Register" bitfld.long 0x00 24. " LASTXFER ,Last transfer" "No effect,Deasserted" bitfld.long 0x00 16.--19. " PCS ,Peripheral chip select" "NPCS = 0000,NPCS = 0001,NPCS = 0010,NPCS = 0011,NPCS = 0100,NPCS = 0101,NPCS = 0110,NPCS = 0111,NPCS = 1000,NPCS = 1001,NPCS = 1010,NPCS = 1011,NPCS = 1100,NPCS = 1101,NPCS = 1110,NPCS = 1111" newline hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit data" else wgroup.long 0x0C++0x03 line.long 0x00 "TDR,SPI Transmit Data Register" newline hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit data" endif hgroup.long 0x10++0x03 hide.long 0x00 "SR,SPI Status Register" in sif cpuis("AT91SAM3S*")||cpuis("AT91SAM3N*")||cpuis("ATSAM4E*")||cpuis("ATSAM4S*")||cpuis("ATSAMG51") group.long 0x1C++0x03 line.long 0x00 "IMR_SET/CLR,SPI Interrupt Mask Set/Clear Register" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " UNDES ,Underrun error interrupt mask" "Masked,Unmasked" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXEMPTY ,Transmission registers empty mask" "Masked,Unmasked" newline setclrfld.long 0x00 8. -0x08 8. -0x04 8. " NSSR ,NSS rising interrupt mask" "Masked,Unmasked" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " TXBUFE ,Transmit buffer empty interrupt mask" "Masked,Unmasked" newline setclrfld.long 0x00 6. -0x08 6. -0x04 6. " RXBUFF ,Receive buffer full interrupt mask" "Masked,Unmasked" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " ENDTX ,End of transmit buffer interrupt mask" "Masked,Unmasked" newline setclrfld.long 0x00 4. -0x08 4. -0x04 4. " ENDRX ,End of receive buffer interrupt mask" "Masked,Unmasked" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " OVRES ,Overrun error interrupt mask" "Masked,Unmasked" newline setclrfld.long 0x00 2. -0x08 2. -0x04 2. " MODF ,Mode fault error interrupt mask" "Masked,Unmasked" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TDRE ,SPI transmit data register empty interrupt mask" "Masked,Unmasked" newline setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RDRF ,Receive data register full interrupt mask" "Masked,Unmasked" else group.long 0x1C++0x03 line.long 0x00 "IMR_SET/CLR,SPI Interrupt Mask Set/Clear Register" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " UNDES ,Underrun error interrupt mask" "Masked,Unmasked" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXEMPTY ,Transmission registers empty mask" "Masked,Unmasked" newline setclrfld.long 0x00 8. -0x08 8. -0x04 8. " NSSR ,NSS rising interrupt mask" "Masked,Unmasked" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " OVRES ,Overrun error interrupt mask" "Masked,Unmasked" newline setclrfld.long 0x00 2. -0x08 2. -0x04 2. " MODF ,Mode fault error interrupt mask" "Masked,Unmasked" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TDRE ,SPI transmit data register empty interrupt mask" "Masked,Unmasked" newline setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RDRF ,Receive data register full interrupt mask" "Masked,Unmasked" endif sif cpuis("ATSAM4S*")||cpuis("ATSAMV7*")||cpuis("ATSAME70*") if ((per.l(ad:0x40008000+0xE4)&0x01)==0x00) group.long 0x30++0x03 line.long 0x00 "CSR0,SPI Chip Select Register 0" hexmask.long.byte 0x00 24.--31. 1. " DLYBCT ,Consecutive transfers delay" hexmask.long.byte 0x00 16.--23. 1. " DLYBS ,Delay before SPCK" newline hexmask.long.byte 0x00 8.--15. 1. " SCBR ,Serial clock bit rate" bitfld.long 0x00 4.--7. " BITS ,Bits per transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..." newline bitfld.long 0x00 3. " CSAAT ,Chip select active after transfer" "Risen,Not risen" bitfld.long 0x00 2. " CSNAAT ,Chip select not active after transfer" "Not risen,Risen" newline bitfld.long 0x00 1. " NCPHA ,Clock phase (leading/following edge)" "Changed/captured,Captured/changed" bitfld.long 0x00 0. " CPOL ,Clock polarity" "Low,High" else rgroup.long 0x30++0x03 line.long 0x00 "CSR0,SPI Chip Select Register 0" hexmask.long.byte 0x00 24.--31. 1. " DLYBCT ,Consecutive transfers delay" hexmask.long.byte 0x00 16.--23. 1. " DLYBS ,Delay before SPCK" newline hexmask.long.byte 0x00 8.--15. 1. " SCBR ,Serial clock baud rate" bitfld.long 0x00 4.--7. " BITS ,Bits per transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..." newline bitfld.long 0x00 3. " CSAAT ,Chip select active after transfer" "Risen,Not risen" bitfld.long 0x00 2. " CSNAAT ,Chip select not active after transfer" "Not risen,Risen" newline bitfld.long 0x00 1. " NCPHA ,Clock phase (leading/following edge)" "Changed/captured,Captured/changed" bitfld.long 0x00 0. " CPOL ,Clock polarity" "Low,High" endif if ((per.l(ad:0x40008000+0xE4)&0x01)==0x00) group.long 0x34++0x03 line.long 0x00 "CSR1,SPI Chip Select Register 1" hexmask.long.byte 0x00 24.--31. 1. " DLYBCT ,Consecutive transfers delay" hexmask.long.byte 0x00 16.--23. 1. " DLYBS ,Delay before SPCK" newline hexmask.long.byte 0x00 8.--15. 1. " SCBR ,Serial clock bit rate" bitfld.long 0x00 4.--7. " BITS ,Bits per transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..." newline bitfld.long 0x00 3. " CSAAT ,Chip select active after transfer" "Risen,Not risen" bitfld.long 0x00 2. " CSNAAT ,Chip select not active after transfer" "Not risen,Risen" newline bitfld.long 0x00 1. " NCPHA ,Clock phase (leading/following edge)" "Changed/captured,Captured/changed" bitfld.long 0x00 0. " CPOL ,Clock polarity" "Low,High" else rgroup.long 0x34++0x03 line.long 0x00 "CSR1,SPI Chip Select Register 1" hexmask.long.byte 0x00 24.--31. 1. " DLYBCT ,Consecutive transfers delay" hexmask.long.byte 0x00 16.--23. 1. " DLYBS ,Delay before SPCK" newline hexmask.long.byte 0x00 8.--15. 1. " SCBR ,Serial clock baud rate" bitfld.long 0x00 4.--7. " BITS ,Bits per transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..." newline bitfld.long 0x00 3. " CSAAT ,Chip select active after transfer" "Risen,Not risen" bitfld.long 0x00 2. " CSNAAT ,Chip select not active after transfer" "Not risen,Risen" newline bitfld.long 0x00 1. " NCPHA ,Clock phase (leading/following edge)" "Changed/captured,Captured/changed" bitfld.long 0x00 0. " CPOL ,Clock polarity" "Low,High" endif if ((per.l(ad:0x40008000+0xE4)&0x01)==0x00) group.long 0x38++0x03 line.long 0x00 "CSR2,SPI Chip Select Register 2" hexmask.long.byte 0x00 24.--31. 1. " DLYBCT ,Consecutive transfers delay" hexmask.long.byte 0x00 16.--23. 1. " DLYBS ,Delay before SPCK" newline hexmask.long.byte 0x00 8.--15. 1. " SCBR ,Serial clock bit rate" bitfld.long 0x00 4.--7. " BITS ,Bits per transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..." newline bitfld.long 0x00 3. " CSAAT ,Chip select active after transfer" "Risen,Not risen" bitfld.long 0x00 2. " CSNAAT ,Chip select not active after transfer" "Not risen,Risen" newline bitfld.long 0x00 1. " NCPHA ,Clock phase (leading/following edge)" "Changed/captured,Captured/changed" bitfld.long 0x00 0. " CPOL ,Clock polarity" "Low,High" else rgroup.long 0x38++0x03 line.long 0x00 "CSR2,SPI Chip Select Register 2" hexmask.long.byte 0x00 24.--31. 1. " DLYBCT ,Consecutive transfers delay" hexmask.long.byte 0x00 16.--23. 1. " DLYBS ,Delay before SPCK" newline hexmask.long.byte 0x00 8.--15. 1. " SCBR ,Serial clock baud rate" bitfld.long 0x00 4.--7. " BITS ,Bits per transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..." newline bitfld.long 0x00 3. " CSAAT ,Chip select active after transfer" "Risen,Not risen" bitfld.long 0x00 2. " CSNAAT ,Chip select not active after transfer" "Not risen,Risen" newline bitfld.long 0x00 1. " NCPHA ,Clock phase (leading/following edge)" "Changed/captured,Captured/changed" bitfld.long 0x00 0. " CPOL ,Clock polarity" "Low,High" endif if ((per.l(ad:0x40008000+0xE4)&0x01)==0x00) group.long 0x3C++0x03 line.long 0x00 "CSR3,SPI Chip Select Register 3" hexmask.long.byte 0x00 24.--31. 1. " DLYBCT ,Consecutive transfers delay" hexmask.long.byte 0x00 16.--23. 1. " DLYBS ,Delay before SPCK" newline hexmask.long.byte 0x00 8.--15. 1. " SCBR ,Serial clock bit rate" bitfld.long 0x00 4.--7. " BITS ,Bits per transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..." newline bitfld.long 0x00 3. " CSAAT ,Chip select active after transfer" "Risen,Not risen" bitfld.long 0x00 2. " CSNAAT ,Chip select not active after transfer" "Not risen,Risen" newline bitfld.long 0x00 1. " NCPHA ,Clock phase (leading/following edge)" "Changed/captured,Captured/changed" bitfld.long 0x00 0. " CPOL ,Clock polarity" "Low,High" else rgroup.long 0x3C++0x03 line.long 0x00 "CSR3,SPI Chip Select Register 3" hexmask.long.byte 0x00 24.--31. 1. " DLYBCT ,Consecutive transfers delay" hexmask.long.byte 0x00 16.--23. 1. " DLYBS ,Delay before SPCK" newline hexmask.long.byte 0x00 8.--15. 1. " SCBR ,Serial clock baud rate" bitfld.long 0x00 4.--7. " BITS ,Bits per transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..." newline bitfld.long 0x00 3. " CSAAT ,Chip select active after transfer" "Risen,Not risen" bitfld.long 0x00 2. " CSNAAT ,Chip select not active after transfer" "Not risen,Risen" newline bitfld.long 0x00 1. " NCPHA ,Clock phase (leading/following edge)" "Changed/captured,Captured/changed" bitfld.long 0x00 0. " CPOL ,Clock polarity" "Low,High" endif else group.long 0x30++0x03 line.long 0x00 "CSR0,SPI Chip Select Register 0" hexmask.long.byte 0x00 24.--31. 1. " DLYBCT ,Consecutive transfers delay" hexmask.long.byte 0x00 16.--23. 1. " DLYBS ,Delay before SPCK" newline hexmask.long.byte 0x00 8.--15. 1. " SCBR ,Serial clock baud rate" bitfld.long 0x00 4.--7. " BITS ,Bits per transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..." newline bitfld.long 0x00 3. " CSAAT ,Chip select active after transfer" "Risen,Not risen" bitfld.long 0x00 2. " CSNAAT ,Chip select not active after transfer" "Not risen,Risen" newline bitfld.long 0x00 1. " NCPHA ,Clock phase (leading/following edge)" "Changed/captured,Captured/changed" bitfld.long 0x00 0. " CPOL ,Clock polarity" "Low,High" group.long 0x34++0x03 line.long 0x00 "CSR1,SPI Chip Select Register 1" hexmask.long.byte 0x00 24.--31. 1. " DLYBCT ,Consecutive transfers delay" hexmask.long.byte 0x00 16.--23. 1. " DLYBS ,Delay before SPCK" newline hexmask.long.byte 0x00 8.--15. 1. " SCBR ,Serial clock baud rate" bitfld.long 0x00 4.--7. " BITS ,Bits per transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..." newline bitfld.long 0x00 3. " CSAAT ,Chip select active after transfer" "Risen,Not risen" bitfld.long 0x00 2. " CSNAAT ,Chip select not active after transfer" "Not risen,Risen" newline bitfld.long 0x00 1. " NCPHA ,Clock phase (leading/following edge)" "Changed/captured,Captured/changed" bitfld.long 0x00 0. " CPOL ,Clock polarity" "Low,High" group.long 0x38++0x03 line.long 0x00 "CSR2,SPI Chip Select Register 2" hexmask.long.byte 0x00 24.--31. 1. " DLYBCT ,Consecutive transfers delay" hexmask.long.byte 0x00 16.--23. 1. " DLYBS ,Delay before SPCK" newline hexmask.long.byte 0x00 8.--15. 1. " SCBR ,Serial clock baud rate" bitfld.long 0x00 4.--7. " BITS ,Bits per transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..." newline bitfld.long 0x00 3. " CSAAT ,Chip select active after transfer" "Risen,Not risen" bitfld.long 0x00 2. " CSNAAT ,Chip select not active after transfer" "Not risen,Risen" newline bitfld.long 0x00 1. " NCPHA ,Clock phase (leading/following edge)" "Changed/captured,Captured/changed" bitfld.long 0x00 0. " CPOL ,Clock polarity" "Low,High" group.long 0x3C++0x03 line.long 0x00 "CSR3,SPI Chip Select Register 3" hexmask.long.byte 0x00 24.--31. 1. " DLYBCT ,Consecutive transfers delay" hexmask.long.byte 0x00 16.--23. 1. " DLYBS ,Delay before SPCK" newline hexmask.long.byte 0x00 8.--15. 1. " SCBR ,Serial clock baud rate" bitfld.long 0x00 4.--7. " BITS ,Bits per transfer" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..." newline bitfld.long 0x00 3. " CSAAT ,Chip select active after transfer" "Risen,Not risen" bitfld.long 0x00 2. " CSNAAT ,Chip select not active after transfer" "Not risen,Risen" newline bitfld.long 0x00 1. " NCPHA ,Clock phase (leading/following edge)" "Changed/captured,Captured/changed" bitfld.long 0x00 0. " CPOL ,Clock polarity" "Low,High" endif group.long 0xE4++0x03 line.long 0x00 "WPMR,SPI Write Protection Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,SPI write protection key password" bitfld.long 0x00 0. " WPEN ,SPI write protection enable" "Disabled,Enabled" hgroup.long 0xE8++0x03 hide.long 0x00 "WPSR,SPI Write Protection Status Register" in width 0x0B tree "PDC (Peripheral DMA Controller)" base ad:0x40008000 width 9. group.long 0x100++0x01F line.long 0x00 "SPI_RPR,Receive Pointer Register" line.long 0x04 "SPI_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "SPI_TPR,Transmit Pointer Register" line.long 0x0c "SPI_TCR,Transmit Counter Register" hexmask.long.word 0x0C 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "SPI_RNPR,Receive Next Pointer Register" line.long 0x14 "SPI_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "SPI_TNPR,Transmit Next Pointer Register" line.long 0x1c "SPI_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "SPI_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disable" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enable" bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disable" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enable" rgroup.long 0x124++0x03 line.long 0x00 "SPI_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0x0B tree.end tree.end tree.open "TWI (Two-wire Interface)" tree "TWI 0" base ad:0x40018000 width 16. wgroup.long 0x00++0x03 line.long 0x00 "TWI_CR,TWI Control Register" bitfld.long 0x00 7. " SWRST ,Software Reset" "No effect,Reset" bitfld.long 0x00 6. " QUICK ,SMBUS Quick Command" "No effect,Sent" textline " " bitfld.long 0x00 5. " SVDIS ,TWI Slave Mode Disabled" "No effect,Disable" bitfld.long 0x00 4. " SVEN ,TWI Slave Mode Enabled" "No effect,Enable" textline " " bitfld.long 0x00 3. " MSDIS ,TWI Master Transfer Disabled" "No effect,Disable" bitfld.long 0x00 2. " MSEN ,TWI Master Transfer Enabled" "No effect,Enable" textline " " bitfld.long 0x00 1. " STOP ,Send a STOP Condition" "No effect,Stop" bitfld.long 0x00 0. " START ,Send a START Condition" "No effect,Start" sif ((cpu()!="ATSAMG5*")||cpuis("ATSAM4S*")) group.long 0x04++0x03 line.long 0x00 "TWI_MMR,TWI Master Mode Register" hexmask.long.byte 0x00 16.--22. 1. " DADR ,Device Address" bitfld.long 0x00 12. " MREAD ,Master Read Direction" "Write,Read" textline " " bitfld.long 0x00 8.--9. " IADRSZ ,Internal Device Address Size" "No address,One-byte,Two-byte,Three-byte" endif sif (cpuis("ATSAM4S*")) group.long 0x08++0x03 line.long 0x00 "TWI_SMR,TWI Slave Mode Register" hexmask.long.byte 0x00 16.--22. 1. " SADR ,Slave Address" endif if (((d.l((ad:0x40018000+0x04)))&0x300)==0x300) group.long 0x0C++0x03 line.long 0x00 "TWI_IADR,TWI Internal Address Register" hexmask.long.tbyte 0x00 0.--23. 1. " IADR ,Internal Address" elif (((d.l((ad:0x40018000+0x04)))&0x300)==0x200) group.long 0x0C++0x03 line.long 0x00 "TWI_IADR,TWI Internal Address Register" hexmask.long.word 0x00 0.--15. 1. " IADR ,Internal Address" elif (((d.l((ad:0x40018000+0x04)))&0x300)==0x100) group.long 0x0C++0x03 line.long 0x00 "TWI_IADR,TWI Internal Address Register" hexmask.long.byte 0x00 0.--7. 1. " IADR ,Internal Address" else hgroup.long 0x0C++0x03 hide.long 0x00 "TWI_IADR,TWI Internal Address Register" endif sif cpuis("ATSAM4S*") group.long 0x10++0x03 line.long 0x00 "TWI_CWGR,TWI Clock Waveform Generator Register" sif cpuis("ATSAM4N*") bitfld.long 0x00 24.--28. " HOLD ,TWD Hold Time versus TWCK falling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " endif bitfld.long 0x00 16.--18. " CKDIV ,Clock Divider" "1,2,4,8,16,32,64,128" hexmask.long.byte 0x00 8.--15. 1. " CHDIV ,Clock High Divider" textline " " hexmask.long.byte 0x00 0.--7. 1. " CLDIV ,Clock Low Divider" hgroup.long 0x20++0x03 hide.long 0x00 "TWI_SR,TWI Status Register" in group.long 0x2C++0x03 line.long 0x00 "TWI_IMR,TWI Interrupt Mask Register" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " TXBUFE_set/clr ,Transmit Buffer Empty Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 14. -0x08 14. -0x04 14. " RXBUFF_set/clr ,Receive Buffer Full Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. -0x08 13. -0x04 13. " ENDTX_set/clr ,End of Transmit Buffer Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " ENDRX_set/clr ,End of Receive Buffer Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. -0x08 11. -0x04 11. " EOSACC_set/clr ,End Of Slave Access Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " SCL_WS_set/clr ,Clock Wait State Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. -0x08 9. -0x04 9. " ARBLST_set/clr ,Arbitration Lost Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 8. -0x08 8. -0x04 8. " NACK_set/clr ,Not Acknowledge" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. -0x08 6. -0x04 6. " OVRE_set/clr ,Overrun Error" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " GACC_set/clr ,General Call Access Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " SVACC_set/clr ,Slave Access Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXRDY_set/clr ,Transmit Holding Register Ready" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXRDY_set/clr ,Receive Holding Register Ready" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXCOMP_set/clr ,Transmission Completed" "Disabled,Enabled" hgroup.long 0x30++0x03 hide.long 0x00 "TWI_RHR,TWI Receive Holding Register" in sif cpuis("ATSAM4S*") wgroup.long 0x34++0x03 line.long 0x00 "TWI_THR,TWI Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " TXDATA ,Master or Slave Transmit Holding Data" else group.long 0x34++0x03 line.long 0x00 "TWI_THR,TWI Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " TXDATA ,Master or Slave Transmit Holding Data" endif sif cpuis("ATSAM4E*") group.long 0xE4++0x03 line.long 0x00 "TWI_WPROT_MODE,TWI Write Protection Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " SECURITY_CODE ,Write protection mode security code" bitfld.long 0x00 0. " WPROT ,Write protection bit" "Disabled,Enabled" sif (cpu()=="ATSAMG5*") hgroup.long 0xE8++0x03 hide.long 0x00 "TWI_WPROT_STATUS,TWI Write Protection Status Register" in endif endif endif width 0x0B tree "PDC (Peripheral DMA Controller)" base ad:0x40018000 width 11. group.long 0x100++0x01F line.long 0x00 "TWI0_RPR,Receive Pointer Register" line.long 0x04 "TWI0_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "TWI0_TPR,Transmit Pointer Register" line.long 0x0c "TWI0_TCR,Transmit Counter Register" hexmask.long.word 0x0C 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "TWI0_RNPR,Receive Next Pointer Register" line.long 0x14 "TWI0_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "TWI0_TNPR,Transmit Next Pointer Register" line.long 0x1c "TWI0_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "TWI0_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disable" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enable" bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disable" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enable" rgroup.long 0x124++0x03 line.long 0x00 "TWI0_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0x0B tree.end tree.end tree "TWI 1" base ad:0x4001C000 width 16. wgroup.long 0x00++0x03 line.long 0x00 "TWI_CR,TWI Control Register" bitfld.long 0x00 7. " SWRST ,Software Reset" "No effect,Reset" bitfld.long 0x00 6. " QUICK ,SMBUS Quick Command" "No effect,Sent" textline " " bitfld.long 0x00 5. " SVDIS ,TWI Slave Mode Disabled" "No effect,Disable" bitfld.long 0x00 4. " SVEN ,TWI Slave Mode Enabled" "No effect,Enable" textline " " bitfld.long 0x00 3. " MSDIS ,TWI Master Transfer Disabled" "No effect,Disable" bitfld.long 0x00 2. " MSEN ,TWI Master Transfer Enabled" "No effect,Enable" textline " " bitfld.long 0x00 1. " STOP ,Send a STOP Condition" "No effect,Stop" bitfld.long 0x00 0. " START ,Send a START Condition" "No effect,Start" sif ((cpu()!="ATSAMG5*")||cpuis("ATSAM4S*")) group.long 0x04++0x03 line.long 0x00 "TWI_MMR,TWI Master Mode Register" hexmask.long.byte 0x00 16.--22. 1. " DADR ,Device Address" bitfld.long 0x00 12. " MREAD ,Master Read Direction" "Write,Read" textline " " bitfld.long 0x00 8.--9. " IADRSZ ,Internal Device Address Size" "No address,One-byte,Two-byte,Three-byte" endif sif (cpuis("ATSAM4S*")) group.long 0x08++0x03 line.long 0x00 "TWI_SMR,TWI Slave Mode Register" hexmask.long.byte 0x00 16.--22. 1. " SADR ,Slave Address" endif if (((d.l((ad:0x4001C000+0x04)))&0x300)==0x300) group.long 0x0C++0x03 line.long 0x00 "TWI_IADR,TWI Internal Address Register" hexmask.long.tbyte 0x00 0.--23. 1. " IADR ,Internal Address" elif (((d.l((ad:0x4001C000+0x04)))&0x300)==0x200) group.long 0x0C++0x03 line.long 0x00 "TWI_IADR,TWI Internal Address Register" hexmask.long.word 0x00 0.--15. 1. " IADR ,Internal Address" elif (((d.l((ad:0x4001C000+0x04)))&0x300)==0x100) group.long 0x0C++0x03 line.long 0x00 "TWI_IADR,TWI Internal Address Register" hexmask.long.byte 0x00 0.--7. 1. " IADR ,Internal Address" else hgroup.long 0x0C++0x03 hide.long 0x00 "TWI_IADR,TWI Internal Address Register" endif sif cpuis("ATSAM4S*") group.long 0x10++0x03 line.long 0x00 "TWI_CWGR,TWI Clock Waveform Generator Register" sif cpuis("ATSAM4N*") bitfld.long 0x00 24.--28. " HOLD ,TWD Hold Time versus TWCK falling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " endif bitfld.long 0x00 16.--18. " CKDIV ,Clock Divider" "1,2,4,8,16,32,64,128" hexmask.long.byte 0x00 8.--15. 1. " CHDIV ,Clock High Divider" textline " " hexmask.long.byte 0x00 0.--7. 1. " CLDIV ,Clock Low Divider" hgroup.long 0x20++0x03 hide.long 0x00 "TWI_SR,TWI Status Register" in group.long 0x2C++0x03 line.long 0x00 "TWI_IMR,TWI Interrupt Mask Register" setclrfld.long 0x00 15. -0x08 15. -0x04 15. " TXBUFE_set/clr ,Transmit Buffer Empty Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 14. -0x08 14. -0x04 14. " RXBUFF_set/clr ,Receive Buffer Full Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. -0x08 13. -0x04 13. " ENDTX_set/clr ,End of Transmit Buffer Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " ENDRX_set/clr ,End of Receive Buffer Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. -0x08 11. -0x04 11. " EOSACC_set/clr ,End Of Slave Access Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " SCL_WS_set/clr ,Clock Wait State Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. -0x08 9. -0x04 9. " ARBLST_set/clr ,Arbitration Lost Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 8. -0x08 8. -0x04 8. " NACK_set/clr ,Not Acknowledge" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. -0x08 6. -0x04 6. " OVRE_set/clr ,Overrun Error" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " GACC_set/clr ,General Call Access Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x08 4. -0x04 4. " SVACC_set/clr ,Slave Access Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXRDY_set/clr ,Transmit Holding Register Ready" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXRDY_set/clr ,Receive Holding Register Ready" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXCOMP_set/clr ,Transmission Completed" "Disabled,Enabled" hgroup.long 0x30++0x03 hide.long 0x00 "TWI_RHR,TWI Receive Holding Register" in sif cpuis("ATSAM4S*") wgroup.long 0x34++0x03 line.long 0x00 "TWI_THR,TWI Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " TXDATA ,Master or Slave Transmit Holding Data" else group.long 0x34++0x03 line.long 0x00 "TWI_THR,TWI Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " TXDATA ,Master or Slave Transmit Holding Data" endif sif cpuis("ATSAM4E*") group.long 0xE4++0x03 line.long 0x00 "TWI_WPROT_MODE,TWI Write Protection Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " SECURITY_CODE ,Write protection mode security code" bitfld.long 0x00 0. " WPROT ,Write protection bit" "Disabled,Enabled" sif (cpu()=="ATSAMG5*") hgroup.long 0xE8++0x03 hide.long 0x00 "TWI_WPROT_STATUS,TWI Write Protection Status Register" in endif endif endif width 0x0B tree "PDC (Peripheral DMA Controller)" base ad:0x4001C000 width 11. group.long 0x100++0x01F line.long 0x00 "TWI1_RPR,Receive Pointer Register" line.long 0x04 "TWI1_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "TWI1_TPR,Transmit Pointer Register" line.long 0x0c "TWI1_TCR,Transmit Counter Register" hexmask.long.word 0x0C 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "TWI1_RNPR,Receive Next Pointer Register" line.long 0x14 "TWI1_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "TWI1_TNPR,Transmit Next Pointer Register" line.long 0x1c "TWI1_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "TWI1_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disable" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enable" bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disable" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enable" rgroup.long 0x124++0x03 line.long 0x00 "TWI1_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0x0B tree.end tree.end tree.end tree.open "UART (Universal Asynchronous Receiver Transmitter)" tree "UART0" base ad:0x400E0600 width 11. wgroup.long 0x00++0x03 line.long 0x00 "CR,UART Control Register" bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset" bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disable" textline " " bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enable" bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disable" textline " " bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enable" bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset" textline " " bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset" group.long 0x04++0x03 line.long 0x00 "MR,UART Mode Register" bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal Mode,Automatic Echo,Local Loopback,Remote Loopback" sif (cpuis("ATSAMA5D31")||cpuis("ATSAMA5D35")||cpuis("ATSAMA5D36")||cpuis("ATSAM4E*")||cpuis("ATSAM4N*")||cpuis("ATSAM4S*")) bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Space,Mark,No,?..." else bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Space,Mark,No,No,No,No" endif group.long 0x10++0x03 line.long 0x00 "IMR,UART Interrupt Mask Register" sif (!cpuis("ATSAMA5D31")&&!cpuis("ATSAMA5D35")&&!cpuis("ATSAMA5D36")) setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RXBUFF_set/clr ,RXBUFF Interrupt Mask" "Masked,Not masked" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TXBUFE_set/clr ,TXBUFE Interrupt Mask" "Masked,Not masked" textline " " endif setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXEMPTY_set/clr ,TXEMPTY Interrupt Mask" "Masked,Not masked" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " PARE_set/clr ,Parity Error Interrupt Mask" "Masked,Not masked" textline " " setclrfld.long 0x00 6. -0x08 6. -0x04 6. " FRAME_set/clr ,Framing Error Interrupt Mask" "Masked,Not masked" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " OVRE_set/clr ,Overrun Error Interrupt Mask" "Masked,Not masked" textline " " sif (!cpuis("ATSAMA5D31")&&!cpuis("ATSAMA5D35")&&!cpuis("ATSAMA5D36")) setclrfld.long 0x00 4. -0x08 4. -0x04 4. " ENDTX_set/clr ,End of Transmit Interrupt Mask" "Masked,Not masked" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " ENDRX_set/clr ,End of Receive Transfer Interrupt Mask" "Masked,Not masked" textline " " endif setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TXRDY_set/clr ,TXRDY Interrupt Mask" "Masked,Not masked" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RXRDY_set/clr ,RXRDY Interrupt Mask" "Masked,Not masked" hgroup.long 0x14++0x03 hide.long 0x00 "SR,UART Status Register" in hgroup.long 0x18++0x03 hide.long 0x00 "RHR,UART Receiver Holding Register" in wgroup.long 0x1C++0x03 line.long 0x00 "THR,Transmitter Holding Register" hexmask.long.byte 0x00 0.--7. 1. " TXCHR ,Character to be Transmitted" group.long 0x20++0x03 line.long 0x00 "BRGR,UART Baud Rate Generator Register" hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider" width 0x0B tree "PDC (Peripheral DMA Controller)" base ad:0x400E0600 width 11. group.long 0x100++0x01F line.long 0x00 "UART0_RPR,Receive Pointer Register" line.long 0x04 "UART0_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "UART0_TPR,Transmit Pointer Register" line.long 0x0c "UART0_TCR,Transmit Counter Register" hexmask.long.word 0x0C 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "UART0_RNPR,Receive Next Pointer Register" line.long 0x14 "UART0_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "UART0_TNPR,Transmit Next Pointer Register" line.long 0x1c "UART0_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "UART0_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disable" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enable" bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disable" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enable" rgroup.long 0x124++0x03 line.long 0x00 "UART0_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0x0B tree.end tree.end sif (!cpuis("ATSAM4S4A")&&!cpuis("ATSAM4S2A")) tree "UART1" base ad:0x400E0800 width 11. wgroup.long 0x00++0x03 line.long 0x00 "CR,UART Control Register" bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset" bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disable" textline " " bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enable" bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disable" textline " " bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enable" bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset" textline " " bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset" group.long 0x04++0x03 line.long 0x00 "MR,UART Mode Register" bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal Mode,Automatic Echo,Local Loopback,Remote Loopback" sif (cpuis("ATSAMA5D31")||cpuis("ATSAMA5D35")||cpuis("ATSAMA5D36")||cpuis("ATSAM4E*")||cpuis("ATSAM4N*")||cpuis("ATSAM4S*")) bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Space,Mark,No,?..." else bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Space,Mark,No,No,No,No" endif group.long 0x10++0x03 line.long 0x00 "IMR,UART Interrupt Mask Register" sif (!cpuis("ATSAMA5D31")&&!cpuis("ATSAMA5D35")&&!cpuis("ATSAMA5D36")) setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RXBUFF_set/clr ,RXBUFF Interrupt Mask" "Masked,Not masked" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TXBUFE_set/clr ,TXBUFE Interrupt Mask" "Masked,Not masked" textline " " endif setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXEMPTY_set/clr ,TXEMPTY Interrupt Mask" "Masked,Not masked" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " PARE_set/clr ,Parity Error Interrupt Mask" "Masked,Not masked" textline " " setclrfld.long 0x00 6. -0x08 6. -0x04 6. " FRAME_set/clr ,Framing Error Interrupt Mask" "Masked,Not masked" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " OVRE_set/clr ,Overrun Error Interrupt Mask" "Masked,Not masked" textline " " sif (!cpuis("ATSAMA5D31")&&!cpuis("ATSAMA5D35")&&!cpuis("ATSAMA5D36")) setclrfld.long 0x00 4. -0x08 4. -0x04 4. " ENDTX_set/clr ,End of Transmit Interrupt Mask" "Masked,Not masked" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " ENDRX_set/clr ,End of Receive Transfer Interrupt Mask" "Masked,Not masked" textline " " endif setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TXRDY_set/clr ,TXRDY Interrupt Mask" "Masked,Not masked" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RXRDY_set/clr ,RXRDY Interrupt Mask" "Masked,Not masked" hgroup.long 0x14++0x03 hide.long 0x00 "SR,UART Status Register" in hgroup.long 0x18++0x03 hide.long 0x00 "RHR,UART Receiver Holding Register" in wgroup.long 0x1C++0x03 line.long 0x00 "THR,Transmitter Holding Register" hexmask.long.byte 0x00 0.--7. 1. " TXCHR ,Character to be Transmitted" group.long 0x20++0x03 line.long 0x00 "BRGR,UART Baud Rate Generator Register" hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider" width 0x0B tree "PDC (Peripheral DMA Controller)" base ad:0x400E0800 width 11. group.long 0x100++0x01F line.long 0x00 "UART1_RPR,Receive Pointer Register" line.long 0x04 "UART1_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "UART1_TPR,Transmit Pointer Register" line.long 0x0c "UART1_TCR,Transmit Counter Register" hexmask.long.word 0x0C 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "UART1_RNPR,Receive Next Pointer Register" line.long 0x14 "UART1_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "UART1_TNPR,Transmit Next Pointer Register" line.long 0x1c "UART1_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "UART1_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disable" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enable" bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disable" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enable" rgroup.long 0x124++0x03 line.long 0x00 "UART1_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0x0B tree.end tree.end endif tree.end tree.open "USART (Universal Synchronous Asynchronous Receiver Transmitter)" tree "USART 0" base ad:0x40024000 width 8. if ((d.l((ad:0x40024000)+0x04)&0xF)==(0xE||0xF)) wgroup.long 0x00++0x03 line.long 0x00 "US_CR,Control Register" bitfld.long 0x00 19. " RCS ,Release SPI Chip Select (Release Slave Select Line NSS)" "No effect,Release" bitfld.long 0x00 18. " FCS ,Force SPI Chip Select (Force Slave Select Line NSS to 0)" "No effect,Force" textline " " bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset" bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disable" bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enable" textline " " bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disable" bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enable" bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset" bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset" elif ((d.l(ad:0x40024000+0x04)&0x0F)==0x00) wgroup.long 0x00++0x03 line.long 0x00 "US_CR,Control Register" bitfld.long 0x00 19. " RTSDIS ,Request to Send Pin Control" "No effect,Drive RTS to 1" bitfld.long 0x00 18. " RTSEN ,Request to Send Pin Control" "No effect,Drive RTS to 0" textline " " bitfld.long 0x00 17. " DTRDIS ,Receiver Disable" "No effect,Disable" bitfld.long 0x00 16. " RTSEN ,Receiver Disable" "No effect,Disable" bitfld.long 0x00 15. " RETTO ,Rearm Time-out" "No effect,Restart" bitfld.long 0x00 14. " RSTNACK ,Reset Non Acknowledge" "No effect,Reset" textline " " bitfld.long 0x00 13. " RSTIT ,Reset Iterations" "No effect,Reset" bitfld.long 0x00 12. " SENDA ,Send Address" "No effect,Send" bitfld.long 0x00 11. " STTTO ,Start Time-out" "No effect,Start" bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stop" textline " " bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Start" bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset" bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disable" bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enable" textline " " bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disable" bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enable" bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset" bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset" else wgroup.long 0x00++0x03 line.long 0x00 "US_CR,Control Register" bitfld.long 0x00 17. " DTRDIS ,Receiver Disable" "No effect,Disable" bitfld.long 0x00 16. " RTSEN ,Receiver Disable" "No effect,Disable" bitfld.long 0x00 15. " RETTO ,Rearm Time-out" "No effect,Restart" bitfld.long 0x00 14. " RSTNACK ,Reset Non Acknowledge" "No effect,Reset" textline " " bitfld.long 0x00 13. " RSTIT ,Reset Iterations" "No effect,Reset" bitfld.long 0x00 12. " SENDA ,Send Address" "No effect,Send" bitfld.long 0x00 11. " STTTO ,Start Time-out" "No effect,Start" bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stop" textline " " bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Start" bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset" bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disable" bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enable" textline " " bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disable" bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enable" bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset" bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset" endif if ((d.l(ad:0x40024000+0xE4)&0x01)==0x00) if ((d.l(ad:0x40024000+0x04)&0x0f)==(0x0e||0x0f)) group.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 20. " WRDBT ,Wait Read Data Before Transfer" "No,Yes" bitfld.long 0x00 16. " CPOL ,SPI Clock Polarity" "Inactive-Low,Inactive-High" bitfld.long 0x00 8. " CPHA ,SPI Clock Phase (on the leading edge of SPCK/on the following edge of SPCK)" "Changed/Captured,Captured/Changed" textline " " bitfld.long 0x00 6.--7. " CHRL ,Character Length" ",,,8 bits" bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" elif ((d.l(ad:0x40024000+0x04)&0x10f)==0x004) group.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered" bitfld.long 0x00 24.--26. " MAX_ITERATION ,Maximum Number of Iterations" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. " INVDATA ,Inverted Data" "Not inverted,Inverted" textline " " bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,THR register" bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "No,Yes" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" textline " " bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" textline " " bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,1.5,2,?..." textline " " bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,,Multidrop,?..." bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" textline " " bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" elif ((d.l(ad:0x40024000+0x04)&0x10f)==0x104) group.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered" bitfld.long 0x00 24.--26. " MAX_ITERATION ,Maximum Number of Iterations" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. " INVDATA ,Inverted Data" "Not inverted,Inverted" textline " " bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,THR register" bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "No,Yes" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" textline " " bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" textline " " bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,,2,?..." textline " " bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,,Multidrop,?..." bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" textline " " bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" elif ((d.l(ad:0x40024000+0x04)&0x100)==0x100) group.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered" bitfld.long 0x00 23. " INVDATA ,Inverted Data" "Not inverted,Inverted" bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,THR register" textline " " bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "No,Yes" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" textline " " bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" textline " " bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,,2,?..." bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,,Multidrop,?..." textline " " bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" elif ((d.l(ad:0x40024000+0x04)&0x100)==0x000) group.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " FILTER ,Receive Line Filter" "Not filtered,Filtered" bitfld.long 0x00 23. " INVDATA ,Inverted Data" "Not inverted,Inverted" bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,THR register" textline " " bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "Enabled,Disabled" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" textline " " bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" textline " " bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,1.5,2,?..." bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,,Multidrop,?..." textline " " bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" endif else if ((d.l(ad:0x40024000+0x04)&0x0f)==(0x0e||0x0f)) rgroup.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 20. " WRDBT ,Wait Read Data Before Transfer" "No,Yes" bitfld.long 0x00 16. " CPOL ,SPI Clock Polarity" "Inactive-Low,Inactive-High" bitfld.long 0x00 8. " CPHA ,SPI Clock Phase (on the leading edge of SPCK/on the following edge of SPCK)" "Changed/Captured,Captured/Changed" textline " " bitfld.long 0x00 6.--7. " CHRL ,Character Length" ",,,8 bits" bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" elif ((d.l(ad:0x40024000+0x04)&0x10f)==0x004) rgroup.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered" bitfld.long 0x00 24.--26. " MAX_ITERATION ,Maximum Number of Iterations" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. " INVDATA ,Inverted Data" "Not inverted,Inverted" textline " " bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,THR register" bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "No,Yes" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" textline " " bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" textline " " bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,1.5,2,?..." textline " " bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,,Multidrop,?..." bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" textline " " bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" elif ((d.l(ad:0x40024000+0x04)&0x10f)==0x104) rgroup.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered" bitfld.long 0x00 24.--26. " MAX_ITERATION ,Maximum Number of Iterations" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. " INVDATA ,Inverted Data" "Not inverted,Inverted" textline " " bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,THR register" bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "No,Yes" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" textline " " bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" textline " " bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,,2,?..." textline " " bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,,Multidrop,?..." bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" textline " " bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" elif ((d.l(ad:0x40024000+0x04)&0x100)==0x100) rgroup.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered" bitfld.long 0x00 23. " INVDATA ,Inverted Data" "Not inverted,Inverted" bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,THR register" textline " " bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "No,Yes" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" textline " " bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" textline " " bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,,2,?..." bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,,Multidrop,?..." textline " " bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" elif ((d.l(ad:0x40024000+0x04)&0x100)==0x000) rgroup.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " FILTER ,Receive Line Filter" "Not filtered,Filtered" bitfld.long 0x00 23. " INVDATA ,Inverted Data" "Not inverted,Inverted" bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,THR register" textline " " bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "Enabled,Disabled" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" textline " " bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" textline " " bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,1.5,2,?..." bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,,Multidrop,?..." textline " " bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" endif endif textline " " if ((d.l(ad:0x40024000+0x04)&0xF)==(0xE||0xF)) group.long 0x10++0x03 line.long 0x00 "US_IMR,Interrupt Enable/Mask Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RXBUFF_set/clr ,Receive Buffer Full Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TXBUFE_set/clr ,Transmit Buffer Empty Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " UNRE_set/clr ,SPI Underrun Error Interrupt Enable/Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXEMPTY_set/clr ,TXEMPTY Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " OVRE_set/clr ,Overrun Error Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 4. -0x08 4. -0x04 4. " ENDTX_set/clr ,End of Transmit Buffer Interrupt Enable/Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x08 3. -0x04 3. " ENDRX_set/clr ,End of Receive Buffer Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TXRDY_set/clr ,TXRDY Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RXRDY_set/clr ,RXRDY Interrupt Enable/Mask" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "US_IMR,Interrupt Enable/Enable Register" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " MANE_set/clr , Manchester Error Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " CTSIC_set/clr ,Clear to Send Input Change Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " DCDIC_set/clr ,Data Carrier Detect Input Change Interrupt Enable/Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " DSRIC_set/clr ,Data Set Ready Input Change Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " RIIC_set/clr ,Ring Indicator Input Change Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " NACK_set/clr ,Non Acknowledge Interrupt Enable/Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RXBUFF_set/clr ,Receive Buffer Full Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TXBUFE_set/clr ,Transmit Buffer Empty Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " ITER_set/clr ,Max number of Repetitions Reached Interrupt Enable/Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXEMPTY_set/clr ,TXEMPTY Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 8. -0x08 8. -0x04 8. " TIMEOUT_set/clr ,Time-out Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " PARE_set/clr ,Parity Error Interrupt Enable/Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. -0x08 6. -0x04 6. " FRAME_set/clr ,Framing Error Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " OVRE_set/clr ,Overrun Error Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 4. -0x08 4. -0x04 4. " ENDTX_set/clr ,End of Transmit Buffer Interrupt Enable/Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x08 3. -0x04 3. " ENDRX_set/clr ,End of Receive Buffer Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " RXBRK_set/clr ,Receiver Break Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TXRDY_set/clr ,TXRDY Interrupt Enable/Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RXRDY_set/clr ,RXRDY Interrupt Enable/Mask" "Disabled,Enabled" endif textline " " hgroup.long 0x14++0x03 hide.long 0x0 "CSR,Channel Status Register" in hgroup.long 0x18++0x03 hide.long 0x00 "RHR,Receiver Holding Register" in wgroup.long 0x1c++0x03 line.long 0x00 "US_THR,Transmitter Holding Register" bitfld.long 0x00 15. " TXSYNH ,Sync Field to be transmitted" "Data,Command" hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to be Transmitted" if ((d.l(ad:0x40024000+0xE4)&0x01)==0x00) group.long 0x20++0x0B line.long 0x00 "US_BRGR,Baud Rate Generator Register" bitfld.long 0x00 16.--18. " FP ,Fractional Part" "Disabled,1/8,2/8,3/8,4/8,5/8,6/8,7/8" hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider" line.long 0x04 "RTOR,Receiver Time-out Register" hexmask.long.word 0x04 0.--15. 1. " TO ,Time-out Value" line.long 0x08 "TTGR,Transmitter Timeguard Register" hexmask.long.byte 0x08 0.--7. 1. " TG ,Timeguard Value" group.long 0x040++0x03 line.long 0x00 "US_FIDI,FI DI Ratio Register" hexmask.long.word 0x00 0.--10. 1. " FI_DI_RATIO ,FI Over DI Ratio Value" else rgroup.long 0x20++0x0B line.long 0x00 "US_BRGR,Baud Rate Generator Register" bitfld.long 0x00 16.--18. " FP ,Fractional Part" "Disabled,1/8,2/8,3/8,4/8,5/8,6/8,7/8" hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider" line.long 0x04 "RTOR,Receiver Time-out Register" hexmask.long.word 0x04 0.--15. 1. " TO ,Time-out Value" line.long 0x08 "TTGR,Transmitter Timeguard Register" hexmask.long.byte 0x08 0.--7. 1. " TG ,Timeguard Value" rgroup.long 0x40++0x03 line.long 0x00 "US_FIDI,FI DI Ratio Register" hexmask.long.word 0x00 0.--10. 1. " FI_DI_RATIO ,FI Over DI Ratio Value" endif if ((d.l((ad:0x40024000)+0x04)&0xF)==(0x04||0x6)) hgroup.long 0x044++0x03 hide.long 0x00 "NER,Number of Errors Register" in endif if (((d.l(ad:0x40024000+0x04)&0x0F)==0x08)&&((d.l(ad:0x40024000+0xE4)&0x01)==0x00)) group.long 0x04c++0x03 line.long 0x00 "US_IF,USART IrDA FILTER Register" hexmask.long.byte 0x00 0.--7. 1. " IRDA_FILTER ,IrDA Filter" elif (((d.l(ad:0x40024000+0x04)&0x0F)==0x08)&&((d.l(ad:0x40024000+0xE4)&0x01)==0x01)) rgroup.long 0x04c++0x03 line.long 0x00 "US_IF,USART IrDA FILTER Register" hexmask.long.byte 0x00 0.--7. 1. " IRDA_FILTER ,IrDA Filter" endif if ((d.l(ad:0x40024000+0xE4)&0x01)==0x00) group.long 0x50++0x03 line.long 0x00 "US_MAN,USART Manchester Configuration Register" bitfld.long 0x00 30. " DRIFT ,Drift Compensation" "Disabled,Enabled" bitfld.long 0x00 29. " ONE ,Must be set to 1" ",1" bitfld.long 0x00 28. " RX_MPOL ,Receiver Manchester Polarity" "0-to-1,1-to-0" textline " " bitfld.long 0x00 24.--25. " RX_PP ,Receiver Preamble Pattern Detected" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO" bitfld.long 0x00 16.--19. " RX_PL ,Receiver Preamble Length" "Disabled,1 Bit,2 Bit,3 Bit,4 Bit,5 Bit,6 Bit,7 Bit,8 Bit,9 Bit,10 Bit,11 Bit,12 Bit,13 Bit,14 Bit,15 Bit" bitfld.long 0x00 12. " TX_MPOL ,Transmitter Manchester Polarity" "0-to-1,1-to-0" textline " " bitfld.long 0x00 8.--9. " TX_PP ,Transmitter Preamble Pattern" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO" bitfld.long 0x00 0.--3. " TX_PL ,Transmitter Preamble Length" "Disabled,1 Bit,2 Bit,3 Bit,4 Bit,5 Bit,6 Bit,7 Bit,8 Bit,9 Bit,10 Bit,11 Bit,12 Bit,13 Bit,14 Bit,15 Bit" else rgroup.long 0x50++0x03 line.long 0x00 "US_MAN,USART Manchester Configuration Register" bitfld.long 0x00 30. " DRIFT ,Drift Compensation" "Disabled,Enabled" bitfld.long 0x00 29. " ONE ,Must be set to 1" ",1" bitfld.long 0x00 28. " RX_MPOL ,Receiver Manchester Polarity" "0-to-1,1-to-0" textline " " bitfld.long 0x00 24.--25. " RX_PP ,Receiver Preamble Pattern Detected" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO" bitfld.long 0x00 16.--19. " RX_PL ,Receiver Preamble Length" "Disabled,1 Bit,2 Bit,3 Bit,4 Bit,5 Bit,6 Bit,7 Bit,8 Bit,9 Bit,10 Bit,11 Bit,12 Bit,13 Bit,14 Bit,15 Bit" bitfld.long 0x00 12. " TX_MPOL ,Transmitter Manchester Polarity" "0-to-1,1-to-0" textline " " bitfld.long 0x00 8.--9. " TX_PP ,Transmitter Preamble Pattern" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO" bitfld.long 0x00 0.--3. " TX_PL ,Transmitter Preamble Length" "Disabled,1 Bit,2 Bit,3 Bit,4 Bit,5 Bit,6 Bit,7 Bit,8 Bit,9 Bit,10 Bit,11 Bit,12 Bit,13 Bit,14 Bit,15 Bit" endif group.long 0xE4++0x3 line.long 0x00 "US_WPMR,USART Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write Protect KEY" bitfld.long 0x00 0. " WPEN ,Write Protect Enable" "Disabled,Enabled" hgroup.long 0xE8++0x3 hide.long 0x00 "WPSR,USART Write Protect Status Register" in width 0xb tree "PDC (Peripheral DMA Controller)" base ad:0x40024000 width 13. group.long 0x100++0x01F line.long 0x00 "USART0_RPR,Receive Pointer Register" line.long 0x04 "USART0_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "USART0_TPR,Transmit Pointer Register" line.long 0x0c "USART0_TCR,Transmit Counter Register" hexmask.long.word 0x0C 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "USART0_RNPR,Receive Next Pointer Register" line.long 0x14 "USART0_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "USART0_TNPR,Transmit Next Pointer Register" line.long 0x1c "USART0_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "USART0_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disable" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enable" bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disable" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enable" rgroup.long 0x124++0x03 line.long 0x00 "USART0_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0x0B tree.end tree.end tree "USART 1" base ad:0x40028000 width 8. if ((d.l((ad:0x40028000)+0x04)&0xF)==(0xE||0xF)) wgroup.long 0x00++0x03 line.long 0x00 "US_CR,Control Register" bitfld.long 0x00 19. " RCS ,Release SPI Chip Select (Release Slave Select Line NSS)" "No effect,Release" bitfld.long 0x00 18. " FCS ,Force SPI Chip Select (Force Slave Select Line NSS to 0)" "No effect,Force" textline " " bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset" bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disable" bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enable" textline " " bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disable" bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enable" bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset" bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset" elif ((d.l(ad:0x40028000+0x04)&0x0F)==0x00) wgroup.long 0x00++0x03 line.long 0x00 "US_CR,Control Register" bitfld.long 0x00 19. " RTSDIS ,Request to Send Pin Control" "No effect,Drive RTS to 1" bitfld.long 0x00 18. " RTSEN ,Request to Send Pin Control" "No effect,Drive RTS to 0" textline " " bitfld.long 0x00 17. " DTRDIS ,Receiver Disable" "No effect,Disable" bitfld.long 0x00 16. " RTSEN ,Receiver Disable" "No effect,Disable" bitfld.long 0x00 15. " RETTO ,Rearm Time-out" "No effect,Restart" bitfld.long 0x00 14. " RSTNACK ,Reset Non Acknowledge" "No effect,Reset" textline " " bitfld.long 0x00 13. " RSTIT ,Reset Iterations" "No effect,Reset" bitfld.long 0x00 12. " SENDA ,Send Address" "No effect,Send" bitfld.long 0x00 11. " STTTO ,Start Time-out" "No effect,Start" bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stop" textline " " bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Start" bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset" bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disable" bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enable" textline " " bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disable" bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enable" bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset" bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset" else wgroup.long 0x00++0x03 line.long 0x00 "US_CR,Control Register" bitfld.long 0x00 17. " DTRDIS ,Receiver Disable" "No effect,Disable" bitfld.long 0x00 16. " RTSEN ,Receiver Disable" "No effect,Disable" bitfld.long 0x00 15. " RETTO ,Rearm Time-out" "No effect,Restart" bitfld.long 0x00 14. " RSTNACK ,Reset Non Acknowledge" "No effect,Reset" textline " " bitfld.long 0x00 13. " RSTIT ,Reset Iterations" "No effect,Reset" bitfld.long 0x00 12. " SENDA ,Send Address" "No effect,Send" bitfld.long 0x00 11. " STTTO ,Start Time-out" "No effect,Start" bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stop" textline " " bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Start" bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset" bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disable" bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enable" textline " " bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disable" bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enable" bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset" bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset" endif if ((d.l(ad:0x40028000+0xE4)&0x01)==0x00) if ((d.l(ad:0x40028000+0x04)&0x0f)==(0x0e||0x0f)) group.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 20. " WRDBT ,Wait Read Data Before Transfer" "No,Yes" bitfld.long 0x00 16. " CPOL ,SPI Clock Polarity" "Inactive-Low,Inactive-High" bitfld.long 0x00 8. " CPHA ,SPI Clock Phase (on the leading edge of SPCK/on the following edge of SPCK)" "Changed/Captured,Captured/Changed" textline " " bitfld.long 0x00 6.--7. " CHRL ,Character Length" ",,,8 bits" bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" elif ((d.l(ad:0x40028000+0x04)&0x10f)==0x004) group.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered" bitfld.long 0x00 24.--26. " MAX_ITERATION ,Maximum Number of Iterations" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. " INVDATA ,Inverted Data" "Not inverted,Inverted" textline " " bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,THR register" bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "No,Yes" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" textline " " bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" textline " " bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,1.5,2,?..." textline " " bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,,Multidrop,?..." bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" textline " " bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" elif ((d.l(ad:0x40028000+0x04)&0x10f)==0x104) group.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered" bitfld.long 0x00 24.--26. " MAX_ITERATION ,Maximum Number of Iterations" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. " INVDATA ,Inverted Data" "Not inverted,Inverted" textline " " bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,THR register" bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "No,Yes" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" textline " " bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" textline " " bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,,2,?..." textline " " bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,,Multidrop,?..." bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" textline " " bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" elif ((d.l(ad:0x40028000+0x04)&0x100)==0x100) group.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered" bitfld.long 0x00 23. " INVDATA ,Inverted Data" "Not inverted,Inverted" bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,THR register" textline " " bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "No,Yes" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" textline " " bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" textline " " bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,,2,?..." bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,,Multidrop,?..." textline " " bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" elif ((d.l(ad:0x40028000+0x04)&0x100)==0x000) group.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " FILTER ,Receive Line Filter" "Not filtered,Filtered" bitfld.long 0x00 23. " INVDATA ,Inverted Data" "Not inverted,Inverted" bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,THR register" textline " " bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "Enabled,Disabled" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" textline " " bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" textline " " bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,1.5,2,?..." bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,,Multidrop,?..." textline " " bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" endif else if ((d.l(ad:0x40028000+0x04)&0x0f)==(0x0e||0x0f)) rgroup.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 20. " WRDBT ,Wait Read Data Before Transfer" "No,Yes" bitfld.long 0x00 16. " CPOL ,SPI Clock Polarity" "Inactive-Low,Inactive-High" bitfld.long 0x00 8. " CPHA ,SPI Clock Phase (on the leading edge of SPCK/on the following edge of SPCK)" "Changed/Captured,Captured/Changed" textline " " bitfld.long 0x00 6.--7. " CHRL ,Character Length" ",,,8 bits" bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" elif ((d.l(ad:0x40028000+0x04)&0x10f)==0x004) rgroup.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered" bitfld.long 0x00 24.--26. " MAX_ITERATION ,Maximum Number of Iterations" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. " INVDATA ,Inverted Data" "Not inverted,Inverted" textline " " bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,THR register" bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "No,Yes" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" textline " " bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" textline " " bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,1.5,2,?..." textline " " bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,,Multidrop,?..." bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" textline " " bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" elif ((d.l(ad:0x40028000+0x04)&0x10f)==0x104) rgroup.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered" bitfld.long 0x00 24.--26. " MAX_ITERATION ,Maximum Number of Iterations" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. " INVDATA ,Inverted Data" "Not inverted,Inverted" textline " " bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,THR register" bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "No,Yes" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" textline " " bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" textline " " bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,,2,?..." textline " " bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,,Multidrop,?..." bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" textline " " bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" elif ((d.l(ad:0x40028000+0x04)&0x100)==0x100) rgroup.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered" bitfld.long 0x00 23. " INVDATA ,Inverted Data" "Not inverted,Inverted" bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,THR register" textline " " bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "No,Yes" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" textline " " bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" textline " " bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,,2,?..." bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,,Multidrop,?..." textline " " bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" elif ((d.l(ad:0x40028000+0x04)&0x100)==0x000) rgroup.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,IS07816 T = 0,,IS07816 T = 1,,IrDA,,,,,,SPI Master,SPI Slave" textline " " bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " FILTER ,Receive Line Filter" "Not filtered,Filtered" bitfld.long 0x00 23. " INVDATA ,Inverted Data" "Not inverted,Inverted" bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,THR register" textline " " bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "Enabled,Disabled" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" textline " " bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" textline " " bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,1.5,2,?..." bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,,Multidrop,?..." textline " " bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK/8,,SCK" endif endif textline " " if ((d.l(ad:0x40028000+0x04)&0xF)==(0xE||0xF)) group.long 0x10++0x03 line.long 0x00 "US_IMR,Interrupt Enable/Mask Register" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RXBUFF_set/clr ,Receive Buffer Full Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TXBUFE_set/clr ,Transmit Buffer Empty Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " UNRE_set/clr ,SPI Underrun Error Interrupt Enable/Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXEMPTY_set/clr ,TXEMPTY Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " OVRE_set/clr ,Overrun Error Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 4. -0x08 4. -0x04 4. " ENDTX_set/clr ,End of Transmit Buffer Interrupt Enable/Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x08 3. -0x04 3. " ENDRX_set/clr ,End of Receive Buffer Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TXRDY_set/clr ,TXRDY Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RXRDY_set/clr ,RXRDY Interrupt Enable/Mask" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "US_IMR,Interrupt Enable/Enable Register" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " MANE_set/clr , Manchester Error Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 19. -0x08 19. -0x04 19. " CTSIC_set/clr ,Clear to Send Input Change Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " DCDIC_set/clr ,Data Carrier Detect Input Change Interrupt Enable/Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x08 17. -0x04 17. " DSRIC_set/clr ,Data Set Ready Input Change Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " RIIC_set/clr ,Ring Indicator Input Change Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " NACK_set/clr ,Non Acknowledge Interrupt Enable/Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x08 12. -0x04 12. " RXBUFF_set/clr ,Receive Buffer Full Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x08 11. -0x04 11. " TXBUFE_set/clr ,Transmit Buffer Empty Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " ITER_set/clr ,Max number of Repetitions Reached Interrupt Enable/Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXEMPTY_set/clr ,TXEMPTY Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 8. -0x08 8. -0x04 8. " TIMEOUT_set/clr ,Time-out Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " PARE_set/clr ,Parity Error Interrupt Enable/Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. -0x08 6. -0x04 6. " FRAME_set/clr ,Framing Error Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " OVRE_set/clr ,Overrun Error Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 4. -0x08 4. -0x04 4. " ENDTX_set/clr ,End of Transmit Buffer Interrupt Enable/Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x08 3. -0x04 3. " ENDRX_set/clr ,End of Receive Buffer Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " RXBRK_set/clr ,Receiver Break Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TXRDY_set/clr ,TXRDY Interrupt Enable/Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RXRDY_set/clr ,RXRDY Interrupt Enable/Mask" "Disabled,Enabled" endif textline " " hgroup.long 0x14++0x03 hide.long 0x0 "CSR,Channel Status Register" in hgroup.long 0x18++0x03 hide.long 0x00 "RHR,Receiver Holding Register" in wgroup.long 0x1c++0x03 line.long 0x00 "US_THR,Transmitter Holding Register" bitfld.long 0x00 15. " TXSYNH ,Sync Field to be transmitted" "Data,Command" hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to be Transmitted" if ((d.l(ad:0x40028000+0xE4)&0x01)==0x00) group.long 0x20++0x0B line.long 0x00 "US_BRGR,Baud Rate Generator Register" bitfld.long 0x00 16.--18. " FP ,Fractional Part" "Disabled,1/8,2/8,3/8,4/8,5/8,6/8,7/8" hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider" line.long 0x04 "RTOR,Receiver Time-out Register" hexmask.long.word 0x04 0.--15. 1. " TO ,Time-out Value" line.long 0x08 "TTGR,Transmitter Timeguard Register" hexmask.long.byte 0x08 0.--7. 1. " TG ,Timeguard Value" group.long 0x040++0x03 line.long 0x00 "US_FIDI,FI DI Ratio Register" hexmask.long.word 0x00 0.--10. 1. " FI_DI_RATIO ,FI Over DI Ratio Value" else rgroup.long 0x20++0x0B line.long 0x00 "US_BRGR,Baud Rate Generator Register" bitfld.long 0x00 16.--18. " FP ,Fractional Part" "Disabled,1/8,2/8,3/8,4/8,5/8,6/8,7/8" hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider" line.long 0x04 "RTOR,Receiver Time-out Register" hexmask.long.word 0x04 0.--15. 1. " TO ,Time-out Value" line.long 0x08 "TTGR,Transmitter Timeguard Register" hexmask.long.byte 0x08 0.--7. 1. " TG ,Timeguard Value" rgroup.long 0x40++0x03 line.long 0x00 "US_FIDI,FI DI Ratio Register" hexmask.long.word 0x00 0.--10. 1. " FI_DI_RATIO ,FI Over DI Ratio Value" endif if ((d.l((ad:0x40028000)+0x04)&0xF)==(0x04||0x6)) hgroup.long 0x044++0x03 hide.long 0x00 "NER,Number of Errors Register" in endif if (((d.l(ad:0x40028000+0x04)&0x0F)==0x08)&&((d.l(ad:0x40028000+0xE4)&0x01)==0x00)) group.long 0x04c++0x03 line.long 0x00 "US_IF,USART IrDA FILTER Register" hexmask.long.byte 0x00 0.--7. 1. " IRDA_FILTER ,IrDA Filter" elif (((d.l(ad:0x40028000+0x04)&0x0F)==0x08)&&((d.l(ad:0x40028000+0xE4)&0x01)==0x01)) rgroup.long 0x04c++0x03 line.long 0x00 "US_IF,USART IrDA FILTER Register" hexmask.long.byte 0x00 0.--7. 1. " IRDA_FILTER ,IrDA Filter" endif if ((d.l(ad:0x40028000+0xE4)&0x01)==0x00) group.long 0x50++0x03 line.long 0x00 "US_MAN,USART Manchester Configuration Register" bitfld.long 0x00 30. " DRIFT ,Drift Compensation" "Disabled,Enabled" bitfld.long 0x00 29. " ONE ,Must be set to 1" ",1" bitfld.long 0x00 28. " RX_MPOL ,Receiver Manchester Polarity" "0-to-1,1-to-0" textline " " bitfld.long 0x00 24.--25. " RX_PP ,Receiver Preamble Pattern Detected" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO" bitfld.long 0x00 16.--19. " RX_PL ,Receiver Preamble Length" "Disabled,1 Bit,2 Bit,3 Bit,4 Bit,5 Bit,6 Bit,7 Bit,8 Bit,9 Bit,10 Bit,11 Bit,12 Bit,13 Bit,14 Bit,15 Bit" bitfld.long 0x00 12. " TX_MPOL ,Transmitter Manchester Polarity" "0-to-1,1-to-0" textline " " bitfld.long 0x00 8.--9. " TX_PP ,Transmitter Preamble Pattern" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO" bitfld.long 0x00 0.--3. " TX_PL ,Transmitter Preamble Length" "Disabled,1 Bit,2 Bit,3 Bit,4 Bit,5 Bit,6 Bit,7 Bit,8 Bit,9 Bit,10 Bit,11 Bit,12 Bit,13 Bit,14 Bit,15 Bit" else rgroup.long 0x50++0x03 line.long 0x00 "US_MAN,USART Manchester Configuration Register" bitfld.long 0x00 30. " DRIFT ,Drift Compensation" "Disabled,Enabled" bitfld.long 0x00 29. " ONE ,Must be set to 1" ",1" bitfld.long 0x00 28. " RX_MPOL ,Receiver Manchester Polarity" "0-to-1,1-to-0" textline " " bitfld.long 0x00 24.--25. " RX_PP ,Receiver Preamble Pattern Detected" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO" bitfld.long 0x00 16.--19. " RX_PL ,Receiver Preamble Length" "Disabled,1 Bit,2 Bit,3 Bit,4 Bit,5 Bit,6 Bit,7 Bit,8 Bit,9 Bit,10 Bit,11 Bit,12 Bit,13 Bit,14 Bit,15 Bit" bitfld.long 0x00 12. " TX_MPOL ,Transmitter Manchester Polarity" "0-to-1,1-to-0" textline " " bitfld.long 0x00 8.--9. " TX_PP ,Transmitter Preamble Pattern" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO" bitfld.long 0x00 0.--3. " TX_PL ,Transmitter Preamble Length" "Disabled,1 Bit,2 Bit,3 Bit,4 Bit,5 Bit,6 Bit,7 Bit,8 Bit,9 Bit,10 Bit,11 Bit,12 Bit,13 Bit,14 Bit,15 Bit" endif group.long 0xE4++0x3 line.long 0x00 "US_WPMR,USART Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write Protect KEY" bitfld.long 0x00 0. " WPEN ,Write Protect Enable" "Disabled,Enabled" hgroup.long 0xE8++0x3 hide.long 0x00 "WPSR,USART Write Protect Status Register" in width 0xb tree "PDC (Peripheral DMA Controller)" base ad:0x40028000 width 13. group.long 0x100++0x01F line.long 0x00 "USART1_RPR,Receive Pointer Register" line.long 0x04 "USART1_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "USART1_TPR,Transmit Pointer Register" line.long 0x0c "USART1_TCR,Transmit Counter Register" hexmask.long.word 0x0C 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "USART1_RNPR,Receive Next Pointer Register" line.long 0x14 "USART1_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "USART1_TNPR,Transmit Next Pointer Register" line.long 0x1c "USART1_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "USART1_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disable" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enable" bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disable" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enable" rgroup.long 0x124++0x03 line.long 0x00 "USART1_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0x0B tree.end tree.end tree.end tree.open "TC (Timer Counter)" tree "TC0" base ad:0x40010000 width 14. tree "Channel 0" wgroup.long (0x0+0x00)++0x03 line.long 0x00 "CCR0,Channel 0 Control Register" bitfld.long 0x00 2. " SWTRG ,Software trigger command" "No effect,Trigger" bitfld.long 0x00 1. " CLKDIS ,Counter clock disable command" "No effect,Disable" bitfld.long 0x00 0. " CLKEN ,Counter clock enable command" "No effect,Enable" if ((((per.l(ad:0x40010000+0x0+0x04))&0x8000)==0x00)&&(((per.l(ad:0x40010000+0xE4))&0x01)==0x00)) group.long (0x0+0x04)++0x03 line.long 0x00 "CMR0,Channel 0 Mode Register" sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") bitfld.long 0x00 20.--22. " SBSMPLR ,Loading edge subsampling ratio" "One,Half,Fourth,Eighth,Sixteenth,?..." bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline else bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline endif newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 14. " CPCTRG ,RC compare trigger enable" "Disabled,Enabled" bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB external trigger selection" "TIOB,TIOA" newline bitfld.long 0x00 8.--9. " ETRGEDG ,External trigger edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " LDBDIS ,Counter clock disable with RB loading" "No,Yes" bitfld.long 0x00 6. " LDBSTOP ,Counter clock stopped with RB loading" "Not stopped,Stopped" newline bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" elif ((((per.l(ad:0x40010000+0x0+0x04))&0x8000)==0x00)&&(((per.l(ad:0x40010000+0xE4))&0x01)==0x01)) rgroup.long (0x0+0x04)++0x03 line.long 0x00 "CMR0,Channel 0 Mode Register" sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") bitfld.long 0x00 20.--22. " SBSMPLR ,Loading edge subsampling ratio" "One,Half,Fourth,Eighth,Sixteenth,?..." bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline else bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline endif newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 14. " CPCTRG ,RC compare trigger enable" "Disabled,Enabled" bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB external trigger selection" "TIOB,TIOA" newline bitfld.long 0x00 8.--9. " ETRGEDG ,External trigger edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " LDBDIS ,Counter clock disable with RB loading" "No,Yes" bitfld.long 0x00 6. " LDBSTOP ,Counter clock stopped with RB loading" "Not stopped,Stopped" newline bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" elif ((((per.l(ad:0x40010000+0x0+0x04))&0x8000)==0x8000)&&(((per.l(ad:0x40010000+0xE4))&0x01)==0x00)) group.long (0x0+0x04)++0x03 line.long 0x00 "CMR0,Channel 0 Mode Register" bitfld.long 0x00 30.--31. " BSWTRG ,Software trigger effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 28.--29. " BEEVT ,External event effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 26.--27. " BCPC ,RC compare effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 24.--25. " BCPB ,RB compare effect on TIOB" "None,Set,Clear,Toggle" newline bitfld.long 0x00 22.--23. " ASWTRG ,Software trigger effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 20.--21. " AEEVT ,External event effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 18.--19. " ACPC ,RC compare effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 16.--17. " ACPA ,RA compare effect on TIOA" "None,Set,Clear,Toggle" newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 13.--14. " WAVSEL ,Waveform selection (with/without automatic trigger on RC compare)" "UP,UPDOWN,UP_RC,UPDOWN_RC" newline bitfld.long 0x00 12. " ENETRG ,External event trigger enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " EEVT ,External event selection" "TIOB,XC0,XC1,XC2" newline bitfld.long 0x00 8.--9. " EEVTEDG ,External event edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " CPCDIS ,Counter clock disable with RC compare" "No,Yes" bitfld.long 0x00 6. " CPCSTOP ,Counter clock stopped with RC compare" "Not stopped,Stopped" bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" newline bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" else rgroup.long (0x0+0x04)++0x03 line.long 0x00 "CMR0,Channel 0 Mode Register" bitfld.long 0x00 30.--31. " BSWTRG ,Software trigger effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 28.--29. " BEEVT ,External event effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 26.--27. " BCPC ,RC compare effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 24.--25. " BCPB ,RB compare effect on TIOB" "None,Set,Clear,Toggle" newline bitfld.long 0x00 22.--23. " ASWTRG ,Software trigger effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 20.--21. " AEEVT ,External event effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 18.--19. " ACPC ,RC compare effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 16.--17. " ACPA ,RA compare effect on TIOA" "None,Set,Clear,Toggle" newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 13.--14. " WAVSEL ,Waveform selection (with/without automatic trigger on RC compare)" "UP,UPDOWN,UP_RC,UPDOWN_RC" newline bitfld.long 0x00 12. " ENETRG ,External event trigger enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " EEVT ,External event selection" "TIOB,XC0,XC1,XC2" newline bitfld.long 0x00 8.--9. " EEVTEDG ,External event edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " CPCDIS ,Counter clock disable with RC compare" "No,Yes" bitfld.long 0x00 6. " CPCSTOP ,Counter clock stopped with RC compare" "Not stopped,Stopped" bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" newline bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" endif if (((per.l(ad:0x40010000+0xE4))&0x01)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "SMMR0,Ch 0 Stepper Motor Mode Register" bitfld.long 0x00 1. " DOWN ,Down count" "Up,Down" bitfld.long 0x00 0. " GCEN ,Gray count enable" "Disabled,Enabled" else rgroup.long (0x0+0x08)++0x03 line.long 0x00 "SMMR0,Ch 0 Stepper Motor Mode Register" bitfld.long 0x00 1. " DOWN ,Down count" "Up,Down" bitfld.long 0x00 0. " GCEN ,Gray count enable" "Disabled,Enabled" endif sif !cpuis("ATSAM4S*")&&!cpuis("ATSAMA5D3*") rgroup.long (0x0+0x0C)++0x03 line.long 0x00 "RAB0,Channel 0 Register AB" endif rgroup.long (0x0+0x10)++0x03 line.long 0x00 "CV0,Channel 0 Counter Value Register" sif cpuis("ATSAM4S*") if ((((per.l(ad:0x40010000+0xE4))&0x01)==0x00)&&(((per.l(ad:0x40010000+0x8000))&0x04)==0x8000)) group.long (0x0+0x14)++0x07 line.long 0x00 "RA0,Channel 0 Register A" hexmask.long.word 0x00 0.--15. 1. " RA ,Register A value" line.long 0x04 "RB0,Channel 0 Register B" hexmask.long.word 0x04 0.--15. 1. " RB ,Register B value" else rgroup.long (0x0+0x14)++0x07 line.long 0x00 "RA0,Channel 0 Register A" hexmask.long.word 0x00 0.--15. 1. " RA ,Register A value" line.long 0x04 "RB0,Channel 0 Register B" hexmask.long.word 0x04 0.--15. 1. " RB ,Register B value" endif if (((per.l(ad:0x40010000+0xE4))&0x01)==0x00) group.long (0x0+0x1C)++0x03 line.long 0x00 "RC0,Channel 0 Register C" hexmask.long.word 0x00 0.--15. 1. " RC ,Register C value" else rgroup.long (0x0+0x1C)++0x03 line.long 0x00 "RC0,Channel 0 Register C" hexmask.long.word 0x00 0.--15. 1. " RC ,Register C value" endif else if ((((per.l(ad:0x40010000+0xE4))&0x01)==0x00)&&(((per.l(ad:0x40010000+0x8000))&0x04)==0x8000)) group.long (0x0+0x14)++0x07 line.long 0x00 "RA0,Channel 0 Register A" line.long 0x04 "RB0,Channel 0 Register B" else rgroup.long (0x0+0x14)++0x07 line.long 0x00 "RA0,Channel 0 Register A" line.long 0x04 "RB0,Channel 0 Register B" endif if (((per.l(ad:0x40010000+0xE4))&0x01)==0x00) group.long (0x0+0x1C)++0x03 line.long 0x00 "RC0,Channel 0 Register C" else rgroup.long (0x0+0x1C)++0x03 line.long 0x00 "RC0,Channel 0 Register C" endif endif newline hgroup.long (0x0+0x20)++0x03 hide.long 0x00 "SR0,Channel 0 Status Register" in newline group.long (0x0+0x2C)++0x03 line.long 0x00 "IMR0_SET/CLR,Channel 0 Interrupt Mask Set/Clear Register" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " ETRGS ,External trigger status interrupt" "Masked,Not masked" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " LDRBS ,RB loading status interrupt" "Masked,Not masked" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " LDRAS ,RA loading status interrupt" "Masked,Not masked" setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CPCS ,RC compare status interrupt" "Masked,Not masked" newline setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CPBS ,RB compare status interrupt" "Masked,Not masked" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CPAS ,RA compare status interrupt" "Masked,Not masked" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " LOVRS ,Load overrun status interrupt" "Masked,Not masked" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " COVFS ,Counter overflow status interrupt" "Masked,Not masked" sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") if (((per.l(ad:0x40010000+0xE4))&0x01)==0x00) group.long (0x0+0x30)++0x03 line.long 0x00 "EMR0,Channel 0 Extended Mode Register" bitfld.long 0x00 8. " NODIVCLK ,No divided clock" "Divided,Not divided" bitfld.long 0x00 4.--5. " TRIGSRCB ,Trigger source for input B" "External TIOB0,PWM0,?..." bitfld.long 0x00 0.--1. " TRIGSRCA ,Trigger source for input A" "External TIOA0,PWM0,?..." else rgroup.long (0x0+0x30)++0x03 line.long 0x00 "EMR0,Channel 0 Extended Mode Register" bitfld.long 0x00 8. " NODIVCLK ,No divided clock" "Divided,Not divided" bitfld.long 0x00 4.--5. " TRIGSRCB ,Trigger source for input B" "External TIOB0,PWM0,?..." bitfld.long 0x00 0.--1. " TRIGSRCA ,Trigger source for input A" "External TIOA0,PWM0,?..." endif endif tree.end tree "Channel 1" wgroup.long (0x40+0x00)++0x03 line.long 0x00 "CCR1,Channel 1 Control Register" bitfld.long 0x00 2. " SWTRG ,Software trigger command" "No effect,Trigger" bitfld.long 0x00 1. " CLKDIS ,Counter clock disable command" "No effect,Disable" bitfld.long 0x00 0. " CLKEN ,Counter clock enable command" "No effect,Enable" if ((((per.l(ad:0x40010000+0x40+0x04))&0x8000)==0x00)&&(((per.l(ad:0x40010000+0xE4))&0x01)==0x00)) group.long (0x40+0x04)++0x03 line.long 0x00 "CMR1,Channel 1 Mode Register" sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") bitfld.long 0x00 20.--22. " SBSMPLR ,Loading edge subsampling ratio" "One,Half,Fourth,Eighth,Sixteenth,?..." bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline else bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline endif newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 14. " CPCTRG ,RC compare trigger enable" "Disabled,Enabled" bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB external trigger selection" "TIOB,TIOA" newline bitfld.long 0x00 8.--9. " ETRGEDG ,External trigger edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " LDBDIS ,Counter clock disable with RB loading" "No,Yes" bitfld.long 0x00 6. " LDBSTOP ,Counter clock stopped with RB loading" "Not stopped,Stopped" newline bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" elif ((((per.l(ad:0x40010000+0x40+0x04))&0x8000)==0x00)&&(((per.l(ad:0x40010000+0xE4))&0x01)==0x01)) rgroup.long (0x40+0x04)++0x03 line.long 0x00 "CMR1,Channel 1 Mode Register" sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") bitfld.long 0x00 20.--22. " SBSMPLR ,Loading edge subsampling ratio" "One,Half,Fourth,Eighth,Sixteenth,?..." bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline else bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline endif newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 14. " CPCTRG ,RC compare trigger enable" "Disabled,Enabled" bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB external trigger selection" "TIOB,TIOA" newline bitfld.long 0x00 8.--9. " ETRGEDG ,External trigger edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " LDBDIS ,Counter clock disable with RB loading" "No,Yes" bitfld.long 0x00 6. " LDBSTOP ,Counter clock stopped with RB loading" "Not stopped,Stopped" newline bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" elif ((((per.l(ad:0x40010000+0x40+0x04))&0x8000)==0x8000)&&(((per.l(ad:0x40010000+0xE4))&0x01)==0x00)) group.long (0x40+0x04)++0x03 line.long 0x00 "CMR1,Channel 1 Mode Register" bitfld.long 0x00 30.--31. " BSWTRG ,Software trigger effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 28.--29. " BEEVT ,External event effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 26.--27. " BCPC ,RC compare effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 24.--25. " BCPB ,RB compare effect on TIOB" "None,Set,Clear,Toggle" newline bitfld.long 0x00 22.--23. " ASWTRG ,Software trigger effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 20.--21. " AEEVT ,External event effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 18.--19. " ACPC ,RC compare effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 16.--17. " ACPA ,RA compare effect on TIOA" "None,Set,Clear,Toggle" newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 13.--14. " WAVSEL ,Waveform selection (with/without automatic trigger on RC compare)" "UP,UPDOWN,UP_RC,UPDOWN_RC" newline bitfld.long 0x00 12. " ENETRG ,External event trigger enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " EEVT ,External event selection" "TIOB,XC0,XC1,XC2" newline bitfld.long 0x00 8.--9. " EEVTEDG ,External event edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " CPCDIS ,Counter clock disable with RC compare" "No,Yes" bitfld.long 0x00 6. " CPCSTOP ,Counter clock stopped with RC compare" "Not stopped,Stopped" bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" newline bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" else rgroup.long (0x40+0x04)++0x03 line.long 0x00 "CMR1,Channel 1 Mode Register" bitfld.long 0x00 30.--31. " BSWTRG ,Software trigger effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 28.--29. " BEEVT ,External event effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 26.--27. " BCPC ,RC compare effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 24.--25. " BCPB ,RB compare effect on TIOB" "None,Set,Clear,Toggle" newline bitfld.long 0x00 22.--23. " ASWTRG ,Software trigger effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 20.--21. " AEEVT ,External event effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 18.--19. " ACPC ,RC compare effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 16.--17. " ACPA ,RA compare effect on TIOA" "None,Set,Clear,Toggle" newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 13.--14. " WAVSEL ,Waveform selection (with/without automatic trigger on RC compare)" "UP,UPDOWN,UP_RC,UPDOWN_RC" newline bitfld.long 0x00 12. " ENETRG ,External event trigger enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " EEVT ,External event selection" "TIOB,XC0,XC1,XC2" newline bitfld.long 0x00 8.--9. " EEVTEDG ,External event edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " CPCDIS ,Counter clock disable with RC compare" "No,Yes" bitfld.long 0x00 6. " CPCSTOP ,Counter clock stopped with RC compare" "Not stopped,Stopped" bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" newline bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" endif if (((per.l(ad:0x40010000+0xE4))&0x01)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "SMMR1,Ch 1 Stepper Motor Mode Register" bitfld.long 0x00 1. " DOWN ,Down count" "Up,Down" bitfld.long 0x00 0. " GCEN ,Gray count enable" "Disabled,Enabled" else rgroup.long (0x40+0x08)++0x03 line.long 0x00 "SMMR1,Ch 1 Stepper Motor Mode Register" bitfld.long 0x00 1. " DOWN ,Down count" "Up,Down" bitfld.long 0x00 0. " GCEN ,Gray count enable" "Disabled,Enabled" endif sif !cpuis("ATSAM4S*")&&!cpuis("ATSAMA5D3*") rgroup.long (0x40+0x0C)++0x03 line.long 0x00 "RAB1,Channel 1 Register AB" endif rgroup.long (0x40+0x10)++0x03 line.long 0x00 "CV1,Channel 1 Counter Value Register" sif cpuis("ATSAM4S*") if ((((per.l(ad:0x40010000+0xE4))&0x01)==0x00)&&(((per.l(ad:0x40010000+0x8000))&0x04)==0x8000)) group.long (0x40+0x14)++0x07 line.long 0x00 "RA1,Channel 1 Register A" hexmask.long.word 0x00 0.--15. 1. " RA ,Register A value" line.long 0x04 "RB1,Channel 1 Register B" hexmask.long.word 0x04 0.--15. 1. " RB ,Register B value" else rgroup.long (0x40+0x14)++0x07 line.long 0x00 "RA1,Channel 1 Register A" hexmask.long.word 0x00 0.--15. 1. " RA ,Register A value" line.long 0x04 "RB1,Channel 1 Register B" hexmask.long.word 0x04 0.--15. 1. " RB ,Register B value" endif if (((per.l(ad:0x40010000+0xE4))&0x01)==0x00) group.long (0x40+0x1C)++0x03 line.long 0x00 "RC1,Channel 1 Register C" hexmask.long.word 0x00 0.--15. 1. " RC ,Register C value" else rgroup.long (0x40+0x1C)++0x03 line.long 0x00 "RC1,Channel 1 Register C" hexmask.long.word 0x00 0.--15. 1. " RC ,Register C value" endif else if ((((per.l(ad:0x40010000+0xE4))&0x01)==0x00)&&(((per.l(ad:0x40010000+0x8000))&0x04)==0x8000)) group.long (0x40+0x14)++0x07 line.long 0x00 "RA1,Channel 1 Register A" line.long 0x04 "RB1,Channel 1 Register B" else rgroup.long (0x40+0x14)++0x07 line.long 0x00 "RA1,Channel 1 Register A" line.long 0x04 "RB1,Channel 1 Register B" endif if (((per.l(ad:0x40010000+0xE4))&0x01)==0x00) group.long (0x40+0x1C)++0x03 line.long 0x00 "RC1,Channel 1 Register C" else rgroup.long (0x40+0x1C)++0x03 line.long 0x00 "RC1,Channel 1 Register C" endif endif newline hgroup.long (0x40+0x20)++0x03 hide.long 0x00 "SR1,Channel 1 Status Register" in newline group.long (0x40+0x2C)++0x03 line.long 0x00 "IMR1_SET/CLR,Channel 1 Interrupt Mask Set/Clear Register" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " ETRGS ,External trigger status interrupt" "Masked,Not masked" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " LDRBS ,RB loading status interrupt" "Masked,Not masked" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " LDRAS ,RA loading status interrupt" "Masked,Not masked" setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CPCS ,RC compare status interrupt" "Masked,Not masked" newline setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CPBS ,RB compare status interrupt" "Masked,Not masked" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CPAS ,RA compare status interrupt" "Masked,Not masked" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " LOVRS ,Load overrun status interrupt" "Masked,Not masked" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " COVFS ,Counter overflow status interrupt" "Masked,Not masked" sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") if (((per.l(ad:0x40010000+0xE4))&0x01)==0x00) group.long (0x40+0x30)++0x03 line.long 0x00 "EMR1,Channel 1 Extended Mode Register" bitfld.long 0x00 8. " NODIVCLK ,No divided clock" "Divided,Not divided" bitfld.long 0x00 4.--5. " TRIGSRCB ,Trigger source for input B" "External TIOB1,PWM1,?..." bitfld.long 0x00 0.--1. " TRIGSRCA ,Trigger source for input A" "External TIOA1,PWM1,?..." else rgroup.long (0x40+0x30)++0x03 line.long 0x00 "EMR1,Channel 1 Extended Mode Register" bitfld.long 0x00 8. " NODIVCLK ,No divided clock" "Divided,Not divided" bitfld.long 0x00 4.--5. " TRIGSRCB ,Trigger source for input B" "External TIOB1,PWM1,?..." bitfld.long 0x00 0.--1. " TRIGSRCA ,Trigger source for input A" "External TIOA1,PWM1,?..." endif endif tree.end tree "Channel 2" wgroup.long (0x80+0x00)++0x03 line.long 0x00 "CCR2,Channel 2 Control Register" bitfld.long 0x00 2. " SWTRG ,Software trigger command" "No effect,Trigger" bitfld.long 0x00 1. " CLKDIS ,Counter clock disable command" "No effect,Disable" bitfld.long 0x00 0. " CLKEN ,Counter clock enable command" "No effect,Enable" if ((((per.l(ad:0x40010000+0x80+0x04))&0x8000)==0x00)&&(((per.l(ad:0x40010000+0xE4))&0x01)==0x00)) group.long (0x80+0x04)++0x03 line.long 0x00 "CMR2,Channel 2 Mode Register" sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") bitfld.long 0x00 20.--22. " SBSMPLR ,Loading edge subsampling ratio" "One,Half,Fourth,Eighth,Sixteenth,?..." bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline else bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline endif newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 14. " CPCTRG ,RC compare trigger enable" "Disabled,Enabled" bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB external trigger selection" "TIOB,TIOA" newline bitfld.long 0x00 8.--9. " ETRGEDG ,External trigger edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " LDBDIS ,Counter clock disable with RB loading" "No,Yes" bitfld.long 0x00 6. " LDBSTOP ,Counter clock stopped with RB loading" "Not stopped,Stopped" newline bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" elif ((((per.l(ad:0x40010000+0x80+0x04))&0x8000)==0x00)&&(((per.l(ad:0x40010000+0xE4))&0x01)==0x01)) rgroup.long (0x80+0x04)++0x03 line.long 0x00 "CMR2,Channel 2 Mode Register" sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") bitfld.long 0x00 20.--22. " SBSMPLR ,Loading edge subsampling ratio" "One,Half,Fourth,Eighth,Sixteenth,?..." bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline else bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline endif newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 14. " CPCTRG ,RC compare trigger enable" "Disabled,Enabled" bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB external trigger selection" "TIOB,TIOA" newline bitfld.long 0x00 8.--9. " ETRGEDG ,External trigger edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " LDBDIS ,Counter clock disable with RB loading" "No,Yes" bitfld.long 0x00 6. " LDBSTOP ,Counter clock stopped with RB loading" "Not stopped,Stopped" newline bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" elif ((((per.l(ad:0x40010000+0x80+0x04))&0x8000)==0x8000)&&(((per.l(ad:0x40010000+0xE4))&0x01)==0x00)) group.long (0x80+0x04)++0x03 line.long 0x00 "CMR2,Channel 2 Mode Register" bitfld.long 0x00 30.--31. " BSWTRG ,Software trigger effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 28.--29. " BEEVT ,External event effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 26.--27. " BCPC ,RC compare effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 24.--25. " BCPB ,RB compare effect on TIOB" "None,Set,Clear,Toggle" newline bitfld.long 0x00 22.--23. " ASWTRG ,Software trigger effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 20.--21. " AEEVT ,External event effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 18.--19. " ACPC ,RC compare effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 16.--17. " ACPA ,RA compare effect on TIOA" "None,Set,Clear,Toggle" newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 13.--14. " WAVSEL ,Waveform selection (with/without automatic trigger on RC compare)" "UP,UPDOWN,UP_RC,UPDOWN_RC" newline bitfld.long 0x00 12. " ENETRG ,External event trigger enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " EEVT ,External event selection" "TIOB,XC0,XC1,XC2" newline bitfld.long 0x00 8.--9. " EEVTEDG ,External event edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " CPCDIS ,Counter clock disable with RC compare" "No,Yes" bitfld.long 0x00 6. " CPCSTOP ,Counter clock stopped with RC compare" "Not stopped,Stopped" bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" newline bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" else rgroup.long (0x80+0x04)++0x03 line.long 0x00 "CMR2,Channel 2 Mode Register" bitfld.long 0x00 30.--31. " BSWTRG ,Software trigger effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 28.--29. " BEEVT ,External event effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 26.--27. " BCPC ,RC compare effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 24.--25. " BCPB ,RB compare effect on TIOB" "None,Set,Clear,Toggle" newline bitfld.long 0x00 22.--23. " ASWTRG ,Software trigger effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 20.--21. " AEEVT ,External event effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 18.--19. " ACPC ,RC compare effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 16.--17. " ACPA ,RA compare effect on TIOA" "None,Set,Clear,Toggle" newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 13.--14. " WAVSEL ,Waveform selection (with/without automatic trigger on RC compare)" "UP,UPDOWN,UP_RC,UPDOWN_RC" newline bitfld.long 0x00 12. " ENETRG ,External event trigger enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " EEVT ,External event selection" "TIOB,XC0,XC1,XC2" newline bitfld.long 0x00 8.--9. " EEVTEDG ,External event edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " CPCDIS ,Counter clock disable with RC compare" "No,Yes" bitfld.long 0x00 6. " CPCSTOP ,Counter clock stopped with RC compare" "Not stopped,Stopped" bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" newline bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" endif if (((per.l(ad:0x40010000+0xE4))&0x01)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "SMMR2,Ch 2 Stepper Motor Mode Register" bitfld.long 0x00 1. " DOWN ,Down count" "Up,Down" bitfld.long 0x00 0. " GCEN ,Gray count enable" "Disabled,Enabled" else rgroup.long (0x80+0x08)++0x03 line.long 0x00 "SMMR2,Ch 2 Stepper Motor Mode Register" bitfld.long 0x00 1. " DOWN ,Down count" "Up,Down" bitfld.long 0x00 0. " GCEN ,Gray count enable" "Disabled,Enabled" endif sif !cpuis("ATSAM4S*")&&!cpuis("ATSAMA5D3*") rgroup.long (0x80+0x0C)++0x03 line.long 0x00 "RAB2,Channel 2 Register AB" endif rgroup.long (0x80+0x10)++0x03 line.long 0x00 "CV2,Channel 2 Counter Value Register" sif cpuis("ATSAM4S*") if ((((per.l(ad:0x40010000+0xE4))&0x01)==0x00)&&(((per.l(ad:0x40010000+0x8000))&0x04)==0x8000)) group.long (0x80+0x14)++0x07 line.long 0x00 "RA2,Channel 2 Register A" hexmask.long.word 0x00 0.--15. 1. " RA ,Register A value" line.long 0x04 "RB2,Channel 2 Register B" hexmask.long.word 0x04 0.--15. 1. " RB ,Register B value" else rgroup.long (0x80+0x14)++0x07 line.long 0x00 "RA2,Channel 2 Register A" hexmask.long.word 0x00 0.--15. 1. " RA ,Register A value" line.long 0x04 "RB2,Channel 2 Register B" hexmask.long.word 0x04 0.--15. 1. " RB ,Register B value" endif if (((per.l(ad:0x40010000+0xE4))&0x01)==0x00) group.long (0x80+0x1C)++0x03 line.long 0x00 "RC2,Channel 2 Register C" hexmask.long.word 0x00 0.--15. 1. " RC ,Register C value" else rgroup.long (0x80+0x1C)++0x03 line.long 0x00 "RC2,Channel 2 Register C" hexmask.long.word 0x00 0.--15. 1. " RC ,Register C value" endif else if ((((per.l(ad:0x40010000+0xE4))&0x01)==0x00)&&(((per.l(ad:0x40010000+0x8000))&0x04)==0x8000)) group.long (0x80+0x14)++0x07 line.long 0x00 "RA2,Channel 2 Register A" line.long 0x04 "RB2,Channel 2 Register B" else rgroup.long (0x80+0x14)++0x07 line.long 0x00 "RA2,Channel 2 Register A" line.long 0x04 "RB2,Channel 2 Register B" endif if (((per.l(ad:0x40010000+0xE4))&0x01)==0x00) group.long (0x80+0x1C)++0x03 line.long 0x00 "RC2,Channel 2 Register C" else rgroup.long (0x80+0x1C)++0x03 line.long 0x00 "RC2,Channel 2 Register C" endif endif newline hgroup.long (0x80+0x20)++0x03 hide.long 0x00 "SR2,Channel 2 Status Register" in newline group.long (0x80+0x2C)++0x03 line.long 0x00 "IMR2_SET/CLR,Channel 2 Interrupt Mask Set/Clear Register" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " ETRGS ,External trigger status interrupt" "Masked,Not masked" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " LDRBS ,RB loading status interrupt" "Masked,Not masked" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " LDRAS ,RA loading status interrupt" "Masked,Not masked" setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CPCS ,RC compare status interrupt" "Masked,Not masked" newline setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CPBS ,RB compare status interrupt" "Masked,Not masked" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CPAS ,RA compare status interrupt" "Masked,Not masked" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " LOVRS ,Load overrun status interrupt" "Masked,Not masked" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " COVFS ,Counter overflow status interrupt" "Masked,Not masked" sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") if (((per.l(ad:0x40010000+0xE4))&0x01)==0x00) group.long (0x80+0x30)++0x03 line.long 0x00 "EMR2,Channel 2 Extended Mode Register" bitfld.long 0x00 8. " NODIVCLK ,No divided clock" "Divided,Not divided" bitfld.long 0x00 4.--5. " TRIGSRCB ,Trigger source for input B" "External TIOB2,PWM2,?..." bitfld.long 0x00 0.--1. " TRIGSRCA ,Trigger source for input A" "External TIOA2,PWM2,?..." else rgroup.long (0x80+0x30)++0x03 line.long 0x00 "EMR2,Channel 2 Extended Mode Register" bitfld.long 0x00 8. " NODIVCLK ,No divided clock" "Divided,Not divided" bitfld.long 0x00 4.--5. " TRIGSRCB ,Trigger source for input B" "External TIOB2,PWM2,?..." bitfld.long 0x00 0.--1. " TRIGSRCA ,Trigger source for input A" "External TIOA2,PWM2,?..." endif endif tree.end newline wgroup.long 0xC0++0x03 line.long 0x00 "BCR,Block Control Register" bitfld.long 0x00 0. " SYNC ,Synchro command" "No effect,Assert" sif cpuis("ATSAMA5D4*")||cpuis("ATSAM4S*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") if ((per.l(ad:0x40010000+0xE4)&0x01)==0x00) group.long 0xC4++0x03 line.long 0x00 "BMR,Block Mode Register" sif cpuis("ATSAMA5D2?")||cpuis("ATSAMS7*") bitfld.long 0x00 26.--29. " MAXCMP ,Maximum consecutive missing pulses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--25. " MAXFILT ,Maximum filter" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 18. " AUTOC ,Auto-correction of missing pulses" "Disabled,Enabled" bitfld.long 0x00 17. " IDXPHB ,Index pin is PHB pin" "TIOA1,TIOB0" newline else bitfld.long 0x00 20.--25. " MAXFILT ,Maximum filter" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 17. " IDXPHB ,Index pin is PHB pin" "TIOA1,TIOB0" newline endif bitfld.long 0x00 16. " SWAP ,Swap PHA and PHB" "Not Swapped,Swapped" bitfld.long 0x00 15. " INVIDX ,Inverted index" "Not inverted,Inverted" bitfld.long 0x00 14. " INVB ,Inverted PHB" "Not inverted,Inverted" bitfld.long 0x00 13. " INVA ,Inverted PHA" "Not inverted,Inverted" newline bitfld.long 0x00 12. " EDGPHA ,Edge on PHA count mode" "PHA only,PHA/PHB" bitfld.long 0x00 11. " QDTRANS ,Quadrature decoding transparent" "Active,Inactive" bitfld.long 0x00 10. " SPEEDEN ,Speed enabled" "Disabled,Enabled" bitfld.long 0x00 9. " POSEN ,Position enabled" "Disabled,Enabled" newline bitfld.long 0x00 8. " QDEN ,Quadrature decoder enabled" "Disabled,Enabled" bitfld.long 0x00 4.--5. " TC2XC2S ,External clock signal 2 selection" "TCLK2,,TIOA0,TIOA1" bitfld.long 0x00 2.--3. " TC1XC1S ,External clock signal 1 selection" "TCLK1,,TIOA0,TIOA2" bitfld.long 0x00 0.--1. " TC0XC0S ,External clock signal 0 selection" "TCLK0,,TIOA1,TIOA2" else rgroup.long 0xC4++0x03 line.long 0x00 "BMR,Block Mode Register" sif cpuis("ATSAMA5D2?")||cpuis("ATSAMS7*") bitfld.long 0x00 26.--29. " MAXCMP ,Maximum consecutive missing pulses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--25. " MAXFILT ,Maximum filter" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 18. " AUTOC ,Auto-correction of missing pulses" "Disabled,Enabled" bitfld.long 0x00 17. " IDXPHB ,Index pin is PHB pin" "TIOA1,TIOB0" newline else bitfld.long 0x00 20.--25. " MAXFILT ,Maximum filter" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 17. " IDXPHB ,Index pin is PHB pin" "TIOA1,TIOB0" newline endif bitfld.long 0x00 16. " SWAP ,Swap PHA and PHB" "Not Swapped,Swapped" bitfld.long 0x00 15. " INVIDX ,Inverted index" "Not inverted,Inverted" bitfld.long 0x00 14. " INVB ,Inverted PHB" "Not inverted,Inverted" bitfld.long 0x00 13. " INVA ,Inverted PHA" "Not inverted,Inverted" newline bitfld.long 0x00 12. " EDGPHA ,Edge on PHA count mode" "PHA only,PHA/PHB" bitfld.long 0x00 11. " QDTRANS ,Quadrature decoding transparent" "Active,Inactive" bitfld.long 0x00 10. " SPEEDEN ,Speed enabled" "Disabled,Enabled" bitfld.long 0x00 9. " POSEN ,Position enabled" "Disabled,Enabled" newline bitfld.long 0x00 8. " QDEN ,Quadrature decoder enabled" "Disabled,Enabled" bitfld.long 0x00 4.--5. " TC2XC2S ,External clock signal 2 selection" "TCLK2,,TIOA0,TIOA1" bitfld.long 0x00 2.--3. " TC1XC1S ,External clock signal 1 selection" "TCLK1,,TIOA0,TIOA2" bitfld.long 0x00 0.--1. " TC0XC0S ,External clock signal 0 selection" "TCLK0,,TIOA1,TIOA2" endif else if (((per.l(ad:0x40010000+0xE4))&0x01)==0x00) group.long 0xC4++0x03 line.long 0x00 "BMR,Block Mode Register" bitfld.long 0x00 4.--5. " TC2XC2S ,External clock signal 2 selection" "TCLK2,,TIOA0,TIOA1" bitfld.long 0x00 2.--3. " TC1XC1S ,External clock signal 1 selection" "TCLK1,,TIOA0,TIOA2" bitfld.long 0x00 0.--1. " TC0XC0S ,External clock signal 0 selection" "TCLK0,,TIOA1,TIOA2" else rgroup.long 0xC4++0x03 line.long 0x00 "BMR,Block Mode Register" bitfld.long 0x00 4.--5. " TC2XC2S ,External clock signal 2 selection" "TCLK2,,TIOA0,TIOA1" bitfld.long 0x00 2.--3. " TC1XC1S ,External clock signal 1 selection" "TCLK1,,TIOA0,TIOA2" bitfld.long 0x00 0.--1. " TC0XC0S ,External clock signal 0 selection" "TCLK0,,TIOA1,TIOA2" endif endif sif cpuis("ATSAMA5D4*")||cpuis("ATSAM4N*")||cpuis("ATSAM4S*")||cpuis("ATSAMV7*")||cpuis("ATSAME70*")||cpuis("ATSAMS7*")||cpuis("ATSAMA5D2?") group.long 0xD0++0x03 line.long 0x00 "QIMR_SET/CLR,QDEC Interrupt Mask Register" sif cpuis("ATSAMS7*") setclrfld.long 0x00 3. -0x08 3. -0x04 3. " MPE ,Consecutive missing pulse error" "Masked,Unmasked" newline endif setclrfld.long 0x00 2. -0x08 2. -0x04 2. " QERR ,Quadrature error" "Masked,Unmasked" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " DIRCHG ,Direction change" "Masked,Unmasked" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " IDX ,Index" "Masked,Unmasked" sif !cpuis("ATSAMS7*") hgroup.long 0xD4++0x03 hide.long 0x00 "QISR,QDEC Interrupt Status Register" in else rgroup.long 0xD4++0x03 line.long 0x00 "QISR,QDEC Interrupt Status Register" bitfld.long 0x00 8. " DIR ,Direction" "0,1" bitfld.long 0x00 3. " MPE ,Consecutive missing pulse error" "Not occurred,Occurred" bitfld.long 0x00 2. " QERR ,Quadrature error" "Not occurred,Occurred" bitfld.long 0x00 1. " DIRCHG ,Direction change" "Not occurred,Occurred" bitfld.long 0x00 0. " IDX ,Index input change" "Not occurred,Occurred" endif if (((per.l(ad:0x40010000+0xE4))&0x01)==0x00) group.long 0xD8++0x03 line.long 0x00 "FMR,Fault Mode Register" bitfld.long 0x00 1. " ENCF1 ,Enable compare fault channel 1" "Disabled,Enabled" bitfld.long 0x00 0. " ENCF0 ,Enable compare fault channel 0" "Disabled,Enabled" else rgroup.long 0xD8++0x03 line.long 0x00 "FMR,Fault Mode Register" bitfld.long 0x00 1. " ENCF1 ,Enable compare fault channel 1" "Disabled,Enabled" bitfld.long 0x00 0. " ENCF0 ,Enable compare fault channel 0" "Disabled,Enabled" endif elif cpuis("ATSAMA5D3*") if (((per.l(ad:0x40010000+0xE4))&0x01)==0x00) group.long 0xD8++0x03 line.long 0x00 "FMR,Fault Mode Register" bitfld.long 0x00 1. " ENCF1 ,Enable compare fault channel 1" "Disabled,Enabled" bitfld.long 0x00 0. " ENCF0 ,Enable compare fault channel 0" "Disabled,Enabled" else rgroup.long 0xD8++0x03 line.long 0x00 "FMR,Fault Mode Register" bitfld.long 0x00 1. " ENCF1 ,Enable compare fault channel 1" "Disabled,Enabled" bitfld.long 0x00 0. " ENCF0 ,Enable compare fault channel 0" "Disabled,Enabled" endif endif group.long 0xE4++0x03 line.long 0x00 "WPMR,Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write protect key" bitfld.long 0x00 0. " WPEN ,Write protect enable" "Disabled,Enabled" width 0x0B tree.end tree "TC1" base ad:0x40014000 width 14. tree "Channel 0" wgroup.long (0x0+0x00)++0x03 line.long 0x00 "CCR0,Channel 0 Control Register" bitfld.long 0x00 2. " SWTRG ,Software trigger command" "No effect,Trigger" bitfld.long 0x00 1. " CLKDIS ,Counter clock disable command" "No effect,Disable" bitfld.long 0x00 0. " CLKEN ,Counter clock enable command" "No effect,Enable" if ((((per.l(ad:0x40014000+0x0+0x04))&0x8000)==0x00)&&(((per.l(ad:0x40014000+0xE4))&0x01)==0x00)) group.long (0x0+0x04)++0x03 line.long 0x00 "CMR0,Channel 0 Mode Register" sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") bitfld.long 0x00 20.--22. " SBSMPLR ,Loading edge subsampling ratio" "One,Half,Fourth,Eighth,Sixteenth,?..." bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline else bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline endif newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 14. " CPCTRG ,RC compare trigger enable" "Disabled,Enabled" bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB external trigger selection" "TIOB,TIOA" newline bitfld.long 0x00 8.--9. " ETRGEDG ,External trigger edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " LDBDIS ,Counter clock disable with RB loading" "No,Yes" bitfld.long 0x00 6. " LDBSTOP ,Counter clock stopped with RB loading" "Not stopped,Stopped" newline bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" elif ((((per.l(ad:0x40014000+0x0+0x04))&0x8000)==0x00)&&(((per.l(ad:0x40014000+0xE4))&0x01)==0x01)) rgroup.long (0x0+0x04)++0x03 line.long 0x00 "CMR0,Channel 0 Mode Register" sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") bitfld.long 0x00 20.--22. " SBSMPLR ,Loading edge subsampling ratio" "One,Half,Fourth,Eighth,Sixteenth,?..." bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline else bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline endif newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 14. " CPCTRG ,RC compare trigger enable" "Disabled,Enabled" bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB external trigger selection" "TIOB,TIOA" newline bitfld.long 0x00 8.--9. " ETRGEDG ,External trigger edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " LDBDIS ,Counter clock disable with RB loading" "No,Yes" bitfld.long 0x00 6. " LDBSTOP ,Counter clock stopped with RB loading" "Not stopped,Stopped" newline bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" elif ((((per.l(ad:0x40014000+0x0+0x04))&0x8000)==0x8000)&&(((per.l(ad:0x40014000+0xE4))&0x01)==0x00)) group.long (0x0+0x04)++0x03 line.long 0x00 "CMR0,Channel 0 Mode Register" bitfld.long 0x00 30.--31. " BSWTRG ,Software trigger effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 28.--29. " BEEVT ,External event effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 26.--27. " BCPC ,RC compare effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 24.--25. " BCPB ,RB compare effect on TIOB" "None,Set,Clear,Toggle" newline bitfld.long 0x00 22.--23. " ASWTRG ,Software trigger effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 20.--21. " AEEVT ,External event effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 18.--19. " ACPC ,RC compare effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 16.--17. " ACPA ,RA compare effect on TIOA" "None,Set,Clear,Toggle" newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 13.--14. " WAVSEL ,Waveform selection (with/without automatic trigger on RC compare)" "UP,UPDOWN,UP_RC,UPDOWN_RC" newline bitfld.long 0x00 12. " ENETRG ,External event trigger enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " EEVT ,External event selection" "TIOB,XC0,XC1,XC2" newline bitfld.long 0x00 8.--9. " EEVTEDG ,External event edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " CPCDIS ,Counter clock disable with RC compare" "No,Yes" bitfld.long 0x00 6. " CPCSTOP ,Counter clock stopped with RC compare" "Not stopped,Stopped" bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" newline bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" else rgroup.long (0x0+0x04)++0x03 line.long 0x00 "CMR0,Channel 0 Mode Register" bitfld.long 0x00 30.--31. " BSWTRG ,Software trigger effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 28.--29. " BEEVT ,External event effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 26.--27. " BCPC ,RC compare effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 24.--25. " BCPB ,RB compare effect on TIOB" "None,Set,Clear,Toggle" newline bitfld.long 0x00 22.--23. " ASWTRG ,Software trigger effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 20.--21. " AEEVT ,External event effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 18.--19. " ACPC ,RC compare effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 16.--17. " ACPA ,RA compare effect on TIOA" "None,Set,Clear,Toggle" newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 13.--14. " WAVSEL ,Waveform selection (with/without automatic trigger on RC compare)" "UP,UPDOWN,UP_RC,UPDOWN_RC" newline bitfld.long 0x00 12. " ENETRG ,External event trigger enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " EEVT ,External event selection" "TIOB,XC0,XC1,XC2" newline bitfld.long 0x00 8.--9. " EEVTEDG ,External event edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " CPCDIS ,Counter clock disable with RC compare" "No,Yes" bitfld.long 0x00 6. " CPCSTOP ,Counter clock stopped with RC compare" "Not stopped,Stopped" bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" newline bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" endif if (((per.l(ad:0x40014000+0xE4))&0x01)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "SMMR0,Ch 0 Stepper Motor Mode Register" bitfld.long 0x00 1. " DOWN ,Down count" "Up,Down" bitfld.long 0x00 0. " GCEN ,Gray count enable" "Disabled,Enabled" else rgroup.long (0x0+0x08)++0x03 line.long 0x00 "SMMR0,Ch 0 Stepper Motor Mode Register" bitfld.long 0x00 1. " DOWN ,Down count" "Up,Down" bitfld.long 0x00 0. " GCEN ,Gray count enable" "Disabled,Enabled" endif sif !cpuis("ATSAM4S*")&&!cpuis("ATSAMA5D3*") rgroup.long (0x0+0x0C)++0x03 line.long 0x00 "RAB0,Channel 0 Register AB" endif rgroup.long (0x0+0x10)++0x03 line.long 0x00 "CV0,Channel 0 Counter Value Register" sif cpuis("ATSAM4S*") if ((((per.l(ad:0x40014000+0xE4))&0x01)==0x00)&&(((per.l(ad:0x40014000+0x8000))&0x04)==0x8000)) group.long (0x0+0x14)++0x07 line.long 0x00 "RA0,Channel 0 Register A" hexmask.long.word 0x00 0.--15. 1. " RA ,Register A value" line.long 0x04 "RB0,Channel 0 Register B" hexmask.long.word 0x04 0.--15. 1. " RB ,Register B value" else rgroup.long (0x0+0x14)++0x07 line.long 0x00 "RA0,Channel 0 Register A" hexmask.long.word 0x00 0.--15. 1. " RA ,Register A value" line.long 0x04 "RB0,Channel 0 Register B" hexmask.long.word 0x04 0.--15. 1. " RB ,Register B value" endif if (((per.l(ad:0x40014000+0xE4))&0x01)==0x00) group.long (0x0+0x1C)++0x03 line.long 0x00 "RC0,Channel 0 Register C" hexmask.long.word 0x00 0.--15. 1. " RC ,Register C value" else rgroup.long (0x0+0x1C)++0x03 line.long 0x00 "RC0,Channel 0 Register C" hexmask.long.word 0x00 0.--15. 1. " RC ,Register C value" endif else if ((((per.l(ad:0x40014000+0xE4))&0x01)==0x00)&&(((per.l(ad:0x40014000+0x8000))&0x04)==0x8000)) group.long (0x0+0x14)++0x07 line.long 0x00 "RA0,Channel 0 Register A" line.long 0x04 "RB0,Channel 0 Register B" else rgroup.long (0x0+0x14)++0x07 line.long 0x00 "RA0,Channel 0 Register A" line.long 0x04 "RB0,Channel 0 Register B" endif if (((per.l(ad:0x40014000+0xE4))&0x01)==0x00) group.long (0x0+0x1C)++0x03 line.long 0x00 "RC0,Channel 0 Register C" else rgroup.long (0x0+0x1C)++0x03 line.long 0x00 "RC0,Channel 0 Register C" endif endif newline hgroup.long (0x0+0x20)++0x03 hide.long 0x00 "SR0,Channel 0 Status Register" in newline group.long (0x0+0x2C)++0x03 line.long 0x00 "IMR0_SET/CLR,Channel 0 Interrupt Mask Set/Clear Register" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " ETRGS ,External trigger status interrupt" "Masked,Not masked" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " LDRBS ,RB loading status interrupt" "Masked,Not masked" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " LDRAS ,RA loading status interrupt" "Masked,Not masked" setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CPCS ,RC compare status interrupt" "Masked,Not masked" newline setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CPBS ,RB compare status interrupt" "Masked,Not masked" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CPAS ,RA compare status interrupt" "Masked,Not masked" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " LOVRS ,Load overrun status interrupt" "Masked,Not masked" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " COVFS ,Counter overflow status interrupt" "Masked,Not masked" sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") if (((per.l(ad:0x40014000+0xE4))&0x01)==0x00) group.long (0x0+0x30)++0x03 line.long 0x00 "EMR0,Channel 0 Extended Mode Register" bitfld.long 0x00 8. " NODIVCLK ,No divided clock" "Divided,Not divided" bitfld.long 0x00 4.--5. " TRIGSRCB ,Trigger source for input B" "External TIOB0,PWM0,?..." bitfld.long 0x00 0.--1. " TRIGSRCA ,Trigger source for input A" "External TIOA0,PWM0,?..." else rgroup.long (0x0+0x30)++0x03 line.long 0x00 "EMR0,Channel 0 Extended Mode Register" bitfld.long 0x00 8. " NODIVCLK ,No divided clock" "Divided,Not divided" bitfld.long 0x00 4.--5. " TRIGSRCB ,Trigger source for input B" "External TIOB0,PWM0,?..." bitfld.long 0x00 0.--1. " TRIGSRCA ,Trigger source for input A" "External TIOA0,PWM0,?..." endif endif tree.end tree "Channel 1" wgroup.long (0x40+0x00)++0x03 line.long 0x00 "CCR1,Channel 1 Control Register" bitfld.long 0x00 2. " SWTRG ,Software trigger command" "No effect,Trigger" bitfld.long 0x00 1. " CLKDIS ,Counter clock disable command" "No effect,Disable" bitfld.long 0x00 0. " CLKEN ,Counter clock enable command" "No effect,Enable" if ((((per.l(ad:0x40014000+0x40+0x04))&0x8000)==0x00)&&(((per.l(ad:0x40014000+0xE4))&0x01)==0x00)) group.long (0x40+0x04)++0x03 line.long 0x00 "CMR1,Channel 1 Mode Register" sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") bitfld.long 0x00 20.--22. " SBSMPLR ,Loading edge subsampling ratio" "One,Half,Fourth,Eighth,Sixteenth,?..." bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline else bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline endif newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 14. " CPCTRG ,RC compare trigger enable" "Disabled,Enabled" bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB external trigger selection" "TIOB,TIOA" newline bitfld.long 0x00 8.--9. " ETRGEDG ,External trigger edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " LDBDIS ,Counter clock disable with RB loading" "No,Yes" bitfld.long 0x00 6. " LDBSTOP ,Counter clock stopped with RB loading" "Not stopped,Stopped" newline bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" elif ((((per.l(ad:0x40014000+0x40+0x04))&0x8000)==0x00)&&(((per.l(ad:0x40014000+0xE4))&0x01)==0x01)) rgroup.long (0x40+0x04)++0x03 line.long 0x00 "CMR1,Channel 1 Mode Register" sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") bitfld.long 0x00 20.--22. " SBSMPLR ,Loading edge subsampling ratio" "One,Half,Fourth,Eighth,Sixteenth,?..." bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline else bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline endif newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 14. " CPCTRG ,RC compare trigger enable" "Disabled,Enabled" bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB external trigger selection" "TIOB,TIOA" newline bitfld.long 0x00 8.--9. " ETRGEDG ,External trigger edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " LDBDIS ,Counter clock disable with RB loading" "No,Yes" bitfld.long 0x00 6. " LDBSTOP ,Counter clock stopped with RB loading" "Not stopped,Stopped" newline bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" elif ((((per.l(ad:0x40014000+0x40+0x04))&0x8000)==0x8000)&&(((per.l(ad:0x40014000+0xE4))&0x01)==0x00)) group.long (0x40+0x04)++0x03 line.long 0x00 "CMR1,Channel 1 Mode Register" bitfld.long 0x00 30.--31. " BSWTRG ,Software trigger effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 28.--29. " BEEVT ,External event effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 26.--27. " BCPC ,RC compare effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 24.--25. " BCPB ,RB compare effect on TIOB" "None,Set,Clear,Toggle" newline bitfld.long 0x00 22.--23. " ASWTRG ,Software trigger effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 20.--21. " AEEVT ,External event effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 18.--19. " ACPC ,RC compare effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 16.--17. " ACPA ,RA compare effect on TIOA" "None,Set,Clear,Toggle" newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 13.--14. " WAVSEL ,Waveform selection (with/without automatic trigger on RC compare)" "UP,UPDOWN,UP_RC,UPDOWN_RC" newline bitfld.long 0x00 12. " ENETRG ,External event trigger enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " EEVT ,External event selection" "TIOB,XC0,XC1,XC2" newline bitfld.long 0x00 8.--9. " EEVTEDG ,External event edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " CPCDIS ,Counter clock disable with RC compare" "No,Yes" bitfld.long 0x00 6. " CPCSTOP ,Counter clock stopped with RC compare" "Not stopped,Stopped" bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" newline bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" else rgroup.long (0x40+0x04)++0x03 line.long 0x00 "CMR1,Channel 1 Mode Register" bitfld.long 0x00 30.--31. " BSWTRG ,Software trigger effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 28.--29. " BEEVT ,External event effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 26.--27. " BCPC ,RC compare effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 24.--25. " BCPB ,RB compare effect on TIOB" "None,Set,Clear,Toggle" newline bitfld.long 0x00 22.--23. " ASWTRG ,Software trigger effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 20.--21. " AEEVT ,External event effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 18.--19. " ACPC ,RC compare effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 16.--17. " ACPA ,RA compare effect on TIOA" "None,Set,Clear,Toggle" newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 13.--14. " WAVSEL ,Waveform selection (with/without automatic trigger on RC compare)" "UP,UPDOWN,UP_RC,UPDOWN_RC" newline bitfld.long 0x00 12. " ENETRG ,External event trigger enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " EEVT ,External event selection" "TIOB,XC0,XC1,XC2" newline bitfld.long 0x00 8.--9. " EEVTEDG ,External event edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " CPCDIS ,Counter clock disable with RC compare" "No,Yes" bitfld.long 0x00 6. " CPCSTOP ,Counter clock stopped with RC compare" "Not stopped,Stopped" bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" newline bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" endif if (((per.l(ad:0x40014000+0xE4))&0x01)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "SMMR1,Ch 1 Stepper Motor Mode Register" bitfld.long 0x00 1. " DOWN ,Down count" "Up,Down" bitfld.long 0x00 0. " GCEN ,Gray count enable" "Disabled,Enabled" else rgroup.long (0x40+0x08)++0x03 line.long 0x00 "SMMR1,Ch 1 Stepper Motor Mode Register" bitfld.long 0x00 1. " DOWN ,Down count" "Up,Down" bitfld.long 0x00 0. " GCEN ,Gray count enable" "Disabled,Enabled" endif sif !cpuis("ATSAM4S*")&&!cpuis("ATSAMA5D3*") rgroup.long (0x40+0x0C)++0x03 line.long 0x00 "RAB1,Channel 1 Register AB" endif rgroup.long (0x40+0x10)++0x03 line.long 0x00 "CV1,Channel 1 Counter Value Register" sif cpuis("ATSAM4S*") if ((((per.l(ad:0x40014000+0xE4))&0x01)==0x00)&&(((per.l(ad:0x40014000+0x8000))&0x04)==0x8000)) group.long (0x40+0x14)++0x07 line.long 0x00 "RA1,Channel 1 Register A" hexmask.long.word 0x00 0.--15. 1. " RA ,Register A value" line.long 0x04 "RB1,Channel 1 Register B" hexmask.long.word 0x04 0.--15. 1. " RB ,Register B value" else rgroup.long (0x40+0x14)++0x07 line.long 0x00 "RA1,Channel 1 Register A" hexmask.long.word 0x00 0.--15. 1. " RA ,Register A value" line.long 0x04 "RB1,Channel 1 Register B" hexmask.long.word 0x04 0.--15. 1. " RB ,Register B value" endif if (((per.l(ad:0x40014000+0xE4))&0x01)==0x00) group.long (0x40+0x1C)++0x03 line.long 0x00 "RC1,Channel 1 Register C" hexmask.long.word 0x00 0.--15. 1. " RC ,Register C value" else rgroup.long (0x40+0x1C)++0x03 line.long 0x00 "RC1,Channel 1 Register C" hexmask.long.word 0x00 0.--15. 1. " RC ,Register C value" endif else if ((((per.l(ad:0x40014000+0xE4))&0x01)==0x00)&&(((per.l(ad:0x40014000+0x8000))&0x04)==0x8000)) group.long (0x40+0x14)++0x07 line.long 0x00 "RA1,Channel 1 Register A" line.long 0x04 "RB1,Channel 1 Register B" else rgroup.long (0x40+0x14)++0x07 line.long 0x00 "RA1,Channel 1 Register A" line.long 0x04 "RB1,Channel 1 Register B" endif if (((per.l(ad:0x40014000+0xE4))&0x01)==0x00) group.long (0x40+0x1C)++0x03 line.long 0x00 "RC1,Channel 1 Register C" else rgroup.long (0x40+0x1C)++0x03 line.long 0x00 "RC1,Channel 1 Register C" endif endif newline hgroup.long (0x40+0x20)++0x03 hide.long 0x00 "SR1,Channel 1 Status Register" in newline group.long (0x40+0x2C)++0x03 line.long 0x00 "IMR1_SET/CLR,Channel 1 Interrupt Mask Set/Clear Register" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " ETRGS ,External trigger status interrupt" "Masked,Not masked" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " LDRBS ,RB loading status interrupt" "Masked,Not masked" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " LDRAS ,RA loading status interrupt" "Masked,Not masked" setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CPCS ,RC compare status interrupt" "Masked,Not masked" newline setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CPBS ,RB compare status interrupt" "Masked,Not masked" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CPAS ,RA compare status interrupt" "Masked,Not masked" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " LOVRS ,Load overrun status interrupt" "Masked,Not masked" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " COVFS ,Counter overflow status interrupt" "Masked,Not masked" sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") if (((per.l(ad:0x40014000+0xE4))&0x01)==0x00) group.long (0x40+0x30)++0x03 line.long 0x00 "EMR1,Channel 1 Extended Mode Register" bitfld.long 0x00 8. " NODIVCLK ,No divided clock" "Divided,Not divided" bitfld.long 0x00 4.--5. " TRIGSRCB ,Trigger source for input B" "External TIOB1,PWM1,?..." bitfld.long 0x00 0.--1. " TRIGSRCA ,Trigger source for input A" "External TIOA1,PWM1,?..." else rgroup.long (0x40+0x30)++0x03 line.long 0x00 "EMR1,Channel 1 Extended Mode Register" bitfld.long 0x00 8. " NODIVCLK ,No divided clock" "Divided,Not divided" bitfld.long 0x00 4.--5. " TRIGSRCB ,Trigger source for input B" "External TIOB1,PWM1,?..." bitfld.long 0x00 0.--1. " TRIGSRCA ,Trigger source for input A" "External TIOA1,PWM1,?..." endif endif tree.end tree "Channel 2" wgroup.long (0x80+0x00)++0x03 line.long 0x00 "CCR2,Channel 2 Control Register" bitfld.long 0x00 2. " SWTRG ,Software trigger command" "No effect,Trigger" bitfld.long 0x00 1. " CLKDIS ,Counter clock disable command" "No effect,Disable" bitfld.long 0x00 0. " CLKEN ,Counter clock enable command" "No effect,Enable" if ((((per.l(ad:0x40014000+0x80+0x04))&0x8000)==0x00)&&(((per.l(ad:0x40014000+0xE4))&0x01)==0x00)) group.long (0x80+0x04)++0x03 line.long 0x00 "CMR2,Channel 2 Mode Register" sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") bitfld.long 0x00 20.--22. " SBSMPLR ,Loading edge subsampling ratio" "One,Half,Fourth,Eighth,Sixteenth,?..." bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline else bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline endif newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 14. " CPCTRG ,RC compare trigger enable" "Disabled,Enabled" bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB external trigger selection" "TIOB,TIOA" newline bitfld.long 0x00 8.--9. " ETRGEDG ,External trigger edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " LDBDIS ,Counter clock disable with RB loading" "No,Yes" bitfld.long 0x00 6. " LDBSTOP ,Counter clock stopped with RB loading" "Not stopped,Stopped" newline bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" elif ((((per.l(ad:0x40014000+0x80+0x04))&0x8000)==0x00)&&(((per.l(ad:0x40014000+0xE4))&0x01)==0x01)) rgroup.long (0x80+0x04)++0x03 line.long 0x00 "CMR2,Channel 2 Mode Register" sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") bitfld.long 0x00 20.--22. " SBSMPLR ,Loading edge subsampling ratio" "One,Half,Fourth,Eighth,Sixteenth,?..." bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline else bitfld.long 0x00 18.--19. " LDRB ,RB loading edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 16.--17. " LDRA ,RA loading edge selection" "None,Rising edge,Falling edge,Each edge" newline endif newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 14. " CPCTRG ,RC compare trigger enable" "Disabled,Enabled" bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB external trigger selection" "TIOB,TIOA" newline bitfld.long 0x00 8.--9. " ETRGEDG ,External trigger edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " LDBDIS ,Counter clock disable with RB loading" "No,Yes" bitfld.long 0x00 6. " LDBSTOP ,Counter clock stopped with RB loading" "Not stopped,Stopped" newline bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" elif ((((per.l(ad:0x40014000+0x80+0x04))&0x8000)==0x8000)&&(((per.l(ad:0x40014000+0xE4))&0x01)==0x00)) group.long (0x80+0x04)++0x03 line.long 0x00 "CMR2,Channel 2 Mode Register" bitfld.long 0x00 30.--31. " BSWTRG ,Software trigger effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 28.--29. " BEEVT ,External event effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 26.--27. " BCPC ,RC compare effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 24.--25. " BCPB ,RB compare effect on TIOB" "None,Set,Clear,Toggle" newline bitfld.long 0x00 22.--23. " ASWTRG ,Software trigger effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 20.--21. " AEEVT ,External event effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 18.--19. " ACPC ,RC compare effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 16.--17. " ACPA ,RA compare effect on TIOA" "None,Set,Clear,Toggle" newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 13.--14. " WAVSEL ,Waveform selection (with/without automatic trigger on RC compare)" "UP,UPDOWN,UP_RC,UPDOWN_RC" newline bitfld.long 0x00 12. " ENETRG ,External event trigger enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " EEVT ,External event selection" "TIOB,XC0,XC1,XC2" newline bitfld.long 0x00 8.--9. " EEVTEDG ,External event edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " CPCDIS ,Counter clock disable with RC compare" "No,Yes" bitfld.long 0x00 6. " CPCSTOP ,Counter clock stopped with RC compare" "Not stopped,Stopped" bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" newline bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" else rgroup.long (0x80+0x04)++0x03 line.long 0x00 "CMR2,Channel 2 Mode Register" bitfld.long 0x00 30.--31. " BSWTRG ,Software trigger effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 28.--29. " BEEVT ,External event effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 26.--27. " BCPC ,RC compare effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 24.--25. " BCPB ,RB compare effect on TIOB" "None,Set,Clear,Toggle" newline bitfld.long 0x00 22.--23. " ASWTRG ,Software trigger effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 20.--21. " AEEVT ,External event effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 18.--19. " ACPC ,RC compare effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 16.--17. " ACPA ,RA compare effect on TIOA" "None,Set,Clear,Toggle" newline bitfld.long 0x00 15. " WAVE ,Waveform mode" "Disabled,Enabled" bitfld.long 0x00 13.--14. " WAVSEL ,Waveform selection (with/without automatic trigger on RC compare)" "UP,UPDOWN,UP_RC,UPDOWN_RC" newline bitfld.long 0x00 12. " ENETRG ,External event trigger enable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " EEVT ,External event selection" "TIOB,XC0,XC1,XC2" newline bitfld.long 0x00 8.--9. " EEVTEDG ,External event edge selection" "None,Rising edge,Falling edge,Each edge" bitfld.long 0x00 7. " CPCDIS ,Counter clock disable with RC compare" "No,Yes" bitfld.long 0x00 6. " CPCSTOP ,Counter clock stopped with RC compare" "Not stopped,Stopped" bitfld.long 0x00 4.--5. " BURST ,Burst signal selection" "Not gated,XC0,XC1,XC2" newline bitfld.long 0x00 3. " CLKI ,Clock invert" "Rising edge,Falling edge" bitfld.long 0x00 0.--2. " TCCLKS ,Clock selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" endif if (((per.l(ad:0x40014000+0xE4))&0x01)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "SMMR2,Ch 2 Stepper Motor Mode Register" bitfld.long 0x00 1. " DOWN ,Down count" "Up,Down" bitfld.long 0x00 0. " GCEN ,Gray count enable" "Disabled,Enabled" else rgroup.long (0x80+0x08)++0x03 line.long 0x00 "SMMR2,Ch 2 Stepper Motor Mode Register" bitfld.long 0x00 1. " DOWN ,Down count" "Up,Down" bitfld.long 0x00 0. " GCEN ,Gray count enable" "Disabled,Enabled" endif sif !cpuis("ATSAM4S*")&&!cpuis("ATSAMA5D3*") rgroup.long (0x80+0x0C)++0x03 line.long 0x00 "RAB2,Channel 2 Register AB" endif rgroup.long (0x80+0x10)++0x03 line.long 0x00 "CV2,Channel 2 Counter Value Register" sif cpuis("ATSAM4S*") if ((((per.l(ad:0x40014000+0xE4))&0x01)==0x00)&&(((per.l(ad:0x40014000+0x8000))&0x04)==0x8000)) group.long (0x80+0x14)++0x07 line.long 0x00 "RA2,Channel 2 Register A" hexmask.long.word 0x00 0.--15. 1. " RA ,Register A value" line.long 0x04 "RB2,Channel 2 Register B" hexmask.long.word 0x04 0.--15. 1. " RB ,Register B value" else rgroup.long (0x80+0x14)++0x07 line.long 0x00 "RA2,Channel 2 Register A" hexmask.long.word 0x00 0.--15. 1. " RA ,Register A value" line.long 0x04 "RB2,Channel 2 Register B" hexmask.long.word 0x04 0.--15. 1. " RB ,Register B value" endif if (((per.l(ad:0x40014000+0xE4))&0x01)==0x00) group.long (0x80+0x1C)++0x03 line.long 0x00 "RC2,Channel 2 Register C" hexmask.long.word 0x00 0.--15. 1. " RC ,Register C value" else rgroup.long (0x80+0x1C)++0x03 line.long 0x00 "RC2,Channel 2 Register C" hexmask.long.word 0x00 0.--15. 1. " RC ,Register C value" endif else if ((((per.l(ad:0x40014000+0xE4))&0x01)==0x00)&&(((per.l(ad:0x40014000+0x8000))&0x04)==0x8000)) group.long (0x80+0x14)++0x07 line.long 0x00 "RA2,Channel 2 Register A" line.long 0x04 "RB2,Channel 2 Register B" else rgroup.long (0x80+0x14)++0x07 line.long 0x00 "RA2,Channel 2 Register A" line.long 0x04 "RB2,Channel 2 Register B" endif if (((per.l(ad:0x40014000+0xE4))&0x01)==0x00) group.long (0x80+0x1C)++0x03 line.long 0x00 "RC2,Channel 2 Register C" else rgroup.long (0x80+0x1C)++0x03 line.long 0x00 "RC2,Channel 2 Register C" endif endif newline hgroup.long (0x80+0x20)++0x03 hide.long 0x00 "SR2,Channel 2 Status Register" in newline group.long (0x80+0x2C)++0x03 line.long 0x00 "IMR2_SET/CLR,Channel 2 Interrupt Mask Set/Clear Register" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " ETRGS ,External trigger status interrupt" "Masked,Not masked" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " LDRBS ,RB loading status interrupt" "Masked,Not masked" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " LDRAS ,RA loading status interrupt" "Masked,Not masked" setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CPCS ,RC compare status interrupt" "Masked,Not masked" newline setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CPBS ,RB compare status interrupt" "Masked,Not masked" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CPAS ,RA compare status interrupt" "Masked,Not masked" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " LOVRS ,Load overrun status interrupt" "Masked,Not masked" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " COVFS ,Counter overflow status interrupt" "Masked,Not masked" sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") if (((per.l(ad:0x40014000+0xE4))&0x01)==0x00) group.long (0x80+0x30)++0x03 line.long 0x00 "EMR2,Channel 2 Extended Mode Register" bitfld.long 0x00 8. " NODIVCLK ,No divided clock" "Divided,Not divided" bitfld.long 0x00 4.--5. " TRIGSRCB ,Trigger source for input B" "External TIOB2,PWM2,?..." bitfld.long 0x00 0.--1. " TRIGSRCA ,Trigger source for input A" "External TIOA2,PWM2,?..." else rgroup.long (0x80+0x30)++0x03 line.long 0x00 "EMR2,Channel 2 Extended Mode Register" bitfld.long 0x00 8. " NODIVCLK ,No divided clock" "Divided,Not divided" bitfld.long 0x00 4.--5. " TRIGSRCB ,Trigger source for input B" "External TIOB2,PWM2,?..." bitfld.long 0x00 0.--1. " TRIGSRCA ,Trigger source for input A" "External TIOA2,PWM2,?..." endif endif tree.end newline wgroup.long 0xC0++0x03 line.long 0x00 "BCR,Block Control Register" bitfld.long 0x00 0. " SYNC ,Synchro command" "No effect,Assert" sif cpuis("ATSAMA5D4*")||cpuis("ATSAM4S*")||cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*")||cpuis("ATSAMA5D2?") if ((per.l(ad:0x40014000+0xE4)&0x01)==0x00) group.long 0xC4++0x03 line.long 0x00 "BMR,Block Mode Register" sif cpuis("ATSAMA5D2?")||cpuis("ATSAMS7*") bitfld.long 0x00 26.--29. " MAXCMP ,Maximum consecutive missing pulses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--25. " MAXFILT ,Maximum filter" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 18. " AUTOC ,Auto-correction of missing pulses" "Disabled,Enabled" bitfld.long 0x00 17. " IDXPHB ,Index pin is PHB pin" "TIOA1,TIOB0" newline else bitfld.long 0x00 20.--25. " MAXFILT ,Maximum filter" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 17. " IDXPHB ,Index pin is PHB pin" "TIOA1,TIOB0" newline endif bitfld.long 0x00 16. " SWAP ,Swap PHA and PHB" "Not Swapped,Swapped" bitfld.long 0x00 15. " INVIDX ,Inverted index" "Not inverted,Inverted" bitfld.long 0x00 14. " INVB ,Inverted PHB" "Not inverted,Inverted" bitfld.long 0x00 13. " INVA ,Inverted PHA" "Not inverted,Inverted" newline bitfld.long 0x00 12. " EDGPHA ,Edge on PHA count mode" "PHA only,PHA/PHB" bitfld.long 0x00 11. " QDTRANS ,Quadrature decoding transparent" "Active,Inactive" bitfld.long 0x00 10. " SPEEDEN ,Speed enabled" "Disabled,Enabled" bitfld.long 0x00 9. " POSEN ,Position enabled" "Disabled,Enabled" newline bitfld.long 0x00 8. " QDEN ,Quadrature decoder enabled" "Disabled,Enabled" bitfld.long 0x00 4.--5. " TC2XC2S ,External clock signal 2 selection" "TCLK2,,TIOA0,TIOA1" bitfld.long 0x00 2.--3. " TC1XC1S ,External clock signal 1 selection" "TCLK1,,TIOA0,TIOA2" bitfld.long 0x00 0.--1. " TC0XC0S ,External clock signal 0 selection" "TCLK0,,TIOA1,TIOA2" else rgroup.long 0xC4++0x03 line.long 0x00 "BMR,Block Mode Register" sif cpuis("ATSAMA5D2?")||cpuis("ATSAMS7*") bitfld.long 0x00 26.--29. " MAXCMP ,Maximum consecutive missing pulses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--25. " MAXFILT ,Maximum filter" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 18. " AUTOC ,Auto-correction of missing pulses" "Disabled,Enabled" bitfld.long 0x00 17. " IDXPHB ,Index pin is PHB pin" "TIOA1,TIOB0" newline else bitfld.long 0x00 20.--25. " MAXFILT ,Maximum filter" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 17. " IDXPHB ,Index pin is PHB pin" "TIOA1,TIOB0" newline endif bitfld.long 0x00 16. " SWAP ,Swap PHA and PHB" "Not Swapped,Swapped" bitfld.long 0x00 15. " INVIDX ,Inverted index" "Not inverted,Inverted" bitfld.long 0x00 14. " INVB ,Inverted PHB" "Not inverted,Inverted" bitfld.long 0x00 13. " INVA ,Inverted PHA" "Not inverted,Inverted" newline bitfld.long 0x00 12. " EDGPHA ,Edge on PHA count mode" "PHA only,PHA/PHB" bitfld.long 0x00 11. " QDTRANS ,Quadrature decoding transparent" "Active,Inactive" bitfld.long 0x00 10. " SPEEDEN ,Speed enabled" "Disabled,Enabled" bitfld.long 0x00 9. " POSEN ,Position enabled" "Disabled,Enabled" newline bitfld.long 0x00 8. " QDEN ,Quadrature decoder enabled" "Disabled,Enabled" bitfld.long 0x00 4.--5. " TC2XC2S ,External clock signal 2 selection" "TCLK2,,TIOA0,TIOA1" bitfld.long 0x00 2.--3. " TC1XC1S ,External clock signal 1 selection" "TCLK1,,TIOA0,TIOA2" bitfld.long 0x00 0.--1. " TC0XC0S ,External clock signal 0 selection" "TCLK0,,TIOA1,TIOA2" endif else if (((per.l(ad:0x40014000+0xE4))&0x01)==0x00) group.long 0xC4++0x03 line.long 0x00 "BMR,Block Mode Register" bitfld.long 0x00 4.--5. " TC2XC2S ,External clock signal 2 selection" "TCLK2,,TIOA0,TIOA1" bitfld.long 0x00 2.--3. " TC1XC1S ,External clock signal 1 selection" "TCLK1,,TIOA0,TIOA2" bitfld.long 0x00 0.--1. " TC0XC0S ,External clock signal 0 selection" "TCLK0,,TIOA1,TIOA2" else rgroup.long 0xC4++0x03 line.long 0x00 "BMR,Block Mode Register" bitfld.long 0x00 4.--5. " TC2XC2S ,External clock signal 2 selection" "TCLK2,,TIOA0,TIOA1" bitfld.long 0x00 2.--3. " TC1XC1S ,External clock signal 1 selection" "TCLK1,,TIOA0,TIOA2" bitfld.long 0x00 0.--1. " TC0XC0S ,External clock signal 0 selection" "TCLK0,,TIOA1,TIOA2" endif endif sif cpuis("ATSAMA5D4*")||cpuis("ATSAM4N*")||cpuis("ATSAM4S*")||cpuis("ATSAMV7*")||cpuis("ATSAME70*")||cpuis("ATSAMS7*")||cpuis("ATSAMA5D2?") group.long 0xD0++0x03 line.long 0x00 "QIMR_SET/CLR,QDEC Interrupt Mask Register" sif cpuis("ATSAMS7*") setclrfld.long 0x00 3. -0x08 3. -0x04 3. " MPE ,Consecutive missing pulse error" "Masked,Unmasked" newline endif setclrfld.long 0x00 2. -0x08 2. -0x04 2. " QERR ,Quadrature error" "Masked,Unmasked" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " DIRCHG ,Direction change" "Masked,Unmasked" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " IDX ,Index" "Masked,Unmasked" sif !cpuis("ATSAMS7*") hgroup.long 0xD4++0x03 hide.long 0x00 "QISR,QDEC Interrupt Status Register" in else rgroup.long 0xD4++0x03 line.long 0x00 "QISR,QDEC Interrupt Status Register" bitfld.long 0x00 8. " DIR ,Direction" "0,1" bitfld.long 0x00 3. " MPE ,Consecutive missing pulse error" "Not occurred,Occurred" bitfld.long 0x00 2. " QERR ,Quadrature error" "Not occurred,Occurred" bitfld.long 0x00 1. " DIRCHG ,Direction change" "Not occurred,Occurred" bitfld.long 0x00 0. " IDX ,Index input change" "Not occurred,Occurred" endif if (((per.l(ad:0x40014000+0xE4))&0x01)==0x00) group.long 0xD8++0x03 line.long 0x00 "FMR,Fault Mode Register" bitfld.long 0x00 1. " ENCF1 ,Enable compare fault channel 1" "Disabled,Enabled" bitfld.long 0x00 0. " ENCF0 ,Enable compare fault channel 0" "Disabled,Enabled" else rgroup.long 0xD8++0x03 line.long 0x00 "FMR,Fault Mode Register" bitfld.long 0x00 1. " ENCF1 ,Enable compare fault channel 1" "Disabled,Enabled" bitfld.long 0x00 0. " ENCF0 ,Enable compare fault channel 0" "Disabled,Enabled" endif elif cpuis("ATSAMA5D3*") if (((per.l(ad:0x40014000+0xE4))&0x01)==0x00) group.long 0xD8++0x03 line.long 0x00 "FMR,Fault Mode Register" bitfld.long 0x00 1. " ENCF1 ,Enable compare fault channel 1" "Disabled,Enabled" bitfld.long 0x00 0. " ENCF0 ,Enable compare fault channel 0" "Disabled,Enabled" else rgroup.long 0xD8++0x03 line.long 0x00 "FMR,Fault Mode Register" bitfld.long 0x00 1. " ENCF1 ,Enable compare fault channel 1" "Disabled,Enabled" bitfld.long 0x00 0. " ENCF0 ,Enable compare fault channel 0" "Disabled,Enabled" endif endif group.long 0xE4++0x03 line.long 0x00 "WPMR,Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write protect key" bitfld.long 0x00 0. " WPEN ,Write protect enable" "Disabled,Enabled" width 0x0B tree.end tree.end tree "HSMCI (High Speed Multimedia Card Interface)" base ad:0x40000000 width 13. wgroup.long 0x00++0x03 line.long 0x00 "CR,MCI Control Register" bitfld.long 0x00 7. " SWRST ,Software reset" "No effect,Reset" bitfld.long 0x00 3. " PWSDIS ,Power save mode disable" "No effect,Yes" bitfld.long 0x00 2. " PWSEN ,Power save mode enable" "No effect,Enable" bitfld.long 0x00 1. " MCIDIS ,Multi-media interface disable" "No effect,Disable" newline bitfld.long 0x00 0. " MCIEN ,Multi-media interface enable" "No effect,Enable" if ((per.l(ad:0x40000000+0xE4)&0x01)==0x00) group.long 0x04++0x0B line.long 0x00 "MR,MCI Mode Register" sif cpuis("ATSAM4S*") bitfld.long 0x00 15. " PDCMODE ,PDC-oriented mode" "Disabled,Enabled" newline else bitfld.long 0x00 16. " CLKODD ,Clock divider is odd" "Even,Odd" newline endif bitfld.long 0x00 14. " PADV ,Padding value" "0x00,0xFF" bitfld.long 0x00 13. " FBYTE ,Force byte transfer" "Disabled,Enabled" bitfld.long 0x00 12. " WRPROOF ,Write proof enable" "Disabled,Enabled" bitfld.long 0x00 11. " RDPROOF ,Read proof enable" "Disabled,Enabled" newline bitfld.long 0x00 8.--10. " PWSDIV ,Power saving divider" "Clock/2,Clock/3,Clock/5,Clock/9,Clock/17,Clock/33,Clock/65,Clock/129" hexmask.long.byte 0x00 0.--7. 1. " CLKDIV ,Clock divider" line.long 0x04 "DTOR,MCI Data Timeout Register" bitfld.long 0x04 4.--6. " DTOMUL ,Data timeout multiplier" "1,16,128,256,1024,4096,65536,1048576" bitfld.long 0x04 0.--3. " DTOCYC ,Data timeout cycle number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "SDCR,MCI SDCard Register" bitfld.long 0x08 6.--7. " SDCBUS ,SDCard bus width" "1-bit,,4-bit,8-bit" sif cpuis("ATSAMA5D4*") bitfld.long 0x08 0.--1. " SDCSEL ,SDCard slot" "A,B,?..." else bitfld.long 0x08 0.--1. " SDCSEL ,SDCard slot" "A,?..." endif else rgroup.long 0x04++0x0B line.long 0x00 "MR,MCI Mode Register" sif cpuis("ATSAM4S*") bitfld.long 0x00 15. " PDCMODE ,PDC-oriented mode" "Disabled,Enabled" newline else bitfld.long 0x00 16. " CLKODD ,Clock divider is odd" "Even,Odd" newline endif bitfld.long 0x00 14. " PADV ,Padding value" "0x00,0xFF" bitfld.long 0x00 13. " FBYTE ,Force byte transfer" "Disabled,Enabled" bitfld.long 0x00 12. " WRPROOF ,Write proof enable" "Disabled,Enabled" bitfld.long 0x00 11. " RDPROOF ,Read proof enable" "Disabled,Enabled" newline bitfld.long 0x00 8.--10. " PWSDIV ,Power saving divider" "Clock/2,Clock/3,Clock/5,Clock/9,Clock/17,Clock/33,Clock/65,Clock/129" hexmask.long.byte 0x00 0.--7. 1. " CLKDIV ,Clock divider" line.long 0x04 "DTOR,MCI Data Timeout Register" bitfld.long 0x04 4.--6. " DTOMUL ,Data timeout multiplier" "1,16,128,256,1024,4096,65536,1048576" bitfld.long 0x04 0.--3. " DTOCYC ,Data timeout cycle number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "SDCR,MCI SDCard Register" bitfld.long 0x08 6.--7. " SDCBUS ,SDCard bus width" "1-bit,,4-bit,8-bit" sif cpuis("ATSAMA5D4*") bitfld.long 0x08 0.--1. " SDCSEL ,SDCard slot" "A,B,?..." else bitfld.long 0x08 0.--1. " SDCSEL ,SDCard slot" "A,?..." endif endif group.long 0x10++0x03 line.long 0x00 "ARGR,MCI Argument Register" wgroup.long 0x14++0x03 line.long 0x00 "CMDR,MCI Command Register" bitfld.long 0x00 27. " BOOT_ACK ,Boot operation acknowledge" "Not expected,Expected" bitfld.long 0x00 26. " ATACS ,ATA with command completion signal" "Normal,With completion" bitfld.long 0x00 24.--25. " IOSPCMD ,SDIO special command" "Not Special,SDIO suspend,SDIO resume,?..." bitfld.long 0x00 19.--21. " TRTYP ,Transfer type" "Single block,Multiple block,Stream,,SDIO byte,SDIO block,?..." newline bitfld.long 0x00 18. " TRDIR ,Transfer direction" "Write,Read" bitfld.long 0x00 16.--17. " TRCMD ,Transfer command" "No transfer,Start,Stop,?..." bitfld.long 0x00 12. " MAXLAT ,Max latency for command to response" "5-cycle,64-cycle" bitfld.long 0x00 11. " OPDCMD ,Open drain command" "Push pull,Open drain" newline bitfld.long 0x00 8.--10. " SPCMD ,Special command" "STD,INIT,SYNC,CE-ATA,IT_CMD,INT_RESP,BOR,EBO" bitfld.long 0x00 6.--7. " RSPTYP ,Response type" "No response,48-bit,136-bit,R1b" bitfld.long 0x00 0.--5. " CMDNB ,Command number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x18++0x03 line.long 0x00 "BLKR,Block Register" hexmask.long.word 0x00 16.--31. 1. " BLKLEN ,Data block length" hexmask.long.word 0x00 0.--15. 1. " BCNT ,MMC/SDIO block count - SDIO byte count" if ((per.l(ad:0x40000000+0xE4)&0x01)==0x00) group.long 0x1C++0x03 line.long 0x00 "CSTOR,HSMCI Completion Signal Timeout Register" bitfld.long 0x00 4.--6. " CSTOMUL ,Completion signal timeout multiplier" "1,16,128,256,1024,4096,65536,1048576" bitfld.long 0x00 0.--3. " CSTOCYC ,Completion signal timeout cycle number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else rgroup.long 0x1C++0x03 line.long 0x00 "CSTOR,HSMCI Completion Signal Timeout Register" bitfld.long 0x00 4.--6. " CSTOMUL ,Completion signal timeout multiplier" "1,16,128,256,1024,4096,65536,1048576" bitfld.long 0x00 0.--3. " CSTOCYC ,Completion signal timeout cycle number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif newline hgroup.long 0x20++0x03 hide.long 0x00 "RSPR0,HSMCI Response Register 0" in hgroup.long 0x24++0x03 hide.long 0x00 "RSPR1,HSMCI Response Register 1" in hgroup.long 0x28++0x03 hide.long 0x00 "RSPR2,HSMCI Response Register 2" in hgroup.long 0x2C++0x03 hide.long 0x00 "RSPR3,HSMCI Response Register 3" in hgroup.long 0x30++0x03 hide.long 0x00 "RDR,HSMCI Receive Data Register" in newline wgroup.long 0x34++0x03 line.long 0x00 "TDR,HSMCI Transmit Data Register" newline hgroup.long 0x40++0x03 hide.long 0x00 "SR,HSMCI Status Register" in newline group.long 0x4C++0x03 line.long 0x00 "IMR_SET/CLR,MCI Interrupt Mask Set/Clear Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " UNRE ,UnderRun interrupt mask" "Masked,Not masked" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " OVRE ,Overrun interrupt mask" "Masked,Not masked" setclrfld.long 0x00 29. -0x08 29. -0x04 29. " ACKRCVE ,Boot operation acknowledge error interrupt mask" "Masked,Not masked" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " ACKRCV ,Boot operation acknowledge received interrupt mask" "Masked,Not masked" newline setclrfld.long 0x00 27. -0x08 27. -0x04 27. " XFRDONE ,Transfer done interrupt mask" "Masked,Not masked" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " FIFOEMPTY ,FIFO empty interrupt mask" "Masked,Not masked" newline sif cpuis("ATSAMA5D31")||cpuis("ATSAMA5D34")||cpuis("ATSAMA5D35")||cpuis("ATSAMA5D36") setclrfld.long 0x00 25. -0x08 25. -0x04 25. " DMADONE ,DMA transfer completed interrupt mask" "Masked,Not masked" newline endif sif !cpuis("ATSAM4S*") setclrfld.long 0x00 24. -0x08 24. -0x04 24. " BLKOVRE ,DMA block overrun error interrupt mask" "Masked,Not masked" newline endif setclrfld.long 0x00 23. -0x08 23. -0x04 23. " CSTOE ,Completion signal time-out error interrupt mask" "Masked,Not masked" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " DTOE ,Data time-out error interrupt mask" "Masked,Not masked" setclrfld.long 0x00 21. -0x08 21. -0x04 21. " DCRCE ,Data CRC error interrupt mask" "Masked,Not masked" setclrfld.long 0x00 20. -0x08 20. -0x04 20. " RTOE ,Response time-out error interrupt mask" "Masked,Not masked" newline setclrfld.long 0x00 19. -0x08 19. -0x04 19. " RENDE ,Response end bit error interrupt mask" "Masked,Not masked" setclrfld.long 0x00 18. -0x08 18. -0x04 18. " RCRCE ,Response CRC error interrupt mask" "Masked,Not masked" setclrfld.long 0x00 17. -0x08 17. -0x04 17. " RDIRE ,Response direction error interrupt mask" "Masked,Not masked" setclrfld.long 0x00 16. -0x08 16. -0x04 16. " RINDE ,Response index error interrupt mask" "Masked,Not masked" newline sif (cpuis("ATSAM4S*")||cpuis("ATSAM4E*")) setclrfld.long 0x00 15. -0x08 15. -0x04 15. " TXBUFE ,Transmit buffer empty interrupt mask" "Masked,Not masked" setclrfld.long 0x00 14. -0x08 14. -0x04 14. " RXBUFF ,Receive buffer full interrupt mask" "Masked,Not masked" newline endif setclrfld.long 0x00 13. -0x08 13. -0x04 13. " CSRCV ,Completion signal received interrupt mask" "Masked,Not masked" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " SDIOWAIT ,SDIO read wait operation status interrupt mask" "Masked,Not masked" newline sif cpuis("ATSAMA5D4*") setclrfld.long 0x00 9. -0x08 9. -0x04 9. " SDIOIRQB ,SDIO interrupt for slot B interrupt mask" "Masked,Not masked" newline endif sif cpuis("ATSAM4S*") setclrfld.long 0x00 8. -0x08 8. -0x04 8. " SDIOIRQA ,SDIO interrupt for slot A interrupt mask" "Masked,Not masked" setclrfld.long 0x00 7. -0x08 7. -0x04 7. " ENDTX ,End of transmit buffer interrupt mask" "Masked,Not masked" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " ENDRX ,End of receive buffer interrupt mask" "Masked,Not masked" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " NOTBUSY ,Data not busy interrupt mask" "Masked,Not masked" newline else setclrfld.long 0x00 8. -0x08 8. -0x04 8. " SDIOIRQA ,SDIO interrupt for slot A interrupt mask" "Masked,Not masked" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " NOTBUSY ,Data not busy interrupt mask" "Masked,Not masked" newline endif setclrfld.long 0x00 4. -0x08 4. -0x04 4. " DTIP ,Data transfer in progress interrupt mask" "Masked,Not masked" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " BLKE ,Data block ended interrupt mask" "Masked,Not masked" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXRDY ,Transmit ready interrupt mask" "Masked,Not masked" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXRDY ,Receiver ready interrupt mask" "Masked,Not masked" newline setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CMDRDY ,Command ready interrupt mask" "Masked,Not masked" newline if ((per.l(ad:0x40000000+0xE4)&0x01)==0x00) sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS70*")||cpuis("ATSAME70*") group.long 0x50++0x03 line.long 0x00 "DMA,HSMCI DMA Configuration Register" bitfld.long 0x00 8. " DMAEN ,DMA hardware handshaking enable" "Disabled,Enabled" bitfld.long 0x00 4.--6. " CHKSIZE ,DMA channel read and write chunk size" "1,2,4,8,16,?..." elif cpuis("ATSAMA5D3*") group.long 0x50++0x03 line.long 0x00 "DMA,HSMCI DMA Configuration Register" bitfld.long 0x00 12. " ROPT ,Read optimization with padding" "Disabled,Enabled" bitfld.long 0x00 8. " DMAEN ,DMA hardware handshaking enable" "Disabled,Enabled" newline bitfld.long 0x00 4.--6. " CHKSIZE ,DMA channel read and write chunk size" "1,4,8,16,32,?..." bitfld.long 0x00 0.--1. " OFFSET ,DMA write buffer offset" "0,1,2,3" endif group.long 0x54++0x03 line.long 0x00 "CFG,HSMCI Configuration Register" bitfld.long 0x00 12. " LSYNC ,Synchronize on the last block" "Disabled,Enabled" bitfld.long 0x00 8. " HSMODE ,High speed mode" "Normal,High" newline bitfld.long 0x00 4. " FERRCTRL ,Flow error flag reset control mode" "Write/read command,Read status" bitfld.long 0x00 0. " FIFOMODE ,HSMCI internal FIFO control mode" "Sufficient level,One data written" else sif cpuis("ATSAMA5D4*")||cpuis("ATSAMV7*")||cpuis("ATSAMS70*")||cpuis("ATSAME70*") rgroup.long 0x50++0x03 line.long 0x00 "DMA,HSMCI DMA Configuration Register" bitfld.long 0x00 8. " DMAEN ,DMA hardware handshaking enable" "Disabled,Enabled" bitfld.long 0x00 4.--6. " CHKSIZE ,DMA channel read and write chunk size" "1,2,4,8,16,?..." elif cpuis("ATSAMA5D3*") rgroup.long 0x50++0x03 line.long 0x00 "DMA,HSMCI DMA Configuration Register" bitfld.long 0x00 12. " ROPT ,Read optimization with padding" "Disabled,Enabled" bitfld.long 0x00 8. " DMAEN ,DMA hardware handshaking enable" "Disabled,Enabled" newline bitfld.long 0x00 4.--6. " CHKSIZE ,DMA channel read and write chunk size" "1,4,8,16,32,?..." bitfld.long 0x00 0.--1. " OFFSET ,DMA write buffer offset" "0,1,2,3" endif rgroup.long 0x54++0x03 line.long 0x00 "CFG,HSMCI Configuration Register" bitfld.long 0x00 12. " LSYNC ,Synchronize on the last block" "Disabled,Enabled" bitfld.long 0x00 8. " HSMODE ,High speed mode" "Normal,High" newline bitfld.long 0x00 4. " FERRCTRL ,Flow error flag reset control mode" "Write/read command,Read status" bitfld.long 0x00 0. " FIFOMODE ,HSMCI internal FIFO control mode" "Sufficient level,One data written" endif group.long 0xE4++0x03 line.long 0x00 "WPMR,HSMCI Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write protect key" bitfld.long 0x00 0. " WPEN ,Write protection enable" "Disabled,Enabled" newline hgroup.long 0xE8++0x03 hide.long 0x00 "WPSR,HSMCI Write Protect Status Register" in newline width 9. tree "HSMCI FIFO Memory Aperture" hgroup.long 0x200++0x03 hide.long 0x00 "FIFO0,HSMCI FIFO Memory Aperture" in hgroup.long 0x204++0x03 hide.long 0x00 "FIFO1,HSMCI FIFO Memory Aperture" in hgroup.long 0x208++0x03 hide.long 0x00 "FIFO2,HSMCI FIFO Memory Aperture" in hgroup.long 0x20C++0x03 hide.long 0x00 "FIFO3,HSMCI FIFO Memory Aperture" in hgroup.long 0x210++0x03 hide.long 0x00 "FIFO4,HSMCI FIFO Memory Aperture" in hgroup.long 0x214++0x03 hide.long 0x00 "FIFO5,HSMCI FIFO Memory Aperture" in hgroup.long 0x218++0x03 hide.long 0x00 "FIFO6,HSMCI FIFO Memory Aperture" in hgroup.long 0x21C++0x03 hide.long 0x00 "FIFO7,HSMCI FIFO Memory Aperture" in hgroup.long 0x220++0x03 hide.long 0x00 "FIFO8,HSMCI FIFO Memory Aperture" in hgroup.long 0x224++0x03 hide.long 0x00 "FIFO9,HSMCI FIFO Memory Aperture" in hgroup.long 0x228++0x03 hide.long 0x00 "FIFO10,HSMCI FIFO Memory Aperture" in hgroup.long 0x22C++0x03 hide.long 0x00 "FIFO11,HSMCI FIFO Memory Aperture" in hgroup.long 0x230++0x03 hide.long 0x00 "FIFO12,HSMCI FIFO Memory Aperture" in hgroup.long 0x234++0x03 hide.long 0x00 "FIFO13,HSMCI FIFO Memory Aperture" in hgroup.long 0x238++0x03 hide.long 0x00 "FIFO14,HSMCI FIFO Memory Aperture" in hgroup.long 0x23C++0x03 hide.long 0x00 "FIFO15,HSMCI FIFO Memory Aperture" in hgroup.long 0x240++0x03 hide.long 0x00 "FIFO16,HSMCI FIFO Memory Aperture" in hgroup.long 0x244++0x03 hide.long 0x00 "FIFO17,HSMCI FIFO Memory Aperture" in hgroup.long 0x248++0x03 hide.long 0x00 "FIFO18,HSMCI FIFO Memory Aperture" in hgroup.long 0x24C++0x03 hide.long 0x00 "FIFO19,HSMCI FIFO Memory Aperture" in hgroup.long 0x250++0x03 hide.long 0x00 "FIFO20,HSMCI FIFO Memory Aperture" in hgroup.long 0x254++0x03 hide.long 0x00 "FIFO21,HSMCI FIFO Memory Aperture" in hgroup.long 0x258++0x03 hide.long 0x00 "FIFO22,HSMCI FIFO Memory Aperture" in hgroup.long 0x25C++0x03 hide.long 0x00 "FIFO23,HSMCI FIFO Memory Aperture" in hgroup.long 0x260++0x03 hide.long 0x00 "FIFO24,HSMCI FIFO Memory Aperture" in hgroup.long 0x264++0x03 hide.long 0x00 "FIFO25,HSMCI FIFO Memory Aperture" in hgroup.long 0x268++0x03 hide.long 0x00 "FIFO26,HSMCI FIFO Memory Aperture" in hgroup.long 0x26C++0x03 hide.long 0x00 "FIFO27,HSMCI FIFO Memory Aperture" in hgroup.long 0x270++0x03 hide.long 0x00 "FIFO28,HSMCI FIFO Memory Aperture" in hgroup.long 0x274++0x03 hide.long 0x00 "FIFO29,HSMCI FIFO Memory Aperture" in hgroup.long 0x278++0x03 hide.long 0x00 "FIFO30,HSMCI FIFO Memory Aperture" in hgroup.long 0x27C++0x03 hide.long 0x00 "FIFO31,HSMCI FIFO Memory Aperture" in hgroup.long 0x280++0x03 hide.long 0x00 "FIFO32,HSMCI FIFO Memory Aperture" in hgroup.long 0x284++0x03 hide.long 0x00 "FIFO33,HSMCI FIFO Memory Aperture" in hgroup.long 0x288++0x03 hide.long 0x00 "FIFO34,HSMCI FIFO Memory Aperture" in hgroup.long 0x28C++0x03 hide.long 0x00 "FIFO35,HSMCI FIFO Memory Aperture" in hgroup.long 0x290++0x03 hide.long 0x00 "FIFO36,HSMCI FIFO Memory Aperture" in hgroup.long 0x294++0x03 hide.long 0x00 "FIFO37,HSMCI FIFO Memory Aperture" in hgroup.long 0x298++0x03 hide.long 0x00 "FIFO38,HSMCI FIFO Memory Aperture" in hgroup.long 0x29C++0x03 hide.long 0x00 "FIFO39,HSMCI FIFO Memory Aperture" in hgroup.long 0x2A0++0x03 hide.long 0x00 "FIFO40,HSMCI FIFO Memory Aperture" in hgroup.long 0x2A4++0x03 hide.long 0x00 "FIFO41,HSMCI FIFO Memory Aperture" in hgroup.long 0x2A8++0x03 hide.long 0x00 "FIFO42,HSMCI FIFO Memory Aperture" in hgroup.long 0x2AC++0x03 hide.long 0x00 "FIFO43,HSMCI FIFO Memory Aperture" in hgroup.long 0x2B0++0x03 hide.long 0x00 "FIFO44,HSMCI FIFO Memory Aperture" in hgroup.long 0x2B4++0x03 hide.long 0x00 "FIFO45,HSMCI FIFO Memory Aperture" in hgroup.long 0x2B8++0x03 hide.long 0x00 "FIFO46,HSMCI FIFO Memory Aperture" in hgroup.long 0x2BC++0x03 hide.long 0x00 "FIFO47,HSMCI FIFO Memory Aperture" in hgroup.long 0x2C0++0x03 hide.long 0x00 "FIFO48,HSMCI FIFO Memory Aperture" in hgroup.long 0x2C4++0x03 hide.long 0x00 "FIFO49,HSMCI FIFO Memory Aperture" in hgroup.long 0x2C8++0x03 hide.long 0x00 "FIFO50,HSMCI FIFO Memory Aperture" in hgroup.long 0x2CC++0x03 hide.long 0x00 "FIFO51,HSMCI FIFO Memory Aperture" in hgroup.long 0x2D0++0x03 hide.long 0x00 "FIFO52,HSMCI FIFO Memory Aperture" in hgroup.long 0x2D4++0x03 hide.long 0x00 "FIFO53,HSMCI FIFO Memory Aperture" in hgroup.long 0x2D8++0x03 hide.long 0x00 "FIFO54,HSMCI FIFO Memory Aperture" in hgroup.long 0x2DC++0x03 hide.long 0x00 "FIFO55,HSMCI FIFO Memory Aperture" in hgroup.long 0x2E0++0x03 hide.long 0x00 "FIFO56,HSMCI FIFO Memory Aperture" in hgroup.long 0x2E4++0x03 hide.long 0x00 "FIFO57,HSMCI FIFO Memory Aperture" in hgroup.long 0x2E8++0x03 hide.long 0x00 "FIFO58,HSMCI FIFO Memory Aperture" in hgroup.long 0x2EC++0x03 hide.long 0x00 "FIFO59,HSMCI FIFO Memory Aperture" in hgroup.long 0x2F0++0x03 hide.long 0x00 "FIFO60,HSMCI FIFO Memory Aperture" in hgroup.long 0x2F4++0x03 hide.long 0x00 "FIFO61,HSMCI FIFO Memory Aperture" in hgroup.long 0x2F8++0x03 hide.long 0x00 "FIFO62,HSMCI FIFO Memory Aperture" in hgroup.long 0x2FC++0x03 hide.long 0x00 "FIFO63,HSMCI FIFO Memory Aperture" in hgroup.long 0x300++0x03 hide.long 0x00 "FIFO64,HSMCI FIFO Memory Aperture" in hgroup.long 0x304++0x03 hide.long 0x00 "FIFO65,HSMCI FIFO Memory Aperture" in hgroup.long 0x308++0x03 hide.long 0x00 "FIFO66,HSMCI FIFO Memory Aperture" in hgroup.long 0x30C++0x03 hide.long 0x00 "FIFO67,HSMCI FIFO Memory Aperture" in hgroup.long 0x310++0x03 hide.long 0x00 "FIFO68,HSMCI FIFO Memory Aperture" in hgroup.long 0x314++0x03 hide.long 0x00 "FIFO69,HSMCI FIFO Memory Aperture" in hgroup.long 0x318++0x03 hide.long 0x00 "FIFO70,HSMCI FIFO Memory Aperture" in hgroup.long 0x31C++0x03 hide.long 0x00 "FIFO71,HSMCI FIFO Memory Aperture" in hgroup.long 0x320++0x03 hide.long 0x00 "FIFO72,HSMCI FIFO Memory Aperture" in hgroup.long 0x324++0x03 hide.long 0x00 "FIFO73,HSMCI FIFO Memory Aperture" in hgroup.long 0x328++0x03 hide.long 0x00 "FIFO74,HSMCI FIFO Memory Aperture" in hgroup.long 0x32C++0x03 hide.long 0x00 "FIFO75,HSMCI FIFO Memory Aperture" in hgroup.long 0x330++0x03 hide.long 0x00 "FIFO76,HSMCI FIFO Memory Aperture" in hgroup.long 0x334++0x03 hide.long 0x00 "FIFO77,HSMCI FIFO Memory Aperture" in hgroup.long 0x338++0x03 hide.long 0x00 "FIFO78,HSMCI FIFO Memory Aperture" in hgroup.long 0x33C++0x03 hide.long 0x00 "FIFO79,HSMCI FIFO Memory Aperture" in hgroup.long 0x340++0x03 hide.long 0x00 "FIFO80,HSMCI FIFO Memory Aperture" in hgroup.long 0x344++0x03 hide.long 0x00 "FIFO81,HSMCI FIFO Memory Aperture" in hgroup.long 0x348++0x03 hide.long 0x00 "FIFO82,HSMCI FIFO Memory Aperture" in hgroup.long 0x34C++0x03 hide.long 0x00 "FIFO83,HSMCI FIFO Memory Aperture" in hgroup.long 0x350++0x03 hide.long 0x00 "FIFO84,HSMCI FIFO Memory Aperture" in hgroup.long 0x354++0x03 hide.long 0x00 "FIFO85,HSMCI FIFO Memory Aperture" in hgroup.long 0x358++0x03 hide.long 0x00 "FIFO86,HSMCI FIFO Memory Aperture" in hgroup.long 0x35C++0x03 hide.long 0x00 "FIFO87,HSMCI FIFO Memory Aperture" in hgroup.long 0x360++0x03 hide.long 0x00 "FIFO88,HSMCI FIFO Memory Aperture" in hgroup.long 0x364++0x03 hide.long 0x00 "FIFO89,HSMCI FIFO Memory Aperture" in hgroup.long 0x368++0x03 hide.long 0x00 "FIFO90,HSMCI FIFO Memory Aperture" in hgroup.long 0x36C++0x03 hide.long 0x00 "FIFO91,HSMCI FIFO Memory Aperture" in hgroup.long 0x370++0x03 hide.long 0x00 "FIFO92,HSMCI FIFO Memory Aperture" in hgroup.long 0x374++0x03 hide.long 0x00 "FIFO93,HSMCI FIFO Memory Aperture" in hgroup.long 0x378++0x03 hide.long 0x00 "FIFO94,HSMCI FIFO Memory Aperture" in hgroup.long 0x37C++0x03 hide.long 0x00 "FIFO95,HSMCI FIFO Memory Aperture" in hgroup.long 0x380++0x03 hide.long 0x00 "FIFO96,HSMCI FIFO Memory Aperture" in hgroup.long 0x384++0x03 hide.long 0x00 "FIFO97,HSMCI FIFO Memory Aperture" in hgroup.long 0x388++0x03 hide.long 0x00 "FIFO98,HSMCI FIFO Memory Aperture" in hgroup.long 0x38C++0x03 hide.long 0x00 "FIFO99,HSMCI FIFO Memory Aperture" in hgroup.long 0x390++0x03 hide.long 0x00 "FIFO100,HSMCI FIFO Memory Aperture" in hgroup.long 0x394++0x03 hide.long 0x00 "FIFO101,HSMCI FIFO Memory Aperture" in hgroup.long 0x398++0x03 hide.long 0x00 "FIFO102,HSMCI FIFO Memory Aperture" in hgroup.long 0x39C++0x03 hide.long 0x00 "FIFO103,HSMCI FIFO Memory Aperture" in hgroup.long 0x3A0++0x03 hide.long 0x00 "FIFO104,HSMCI FIFO Memory Aperture" in hgroup.long 0x3A4++0x03 hide.long 0x00 "FIFO105,HSMCI FIFO Memory Aperture" in hgroup.long 0x3A8++0x03 hide.long 0x00 "FIFO106,HSMCI FIFO Memory Aperture" in hgroup.long 0x3AC++0x03 hide.long 0x00 "FIFO107,HSMCI FIFO Memory Aperture" in hgroup.long 0x3B0++0x03 hide.long 0x00 "FIFO108,HSMCI FIFO Memory Aperture" in hgroup.long 0x3B4++0x03 hide.long 0x00 "FIFO109,HSMCI FIFO Memory Aperture" in hgroup.long 0x3B8++0x03 hide.long 0x00 "FIFO110,HSMCI FIFO Memory Aperture" in hgroup.long 0x3BC++0x03 hide.long 0x00 "FIFO111,HSMCI FIFO Memory Aperture" in hgroup.long 0x3C0++0x03 hide.long 0x00 "FIFO112,HSMCI FIFO Memory Aperture" in hgroup.long 0x3C4++0x03 hide.long 0x00 "FIFO113,HSMCI FIFO Memory Aperture" in hgroup.long 0x3C8++0x03 hide.long 0x00 "FIFO114,HSMCI FIFO Memory Aperture" in hgroup.long 0x3CC++0x03 hide.long 0x00 "FIFO115,HSMCI FIFO Memory Aperture" in hgroup.long 0x3D0++0x03 hide.long 0x00 "FIFO116,HSMCI FIFO Memory Aperture" in hgroup.long 0x3D4++0x03 hide.long 0x00 "FIFO117,HSMCI FIFO Memory Aperture" in hgroup.long 0x3D8++0x03 hide.long 0x00 "FIFO118,HSMCI FIFO Memory Aperture" in hgroup.long 0x3DC++0x03 hide.long 0x00 "FIFO119,HSMCI FIFO Memory Aperture" in hgroup.long 0x3E0++0x03 hide.long 0x00 "FIFO120,HSMCI FIFO Memory Aperture" in hgroup.long 0x3E4++0x03 hide.long 0x00 "FIFO121,HSMCI FIFO Memory Aperture" in hgroup.long 0x3E8++0x03 hide.long 0x00 "FIFO122,HSMCI FIFO Memory Aperture" in hgroup.long 0x3EC++0x03 hide.long 0x00 "FIFO123,HSMCI FIFO Memory Aperture" in hgroup.long 0x3F0++0x03 hide.long 0x00 "FIFO124,HSMCI FIFO Memory Aperture" in hgroup.long 0x3F4++0x03 hide.long 0x00 "FIFO125,HSMCI FIFO Memory Aperture" in hgroup.long 0x3F8++0x03 hide.long 0x00 "FIFO126,HSMCI FIFO Memory Aperture" in hgroup.long 0x3FC++0x03 hide.long 0x00 "FIFO127,HSMCI FIFO Memory Aperture" in hgroup.long 0x400++0x03 hide.long 0x00 "FIFO128,HSMCI FIFO Memory Aperture" in hgroup.long 0x404++0x03 hide.long 0x00 "FIFO129,HSMCI FIFO Memory Aperture" in hgroup.long 0x408++0x03 hide.long 0x00 "FIFO130,HSMCI FIFO Memory Aperture" in hgroup.long 0x40C++0x03 hide.long 0x00 "FIFO131,HSMCI FIFO Memory Aperture" in hgroup.long 0x410++0x03 hide.long 0x00 "FIFO132,HSMCI FIFO Memory Aperture" in hgroup.long 0x414++0x03 hide.long 0x00 "FIFO133,HSMCI FIFO Memory Aperture" in hgroup.long 0x418++0x03 hide.long 0x00 "FIFO134,HSMCI FIFO Memory Aperture" in hgroup.long 0x41C++0x03 hide.long 0x00 "FIFO135,HSMCI FIFO Memory Aperture" in hgroup.long 0x420++0x03 hide.long 0x00 "FIFO136,HSMCI FIFO Memory Aperture" in hgroup.long 0x424++0x03 hide.long 0x00 "FIFO137,HSMCI FIFO Memory Aperture" in hgroup.long 0x428++0x03 hide.long 0x00 "FIFO138,HSMCI FIFO Memory Aperture" in hgroup.long 0x42C++0x03 hide.long 0x00 "FIFO139,HSMCI FIFO Memory Aperture" in hgroup.long 0x430++0x03 hide.long 0x00 "FIFO140,HSMCI FIFO Memory Aperture" in hgroup.long 0x434++0x03 hide.long 0x00 "FIFO141,HSMCI FIFO Memory Aperture" in hgroup.long 0x438++0x03 hide.long 0x00 "FIFO142,HSMCI FIFO Memory Aperture" in hgroup.long 0x43C++0x03 hide.long 0x00 "FIFO143,HSMCI FIFO Memory Aperture" in hgroup.long 0x440++0x03 hide.long 0x00 "FIFO144,HSMCI FIFO Memory Aperture" in hgroup.long 0x444++0x03 hide.long 0x00 "FIFO145,HSMCI FIFO Memory Aperture" in hgroup.long 0x448++0x03 hide.long 0x00 "FIFO146,HSMCI FIFO Memory Aperture" in hgroup.long 0x44C++0x03 hide.long 0x00 "FIFO147,HSMCI FIFO Memory Aperture" in hgroup.long 0x450++0x03 hide.long 0x00 "FIFO148,HSMCI FIFO Memory Aperture" in hgroup.long 0x454++0x03 hide.long 0x00 "FIFO149,HSMCI FIFO Memory Aperture" in hgroup.long 0x458++0x03 hide.long 0x00 "FIFO150,HSMCI FIFO Memory Aperture" in hgroup.long 0x45C++0x03 hide.long 0x00 "FIFO151,HSMCI FIFO Memory Aperture" in hgroup.long 0x460++0x03 hide.long 0x00 "FIFO152,HSMCI FIFO Memory Aperture" in hgroup.long 0x464++0x03 hide.long 0x00 "FIFO153,HSMCI FIFO Memory Aperture" in hgroup.long 0x468++0x03 hide.long 0x00 "FIFO154,HSMCI FIFO Memory Aperture" in hgroup.long 0x46C++0x03 hide.long 0x00 "FIFO155,HSMCI FIFO Memory Aperture" in hgroup.long 0x470++0x03 hide.long 0x00 "FIFO156,HSMCI FIFO Memory Aperture" in hgroup.long 0x474++0x03 hide.long 0x00 "FIFO157,HSMCI FIFO Memory Aperture" in hgroup.long 0x478++0x03 hide.long 0x00 "FIFO158,HSMCI FIFO Memory Aperture" in hgroup.long 0x47C++0x03 hide.long 0x00 "FIFO159,HSMCI FIFO Memory Aperture" in hgroup.long 0x480++0x03 hide.long 0x00 "FIFO160,HSMCI FIFO Memory Aperture" in hgroup.long 0x484++0x03 hide.long 0x00 "FIFO161,HSMCI FIFO Memory Aperture" in hgroup.long 0x488++0x03 hide.long 0x00 "FIFO162,HSMCI FIFO Memory Aperture" in hgroup.long 0x48C++0x03 hide.long 0x00 "FIFO163,HSMCI FIFO Memory Aperture" in hgroup.long 0x490++0x03 hide.long 0x00 "FIFO164,HSMCI FIFO Memory Aperture" in hgroup.long 0x494++0x03 hide.long 0x00 "FIFO165,HSMCI FIFO Memory Aperture" in hgroup.long 0x498++0x03 hide.long 0x00 "FIFO166,HSMCI FIFO Memory Aperture" in hgroup.long 0x49C++0x03 hide.long 0x00 "FIFO167,HSMCI FIFO Memory Aperture" in hgroup.long 0x4A0++0x03 hide.long 0x00 "FIFO168,HSMCI FIFO Memory Aperture" in hgroup.long 0x4A4++0x03 hide.long 0x00 "FIFO169,HSMCI FIFO Memory Aperture" in hgroup.long 0x4A8++0x03 hide.long 0x00 "FIFO170,HSMCI FIFO Memory Aperture" in hgroup.long 0x4AC++0x03 hide.long 0x00 "FIFO171,HSMCI FIFO Memory Aperture" in hgroup.long 0x4B0++0x03 hide.long 0x00 "FIFO172,HSMCI FIFO Memory Aperture" in hgroup.long 0x4B4++0x03 hide.long 0x00 "FIFO173,HSMCI FIFO Memory Aperture" in hgroup.long 0x4B8++0x03 hide.long 0x00 "FIFO174,HSMCI FIFO Memory Aperture" in hgroup.long 0x4BC++0x03 hide.long 0x00 "FIFO175,HSMCI FIFO Memory Aperture" in hgroup.long 0x4C0++0x03 hide.long 0x00 "FIFO176,HSMCI FIFO Memory Aperture" in hgroup.long 0x4C4++0x03 hide.long 0x00 "FIFO177,HSMCI FIFO Memory Aperture" in hgroup.long 0x4C8++0x03 hide.long 0x00 "FIFO178,HSMCI FIFO Memory Aperture" in hgroup.long 0x4CC++0x03 hide.long 0x00 "FIFO179,HSMCI FIFO Memory Aperture" in hgroup.long 0x4D0++0x03 hide.long 0x00 "FIFO180,HSMCI FIFO Memory Aperture" in hgroup.long 0x4D4++0x03 hide.long 0x00 "FIFO181,HSMCI FIFO Memory Aperture" in hgroup.long 0x4D8++0x03 hide.long 0x00 "FIFO182,HSMCI FIFO Memory Aperture" in hgroup.long 0x4DC++0x03 hide.long 0x00 "FIFO183,HSMCI FIFO Memory Aperture" in hgroup.long 0x4E0++0x03 hide.long 0x00 "FIFO184,HSMCI FIFO Memory Aperture" in hgroup.long 0x4E4++0x03 hide.long 0x00 "FIFO185,HSMCI FIFO Memory Aperture" in hgroup.long 0x4E8++0x03 hide.long 0x00 "FIFO186,HSMCI FIFO Memory Aperture" in hgroup.long 0x4EC++0x03 hide.long 0x00 "FIFO187,HSMCI FIFO Memory Aperture" in hgroup.long 0x4F0++0x03 hide.long 0x00 "FIFO188,HSMCI FIFO Memory Aperture" in hgroup.long 0x4F4++0x03 hide.long 0x00 "FIFO189,HSMCI FIFO Memory Aperture" in hgroup.long 0x4F8++0x03 hide.long 0x00 "FIFO190,HSMCI FIFO Memory Aperture" in hgroup.long 0x4FC++0x03 hide.long 0x00 "FIFO191,HSMCI FIFO Memory Aperture" in hgroup.long 0x500++0x03 hide.long 0x00 "FIFO192,HSMCI FIFO Memory Aperture" in hgroup.long 0x504++0x03 hide.long 0x00 "FIFO193,HSMCI FIFO Memory Aperture" in hgroup.long 0x508++0x03 hide.long 0x00 "FIFO194,HSMCI FIFO Memory Aperture" in hgroup.long 0x50C++0x03 hide.long 0x00 "FIFO195,HSMCI FIFO Memory Aperture" in hgroup.long 0x510++0x03 hide.long 0x00 "FIFO196,HSMCI FIFO Memory Aperture" in hgroup.long 0x514++0x03 hide.long 0x00 "FIFO197,HSMCI FIFO Memory Aperture" in hgroup.long 0x518++0x03 hide.long 0x00 "FIFO198,HSMCI FIFO Memory Aperture" in hgroup.long 0x51C++0x03 hide.long 0x00 "FIFO199,HSMCI FIFO Memory Aperture" in hgroup.long 0x520++0x03 hide.long 0x00 "FIFO200,HSMCI FIFO Memory Aperture" in hgroup.long 0x524++0x03 hide.long 0x00 "FIFO201,HSMCI FIFO Memory Aperture" in hgroup.long 0x528++0x03 hide.long 0x00 "FIFO202,HSMCI FIFO Memory Aperture" in hgroup.long 0x52C++0x03 hide.long 0x00 "FIFO203,HSMCI FIFO Memory Aperture" in hgroup.long 0x530++0x03 hide.long 0x00 "FIFO204,HSMCI FIFO Memory Aperture" in hgroup.long 0x534++0x03 hide.long 0x00 "FIFO205,HSMCI FIFO Memory Aperture" in hgroup.long 0x538++0x03 hide.long 0x00 "FIFO206,HSMCI FIFO Memory Aperture" in hgroup.long 0x53C++0x03 hide.long 0x00 "FIFO207,HSMCI FIFO Memory Aperture" in hgroup.long 0x540++0x03 hide.long 0x00 "FIFO208,HSMCI FIFO Memory Aperture" in hgroup.long 0x544++0x03 hide.long 0x00 "FIFO209,HSMCI FIFO Memory Aperture" in hgroup.long 0x548++0x03 hide.long 0x00 "FIFO210,HSMCI FIFO Memory Aperture" in hgroup.long 0x54C++0x03 hide.long 0x00 "FIFO211,HSMCI FIFO Memory Aperture" in hgroup.long 0x550++0x03 hide.long 0x00 "FIFO212,HSMCI FIFO Memory Aperture" in hgroup.long 0x554++0x03 hide.long 0x00 "FIFO213,HSMCI FIFO Memory Aperture" in hgroup.long 0x558++0x03 hide.long 0x00 "FIFO214,HSMCI FIFO Memory Aperture" in hgroup.long 0x55C++0x03 hide.long 0x00 "FIFO215,HSMCI FIFO Memory Aperture" in hgroup.long 0x560++0x03 hide.long 0x00 "FIFO216,HSMCI FIFO Memory Aperture" in hgroup.long 0x564++0x03 hide.long 0x00 "FIFO217,HSMCI FIFO Memory Aperture" in hgroup.long 0x568++0x03 hide.long 0x00 "FIFO218,HSMCI FIFO Memory Aperture" in hgroup.long 0x56C++0x03 hide.long 0x00 "FIFO219,HSMCI FIFO Memory Aperture" in hgroup.long 0x570++0x03 hide.long 0x00 "FIFO220,HSMCI FIFO Memory Aperture" in hgroup.long 0x574++0x03 hide.long 0x00 "FIFO221,HSMCI FIFO Memory Aperture" in hgroup.long 0x578++0x03 hide.long 0x00 "FIFO222,HSMCI FIFO Memory Aperture" in hgroup.long 0x57C++0x03 hide.long 0x00 "FIFO223,HSMCI FIFO Memory Aperture" in hgroup.long 0x580++0x03 hide.long 0x00 "FIFO224,HSMCI FIFO Memory Aperture" in hgroup.long 0x584++0x03 hide.long 0x00 "FIFO225,HSMCI FIFO Memory Aperture" in hgroup.long 0x588++0x03 hide.long 0x00 "FIFO226,HSMCI FIFO Memory Aperture" in hgroup.long 0x58C++0x03 hide.long 0x00 "FIFO227,HSMCI FIFO Memory Aperture" in hgroup.long 0x590++0x03 hide.long 0x00 "FIFO228,HSMCI FIFO Memory Aperture" in hgroup.long 0x594++0x03 hide.long 0x00 "FIFO229,HSMCI FIFO Memory Aperture" in hgroup.long 0x598++0x03 hide.long 0x00 "FIFO230,HSMCI FIFO Memory Aperture" in hgroup.long 0x59C++0x03 hide.long 0x00 "FIFO231,HSMCI FIFO Memory Aperture" in hgroup.long 0x5A0++0x03 hide.long 0x00 "FIFO232,HSMCI FIFO Memory Aperture" in hgroup.long 0x5A4++0x03 hide.long 0x00 "FIFO233,HSMCI FIFO Memory Aperture" in hgroup.long 0x5A8++0x03 hide.long 0x00 "FIFO234,HSMCI FIFO Memory Aperture" in hgroup.long 0x5AC++0x03 hide.long 0x00 "FIFO235,HSMCI FIFO Memory Aperture" in hgroup.long 0x5B0++0x03 hide.long 0x00 "FIFO236,HSMCI FIFO Memory Aperture" in hgroup.long 0x5B4++0x03 hide.long 0x00 "FIFO237,HSMCI FIFO Memory Aperture" in hgroup.long 0x5B8++0x03 hide.long 0x00 "FIFO238,HSMCI FIFO Memory Aperture" in hgroup.long 0x5BC++0x03 hide.long 0x00 "FIFO239,HSMCI FIFO Memory Aperture" in hgroup.long 0x5C0++0x03 hide.long 0x00 "FIFO240,HSMCI FIFO Memory Aperture" in hgroup.long 0x5C4++0x03 hide.long 0x00 "FIFO241,HSMCI FIFO Memory Aperture" in hgroup.long 0x5C8++0x03 hide.long 0x00 "FIFO242,HSMCI FIFO Memory Aperture" in hgroup.long 0x5CC++0x03 hide.long 0x00 "FIFO243,HSMCI FIFO Memory Aperture" in hgroup.long 0x5D0++0x03 hide.long 0x00 "FIFO244,HSMCI FIFO Memory Aperture" in hgroup.long 0x5D4++0x03 hide.long 0x00 "FIFO245,HSMCI FIFO Memory Aperture" in hgroup.long 0x5D8++0x03 hide.long 0x00 "FIFO246,HSMCI FIFO Memory Aperture" in hgroup.long 0x5DC++0x03 hide.long 0x00 "FIFO247,HSMCI FIFO Memory Aperture" in hgroup.long 0x5E0++0x03 hide.long 0x00 "FIFO248,HSMCI FIFO Memory Aperture" in hgroup.long 0x5E4++0x03 hide.long 0x00 "FIFO249,HSMCI FIFO Memory Aperture" in hgroup.long 0x5E8++0x03 hide.long 0x00 "FIFO250,HSMCI FIFO Memory Aperture" in hgroup.long 0x5EC++0x03 hide.long 0x00 "FIFO251,HSMCI FIFO Memory Aperture" in hgroup.long 0x5F0++0x03 hide.long 0x00 "FIFO252,HSMCI FIFO Memory Aperture" in hgroup.long 0x5F4++0x03 hide.long 0x00 "FIFO253,HSMCI FIFO Memory Aperture" in hgroup.long 0x5F8++0x03 hide.long 0x00 "FIFO254,HSMCI FIFO Memory Aperture" in hgroup.long 0x5FC++0x03 hide.long 0x00 "FIFO255,HSMCI FIFO Memory Aperture" in tree.end width 0x0B tree "PDC (Peripheral DMA Controller)" base ad:0x40000000 width 11. group.long 0x100++0x01F line.long 0x00 "HSMCI_RPR,Receive Pointer Register" line.long 0x04 "HSMCI_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "HSMCI_TPR,Transmit Pointer Register" line.long 0x0c "HSMCI_TCR,Transmit Counter Register" hexmask.long.word 0x0C 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "HSMCI_RNPR,Receive Next Pointer Register" line.long 0x14 "HSMCI_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "HSMCI_TNPR,Transmit Next Pointer Register" line.long 0x1c "HSMCI_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "HSMCI_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disable" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enable" bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disable" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enable" rgroup.long 0x124++0x03 line.long 0x00 "HSMCI_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0x0B tree.end tree.end tree "PWM (Pulse Width Modulation)" base ad:0x40020000 width 9. tree "Common Registers" group.long 0x00++0x03 line.long 0x00 "CLK,PWM Clock Register" bitfld.long 0x00 24.--27. " PREB ,Divider Input Clock" "CLK/1,CLK/2,CLK/4,CLK/8,CLK/16,CLK/32,CLK/64,CLK/128,CLK/256,CLK/512,CLK/1024,?..." hexmask.long.byte 0x00 16.--23. 1. " DIVB ,CLKB Divide Factor" textline " " bitfld.long 0x00 8.--11. " PREA ,Divider Input Clock" "CLK/1,CLK/2,CLK/4,CLK/8,CLK/16,CLK/32,CLK/64,CLK/128,CLK/256,CLK/512,CLK/1024,?..." hexmask.long.byte 0x00 0.--7. 1. " DIVA ,CLKA Divide Factor" group.long 0x0C++0x03 line.long 0x00 "SR,PWM Status Register" setclrfld.long 0x00 3. -0x8 3. -0x4 3. " CHID3_set/clr ,PWM output for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " CHID2_set/clr ,PWM output for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " CHID1_set/clr ,PWM output for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " CHID0_set/clr ,PWM output for channel 0" "Disabled,Enabled" group.long 0x18++0x03 line.long 0x00 "IMR1,PWM Interrupt Mask Register 1" setclrfld.long 0x00 19. -0x8 19. -0x4 19. " FCHID3_set/clr ,Fault Protection Trigger on Channel 3 Interrupt" "Masked,Not masked" setclrfld.long 0x00 18. -0x8 18. -0x4 18. " FCHID2_set/clr ,Fault Protection Trigger on Channel 2 Interrupt" "Masked,Not masked" textline " " setclrfld.long 0x00 17. -0x8 17. -0x4 17. " FCHID1_set/clr ,Fault Protection Trigger on Channel 1 Interrupt" "Masked,Not masked" setclrfld.long 0x00 16. -0x8 16. -0x4 16. " FCHID0_set/clr ,Fault Protection Trigger on Channel 0 Interrupt" "Masked,Not masked" textline " " setclrfld.long 0x00 3. -0x8 3. -0x4 3. " CHID3_set/clr ,Counter Event on Channel 3 Interrupt" "Masked,Not masked" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " CHID2_set/clr ,Counter Event on Channel 2 Interrupt" "Masked,Not masked" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " CHID1_set/clr ,Counter Event on Channel 1 Interrupt" "Masked,Not masked" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " CHID0_set/clr , Counter Event on Channel 0 Interrupt" "Masked,Not masked" hgroup.long 0x1C++0x03 hide.long 0x0 "ISR1,PWM Interrupt Status Register 1" in sif (cpuis("ATSAM4S*")||cpuis("ATSAMA5D2?")) if ((per.l(ad:0x40020000+0x20)&0x30000)==0x20000) group.long 0x20++0x03 line.long 0x00 "SCM,PWM Sync Channels Mode Register" bitfld.long 0x00 21.--23. " PTRCS ,DMA Transfer Request Comparison Selection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20. " PTRM ,DMA Transfer Request Mode" "At update period elision,At comparison match" textline " " bitfld.long 0x00 16.--17. " UPDM ,Synchronous Channels Update Mode (write of duty-cycle update registers/update of synchronous channels)" "Manual/Manual,Manual/Automatic,Automatic/Automatic,?..." textline " " bitfld.long 0x00 3. " SYNC3 ,Synchronous Channel 3" "Not synchronous,Synchronous" bitfld.long 0x00 2. " SYNC2 ,Synchronous Channel 2" "Not synchronous,Synchronous" textline " " bitfld.long 0x00 1. " SYNC1 ,Synchronous Channel 1" "Not synchronous,Synchronous" bitfld.long 0x00 0. " SYNC0 ,Synchronous Channel 0" "Not synchronous,Synchronous" else group.long 0x20++0x03 line.long 0x00 "SCM,PWM Sync Channels Mode Register" bitfld.long 0x00 21.--23. " PTRCS ,DMA Transfer Request Comparison Selection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20. " PTRM ,DMA Transfer Request Mode (Never requested in chosen Synchronous Channels Update Mode)" "Never,Never" textline " " bitfld.long 0x00 16.--17. " UPDM ,Synchronous Channels Update Mode (write of duty-cycle update registers/update of synchronous channels)" "Manual/Manual,Manual/Automatic,Automatic/Automatic,?..." textline " " bitfld.long 0x00 3. " SYNC3 ,Synchronous Channel 3" "Not synchronous,Synchronous" bitfld.long 0x00 2. " SYNC2 ,Synchronous Channel 2" "Not synchronous,Synchronous" textline " " bitfld.long 0x00 1. " SYNC1 ,Synchronous Channel 1" "Not synchronous,Synchronous" bitfld.long 0x00 0. " SYNC0 ,Synchronous Channel 0" "Not synchronous,Synchronous" endif else group.long 0x20++0x03 line.long 0x00 "SCM,PWM Sync Channels Mode Register" bitfld.long 0x00 16.--17. " UPDM ,Synchronous Channels Update Mode (write of duty-cycle update registers/update of synchronous channels)" "Manual/Manual,Manual/Automatic,?..." textline " " bitfld.long 0x00 3. " SYNC3 ,Synchronous Channel 3" "Not synchronous,Synchronous" bitfld.long 0x00 2. " SYNC2 ,Synchronous Channel 2" "Not synchronous,Synchronous" textline " " bitfld.long 0x00 1. " SYNC1 ,Synchronous Channel 1" "Not synchronous,Synchronous" bitfld.long 0x00 0. " SYNC0 ,Synchronous Channel 0" "Not synchronous,Synchronous" endif textline " " sif (cpuis("ATSAMA5D2?")) wgroup.long 0x24++0x03 line.long 0x00 "DMAR,DMA Register" hexmask.long.tbyte 0x00 0.--23. 1. " DMADUTY ,Duty-Cycle Holding Register for DMA Access" endif group.long 0x28++0x03 line.long 0x00 "SCUC,PWM Sync Channels Update Control Register" bitfld.long 0x00 0. " UPDULOCK ,Synchronous Channels Update Unlock" "No effect,Update" if (((per.l(ad:0x40020000+0x20))&0x30000)==0x10000) group.long 0x2C++0x03 line.long 0x00 "SCUP,PWM Sync Channels Update Period Register" bitfld.long 0x00 4.--7. " UPRCNT ,Update Period Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " UPR ,Update Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long 0x30++0x3 line.long 0x00 "SCUPUPD,PWM Sync Channels Update Period Update Register" bitfld.long 0x00 0.--3. " UPRUPD ,Update Period Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" elif (((per.l(ad:0x40020000+0x20))&0x30000)==0x20000) sif (cpuis("ATSAMA5D4*")||cpuis("ATSAMA5D2*")) group.long 0x2C++0x03 line.long 0x00 "SCUP,PWM Sync Channels Update Period Register" bitfld.long 0x00 4.--7. " UPRCNT ,Update Period Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " UPR ,Update Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long 0x30++0x3 line.long 0x00 "SCUPUPD,PWM Sync Channels Update Period Update Register" bitfld.long 0x00 0.--3. " UPRUPD ,Update Period Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else hgroup.long 0x2C++0x07 hide.long 0x00 "SCUP,PWM Sync Channels Update Period Register" hide.long 0x04 "SCUPUPD,PWM Sync Channels Update Period Update Register" endif else hgroup.long 0x2C++0x07 hide.long 0x00 "SCUP,PWM Sync Channels Update Period Register" hide.long 0x04 "SCUPUPD,PWM Sync Channels Update Period Update Register" endif group.long 0x3C++0x3 line.long 0x00 "IMR2,PWM Interrupt Mask Register 2" setclrfld.long 0x00 23. -0x8 23. -0x4 23. " CMPU7_set/clr ,Comparison 7 Update Interrupt" "Masked,Not masked" setclrfld.long 0x00 22. -0x8 22. -0x4 22. " CMPU6_set/clr ,Comparison 6 Update Interrupt" "Masked,Not masked" textline " " setclrfld.long 0x00 21. -0x8 21. -0x4 21. " CMPU5_set/clr ,Comparison 5 Update Interrupt" "Masked,Not masked" setclrfld.long 0x00 20. -0x8 20. -0x4 20. " CMPU4_set/clr ,Comparison 4 Update Interrupt" "Masked,Not masked" textline " " setclrfld.long 0x00 19. -0x8 19. -0x4 19. " CMPU3_set/clr ,Comparison 3 Update Interrupt" "Masked,Not masked" setclrfld.long 0x00 18. -0x8 18. -0x4 18. " CMPU2_set/clr ,Comparison 2 Update Interrupt" "Masked,Not masked" textline " " setclrfld.long 0x00 17. -0x8 17. -0x4 17. " CMPU1_set/clr ,Comparison 1 Update Interrupt" "Masked,Not masked" setclrfld.long 0x00 16. -0x8 16. -0x4 16. " CMPU0_set/clr ,Comparison 0 Update Interrupt" "Masked,Not masked" textline " " setclrfld.long 0x00 15. -0x8 15. -0x4 15. " CMPM7_set/clr ,Comparison 7 Match Interrupt" "Masked,Not masked" setclrfld.long 0x00 14. -0x8 14. -0x4 14. " CMPM6_set/clr ,Comparison 6 Match Interrupt" "Masked,Not masked" textline " " setclrfld.long 0x00 13. -0x8 13. -0x4 13. " CMPM5_set/clr ,Comparison 5 Match Interrupt" "Masked,Not masked" setclrfld.long 0x00 12. -0x8 12. -0x4 12. " CMPM4_set/clr ,Comparison 4 Match Interrupt" "Masked,Not masked" textline " " setclrfld.long 0x00 11. -0x8 11. -0x4 11. " CMPM3_set/clr ,Comparison 3 Match Interrupt" "Masked,Not masked" setclrfld.long 0x00 10. -0x8 10. -0x4 10. " CMPM2_set/clr ,Comparison 2 Match Interrupt" "Masked,Not masked" textline " " setclrfld.long 0x00 9. -0x8 9. -0x4 9. " CMPM1_set/clr ,Comparison 1 Match Interrupt" "Masked,Not masked" setclrfld.long 0x00 8. -0x8 8. -0x4 8. " CMPM0_set/clr ,Comparison 0 Match Interrupt" "Masked,Not masked" textline " " sif (cpuis("ATSAMA5D2?")||cpuis("ATSAMA5D3*")||cpuis("ATSAMA5D4*")) setclrfld.long 0x00 3. -0x8 3. -0x4 3. " UNRE_set/clr ,Synchronous Channels Update Underrun Error Interrupt" "Masked,Not masked" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " WRDY_set/clr ,Write Ready for Synchronous Channels Update Interrupt" "Masked,Not masked" textline " " else setclrfld.long 0x00 3. -0x8 3. -0x4 3. " UNRE_set/clr ,Synchronous Channels Update Underrun Error Interrupt" "Masked,Not masked" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " TXBUFE_set/clr ,PDC TX Buffer Empty Interrupt" "Masked,Not masked" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " ENDTX_set/clr ,PDC End of TX Buffer Interrupt" "Masked,Not masked" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " WRDY_set/clr ,Write Ready for Synchronous Channels Update Interrupt" "Masked,Not masked" endif hgroup.long 0x40++0x3 hide.long 0x00 "ISR2,PWM Interrupt Status Register 2" in group.long 0x44++0x3 line.long 0x00 "OOV,PWM Output Override Value Register" bitfld.long 0x00 19. " OOVL3 ,Output Override Value for PWML output of the channel 3" "Low,High" bitfld.long 0x00 18. " OOVL2 ,Output Override Value for PWML output of the channel 2" "Low,High" textline " " bitfld.long 0x00 17. " OOVL1 ,Output Override Value for PWML output of the channel 1" "Low,High" bitfld.long 0x00 16. " OOVL0 ,Output Override Value for PWML output of the channel 0" "Low,High" textline " " bitfld.long 0x00 3. " OOVH3 ,Output Override Value for PWMH output of the channel 3" "Low,High" bitfld.long 0x00 2. " OOVH2 ,Output Override Value for PWMH output of the channel 2" "Low,High" textline " " bitfld.long 0x00 1. " OOVH1 ,Output Override Value for PWMH output of the channel 1" "Low,High" bitfld.long 0x00 0. " OOVH0 ,Output Override Value for PWMH output of the channel 0" "Low,High" group.long 0x48++0x3 line.long 0x00 "OS,PWM Output Selection Register" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " OSL3_set/clr ,Output Selection for PWML output of the channel 3" "DTOL3,OOVL3" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " OSL2_set/clr ,Output Selection for PWML output of the channel 2" "DTOL2,OOVL2" textline " " setclrfld.long 0x00 17. 0x04 17. 0x08 17. " OSL1_set/clr ,Output Selection for PWML output of the channel 1" "DTOL1,OOVL1" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " OSL0_set/clr ,Output Selection for PWML output of the channel 0" "DTOL0,OOVL0" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " OSH3_set/clr ,Output Selection for PWMH output of the channel 3" "DTOH3,OOVH3" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " OSH2_set/clr ,Output Selection for PWMH output of the channel 2" "DTOH2,OOVH2" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OSH1_set/clr ,Output Selection for PWMH output of the channel 1" "DTOH1,OOVH1" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " OSH0_set/clr ,Output Selection for PWMH output of the channel 0" "DTOH0,OOVH0" wgroup.long 0x54++0x7 line.long 0x00 "OSSUPD,PWM Output Selection Set Update Register" bitfld.long 0x00 19. " OSSUPL3 ,Output Selection Set for PWML output of the channel 3" "No effect,OOVL3" bitfld.long 0x00 18. " OSSUPL2 ,Output Selection Set for PWML output of the channel 2" "No effect,OOVL2" textline " " bitfld.long 0x00 17. " OSSUPL1 ,Output Selection Set for PWML output of the channel 1" "No effect,OOVL1" bitfld.long 0x00 16. " OSSUPL0 ,Output Selection Set for PWML output of the channel 0" "No effect,OOVL0" textline " " bitfld.long 0x00 3. " OSSUPH3 ,Output Selection Set for PWMH output of the channel 3" "No effect,OOVH3" bitfld.long 0x00 2. " OSSUPH2 ,Output Selection Set for PWMH output of the channel 2" "No effect,OOVH2" textline " " bitfld.long 0x00 1. " OSSUPH1 ,Output Selection Set for PWMH output of the channel 1" "No effect,OOVH1" bitfld.long 0x00 0. " OSSUPH0 ,Output Selection Set for PWMH output of the channel 0" "No effect,OOVH0" line.long 0x04 "OSCUPD,PWM Output Selection Clear Update Register" bitfld.long 0x04 19. " OSCUPL3 ,Output Selection Clear for PWML output of the channel 3" "effect,DTOH3" bitfld.long 0x04 18. " OSCUPL2 ,Output Selection Clear for PWML output of the channel 2" "effect,DTOH2" textline " " bitfld.long 0x04 17. " OSCUPL1 ,Output Selection Clear for PWML output of the channel 1" "effect,DTOH1" bitfld.long 0x04 16. " OSCUPL0 ,Output Selection Clear for PWML output of the channel 0" "effect,DTOH0" textline " " bitfld.long 0x04 3. " OSCUPH3 ,Output Selection Clear for PWMH output of the channel 3" "effect,DTOL3" bitfld.long 0x04 2. " OSCUPH2 ,Output Selection Clear for PWMH output of the channel 2" "effect,DTOL2" textline " " bitfld.long 0x04 1. " OSCUPH1 ,Output Selection Clear for PWMH output of the channel 1" "effect,DTOL1" bitfld.long 0x04 0. " OSCUPH0 ,Output Selection Clear for PWMH output of the channel 0" "effect,DTOL0" group.long 0x5C++0x3 line.long 0x00 "FMR,PWM Fault Mode Register" bitfld.long 0x00 23. " FFIL7 ,Fault 7 Filtering" "Disabled,Enabled" bitfld.long 0x00 22. " FFIL6 ,Fault 6 Filtering" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " FFIL5 ,Fault 5 Filtering" "Disabled,Enabled" bitfld.long 0x00 20. " FFIL4 ,Fault 4 Filtering" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " FFIL3 ,Fault 3 Filtering" "Disabled,Enabled" bitfld.long 0x00 18. " FFIL2 ,Fault 2 Filtering" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " FFIL1 ,Fault 1 Filtering" "Disabled,Enabled" bitfld.long 0x00 16. " FFIL0 ,Fault 0 Filtering" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " FMOD7 ,Fault 7 Activation Mode" "Peripheral,Peripheral and FCR" bitfld.long 0x00 14. " FMOD6 ,Fault 6 Activation Mode" "Peripheral,Peripheral and FCR" textline " " bitfld.long 0x00 13. " FMOD5 ,Fault 5 Activation Mode" "Peripheral,Peripheral and FCR" bitfld.long 0x00 12. " FMOD4 ,Fault 4 Activation Mode" "Peripheral,Peripheral and FCR" textline " " bitfld.long 0x00 11. " FMOD3 ,Fault 3 Activation Mode" "Peripheral,Peripheral and FCR" bitfld.long 0x00 10. " FMOD2 ,Fault 2 Activation Mode" "Peripheral,Peripheral and FCR" textline " " bitfld.long 0x00 9. " FMOD1 ,Fault 1 Activation Mode" "Peripheral,Peripheral and FCR" bitfld.long 0x00 8. " FMOD0 ,Fault 0 Activation Mode" "Peripheral,Peripheral and FCR" textline " " bitfld.long 0x00 7. " FPOL7 ,Fault 7 Polarity" "Active-Low,Active-High" bitfld.long 0x00 6. " FPOL6 ,Fault 6 Polarity" "Active-Low,Active-High" textline " " bitfld.long 0x00 5. " FPOL5 ,Fault 5 Polarity" "Active-Low,Active-High" bitfld.long 0x00 4. " FPOL4 ,Fault 4 Polarity" "Active-Low,Active-High" textline " " bitfld.long 0x00 3. " FPOL3 ,Fault 3 Polarity" "Active-Low,Active-High" bitfld.long 0x00 2. " FPOL2 ,Fault 2 Polarity" "Active-Low,Active-High" textline " " bitfld.long 0x00 1. " FPOL1 ,Fault 1 Polarity" "Active-Low,Active-High" bitfld.long 0x00 0. " FPOL0 ,Fault 0 Polarity" "Active-Low,Active-High" rgroup.long 0x60++0x3 line.long 0x00 "FSR,PWM Fault Status Register" bitfld.long 0x00 15. " FS7 , Fault 7 Status" "Inactive,Active" bitfld.long 0x00 14. " FS6 ,Fault 6 Status" "Inactive,Active" textline " " bitfld.long 0x00 13. " FS5 , Fault 5 Status" "Inactive,Active" bitfld.long 0x00 12. " FS4 ,Fault 4 Status" "Inactive,Active" textline " " bitfld.long 0x00 11. " FS3 , Fault 3 Status" "Inactive,Active" bitfld.long 0x00 10. " FS2 ,Fault 2 Status" "Inactive,Active" textline " " bitfld.long 0x00 9. " FS1 ,Fault 1 Status" "Inactive,Active" bitfld.long 0x00 8. " FS0 ,Fault 0 Status" "Inactive,Active" textline " " bitfld.long 0x00 7. " FIV7 ,Fault Input 7 Value" "Low,High" bitfld.long 0x00 6. " FIV6 ,Fault Input 6 Value" "Low,High" textline " " bitfld.long 0x00 5. " FIV5 ,Fault Input 5 Value" "Low,High" bitfld.long 0x00 4. " FIV4 ,Fault Input 4 Value" "Low,High" textline " " bitfld.long 0x00 3. " FIV3 ,Fault Input 3 Value" "Low,High" bitfld.long 0x00 2. " FIV2 ,Fault Input 2 Value" "Low,High" textline " " bitfld.long 0x00 1. " FIV1 ,Fault Input 1 Value" "Low,High" bitfld.long 0x00 0. " FIV0 ,Fault Input 0 Value" "Low,High" wgroup.long 0x64++0x3 line.long 0x00 "FCR,PWM Fault Clear Register" bitfld.long 0x00 7. " FCLR7 ,Fault 7 Clear" "No effect,Clear" bitfld.long 0x00 6. " FCLR6 ,Fault 6 Clear" "No effect,Clear" textline " " bitfld.long 0x00 5. " FCLR5 ,Fault 5 Clear" "No effect,Clear" bitfld.long 0x00 4. " FCLR4 ,Fault 4 Clear" "No effect,Clear" textline " " bitfld.long 0x00 3. " FCLR3 ,Fault 3 Clear" "No effect,Clear" bitfld.long 0x00 2. " FCLR2 ,Fault 2 Clear" "No effect,Clear" textline " " bitfld.long 0x00 1. " FCLR1 ,Fault 1 Clear" "No effect,Clear" bitfld.long 0x00 0. " FCLR0 ,Fault 0 Clear" "No effect,Clear" group.long 0x68++0x7 line.long 0x00 "FPV1,PWM Fault Protection Value Register 1" bitfld.long 0x00 19. " FPVL3 ,Fault Protection Value for PWML output on channel 3" "Low,High" bitfld.long 0x00 18. " FPVL2 ,Fault Protection Value for PWML output on channel 2" "Low,High" textline " " bitfld.long 0x00 17. " FPVL1 ,Fault Protection Value for PWML output on channel 1" "Low,High" bitfld.long 0x00 16. " FPVL0 ,Fault Protection Value for PWML output on channel 0" "Low,High" textline " " bitfld.long 0x00 3. " FPVH3 ,Fault Protection Value for PWMH output on channel 3" "Low,High" bitfld.long 0x00 2. " FPVH2 ,Fault Protection Value for PWMH output on channel 2" "Low,High" textline " " bitfld.long 0x00 1. " FPVH1 ,Fault Protection Value for PWMH output on channel 1" "Low,High" bitfld.long 0x00 0. " FPVH0 ,Fault Protection Value for PWMH output on channel 0" "Low,High" line.long 0x04 "FPE,PWM Fault Protection Enable Register" bitfld.long 0x04 31. " FPE3[7] ,Fault Protection Enable with Fault 7 for channel 3" "Disabled,Enabled" bitfld.long 0x04 30. " FPE3[6] ,Fault Protection Enable with Fault 6 for channel 3" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " FPE3[5] ,Fault Protection Enable with Fault 5 for channel 3" "Disabled,Enabled" bitfld.long 0x04 28. " FPE3[4] ,Fault Protection Enable with Fault 4 for channel 3" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " FPE3[3] ,Fault Protection Enable with Fault 3 for channel 3" "Disabled,Enabled" bitfld.long 0x04 26. " FPE3[2] ,Fault Protection Enable with Fault 2 for channel 3" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " FPE3[1] ,Fault Protection Enable with Fault 1 for channel 3" "Disabled,Enabled" bitfld.long 0x04 24. " FPE3[0] ,Fault Protection Enable with Fault 0 for channel 3" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " FPE2[7] ,Fault Protection Enable with Fault 7 for channel 2" "Disabled,Enabled" bitfld.long 0x04 22. " FPE2[6] ,Fault Protection Enable with Fault 6 for channel 2" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " FPE2[5] ,Fault Protection Enable with Fault 5 for channel 2" "Disabled,Enabled" bitfld.long 0x04 20. " FPE2[4] ,Fault Protection Enable with Fault 4 for channel 2" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " FPE2[3] ,Fault Protection Enable with Fault 3 for channel 2" "Disabled,Enabled" bitfld.long 0x04 18. " FPE2[2] ,Fault Protection Enable with Fault 2 for channel 2" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " FPE2[1] ,Fault Protection Enable with Fault 1 for channel 2" "Disabled,Enabled" bitfld.long 0x04 16. " FPE2[0] ,Fault Protection Enable with Fault 0 for channel 2" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " FPE1[7] ,Fault Protection Enable with Fault 7 for channel 1" "Disabled,Enabled" bitfld.long 0x04 14. " FPE1[6] ,Fault Protection Enable with Fault 6 for channel 1" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " FPE1[5] ,Fault Protection Enable with Fault 5 for channel 1" "Disabled,Enabled" bitfld.long 0x04 12. " FPE1[4] ,Fault Protection Enable with Fault 4 for channel 1" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " FPE1[3] ,Fault Protection Enable with Fault 3 for channel 1" "Disabled,Enabled" bitfld.long 0x04 10. " FPE1[2] ,Fault Protection Enable with Fault 2 for channel 1" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " FPE1[1] ,Fault Protection Enable with Fault 1 for channel 1" "Disabled,Enabled" bitfld.long 0x04 8. " FPE1[0] ,Fault Protection Enable with Fault 0 for channel 1" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " FPE0[7] ,Fault Protection Enable with Fault 7 for channel 0" "Disabled,Enabled" bitfld.long 0x04 6. " FPE0[6] ,Fault Protection Enable with Fault 6 for channel 0" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " FPE0[5] ,Fault Protection Enable with Fault 5 for channel 0" "Disabled,Enabled" bitfld.long 0x04 4. " FPE0[4] ,Fault Protection Enable with Fault 4 for channel 0" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " FPE0[3] ,Fault Protection Enable with Fault 3 for channel 0" "Disabled,Enabled" bitfld.long 0x04 2. " FPE0[2] ,Fault Protection Enable with Fault 2 for channel 0" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " FPE0[1] ,Fault Protection Enable with Fault 1 for channel 0" "Disabled,Enabled" bitfld.long 0x04 0. " FPE0[0] ,Fault Protection Enable with Fault 0 for channel 0" "Disabled,Enabled" group.long 0x7C++0x03 line.long 0x00 "ELMR0,PWM Event Line 0 Register" bitfld.long 0x00 7. " CSEL7 , Comparison 7 Selection" "Disabled,Enabled" bitfld.long 0x00 6. " CSEL6 , Comparison 6 Selection" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CSEL5 , Comparison 5 Selection" "Disabled,Enabled" bitfld.long 0x00 4. " CSEL4 , Comparison 4 Selection" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CSEL3 , Comparison 3 Selection" "Disabled,Enabled" bitfld.long 0x00 2. " CSEL2 , Comparison 2 Selection" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CSEL1 , Comparison 1 Selection" "Disabled,Enabled" bitfld.long 0x00 0. " CSEL0 , Comparison 0 Selection" "Disabled,Enabled" group.long 0x80++0x03 line.long 0x00 "ELMR1,PWM Event Line 1 Register" bitfld.long 0x00 7. " CSEL7 , Comparison 7 Selection" "Disabled,Enabled" bitfld.long 0x00 6. " CSEL6 , Comparison 6 Selection" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CSEL5 , Comparison 5 Selection" "Disabled,Enabled" bitfld.long 0x00 4. " CSEL4 , Comparison 4 Selection" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CSEL3 , Comparison 3 Selection" "Disabled,Enabled" bitfld.long 0x00 2. " CSEL2 , Comparison 2 Selection" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CSEL1 , Comparison 1 Selection" "Disabled,Enabled" bitfld.long 0x00 0. " CSEL0 , Comparison 0 Selection" "Disabled,Enabled" sif (cpuis("ATSAMA5D2?")||cpuis("ATSAMA5D4*")) group.long 0xA0++0x03 line.long 0x00 "SSPR,Spread Spectrum Register" bitfld.long 0x00 24. " SPRDM ,Spread Spectrum Counter Mode" "Triangular,Random" hexmask.long.word 0x00 0.--15. 1. " SPRD ,Spread Spectrum Limit Value" wgroup.long 0xA4++0x03 line.long 0x00 "SSPUP,PWM Spread Spectrum Update Register" hexmask.long.word 0x00 0.--15. 1. " SPRDUP ,Spread Spectrum Limit Value Update" endif group.long 0xB0++0x3 line.long 0x00 "SMMR,PWM Stepper Motor Mode Register" bitfld.long 0x00 17. " DOWN1 ,Down Count" "Up,Down" bitfld.long 0x00 16. " DOWN0 ,Down Count" "Up,Down" textline " " bitfld.long 0x00 1. " GCEN1 ,Gray Count ENable" "Disabled,Enabled" bitfld.long 0x00 0. " GCEN0 ,Gray Count ENable" "Disabled,Enabled" sif (cpuis("ATSAMA5D4*")||cpuis("ATSAMA5D2?")) group.long 0xC0++0x03 line.long 0x00 "FPV2,Fault Protection Value Register 2" bitfld.long 0x00 19. " FPZL3 , Fault Protection to Hi-Z for PWML output on channel 3" "FPVL3,High" bitfld.long 0x00 18. " FPZL2 , Fault Protection to Hi-Z for PWML output on channel 2" "FPVL2,High" textline " " bitfld.long 0x00 17. " FPZL1 ,F Fault Protection to Hi-Z for PWML output on channel 1" "FPVL1,High" bitfld.long 0x00 16. " FPZL0 , Fault Protection to Hi-Z for PWML output on channel 0" "FPVL0,High" textline " " bitfld.long 0x00 3. " FPZH3 ,Fault Protection to Hi-Z for PWMH output on channel 3" "FPVH3,High" bitfld.long 0x00 2. " FPZH2 ,Fault Protection to Hi-Z for PWMH output on channel 2" "FPVH2,High" textline " " bitfld.long 0x00 1. " FPZH1 ,Fault Protection to Hi-Z for PWMH output on channel 1" "FPVH1,High" bitfld.long 0x00 0. " FPZH0 ,Fault Protection to Hi-Z for PWMH output on channel 0" "FPVH0,High" endif wgroup.long 0xE4++0x3 line.long 0x00 "WPCR,PWM Write Protect Control Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write Protect Key" bitfld.long 0x00 7. " WPRG5 ,Write Protect Register Group 5" "Disable,Enable" textline " " bitfld.long 0x00 6. " WPRG4 ,Write Protect Register Group 4" "Disable,Enable" bitfld.long 0x00 5. " WPRG3 ,Write Protect Register Group 3" "Disable,Enable" textline " " bitfld.long 0x00 4. " WPRG2 ,Write Protect Register Group 2" "Disable,Enable" bitfld.long 0x00 3. " WPRG1 ,Write Protect Register Group 1" "Disable,Enable" textline " " bitfld.long 0x00 2. " WPRG0 ,Write Protect Register Group 0" "Disable,Enable" bitfld.long 0x00 0.--1. " WPCMD ,Write Protect Command" "Disable the Write Protect SW,Enable the Write Protect SW,Enable the Write Protect HW,No effect" hgroup.long 0xE8++0x3 hide.long 0x00 "WPSR,PWM Write Protect Status Register" in tree.end width 14. tree "Comparison Registers" if ((per.l(ad:0x40020000+0x200)&0x100)==0x100) group.long (0x130+0x0)++0x03 "Comparison 0" line.long 0x00 "CMP0V,PWM Comparison 0 Value Register" bitfld.long 0x00 24. " CVM ,Comparison 0 Value Mode" "Incrementing,Decrementing" hexmask.long.word 0x00 0.--15. 1. " CV ,Comparison 0 Value" wgroup.long (0x134+0x0)++0x3 line.long 0x00 "CMP0VUPD,Comparison 0 Value Update" bitfld.long 0x00 24. " CVMUPD ,Comparison 0 Value Mode Update" "Incrementing,Decrementing" hexmask.long.word 0x00 0.--15. 1. " CVUPD ,Comparison 0 Value Update" else group.long (0x130+0x0)++0x03 "Comparison 0" line.long 0x00 "CMP0V,PWM Comparison 0 Value Register" hexmask.long.word 0x00 0.--15. 1. " CV ,Comparison 0 Value" wgroup.long (0x134+0x0)++0x3 line.long 0x00 "CMP0VUPD,Comparison 0 Value Update" hexmask.long.word 0x00 0.--15. 1. " CVUPD ,Comparison 0 Value Update" endif group.long (0x138+0x0)++0x3 line.long 0x00 "CMP0M,PWM Comparison 0 Mode Register" rbitfld.long 0x00 20.--23. " CUPRCNT ,Comparison 0 Update Period Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " CUPR ,Comparison 0 Update Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 12.--15. " CPRCNT ,Comparison 0 Period Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CPR ,Comparison 0 Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " CTR ,Comparison 0 Trigger" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CEN ,Comparison 0 Enable" "Disabled,Enabled" wgroup.long (0x13C+0x0)++0x3 line.long 0x00 "CMP0MUPD,PWM Comparison 0 Mode Update Register" bitfld.long 0x00 16.--19. " CUPRUPD ,Comparison 0 Update Period Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CPRUPD ,Comparison 0 Period Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " CTRUPD ,Comparison 0 Trigger Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CENUPD ,Comparison 0 Enable Update" "Disable,Enable" if ((per.l(ad:0x40020000+0x200)&0x100)==0x100) group.long (0x130+0x10)++0x03 "Comparison 1" line.long 0x00 "CMP1V,PWM Comparison 1 Value Register" bitfld.long 0x00 24. " CVM ,Comparison 1 Value Mode" "Incrementing,Decrementing" hexmask.long.word 0x00 0.--15. 1. " CV ,Comparison 1 Value" wgroup.long (0x134+0x10)++0x3 line.long 0x00 "CMP1VUPD,Comparison 1 Value Update" bitfld.long 0x00 24. " CVMUPD ,Comparison 1 Value Mode Update" "Incrementing,Decrementing" hexmask.long.word 0x00 0.--15. 1. " CVUPD ,Comparison 1 Value Update" else group.long (0x130+0x10)++0x03 "Comparison 1" line.long 0x00 "CMP1V,PWM Comparison 1 Value Register" hexmask.long.word 0x00 0.--15. 1. " CV ,Comparison 1 Value" wgroup.long (0x134+0x10)++0x3 line.long 0x00 "CMP1VUPD,Comparison 1 Value Update" hexmask.long.word 0x00 0.--15. 1. " CVUPD ,Comparison 1 Value Update" endif group.long (0x138+0x10)++0x3 line.long 0x00 "CMP1M,PWM Comparison 1 Mode Register" rbitfld.long 0x00 20.--23. " CUPRCNT ,Comparison 1 Update Period Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " CUPR ,Comparison 1 Update Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 12.--15. " CPRCNT ,Comparison 1 Period Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CPR ,Comparison 1 Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " CTR ,Comparison 1 Trigger" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CEN ,Comparison 1 Enable" "Disabled,Enabled" wgroup.long (0x13C+0x10)++0x3 line.long 0x00 "CMP1MUPD,PWM Comparison 1 Mode Update Register" bitfld.long 0x00 16.--19. " CUPRUPD ,Comparison 1 Update Period Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CPRUPD ,Comparison 1 Period Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " CTRUPD ,Comparison 1 Trigger Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CENUPD ,Comparison 1 Enable Update" "Disable,Enable" if ((per.l(ad:0x40020000+0x200)&0x100)==0x100) group.long (0x130+0x20)++0x03 "Comparison 2" line.long 0x00 "CMP2V,PWM Comparison 2 Value Register" bitfld.long 0x00 24. " CVM ,Comparison 2 Value Mode" "Incrementing,Decrementing" hexmask.long.word 0x00 0.--15. 1. " CV ,Comparison 2 Value" wgroup.long (0x134+0x20)++0x3 line.long 0x00 "CMP2VUPD,Comparison 2 Value Update" bitfld.long 0x00 24. " CVMUPD ,Comparison 2 Value Mode Update" "Incrementing,Decrementing" hexmask.long.word 0x00 0.--15. 1. " CVUPD ,Comparison 2 Value Update" else group.long (0x130+0x20)++0x03 "Comparison 2" line.long 0x00 "CMP2V,PWM Comparison 2 Value Register" hexmask.long.word 0x00 0.--15. 1. " CV ,Comparison 2 Value" wgroup.long (0x134+0x20)++0x3 line.long 0x00 "CMP2VUPD,Comparison 2 Value Update" hexmask.long.word 0x00 0.--15. 1. " CVUPD ,Comparison 2 Value Update" endif group.long (0x138+0x20)++0x3 line.long 0x00 "CMP2M,PWM Comparison 2 Mode Register" rbitfld.long 0x00 20.--23. " CUPRCNT ,Comparison 2 Update Period Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " CUPR ,Comparison 2 Update Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 12.--15. " CPRCNT ,Comparison 2 Period Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CPR ,Comparison 2 Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " CTR ,Comparison 2 Trigger" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CEN ,Comparison 2 Enable" "Disabled,Enabled" wgroup.long (0x13C+0x20)++0x3 line.long 0x00 "CMP2MUPD,PWM Comparison 2 Mode Update Register" bitfld.long 0x00 16.--19. " CUPRUPD ,Comparison 2 Update Period Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CPRUPD ,Comparison 2 Period Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " CTRUPD ,Comparison 2 Trigger Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CENUPD ,Comparison 2 Enable Update" "Disable,Enable" if ((per.l(ad:0x40020000+0x200)&0x100)==0x100) group.long (0x130+0x30)++0x03 "Comparison 3" line.long 0x00 "CMP3V,PWM Comparison 3 Value Register" bitfld.long 0x00 24. " CVM ,Comparison 3 Value Mode" "Incrementing,Decrementing" hexmask.long.word 0x00 0.--15. 1. " CV ,Comparison 3 Value" wgroup.long (0x134+0x30)++0x3 line.long 0x00 "CMP3VUPD,Comparison 3 Value Update" bitfld.long 0x00 24. " CVMUPD ,Comparison 3 Value Mode Update" "Incrementing,Decrementing" hexmask.long.word 0x00 0.--15. 1. " CVUPD ,Comparison 3 Value Update" else group.long (0x130+0x30)++0x03 "Comparison 3" line.long 0x00 "CMP3V,PWM Comparison 3 Value Register" hexmask.long.word 0x00 0.--15. 1. " CV ,Comparison 3 Value" wgroup.long (0x134+0x30)++0x3 line.long 0x00 "CMP3VUPD,Comparison 3 Value Update" hexmask.long.word 0x00 0.--15. 1. " CVUPD ,Comparison 3 Value Update" endif group.long (0x138+0x30)++0x3 line.long 0x00 "CMP3M,PWM Comparison 3 Mode Register" rbitfld.long 0x00 20.--23. " CUPRCNT ,Comparison 3 Update Period Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " CUPR ,Comparison 3 Update Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 12.--15. " CPRCNT ,Comparison 3 Period Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CPR ,Comparison 3 Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " CTR ,Comparison 3 Trigger" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CEN ,Comparison 3 Enable" "Disabled,Enabled" wgroup.long (0x13C+0x30)++0x3 line.long 0x00 "CMP3MUPD,PWM Comparison 3 Mode Update Register" bitfld.long 0x00 16.--19. " CUPRUPD ,Comparison 3 Update Period Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CPRUPD ,Comparison 3 Period Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " CTRUPD ,Comparison 3 Trigger Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CENUPD ,Comparison 3 Enable Update" "Disable,Enable" if ((per.l(ad:0x40020000+0x200)&0x100)==0x100) group.long (0x130+0x40)++0x03 "Comparison 4" line.long 0x00 "CMP4V,PWM Comparison 4 Value Register" bitfld.long 0x00 24. " CVM ,Comparison 4 Value Mode" "Incrementing,Decrementing" hexmask.long.word 0x00 0.--15. 1. " CV ,Comparison 4 Value" wgroup.long (0x134+0x40)++0x3 line.long 0x00 "CMP4VUPD,Comparison 4 Value Update" bitfld.long 0x00 24. " CVMUPD ,Comparison 4 Value Mode Update" "Incrementing,Decrementing" hexmask.long.word 0x00 0.--15. 1. " CVUPD ,Comparison 4 Value Update" else group.long (0x130+0x40)++0x03 "Comparison 4" line.long 0x00 "CMP4V,PWM Comparison 4 Value Register" hexmask.long.word 0x00 0.--15. 1. " CV ,Comparison 4 Value" wgroup.long (0x134+0x40)++0x3 line.long 0x00 "CMP4VUPD,Comparison 4 Value Update" hexmask.long.word 0x00 0.--15. 1. " CVUPD ,Comparison 4 Value Update" endif group.long (0x138+0x40)++0x3 line.long 0x00 "CMP4M,PWM Comparison 4 Mode Register" rbitfld.long 0x00 20.--23. " CUPRCNT ,Comparison 4 Update Period Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " CUPR ,Comparison 4 Update Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 12.--15. " CPRCNT ,Comparison 4 Period Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CPR ,Comparison 4 Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " CTR ,Comparison 4 Trigger" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CEN ,Comparison 4 Enable" "Disabled,Enabled" wgroup.long (0x13C+0x40)++0x3 line.long 0x00 "CMP4MUPD,PWM Comparison 4 Mode Update Register" bitfld.long 0x00 16.--19. " CUPRUPD ,Comparison 4 Update Period Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CPRUPD ,Comparison 4 Period Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " CTRUPD ,Comparison 4 Trigger Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CENUPD ,Comparison 4 Enable Update" "Disable,Enable" if ((per.l(ad:0x40020000+0x200)&0x100)==0x100) group.long (0x130+0x50)++0x03 "Comparison 5" line.long 0x00 "CMP5V,PWM Comparison 5 Value Register" bitfld.long 0x00 24. " CVM ,Comparison 5 Value Mode" "Incrementing,Decrementing" hexmask.long.word 0x00 0.--15. 1. " CV ,Comparison 5 Value" wgroup.long (0x134+0x50)++0x3 line.long 0x00 "CMP5VUPD,Comparison 5 Value Update" bitfld.long 0x00 24. " CVMUPD ,Comparison 5 Value Mode Update" "Incrementing,Decrementing" hexmask.long.word 0x00 0.--15. 1. " CVUPD ,Comparison 5 Value Update" else group.long (0x130+0x50)++0x03 "Comparison 5" line.long 0x00 "CMP5V,PWM Comparison 5 Value Register" hexmask.long.word 0x00 0.--15. 1. " CV ,Comparison 5 Value" wgroup.long (0x134+0x50)++0x3 line.long 0x00 "CMP5VUPD,Comparison 5 Value Update" hexmask.long.word 0x00 0.--15. 1. " CVUPD ,Comparison 5 Value Update" endif group.long (0x138+0x50)++0x3 line.long 0x00 "CMP5M,PWM Comparison 5 Mode Register" rbitfld.long 0x00 20.--23. " CUPRCNT ,Comparison 5 Update Period Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " CUPR ,Comparison 5 Update Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 12.--15. " CPRCNT ,Comparison 5 Period Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CPR ,Comparison 5 Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " CTR ,Comparison 5 Trigger" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CEN ,Comparison 5 Enable" "Disabled,Enabled" wgroup.long (0x13C+0x50)++0x3 line.long 0x00 "CMP5MUPD,PWM Comparison 5 Mode Update Register" bitfld.long 0x00 16.--19. " CUPRUPD ,Comparison 5 Update Period Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CPRUPD ,Comparison 5 Period Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " CTRUPD ,Comparison 5 Trigger Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CENUPD ,Comparison 5 Enable Update" "Disable,Enable" if ((per.l(ad:0x40020000+0x200)&0x100)==0x100) group.long (0x130+0x60)++0x03 "Comparison 6" line.long 0x00 "CMP6V,PWM Comparison 6 Value Register" bitfld.long 0x00 24. " CVM ,Comparison 6 Value Mode" "Incrementing,Decrementing" hexmask.long.word 0x00 0.--15. 1. " CV ,Comparison 6 Value" wgroup.long (0x134+0x60)++0x3 line.long 0x00 "CMP6VUPD,Comparison 6 Value Update" bitfld.long 0x00 24. " CVMUPD ,Comparison 6 Value Mode Update" "Incrementing,Decrementing" hexmask.long.word 0x00 0.--15. 1. " CVUPD ,Comparison 6 Value Update" else group.long (0x130+0x60)++0x03 "Comparison 6" line.long 0x00 "CMP6V,PWM Comparison 6 Value Register" hexmask.long.word 0x00 0.--15. 1. " CV ,Comparison 6 Value" wgroup.long (0x134+0x60)++0x3 line.long 0x00 "CMP6VUPD,Comparison 6 Value Update" hexmask.long.word 0x00 0.--15. 1. " CVUPD ,Comparison 6 Value Update" endif group.long (0x138+0x60)++0x3 line.long 0x00 "CMP6M,PWM Comparison 6 Mode Register" rbitfld.long 0x00 20.--23. " CUPRCNT ,Comparison 6 Update Period Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " CUPR ,Comparison 6 Update Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 12.--15. " CPRCNT ,Comparison 6 Period Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CPR ,Comparison 6 Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " CTR ,Comparison 6 Trigger" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CEN ,Comparison 6 Enable" "Disabled,Enabled" wgroup.long (0x13C+0x60)++0x3 line.long 0x00 "CMP6MUPD,PWM Comparison 6 Mode Update Register" bitfld.long 0x00 16.--19. " CUPRUPD ,Comparison 6 Update Period Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CPRUPD ,Comparison 6 Period Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " CTRUPD ,Comparison 6 Trigger Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CENUPD ,Comparison 6 Enable Update" "Disable,Enable" if ((per.l(ad:0x40020000+0x200)&0x100)==0x100) group.long (0x130+0x70)++0x03 "Comparison 7" line.long 0x00 "CMP7V,PWM Comparison 7 Value Register" bitfld.long 0x00 24. " CVM ,Comparison 7 Value Mode" "Incrementing,Decrementing" hexmask.long.word 0x00 0.--15. 1. " CV ,Comparison 7 Value" wgroup.long (0x134+0x70)++0x3 line.long 0x00 "CMP7VUPD,Comparison 7 Value Update" bitfld.long 0x00 24. " CVMUPD ,Comparison 7 Value Mode Update" "Incrementing,Decrementing" hexmask.long.word 0x00 0.--15. 1. " CVUPD ,Comparison 7 Value Update" else group.long (0x130+0x70)++0x03 "Comparison 7" line.long 0x00 "CMP7V,PWM Comparison 7 Value Register" hexmask.long.word 0x00 0.--15. 1. " CV ,Comparison 7 Value" wgroup.long (0x134+0x70)++0x3 line.long 0x00 "CMP7VUPD,Comparison 7 Value Update" hexmask.long.word 0x00 0.--15. 1. " CVUPD ,Comparison 7 Value Update" endif group.long (0x138+0x70)++0x3 line.long 0x00 "CMP7M,PWM Comparison 7 Mode Register" rbitfld.long 0x00 20.--23. " CUPRCNT ,Comparison 7 Update Period Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " CUPR ,Comparison 7 Update Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 12.--15. " CPRCNT ,Comparison 7 Period Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CPR ,Comparison 7 Period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " CTR ,Comparison 7 Trigger" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CEN ,Comparison 7 Enable" "Disabled,Enabled" wgroup.long (0x13C+0x70)++0x3 line.long 0x00 "CMP7MUPD,PWM Comparison 7 Mode Update Register" bitfld.long 0x00 16.--19. " CUPRUPD ,Comparison 7 Update Period Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CPRUPD ,Comparison 7 Period Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " CTRUPD ,Comparison 7 Trigger Update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CENUPD ,Comparison 7 Enable Update" "Disable,Enable" tree.end width 11. tree "Channel 0" sif cpuis("ATSAMA5D4*") if ((per.l(ad:0x40020000+0x200+0x0)&0x100)==0x100) group.long (0x200+0x0)++0x3 line.long 0x00 "CMR0,Channel 0 Mode Register" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML0 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH0 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 11. " UPDS ,Update Selection (At the end of [One/half] period after writing the update register)" "One period,Half period" textline " " bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One and half period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." else group.long (0x200+0x0)++0x3 line.long 0x00 "CMR0,Channel 0 Mode Register" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML0 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH0 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 11. " UPDS ,Update Selection (At the end of [One/half] period after writing the update register)" "One period,One period" textline " " bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." endif elif cpuis("ATSAMA5D2?") if ((per.l(ad:0x40020000+0x200+0x0)&0x100)==0x100) group.long (0x200+0x0)++0x3 line.long 0x00 "CMR0,Channel 0 Mode Register" bitfld.long 0x00 19. " PPM ,Push-Pull Mode" "Disabled,Enabled" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML0 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH0 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 13. " TCTS ,Timer Counter Trigger Selection" "Comparator,Counter events" bitfld.long 0x00 12. " DPOLI ,Disabled Polarity Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 11. " UPDS ,Update Selection (At the end of [One/half] period after writing the update register)" "One period,Half period" bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One and half period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." else group.long (0x200+0x0)++0x3 line.long 0x00 "CMR0,Channel 0 Mode Register" bitfld.long 0x00 19. " PPM ,Push-Pull Mode" "Disabled,Enabled" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML0 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH0 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 13. " TCTS ,Timer Counter Trigger Selection" "Comparator,Counter events" bitfld.long 0x00 12. " DPOLI ,Disabled Polarity Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 11. " UPDS ,Update Selection (At the end of [One/half] period after writing the update register)" "One period,One period" bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." endif else if ((per.l(ad:0x40020000+0x200+0x0)&0x100)==0x100) group.long (0x200+0x0)++0x3 line.long 0x00 "CMR0,Channel 0 Mode Register" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML0 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH0 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One and half period" textline " " bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" textline " " bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." else group.long (0x200+0x0)++0x3 line.long 0x00 "CMR0,Channel 0 Mode Register" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML0 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH0 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One period" textline " " bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" textline " " bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" ",/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." endif endif group.long (0x204+0x0)++0x3 line.long 0x00 "CDTY0,PWM Channel 0 Duty Cycle Register" hexmask.long.word 0x00 0.--15. 1. " CDTY ,Channel Duty-Cycle" wgroup.long (0x208+0x0)++0x3 line.long 0x00 "CDTYUPD0,PWM Channel 0 Duty Cycle Update Register" hexmask.long.word 0x00 0.--15. 1. " CDTYUPD ,Channel Duty-Cycle Update" group.long (0x20C+0x0)++0x03 line.long 0x00 "CPRD0,PWM Channel 0 Period Register" hexmask.long.word 0x00 0.--15. 1. " CPRD ,Channel Period" wgroup.long (0x210+0x0)++0x03 line.long 0x00 "CPRDUPD0,Channel 0 Update Register" hexmask.long.word 0x0 0.--15. 1. " CPRDUPD ,Channel Period Update" rgroup.long (0x214+0x0)++0x03 line.long 0x00 "CCNT0,PWM Channel 0 Counter Register" hexmask.long.word 0x0 0.--15. 1. " CNT ,Channel Counter Register" group.long (0x218+0x0)++0x03 line.long 0x00 "DT0,PWM Channel Dead Time Register" hexmask.long.word 0x00 16.--27. 1. " DTL ,Dead-Time Value for PWML0 Output" hexmask.long.word 0x00 0.--11. 1. " DTH ,Dead-Time Value for PWMH0 Output" wgroup.long (0x21C+0x0)++0x03 line.long 0x00 "DTUPD0,PWM Channel Dead Time Update Register" hexmask.long.word 0x00 16.--27. 1. " DTLUPD ,Dead-Time Value Update for PWML0 Output" hexmask.long.word 0x00 0.--11. 1. " DTHUPD ,Dead-Time Value Update for PWMH0 Output" sif (cpuis("ATSAMA5D4*")||cpuis("ATSAMA5D2?")) group.long (0x400+0x0)++0x03 line.long 0x00 "CMUPD0,PWM Channel Mode Update Register" bitfld.long 0x00 13. " CPOLINVUP ,Channel Polarity Inversion Update" "No effect,Inverted" bitfld.long 0x00 9. " CPOLUP ,Channel Polarity Update" "Low level,High level" endif tree.end tree "Channel 1" sif cpuis("ATSAMA5D4*") if ((per.l(ad:0x40020000+0x200+0x20)&0x100)==0x100) group.long (0x200+0x20)++0x3 line.long 0x00 "CMR1,Channel 1 Mode Register" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML1 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH1 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 11. " UPDS ,Update Selection (At the end of [One/half] period after writing the update register)" "One period,Half period" textline " " bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One and half period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." else group.long (0x200+0x20)++0x3 line.long 0x00 "CMR1,Channel 1 Mode Register" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML1 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH1 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 11. " UPDS ,Update Selection (At the end of [One/half] period after writing the update register)" "One period,One period" textline " " bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." endif elif cpuis("ATSAMA5D2?") if ((per.l(ad:0x40020000+0x200+0x20)&0x100)==0x100) group.long (0x200+0x20)++0x3 line.long 0x00 "CMR1,Channel 1 Mode Register" bitfld.long 0x00 19. " PPM ,Push-Pull Mode" "Disabled,Enabled" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML1 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH1 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 13. " TCTS ,Timer Counter Trigger Selection" "Comparator,Counter events" bitfld.long 0x00 12. " DPOLI ,Disabled Polarity Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 11. " UPDS ,Update Selection (At the end of [One/half] period after writing the update register)" "One period,Half period" bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One and half period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." else group.long (0x200+0x20)++0x3 line.long 0x00 "CMR1,Channel 1 Mode Register" bitfld.long 0x00 19. " PPM ,Push-Pull Mode" "Disabled,Enabled" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML1 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH1 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 13. " TCTS ,Timer Counter Trigger Selection" "Comparator,Counter events" bitfld.long 0x00 12. " DPOLI ,Disabled Polarity Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 11. " UPDS ,Update Selection (At the end of [One/half] period after writing the update register)" "One period,One period" bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." endif else if ((per.l(ad:0x40020000+0x200+0x20)&0x100)==0x100) group.long (0x200+0x20)++0x3 line.long 0x00 "CMR1,Channel 1 Mode Register" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML1 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH1 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One and half period" textline " " bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" textline " " bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." else group.long (0x200+0x20)++0x3 line.long 0x00 "CMR1,Channel 1 Mode Register" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML1 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH1 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One period" textline " " bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" textline " " bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" ",/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." endif endif group.long (0x204+0x20)++0x3 line.long 0x00 "CDTY1,PWM Channel 1 Duty Cycle Register" hexmask.long.word 0x00 0.--15. 1. " CDTY ,Channel Duty-Cycle" wgroup.long (0x208+0x20)++0x3 line.long 0x00 "CDTYUPD1,PWM Channel 1 Duty Cycle Update Register" hexmask.long.word 0x00 0.--15. 1. " CDTYUPD ,Channel Duty-Cycle Update" group.long (0x20C+0x20)++0x03 line.long 0x00 "CPRD1,PWM Channel 1 Period Register" hexmask.long.word 0x00 0.--15. 1. " CPRD ,Channel Period" wgroup.long (0x210+0x20)++0x03 line.long 0x00 "CPRDUPD1,Channel 1 Update Register" hexmask.long.word 0x0 0.--15. 1. " CPRDUPD ,Channel Period Update" rgroup.long (0x214+0x20)++0x03 line.long 0x00 "CCNT1,PWM Channel 1 Counter Register" hexmask.long.word 0x0 0.--15. 1. " CNT ,Channel Counter Register" group.long (0x218+0x20)++0x03 line.long 0x00 "DT1,PWM Channel Dead Time Register" hexmask.long.word 0x00 16.--27. 1. " DTL ,Dead-Time Value for PWML1 Output" hexmask.long.word 0x00 0.--11. 1. " DTH ,Dead-Time Value for PWMH1 Output" wgroup.long (0x21C+0x20)++0x03 line.long 0x00 "DTUPD1,PWM Channel Dead Time Update Register" hexmask.long.word 0x00 16.--27. 1. " DTLUPD ,Dead-Time Value Update for PWML1 Output" hexmask.long.word 0x00 0.--11. 1. " DTHUPD ,Dead-Time Value Update for PWMH1 Output" sif (cpuis("ATSAMA5D4*")||cpuis("ATSAMA5D2?")) group.long (0x400+0x20)++0x03 line.long 0x00 "CMUPD1,PWM Channel Mode Update Register" bitfld.long 0x00 13. " CPOLINVUP ,Channel Polarity Inversion Update" "No effect,Inverted" bitfld.long 0x00 9. " CPOLUP ,Channel Polarity Update" "Low level,High level" endif tree.end tree "Channel 2" sif cpuis("ATSAMA5D4*") if ((per.l(ad:0x40020000+0x200+0x40)&0x100)==0x100) group.long (0x200+0x40)++0x3 line.long 0x00 "CMR2,Channel 2 Mode Register" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML2 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH2 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 11. " UPDS ,Update Selection (At the end of [One/half] period after writing the update register)" "One period,Half period" textline " " bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One and half period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." else group.long (0x200+0x40)++0x3 line.long 0x00 "CMR2,Channel 2 Mode Register" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML2 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH2 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 11. " UPDS ,Update Selection (At the end of [One/half] period after writing the update register)" "One period,One period" textline " " bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." endif elif cpuis("ATSAMA5D2?") if ((per.l(ad:0x40020000+0x200+0x40)&0x100)==0x100) group.long (0x200+0x40)++0x3 line.long 0x00 "CMR2,Channel 2 Mode Register" bitfld.long 0x00 19. " PPM ,Push-Pull Mode" "Disabled,Enabled" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML2 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH2 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 13. " TCTS ,Timer Counter Trigger Selection" "Comparator,Counter events" bitfld.long 0x00 12. " DPOLI ,Disabled Polarity Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 11. " UPDS ,Update Selection (At the end of [One/half] period after writing the update register)" "One period,Half period" bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One and half period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." else group.long (0x200+0x40)++0x3 line.long 0x00 "CMR2,Channel 2 Mode Register" bitfld.long 0x00 19. " PPM ,Push-Pull Mode" "Disabled,Enabled" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML2 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH2 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 13. " TCTS ,Timer Counter Trigger Selection" "Comparator,Counter events" bitfld.long 0x00 12. " DPOLI ,Disabled Polarity Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 11. " UPDS ,Update Selection (At the end of [One/half] period after writing the update register)" "One period,One period" bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." endif else if ((per.l(ad:0x40020000+0x200+0x40)&0x100)==0x100) group.long (0x200+0x40)++0x3 line.long 0x00 "CMR2,Channel 2 Mode Register" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML2 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH2 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One and half period" textline " " bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" textline " " bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." else group.long (0x200+0x40)++0x3 line.long 0x00 "CMR2,Channel 2 Mode Register" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML2 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH2 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One period" textline " " bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" textline " " bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" ",/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." endif endif group.long (0x204+0x40)++0x3 line.long 0x00 "CDTY2,PWM Channel 2 Duty Cycle Register" hexmask.long.word 0x00 0.--15. 1. " CDTY ,Channel Duty-Cycle" wgroup.long (0x208+0x40)++0x3 line.long 0x00 "CDTYUPD2,PWM Channel 2 Duty Cycle Update Register" hexmask.long.word 0x00 0.--15. 1. " CDTYUPD ,Channel Duty-Cycle Update" group.long (0x20C+0x40)++0x03 line.long 0x00 "CPRD2,PWM Channel 2 Period Register" hexmask.long.word 0x00 0.--15. 1. " CPRD ,Channel Period" wgroup.long (0x210+0x40)++0x03 line.long 0x00 "CPRDUPD2,Channel 2 Update Register" hexmask.long.word 0x0 0.--15. 1. " CPRDUPD ,Channel Period Update" rgroup.long (0x214+0x40)++0x03 line.long 0x00 "CCNT2,PWM Channel 2 Counter Register" hexmask.long.word 0x0 0.--15. 1. " CNT ,Channel Counter Register" group.long (0x218+0x40)++0x03 line.long 0x00 "DT2,PWM Channel Dead Time Register" hexmask.long.word 0x00 16.--27. 1. " DTL ,Dead-Time Value for PWML2 Output" hexmask.long.word 0x00 0.--11. 1. " DTH ,Dead-Time Value for PWMH2 Output" wgroup.long (0x21C+0x40)++0x03 line.long 0x00 "DTUPD2,PWM Channel Dead Time Update Register" hexmask.long.word 0x00 16.--27. 1. " DTLUPD ,Dead-Time Value Update for PWML2 Output" hexmask.long.word 0x00 0.--11. 1. " DTHUPD ,Dead-Time Value Update for PWMH2 Output" sif (cpuis("ATSAMA5D4*")||cpuis("ATSAMA5D2?")) group.long (0x400+0x40)++0x03 line.long 0x00 "CMUPD2,PWM Channel Mode Update Register" bitfld.long 0x00 13. " CPOLINVUP ,Channel Polarity Inversion Update" "No effect,Inverted" bitfld.long 0x00 9. " CPOLUP ,Channel Polarity Update" "Low level,High level" endif tree.end tree "Channel 3" sif cpuis("ATSAMA5D4*") if ((per.l(ad:0x40020000+0x200+0x60)&0x100)==0x100) group.long (0x200+0x60)++0x3 line.long 0x00 "CMR3,Channel 3 Mode Register" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML3 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH3 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 11. " UPDS ,Update Selection (At the end of [One/half] period after writing the update register)" "One period,Half period" textline " " bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One and half period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." else group.long (0x200+0x60)++0x3 line.long 0x00 "CMR3,Channel 3 Mode Register" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML3 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH3 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 11. " UPDS ,Update Selection (At the end of [One/half] period after writing the update register)" "One period,One period" textline " " bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." endif elif cpuis("ATSAMA5D2?") if ((per.l(ad:0x40020000+0x200+0x60)&0x100)==0x100) group.long (0x200+0x60)++0x3 line.long 0x00 "CMR3,Channel 3 Mode Register" bitfld.long 0x00 19. " PPM ,Push-Pull Mode" "Disabled,Enabled" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML3 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH3 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 13. " TCTS ,Timer Counter Trigger Selection" "Comparator,Counter events" bitfld.long 0x00 12. " DPOLI ,Disabled Polarity Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 11. " UPDS ,Update Selection (At the end of [One/half] period after writing the update register)" "One period,Half period" bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One and half period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." else group.long (0x200+0x60)++0x3 line.long 0x00 "CMR3,Channel 3 Mode Register" bitfld.long 0x00 19. " PPM ,Push-Pull Mode" "Disabled,Enabled" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML3 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH3 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 13. " TCTS ,Timer Counter Trigger Selection" "Comparator,Counter events" bitfld.long 0x00 12. " DPOLI ,Disabled Polarity Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 11. " UPDS ,Update Selection (At the end of [One/half] period after writing the update register)" "One period,One period" bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." endif else if ((per.l(ad:0x40020000+0x200+0x60)&0x100)==0x100) group.long (0x200+0x60)++0x3 line.long 0x00 "CMR3,Channel 3 Mode Register" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML3 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH3 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One and half period" textline " " bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" textline " " bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." else group.long (0x200+0x60)++0x3 line.long 0x00 "CMR3,Channel 3 Mode Register" bitfld.long 0x00 18. " DTLI ,Dead-Time PWML3 Output Inverted" "Not inverted,Inverted" bitfld.long 0x00 17. " DTHI ,Dead-Time PWMH3 Output Inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 16. " DTE ,Dead-Time Generator Enable" "Disabled,Enabled" bitfld.long 0x00 10. " CES ,Counter Event Selection (At the end of [One/One and half] period after writing the update register)" "One period,One period" textline " " bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" textline " " bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" ",/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,CLKA,CLKB,?..." endif endif group.long (0x204+0x60)++0x3 line.long 0x00 "CDTY3,PWM Channel 3 Duty Cycle Register" hexmask.long.word 0x00 0.--15. 1. " CDTY ,Channel Duty-Cycle" wgroup.long (0x208+0x60)++0x3 line.long 0x00 "CDTYUPD3,PWM Channel 3 Duty Cycle Update Register" hexmask.long.word 0x00 0.--15. 1. " CDTYUPD ,Channel Duty-Cycle Update" group.long (0x20C+0x60)++0x03 line.long 0x00 "CPRD3,PWM Channel 3 Period Register" hexmask.long.word 0x00 0.--15. 1. " CPRD ,Channel Period" wgroup.long (0x210+0x60)++0x03 line.long 0x00 "CPRDUPD3,Channel 3 Update Register" hexmask.long.word 0x0 0.--15. 1. " CPRDUPD ,Channel Period Update" rgroup.long (0x214+0x60)++0x03 line.long 0x00 "CCNT3,PWM Channel 3 Counter Register" hexmask.long.word 0x0 0.--15. 1. " CNT ,Channel Counter Register" group.long (0x218+0x60)++0x03 line.long 0x00 "DT3,PWM Channel Dead Time Register" hexmask.long.word 0x00 16.--27. 1. " DTL ,Dead-Time Value for PWML3 Output" hexmask.long.word 0x00 0.--11. 1. " DTH ,Dead-Time Value for PWMH3 Output" wgroup.long (0x21C+0x60)++0x03 line.long 0x00 "DTUPD3,PWM Channel Dead Time Update Register" hexmask.long.word 0x00 16.--27. 1. " DTLUPD ,Dead-Time Value Update for PWML3 Output" hexmask.long.word 0x00 0.--11. 1. " DTHUPD ,Dead-Time Value Update for PWMH3 Output" sif (cpuis("ATSAMA5D4*")||cpuis("ATSAMA5D2?")) group.long (0x400+0x60)++0x03 line.long 0x00 "CMUPD3,PWM Channel Mode Update Register" bitfld.long 0x00 13. " CPOLINVUP ,Channel Polarity Inversion Update" "No effect,Inverted" bitfld.long 0x00 9. " CPOLUP ,Channel Polarity Update" "Low level,High level" endif tree.end width 12. sif cpuis("ATSAMA5D2?") tree "Trigger 1" group.long 0x42C++0x07 line.long 0x00 "PWM_ETRG1,PWM External Trigger Register" bitfld.long 0x00 31. " RFEN ,Recoverable Fault Enable" "Disabled,Enabled" bitfld.long 0x00 30. " TRGSRC ,Trigger Source" "PWMTRGx,ACC" bitfld.long 0x00 29. " TRGFILT ,Filtered input" "Not filtered,Filtered" textline " " bitfld.long 0x00 28. " TRGEDGE ,Edge Selection" "FALLING_ZERO,RISING_ONE" bitfld.long 0x00 24.--25. " TRGMODE ,External Trigger Mode" "OFF,MODE1,MODE2,MODE3" hexmask.long.tbyte 0x00 0.--23. 1. " MAXCNT ,Maximum Counter value" line.long 0x04 "PWM_LEBR1,PWM Leading-Edge Blanking Register" bitfld.long 0x04 19. " PWMHREN ,PWMH Rising Edge Enable" "Disabled,Enabled" bitfld.long 0x04 18. " PWMHFEN ,PWMH Falling Edge Enable" "Disabled,Enabled" bitfld.long 0x04 17. " PWMLREN ,PWML Rising Edge Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " PWMLFEN ,PWML Falling Edge Enable" "Disabled,Enabled" hexmask.long.byte 0x04 0.--6. 1. " LEBDELAY ,Leading-Edge Blanking Delay for TRGIN1" tree.end tree "Trigger 2" group.long 0x44C++0x07 line.long 0x00 "PWM_ETRG2,PWM External Trigger Register" bitfld.long 0x00 31. " RFEN ,Recoverable Fault Enable" "Disabled,Enabled" bitfld.long 0x00 30. " TRGSRC ,Trigger Source" "PWMTRGx,ACC" bitfld.long 0x00 29. " TRGFILT ,Filtered input" "Not filtered,Filtered" textline " " bitfld.long 0x00 28. " TRGEDGE ,Edge Selection" "FALLING_ZERO,RISING_ONE" bitfld.long 0x00 24.--25. " TRGMODE ,External Trigger Mode" "OFF,MODE1,MODE2,MODE3" hexmask.long.tbyte 0x00 0.--23. 1. " MAXCNT ,Maximum Counter value" line.long 0x04 "PWM_LEBR2,PWM Leading-Edge Blanking Register" bitfld.long 0x04 19. " PWMHREN ,PWMH Rising Edge Enable" "Disabled,Enabled" bitfld.long 0x04 18. " PWMHFEN ,PWMH Falling Edge Enable" "Disabled,Enabled" bitfld.long 0x04 17. " PWMLREN ,PWML Rising Edge Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " PWMLFEN ,PWML Falling Edge Enable" "Disabled,Enabled" hexmask.long.byte 0x04 0.--6. 1. " LEBDELAY ,Leading-Edge Blanking Delay for TRGIN2" tree.end endif width 0xB tree "PDC (Peripheral DMA Controller)" base ad:0x40020000 width 9. group.long 0x100++0x01F line.long 0x00 "PWM_RPR,Receive Pointer Register" line.long 0x04 "PWM_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "PWM_TPR,Transmit Pointer Register" line.long 0x0c "PWM_TCR,Transmit Counter Register" hexmask.long.word 0x0C 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "PWM_RNPR,Receive Next Pointer Register" line.long 0x14 "PWM_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "PWM_TNPR,Transmit Next Pointer Register" line.long 0x1c "PWM_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "PWM_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disable" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enable" bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disable" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enable" rgroup.long 0x124++0x03 line.long 0x00 "PWM_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0x0B tree.end tree.end tree "UDP (USB Device Port)" base ad:0x40034000 width 14. rgroup.long 0x00++0x03 line.long 0x00 "UDP_FRM_NUM,UDP Frame Number Register" bitfld.long 0x00 17. " FRM_OK ,Frame OK" "SOF_PID,SOF_EOP" bitfld.long 0x00 16. " FRM_ERR ,Frame Error" "No error,Error" textline " " hexmask.long.word 0x00 0.--10. 1. " FRM_NUM[10:0] ,Frame Number as Defined In the Packet Field Formats" group.long 0x04++0x7 line.long 0x00 "UDP_GLB_STAT,UDP Global State Register" bitfld.long 0x00 4. " RMWUPE ,Remote Wake Up Enable" "Disabled,Enabled" bitfld.long 0x00 3. " RSMINPR ,A Resume Has Been Sent to the Host" "No effect,Sent" textline " " bitfld.long 0x00 2. " ESR ,Enable Send Resume" "Disabled,Enabled" bitfld.long 0x00 1. " CONFG ,Configured" "Not configured,Configured" textline " " bitfld.long 0x00 0. " FADDEN ,Function Address Enable" "Disabled,Enabled" line.long 0x4 "UDP_FADDR,UDP Function Address Register" bitfld.long 0x4 8. " FEN ,Function Enable" "Disabled,Enabled" hexmask.long.byte 0x4 0.--6. 1. " FADD[6:0] ,Function Address Value" group.long 0x18++0x3 line.long 0x0 "UDP_IMR,UDP Interrupt Mask Register" setclrfld.long 0x0 13. -0x08 13. -0x4 13. " WAKEUP_set/clr ,USB Bus WAKEUP Interrupt" "Masked,Not masked" rbitfld.long 0x0 12. " BIT12 ,UDP_IMR Bit 12" "Masked,Not masked" textline " " setclrfld.long 0x0 11. -0x08 11. -0x4 11. " SOFINT_set/clr ,Mask Start Of Frame Interrupt" "Masked,Not masked" sif cpuis("ATSAM4E*")||cpuis("ATSAM4S*")||cpuis("ATSAMG55") setclrfld.long 0x0 10. -0x08 10. -0x4 10. " EXTRSM_set/clr ,Mask External Resume Interrupt" "Masked,Not masked" endif textline " " setclrfld.long 0x0 9. -0x08 9. -0x4 9. " RXRSM_set/clr ,Mask UDP Resume Interrupt" "Masked,Not masked" setclrfld.long 0x0 8. -0x08 8. -0x4 8. " RXSUSP_set/clr ,Mask UDP Suspend Interrupt" "Masked,Not masked" textline " " sif !cpuis("ATSAMG55") setclrfld.long 0x0 7. -0x08 7. -0x4 7. " EP7INT_set/clr ,Mask Endpoint 7 Interrupt" "Masked,Not masked" setclrfld.long 0x0 6. -0x08 6. -0x4 6. " EP6INT_set/clr ,Mask Endpoint 6 Interrupt" "Masked,Not masked" endif textline " " setclrfld.long 0x0 5. -0x08 5. -0x4 5. " EP5INT_set/clr ,Mask Endpoint 5 Interrupt" "Masked,Not masked" setclrfld.long 0x0 4. -0x08 4. -0x4 4. " EP4INT_set/clr ,Mask Endpoint 4 Interrupt" "Masked,Not masked" textline " " setclrfld.long 0x0 3. -0x08 3. -0x4 3. " EP3INT_set/clr ,Mask Endpoint 3 Interrupt" "Masked,Not masked" setclrfld.long 0x0 2. -0x08 2. -0x4 2. " EP2INT_set/clr ,Mask Endpoint 2 Interrupt" "Masked,Not masked" textline " " setclrfld.long 0x0 1. -0x08 1. -0x4 1. " EP1INT_set/clr ,Mask Endpoint 1 Interrupt" "Masked,Not masked" setclrfld.long 0x0 0. -0x08 0. -0x4 0. " EP0INT_set/clr ,Mask Endpoint 0 Interrupt" "Masked,Not masked" rgroup.long 0x1C++0x3 line.long 0x0 "UDP_ISR,UDP Interrupt Status Register" bitfld.long 0x0 13. " WAKEUP ,UDP Resume Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x0 12. " ENDBUSRES ,End of BUS Reset Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 11. " SOFINT ,Start of Frame Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x0 10. " EXTRSM ,External Resume Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 9. " RXRSM ,UDP Resume Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x0 8. " RXSUSP ,UDP Suspend Interrupt Status" "No interrupt,Interrupt" textline " " sif !cpuis("ATSAMG55") bitfld.long 0x0 7. " EP7INT ,Endpoint 7 Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x0 6. " EP6INT ,Endpoint 6 Interrupt Status" "No interrupt,Interrupt" endif textline " " bitfld.long 0x0 5. " EP5INT ,Endpoint 5 Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x0 4. " EP4INT ,Endpoint 4 Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 3. " EP3INT ,Endpoint 3 Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x0 2. " EP2INT ,Endpoint 2 Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 1. " EP1INT ,Endpoint 1 Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x0 0. " EP0INT ,Endpoint 0 Interrupt Status" "No interrupt,Interrupt" wgroup.long 0x20++0x03 line.long 0x00 "UDP_ICR,UDP Interrupt Clear Register" bitfld.long 0x0 13. " WAKEUP ,Clear Wakeup Interrupt" "No effect,Clear" bitfld.long 0x00 12. " ENDBUSRES ,Clear End of BUS Reset Interrupt" "No effect,Clear" textline " " bitfld.long 0x0 11. " SOFINT ,Clear Start Of Frame Interrupt" "No effect,Clear" bitfld.long 0x0 10. " EXTRSM ,Clear External Resume Interrupt" "No effect,Clear" textline " " bitfld.long 0x00 9. " RXRSM ,Clear UDP Resume Interrupt" "No effect,Clear" bitfld.long 0x00 8. " RXSUSP ,Clear UDP Suspend Interrupt" "No effect,Clear" group.long 0x28++0x03 line.long 0x00 "UDP_RST_EP,UDP Reset Endpoint Register" sif !cpuis("ATSAMG55") bitfld.long 0x00 7. " EP7 ,Reset Endpoint 7" "No reset,Reset" bitfld.long 0x00 6. " EP46 ,Reset Endpoint 6" "No reset,Reset" endif textline " " bitfld.long 0x00 5. " EP5 ,Reset Endpoint 5" "No reset,Reset" bitfld.long 0x00 4. " EP4 ,Reset Endpoint 4" "No reset,Reset" textline " " bitfld.long 0x00 3. " EP3 ,Reset Endpoint 3" "No reset,Reset" bitfld.long 0x00 2. " EP2 ,Reset Endpoint 2" "No reset,Reset" textline " " bitfld.long 0x00 1. " EP1 ,Reset Endpoint 1" "No reset,Reset" bitfld.long 0x00 0. " EP0 ,Reset Endpoint 0" "No reset,Reset" width 11. tree "Endpoint Control and Status Registers" if (((d.l((ad:0x40034000+0x30+0x0)))&0x700)==0x000) group.long (0x30+0x0)++0x3 line.long 0x0 "UDP_CSR0,UDP Endpoint 0 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,,Bulk OUT,Interrupt OUT,,,Bulk IN,Interrupt IN" bitfld.long 0x0 7. " DIR ,Transfer Direction" "Data OUT,Data IN" textline " " bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced" bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" elif ((d.l((ad:0x40034000+0x30+0x0)))&0x700)==(0x200||0x600) group.long (0x30+0x0)++0x3 line.long 0x0 "UDP_CSR0,UDP Endpoint 0 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,,Bulk OUT,Interrupt OUT,,,Bulk IN,Interrupt IN" textline " " bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced" bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" else group.long (0x30+0x0)++0x3 line.long 0x0 "UDP_CSR0,UDP Endpoint 0 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,,Bulk OUT,Interrupt OUT,,,Bulk IN,Interrupt IN" textline " " bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" endif if ((d.l((ad:0x40034000+0x30+0x4)))&0x700)==(0x100||0x500) group.long (0x30+0x4)++0x3 line.long 0x0 "UDP_CSR1,UDP Endpoint 1 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" ",Isochronous OUT,Bulk OUT,Interrupt OUT,,Isochronous IN,Bulk IN,Interrupt IN" bitfld.long 0x0 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced" bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " ISOERROR ,CRC Error in an Isochronous Transfer" "No error,Error" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" elif ((d.l((ad:0x40034000+0x30+0x4)))&0x700)==(0x200||0x600) group.long (0x30+0x4)++0x3 line.long 0x0 "UDP_CSR1,UDP Endpoint 1 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" ",Isochronous OUT,Bulk OUT,Interrupt OUT,,Isochronous IN,Bulk IN,Interrupt IN" bitfld.long 0x0 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced" bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" else group.long (0x30+0x4)++0x3 line.long 0x0 "UDP_CSR1,UDP Endpoint 1 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" ",Isochronous OUT,Bulk OUT,Interrupt OUT,,Isochronous IN,Bulk IN,Interrupt IN" bitfld.long 0x0 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" endif if ((d.l((ad:0x40034000+0x30+0x8)))&0x700)==(0x100||0x500) group.long (0x30+0x8)++0x3 line.long 0x0 "UDP_CSR2,UDP Endpoint 2 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" ",Isochronous OUT,Bulk OUT,Interrupt OUT,,Isochronous IN,Bulk IN,Interrupt IN" bitfld.long 0x0 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced" bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " ISOERROR ,CRC Error in an Isochronous Transfer" "No error,Error" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" elif ((d.l((ad:0x40034000+0x30+0x8)))&0x700)==(0x200||0x600) group.long (0x30+0x8)++0x3 line.long 0x0 "UDP_CSR2,UDP Endpoint 2 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" ",Isochronous OUT,Bulk OUT,Interrupt OUT,,Isochronous IN,Bulk IN,Interrupt IN" bitfld.long 0x0 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced" bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" else group.long (0x30+0x8)++0x3 line.long 0x0 "UDP_CSR2,UDP Endpoint 2 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" ",Isochronous OUT,Bulk OUT,Interrupt OUT,,Isochronous IN,Bulk IN,Interrupt IN" bitfld.long 0x0 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" endif if (((d.l((ad:0x40034000+0x30+0xC)))&0x700)==0x000) group.long (0x30+0xC)++0x3 line.long 0x0 "UDP_CSR3,UDP Endpoint 3 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,,Bulk OUT,Interrupt OUT,,,Bulk IN,Interrupt IN" bitfld.long 0x0 7. " DIR ,Transfer Direction" "Data OUT,Data IN" textline " " bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced" bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" elif ((d.l((ad:0x40034000+0x30+0xC)))&0x700)==(0x200||0x600) group.long (0x30+0xC)++0x3 line.long 0x0 "UDP_CSR3,UDP Endpoint 3 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,,Bulk OUT,Interrupt OUT,,,Bulk IN,Interrupt IN" textline " " bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced" bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" else group.long (0x30+0xC)++0x3 line.long 0x0 "UDP_CSR3,UDP Endpoint 3 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,,Bulk OUT,Interrupt OUT,,,Bulk IN,Interrupt IN" textline " " bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" endif if ((d.l((ad:0x40034000+0x30+0x10)))&0x700)==(0x100||0x500) group.long (0x30+0x10)++0x3 line.long 0x0 "UDP_CSR4,UDP Endpoint 4 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" ",Isochronous OUT,Bulk OUT,Interrupt OUT,,Isochronous IN,Bulk IN,Interrupt IN" bitfld.long 0x0 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced" bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " ISOERROR ,CRC Error in an Isochronous Transfer" "No error,Error" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" elif ((d.l((ad:0x40034000+0x30+0x10)))&0x700)==(0x200||0x600) group.long (0x30+0x10)++0x3 line.long 0x0 "UDP_CSR4,UDP Endpoint 4 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" ",Isochronous OUT,Bulk OUT,Interrupt OUT,,Isochronous IN,Bulk IN,Interrupt IN" bitfld.long 0x0 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced" bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" else group.long (0x30+0x10)++0x3 line.long 0x0 "UDP_CSR4,UDP Endpoint 4 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" ",Isochronous OUT,Bulk OUT,Interrupt OUT,,Isochronous IN,Bulk IN,Interrupt IN" bitfld.long 0x0 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" endif if ((d.l((ad:0x40034000+0x30+0x14)))&0x700)==(0x100||0x500) group.long (0x30+0x14)++0x3 line.long 0x0 "UDP_CSR5,UDP Endpoint 5 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" ",Isochronous OUT,Bulk OUT,Interrupt OUT,,Isochronous IN,Bulk IN,Interrupt IN" bitfld.long 0x0 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced" bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " ISOERROR ,CRC Error in an Isochronous Transfer" "No error,Error" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" elif ((d.l((ad:0x40034000+0x30+0x14)))&0x700)==(0x200||0x600) group.long (0x30+0x14)++0x3 line.long 0x0 "UDP_CSR5,UDP Endpoint 5 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" ",Isochronous OUT,Bulk OUT,Interrupt OUT,,Isochronous IN,Bulk IN,Interrupt IN" bitfld.long 0x0 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced" bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" else group.long (0x30+0x14)++0x3 line.long 0x0 "UDP_CSR5,UDP Endpoint 5 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" ",Isochronous OUT,Bulk OUT,Interrupt OUT,,Isochronous IN,Bulk IN,Interrupt IN" bitfld.long 0x0 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" endif if ((d.l((ad:0x40034000+0x30+0x18)))&0x700)==(0x100||0x500) group.long (0x30+0x18)++0x3 line.long 0x0 "UDP_CSR6,UDP Endpoint 6 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" ",Isochronous OUT,Bulk OUT,Interrupt OUT,,Isochronous IN,Bulk IN,Interrupt IN" bitfld.long 0x0 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced" bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " ISOERROR ,CRC Error in an Isochronous Transfer" "No error,Error" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" elif ((d.l((ad:0x40034000+0x30+0x18)))&0x700)==(0x200||0x600) group.long (0x30+0x18)++0x3 line.long 0x0 "UDP_CSR6,UDP Endpoint 6 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" ",Isochronous OUT,Bulk OUT,Interrupt OUT,,Isochronous IN,Bulk IN,Interrupt IN" bitfld.long 0x0 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced" bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" else group.long (0x30+0x18)++0x3 line.long 0x0 "UDP_CSR6,UDP Endpoint 6 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" ",Isochronous OUT,Bulk OUT,Interrupt OUT,,Isochronous IN,Bulk IN,Interrupt IN" bitfld.long 0x0 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" endif if ((d.l((ad:0x40034000+0x30+0x1C)))&0x700)==(0x100||0x500) group.long (0x30+0x1C)++0x3 line.long 0x0 "UDP_CSR7,UDP Endpoint 7 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" ",Isochronous OUT,Bulk OUT,Interrupt OUT,,Isochronous IN,Bulk IN,Interrupt IN" bitfld.long 0x0 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced" bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " ISOERROR ,CRC Error in an Isochronous Transfer" "No error,Error" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" elif ((d.l((ad:0x40034000+0x30+0x1C)))&0x700)==(0x200||0x600) group.long (0x30+0x1C)++0x3 line.long 0x0 "UDP_CSR7,UDP Endpoint 7 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" ",Isochronous OUT,Bulk OUT,Interrupt OUT,,Isochronous IN,Bulk IN,Interrupt IN" bitfld.long 0x0 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x0 5. " FORCESTALL ,Force Stall" "No effect,Forced" bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" else group.long (0x30+0x1C)++0x3 line.long 0x0 "UDP_CSR7,UDP Endpoint 7 Control and Status Register" hexmask.long.word 0x0 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x0 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " rbitfld.long 0x0 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x0 8.--10. " EPTYPE[2:0] ,Endpoint Type" ",Isochronous OUT,Bulk OUT,Interrupt OUT,,Isochronous IN,Bulk IN,Interrupt IN" bitfld.long 0x0 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x0 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x0 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x0 2. " RXSETUP ,Received Setup" "Not recieved,Recieved" bitfld.long 0x0 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x0 0. " TXCOMP ,Generates an IN Packet with Data Previously Written in the DPR" "Not acknowledged,Acknowledged" endif tree.end tree "UDP Endpoint FIFO Data Registers" textline " " hgroup.long 0x50++0x03 hide.long 0x00 "UDP_FDR0,UDP Endpoint 0 FIFO Data Register" in hgroup.long 0x54++0x03 hide.long 0x00 "UDP_FDR1,UDP Endpoint 1 FIFO Data Register" in hgroup.long 0x58++0x03 hide.long 0x00 "UDP_FDR2,UDP Endpoint 2 FIFO Data Register" in hgroup.long 0x5C++0x03 hide.long 0x00 "UDP_FDR3,UDP Endpoint 3 FIFO Data Register" in hgroup.long 0x60++0x03 hide.long 0x00 "UDP_FDR4,UDP Endpoint 4 FIFO Data Register" in hgroup.long 0x64++0x03 hide.long 0x00 "UDP_FDR5,UDP Endpoint 5 FIFO Data Register" in hgroup.long 0x68++0x03 hide.long 0x00 "UDP_FDR6,UDP Endpoint 6 FIFO Data Register" in hgroup.long 0x6C++0x03 hide.long 0x00 "UDP_FDR7,UDP Endpoint 7 FIFO Data Register" in ; base vm:0x0 ; wgroup 0x0++0x0 ; base ad:0x40034000 tree.end textline " " width 14. group.long 0x74++0x03 line.long 0x00 "UDP_TXVC,UDP Transceiver Control Register" bitfld.long 0x00 9. " PUON ,Pullup On" "Disconnected,Connected" bitfld.long 0x00 8. " TXVDIS ,Transceiver Disable" "Enabled,Disabled" width 0xb tree.end tree "ACC (Analog Comparator Controller)" base ad:0x40040000 width 13. wgroup.long 0x00++0x03 line.long 0x00 "CR,ACC Control Register" bitfld.long 0x00 0. " SWRST ,Software reset" "No effect,Reset" if ((per.l(ad:0x40040000+0xE4)&0x01)==0x00) group.long 0x04++0x03 line.long 0x00 "MR,ACC Mode Register" bitfld.long 0x00 14. " FE ,Fault enable" "Disabled,Enabled" bitfld.long 0x00 13. " SELFS ,Selection of fault source" "CE,Analog comparator" bitfld.long 0x00 12. " INV ,Invert comparator output" "Disabled,Enabled" bitfld.long 0x00 9.--10. " EDGETYP ,EDGE TYPE" "Rising,Falling,Any,?..." newline bitfld.long 0x00 8. " ACEN ,Analog comparator enable" "Disabled,Enabled" newline sif cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*") bitfld.long 0x00 4.--6. " SELPLUS ,Selection for PLUS comparator input" "AFE0_AD0,AFE0_AD1,AFE0_AD2,AFE0_AD3,AFE0_AD4,AFE0_AD5,AFE1_AD0,AFE1_AD1" bitfld.long 0x00 0.--2. " SELMINUS ,Selection for MINUS comparator input" "TS,VREFP,DAC0,DAC1,AFE0_AD0,AFE0_AD1,AFE0_AD2,AFE0_AD3" else bitfld.long 0x00 4.--6. " SELPLUS ,Selection for PLUS comparator input" "AD0,AD1,AD2,AD3,AD4,AD5,AD6,AD7" bitfld.long 0x00 0.--2. " SELMINUS ,Selection for MINUS comparator input" "TS,ADVREF,DAC0,DAC1,AD0,AD1,AD2,AD3" endif else rgroup.long 0x04++0x03 line.long 0x00 "MR,ACC Mode Register" bitfld.long 0x00 14. " FE ,Fault enable" "Disabled,Enabled" bitfld.long 0x00 13. " SELFS ,Selection of fault source" "CE,Analog comparator" bitfld.long 0x00 12. " INV ,Invert comparator output" "Disabled,Enabled" bitfld.long 0x00 9.--10. " EDGETYP ,EDGE TYPE" "Rising,Falling,Any,?..." newline bitfld.long 0x00 8. " ACEN ,Analog comparator enable" "Disabled,Enabled" newline sif cpuis("ATSAMV7*")||cpuis("ATSAMS7*")||cpuis("ATSAME70*") bitfld.long 0x00 4.--6. " SELPLUS ,Selection for PLUS comparator input" "AFE0_AD0,AFE0_AD1,AFE0_AD2,AFE0_AD3,AFE0_AD4,AFE0_AD5,AFE1_AD0,AFE1_AD1" bitfld.long 0x00 0.--2. " SELMINUS ,Selection for MINUS comparator input" "TS,VREFP,DAC0,DAC1,AFE0_AD0,AFE0_AD1,AFE0_AD2,AFE0_AD3" else bitfld.long 0x00 4.--6. " SELPLUS ,Selection for PLUS comparator input" "AD0,AD1,AD2,AD3,AD4,AD5,AD6,AD7" bitfld.long 0x00 0.--2. " SELMINUS ,Selection for MINUS comparator input" "TS,ADVREF,DAC0,DAC1,AD0,AD1,AD2,AD3" endif endif group.long 0x2C++0x03 line.long 0x00 "IMR_SET/CLR,ACC Interrupt Mask Set/Clear Register" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CE ,Comparison edge" "Masked,Unmasked" newline hgroup.long 0x30++0x03 hide.long 0x00 "ISR,ACC Interrupt Status Register" in newline if ((per.l(ad:0x40040000+0xE4)&0x01)==0x00) group.long 0x94++0x03 line.long 0x00 "ACR,ACC Analog Control Register" bitfld.long 0x00 1.--2. " HYST ,Hysteresis selection" "0mV,15-50mV,15-50mV,30-90mV" bitfld.long 0x00 0. " ISEL ,Current selection" "Low power,High speed" else rgroup.long 0x94++0x03 line.long 0x00 "ACR,ACC Analog Control Register" bitfld.long 0x00 1.--2. " HYST ,Hysteresis selection" "0mV,15-50mV,15-50mV,30-90mV" bitfld.long 0x00 0. " ISEL ,Current selection" "Low power,High speed" endif group.long 0xE4++0x03 line.long 0x00 "WPMR,ACC Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write protect KEY" bitfld.long 0x00 0. " WPEN ,Write protect enable" "Disabled,Enabled" newline hgroup.long 0xE8++0x03 hide.long 0x00 "WPSR,ACC Write Protect Status Register" in width 0x0B tree.end tree "ADC (Analog-to-Digital Converter)" base ad:0x40038000 width 11. wgroup.long 0x00++0x03 line.long 0x00 "ADC_CR,ADC Control Register" bitfld.long 0x00 3. " AUTOCAL ,Automatic Calibration of ADC" "No effect,Calibrate" bitfld.long 0x00 1. " START ,Conversion Start" "No effect,Start" bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset" if ((d.l(ad:0x40038000+0xE4)&0x01)==0x00) group.long 0x04++0x03 line.long 0x00 "ADC_MR,ADC Mode Register" bitfld.long 0x00 31. " USEQ ,User Sequence Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " TRANSFER ,TRANSFER" ",,2,?..." bitfld.long 0x00 24.--27. " TRACKTIM ,Tracking Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " ANACH ,Analog Change" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " SETTLING ,Analog Settling Time" "3,5,9,17" bitfld.long 0x00 16.--19. " STARTUP ,Start Up Time" "0,8,16,24,64,80,96,112,512,576,640,704,768,832,896,960" hexmask.long.byte 0x00 8.--15. 1. " PRESCAL ,Prescaler Rate Selection" bitfld.long 0x00 7. " FREERUN ,Free Run Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " FWUP ,Fast Wake Up" "Disabled,Enabled" bitfld.long 0x00 5. " SLEEP ,Sleep Mode" "Disabled,Enabled" bitfld.long 0x00 1.--3. " TRGSEL ,Trigger Selection" "External,TIO Output of the TC C0,TIO Output of the TC C1,TIO Output of the TC C2,PWM Event Line 0,PWM Event Line 1,?..." bitfld.long 0x00 0. " TRGEN ,Trigger Enable" "Disabled,Enabled" if ((d.l(ad:0x40038000+0x04)&0x80000000)==0x80000000) sif (cpuis("ATSAM4S*A")) group.long 0x08++0x07 line.long 0x00 "ADC_SEQ1R,ADC Channel Sequence 1 Register" bitfld.long 0x00 28.--31. " USCH8 ,User Sequence Number 8" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x00 24.--27. " USCH7 ,User Sequence Number 7" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x00 20.--23. " USCH6 ,User Sequence Number 6" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x00 16.--19. " USCH5 ,User Sequence Number 5" "0,1,2,3,4,5,6,7,?..." textline " " bitfld.long 0x00 12.--15. " USCH4 ,User Sequence Number 4" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x00 8.--11. " USCH3 ,User Sequence Number 3" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x00 4.--7. " USCH2 ,User Sequence Number 2" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x00 0.--3. " USCH1 ,User Sequence Number 1" "0,1,2,3,4,5,6,7,?..." line.long 0x04 "ADC_SEQ2R,ADC Channel Sequence 2 Register" bitfld.long 0x04 24.--27. " USCH15 ,User Sequence Number 15" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x04 20.--23. " USCH14 ,User Sequence Number 14" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x04 16.--19. " USCH13 ,User Sequence Number 13" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x04 12.--15. " USCH12 ,User Sequence Number 12" "0,1,2,3,4,5,6,7,?..." textline " " bitfld.long 0x04 8.--11. " USCH11 ,User Sequence Number 11" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x04 4.--7. " USCH10 ,User Sequence Number 10" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x04 0.--3. " USCH9 ,User Sequence Number 9" "0,1,2,3,4,5,6,7,?..." elif (cpuis("ATSAM4S*B")) group.long 0x08++0x07 line.long 0x00 "ADC_SEQ1R,ADC Channel Sequence 1 Register" bitfld.long 0x00 28.--31. " USCH8 ,User Sequence Number 8" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x00 24.--27. " USCH7 ,User Sequence Number 7" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x00 20.--23. " USCH6 ,User Sequence Number 6" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x00 16.--19. " USCH5 ,User Sequence Number 5" "0,1,2,3,4,5,6,7,8,9,10,?..." textline " " bitfld.long 0x00 12.--15. " USCH4 ,User Sequence Number 4" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x00 8.--11. " USCH3 ,User Sequence Number 3" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x00 4.--7. " USCH2 ,User Sequence Number 2" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x00 0.--3. " USCH1 ,User Sequence Number 1" "0,1,2,3,4,5,6,7,8,9,10,?..." line.long 0x04 "ADC_SEQ2R,ADC Channel Sequence 2 Register" bitfld.long 0x04 24.--27. " USCH15 ,User Sequence Number 15" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x04 20.--23. " USCH14 ,User Sequence Number 14" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x04 16.--19. " USCH13 ,User Sequence Number 13" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x04 12.--15. " USCH12 ,User Sequence Number 12" "0,1,2,3,4,5,6,7,8,9,10,?..." textline " " bitfld.long 0x04 8.--11. " USCH11 ,User Sequence Number 11" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x04 4.--7. " USCH10 ,User Sequence Number 10" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x04 0.--3. " USCH9 ,User Sequence Number 9" "0,1,2,3,4,5,6,7,8,9,10,?..." else group.long 0x08++0x07 line.long 0x00 "ADC_SEQ1R,ADC Channel Sequence 1 Register" bitfld.long 0x00 28.--31. " USCH8 ,User Sequence Number 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " USCH7 ,User Sequence Number 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " USCH6 ,User Sequence Number 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " USCH5 ,User Sequence Number 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " USCH4 ,User Sequence Number 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " USCH3 ,User Sequence Number 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " USCH2 ,User Sequence Number 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " USCH1 ,User Sequence Number 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "ADC_SEQ2R,ADC Channel Sequence 2 Register" bitfld.long 0x04 24.--27. " USCH15 ,User Sequence Number 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 20.--23. " USCH14 ,User Sequence Number 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--19. " USCH13 ,User Sequence Number 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 12.--15. " USCH12 ,User Sequence Number 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 8.--11. " USCH11 ,User Sequence Number 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " USCH10 ,User Sequence Number 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " USCH9 ,User Sequence Number 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif else hgroup.long 0x08++0x03 hide.long 0x00 "ADC_SEQ1R,ADC Channel Sequence 1 Register" textline " " hide.long 0x04 "ADC_SEQ2R,ADC Channel Sequence 2 Register" textline " " endif group.long 0x18++0x03 line.long 0x00 "ADC_CHSR,ADC Channel Status Register" sif (cpuis("ATSAM4S*C")) setclrfld.long 0x00 15. -0x08 15. -0x04 15. " CH15_set/clr ,Channel 15 Status" "Disabled,Enabled" setclrfld.long 0x00 14. -0x08 14. -0x04 14. " CH14_set/clr ,Channel 14 Status" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " CH13_set/clr ,Channel 13 Status" "Disabled,Enabled" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " CH12_set/clr ,Channel 12 Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. -0x08 11. -0x04 11. " CH11_set/clr ,Channel 11 Status" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " CH10_set/clr ,Channel 10 Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " CH9_set/clr ,Channel 9 Status" "Disabled,Enabled" setclrfld.long 0x00 8. -0x08 8. -0x04 8. " CH8_set/clr ,Channel 8 Status" "Disabled,Enabled" textline " " elif (cpuis("ATSAM4S*B")) setclrfld.long 0x00 10. -0x08 10. -0x04 10. " CH10_set/clr ,Channel 10 Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " CH9_set/clr ,Channel 9 Status" "Disabled,Enabled" setclrfld.long 0x00 8. -0x08 8. -0x04 8. " CH8_set/clr ,Channel 8 Status" "Disabled,Enabled" textline " " endif setclrfld.long 0x00 7. -0x08 7. -0x04 7. " CH7_set/clr ,Channel 7 Status" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " CH6_set/clr ,Channel 6 Status" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " CH5_set/clr ,Channel 5 Status" "Disabled,Enabled" setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CH4_set/clr ,Channel 4 Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CH3_set/clr ,Channel 3 Status" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 4. -0x04 2. " CH2_set/clr ,Channel 2 Status" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CH1_set/clr ,Channel 1 Status" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CH0_set/clr ,Channel 0 Status" "Disabled,Enabled" else rgroup.long 0x04++0x03 line.long 0x00 "ADC_MR,ADC Mode Register" bitfld.long 0x00 31. " USEQ ,User Sequence Enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " TRANSFER ,TRANSFER" ",,2,?..." bitfld.long 0x00 24.--27. " TRACKTIM ,Tracking Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 23. " ANACH ,Analog Change" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " SETTLING ,Analog Settling Time" "3,5,9,17" bitfld.long 0x00 16.--19. " STARTUP ,Start Up Time" "0,8,16,24,64,80,96,112,512,576,640,704,768,832,896,960" hexmask.long.byte 0x00 8.--15. 1. " PRESCAL ,Prescaler Rate Selection" bitfld.long 0x00 7. " FREERUN ,Free Run Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " FWUP ,Fast Wake Up" "Disabled,Enabled" bitfld.long 0x00 5. " SLEEP ,Sleep Mode" "Disabled,Enabled" bitfld.long 0x00 1.--3. " TRGSEL ,Trigger Selection" "External,TIO Output of the TC C0,TIO Output of the TC C1,TIO Output of the TC C2,PWM Event Line 0,PWM Event Line 1,?..." bitfld.long 0x00 0. " TRGEN ,Trigger Enable" "Disabled,Enabled" if ((d.l(ad:0x40038000+0x04)&0x80000000)==0x80000000) sif (cpuis("ATSAM4S*A")) rgroup.long 0x08++0x07 line.long 0x00 "ADC_SEQ1R,ADC Channel Sequence 1 Register" bitfld.long 0x00 28.--31. " USCH8 ,User Sequence Number 8" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x00 24.--27. " USCH7 ,User Sequence Number 7" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x00 20.--23. " USCH6 ,User Sequence Number 6" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x00 16.--19. " USCH5 ,User Sequence Number 5" "0,1,2,3,4,5,6,7,?..." textline " " bitfld.long 0x00 12.--15. " USCH4 ,User Sequence Number 4" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x00 8.--11. " USCH3 ,User Sequence Number 3" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x00 4.--7. " USCH2 ,User Sequence Number 2" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x00 0.--3. " USCH1 ,User Sequence Number 1" "0,1,2,3,4,5,6,7,?..." line.long 0x04 "ADC_SEQ2R,ADC Channel Sequence 2 Register" bitfld.long 0x04 24.--27. " USCH15 ,User Sequence Number 15" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x04 20.--23. " USCH14 ,User Sequence Number 14" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x04 16.--19. " USCH13 ,User Sequence Number 13" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x04 12.--15. " USCH12 ,User Sequence Number 12" "0,1,2,3,4,5,6,7,?..." textline " " bitfld.long 0x04 8.--11. " USCH11 ,User Sequence Number 11" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x04 4.--7. " USCH10 ,User Sequence Number 10" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x04 0.--3. " USCH9 ,User Sequence Number 9" "0,1,2,3,4,5,6,7,?..." elif (cpuis("ATSAM4S*B")) rgroup.long 0x08++0x07 line.long 0x00 "ADC_SEQ1R,ADC Channel Sequence 1 Register" bitfld.long 0x00 28.--31. " USCH8 ,User Sequence Number 8" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x00 24.--27. " USCH7 ,User Sequence Number 7" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x00 20.--23. " USCH6 ,User Sequence Number 6" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x00 16.--19. " USCH5 ,User Sequence Number 5" "0,1,2,3,4,5,6,7,8,9,10,?..." textline " " bitfld.long 0x00 12.--15. " USCH4 ,User Sequence Number 4" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x00 8.--11. " USCH3 ,User Sequence Number 3" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x00 4.--7. " USCH2 ,User Sequence Number 2" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x00 0.--3. " USCH1 ,User Sequence Number 1" "0,1,2,3,4,5,6,7,8,9,10,?..." line.long 0x04 "ADC_SEQ2R,ADC Channel Sequence 2 Register" bitfld.long 0x04 24.--27. " USCH15 ,User Sequence Number 15" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x04 20.--23. " USCH14 ,User Sequence Number 14" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x04 16.--19. " USCH13 ,User Sequence Number 13" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x04 12.--15. " USCH12 ,User Sequence Number 12" "0,1,2,3,4,5,6,7,8,9,10,?..." textline " " bitfld.long 0x04 8.--11. " USCH11 ,User Sequence Number 11" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x04 4.--7. " USCH10 ,User Sequence Number 10" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x04 0.--3. " USCH9 ,User Sequence Number 9" "0,1,2,3,4,5,6,7,8,9,10,?..." else rgroup.long 0x08++0x07 line.long 0x00 "ADC_SEQ1R,ADC Channel Sequence 1 Register" bitfld.long 0x00 28.--31. " USCH8 ,User Sequence Number 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " USCH7 ,User Sequence Number 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " USCH6 ,User Sequence Number 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " USCH5 ,User Sequence Number 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " USCH4 ,User Sequence Number 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " USCH3 ,User Sequence Number 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " USCH2 ,User Sequence Number 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " USCH1 ,User Sequence Number 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "ADC_SEQ2R,ADC Channel Sequence 2 Register" bitfld.long 0x04 24.--27. " USCH15 ,User Sequence Number 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 20.--23. " USCH14 ,User Sequence Number 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--19. " USCH13 ,User Sequence Number 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 12.--15. " USCH12 ,User Sequence Number 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 8.--11. " USCH11 ,User Sequence Number 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " USCH10 ,User Sequence Number 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " USCH9 ,User Sequence Number 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif else hgroup.long 0x08++0x03 hide.long 0x00 "ADC_SEQ1R,ADC Channel Sequence 1 Register" textline " " hide.long 0x04 "ADC_SEQ2R,ADC Channel Sequence 2 Register" textline " " endif rgroup.long 0x18++0x03 line.long 0x00 "ADC_CHSR,ADC Channel Status Register" sif (cpuis("ATSAM4S*C")) bitfld.long 0x00 15. " CH15_set/clr ,Channel 15 Status" "Disabled,Enabled" bitfld.long 0x00 14. " CH14_set/clr ,Channel 14 Status" "Disabled,Enabled" bitfld.long 0x00 13. " CH13_set/clr ,Channel 13 Status" "Disabled,Enabled" bitfld.long 0x00 12. " CH12_set/clr ,Channel 12 Status" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " CH11_set/clr ,Channel 11 Status" "Disabled,Enabled" bitfld.long 0x00 10. " CH10_set/clr ,Channel 10 Status" "Disabled,Enabled" bitfld.long 0x00 9. " CH9_set/clr ,Channel 9 Status" "Disabled,Enabled" bitfld.long 0x00 8. " CH8_set/clr ,Channel 8 Status" "Disabled,Enabled" textline " " elif (cpuis("ATSAM4S*B")) bitfld.long 0x00 10. " CH10_set/clr ,Channel 10 Status" "Disabled,Enabled" bitfld.long 0x00 9. " CH9_set/clr ,Channel 9 Status" "Disabled,Enabled" bitfld.long 0x00 8. " CH8_set/clr ,Channel 8 Status" "Disabled,Enabled" textline " " endif bitfld.long 0x00 7. " CH7_set/clr ,Channel 7 Status" "Disabled,Enabled" bitfld.long 0x00 6. " CH6_set/clr ,Channel 6 Status" "Disabled,Enabled" bitfld.long 0x00 5. " CH5_set/clr ,Channel 5 Status" "Disabled,Enabled" bitfld.long 0x00 4. " CH4_set/clr ,Channel 4 Status" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CH3_set/clr ,Channel 3 Status" "Disabled,Enabled" bitfld.long 0x00 2. " CH2_set/clr ,Channel 2 Status" "Disabled,Enabled" bitfld.long 0x00 1. " CH1_set/clr ,Channel 1 Status" "Disabled,Enabled" bitfld.long 0x00 0. " CH0_set/clr ,Channel 0 Status" "Disabled,Enabled" endif hgroup.long 0x20++0x03 hide.long 0x00 "ADC_LCDR,ADC Last Data Converted" in group.long 0x2C++0x03 line.long 0x00 "ADC_IMR,ADC Interrupt Mask Register" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " RXBUFF ,Receive Buffer Full Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 27. -0x08 27. -0x04 27. " ENDRX ,End of Receive Buffer Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " COMPE ,Comparison Event Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. -0x08 25. -0x04 25. " GOVRE ,General Overrun Error Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " DRDY ,Data Ready Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 23. -0x08 23. -0x04 23. " EOCAL ,End of Calibration Sequence" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. -0x08 15. -0x04 15. " EOC15 ,End of Conversion Interrupt Mask 15" "Disabled,Enabled" setclrfld.long 0x00 14. -0x08 14. -0x04 14. " EOC14 ,End of Conversion Interrupt Mask 14" "Disabled,Enabled" setclrfld.long 0x00 13. -0x08 13. -0x04 13. " EOC13 ,End of Conversion Interrupt Mask 13" "Disabled,Enabled" setclrfld.long 0x00 12. -0x08 12. -0x04 12. " EOC12 ,End of Conversion Interrupt Mask 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. -0x08 11. -0x04 11. " EOC11 ,End of Conversion Interrupt Mask 11" "Disabled,Enabled" setclrfld.long 0x00 10. -0x08 10. -0x04 10. " EOC10 ,End of Conversion Interrupt Mask 10" "Disabled,Enabled" setclrfld.long 0x00 9. -0x08 9. -0x04 9. " EOC9 ,End of Conversion Interrupt Mask 9" "Disabled,Enabled" setclrfld.long 0x00 8. -0x08 8. -0x04 8. " EOC8 ,End of Conversion Interrupt Mask 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. -0x08 7. -0x04 7. " EOC7 ,End of Conversion Interrupt Mask 7" "Disabled,Enabled" setclrfld.long 0x00 6. -0x08 6. -0x04 6. " EOC6 ,End of Conversion Interrupt Mask 6" "Disabled,Enabled" setclrfld.long 0x00 5. -0x08 5. -0x04 5. " EOC5 ,End of Conversion Interrupt Mask 5" "Disabled,Enabled" setclrfld.long 0x00 4. -0x08 4. -0x04 4. " EOC4 ,End of Conversion Interrupt Mask 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x08 3. -0x04 3. " EOC3 ,End of Conversion Interrupt Mask 3" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " EOC2 ,End of Conversion Interrupt Mask 2" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " EOC1 ,End of Conversion Interrupt Mask 1" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EOC0 ,End of Conversion Interrupt Mask 0" "Disabled,Enabled" hgroup.long 0x30++0x03 hide.long 0x00 "ADC_ISR,ADC Interrupt Status Register" in hgroup.long 0x3C++0x03 hide.long 0x00 "ADC_OVER,ADC Overrun Status Register" in if ((d.l(ad:0x40038000+0xE4)&0x01)==0x00) group.long 0x40++0x07 line.long 0x00 "ADC_EMR,ADC Extended Mode Register" bitfld.long 0x00 24. " TAG ,TAG of ADC_LCDR register" "CHNB to zero,Channel number" bitfld.long 0x00 9. " CMPALL ,Compare All Channels" "Disabled,Enabled" bitfld.long 0x00 4.--7. " CMPSEL ,Comparison Selected Channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--1. " CMPMODE ,Comparison Mode" "LOW,HIGH,IN,OUT" line.long 0x04 "ADC_CWR,ADC Compare Window Register" hexmask.long.word 0x04 16.--27. 1. " HIGHTHRES ,High Threshold" hexmask.long.word 0x04 0.--11. 1. " LOWTHRES ,Low Threshold" group.long 0x48++0x07 line.long 0x00 "ADC_CGR,ADC Channel Gain Register" sif (cpuis("ATSAM4S*C")) bitfld.long 0x00 30.--31. " GAIN15 ,Gain for channel 15(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 28.--29. " GAIN14 ,Gain for channel 14(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 26.--27. " GAIN13 ,Gain for channel 13(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 24.--25. " GAIN12 ,Gain for channel 12(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" textline " " bitfld.long 0x00 22.--23. " GAIN11 ,Gain for channel 11(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 20.--21. " GAIN10 ,Gain for channel 10(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 18.--19. " GAIN9 ,Gain for channel 9(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 16.--17. " GAIN8 ,Gain for channel 8(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" textline " " elif (cpuis("ATSAM4S*B")) bitfld.long 0x00 20.--21. " GAIN10 ,Gain for channel 10(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 18.--19. " GAIN9 ,Gain for channel 9(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 16.--17. " GAIN8 ,Gain for channel 8(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" textline " " endif bitfld.long 0x00 14.--15. " GAIN7 ,Gain for channel 7(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 12.--13. " GAIN6 ,Gain for channel 6(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 10.--11. " GAIN5 ,Gain for channel 5(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 8.--9. " GAIN4 ,Gain for channel 4(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" textline " " bitfld.long 0x00 6.--7. " GAIN3 ,Gain for channel 3(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 4.--5. " GAIN2 ,Gain for channel 2(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 2.--3. " GAIN1 ,Gain for channel 1(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 0.--1. " GAIN0 ,Gain for channel 0(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" line.long 0x04 "ADC_COR,ADC Channel Offset Register" sif (cpuis("ATSAM4S*C")) bitfld.long 0x04 31. " DIFF15 ,Differential inputs for channel 15" "Single Ended,Fully Differential" bitfld.long 0x04 30. " DIFF14 ,Differential inputs for channel 14" "Single Ended,Fully Differential" bitfld.long 0x04 29. " DIFF13 ,Differential inputs for channel 13" "Single Ended,Fully Differential" bitfld.long 0x04 28. " DIFF12 ,Differential inputs for channel 12" "Single Ended,Fully Differential" textline " " bitfld.long 0x04 27. " DIFF11 ,Differential inputs for channel 11" "Single Ended,Fully Differential" bitfld.long 0x04 26. " DIFF10 ,Differential inputs for channel 10" "Single Ended,Fully Differential" bitfld.long 0x04 25. " DIFF9 ,Differential inputs for channel 9" "Single Ended,Fully Differential" bitfld.long 0x04 24. " DIFF8 ,Differential inputs for channel 8" "Single Ended,Fully Differential" textline " " elif (cpuis("ATSAM4S*B")) bitfld.long 0x04 26. " DIFF10 ,Differential inputs for channel 10" "Single Ended,Fully Differential" bitfld.long 0x04 25. " DIFF9 ,Differential inputs for channel 9" "Single Ended,Fully Differential" bitfld.long 0x04 24. " DIFF8 ,Differential inputs for channel 8" "Single Ended,Fully Differential" textline " " endif bitfld.long 0x04 23. " DIFF7 ,Differential inputs for channel 7" "Single Ended,Fully Differential" bitfld.long 0x04 22. " DIFF6 ,Differential inputs for channel 6" "Single Ended,Fully Differential" bitfld.long 0x04 21. " DIFF5 ,Differential inputs for channel 5" "Single Ended,Fully Differential" bitfld.long 0x04 20. " DIFF4 ,Differential inputs for channel 4" "Single Ended,Fully Differential" textline " " bitfld.long 0x04 19. " DIFF3 ,Differential inputs for channel 3" "Single Ended,Fully Differential" bitfld.long 0x04 18. " DIFF2 ,Differential inputs for channel 2" "Single Ended,Fully Differential" bitfld.long 0x04 17. " DIFF1 ,Differential inputs for channel 1" "Single Ended,Fully Differential" bitfld.long 0x04 16. " DIFF0 ,Differential inputs for channel 0" "Single Ended,Fully Differential" textline " " sif (cpuis("ATSAM4S*C")) bitfld.long 0x04 15. " OFF15 ,Offset for channel 15" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 14. " OFF14 ,Offset for channel 14" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 13. " OFF13 ,Offset for channel 13" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 12. " OFF12 ,Offset for channel 12" "No offset,(G-1)V_ADVREF/2" textline " " bitfld.long 0x04 11. " OFF11 ,Offset for channel 11" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 10. " OFF10 ,Offset for channel 10" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 9. " OFF9 ,Offset for channel 9" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 8. " OFF8 ,Offset for channel 8" "No offset,(G-1)V_ADVREF/2" textline " " elif (cpuis("ATSAM4S*B")) bitfld.long 0x04 10. " OFF10 ,Offset for channel 10" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 9. " OFF9 ,Offset for channel 9" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 8. " OFF8 ,Offset for channel 8" "No offset,(G-1)V_ADVREF/2" textline " " endif bitfld.long 0x04 7. " OFF7 ,Offset for channel 7" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 6. " OFF6 ,Offset for channel 6" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 5. " OFF5 ,Offset for channel 5" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 4. " OFF4 ,Offset for channel 4" "No offset,(G-1)V_ADVREF/2" textline " " bitfld.long 0x04 3. " OFF3 ,Offset for channel 3" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 2. " OFF2 ,Offset for channel 2" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 1. " OFF1 ,Offset for channel 1" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 0. " OFF0 ,Offset for channel 0" "No offset,(G-1)V_ADVREF/2" else rgroup.long 0x40++0x07 line.long 0x00 "ADC_EMR,ADC Extended Mode Register" bitfld.long 0x00 24. " TAG ,TAG of ADC_LCDR register" "CHNB to zero,Channel number" bitfld.long 0x00 9. " CMPALL ,Compare All Channels" "Disabled,Enabled" bitfld.long 0x00 4.--7. " CMPSEL ,Comparison Selected Channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--1. " CMPMODE ,Comparison Mode" "LOW,HIGH,IN,OUT" line.long 0x04 "ADC_CWR,ADC Compare Window Register" hexmask.long.word 0x04 16.--27. 1. " HIGHTHRES ,High Threshold" hexmask.long.word 0x04 0.--11. 1. " LOWTHRES ,Low Threshold" rgroup.long 0x48++0x07 line.long 0x00 "ADC_CGR,ADC Channel Gain Register" sif (cpuis("ATSAM4S*C")) bitfld.long 0x00 30.--31. " GAIN15 ,Gain for channel 15(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 28.--29. " GAIN14 ,Gain for channel 14(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 26.--27. " GAIN13 ,Gain for channel 13(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 24.--25. " GAIN12 ,Gain for channel 12(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" textline " " bitfld.long 0x00 22.--23. " GAIN11 ,Gain for channel 11(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 20.--21. " GAIN10 ,Gain for channel 10(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 18.--19. " GAIN9 ,Gain for channel 9(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 16.--17. " GAIN8 ,Gain for channel 8(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" textline " " elif (cpuis("ATSAM4S*B")) bitfld.long 0x00 20.--21. " GAIN10 ,Gain for channel 10(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 18.--19. " GAIN9 ,Gain for channel 9(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 16.--17. " GAIN8 ,Gain for channel 8(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" textline " " endif bitfld.long 0x00 14.--15. " GAIN7 ,Gain for channel 7(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 12.--13. " GAIN6 ,Gain for channel 6(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 10.--11. " GAIN5 ,Gain for channel 5(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 8.--9. " GAIN4 ,Gain for channel 4(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" textline " " bitfld.long 0x00 6.--7. " GAIN3 ,Gain for channel 3(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 4.--5. " GAIN2 ,Gain for channel 2(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 2.--3. " GAIN1 ,Gain for channel 1(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" bitfld.long 0x00 0.--1. " GAIN0 ,Gain for channel 0(Single ended/Differential)" "1/0.5,1/1,2/2,4/2" line.long 0x04 "ADC_COR,ADC Channel Offset Register" sif (cpuis("ATSAM4S*C")) bitfld.long 0x04 31. " DIFF15 ,Differential inputs for channel 15" "Single Ended,Fully Differential" bitfld.long 0x04 30. " DIFF14 ,Differential inputs for channel 14" "Single Ended,Fully Differential" bitfld.long 0x04 29. " DIFF13 ,Differential inputs for channel 13" "Single Ended,Fully Differential" bitfld.long 0x04 28. " DIFF12 ,Differential inputs for channel 12" "Single Ended,Fully Differential" textline " " bitfld.long 0x04 27. " DIFF11 ,Differential inputs for channel 11" "Single Ended,Fully Differential" bitfld.long 0x04 26. " DIFF10 ,Differential inputs for channel 10" "Single Ended,Fully Differential" bitfld.long 0x04 25. " DIFF9 ,Differential inputs for channel 9" "Single Ended,Fully Differential" bitfld.long 0x04 24. " DIFF8 ,Differential inputs for channel 8" "Single Ended,Fully Differential" textline " " elif (cpuis("ATSAM4S*B")) bitfld.long 0x04 26. " DIFF10 ,Differential inputs for channel 10" "Single Ended,Fully Differential" bitfld.long 0x04 25. " DIFF9 ,Differential inputs for channel 9" "Single Ended,Fully Differential" bitfld.long 0x04 24. " DIFF8 ,Differential inputs for channel 8" "Single Ended,Fully Differential" textline " " endif bitfld.long 0x04 23. " DIFF7 ,Differential inputs for channel 7" "Single Ended,Fully Differential" bitfld.long 0x04 22. " DIFF6 ,Differential inputs for channel 6" "Single Ended,Fully Differential" bitfld.long 0x04 21. " DIFF5 ,Differential inputs for channel 5" "Single Ended,Fully Differential" bitfld.long 0x04 20. " DIFF4 ,Differential inputs for channel 4" "Single Ended,Fully Differential" textline " " bitfld.long 0x04 19. " DIFF3 ,Differential inputs for channel 3" "Single Ended,Fully Differential" bitfld.long 0x04 18. " DIFF2 ,Differential inputs for channel 2" "Single Ended,Fully Differential" bitfld.long 0x04 17. " DIFF1 ,Differential inputs for channel 1" "Single Ended,Fully Differential" bitfld.long 0x04 16. " DIFF0 ,Differential inputs for channel 0" "Single Ended,Fully Differential" textline " " sif (cpuis("ATSAM4S*C")) bitfld.long 0x04 15. " OFF15 ,Offset for channel 15" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 14. " OFF14 ,Offset for channel 14" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 13. " OFF13 ,Offset for channel 13" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 12. " OFF12 ,Offset for channel 12" "No offset,(G-1)V_ADVREF/2" textline " " bitfld.long 0x04 11. " OFF11 ,Offset for channel 11" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 10. " OFF10 ,Offset for channel 10" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 9. " OFF9 ,Offset for channel 9" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 8. " OFF8 ,Offset for channel 8" "No offset,(G-1)V_ADVREF/2" textline " " elif (cpuis("ATSAM4S*B")) bitfld.long 0x04 10. " OFF10 ,Offset for channel 10" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 9. " OFF9 ,Offset for channel 9" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 8. " OFF8 ,Offset for channel 8" "No offset,(G-1)V_ADVREF/2" textline " " endif bitfld.long 0x04 7. " OFF7 ,Offset for channel 7" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 6. " OFF6 ,Offset for channel 6" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 5. " OFF5 ,Offset for channel 5" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 4. " OFF4 ,Offset for channel 4" "No offset,(G-1)V_ADVREF/2" textline " " bitfld.long 0x04 3. " OFF3 ,Offset for channel 3" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 2. " OFF2 ,Offset for channel 2" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 1. " OFF1 ,Offset for channel 1" "No offset,(G-1)V_ADVREF/2" bitfld.long 0x04 0. " OFF0 ,Offset for channel 0" "No offset,(G-1)V_ADVREF/2" endif sif (cpuis("ATSAM4S*A")) rgroup.long 0x50++0x03 line.long 0x00 "ADC_CDR0,ADC Channel 0 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x54++0x03 line.long 0x00 "ADC_CDR1,ADC Channel 1 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x58++0x03 line.long 0x00 "ADC_CDR2,ADC Channel 2 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x5C++0x03 line.long 0x00 "ADC_CDR3,ADC Channel 3 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x60++0x03 line.long 0x00 "ADC_CDR4,ADC Channel 4 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x64++0x03 line.long 0x00 "ADC_CDR5,ADC Channel 5 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x68++0x03 line.long 0x00 "ADC_CDR6,ADC Channel 6 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x6C++0x03 line.long 0x00 "ADC_CDR7,ADC Channel 7 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" elif (cpuis("ATSAM4S*B")) rgroup.long 0x50++0x03 line.long 0x00 "ADC_CDR0,ADC Channel 0 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x54++0x03 line.long 0x00 "ADC_CDR1,ADC Channel 1 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x58++0x03 line.long 0x00 "ADC_CDR2,ADC Channel 2 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x5C++0x03 line.long 0x00 "ADC_CDR3,ADC Channel 3 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x60++0x03 line.long 0x00 "ADC_CDR4,ADC Channel 4 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x64++0x03 line.long 0x00 "ADC_CDR5,ADC Channel 5 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x68++0x03 line.long 0x00 "ADC_CDR6,ADC Channel 6 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x6C++0x03 line.long 0x00 "ADC_CDR7,ADC Channel 7 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x70++0x03 line.long 0x00 "ADC_CDR8,ADC Channel 8 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x74++0x03 line.long 0x00 "ADC_CDR9,ADC Channel 9 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x78++0x03 line.long 0x00 "ADC_CDR10,ADC Channel 10 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" else rgroup.long 0x50++0x03 line.long 0x00 "ADC_CDR0,ADC Channel 0 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x54++0x03 line.long 0x00 "ADC_CDR1,ADC Channel 1 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x58++0x03 line.long 0x00 "ADC_CDR2,ADC Channel 2 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x5C++0x03 line.long 0x00 "ADC_CDR3,ADC Channel 3 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x60++0x03 line.long 0x00 "ADC_CDR4,ADC Channel 4 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x64++0x03 line.long 0x00 "ADC_CDR5,ADC Channel 5 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x68++0x03 line.long 0x00 "ADC_CDR6,ADC Channel 6 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x6C++0x03 line.long 0x00 "ADC_CDR7,ADC Channel 7 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x70++0x03 line.long 0x00 "ADC_CDR8,ADC Channel 8 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x74++0x03 line.long 0x00 "ADC_CDR9,ADC Channel 9 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x78++0x03 line.long 0x00 "ADC_CDR10,ADC Channel 10 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x7C++0x03 line.long 0x00 "ADC_CDR11,ADC Channel 11 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x80++0x03 line.long 0x00 "ADC_CDR12,ADC Channel 12 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x84++0x03 line.long 0x00 "ADC_CDR13,ADC Channel 13 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x88++0x03 line.long 0x00 "ADC_CDR14,ADC Channel 14 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" rgroup.long 0x8C++0x03 line.long 0x00 "ADC_CDR15,ADC Channel 15 Data Register" hexmask.long.word 0x00 0.--11. 1. " DATA ,Converted Data" endif if ((d.l(ad:0x40038000+0xE4)&0x01)==0x00) group.long 0x94++0x03 line.long 0x00 "ADC_ACR,ADC Analog Control Register" bitfld.long 0x00 8.--9. " IBCTL ,ADC Bias Current Control" "<500kHz,500kHz-1MHz,?..." bitfld.long 0x00 4. " TSON ,Temperature Sensor On" "Off,On" else rgroup.long 0x94++0x03 line.long 0x00 "ADC_ACR,ADC Analog Control Register" bitfld.long 0x00 8.--9. " IBCTL ,ADC Bias Current Control" "<500kHz,500kHz-1MHz,?..." bitfld.long 0x00 4. " TSON ,Temperature Sensor On" "Off,On" endif group.long 0xE4++0x03 line.long 0x00 "ADC_WPMR,ADC Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write Protect KEY" bitfld.long 0x00 0. " WPEN ,Write Protect Enable" "Disabled,Enabled" hgroup.long 0xE8++0x03 hide.long 0x00 "ADC_WPSR,ADC Write Protect Status Register" in width 0x0B tree "PDC (Peripheral DMA Controller)" base ad:0x40038000 width 9. group.long 0x100++0x01F line.long 0x00 "ADC_RPR,Receive Pointer Register" line.long 0x04 "ADC_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "ADC_TPR,Transmit Pointer Register" line.long 0x0c "ADC_TCR,Transmit Counter Register" hexmask.long.word 0x0C 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "ADC_RNPR,Receive Next Pointer Register" line.long 0x14 "ADC_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "ADC_TNPR,Transmit Next Pointer Register" line.long 0x1c "ADC_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "ADC_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disable" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enable" bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disable" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enable" rgroup.long 0x124++0x03 line.long 0x00 "ADC_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0x0B tree.end tree.end sif (!cpuis("ATSAM4S4A")&&!cpuis("ATSAM4S2A")) tree "DACC (Digital-to-Analog Converter Controller)" base ad:0x4003C000 width 11. wgroup.long 0x00++0x03 line.long 0x00 "DACC_CR,DACC Control Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset" if ((d.l(ad:0x4003C000+0xE4)&0x01)==0x00) group.long 0x04++0x03 line.long 0x00 "DACC_MR,DACC Mode Register" bitfld.long 0x00 24.--29. " STARTUP ,Startup Time Selection" "0,8,16,24,64,80,96,112,512,576,640,704,768,832,896,960,1024,1088,1152,1216,1280,1344,1408,1472,1536,1600,1664,1728,1792,1856,1920,1984,2048,2112,2176,2240,2304,2368,2432,2496,2560,2624,2688,2752,2816,2880,2944,3008,3072,3136,3200,3264,3328,3392,3456,3520,3584,3648,3712,3776,3840,3904,3968,4032" bitfld.long 0x00 21. " MAXS ,Max Speed Mode" "Normal,Maximum" textline " " bitfld.long 0x00 20. " TAG ,Tag Selection Mode" "Disabled,Enabled" bitfld.long 0x00 16.--17. " USER_SEL ,User Channel Selection" "CHANNEL0,CHANNEL1,?..." textline " " bitfld.long 0x00 8. " ONE ,Must Be Set to 1" ",1" bitfld.long 0x00 4. " WORD ,Word Transfer" "Half-Word,Word" textline " " bitfld.long 0x00 1.--3. " TRGSEL ,Trigger Selection" "External,TIO Output of the TC C0,TIO Output of the TC C1,TIO Output of the TC C2,PWM Event Line 0,PWM Event Line 1,?..." bitfld.long 0x00 0. " TRGEN ,Trigger Enable" "Disabled,Enabled" group.long 0x18++0x03 line.long 0x00 "DACC_CHSR,DACC Channel Status Register" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CH1_set/clr ,Channel 1 Status" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CH0_set/clr ,Channel 0 Status" "Disabled,Enabled" else rgroup.long 0x04++0x03 line.long 0x00 "DACC_MR,DACC Mode Register" bitfld.long 0x00 24.--29. " STARTUP ,Startup Time Selection" "0,8,16,24,64,80,96,112,512,576,640,704,768,832,896,960,1024,1088,1152,1216,1280,1344,1408,1472,1536,1600,1664,1728,1792,1856,1920,1984,2048,2112,2176,2240,2304,2368,2432,2496,2560,2624,2688,2752,2816,2880,2944,3008,3072,3136,3200,3264,3328,3392,3456,3520,3584,3648,3712,3776,3840,3904,3968,4032" bitfld.long 0x00 21. " MAXS ,Max Speed Mode" "Normal,Maximum" textline " " bitfld.long 0x00 20. " TAG ,Tag Selection Mode" "Disabled,Enabled" bitfld.long 0x00 16.--17. " USER_SEL ,User Channel Selection" "CHANNEL0,CHANNEL1,?..." textline " " bitfld.long 0x00 8. " ONE ,One Be Set to 1" ",1" bitfld.long 0x00 4. " WORD ,Word Transfer" "Half-Word,Word" textline " " bitfld.long 0x00 1.--3. " TRGSEL ,Trigger Selection" "External,TIO Output of the TC C0,TIO Output of the TC C1,TIO Output of the TC C2,PWM Event Line 0,PWM Event Line 1,?..." bitfld.long 0x00 0. " TRGEN ,Trigger Enable" "Disabled,Enabled" rgroup.long 0x18++0x03 line.long 0x00 "DACC_CHSR,DACC Channel Status Register" bitfld.long 0x00 1. " CH1_set/clr ,Channel 1 Status" "Disabled,Enabled" bitfld.long 0x00 0. " CH0_set/clr ,Channel 0 Status" "Disabled,Enabled" endif wgroup.long 0x20++0x03 line.long 0x00 "DACC_CDR,DACC Conversion Data Register" group.long 0x2C++0x03 line.long 0x0 "DACC_IMR,DACC Interrupt Mask Register" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " TXBUFE_set/clr ,Transmit Buffer Empty Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " ENDTX_set/clr ,End of Transmit Buffer Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " EOC_set/clr ,End of Conversion Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXRDY_set/clr ,Transmit Ready Interrupt Mask" "Disabled,Enabled" hgroup.long 0x30++0x03 hide.long 0x00 "DACC_ISR,DACC Interrupt Status Register" in if ((d.l(ad:0x4003C000+0xE4)&0x01)==0x00) group.long 0x94++0x03 line.long 0x00 "DACC_ACR,DACC Analog Current Register" bitfld.long 0x00 8.--9. " IBCTLDACCORE ,Bias Current Control for DAC Core" "0,1,2,3" textline " " bitfld.long 0x00 2.--3. " IBCTLCH1 ,Analog Output Current Control 1" "0.23 mA,0.45 mA,0.67 mA,0.89 mA" bitfld.long 0x00 0.--1. " IBCTLCH0 ,Analog Output Current Control 0" "0.23 mA,0.45 mA,0.67 mA,0.89 mA" else rgroup.long 0x94++0x03 line.long 0x00 "DACC_ACR,DACC Analog Current Register" bitfld.long 0x00 8.--9. " IBCTLDACCORE ,Bias Current Control for DAC Core" "0,1,2,3" textline " " bitfld.long 0x00 2.--3. " IBCTLCH1 ,Analog Output Current Control 1" "0.23 mA,0.45 mA,0.67 mA,0.89 mA" bitfld.long 0x00 0.--1. " IBCTLCH0 ,Analog Output Current Control 0" "0.23 mA,0.45 mA,0.67 mA,0.89 mA" endif group.long 0xE4++0x03 line.long 0x00 "DACC_WPMR,DACC Write Protect Mode Register" hexmask.long.tbyte 0x00 8.--31. 1. " WPKEY ,Write Protect KEY" bitfld.long 0x00 0. " WPEN ,Write Protect Enable" "Disabled,Enabled" hgroup.long 0xE8++0x03 hide.long 0x00 "DACC_WPSR,DACC Write Protect Status Register" in width 0x0B tree "PDC (Peripheral DMA Controller)" base ad:0x4003c000 width 10. group.long 0x100++0x01F line.long 0x00 "DACC_RPR,Receive Pointer Register" line.long 0x04 "DACC_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "DACC_TPR,Transmit Pointer Register" line.long 0x0c "DACC_TCR,Transmit Counter Register" hexmask.long.word 0x0C 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "DACC_RNPR,Receive Next Pointer Register" line.long 0x14 "DACC_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "DACC_TNPR,Transmit Next Pointer Register" line.long 0x1c "DACC_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "DACC_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disable" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enable" bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disable" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enable" rgroup.long 0x124++0x03 line.long 0x00 "DACC_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0x0B tree.end tree.end endif textline ""