; -------------------------------------------------------------------------------- ; @Title: AT91(SAM7S32,64,256,321) On-Chip Peripherals ; @Props: Released ; @Author: JAZ, LUK ; @Changelog: ; 2007-03-05 ; 2007-12-12 ; @Manufacturer: ATMEL - Atmel Corporation ; @Doc: doc6175.pdf (2006-11-22) ; AT91SAM7X512_256-128_DS.pdf (6175G-ATARM-22-Nov-06) ; @Core: ARM7TDMI ; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perat91sam7sx.per 17440 2024-02-02 15:33:08Z kwisniewski $ config 16. 8. width 0x0b base ad:0x00000000 tree "Reset Controller (RSTC)" base 0xFFFFFD00 width 10. wgroup.long 0x00++0x03 line.long 0x00 "RSTC_CR,Control Register" hexmask.long.byte 0x00 24.--31. 1. " KEY ,Password" bitfld.long 0x00 3. " EXTRST ,External Reset" "No effect,NRST" textline " " bitfld.long 0x00 2. " PERRST ,Peripheral Reset" "No effect,Reset" bitfld.long 0x00 0. " PROCRST ,Processor Reset" "No effect,Reset" rgroup.long 0x04++0x03 line.long 0x00 "RSTC_SR,Status Register" bitfld.long 0x00 17. " SRCMP ,Software Reset Command in Progress" "No reset,Reset" bitfld.long 0x00 16. " NRSTL ,NRST Pin Level" "Not registered,Registered" textline " " sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") bitfld.long 0x00 8.--10. " RSTTYP ,Reset Type" "General,Backup,Watchdog,Software,User,Brownout,?..." textline " " else bitfld.long 0x00 8.--10. " RSTTYP ,Reset Type" "Power-up,Reserved,Watchdog,Software,User,Brownout,?..." textline " " endif sif (cpu()!="AT91SAM7L64"&&cpu()!="AT91SAM7L128") bitfld.long 0x00 1. " BODSTS ,Brownout Detection Status" "Not detected,Detected" textline " " endif bitfld.long 0x00 0. " URSTS ,User Reset Status" "Not detected,Detected" group.long 0x08++0x03 line.long 0x00 "RSTC_MR,Mode Register" hexmask.long.byte 0x00 24.--31. 1. " KEY ,Password" sif (cpu()!="AT91SAM7L64"&&cpu()!="AT91SAM7L128") bitfld.long 0x00 16. " BODIEN ,Brownout Detection Interrupt Enable" "No effect,Enabled" endif textline " " bitfld.long 0x00 8.--11. " ERSTL ,External Reset Length" "2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536" bitfld.long 0x00 4. " URSTIEN ,User Reset Interrupt Enable" "No effect,Enabled" bitfld.long 0x00 0. " URSTEN ,User Reset Enable" "Disabled,Enabled" tree.end tree "Real-time Timer (RTT)" base 0xFFFFFD20 width 0x8 group.long 0x00++0x07 line.long 0x00 "RTT_MR,Real-time Timer Mode Register" bitfld.long 0x00 18. " RTTRST ,Real-time Timer Restart" "Not restarted,Restarted" bitfld.long 0x00 17. " RTTINCIEN ,Real-time Timer Increment Interrupt Enable" "No effect,Interrupt" textline " " bitfld.long 0x00 16. " ALMIEN ,Alarm Interrupt Enable" "No effect,Interrupt" hexmask.long.byte 0x00 0.--15. 1. " RTPRES ,Real-time Timer Prescaler Value" line.long 0x04 "RTT_AR,Real-time Timer Alarm Register" ;hexfld.long 0x04 " ALMV ,Alarm Value" rgroup.long 0x08++0x07 line.long 0x00 "RTT_VR,Real-time Timer Value Register" ;hexfld.long 0x00 " CRTV ,Current Real-time Value" line.long 0x04 "RTT_SR,Real-time Timer Status Register" bitfld.long 0x04 1. " RTTINC ,Real-time Timer Increment" "Not incremented ,Incremented" bitfld.long 0x04 0. " ALMS ,Real-time Alarm Status" "Not occurred,Occurred" width 0xb tree.end tree.open "Parallel Input/Output Controller (PIO)" sif (cpu()=="AT91SAM7S32") base 0xFFFFF400 tree "PIO" width 0x11 group.long 0x08++0x03 line.long 0x00 "PIO_PSR_Set/Clr,PIO Disable/Enable and Status Register" setclrfld.long 0x00 20. -0x8 20. -0x4 20. " P20 ,PIO Disable/Enable and Status 20" "Inactive,Active" setclrfld.long 0x00 19. -0x8 19. -0x4 19. " P19 ,PIO Disable/Enable and Status 19" "Inactive,Active" textline " " setclrfld.long 0x00 18. -0x8 18. -0x4 18. " P18 ,PIO Disable/Enable and Status 18" "Inactive,Active" setclrfld.long 0x00 17. -0x8 17. -0x4 17. " P17 ,PIO Disable/Enable and Status 17" "Inactive,Active" textline " " setclrfld.long 0x00 16. -0x8 16. -0x4 16. " P16 ,PIO Disable/Enable and Status 16" "Inactive,Active" setclrfld.long 0x00 15. -0x8 15. -0x4 15. " P15 ,PIO Disable/Enable and Status 15" "Inactive,Active" textline " " setclrfld.long 0x00 14. -0x8 14. -0x4 14. " P14 ,PIO Disable/Enable and Status 14" "Inactive,Active" setclrfld.long 0x00 13. -0x8 13. -0x4 13. " P13 ,PIO Disable/Enable and Status 13" "Inactive,Active" textline " " setclrfld.long 0x00 12. -0x8 12. -0x4 12. " P12 ,PIO Disable/Enable and Status 12" "Inactive,Active" setclrfld.long 0x00 11. -0x8 11. -0x4 11. " P11 ,PIO Disable/Enable and Status 11" "Inactive,Active" textline " " setclrfld.long 0x00 10. -0x8 10. -0x4 10. " P10 ,PIO Disable/Enable and Status 10" "Inactive,Active" setclrfld.long 0x00 9. -0x8 9. -0x4 9. " P9 ,PIO Disable/Enable and Status 9" "Inactive,Active" textline " " setclrfld.long 0x00 8. -0x8 8. -0x4 8. " P8 ,PIO Disable/Enable and Status 8" "Inactive,Active" setclrfld.long 0x00 7. -0x8 7. -0x4 7. " P7 ,PIO Disable/Enable and Status 7" "Inactive,Active" textline " " setclrfld.long 0x00 6. -0x8 6. -0x4 6. " P6 ,PIO Disable/Enable and Status 6" "Inactive,Active" setclrfld.long 0x00 5. -0x8 5. -0x4 5. " P5 ,PIO Disable/Enable and Status 5" "Inactive,Active" textline " " setclrfld.long 0x00 4. -0x8 4. -0x4 4. " P4 ,PIO Disable/Enable and Status 4" "Inactive,Active" setclrfld.long 0x00 3. -0x8 3. -0x4 3. " P3 ,PIO Disable/Enable and Status 3" "Inactive,Active" textline " " setclrfld.long 0x00 2. -0x8 2. -0x4 2. " P2 ,PIO Disable/Enable and Status 2" "Inactive,Active" setclrfld.long 0x00 1. -0x8 1. -0x4 1. " P1 ,PIO Disable/Enable and Status 1" "Inactive,Active" textline " " setclrfld.long 0x00 0. -0x8 0. -0x4 0. " P0 ,PIO Disable/Enable and Status 0" "Inactive,Active" tree.end tree "Output" width 0x11 group.long 0x18++0x03 line.long 0x00 "PIO_OSR_Set/Clr,Output Disable/Enable and Status Register" setclrfld.long 0x00 20. -0x8 20. -0x4 20. " P20 ,Output Disable/Enable and Status 20" "Input,Output" setclrfld.long 0x00 19. -0x8 19. -0x4 19. " P19 ,Output Disable/Enable and Status 19" "Input,Output" textline " " setclrfld.long 0x00 18. -0x8 18. -0x4 18. " P18 ,Output Disable/Enable and Status 18" "Input,Output" setclrfld.long 0x00 17. -0x8 17. -0x4 17. " P17 ,Output Disable/Enable and Status 17" "Input,Output" textline " " setclrfld.long 0x00 16. -0x8 16. -0x4 16. " P16 ,Output Disable/Enable and Status 16" "Input,Output" setclrfld.long 0x00 15. -0x8 15. -0x4 15. " P15 ,Output Disable/Enable and Status 15" "Input,Output" textline " " setclrfld.long 0x00 14. -0x8 14. -0x4 14. " P14 ,Output Disable/Enable and Status 14" "Input,Output" setclrfld.long 0x00 13. -0x8 13. -0x4 13. " P13 ,Output Disable/Enable and Status 13" "Input,Output" textline " " setclrfld.long 0x00 12. -0x8 12. -0x4 12. " P12 ,Output Disable/Enable and Status 12" "Input,Output" setclrfld.long 0x00 11. -0x8 11. -0x4 11. " P11 ,Output Disable/Enable and Status 11" "Input,Output" textline " " setclrfld.long 0x00 10. -0x8 10. -0x4 10. " P10 ,Output Disable/Enable and Status 10" "Input,Output" setclrfld.long 0x00 9. -0x8 9. -0x4 9. " P9 ,Output Disable/Enable and Status 9" "Input,Output" textline " " setclrfld.long 0x00 8. -0x8 8. -0x4 8. " P8 ,Output Disable/Enable and Status 8" "Input,Output" setclrfld.long 0x00 7. -0x8 7. -0x4 7. " P7 ,Output Disable/Enable and Status 7" "Input,Output" textline " " setclrfld.long 0x00 6. -0x8 6. -0x4 6. " P6 ,Output Disable/Enable and Status 6" "Input,Output" setclrfld.long 0x00 5. -0x8 5. -0x4 5. " P5 ,Output Disable/Enable and Status 5" "Input,Output" textline " " setclrfld.long 0x00 4. -0x8 4. -0x4 4. " P4 ,Output Disable/Enable and Status 4" "Input,Output" setclrfld.long 0x00 3. -0x8 3. -0x4 3. " P3 ,Output Disable/Enable and Status 3" "Input,Output" textline " " setclrfld.long 0x00 2. -0x8 2. -0x4 2. " P2 ,Output Disable/Enable and Status 2" "Input,Output" setclrfld.long 0x00 1. -0x8 1. -0x4 1. " P1 ,Output Disable/Enable and Status 1" "Input,Output" textline " " setclrfld.long 0x00 0. -0x8 0. -0x4 0. " P0 ,Output Disable/Enable and Status 0" "Input,Output" tree.end tree "Filter" width 0x12 group.long 0x28++0x03 line.long 0x00 "PIO_IFSR_Set/Clr,Glitch Input Filter Disable/Enable and Status Register" setclrfld.long 0x00 20. -0x8 20. -0x4 20. " P20 ,Input Filter Disable/Enable and Status 20" "Disabled,Enabled" setclrfld.long 0x00 19. -0x8 19. -0x4 19. " P19 ,Input Filter Disable/Enable and Status 19" "Disabled,Enabled" textline " " setclrfld.long 0x00 18. -0x8 18. -0x4 18. " P18 ,Input Filter Disable/Enable and Status 18" "Disabled,Enabled" setclrfld.long 0x00 17. -0x8 17. -0x4 17. " P17 ,Input Filter Disable/Enable and Status 17" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. -0x8 16. -0x4 16. " P16 ,Input Filter Disable/Enable and Status 16" "Disabled,Enabled" setclrfld.long 0x00 15. -0x8 15. -0x4 15. " P15 ,Input Filter Disable/Enable and Status 15" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x8 14. -0x4 14. " P14 ,Input Filter Disable/Enable and Status 14" "Disabled,Enabled" setclrfld.long 0x00 13. -0x8 13. -0x4 13. " P13 ,Input Filter Disable/Enable and Status 13" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x8 12. -0x4 12. " P12 ,Input Filter Disable/Enable and Status 12" "Disabled,Enabled" setclrfld.long 0x00 11. -0x8 11. -0x4 11. " P11 ,Input Filter Disable/Enable and Status 11" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. -0x8 10. -0x4 10. " P10 ,Input Filter Disable/Enable and Status 10" "Disabled,Enabled" setclrfld.long 0x00 9. -0x8 9. -0x4 9. " P9 ,Input Filter Disable/Enable and Status 9" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x8 8. -0x4 8. " P8 ,Input Filter Disable/Enable and Status 8" "Disabled,Enabled" setclrfld.long 0x00 7. -0x8 7. -0x4 7. " P7 ,Input Filter Disable/Enable and Status 7" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. -0x8 6. -0x4 6. " P6 ,Input Filter Disable/Enable and Status 6" "Disabled,Enabled" setclrfld.long 0x00 5. -0x8 5. -0x4 5. " P5 ,Input Filter Disable/Enable and Status 5" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x8 4. -0x4 4. " P4 ,Input Filter Disable/Enable and Status 4" "Disabled,Enabled" setclrfld.long 0x00 3. -0x8 3. -0x4 3. " P3 ,Input Filter Disable/Enable and Status 3" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. -0x8 2. -0x4 2. " P2 ,Input Filter Disable/Enable and Status 2" "Disabled,Enabled" setclrfld.long 0x00 1. -0x8 1. -0x4 1. " P1 ,Input Filter Disable/Enable and Status 1" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x8 0. -0x4 0. " P0 ,Input Filter Disable/Enable and Status 0" "Disabled,Enabled" tree.end tree "Data" group.long 0x38++0x03 line.long 0x00 "PIO_ODSR_Set/Clr,Output Data Status Register" setclrfld.long 0x00 20. -0x8 20. -0x4 20. " P20 ,Output Data Status 20" "Low,High" setclrfld.long 0x00 19. -0x8 19. -0x4 19. " P19 ,Output Data Status 19" "Low,High" setclrfld.long 0x00 18. -0x8 18. -0x4 18. " P18 ,Output Data Status 18" "Low,High" textline " " setclrfld.long 0x00 17. -0x8 17. -0x4 17. " P17 ,Output Data Status 17" "Low,High" setclrfld.long 0x00 16. -0x8 16. -0x4 16. " P16 ,Output Data Status 16" "Low,High" setclrfld.long 0x00 15. -0x8 15. -0x4 15. " P15 ,Output Data Status 15" "Low,High" textline " " setclrfld.long 0x00 14. -0x8 14. -0x4 14. " P14 ,Output Data Status 14" "Low,High" setclrfld.long 0x00 13. -0x8 13. -0x4 13. " P13 ,Output Data Status 13" "Low,High" setclrfld.long 0x00 12. -0x8 12. -0x4 12. " P12 ,Output Data Status 12" "Low,High" textline " " setclrfld.long 0x00 11. -0x8 11. -0x4 11. " P11 ,Output Data Status 11" "Low,High" setclrfld.long 0x00 10. -0x8 10. -0x4 10. " P10 ,Output Data Status 10" "Low,High" setclrfld.long 0x00 9. -0x8 9. -0x4 9. " P9 ,Output Data Status 9" "Low,High" textline " " setclrfld.long 0x00 8. -0x8 8. -0x4 8. " P8 ,Output Data Status 8" "Low,High" setclrfld.long 0x00 7. -0x8 7. -0x4 7. " P7 ,Output Data Status 7" "Low,High" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " P6 ,Output Data Status 6" "Low,High" textline " " setclrfld.long 0x00 5. -0x8 5. -0x4 5. " P5 ,Output Data Status 5" "Low,High" setclrfld.long 0x00 4. -0x8 4. -0x4 4. " P4 ,Output Data Status 4" "Low,High" setclrfld.long 0x00 3. -0x8 3. -0x4 3. " P3 ,Output Data Status 3" "Low,High" textline " " setclrfld.long 0x00 2. -0x8 2. -0x4 2. " P2 ,Output Data Status 2" "Low,High" setclrfld.long 0x00 1. -0x8 1. -0x4 1. " P1 ,Output Data Status 1" "Low,High" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " P0 ,Output Data Status 0" "Low,High" group.long 0x3c++0x03 line.long 0x00 "PIO_PDSR,Pin Data Status Register" bitfld.long 0x00 20. " P20 ,Output Data Status 20" "Low,High" bitfld.long 0x00 19. " P19 ,Output Data Status 19" "Low,High" bitfld.long 0x00 18. " P18 ,Output Data Status 18" "Low,High" textline " " bitfld.long 0x00 17. " P17 ,Output Data Status 17" "Low,High" bitfld.long 0x00 16. " P16 ,Output Data Status 16" "Low,High" bitfld.long 0x00 15. " P15 ,Output Data Status 15" "Low,High" textline " " bitfld.long 0x00 14. " P14 ,Output Data Status 14" "Low,High" bitfld.long 0x00 13. " P13 ,Output Data Status 13" "Low,High" bitfld.long 0x00 12. " P12 ,Output Data Status 12" "Low,High" textline " " bitfld.long 0x00 11. " P11 ,Output Data Status 11" "Low,High" bitfld.long 0x00 10. " P10 ,Output Data Status 10" "Low,High" bitfld.long 0x00 9. " P9 ,Output Data Status 9" "Low,High" textline " " bitfld.long 0x00 8. " P8 ,Output Data Status 8" "Low,High" bitfld.long 0x00 7. " P7 ,Output Data Status 7" "Low,High" bitfld.long 0x00 6. " P6 ,Output Data Status 6" "Low,High" textline " " bitfld.long 0x00 5. " P5 ,Output Data Status 5" "Low,High" bitfld.long 0x00 4. " P4 ,Output Data Status 4" "Low,High" bitfld.long 0x00 3. " P3 ,Output Data Status 3" "Low,High" textline " " bitfld.long 0x00 2. " P2 ,Output Data Status 2" "Low,High" bitfld.long 0x00 1. " P1 ,Output Data Status 1" "Low,High" bitfld.long 0x00 0. " P0 ,Output Data Status 0" "Low,High" tree.end tree "Interrupt" group.long 0x48++0x03 line.long 0x00 "PIO_IMR_Set/Clr,Interrupt Enable/Mask Register" setclrfld.long 0x00 20. -0x8 20. -0x4 20. " P20 ,Input Change Interrupt Enable/Mask 20" "Disabled,Enabled" setclrfld.long 0x00 19. -0x8 19. -0x4 19. " P19 ,Input Change Interrupt Enable/Mask 19" "Disabled,Enabled" textline " " setclrfld.long 0x00 18. -0x8 18. -0x4 18. " P18 ,Input Change Interrupt Enable/Mask 18" "Disabled,Enabled" setclrfld.long 0x00 17. -0x8 17. -0x4 17. " P17 ,Input Change Interrupt Enable/Mask 17" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. -0x8 16. -0x4 16. " P16 ,Input Change Interrupt Enable/Mask 16" "Disabled,Enabled" setclrfld.long 0x00 15. -0x8 15. -0x4 15. " P15 ,Input Change Interrupt Enable/Mask 15" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x8 14. -0x4 14. " P14 ,Input Change Interrupt Enable/Mask 14" "Disabled,Enabled" setclrfld.long 0x00 13. -0x8 13. -0x4 13. " P13 ,Input Change Interrupt Enable/Mask 13" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x8 12. -0x4 12. " P12 ,Input Change Interrupt Enable/Mask 12" "Disabled,Enabled" setclrfld.long 0x00 11. -0x8 11. -0x4 11. " P11 ,Input Change Interrupt Enable/Mask 11" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. -0x8 10. -0x4 10. " P10 ,Input Change Interrupt Enable/Mask 10" "Disabled,Enabled" setclrfld.long 0x00 9. -0x8 9. -0x4 9. " P9 ,Input Change Interrupt Enable/Mask 9" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x8 8. -0x4 8. " P8 ,Input Change Interrupt Enable/Mask 8" "Disabled,Enabled" setclrfld.long 0x00 7. -0x8 7. -0x4 7. " P7 ,Input Change Interrupt Enable/Mask 7" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. -0x8 6. -0x4 6. " P6 ,Input Change Interrupt Enable/Mask 6" "Disabled,Enabled" setclrfld.long 0x00 5. -0x8 5. -0x4 5. " P5 ,Input Change Interrupt Enable/Mask 5" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x8 4. -0x4 4. " P4 ,Input Change Interrupt Enable/Mask 4" "Disabled,Enabled" setclrfld.long 0x00 3. -0x8 3. -0x4 3. " P3 ,Input Change Interrupt Enable/Mask 3" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. -0x8 2. -0x4 2. " P2 ,Input Change Interrupt Enable/Mask 2" "Disabled,Enabled" setclrfld.long 0x00 1. -0x8 1. -0x4 1. " P1 ,Input Change Interrupt Enable/Mask 1" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x8 0. -0x4 0. " P0 ,Input Change Interrupt Enable/Mask 0" "Disabled,Enabled" width 0x9 rgroup.long 0x4c++0x03 line.long 0x0 "PIO_ISR,Interrupt Status Register" bitfld.long 0x0 20. " P20 ,Input Change Interrupt Status 20" "Not changed,Changed" bitfld.long 0x0 19. " P19 ,Input Change Interrupt Status 19" "Not changed,Changed" textline " " bitfld.long 0x0 18. " P18 ,Input Change Interrupt Status 18" "Not changed,Changed" bitfld.long 0x0 17. " P17 ,Input Change Interrupt Status 17" "Not changed,Changed" textline " " bitfld.long 0x0 16. " P16 ,Input Change Interrupt Status 16" "Not changed,Changed" bitfld.long 0x0 15. " P15 ,Input Change Interrupt Status 15" "Not changed,Changed" textline " " bitfld.long 0x0 14. " P14 ,Input Change Interrupt Status 14" "Not changed,Changed" bitfld.long 0x0 13. " P13 ,Input Change Interrupt Status 13" "Not changed,Changed" textline " " bitfld.long 0x0 12. " P12 ,Input Change Interrupt Status 12" "Not changed,Changed" bitfld.long 0x0 11. " P11 ,Input Change Interrupt Status 11" "Not changed,Changed" textline " " bitfld.long 0x0 10. " P10 ,Input Change Interrupt Status 10" "Not changed,Changed" bitfld.long 0x0 9. " P9 ,Input Change Interrupt Status 9" "Not changed,Changed" textline " " bitfld.long 0x0 8. " P8 ,Input Change Interrupt Status 8" "Not changed,Changed" bitfld.long 0x0 7. " P7 ,Input Change Interrupt Status 7" "Not changed,Changed" textline " " bitfld.long 0x0 6. " P6 ,Input Change Interrupt Status 6" "Not changed,Changed" bitfld.long 0x0 5. " P5 ,Input Change Interrupt Status 5" "Not changed,Changed" textline " " bitfld.long 0x0 4. " P4 ,Input Change Interrupt Status 4" "Not changed,Changed" bitfld.long 0x0 3. " P3 ,Input Change Interrupt Status 3" "Not changed,Changed" textline " " bitfld.long 0x0 2. " P2 ,Input Change Interrupt Status 2" "Not changed,Changed" bitfld.long 0x0 1. " P1 ,Input Change Interrupt Status 1" "Not changed,Changed" textline " " bitfld.long 0x0 0. " P0 ,Input Change Interrupt Status 0" "Not changed,Changed" tree.end tree "Multi-driver" width 0x12 group.long 0x58++0x03 line.long 0x00 "PIO_MDSR_Set/Clr,Multi-driver Status Register" setclrfld.long 0x00 20. -0x8 20. -0x4 20. " P20 ,Multi Drive Disable/Enable and Status 20" "Disabled,Enabled" setclrfld.long 0x00 19. -0x8 19. -0x4 19. " P19 ,Multi Drive Disable/Enable and Status 19" "Disabled,Enabled" textline " " setclrfld.long 0x00 18. -0x8 18. -0x4 18. " P18 ,Multi Drive Disable/Enable and Status 18" "Disabled,Enabled" setclrfld.long 0x00 17. -0x8 17. -0x4 17. " P17 ,Multi Drive Disable/Enable and Status 17" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. -0x8 16. -0x4 16. " P16 ,Multi Drive Disable/Enable and Status 16" "Disabled,Enabled" setclrfld.long 0x00 15. -0x8 15. -0x4 15. " P15 ,Multi Drive Disable/Enable and Status 15" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x8 14. -0x4 14. " P14 ,Multi Drive Disable/Enable and Status 14" "Disabled,Enabled" setclrfld.long 0x00 13. -0x8 13. -0x4 13. " P13 ,Multi Drive Disable/Enable and Status 13" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x8 12. -0x4 12. " P12 ,Multi Drive Disable/Enable and Status 12" "Disabled,Enabled" setclrfld.long 0x00 11. -0x8 11. -0x4 11. " P11 ,Multi Drive Disable/Enable and Status 11" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. -0x8 10. -0x4 10. " P10 ,Multi Drive Disable/Enable and Status 10" "Disabled,Enabled" setclrfld.long 0x00 9. -0x8 9. -0x4 9. " P9 ,Multi Drive Disable/Enable and Status 9" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x8 8. -0x4 8. " P8 ,Multi Drive Disable/Enable and Status 8" "Disabled,Enabled" setclrfld.long 0x00 7. -0x8 7. -0x4 7. " P7 ,Multi Drive Disable/Enable and Status 7" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. -0x8 6. -0x4 6. " P6 ,Multi Drive Disable/Enable and Status 6" "Disabled,Enabled" setclrfld.long 0x00 5. -0x8 5. -0x4 5. " P5 ,Multi Drive Disable/Enable and Status 5" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x8 4. -0x4 4. " P4 ,Multi Drive Disable/Enable and Status 4" "Disabled,Enabled" setclrfld.long 0x00 3. -0x8 3. -0x4 3. " P3 ,Multi Drive Disable/Enable and Status 3" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. -0x8 2. -0x4 2. " P2 ,Multi Drive Disable/Enable and Status 2" "Disabled,Enabled" setclrfld.long 0x00 1. -0x8 1. -0x4 1. " P1 ,Multi Drive Disable/Enable and Status 1" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x8 0. -0x4 0. " P0 ,Multi Drive Disable/Enable and Status 0" "Disabled,Enabled" tree.end tree "Pull-up" group.long 0x68++0x03 line.long 0x00 "PIO_PUSR_Set/Clr,Pad Pull-up Disable/Enable and Status Register" setclrfld.long 0x00 20. -0x8 20. -0x4 20. " P20 ,Pull Up Disable/Enable and Status 20" "Enabled,Disabled" setclrfld.long 0x00 19. -0x8 19. -0x4 19. " P19 ,Pull Up Disable/Enable and Status 19" "Enabled,Disabled" textline " " setclrfld.long 0x00 18. -0x8 18. -0x4 18. " P18 ,Pull Up Disable/Enable and Status 18" "Enabled,Disabled" setclrfld.long 0x00 17. -0x8 17. -0x4 17. " P17 ,Pull Up Disable/Enable and Status 17" "Enabled,Disabled" textline " " setclrfld.long 0x00 16. -0x8 16. -0x4 16. " P16 ,Pull Up Disable/Enable and Status 16" "Enabled,Disabled" setclrfld.long 0x00 15. -0x8 15. -0x4 15. " P15 ,Pull Up Disable/Enable and Status 15" "Enabled,Disabled" textline " " setclrfld.long 0x00 14. -0x8 14. -0x4 14. " P14 ,Pull Up Disable/Enable and Status 14" "Enabled,Disabled" setclrfld.long 0x00 13. -0x8 13. -0x4 13. " P13 ,Pull Up Disable/Enable and Status 13" "Enabled,Disabled" textline " " setclrfld.long 0x00 12. -0x8 12. -0x4 12. " P12 ,Pull Up Disable/Enable and Status 12" "Enabled,Disabled" setclrfld.long 0x00 11. -0x8 11. -0x4 11. " P11 ,Pull Up Disable/Enable and Status 11" "Enabled,Disabled" textline " " setclrfld.long 0x00 10. -0x8 10. -0x4 10. " P10 ,Pull Up Disable/Enable and Status 10" "Enabled,Disabled" setclrfld.long 0x00 9. -0x8 9. -0x4 9. " P9 ,Pull Up Disable/Enable and Status 9" "Enabled,Disabled" textline " " setclrfld.long 0x00 8. -0x8 8. -0x4 8. " P8 ,Pull Up Disable/Enable and Status 8" "Enabled,Disabled" setclrfld.long 0x00 7. -0x8 7. -0x4 7. " P7 ,Pull Up Disable/Enable and Status 7" "Enabled,Disabled" textline " " setclrfld.long 0x00 6. -0x8 6. -0x4 6. " P6 ,Pull Up Disable/Enable and Status 6" "Enabled,Disabled" setclrfld.long 0x00 5. -0x8 5. -0x4 5. " P5 ,Pull Up Disable/Enable and Status 5" "Enabled,Disabled" textline " " setclrfld.long 0x00 4. -0x8 4. -0x4 4. " P4 ,Pull Up Disable/Enable and Status 4" "Enabled,Disabled" setclrfld.long 0x00 3. -0x8 3. -0x4 3. " P3 ,Pull Up Disable/Enable and Status 3" "Enabled,Disabled" textline " " setclrfld.long 0x00 2. -0x8 2. -0x4 2. " P2 ,Pull Up Disable/Enable and Status 2" "Enabled,Disabled" setclrfld.long 0x00 1. -0x8 1. -0x4 1. " P1 ,Pull Up Disable/Enable and Status 1" "Enabled,Disabled" textline " " setclrfld.long 0x00 0. -0x8 0. -0x4 0. " P0 ,Pull Up Disable/Enable and Status 0" "Enabled,Disabled" tree.end tree "Peripherial Selection" width 0xe group.long 0x78++0x03 line.long 0x00 "PIO_ABSR_Sel,AB Selection and Status Register" setclrfld.long 0x00 20. -0x4 20. -0x8 20. " P20 ,Peripheral A B Selection and Status 20" "A,B" setclrfld.long 0x00 19. -0x4 19. -0x8 19. " P19 ,Peripheral A B Selection and Status 19" "A,B" textline " " setclrfld.long 0x00 18. -0x4 18. -0x8 18. " P18 ,Peripheral A B Selection and Status 18" "A,B" setclrfld.long 0x00 17. -0x4 17. -0x8 17. " P17 ,Peripheral A B Selection and Status 17" "A,B" textline " " setclrfld.long 0x00 16. -0x4 16. -0x8 16. " P16 ,Peripheral A B Selection and Status 16" "A,B" setclrfld.long 0x00 15. -0x4 15. -0x8 15. " P15 ,Peripheral A B Selection and Status 15" "A,B" textline " " setclrfld.long 0x00 14. -0x4 14. -0x8 14. " P14 ,Peripheral A B Selection and Status 14" "A,B" setclrfld.long 0x00 13. -0x4 13. -0x8 13. " P13 ,Peripheral A B Selection and Status 13" "A,B" textline " " setclrfld.long 0x00 12. -0x4 12. -0x8 12. " P12 ,Peripheral A B Selection and Status 12" "A,B" setclrfld.long 0x00 11. -0x4 11. -0x8 11. " P11 ,Peripheral A B Selection and Status 11" "A,B" textline " " setclrfld.long 0x00 10. -0x4 10. -0x8 10. " P10 ,Peripheral A B Selection and Status 10" "A,B" setclrfld.long 0x00 9. -0x4 9. -0x8 9. " P9 ,Peripheral A B Selection and Status 9" "A,B" textline " " setclrfld.long 0x00 8. -0x4 8. -0x8 8. " P8 ,Peripheral A B Selection and Status 8" "A,B" setclrfld.long 0x00 7. -0x4 7. -0x8 7. " P7 ,Peripheral A B Selection and Status 7" "A,B" textline " " setclrfld.long 0x00 6. -0x4 6. -0x8 6. " P6 ,Peripheral A B Selection and Status 6" "A,B" setclrfld.long 0x00 5. -0x4 5. -0x8 5. " P5 ,Peripheral A B Selection and Status 5" "A,B" textline " " setclrfld.long 0x00 4. -0x4 4. -0x8 4. " P4 ,Peripheral A B Selection and Status 4" "A,B" setclrfld.long 0x00 3. -0x4 3. -0x8 3. " P3 ,Peripheral A B Selection and Status 3" "A,B" textline " " setclrfld.long 0x00 2. -0x4 2. -0x8 2. " P2 ,Peripheral A B Selection and Status 2" "A,B" setclrfld.long 0x00 1. -0x4 1. -0x8 1. " P1 ,Peripheral A B Selection and Status 1" "A,B" textline " " setclrfld.long 0x00 0. -0x4 0. -0x8 0. " P0 ,Peripheral A B Selection and Status 0" "A,B" tree.end tree "Output Write" width 0x12 group.long 0xA8++0x03 line.long 0x00 "PIO_OWSR_Set/Clr,Output Write Disable/Enable and Status Register" setclrfld.long 0x00 20. -0x8 20. -0x4 20. " P20 ,Output Write Disable/Enable and Status 20" "Disabled,Enabled" setclrfld.long 0x00 19. -0x8 19. -0x4 19. " P19 ,Output Write Disable/Enable and Status 19" "Disabled,Enabled" textline " " setclrfld.long 0x00 18. -0x8 18. -0x4 18. " P18 ,Output Write Disable/Enable and Status 18" "Disabled,Enabled" setclrfld.long 0x00 17. -0x8 17. -0x4 17. " P17 ,Output Write Disable/Enable and Status 17" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. -0x8 16. -0x4 16. " P16 ,Output Write Disable/Enable and Status 16" "Disabled,Enabled" setclrfld.long 0x00 15. -0x8 15. -0x4 15. " P15 ,Output Write Disable/Enable and Status 15" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. -0x8 14. -0x4 14. " P14 ,Output Write Disable/Enable and Status 14" "Disabled,Enabled" setclrfld.long 0x00 13. -0x8 13. -0x4 13. " P13 ,Output Write Disable/Enable and Status 13" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x8 12. -0x4 12. " P12 ,Output Write Disable/Enable and Status 12" "Disabled,Enabled" setclrfld.long 0x00 11. -0x8 11. -0x4 11. " P11 ,Output Write Disable/Enable and Status 11" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. -0x8 10. -0x4 10. " P10 ,Output Write Disable/Enable and Status 10" "Disabled,Enabled" setclrfld.long 0x00 9. -0x8 9. -0x4 9. " P9 ,Output Write Disable/Enable and Status 9" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x8 8. -0x4 8. " P8 ,Output Write Disable/Enable and Status 8" "Disabled,Enabled" setclrfld.long 0x00 7. -0x8 7. -0x4 7. " P7 ,Output Write Disable/Enable and Status 7" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. -0x8 6. -0x4 6. " P6 ,Output Write Disable/Enable and Status 6" "Disabled,Enabled" setclrfld.long 0x00 5. -0x8 5. -0x4 5. " P5 ,Output Write Disable/Enable and Status 5" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x8 4. -0x4 4. " P4 ,Output Write Disable/Enable and Status 4" "Disabled,Enabled" setclrfld.long 0x00 3. -0x8 3. -0x4 3. " P3 ,Output Write Disable/Enable and Status 3" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. -0x8 2. -0x4 2. " P2 ,Output Write Disable/Enable and Status 2" "Disabled,Enabled" setclrfld.long 0x00 1. -0x8 1. -0x4 1. " P1 ,Output Write Disable/Enable and Status 1" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x8 0. -0x4 0. " P0 ,Output Write Disable/Enable and Status 0" "Disabled,Enabled" tree.end width 0xb endif sif (cpu()=="AT91SAM7S321"||cpu()=="AT91SAM7S64"||cpu()=="AT91SAM7S128"||cpu()=="AT91SAM7S256"||cpu()=="AT91SAM7S512") base 0xFFFFF400 tree "PIO" width 0x11 group.long 0x08++0x03 line.long 0x00 "PIO_PSR_Set/Clr,PIO Disable/Enable and Status Register" setclrfld.long 0x00 31. -0x8 31. -0x4 31. " P31 ,PIO Disable/Enable and Status 31" "Inactive,Active" setclrfld.long 0x00 30. -0x8 30. -0x4 30. " P30 ,PIO Disable/Enable and Status 30" "Inactive,Active" textline " " setclrfld.long 0x00 29. -0x8 29. -0x4 29. " P29 ,PIO Disable/Enable and Status 29" "Inactive,Active" setclrfld.long 0x00 28. -0x8 28. -0x4 28. " P28 ,PIO Disable/Enable and Status 28" "Inactive,Active" textline " " setclrfld.long 0x00 27. -0x8 27. -0x4 27. " P27 ,PIO Disable/Enable and Status 27" "Inactive,Active" setclrfld.long 0x00 26. -0x8 26. -0x4 26. " P26 ,PIO Disable/Enable and Status 26" "Inactive,Active" textline " " setclrfld.long 0x00 25. -0x8 25. -0x4 25. " P25 ,PIO Disable/Enable and Status 25" "Inactive,Active" setclrfld.long 0x00 24. -0x8 24. -0x4 24. " P24 ,PIO Disable/Enable and Status 24" "Inactive,Active" textline " " setclrfld.long 0x00 23. -0x8 23. -0x4 23. " P23 ,PIO Disable/Enable and Status 23" "Inactive,Active" setclrfld.long 0x00 22. -0x8 22. -0x4 22. " P22 ,PIO Disable/Enable and Status 22" "Inactive,Active" textline " " setclrfld.long 0x00 21. -0x8 21. -0x4 21. " P21 ,PIO Disable/Enable and Status 21" "Inactive,Active" setclrfld.long 0x00 20. -0x8 20. -0x4 20. " P20 ,PIO Disable/Enable and Status 20" "Inactive,Active" textline " " setclrfld.long 0x00 19. -0x8 19. -0x4 19. " P19 ,PIO Disable/Enable and Status 19" "Inactive,Active" setclrfld.long 0x00 18. -0x8 18. -0x4 18. " P18 ,PIO Disable/Enable and Status 18" "Inactive,Active" textline " " setclrfld.long 0x00 17. -0x8 17. -0x4 17. " P17 ,PIO Disable/Enable and Status 17" "Inactive,Active" setclrfld.long 0x00 16. -0x8 16. -0x4 16. " P16 ,PIO Disable/Enable and Status 16" "Inactive,Active" textline " " setclrfld.long 0x00 15. -0x8 15. -0x4 15. " P15 ,PIO Disable/Enable and Status 15" "Inactive,Active" setclrfld.long 0x00 14. -0x8 14. -0x4 14. " P14 ,PIO Disable/Enable and Status 14" "Inactive,Active" textline " " setclrfld.long 0x00 13. -0x8 13. -0x4 13. " P13 ,PIO Disable/Enable and Status 13" "Inactive,Active" setclrfld.long 0x00 12. -0x8 12. -0x4 12. " P12 ,PIO Disable/Enable and Status 12" "Inactive,Active" textline " " setclrfld.long 0x00 11. -0x8 11. -0x4 11. " P11 ,PIO Disable/Enable and Status 11" "Inactive,Active" setclrfld.long 0x00 10. -0x8 10. -0x4 10. " P10 ,PIO Disable/Enable and Status 10" "Inactive,Active" textline " " setclrfld.long 0x00 9. -0x8 9. -0x4 9. " P9 ,PIO Disable/Enable and Status 9" "Inactive,Active" setclrfld.long 0x00 8. -0x8 8. -0x4 8. " P8 ,PIO Disable/Enable and Status 8" "Inactive,Active" textline " " setclrfld.long 0x00 7. -0x8 7. -0x4 7. " P7 ,PIO Disable/Enable and Status 7" "Inactive,Active" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " P6 ,PIO Disable/Enable and Status 6" "Inactive,Active" textline " " setclrfld.long 0x00 5. -0x8 5. -0x4 5. " P5 ,PIO Disable/Enable and Status 5" "Inactive,Active" setclrfld.long 0x00 4. -0x8 4. -0x4 4. " P4 ,PIO Disable/Enable and Status 4" "Inactive,Active" textline " " setclrfld.long 0x00 3. -0x8 3. -0x4 3. " P3 ,PIO Disable/Enable and Status 3" "Inactive,Active" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " P2 ,PIO Disable/Enable and Status 2" "Inactive,Active" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " P1 ,PIO Disable/Enable and Status 1" "Inactive,Active" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " P0 ,PIO Disable/Enable and Status 0" "Inactive,Active" tree.end tree "Output" width 0x11 group.long 0x18++0x03 line.long 0x00 "PIO_OSR_Set/Clr,Output Disable/Enable and Status Register" setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,Output Disable/Enable and Status 31" "Input,Output" setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,Output Disable/Enable and Status 30" "Input,Output" textline " " setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,Output Disable/Enable and Status 29" "Input,Output" setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,Output Disable/Enable and Status 28" "Input,Output" textline " " setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,Output Disable/Enable and Status 27" "Input,Output" setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,Output Disable/Enable and Status 26" "Input,Output" textline " " setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,Output Disable/Enable and Status 25" "Input,Output" setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,Output Disable/Enable and Status 24" "Input,Output" textline " " setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,Output Disable/Enable and Status 23" "Input,Output" setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,Output Disable/Enable and Status 22" "Input,Output" textline " " setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,Output Disable/Enable and Status 21" "Input,Output" setclrfld.long 0x00 20. -0x8 20. -0x4 20. " P20 ,Output Disable/Enable and Status 20" "Input,Output" textline " " setclrfld.long 0x00 19. -0x8 19. -0x4 19. " P19 ,Output Disable/Enable and Status 19" "Input,Output" setclrfld.long 0x00 18. -0x8 18. -0x4 18. " P18 ,Output Disable/Enable and Status 18" "Input,Output" textline " " setclrfld.long 0x00 17. -0x8 17. -0x4 17. " P17 ,Output Disable/Enable and Status 17" "Input,Output" setclrfld.long 0x00 16. -0x8 16. -0x4 16. " P16 ,Output Disable/Enable and Status 16" "Input,Output" textline " " setclrfld.long 0x00 15. -0x8 15. -0x4 15. " P15 ,Output Disable/Enable and Status 15" "Input,Output" setclrfld.long 0x00 14. -0x8 14. -0x4 14. " P14 ,Output Disable/Enable and Status 14" "Input,Output" textline " " setclrfld.long 0x00 13. -0x8 13. -0x4 13. " P13 ,Output Disable/Enable and Status 13" "Input,Output" setclrfld.long 0x00 12. -0x8 12. -0x4 12. " P12 ,Output Disable/Enable and Status 12" "Input,Output" textline " " setclrfld.long 0x00 11. -0x8 11. -0x4 11. " P11 ,Output Disable/Enable and Status 11" "Input,Output" setclrfld.long 0x00 10. -0x8 10. -0x4 10. " P10 ,Output Disable/Enable and Status 10" "Input,Output" textline " " setclrfld.long 0x00 9. -0x8 9. -0x4 9. " P9 ,Output Disable/Enable and Status 9" "Input,Output" setclrfld.long 0x00 8. -0x8 8. -0x4 8. " P8 ,Output Disable/Enable and Status 8" "Input,Output" textline " " setclrfld.long 0x00 7. -0x8 7. -0x4 7. " P7 ,Output Disable/Enable and Status 7" "Input,Output" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " P6 ,Output Disable/Enable and Status 6" "Input,Output" textline " " setclrfld.long 0x00 5. -0x8 5. -0x4 5. " P5 ,Output Disable/Enable and Status 5" "Input,Output" setclrfld.long 0x00 4. -0x8 4. -0x4 4. " P4 ,Output Disable/Enable and Status 4" "Input,Output" textline " " setclrfld.long 0x00 3. -0x8 3. -0x4 3. " P3 ,Output Disable/Enable and Status 3" "Input,Output" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " P2 ,Output Disable/Enable and Status 2" "Input,Output" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " P1 ,Output Disable/Enable and Status 1" "Input,Output" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " P0 ,Output Disable/Enable and Status 0" "Input,Output" tree.end tree "Filter" width 0x12 group.long 0x28++0x03 line.long 0x00 "PIO_IFSR_Set/Clr,Glitch Input Filter Disable/Enable and Status Register" setclrfld.long 0x00 31. -0x8 31. -0x4 31. " P31 ,Input Filter Disable/Enable and Status 31" "Disabled,Enabled" setclrfld.long 0x00 30. -0x8 30. -0x4 30. " P30 ,Input Filter Disable/Enable and Status 30" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. -0x8 29. -0x4 29. " P29 ,Input Filter Disable/Enable and Status 29" "Disabled,Enabled" setclrfld.long 0x00 28. -0x8 28. -0x4 28. " P28 ,Input Filter Disable/Enable and Status 28" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. -0x8 27. -0x4 27. " P27 ,Input Filter Disable/Enable and Status 27" "Disabled,Enabled" setclrfld.long 0x00 26. -0x8 26. -0x4 26. " P26 ,Input Filter Disable/Enable and Status 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. -0x8 25. -0x4 25. " P25 ,Input Filter Disable/Enable and Status 25" "Disabled,Enabled" setclrfld.long 0x00 24. -0x8 24. -0x4 24. " P24 ,Input Filter Disable/Enable and Status 24" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. -0x8 23. -0x4 23. " P23 ,Input Filter Disable/Enable and Status 23" "Disabled,Enabled" setclrfld.long 0x00 22. -0x8 22. -0x4 22. " P22 ,Input Filter Disable/Enable and Status 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. -0x8 21. -0x4 21. " P21 ,Input Filter Disable/Enable and Status 21" "Disabled,Enabled" setclrfld.long 0x00 20. -0x8 20. -0x4 20. " P20 ,Input Filter Disable/Enable and Status 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. -0x8 19. -0x4 19. " P19 ,Input Filter Disable/Enable and Status 19" "Disabled,Enabled" setclrfld.long 0x00 18. -0x8 18. -0x4 18. " P18 ,Input Filter Disable/Enable and Status 18" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x8 17. -0x4 17. " P17 ,Input Filter Disable/Enable and Status 17" "Disabled,Enabled" setclrfld.long 0x00 16. -0x8 16. -0x4 16. " P16 ,Input Filter Disable/Enable and Status 16" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. -0x8 15. -0x4 15. " P15 ,Input Filter Disable/Enable and Status 15" "Disabled,Enabled" setclrfld.long 0x00 14. -0x8 14. -0x4 14. " P14 ,Input Filter Disable/Enable and Status 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. -0x8 13. -0x4 13. " P13 ,Input Filter Disable/Enable and Status 13" "Disabled,Enabled" setclrfld.long 0x00 12. -0x8 12. -0x4 12. " P12 ,Input Filter Disable/Enable and Status 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. -0x8 11. -0x4 11. " P11 ,Input Filter Disable/Enable and Status 11" "Disabled,Enabled" setclrfld.long 0x00 10. -0x8 10. -0x4 10. " P10 ,Input Filter Disable/Enable and Status 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. -0x8 9. -0x4 9. " P9 ,Input Filter Disable/Enable and Status 9" "Disabled,Enabled" setclrfld.long 0x00 8. -0x8 8. -0x4 8. " P8 ,Input Filter Disable/Enable and Status 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. -0x8 7. -0x4 7. " P7 ,Input Filter Disable/Enable and Status 7" "Disabled,Enabled" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " P6 ,Input Filter Disable/Enable and Status 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. -0x8 5. -0x4 5. " P5 ,Input Filter Disable/Enable and Status 5" "Disabled,Enabled" setclrfld.long 0x00 4. -0x8 4. -0x4 4. " P4 ,Input Filter Disable/Enable and Status 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x8 3. -0x4 3. " P3 ,Input Filter Disable/Enable and Status 3" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " P2 ,Input Filter Disable/Enable and Status 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " P1 ,Input Filter Disable/Enable and Status 1" "Disabled,Enabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " P0 ,Input Filter Disable/Enable and Status 0" "Disabled,Enabled" tree.end tree "Data" group.long 0x38++0x03 line.long 0x00 "PIO_ODSR_Set/Clr,Output Data Status Register" setclrfld.long 0x00 31. -0x8 31. -0x4 31. " P31 ,Output Data Status 31" "Low,High" setclrfld.long 0x00 30. -0x8 30. -0x4 30. " P30 ,Output Data Status 30" "Low,High" setclrfld.long 0x00 29. -0x8 29. -0x4 29. " P29 ,Output Data Status 29" "Low,High" textline " " setclrfld.long 0x00 28. -0x8 28. -0x4 28. " P28 ,Output Data Status 28" "Low,High" setclrfld.long 0x00 27. -0x8 27. -0x4 27. " P27 ,Output Data Status 27" "Low,High" setclrfld.long 0x00 26. -0x8 26. -0x4 26. " P26 ,Output Data Status 26" "Low,High" textline " " setclrfld.long 0x00 25. -0x8 25. -0x4 25. " P25 ,Output Data Status 25" "Low,High" setclrfld.long 0x00 24. -0x8 24. -0x4 24. " P24 ,Output Data Status 24" "Low,High" setclrfld.long 0x00 23. -0x8 23. -0x4 23. " P23 ,Output Data Status 23" "Low,High" textline " " setclrfld.long 0x00 22. -0x8 22. -0x4 22. " P22 ,Output Data Status 22" "Low,High" setclrfld.long 0x00 21. -0x8 21. -0x4 21. " P21 ,Output Data Status 21" "Low,High" setclrfld.long 0x00 20. -0x8 20. -0x4 20. " P20 ,Output Data Status 20" "Low,High" textline " " setclrfld.long 0x00 19. -0x8 19. -0x4 19. " P19 ,Output Data Status 19" "Low,High" setclrfld.long 0x00 18. -0x8 18. -0x4 18. " P18 ,Output Data Status 18" "Low,High" setclrfld.long 0x00 17. -0x8 17. -0x4 17. " P17 ,Output Data Status 17" "Low,High" textline " " setclrfld.long 0x00 16. -0x8 16. -0x4 16. " P16 ,Output Data Status 16" "Low,High" setclrfld.long 0x00 15. -0x8 15. -0x4 15. " P15 ,Output Data Status 15" "Low,High" setclrfld.long 0x00 14. -0x8 14. -0x4 14. " P14 ,Output Data Status 14" "Low,High" textline " " setclrfld.long 0x00 13. -0x8 13. -0x4 13. " P13 ,Output Data Status 13" "Low,High" setclrfld.long 0x00 12. -0x8 12. -0x4 12. " P12 ,Output Data Status 12" "Low,High" setclrfld.long 0x00 11. -0x8 11. -0x4 11. " P11 ,Output Data Status 11" "Low,High" textline " " setclrfld.long 0x00 10. -0x8 10. -0x4 10. " P10 ,Output Data Status 10" "Low,High" setclrfld.long 0x00 9. -0x8 9. -0x4 9. " P9 ,Output Data Status 9" "Low,High" setclrfld.long 0x00 8. -0x8 8. -0x4 8. " P8 ,Output Data Status 8" "Low,High" textline " " setclrfld.long 0x00 7. -0x8 7. -0x4 7. " P7 ,Output Data Status 7" "Low,High" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " P6 ,Output Data Status 6" "Low,High" setclrfld.long 0x00 5. -0x8 5. -0x4 5. " P5 ,Output Data Status 5" "Low,High" textline " " setclrfld.long 0x00 4. -0x8 4. -0x4 4. " P4 ,Output Data Status 4" "Low,High" setclrfld.long 0x00 3. -0x8 3. -0x4 3. " P3 ,Output Data Status 3" "Low,High" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " P2 ,Output Data Status 2" "Low,High" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " P1 ,Output Data Status 1" "Low,High" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " P0 ,Output Data Status 0" "Low,High" rgroup.long 0x3c++0x03 line.long 0x00 "PIO_PDSR,Pin Data Status Register" bitfld.long 0x00 31. " P31 ,Pin Data Status 31" "Low,High" bitfld.long 0x00 30. " P30 ,Pin Data Status 30" "Low,High" bitfld.long 0x00 29. " P29 ,Pin Data Status 29" "Low,High" textline " " bitfld.long 0x00 28. " P28 ,Pin Data Status 28" "Low,High" bitfld.long 0x00 27. " P27 ,Pin Data Status 27" "Low,High" bitfld.long 0x00 26. " P26 ,Pin Data Status 26" "Low,High" textline " " bitfld.long 0x00 25. " P25 ,Pin Data Status 25" "Low,High" bitfld.long 0x00 24. " P24 ,Pin Data Status 24" "Low,High" bitfld.long 0x00 23. " P23 ,Pin Data Status 23" "Low,High" textline " " bitfld.long 0x00 22. " P22 ,Pin Data Status 22" "Low,High" bitfld.long 0x00 21. " P21 ,Pin Data Status 21" "Low,High" bitfld.long 0x00 20. " P20 ,Pin Data Status 20" "Low,High" textline " " bitfld.long 0x00 19. " P19 ,Pin Data Status 19" "Low,High" bitfld.long 0x00 18. " P18 ,Pin Data Status 18" "Low,High" bitfld.long 0x00 17. " P17 ,Pin Data Status 17" "Low,High" textline " " bitfld.long 0x00 16. " P16 ,Pin Data Status 16" "Low,High" bitfld.long 0x00 15. " P15 ,Pin Data Status 15" "Low,High" bitfld.long 0x00 14. " P14 ,Pin Data Status 14" "Low,High" textline " " bitfld.long 0x00 13. " P13 ,Pin Data Status 13" "Low,High" bitfld.long 0x00 12. " P12 ,Pin Data Status 12" "Low,High" bitfld.long 0x00 11. " P11 ,Pin Data Status 11" "Low,High" textline " " bitfld.long 0x00 10. " P10 ,Pin Data Status 10" "Low,High" bitfld.long 0x00 9. " P9 ,Pin Data Status 9" "Low,High" bitfld.long 0x00 8. " P8 ,Pin Data Status 8" "Low,High" textline " " bitfld.long 0x00 7. " P7 ,Pin Data Status 7" "Low,High" bitfld.long 0x00 6. " P6 ,Pin Data Status 6" "Low,High" bitfld.long 0x00 5. " P5 ,Pin Data Status 5" "Low,High" textline " " bitfld.long 0x00 4. " P4 ,Pin Data Status 4" "Low,High" bitfld.long 0x00 3. " P3 ,Pin Data Status 3" "Low,High" bitfld.long 0x00 2. " P2 ,Pin Data Status 2" "Low,High" textline " " bitfld.long 0x00 1. " P1 ,Pin Data Status 1" "Low,High" bitfld.long 0x00 0. " P0 ,Pin Data Status 0" "Low,High" tree.end tree "Interrupt" group.long 0x48++0x03 line.long 0x00 "PIO_IMR_Set/Clr,Interrupt Enable/Mask Register" setclrfld.long 0x00 31. -0x8 31. -0x4 31. " P31 ,Input Change Interrupt Enable/Mask 31" "Disabled,Enabled" setclrfld.long 0x00 30. -0x8 30. -0x4 30. " P30 ,Input Change Interrupt Enable/Mask 30" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. -0x8 29. -0x4 29. " P29 ,Input Change Interrupt Enable/Mask 29" "Disabled,Enabled" setclrfld.long 0x00 28. -0x8 28. -0x4 28. " P28 ,Input Change Interrupt Enable/Mask 28" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. -0x8 27. -0x4 27. " P27 ,Input Change Interrupt Enable/Mask 27" "Disabled,Enabled" setclrfld.long 0x00 26. -0x8 26. -0x4 26. " P26 ,Input Change Interrupt Enable/Mask 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. -0x8 25. -0x4 25. " P25 ,Input Change Interrupt Enable/Mask 25" "Disabled,Enabled" setclrfld.long 0x00 24. -0x8 24. -0x4 24. " P24 ,Input Change Interrupt Enable/Mask 24" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. -0x8 23. -0x4 23. " P23 ,Input Change Interrupt Enable/Mask 23" "Disabled,Enabled" setclrfld.long 0x00 22. -0x8 22. -0x4 22. " P22 ,Input Change Interrupt Enable/Mask 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. -0x8 21. -0x4 21. " P21 ,Input Change Interrupt Enable/Mask 21" "Disabled,Enabled" setclrfld.long 0x00 20. -0x8 20. -0x4 20. " P20 ,Input Change Interrupt Enable/Mask 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. -0x8 19. -0x4 19. " P19 ,Input Change Interrupt Enable/Mask 19" "Disabled,Enabled" setclrfld.long 0x00 18. -0x8 18. -0x4 18. " P18 ,Input Change Interrupt Enable/Mask 18" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x8 17. -0x4 17. " P17 ,Input Change Interrupt Enable/Mask 17" "Disabled,Enabled" setclrfld.long 0x00 16. -0x8 16. -0x4 16. " P16 ,Input Change Interrupt Enable/Mask 16" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. -0x8 15. -0x4 15. " P15 ,Input Change Interrupt Enable/Mask 15" "Disabled,Enabled" setclrfld.long 0x00 14. -0x8 14. -0x4 14. " P14 ,Input Change Interrupt Enable/Mask 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. -0x8 13. -0x4 13. " P13 ,Input Change Interrupt Enable/Mask 13" "Disabled,Enabled" setclrfld.long 0x00 12. -0x8 12. -0x4 12. " P12 ,Input Change Interrupt Enable/Mask 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. -0x8 11. -0x4 11. " P11 ,Input Change Interrupt Enable/Mask 11" "Disabled,Enabled" setclrfld.long 0x00 10. -0x8 10. -0x4 10. " P10 ,Input Change Interrupt Enable/Mask 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. -0x8 9. -0x4 9. " P9 ,Input Change Interrupt Enable/Mask 9" "Disabled,Enabled" setclrfld.long 0x00 8. -0x8 8. -0x4 8. " P8 ,Input Change Interrupt Enable/Mask 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. -0x8 7. -0x4 7. " P7 ,Input Change Interrupt Enable/Mask 7" "Disabled,Enabled" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " P6 ,Input Change Interrupt Enable/Mask 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. -0x8 5. -0x4 5. " P5 ,Input Change Interrupt Enable/Mask 5" "Disabled,Enabled" setclrfld.long 0x00 4. -0x8 4. -0x4 4. " P4 ,Input Change Interrupt Enable/Mask 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x8 3. -0x4 3. " P3 ,Input Change Interrupt Enable/Mask 3" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " P2 ,Input Change Interrupt Enable/Mask 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " P1 ,Input Change Interrupt Enable/Mask 1" "Disabled,Enabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " P0 ,Input Change Interrupt Enable/Mask 0" "Disabled,Enabled" width 0x9 rgroup.long 0x4c++0x03 line.long 0x0 "PIO_ISR,Interrupt Status Register" bitfld.long 0x0 31. " P31 ,Input Change Interrupt Status 31" "Not changed,Changed" bitfld.long 0x0 30. " P30 ,Input Change Interrupt Status 30" "Not changed,Changed" textline " " bitfld.long 0x0 29. " P29 ,Input Change Interrupt Status 29" "Not changed,Changed" bitfld.long 0x0 28. " P28 ,Input Change Interrupt Status 28" "Not changed,Changed" textline " " bitfld.long 0x0 27. " P27 ,Input Change Interrupt Status 27" "Not changed,Changed" bitfld.long 0x0 26. " P26 ,Input Change Interrupt Status 26" "Not changed,Changed" textline " " bitfld.long 0x0 25. " P25 ,Input Change Interrupt Status 25" "Not changed,Changed" bitfld.long 0x0 24. " P24 ,Input Change Interrupt Status 24" "Not changed,Changed" textline " " bitfld.long 0x0 23. " P23 ,Input Change Interrupt Status 23" "Not changed,Changed" bitfld.long 0x0 22. " P22 ,Input Change Interrupt Status 22" "Not changed,Changed" textline " " bitfld.long 0x0 21. " P21 ,Input Change Interrupt Status 21" "Not changed,Changed" bitfld.long 0x0 20. " P20 ,Input Change Interrupt Status 20" "Not changed,Changed" textline " " bitfld.long 0x0 19. " P19 ,Input Change Interrupt Status 19" "Not changed,Changed" bitfld.long 0x0 18. " P18 ,Input Change Interrupt Status 18" "Not changed,Changed" textline " " bitfld.long 0x0 17. " P17 ,Input Change Interrupt Status 17" "Not changed,Changed" bitfld.long 0x0 16. " P16 ,Input Change Interrupt Status 16" "Not changed,Changed" textline " " bitfld.long 0x0 15. " P15 ,Input Change Interrupt Status 15" "Not changed,Changed" bitfld.long 0x0 14. " P14 ,Input Change Interrupt Status 14" "Not changed,Changed" textline " " bitfld.long 0x0 13. " P13 ,Input Change Interrupt Status 13" "Not changed,Changed" bitfld.long 0x0 12. " P12 ,Input Change Interrupt Status 12" "Not changed,Changed" textline " " bitfld.long 0x0 11. " P11 ,Input Change Interrupt Status 11" "Not changed,Changed" bitfld.long 0x0 10. " P10 ,Input Change Interrupt Status 10" "Not changed,Changed" textline " " bitfld.long 0x0 9. " P9 ,Input Change Interrupt Status 9" "Not changed,Changed" bitfld.long 0x0 8. " P8 ,Input Change Interrupt Status 8" "Not changed,Changed" textline " " bitfld.long 0x0 7. " P7 ,Input Change Interrupt Status 7" "Not changed,Changed" bitfld.long 0x0 6. " P6 ,Input Change Interrupt Status 6" "Not changed,Changed" textline " " bitfld.long 0x0 5. " P5 ,Input Change Interrupt Status 5" "Not changed,Changed" bitfld.long 0x0 4. " P4 ,Input Change Interrupt Status 4" "Not changed,Changed" textline " " bitfld.long 0x0 3. " P3 ,Input Change Interrupt Status 3" "Not changed,Changed" bitfld.long 0x0 2. " P2 ,Input Change Interrupt Status 2" "Not changed,Changed" textline " " bitfld.long 0x0 1. " P1 ,Input Change Interrupt Status 1" "Not changed,Changed" bitfld.long 0x0 0. " P0 ,Input Change Interrupt Status 0" "Not changed,Changed" tree.end tree "Multi-driver" width 0x12 group.long 0x58++0x03 line.long 0x00 "PIO_MDSR_Set/Clr,Multi-driver Status Register" setclrfld.long 0x00 31. -0x8 31. -0x4 31. " P31 ,Multi Drive Disable/Enable and Status 31" "Disabled,Enabled" setclrfld.long 0x00 30. -0x8 30. -0x4 30. " P30 ,Multi Drive Disable/Enable and Status 30" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. -0x8 29. -0x4 29. " P29 ,Multi Drive Disable/Enable and Status 29" "Disabled,Enabled" setclrfld.long 0x00 28. -0x8 28. -0x4 28. " P28 ,Multi Drive Disable/Enable and Status 28" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. -0x8 27. -0x4 27. " P27 ,Multi Drive Disable/Enable and Status 27" "Disabled,Enabled" setclrfld.long 0x00 26. -0x8 26. -0x4 26. " P26 ,Multi Drive Disable/Enable and Status 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. -0x8 25. -0x4 25. " P25 ,Multi Drive Disable/Enable and Status 25" "Disabled,Enabled" setclrfld.long 0x00 24. -0x8 24. -0x4 24. " P24 ,Multi Drive Disable/Enable and Status 24" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. -0x8 23. -0x4 23. " P23 ,Multi Drive Disable/Enable and Status 23" "Disabled,Enabled" setclrfld.long 0x00 22. -0x8 22. -0x4 22. " P22 ,Multi Drive Disable/Enable and Status 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. -0x8 21. -0x4 21. " P21 ,Multi Drive Disable/Enable and Status 21" "Disabled,Enabled" setclrfld.long 0x00 20. -0x8 20. -0x4 20. " P20 ,Multi Drive Disable/Enable and Status 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. -0x8 19. -0x4 19. " P19 ,Multi Drive Disable/Enable and Status 19" "Disabled,Enabled" setclrfld.long 0x00 18. -0x8 18. -0x4 18. " P18 ,Multi Drive Disable/Enable and Status 18" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x8 17. -0x4 17. " P17 ,Multi Drive Disable/Enable and Status 17" "Disabled,Enabled" setclrfld.long 0x00 16. -0x8 16. -0x4 16. " P16 ,Multi Drive Disable/Enable and Status 16" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. -0x8 15. -0x4 15. " P15 ,Multi Drive Disable/Enable and Status 15" "Disabled,Enabled" setclrfld.long 0x00 14. -0x8 14. -0x4 14. " P14 ,Multi Drive Disable/Enable and Status 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. -0x8 13. -0x4 13. " P13 ,Multi Drive Disable/Enable and Status 13" "Disabled,Enabled" setclrfld.long 0x00 12. -0x8 12. -0x4 12. " P12 ,Multi Drive Disable/Enable and Status 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. -0x8 11. -0x4 11. " P11 ,Multi Drive Disable/Enable and Status 11" "Disabled,Enabled" setclrfld.long 0x00 10. -0x8 10. -0x4 10. " P10 ,Multi Drive Disable/Enable and Status 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. -0x8 9. -0x4 9. " P9 ,Multi Drive Disable/Enable and Status 9" "Disabled,Enabled" setclrfld.long 0x00 8. -0x8 8. -0x4 8. " P8 ,Multi Drive Disable/Enable and Status 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. -0x8 7. -0x4 7. " P7 ,Multi Drive Disable/Enable and Status 7" "Disabled,Enabled" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " P6 ,Multi Drive Disable/Enable and Status 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. -0x8 5. -0x4 5. " P5 ,Multi Drive Disable/Enable and Status 5" "Disabled,Enabled" setclrfld.long 0x00 4. -0x8 4. -0x4 4. " P4 ,Multi Drive Disable/Enable and Status 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x8 3. -0x4 3. " P3 ,Multi Drive Disable/Enable and Status 3" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " P2 ,Multi Drive Disable/Enable and Status 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " P1 ,Multi Drive Disable/Enable and Status 1" "Disabled,Enabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " P0 ,Multi Drive Disable/Enable and Status 0" "Disabled,Enabled" tree.end tree "Pull-up" group.long 0x68++0x03 line.long 0x00 "PIO_PUSR_Set/Clr,Pad Pull-up Disable/Enable and Status Register" setclrfld.long 0x00 31. -0x8 31. -0x4 31. " P31 ,Pull Up Disable/Enable and Status 31" "Enabled,Disabled" setclrfld.long 0x00 30. -0x8 30. -0x4 30. " P30 ,Pull Up Disable/Enable and Status 30" "Enabled,Disabled" textline " " setclrfld.long 0x00 29. -0x8 29. -0x4 29. " P29 ,Pull Up Disable/Enable and Status 29" "Enabled,Disabled" setclrfld.long 0x00 28. -0x8 28. -0x4 28. " P28 ,Pull Up Disable/Enable and Status 28" "Enabled,Disabled" textline " " setclrfld.long 0x00 27. -0x8 27. -0x4 27. " P27 ,Pull Up Disable/Enable and Status 27" "Enabled,Disabled" setclrfld.long 0x00 26. -0x8 26. -0x4 26. " P26 ,Pull Up Disable/Enable and Status 26" "Enabled,Disabled" textline " " setclrfld.long 0x00 25. -0x8 25. -0x4 25. " P25 ,Pull Up Disable/Enable and Status 25" "Enabled,Disabled" setclrfld.long 0x00 24. -0x8 24. -0x4 24. " P24 ,Pull Up Disable/Enable and Status 24" "Enabled,Disabled" textline " " setclrfld.long 0x00 23. -0x8 23. -0x4 23. " P23 ,Pull Up Disable/Enable and Status 23" "Enabled,Disabled" setclrfld.long 0x00 22. -0x8 22. -0x4 22. " P22 ,Pull Up Disable/Enable and Status 22" "Enabled,Disabled" textline " " setclrfld.long 0x00 21. -0x8 21. -0x4 21. " P21 ,Pull Up Disable/Enable and Status 21" "Enabled,Disabled" setclrfld.long 0x00 20. -0x8 20. -0x4 20. " P20 ,Pull Up Disable/Enable and Status 20" "Enabled,Disabled" textline " " setclrfld.long 0x00 19. -0x8 19. -0x4 19. " P19 ,Pull Up Disable/Enable and Status 19" "Enabled,Disabled" setclrfld.long 0x00 18. -0x8 18. -0x4 18. " P18 ,Pull Up Disable/Enable and Status 18" "Enabled,Disabled" textline " " setclrfld.long 0x00 17. -0x8 17. -0x4 17. " P17 ,Pull Up Disable/Enable and Status 17" "Enabled,Disabled" setclrfld.long 0x00 16. -0x8 16. -0x4 16. " P16 ,Pull Up Disable/Enable and Status 16" "Enabled,Disabled" textline " " setclrfld.long 0x00 15. -0x8 15. -0x4 15. " P15 ,Pull Up Disable/Enable and Status 15" "Enabled,Disabled" setclrfld.long 0x00 14. -0x8 14. -0x4 14. " P14 ,Pull Up Disable/Enable and Status 14" "Enabled,Disabled" textline " " setclrfld.long 0x00 13. -0x8 13. -0x4 13. " P13 ,Pull Up Disable/Enable and Status 13" "Enabled,Disabled" setclrfld.long 0x00 12. -0x8 12. -0x4 12. " P12 ,Pull Up Disable/Enable and Status 12" "Enabled,Disabled" textline " " setclrfld.long 0x00 11. -0x8 11. -0x4 11. " P11 ,Pull Up Disable/Enable and Status 11" "Enabled,Disabled" setclrfld.long 0x00 10. -0x8 10. -0x4 10. " P10 ,Pull Up Disable/Enable and Status 10" "Enabled,Disabled" textline " " setclrfld.long 0x00 9. -0x8 9. -0x4 9. " P9 ,Pull Up Disable/Enable and Status 9" "Enabled,Disabled" setclrfld.long 0x00 8. -0x8 8. -0x4 8. " P8 ,Pull Up Disable/Enable and Status 8" "Enabled,Disabled" textline " " setclrfld.long 0x00 7. -0x8 7. -0x4 7. " P7 ,Pull Up Disable/Enable and Status 7" "Enabled,Disabled" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " P6 ,Pull Up Disable/Enable and Status 6" "Enabled,Disabled" textline " " setclrfld.long 0x00 5. -0x8 5. -0x4 5. " P5 ,Pull Up Disable/Enable and Status 5" "Enabled,Disabled" setclrfld.long 0x00 4. -0x8 4. -0x4 4. " P4 ,Pull Up Disable/Enable and Status 4" "Enabled,Disabled" textline " " setclrfld.long 0x00 3. -0x8 3. -0x4 3. " P3 ,Pull Up Disable/Enable and Status 3" "Enabled,Disabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " P2 ,Pull Up Disable/Enable and Status 2" "Enabled,Disabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " P1 ,Pull Up Disable/Enable and Status 1" "Enabled,Disabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " P0 ,Pull Up Disable/Enable and Status 0" "Enabled,Disabled" tree.end tree "Peripherial Selection" width 0xe group.long 0x78++0x03 line.long 0x00 "PIO_ABSR_Sel,AB Selection and Status Register" setclrfld.long 0x00 31. -0x4 31. -0x8 31. " P31 ,Peripheral A B Selection and Status 31" "A,B" setclrfld.long 0x00 30. -0x4 30. -0x8 30. " P30 ,Peripheral A B Selection and Status 30" "A,B" textline " " setclrfld.long 0x00 29. -0x4 29. -0x8 29. " P29 ,Peripheral A B Selection and Status 29" "A,B" setclrfld.long 0x00 28. -0x4 28. -0x8 28. " P28 ,Peripheral A B Selection and Status 28" "A,B" textline " " setclrfld.long 0x00 27. -0x4 27. -0x8 27. " P27 ,Peripheral A B Selection and Status 27" "A,B" setclrfld.long 0x00 26. -0x4 26. -0x8 26. " P26 ,Peripheral A B Selection and Status 26" "A,B" textline " " setclrfld.long 0x00 25. -0x4 25. -0x8 25. " P25 ,Peripheral A B Selection and Status 25" "A,B" setclrfld.long 0x00 24. -0x4 24. -0x8 24. " P24 ,Peripheral A B Selection and Status 24" "A,B" textline " " setclrfld.long 0x00 23. -0x4 23. -0x8 23. " P23 ,Peripheral A B Selection and Status 23" "A,B" setclrfld.long 0x00 22. -0x4 22. -0x8 22. " P22 ,Peripheral A B Selection and Status 22" "A,B" textline " " setclrfld.long 0x00 21. -0x4 21. -0x8 21. " P21 ,Peripheral A B Selection and Status 21" "A,B" setclrfld.long 0x00 20. -0x4 20. -0x8 20. " P20 ,Peripheral A B Selection and Status 20" "A,B" textline " " setclrfld.long 0x00 19. -0x4 19. -0x8 19. " P19 ,Peripheral A B Selection and Status 19" "A,B" setclrfld.long 0x00 18. -0x4 18. -0x8 18. " P18 ,Peripheral A B Selection and Status 18" "A,B" textline " " setclrfld.long 0x00 17. -0x4 17. -0x8 17. " P17 ,Peripheral A B Selection and Status 17" "A,B" setclrfld.long 0x00 16. -0x4 16. -0x8 16. " P16 ,Peripheral A B Selection and Status 16" "A,B" textline " " setclrfld.long 0x00 15. -0x4 15. -0x8 15. " P15 ,Peripheral A B Selection and Status 15" "A,B" setclrfld.long 0x00 14. -0x4 14. -0x8 14. " P14 ,Peripheral A B Selection and Status 14" "A,B" textline " " setclrfld.long 0x00 13. -0x4 13. -0x8 13. " P13 ,Peripheral A B Selection and Status 13" "A,B" setclrfld.long 0x00 12. -0x4 12. -0x8 12. " P12 ,Peripheral A B Selection and Status 12" "A,B" textline " " setclrfld.long 0x00 11. -0x4 11. -0x8 11. " P11 ,Peripheral A B Selection and Status 11" "A,B" setclrfld.long 0x00 10. -0x4 10. -0x8 10. " P10 ,Peripheral A B Selection and Status 10" "A,B" textline " " setclrfld.long 0x00 9. -0x4 9. -0x8 9. " P9 ,Peripheral A B Selection and Status 9" "A,B" setclrfld.long 0x00 8. -0x4 8. -0x8 8. " P8 ,Peripheral A B Selection and Status 8" "A,B" textline " " setclrfld.long 0x00 7. -0x4 7. -0x8 7. " P7 ,Peripheral A B Selection and Status 7" "A,B" setclrfld.long 0x00 6. -0x4 6. -0x8 6. " P6 ,Peripheral A B Selection and Status 6" "A,B" textline " " setclrfld.long 0x00 5. -0x4 5. -0x8 5. " P5 ,Peripheral A B Selection and Status 5" "A,B" setclrfld.long 0x00 4. -0x4 4. -0x8 4. " P4 ,Peripheral A B Selection and Status 4" "A,B" textline " " setclrfld.long 0x00 3. -0x4 3. -0x8 3. " P3 ,Peripheral A B Selection and Status 3" "A,B" setclrfld.long 0x00 2. -0x4 2. -0x8 2. " P2 ,Peripheral A B Selection and Status 2" "A,B" textline " " setclrfld.long 0x00 1. -0x4 1. -0x8 1. " P1 ,Peripheral A B Selection and Status 1" "A,B" setclrfld.long 0x00 0. -0x4 0. -0x8 0. " P0 ,Peripheral A B Selection and Status 0" "A,B" tree.end tree "Output Write" width 0x12 group.long 0xA8++0x03 line.long 0x00 "PIO_OWSR_Set/Clr,Output Write Disable/Enable and Status Register" setclrfld.long 0x00 31. -0x8 31. -0x4 31. " P31 ,Output Write Disable/Enable and Status 31" "Disabled,Enabled" setclrfld.long 0x00 30. -0x8 30. -0x4 30. " P30 ,Output Write Disable/Enable and Status 30" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. -0x8 29. -0x4 29. " P29 ,Output Write Disable/Enable and Status 29" "Disabled,Enabled" setclrfld.long 0x00 28. -0x8 28. -0x4 28. " P28 ,Output Write Disable/Enable and Status 28" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. -0x8 27. -0x4 27. " P27 ,Output Write Disable/Enable and Status 27" "Disabled,Enabled" setclrfld.long 0x00 26. -0x8 26. -0x4 26. " P26 ,Output Write Disable/Enable and Status 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. -0x8 25. -0x4 25. " P25 ,Output Write Disable/Enable and Status 25" "Disabled,Enabled" setclrfld.long 0x00 24. -0x8 24. -0x4 24. " P24 ,Output Write Disable/Enable and Status 24" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. -0x8 23. -0x4 23. " P23 ,Output Write Disable/Enable and Status 23" "Disabled,Enabled" setclrfld.long 0x00 22. -0x8 22. -0x4 22. " P22 ,Output Write Disable/Enable and Status 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. -0x8 21. -0x4 21. " P21 ,Output Write Disable/Enable and Status 21" "Disabled,Enabled" setclrfld.long 0x00 20. -0x8 20. -0x4 20. " P20 ,Output Write Disable/Enable and Status 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. -0x8 19. -0x4 19. " P19 ,Output Write Disable/Enable and Status 19" "Disabled,Enabled" setclrfld.long 0x00 18. -0x8 18. -0x4 18. " P18 ,Output Write Disable/Enable and Status 18" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x8 17. -0x4 17. " P17 ,Output Write Disable/Enable and Status 17" "Disabled,Enabled" setclrfld.long 0x00 16. -0x8 16. -0x4 16. " P16 ,Output Write Disable/Enable and Status 16" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. -0x8 15. -0x4 15. " P15 ,Output Write Disable/Enable and Status 15" "Disabled,Enabled" setclrfld.long 0x00 14. -0x8 14. -0x4 14. " P14 ,Output Write Disable/Enable and Status 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. -0x8 13. -0x4 13. " P13 ,Output Write Disable/Enable and Status 13" "Disabled,Enabled" setclrfld.long 0x00 12. -0x8 12. -0x4 12. " P12 ,Output Write Disable/Enable and Status 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. -0x8 11. -0x4 11. " P11 ,Output Write Disable/Enable and Status 11" "Disabled,Enabled" setclrfld.long 0x00 10. -0x8 10. -0x4 10. " P10 ,Output Write Disable/Enable and Status 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. -0x8 9. -0x4 9. " P9 ,Output Write Disable/Enable and Status 9" "Disabled,Enabled" setclrfld.long 0x00 8. -0x8 8. -0x4 8. " P8 ,Output Write Disable/Enable and Status 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. -0x8 7. -0x4 7. " P7 ,Output Write Disable/Enable and Status 7" "Disabled,Enabled" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " P6 ,Output Write Disable/Enable and Status 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. -0x8 5. -0x4 5. " P5 ,Output Write Disable/Enable and Status 5" "Disabled,Enabled" setclrfld.long 0x00 4. -0x8 4. -0x4 4. " P4 ,Output Write Disable/Enable and Status 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x8 3. -0x4 3. " P3 ,Output Write Disable/Enable and Status 3" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " P2 ,Output Write Disable/Enable and Status 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " P1 ,Output Write Disable/Enable and Status 1" "Disabled,Enabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " P0 ,Output Write Disable/Enable and Status 0" "Disabled,Enabled" tree.end width 0xb endif tree.end tree "Periodic Interval Timer (PIT)" base 0xFFFFFD30 width 0xa group.long 0x00++0x03 line.long 0x00 "PIT_MR,Mode Register" bitfld.long 0x00 25. " PITIEN ,Periodic Interval Timer Interrupt Enable" "No effect,Interrupt" bitfld.long 0x00 24. " PITEN ,Period Interval Timer Enabled" "Disabled,Enabled" textline " " hexmask.long.tbyte 0x00 0.--19. 1. " PIV ,Periodic Interval Value" rgroup.long 0x04++3 line.long 0x00 "PIT_SR,Status Register" bitfld.long 0x00 0. " PITS ,Periodic Interval Timer Status" "PIV not reached,PIV reached" hgroup.long 0x08++3 hide.long 0x00 "PIT_PIVR,Periodic Interval Value Register" in rgroup.long 0x0c++3 line.long 0x0 "PIT_PIIR,Periodic Interval Image Register" hexmask.long.word 0x0 20.--31. 1. " PICNT ,Periodic Interval Counter" hexmask.long.tbyte 0x0 0.--19. 1. " CPIV ,Current Periodic Interval Value" width 0xb tree.end tree "Watchdog Timer (WDT)" base 0xFFFFFD40 width 0x8 wgroup.long 0x00++0x03 line.long 0x00 "WDT_CR,Control Register" hexmask.long.byte 0x00 24.--31. 1. " KEY ,Password" bitfld.long 0x00 0. " WDRSTT ,Watchdog Restart" "No effect,Restarted" group.long 0x04++0x03 line.long 0x00 "WDT_MR,Mode Register" bitfld.long 0x00 29. " WDIDLEHLT ,Watchdog Idle Halt" "Running,Stopped" bitfld.long 0x00 28. " WDDBGHLT ,Watchdog Debug Halt" "Running,Stopped" textline " " hexmask.long.word 0x00 16.--27. 1. " WDD ,Watchdog Delta Value" bitfld.long 0x00 15. " WDDIS ,Watchdog Disable" "Enabled,Disabled" textline " " bitfld.long 0x00 14. " WDRPROC ,Watchdog Reset Processor" "All resets,Reset" bitfld.long 0x00 13. " WDRSTEN ,Watchdog Reset Enable" "No effect,Reset" textline " " bitfld.long 0x00 12. " WDFIEN ,Watchdog Fault Interrupt Enable" "No effect,Interrupt" hexmask.long.word 0x00 0.--11. 1. " WDV ,Watchdog Counter Value" rgroup.long 0x08++0x03 line.long 0x00 "WDT_SR,Status Register" bitfld.long 0x00 1. " WDERR ,Watchdog Error" "No error,Error" bitfld.long 0x00 0. " WDUNF ,Watchdog Underflow" "No underflow,Underflow" width 0xb tree.end tree "Voltage Regulator Mode Controller (VREG)" base 0xFFFFFD60 width 0x9 group.long 0x00++0x03 line.long 0x00 "VREG_MR,Voltage Regulator Mode Register" bitfld.long 0x00 0. " PSTDBY ,Periodic Interval Value" "Normal,Standby" width 0xb tree.end tree "Memory Controller (MC)" base 0xFFFFFF00 width 0x8 wgroup.long 0x00++0x03 line.long 0x00 "MC_RCR,MC Remap Control Register" bitfld.long 0x00 0. " RCB ,Remap Command Bit" "No effect,Canceled and restored" rgroup.long 0x04++0x03 line.long 0x00 "MC_ASR,MC Abort Status Register" bitfld.long 0x00 25. " SVMST1 ,Saved ARM7TDMI Abort Source" "Not aborted,Aborted" bitfld.long 0x00 24. " SVMST0 ,Saved PDC Abort Source" "Not aborted,Aborted" textline " " bitfld.long 0x00 17. " MST1 ,ARM7TDMI Abort Source" "Not aborted,Aborted" bitfld.long 0x00 16. " MST0 ,PDC Abort Source" "Not aborted,Aborted" textline " " bitfld.long 0x00 10.--11. " ABTTYP ,Abort Type Status" "Data Read,Data Write,Code Fetch,?..." bitfld.long 0x00 8.--9. " ABTSZ ,Abort Size Status" "Byte,Half-word,Word,?..." textline " " bitfld.long 0x00 1. " MISADD ,Misaligned Address Abort Status" "Not aborted,Aborted" bitfld.long 0x00 0. " UNDADD ,Undefined Address Abort Status" "Not aborted,Aborted" rgroup.long 0x08++0x03 line.long 0x00 "MC_AASR,MC Abort Address Status Register" ;hexfld.long 0x00 " ABTADD ,Abort Address" width 0xb tree.end sif (cpu()=="AT91SAM7S32"||cpu()=="AT91SAM7S64"||cpu()=="AT91SAM7S128"||cpu()=="AT91SAM7S321") tree "Embedded Flash Controller (EFC)" base 0xFFFFFF60 width 0x8 rgroup.long 0x00++0x03 line.long 0x00 "MC_FMR,MC Flash Mode Register" hexmask.long.byte 0x00 16.--23. 1. " FMCN ,Flash Microsecond Cycle Number" bitfld.long 0x00 8.--9. " FWS ,Flash Wait State" "1 cycle,2 cycles,3 cycles,4 cycles" textline " " bitfld.long 0x00 7. " NEBP ,No Erase Before Programming" "Erased,Not erased" bitfld.long 0x00 3. " PROGE ,Programming Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LOCKE ,Lock Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " FRDY ,Flash Ready Interrupt Enable" "Disabled,Enabled" wgroup.long 0x00++0x03 line.long 0x00 "MC_FMR,MC Flash Mode Register" hexmask.long.byte 0x00 16.--23. 1. " FMCN ,Flash Microsecond Cycle Number" bitfld.long 0x00 8.--9. " FWS ,Flash Wait State" "2 cycles,3 cycles,4 cycles,4 cycles" textline " " bitfld.long 0x00 7. " NEBP ,No Erase Before Programming" "Erased,Not erased" bitfld.long 0x00 3. " PROGE ,Programming Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LOCKE ,Lock Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " FRDY ,Flash Ready Interrupt Enable" "Disabled,Enabled" wgroup.long 0x04++0x03 line.long 0x00 "MC_FCR,MC Flash Command Register" hexmask.long.byte 0x00 24.--31. 1. " KEY ,Password" hexmask.long.word 0x00 8.--17. 1. " PAGEN ,Page Number" textline " " bitfld.long 0x00 0.--3. " FCMD ,Flash Command" "No command,Write Page,Set Lock Bit,Write Page and Lock,Clear Lock Bit,Reserved,Reserved,Reserved,Erase All,Reserved,Reserved,Set General-purpose NVM Bit,Reserved,Clear General Purpose NVM Bit,Reserved,Set Security Bit" rgroup.long 0x08++0x03 line.long 0x00 "MC_FSR,MC Flash Status Register" bitfld.long 0x00 23. " LOCKS7 ,Lock Region 7 Lock Status" "Not locked,Locked" bitfld.long 0x00 22. " LOCKS6 ,Lock Region 6 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 21. " LOCKS5 ,Lock Region 5 Lock Status" "Not locked,Locked" bitfld.long 0x00 20. " LOCKS4 ,Lock Region 4 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 19. " LOCKS3 ,Lock Region 3 Lock Status" "Not locked,Locked" bitfld.long 0x00 18. " LOCKS2 ,Lock Region 2 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 17. " LOCKS1 ,Lock Region 1 Lock Status" "Not locked,Locked" bitfld.long 0x00 16. " LOCKS0 ,Lock Region 0 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 9. " GPNVM1 ,General-purpose NVM Bit Status" "Inactive,Active" bitfld.long 0x00 8. " GPNVM0 ,General-purpose NVM Bit Status" "Inactive,Active" textline " " bitfld.long 0x00 4. " SECURITY ,Security Bit Status" "Inactive,Active" bitfld.long 0x00 3. " PROGE ,Programming Error Status" "No error,Error" textline " " bitfld.long 0x00 2. " LOCKE ,Lock Error Status" "No error,Error" bitfld.long 0x00 0. " FRDY ,Flash Ready Status" "Busy,Ready" width 0xb tree.end endif sif (cpu()=="AT91SAM7S256") tree "Embedded Flash Controller (EFC)" base 0xFFFFFF60 width 0x8 rgroup.long 0x00++0x03 line.long 0x00 "MC_FMR,MC Flash Mode Register" hexmask.long.byte 0x00 16.--23. 1. " FMCN ,Flash Microsecond Cycle Number" bitfld.long 0x00 8.--9. " FWS ,Flash Wait State" "1 cycle,2 cycles,3 cycles,4 cycles" textline " " bitfld.long 0x00 7. " NEBP ,No Erase Before Programming" "Erased,Not erased" bitfld.long 0x00 3. " PROGE ,Programming Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LOCKE ,Lock Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " FRDY ,Flash Ready Interrupt Enable" "Disabled,Enabled" wgroup.long 0x00++0x03 line.long 0x00 "MC_FMR,MC Flash Mode Register" hexmask.long.byte 0x00 16.--23. 1. " FMCN ,Flash Microsecond Cycle Number" bitfld.long 0x00 8.--9. " FWS ,Flash Wait State" "2 cycles,3 cycles,4 cycles,4 cycles" textline " " bitfld.long 0x00 7. " NEBP ,No Erase Before Programming" "Erased,Not erased" bitfld.long 0x00 3. " PROGE ,Programming Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LOCKE ,Lock Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " FRDY ,Flash Ready Interrupt Enable" "Disabled,Enabled" wgroup.long 0x04++0x03 line.long 0x00 "MC_FCR,MC Flash Command Register" hexmask.long.byte 0x00 24.--31. 1. " KEY ,Password" hexmask.long.word 0x00 8.--17. 1. " PAGEN ,Page Number" textline " " bitfld.long 0x00 0.--3. " FCMD ,Flash Command" "No command,Write Page,Set Lock Bit,Write Page and Lock,Clear Lock Bit,Reserved,Reserved,Reserved,Erase All,Reserved,Reserved,Set General-purpose NVM Bit,Reserved,Clear General Purpose NVM Bit,Reserved,Set Security Bit" sif (cpu()=="AT91SAM7S256") rgroup.long 0x08++0x03 line.long 0x00 "MC_FSR,MC Flash Status Register" bitfld.long 0x00 31. " LOCKS15 ,Lock Region 7 Lock Status" "Not locked,Locked" bitfld.long 0x00 30. " LOCKS14 ,Lock Region 6 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 29. " LOCKS13 ,Lock Region 5 Lock Status" "Not locked,Locked" bitfld.long 0x00 28. " LOCKS12 ,Lock Region 4 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 27. " LOCKS11 ,Lock Region 3 Lock Status" "Not locked,Locked" bitfld.long 0x00 26. " LOCKS10 ,Lock Region 2 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 25. " LOCKS9 ,Lock Region 1 Lock Status" "Not locked,Locked" bitfld.long 0x00 24. " LOCKS8 ,Lock Region 0 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 23. " LOCKS7 ,Lock Region 7 Lock Status" "Not locked,Locked" bitfld.long 0x00 22. " LOCKS6 ,Lock Region 6 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 21. " LOCKS5 ,Lock Region 5 Lock Status" "Not locked,Locked" bitfld.long 0x00 20. " LOCKS4 ,Lock Region 4 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 19. " LOCKS3 ,Lock Region 3 Lock Status" "Not locked,Locked" bitfld.long 0x00 18. " LOCKS2 ,Lock Region 2 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 17. " LOCKS1 ,Lock Region 1 Lock Status" "Not locked,Locked" bitfld.long 0x00 16. " LOCKS0 ,Lock Region 0 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 9. " GPNVM1 ,General-purpose NVM Bit Status" "Inactive,Active" bitfld.long 0x00 8. " GPNVM0 ,General-purpose NVM Bit Status" "Inactive,Active" textline " " bitfld.long 0x00 4. " SECURITY ,Security Bit Status" "Inactive,Active" bitfld.long 0x00 3. " PROGE ,Programming Error Status" "No error,Error" textline " " bitfld.long 0x00 2. " LOCKE ,Lock Error Status" "No error,Error" bitfld.long 0x00 0. " FRDY ,Flash Ready Status" "Busy,Ready" endif sif (cpu()=="AT91SAM7S512") rgroup.long 0x08++0x03 line.long 0x00 "MC_FSR,MC Flash Status Register" bitfld.long 0x00 31. " LOCKS15 ,Lock Region 7 Lock Status" "Not locked,Locked" bitfld.long 0x00 30. " LOCKS14 ,Lock Region 6 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 29. " LOCKS13 ,Lock Region 5 Lock Status" "Not locked,Locked" bitfld.long 0x00 28. " LOCKS12 ,Lock Region 4 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 27. " LOCKS11 ,Lock Region 3 Lock Status" "Not locked,Locked" bitfld.long 0x00 26. " LOCKS10 ,Lock Region 2 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 25. " LOCKS9 ,Lock Region 1 Lock Status" "Not locked,Locked" bitfld.long 0x00 24. " LOCKS8 ,Lock Region 0 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 23. " LOCKS7 ,Lock Region 7 Lock Status" "Not locked,Locked" bitfld.long 0x00 22. " LOCKS6 ,Lock Region 6 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 21. " LOCKS5 ,Lock Region 5 Lock Status" "Not locked,Locked" bitfld.long 0x00 20. " LOCKS4 ,Lock Region 4 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 19. " LOCKS3 ,Lock Region 3 Lock Status" "Not locked,Locked" bitfld.long 0x00 18. " LOCKS2 ,Lock Region 2 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 17. " LOCKS1 ,Lock Region 1 Lock Status" "Not locked,Locked" bitfld.long 0x00 16. " LOCKS0 ,Lock Region 0 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 10. " GPNVM2 ,General-purpose NVM Bit Status" "Inactive,Active" bitfld.long 0x00 9. " GPNVM1 ,General-purpose NVM Bit Status" "Inactive,Active" textline " " bitfld.long 0x00 8. " GPNVM0 ,General-purpose NVM Bit Status" "Inactive,Active" bitfld.long 0x00 4. " SECURITY ,Security Bit Status" "Inactive,Active" textline " " bitfld.long 0x00 3. " PROGE ,Programming Error Status" "No error,Error" bitfld.long 0x00 2. " LOCKE ,Lock Error Status" "No error,Error" textline " " bitfld.long 0x00 0. " FRDY ,Flash Ready Status" "Busy,Ready" endif width 0xb tree.end endif sif (cpu()=="AT91SAM7S512") tree.open "Embedded Flash Controller (EFC)" tree "Embedded Flash Controller 0 (EFC0)" base ad:0xFFFFFF60 width 0x8 rgroup.long 0x00++0x03 line.long 0x00 "MC_FMR,MC Flash Mode Register" hexmask.long.byte 0x00 16.--23. 1. " FMCN ,Flash Microsecond Cycle Number" bitfld.long 0x00 8.--9. " FWS ,Flash Wait State" "1 cycle,2 cycles,3 cycles,4 cycles" textline " " bitfld.long 0x00 7. " NEBP ,No Erase Before Programming" "Erased,Not erased" bitfld.long 0x00 3. " PROGE ,Programming Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LOCKE ,Lock Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " FRDY ,Flash Ready Interrupt Enable" "Disabled,Enabled" wgroup.long 0x00++0x03 line.long 0x00 "MC_FMR,MC Flash Mode Register" hexmask.long.byte 0x00 16.--23. 1. " FMCN ,Flash Microsecond Cycle Number" bitfld.long 0x00 8.--9. " FWS ,Flash Wait State" "2 cycles,3 cycles,4 cycles,4 cycles" textline " " bitfld.long 0x00 7. " NEBP ,No Erase Before Programming" "Erased,Not erased" bitfld.long 0x00 3. " PROGE ,Programming Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LOCKE ,Lock Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " FRDY ,Flash Ready Interrupt Enable" "Disabled,Enabled" wgroup.long 0x04++0x03 line.long 0x00 "MC_FCR,MC Flash Command Register" hexmask.long.byte 0x00 24.--31. 1. " KEY ,Password" hexmask.long.word 0x00 8.--17. 1. " PAGEN ,Page Number" textline " " bitfld.long 0x00 0.--3. " FCMD ,Flash Command" "No command,Write Page,Set Lock Bit,Write Page and Lock,Clear Lock Bit,Reserved,Reserved,Reserved,Erase All,Reserved,Reserved,Set General-purpose NVM Bit,Reserved,Clear General Purpose NVM Bit,Reserved,Set Security Bit" sif (cpu()=="AT91SAM7S256") rgroup.long 0x08++0x03 line.long 0x00 "MC_FSR,MC Flash Status Register" bitfld.long 0x00 31. " LOCKS15 ,Lock Region 7 Lock Status" "Not locked,Locked" bitfld.long 0x00 30. " LOCKS14 ,Lock Region 6 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 29. " LOCKS13 ,Lock Region 5 Lock Status" "Not locked,Locked" bitfld.long 0x00 28. " LOCKS12 ,Lock Region 4 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 27. " LOCKS11 ,Lock Region 3 Lock Status" "Not locked,Locked" bitfld.long 0x00 26. " LOCKS10 ,Lock Region 2 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 25. " LOCKS9 ,Lock Region 1 Lock Status" "Not locked,Locked" bitfld.long 0x00 24. " LOCKS8 ,Lock Region 0 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 23. " LOCKS7 ,Lock Region 7 Lock Status" "Not locked,Locked" bitfld.long 0x00 22. " LOCKS6 ,Lock Region 6 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 21. " LOCKS5 ,Lock Region 5 Lock Status" "Not locked,Locked" bitfld.long 0x00 20. " LOCKS4 ,Lock Region 4 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 19. " LOCKS3 ,Lock Region 3 Lock Status" "Not locked,Locked" bitfld.long 0x00 18. " LOCKS2 ,Lock Region 2 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 17. " LOCKS1 ,Lock Region 1 Lock Status" "Not locked,Locked" bitfld.long 0x00 16. " LOCKS0 ,Lock Region 0 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 9. " GPNVM1 ,General-purpose NVM Bit Status" "Inactive,Active" bitfld.long 0x00 8. " GPNVM0 ,General-purpose NVM Bit Status" "Inactive,Active" textline " " bitfld.long 0x00 4. " SECURITY ,Security Bit Status" "Inactive,Active" bitfld.long 0x00 3. " PROGE ,Programming Error Status" "No error,Error" textline " " bitfld.long 0x00 2. " LOCKE ,Lock Error Status" "No error,Error" bitfld.long 0x00 0. " FRDY ,Flash Ready Status" "Busy,Ready" endif sif (cpu()=="AT91SAM7S512") rgroup.long 0x08++0x03 line.long 0x00 "MC_FSR,MC Flash Status Register" bitfld.long 0x00 31. " LOCKS15 ,Lock Region 7 Lock Status" "Not locked,Locked" bitfld.long 0x00 30. " LOCKS14 ,Lock Region 6 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 29. " LOCKS13 ,Lock Region 5 Lock Status" "Not locked,Locked" bitfld.long 0x00 28. " LOCKS12 ,Lock Region 4 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 27. " LOCKS11 ,Lock Region 3 Lock Status" "Not locked,Locked" bitfld.long 0x00 26. " LOCKS10 ,Lock Region 2 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 25. " LOCKS9 ,Lock Region 1 Lock Status" "Not locked,Locked" bitfld.long 0x00 24. " LOCKS8 ,Lock Region 0 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 23. " LOCKS7 ,Lock Region 7 Lock Status" "Not locked,Locked" bitfld.long 0x00 22. " LOCKS6 ,Lock Region 6 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 21. " LOCKS5 ,Lock Region 5 Lock Status" "Not locked,Locked" bitfld.long 0x00 20. " LOCKS4 ,Lock Region 4 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 19. " LOCKS3 ,Lock Region 3 Lock Status" "Not locked,Locked" bitfld.long 0x00 18. " LOCKS2 ,Lock Region 2 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 17. " LOCKS1 ,Lock Region 1 Lock Status" "Not locked,Locked" bitfld.long 0x00 16. " LOCKS0 ,Lock Region 0 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 10. " GPNVM2 ,General-purpose NVM Bit Status" "Inactive,Active" bitfld.long 0x00 9. " GPNVM1 ,General-purpose NVM Bit Status" "Inactive,Active" textline " " bitfld.long 0x00 8. " GPNVM0 ,General-purpose NVM Bit Status" "Inactive,Active" bitfld.long 0x00 4. " SECURITY ,Security Bit Status" "Inactive,Active" textline " " bitfld.long 0x00 3. " PROGE ,Programming Error Status" "No error,Error" bitfld.long 0x00 2. " LOCKE ,Lock Error Status" "No error,Error" textline " " bitfld.long 0x00 0. " FRDY ,Flash Ready Status" "Busy,Ready" endif width 0xb tree.end tree "Embedded Flash Controller 1 (EFC1)" base ad:0xFFFFFF70 width 0x8 rgroup.long 0x00++0x03 line.long 0x00 "MC_FMR,MC Flash Mode Register" hexmask.long.byte 0x00 16.--23. 1. " FMCN ,Flash Microsecond Cycle Number" bitfld.long 0x00 8.--9. " FWS ,Flash Wait State" "1 cycle,2 cycles,3 cycles,4 cycles" textline " " bitfld.long 0x00 7. " NEBP ,No Erase Before Programming" "Erased,Not erased" bitfld.long 0x00 3. " PROGE ,Programming Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LOCKE ,Lock Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " FRDY ,Flash Ready Interrupt Enable" "Disabled,Enabled" wgroup.long 0x00++0x03 line.long 0x00 "MC_FMR,MC Flash Mode Register" hexmask.long.byte 0x00 16.--23. 1. " FMCN ,Flash Microsecond Cycle Number" bitfld.long 0x00 8.--9. " FWS ,Flash Wait State" "2 cycles,3 cycles,4 cycles,4 cycles" textline " " bitfld.long 0x00 7. " NEBP ,No Erase Before Programming" "Erased,Not erased" bitfld.long 0x00 3. " PROGE ,Programming Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LOCKE ,Lock Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " FRDY ,Flash Ready Interrupt Enable" "Disabled,Enabled" wgroup.long 0x04++0x03 line.long 0x00 "MC_FCR,MC Flash Command Register" hexmask.long.byte 0x00 24.--31. 1. " KEY ,Password" hexmask.long.word 0x00 8.--17. 1. " PAGEN ,Page Number" textline " " bitfld.long 0x00 0.--3. " FCMD ,Flash Command" "No command,Write Page,Set Lock Bit,Write Page and Lock,Clear Lock Bit,Reserved,Reserved,Reserved,Erase All,Reserved,Reserved,Set General-purpose NVM Bit,Reserved,Clear General Purpose NVM Bit,Reserved,Set Security Bit" sif (cpu()=="AT91SAM7S256") rgroup.long 0x08++0x03 line.long 0x00 "MC_FSR,MC Flash Status Register" bitfld.long 0x00 31. " LOCKS15 ,Lock Region 7 Lock Status" "Not locked,Locked" bitfld.long 0x00 30. " LOCKS14 ,Lock Region 6 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 29. " LOCKS13 ,Lock Region 5 Lock Status" "Not locked,Locked" bitfld.long 0x00 28. " LOCKS12 ,Lock Region 4 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 27. " LOCKS11 ,Lock Region 3 Lock Status" "Not locked,Locked" bitfld.long 0x00 26. " LOCKS10 ,Lock Region 2 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 25. " LOCKS9 ,Lock Region 1 Lock Status" "Not locked,Locked" bitfld.long 0x00 24. " LOCKS8 ,Lock Region 0 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 23. " LOCKS7 ,Lock Region 7 Lock Status" "Not locked,Locked" bitfld.long 0x00 22. " LOCKS6 ,Lock Region 6 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 21. " LOCKS5 ,Lock Region 5 Lock Status" "Not locked,Locked" bitfld.long 0x00 20. " LOCKS4 ,Lock Region 4 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 19. " LOCKS3 ,Lock Region 3 Lock Status" "Not locked,Locked" bitfld.long 0x00 18. " LOCKS2 ,Lock Region 2 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 17. " LOCKS1 ,Lock Region 1 Lock Status" "Not locked,Locked" bitfld.long 0x00 16. " LOCKS0 ,Lock Region 0 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 9. " GPNVM1 ,General-purpose NVM Bit Status" "Inactive,Active" bitfld.long 0x00 8. " GPNVM0 ,General-purpose NVM Bit Status" "Inactive,Active" textline " " bitfld.long 0x00 4. " SECURITY ,Security Bit Status" "Inactive,Active" bitfld.long 0x00 3. " PROGE ,Programming Error Status" "No error,Error" textline " " bitfld.long 0x00 2. " LOCKE ,Lock Error Status" "No error,Error" bitfld.long 0x00 0. " FRDY ,Flash Ready Status" "Busy,Ready" endif sif (cpu()=="AT91SAM7S512") rgroup.long 0x08++0x03 line.long 0x00 "MC_FSR,MC Flash Status Register" bitfld.long 0x00 31. " LOCKS15 ,Lock Region 7 Lock Status" "Not locked,Locked" bitfld.long 0x00 30. " LOCKS14 ,Lock Region 6 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 29. " LOCKS13 ,Lock Region 5 Lock Status" "Not locked,Locked" bitfld.long 0x00 28. " LOCKS12 ,Lock Region 4 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 27. " LOCKS11 ,Lock Region 3 Lock Status" "Not locked,Locked" bitfld.long 0x00 26. " LOCKS10 ,Lock Region 2 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 25. " LOCKS9 ,Lock Region 1 Lock Status" "Not locked,Locked" bitfld.long 0x00 24. " LOCKS8 ,Lock Region 0 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 23. " LOCKS7 ,Lock Region 7 Lock Status" "Not locked,Locked" bitfld.long 0x00 22. " LOCKS6 ,Lock Region 6 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 21. " LOCKS5 ,Lock Region 5 Lock Status" "Not locked,Locked" bitfld.long 0x00 20. " LOCKS4 ,Lock Region 4 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 19. " LOCKS3 ,Lock Region 3 Lock Status" "Not locked,Locked" bitfld.long 0x00 18. " LOCKS2 ,Lock Region 2 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 17. " LOCKS1 ,Lock Region 1 Lock Status" "Not locked,Locked" bitfld.long 0x00 16. " LOCKS0 ,Lock Region 0 Lock Status" "Not locked,Locked" textline " " bitfld.long 0x00 3. " PROGE ,Programming Error Status" "No error,Error" bitfld.long 0x00 2. " LOCKE ,Lock Error Status" "No error,Error" textline " " bitfld.long 0x00 0. " FRDY ,Flash Ready Status" "Busy,Ready" endif width 0xb tree.end tree.end endif tree "Advanced Interrupt Controller (AIC)" base 0xFFFFF000 width 10. tree "Source Mode Registers" group.long 0x00++0x03 line.long 0x00 "AIC_SMR0,Source Mode Register 0" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x04++0x03 line.long 0x00 "AIC_SMR1,Source Mode Register 1" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x08++0x03 line.long 0x00 "AIC_SMR2,Source Mode Register 2" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x0c++0x03 line.long 0x00 "AIC_SMR3,Source Mode Register 3" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x10++0x03 line.long 0x00 "AIC_SMR4,Source Mode Register 4" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x14++0x03 line.long 0x00 "AIC_SMR5,Source Mode Register 5" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x18++0x03 line.long 0x00 "AIC_SMR6,Source Mode Register 6" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x1c++0x03 line.long 0x00 "AIC_SMR7,Source Mode Register 7" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x20++0x03 line.long 0x00 "AIC_SMR8,Source Mode Register 8" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x24++0x03 line.long 0x00 "AIC_SMR9,Source Mode Register 9" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x28++0x03 line.long 0x00 "AIC_SMR10,Source Mode Register 10" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x2c++0x03 line.long 0x00 "AIC_SMR11,Source Mode Register 11" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x30++0x03 line.long 0x00 "AIC_SMR12,Source Mode Register 12" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x34++0x03 line.long 0x00 "AIC_SMR13,Source Mode Register 13" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x38++0x03 line.long 0x00 "AIC_SMR14,Source Mode Register 14" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x3c++0x03 line.long 0x00 "AIC_SMR15,Source Mode Register 15" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x40++0x03 line.long 0x00 "AIC_SMR16,Source Mode Register 16" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x44++0x03 line.long 0x00 "AIC_SMR17,Source Mode Register 17" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x48++0x03 line.long 0x00 "AIC_SMR18,Source Mode Register 18" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x4c++0x03 line.long 0x00 "AIC_SMR19,Source Mode Register 19" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x50++0x03 line.long 0x00 "AIC_SMR20,Source Mode Register 20" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x54++0x03 line.long 0x00 "AIC_SMR21,Source Mode Register 21" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x58++0x03 line.long 0x00 "AIC_SMR22,Source Mode Register 22" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x5c++0x03 line.long 0x00 "AIC_SMR23,Source Mode Register 23" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x60++0x03 line.long 0x00 "AIC_SMR24,Source Mode Register 24" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x64++0x03 line.long 0x00 "AIC_SMR25,Source Mode Register 25" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x68++0x03 line.long 0x00 "AIC_SMR26,Source Mode Register 26" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x6c++0x03 line.long 0x00 "AIC_SMR27,Source Mode Register 27" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x70++0x03 line.long 0x00 "AIC_SMR28,Source Mode Register 28" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x74++0x03 line.long 0x00 "AIC_SMR29,Source Mode Register 29" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x78++0x03 line.long 0x00 "AIC_SMR30,Source Mode Register 30" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" group.long 0x7c++0x03 line.long 0x00 "AIC_SMR31,Source Mode Register 31" bitfld.long 0x00 5.--6. " SRCTYPE ,Interrupt Source Type" "Low,Falling,High,Rising" bitfld.long 0x00 0.--2. " PRIOR ,Priority Level" "Lowest,1,2,3,4,5,6,Highest" tree.end tree "Source Vector Registers" group.long 0x80++0x03 line.long 0x00 "AIC_SVR0,Source Vector Register 0" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0x84++0x03 line.long 0x00 "AIC_SVR1,Source Vector Register 1" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0x88++0x03 line.long 0x00 "AIC_SVR2,Source Vector Register 2" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0x8c++0x03 line.long 0x00 "AIC_SVR3,Source Vector Register 3" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0x90++0x03 line.long 0x00 "AIC_SVR4,Source Vector Register 4" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0x94++0x03 line.long 0x00 "AIC_SVR5,Source Vector Register 5" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0x98++0x03 line.long 0x00 "AIC_SVR6,Source Vector Register 6" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0x9c++0x03 line.long 0x00 "AIC_SVR7,Source Vector Register 7" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xa0++0x03 line.long 0x00 "AIC_SVR8,Source Vector Register 8" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xa4++0x03 line.long 0x00 "AIC_SVR9,Source Vector Register 9" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xa8++0x03 line.long 0x00 "AIC_SVR10,Source Vector Register 10" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xac++0x03 line.long 0x00 "AIC_SVR11,Source Vector Register 11" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xb0++0x03 line.long 0x00 "AIC_SVR12,Source Vector Register 12" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xb4++0x03 line.long 0x00 "AIC_SVR13,Source Vector Register 13" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xb8++0x03 line.long 0x00 "AIC_SVR14,Source Vector Register 14" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xbc++0x03 line.long 0x00 "AIC_SVR15,Source Vector Register 15" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xc0++0x03 line.long 0x00 "AIC_SVR16,Source Vector Register 16" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xc4++0x03 line.long 0x00 "AIC_SVR17,Source Vector Register 17" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xc8++0x03 line.long 0x00 "AIC_SVR18,Source Vector Register 18" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xcc++0x03 line.long 0x00 "AIC_SVR19,Source Vector Register 19" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xd0++0x03 line.long 0x00 "AIC_SVR20,Source Vector Register 20" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xd4++0x03 line.long 0x00 "AIC_SVR21,Source Vector Register 21" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xd8++0x03 line.long 0x00 "AIC_SVR22,Source Vector Register 22" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xdc++0x03 line.long 0x00 "AIC_SVR23,Source Vector Register 23" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xe0++0x03 line.long 0x00 "AIC_SVR24,Source Vector Register 24" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xe4++0x03 line.long 0x00 "AIC_SVR25,Source Vector Register 25" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xe8++0x03 line.long 0x00 "AIC_SVR26,Source Vector Register 26" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xec++0x03 line.long 0x00 "AIC_SVR27,Source Vector Register 27" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xf0++0x03 line.long 0x00 "AIC_SVR28,Source Vector Register 28" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xf4++0x03 line.long 0x00 "AIC_SVR29,Source Vector Register 29" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xf8++0x03 line.long 0x00 "AIC_SVR30,Source Vector Register 30" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" group.long 0xfc++0x03 line.long 0x00 "AIC_SVR31,Source Vector Register 31" hexmask.long 0x00 0.--31. 1. " VECTOR ,Source Vector" tree.end width 0xb tree "Interrupt Registers" rgroup.long 0x100++0x17 line.long 0x00 "AIC_IVR,Interrupt Vector Register" hexmask.long 0x00 0.--31. 1. " IRQV ,Interrupt Vector Register" line.long 0x04 "AIC_FVR,Fast Interrupt Vector Register" hexmask.long 0x04 0.--31. 1. " FIQV ,FIQ Vector Register" line.long 0x08 "AIC_ISR,Interrupt Status Register" hexmask.long.byte 0x08 0.--4. 1. " IRQID ,Current Interrupt Identifier" line.long 0x0c "AIC_IPR,Interrupt Pending Register" bitfld.long 0x0c 31. " PID31 ,Interrupt Pending 31" "Not pending,Pending" bitfld.long 0x0c 30. " PID30 ,Interrupt Pending 30" "Not pending,Pending" textline " " bitfld.long 0x0c 29. " PID29 ,Interrupt Pending 29" "Not pending,Pending" bitfld.long 0x0c 28. " PID28 ,Interrupt Pending 28" "Not pending,Pending" textline " " bitfld.long 0x0c 27. " PID27 ,Interrupt Pending 27" "Not pending,Pending" bitfld.long 0x0c 26. " PID26 ,Interrupt Pending 26" "Not pending,Pending" textline " " bitfld.long 0x0c 25. " PID25 ,Interrupt Pending 25" "Not pending,Pending" bitfld.long 0x0c 24. " PID24 ,Interrupt Pending 24" "Not pending,Pending" textline " " bitfld.long 0x0c 23. " PID23 ,Interrupt Pending 23" "Not pending,Pending" bitfld.long 0x0c 22. " PID22 ,Interrupt Pending 22" "Not pending,Pending" textline " " bitfld.long 0x0c 21. " PID21 ,Interrupt Pending 21" "Not pending,Pending" bitfld.long 0x0c 20. " PID20 ,Interrupt Pending 20" "Not pending,Pending" textline " " bitfld.long 0x0c 19. " PID19 ,Interrupt Pending 19" "Not pending,Pending" bitfld.long 0x0c 18. " PID18 ,Interrupt Pending 18" "Not pending,Pending" textline " " bitfld.long 0x0c 17. " PID17 ,Interrupt Pending 17" "Not pending,Pending" bitfld.long 0x0c 16. " PID16 ,Interrupt Pending 16" "Not pending,Pending" textline " " bitfld.long 0x0c 15. " PID15 ,Interrupt Pending 15" "Not pending,Pending" bitfld.long 0x0c 14. " PID14 ,Interrupt Pending 14" "Not pending,Pending" textline " " bitfld.long 0x0c 13. " PID13 ,Interrupt Pending 13" "Not pending,Pending" bitfld.long 0x0c 12. " PID12 ,Interrupt Pending 12" "Not pending,Pending" textline " " bitfld.long 0x0c 11. " PID11 ,Interrupt Pending 11" "Not pending,Pending" bitfld.long 0x0c 10. " PID10 ,Interrupt Pending 10" "Not pending,Pending" textline " " bitfld.long 0x0c 9. " PID9 ,Interrupt Pending 9" "Not pending,Pending" bitfld.long 0x0c 8. " PID8 ,Interrupt Pending 8" "Not pending,Pending" textline " " bitfld.long 0x0c 7. " PID7 ,Interrupt Pending 7" "Not pending,Pending" bitfld.long 0x0c 6. " PID6 ,Interrupt Pending 6" "Not pending,Pending" textline " " bitfld.long 0x0c 5. " PID5 ,Interrupt Pending 5" "Not pending,Pending" bitfld.long 0x0c 4. " PID4 ,Interrupt Pending 4" "Not pending,Pending" textline " " bitfld.long 0x0c 3. " PID3 ,Interrupt Pending 3" "Not pending,Pending" bitfld.long 0x0c 2. " PID2 ,Interrupt Pending 2" "Not pending,Pending" textline " " bitfld.long 0x0c 1. " SYS ,Interrupt Pending 1" "Not pending,Pending" bitfld.long 0x0c 0. " FIQ ,Interrupt Pending 0" "Not pending,Pending" line.long 0x10 "AIC_IMR,Interrupt Mask Register" bitfld.long 0x10 31. " PID31 ,Interrupt Mask 31" "Disabled,Enabled" bitfld.long 0x10 30. " PID30 ,Interrupt Mask 30" "Disabled,Enabled" textline " " bitfld.long 0x10 29. " PID29 ,Interrupt Mask 29" "Disabled,Enabled" bitfld.long 0x10 28. " PID28 ,Interrupt Mask 28" "Disabled,Enabled" textline " " bitfld.long 0x10 27. " PID27 ,Interrupt Mask 27" "Disabled,Enabled" bitfld.long 0x10 26. " PID26 ,Interrupt Mask 26" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " PID25 ,Interrupt Mask 25" "Disabled,Enabled" bitfld.long 0x10 24. " PID24 ,Interrupt Mask 24" "Disabled,Enabled" textline " " bitfld.long 0x10 23. " PID23 ,Interrupt Mask 23" "Disabled,Enabled" bitfld.long 0x10 22. " PID22 ,Interrupt Mask 22" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " PID21 ,Interrupt Mask 21" "Disabled,Enabled" bitfld.long 0x10 20. " PID20 ,Interrupt Mask 20" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " PID19 ,Interrupt Mask 19" "Disabled,Enabled" bitfld.long 0x10 18. " PID18 ,Interrupt Mask 18" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " PID17 ,Interrupt Mask 17" "Disabled,Enabled" bitfld.long 0x10 16. " PID16 ,Interrupt Mask 16" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " PID15 ,Interrupt Mask 15" "Disabled,Enabled" bitfld.long 0x10 14. " PID14 ,Interrupt Mask 14" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " PID13 ,Interrupt Mask 13" "Disabled,Enabled" bitfld.long 0x10 12. " PID12 ,Interrupt Mask 12" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " PID11 ,Interrupt Mask 11" "Disabled,Enabled" bitfld.long 0x10 10. " PID10 ,Interrupt Mask 10" "Disabled,Enabled" textline " " bitfld.long 0x10 9. " PID9 ,Interrupt Mask 9" "Disabled,Enabled" bitfld.long 0x10 8. " PID8 ,Interrupt Mask 8" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " PID7 ,Interrupt Mask 7" "Disabled,Enabled" bitfld.long 0x10 6. " PID6 ,Interrupt Mask 6" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " PID5 ,Interrupt Mask 5" "Disabled,Enabled" bitfld.long 0x10 4. " PID4 ,Interrupt Mask 4" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " PID3 ,Interrupt Mask 3" "Disabled,Enabled" bitfld.long 0x10 2. " PID2 ,Interrupt Mask 2" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " SYS ,Interrupt Mask 1" "Disabled,Enabled" bitfld.long 0x10 0. " FIQ ,Interrupt Mask 0" "Disabled,Enabled" line.long 0x14 "AIC_CISR,Core Interrupt Status Register" bitfld.long 0x14 1. " NIRQ ,NIRQ Status" "Deactivated,Active" bitfld.long 0x14 0. " NFIQ ,NFIQ Status" "Deactivated,Active" wgroup.long 0x120++0xf line.long 0x00 "AIC_IECR,Interrupt Enable Command Register" bitfld.long 0x00 31. " PID31 ,Interrupt Pending 31" "No effect,Enabled" bitfld.long 0x00 30. " PID30 ,Interrupt Pending 30" "No effect,Enabled" textline " " bitfld.long 0x00 29. " PID29 ,Interrupt Pending 29" "No effect,Enabled" bitfld.long 0x00 28. " PID28 ,Interrupt Pending 28" "No effect,Enabled" textline " " bitfld.long 0x00 27. " PID27 ,Interrupt Pending 27" "No effect,Enabled" bitfld.long 0x00 26. " PID26 ,Interrupt Pending 26" "No effect,Enabled" textline " " bitfld.long 0x00 25. " PID25 ,Interrupt Pending 25" "No effect,Enabled" bitfld.long 0x00 24. " PID24 ,Interrupt Pending 24" "No effect,Enabled" textline " " bitfld.long 0x00 23. " PID23 ,Interrupt Pending 23" "No effect,Enabled" bitfld.long 0x00 22. " PID22 ,Interrupt Pending 22" "No effect,Enabled" textline " " bitfld.long 0x00 21. " PID21 ,Interrupt Pending 21" "No effect,Enabled" bitfld.long 0x00 20. " PID20 ,Interrupt Pending 20" "No effect,Enabled" textline " " bitfld.long 0x00 19. " PID19 ,Interrupt Pending 19" "No effect,Enabled" bitfld.long 0x00 18. " PID18 ,Interrupt Pending 18" "No effect,Enabled" textline " " bitfld.long 0x00 17. " PID17 ,Interrupt Pending 17" "No effect,Enabled" bitfld.long 0x00 16. " PID16 ,Interrupt Pending 16" "No effect,Enabled" textline " " bitfld.long 0x00 15. " PID15 ,Interrupt Pending 15" "No effect,Enabled" bitfld.long 0x00 14. " PID14 ,Interrupt Pending 14" "No effect,Enabled" textline " " bitfld.long 0x00 13. " PID13 ,Interrupt Pending 13" "No effect,Enabled" bitfld.long 0x00 12. " PID12 ,Interrupt Pending 12" "No effect,Enabled" textline " " bitfld.long 0x00 11. " PID11 ,Interrupt Pending 11" "No effect,Enabled" bitfld.long 0x00 10. " PID10 ,Interrupt Pending 10" "No effect,Enabled" textline " " bitfld.long 0x00 9. " PID9 ,Interrupt Pending 9" "No effect,Enabled" bitfld.long 0x00 8. " PID8 ,Interrupt Pending 8" "No effect,Enabled" textline " " bitfld.long 0x00 7. " PID7 ,Interrupt Pending 7" "No effect,Enabled" bitfld.long 0x00 6. " PID6 ,Interrupt Pending 6" "No effect,Enabled" textline " " bitfld.long 0x00 5. " PID5 ,Interrupt Pending 5" "No effect,Enabled" bitfld.long 0x00 4. " PID4 ,Interrupt Pending 4" "No effect,Enabled" textline " " bitfld.long 0x00 3. " PID3 ,Interrupt Pending 3" "No effect,Enabled" bitfld.long 0x00 2. " PID2 ,Interrupt Pending 2" "No effect,Enabled" textline " " bitfld.long 0x00 1. " SYS ,Interrupt Pending 1" "No effect,Enabled" bitfld.long 0x00 0. " FIQ ,Interrupt Pending 0" "No effect,Enabled" line.long 0x04 "AIC_IDCR,Interrupt Disable Command Register" bitfld.long 0x04 31. " PID31 ,Interrupt Pending 31" "No effect,Disabled" bitfld.long 0x04 30. " PID30 ,Interrupt Pending 30" "No effect,Disabled" textline " " bitfld.long 0x04 29. " PID29 ,Interrupt Pending 29" "No effect,Disabled" bitfld.long 0x04 28. " PID28 ,Interrupt Pending 28" "No effect,Disabled" textline " " bitfld.long 0x04 27. " PID27 ,Interrupt Pending 27" "No effect,Disabled" bitfld.long 0x04 26. " PID26 ,Interrupt Pending 26" "No effect,Disabled" textline " " bitfld.long 0x04 25. " PID25 ,Interrupt Pending 25" "No effect,Disabled" bitfld.long 0x04 24. " PID24 ,Interrupt Pending 24" "No effect,Disabled" textline " " bitfld.long 0x04 23. " PID23 ,Interrupt Pending 23" "No effect,Disabled" bitfld.long 0x04 22. " PID22 ,Interrupt Pending 22" "No effect,Disabled" textline " " bitfld.long 0x04 21. " PID21 ,Interrupt Pending 21" "No effect,Disabled" bitfld.long 0x04 20. " PID20 ,Interrupt Pending 20" "No effect,Disabled" textline " " bitfld.long 0x04 19. " PID19 ,Interrupt Pending 19" "No effect,Disabled" bitfld.long 0x04 18. " PID18 ,Interrupt Pending 18" "No effect,Disabled" textline " " bitfld.long 0x04 17. " PID17 ,Interrupt Pending 17" "No effect,Disabled" bitfld.long 0x04 16. " PID16 ,Interrupt Pending 16" "No effect,Disabled" textline " " bitfld.long 0x04 15. " PID15 ,Interrupt Pending 15" "No effect,Disabled" bitfld.long 0x04 14. " PID14 ,Interrupt Pending 14" "No effect,Disabled" textline " " bitfld.long 0x04 13. " PID13 ,Interrupt Pending 13" "No effect,Disabled" bitfld.long 0x04 12. " PID12 ,Interrupt Pending 12" "No effect,Disabled" textline " " bitfld.long 0x04 11. " PID11 ,Interrupt Pending 11" "No effect,Disabled" bitfld.long 0x04 10. " PID10 ,Interrupt Pending 10" "No effect,Disabled" textline " " bitfld.long 0x04 9. " PID9 ,Interrupt Pending 9" "No effect,Disabled" bitfld.long 0x04 8. " PID8 ,Interrupt Pending 8" "No effect,Disabled" textline " " bitfld.long 0x04 7. " PID7 ,Interrupt Pending 7" "No effect,Disabled" bitfld.long 0x04 6. " PID6 ,Interrupt Pending 6" "No effect,Disabled" textline " " bitfld.long 0x04 5. " PID5 ,Interrupt Pending 5" "No effect,Disabled" bitfld.long 0x04 4. " PID4 ,Interrupt Pending 4" "No effect,Disabled" textline " " bitfld.long 0x04 3. " PID3 ,Interrupt Pending 3" "No effect,Disabled" bitfld.long 0x04 2. " PID2 ,Interrupt Pending 2" "No effect,Disabled" textline " " bitfld.long 0x04 1. " SYS ,Interrupt Pending 1" "No effect,Disabled" bitfld.long 0x04 0. " FIQ ,Interrupt Pending 0" "No effect,Disabled" line.long 0x08 "AIC_ICCR,Interrupt Clear Command Register" bitfld.long 0x08 31. " PID31 ,Interrupt Pending 31" "No effect,Cleared" bitfld.long 0x08 30. " PID30 ,Interrupt Pending 30" "No effect,Cleared" textline " " bitfld.long 0x08 29. " PID29 ,Interrupt Pending 29" "No effect,Cleared" bitfld.long 0x08 28. " PID28 ,Interrupt Pending 28" "No effect,Cleared" textline " " bitfld.long 0x08 27. " PID27 ,Interrupt Pending 27" "No effect,Cleared" bitfld.long 0x08 26. " PID26 ,Interrupt Pending 26" "No effect,Cleared" textline " " bitfld.long 0x08 25. " PID25 ,Interrupt Pending 25" "No effect,Cleared" bitfld.long 0x08 24. " PID24 ,Interrupt Pending 24" "No effect,Cleared" textline " " bitfld.long 0x08 23. " PID23 ,Interrupt Pending 23" "No effect,Cleared" bitfld.long 0x08 22. " PID22 ,Interrupt Pending 22" "No effect,Cleared" textline " " bitfld.long 0x08 21. " PID21 ,Interrupt Pending 21" "No effect,Cleared" bitfld.long 0x08 20. " PID20 ,Interrupt Pending 20" "No effect,Cleared" textline " " bitfld.long 0x08 19. " PID19 ,Interrupt Pending 19" "No effect,Cleared" bitfld.long 0x08 18. " PID18 ,Interrupt Pending 18" "No effect,Cleared" textline " " bitfld.long 0x08 17. " PID17 ,Interrupt Pending 17" "No effect,Cleared" bitfld.long 0x08 16. " PID16 ,Interrupt Pending 16" "No effect,Cleared" textline " " bitfld.long 0x08 15. " PID15 ,Interrupt Pending 15" "No effect,Cleared" bitfld.long 0x08 14. " PID14 ,Interrupt Pending 14" "No effect,Cleared" textline " " bitfld.long 0x08 13. " PID13 ,Interrupt Pending 13" "No effect,Cleared" bitfld.long 0x08 12. " PID12 ,Interrupt Pending 12" "No effect,Cleared" textline " " bitfld.long 0x08 11. " PID11 ,Interrupt Pending 11" "No effect,Cleared" bitfld.long 0x08 10. " PID10 ,Interrupt Pending 10" "No effect,Cleared" textline " " bitfld.long 0x08 9. " PID9 ,Interrupt Pending 9" "No effect,Cleared" bitfld.long 0x08 8. " PID8 ,Interrupt Pending 8" "No effect,Cleared" textline " " bitfld.long 0x08 7. " PID7 ,Interrupt Pending 7" "No effect,Cleared" bitfld.long 0x08 6. " PID6 ,Interrupt Pending 6" "No effect,Cleared" textline " " bitfld.long 0x08 5. " PID5 ,Interrupt Pending 5" "No effect,Cleared" bitfld.long 0x08 4. " PID4 ,Interrupt Pending 4" "No effect,Cleared" textline " " bitfld.long 0x08 3. " PID3 ,Interrupt Pending 3" "No effect,Cleared" bitfld.long 0x08 2. " PID2 ,Interrupt Pending 2" "No effect,Cleared" textline " " bitfld.long 0x08 1. " SYS ,Interrupt Pending 1" "No effect,Cleared" bitfld.long 0x08 0. " FIQ ,Interrupt Pending 0" "No effect,Cleared" line.long 0x0c "AIC_ISCR,Interrupt Set Command Register" bitfld.long 0x0c 31. " PID31 ,Interrupt Pending 31" "No effect,Set" bitfld.long 0x0c 30. " PID30 ,Interrupt Pending 30" "No effect,Set" textline " " bitfld.long 0x0c 29. " PID29 ,Interrupt Pending 29" "No effect,Set" bitfld.long 0x0c 28. " PID28 ,Interrupt Pending 28" "No effect,Set" textline " " bitfld.long 0x0c 27. " PID27 ,Interrupt Pending 27" "No effect,Set" bitfld.long 0x0c 26. " PID26 ,Interrupt Pending 26" "No effect,Set" textline " " bitfld.long 0x0c 25. " PID25 ,Interrupt Pending 25" "No effect,Set" bitfld.long 0x0c 24. " PID24 ,Interrupt Pending 24" "No effect,Set" textline " " bitfld.long 0x0c 23. " PID23 ,Interrupt Pending 23" "No effect,Set" bitfld.long 0x0c 22. " PID22 ,Interrupt Pending 22" "No effect,Set" textline " " bitfld.long 0x0c 21. " PID21 ,Interrupt Pending 21" "No effect,Set" bitfld.long 0x0c 20. " PID20 ,Interrupt Pending 20" "No effect,Set" textline " " bitfld.long 0x0c 19. " PID19 ,Interrupt Pending 19" "No effect,Set" bitfld.long 0x0c 18. " PID18 ,Interrupt Pending 18" "No effect,Set" textline " " bitfld.long 0x0c 17. " PID17 ,Interrupt Pending 17" "No effect,Set" bitfld.long 0x0c 16. " PID16 ,Interrupt Pending 16" "No effect,Set" textline " " bitfld.long 0x0c 15. " PID15 ,Interrupt Pending 15" "No effect,Set" bitfld.long 0x0c 14. " PID14 ,Interrupt Pending 14" "No effect,Set" textline " " bitfld.long 0x0c 13. " PID13 ,Interrupt Pending 13" "No effect,Set" bitfld.long 0x0c 12. " PID12 ,Interrupt Pending 12" "No effect,Set" textline " " bitfld.long 0x0c 11. " PID11 ,Interrupt Pending 11" "No effect,Set" bitfld.long 0x0c 10. " PID10 ,Interrupt Pending 10" "No effect,Set" textline " " bitfld.long 0x0c 9. " PID9 ,Interrupt Pending 9" "No effect,Set" bitfld.long 0x0c 8. " PID8 ,Interrupt Pending 8" "No effect,Set" textline " " bitfld.long 0x0c 7. " PID7 ,Interrupt Pending 7" "No effect,Set" bitfld.long 0x0c 6. " PID6 ,Interrupt Pending 6" "No effect,Set" textline " " bitfld.long 0x0c 5. " PID5 ,Interrupt Pending 5" "No effect,Set" bitfld.long 0x0c 4. " PID4 ,Interrupt Pending 4" "No effect,Set" textline " " bitfld.long 0x0c 3. " PID3 ,Interrupt Pending 3" "No effect,Set" bitfld.long 0x0c 2. " PID2 ,Interrupt Pending 2" "No effect,Set" textline " " bitfld.long 0x0c 1. " PID1 ,Interrupt Pending 1" "No effect,Set" bitfld.long 0x0c 0. " PID0 ,Interrupt Pending 0" "No effect,Set" hgroup.long 0x130++3 hide.long 0x0 "AIC_EOICR,End of Interrupt Command Register" tree.end width 0x9 tree "Spurious Interrupt nad Debug Control Registers" group.long 0x134++0x07 line.long 0x00 "AIC_SPU,Spurious Interrupt Vector Register" hexmask.long 0x00 0.--31. 1. " SIV ,Spurious Interrupt Vector Register" line.long 0x04 "AIC_DCR,Debug Control Register" bitfld.long 0x04 1. " GMSK ,General Mask" "Normally controlled,Inactive state" bitfld.long 0x04 0. " PROT ,Protection Mode" "Disabled,Enabled" tree.end tree "Fast Forcing Registers" width 0x12 group.long 0x148++0x03 line.long 0x00 "AIC_FFSR_Dis/Ena,Fast Forcing Disable/Enable and Status Register" setclrfld.long 0x00 31. -0x8 31. -0x4 31. " PID31 ,Fast Forcing Disable/Enable and Status 31" "Disabled,Enabled" setclrfld.long 0x00 30. -0x8 30. -0x4 30. " PID30 ,Fast Forcing Disable/Enable and Status 30" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. -0x8 29. -0x4 29. " PID29 ,Fast Forcing Disable/Enable and Status 29" "Disabled,Enabled" setclrfld.long 0x00 28. -0x8 28. -0x4 28. " PID28 ,Fast Forcing Disable/Enable and Status 28" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. -0x8 27. -0x4 27. " PID27 ,Fast Forcing Disable/Enable and Status 27" "Disabled,Enabled" setclrfld.long 0x00 26. -0x8 26. -0x4 26. " PID26 ,Fast Forcing Disable/Enable and Status 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. -0x8 25. -0x4 25. " PID25 ,Fast Forcing Disable/Enable and Status 25" "Disabled,Enabled" setclrfld.long 0x00 24. -0x8 24. -0x4 24. " PID24 ,Fast Forcing Disable/Enable and Status 24" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. -0x8 23. -0x4 23. " PID23 ,Fast Forcing Disable/Enable and Status 23" "Disabled,Enabled" setclrfld.long 0x00 22. -0x8 22. -0x4 22. " PID22 ,Fast Forcing Disable/Enable and Status 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. -0x8 21. -0x4 21. " PID21 ,Fast Forcing Disable/Enable and Status 21" "Disabled,Enabled" setclrfld.long 0x00 20. -0x8 20. -0x4 20. " PID20 ,Fast Forcing Disable/Enable and Status 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. -0x8 19. -0x4 19. " PID19 ,Fast Forcing Disable/Enable and Status 19" "Disabled,Enabled" setclrfld.long 0x00 18. -0x8 18. -0x4 18. " PID18 ,Fast Forcing Disable/Enable and Status 18" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x8 17. -0x4 17. " PID17 ,Fast Forcing Disable/Enable and Status 17" "Disabled,Enabled" setclrfld.long 0x00 16. -0x8 16. -0x4 16. " PID16 ,Fast Forcing Disable/Enable and Status 16" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. -0x8 15. -0x4 15. " PID15 ,Fast Forcing Disable/Enable and Status 15" "Disabled,Enabled" setclrfld.long 0x00 14. -0x8 14. -0x4 14. " PID14 ,Fast Forcing Disable/Enable and Status 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. -0x8 13. -0x4 13. " PID13 ,Fast Forcing Disable/Enable and Status 13" "Disabled,Enabled" setclrfld.long 0x00 12. -0x8 12. -0x4 12. " PID12 ,Fast Forcing Disable/Enable and Status 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. -0x8 11. -0x4 11. " PID11 ,Fast Forcing Disable/Enable and Status 11" "Disabled,Enabled" setclrfld.long 0x00 10. -0x8 10. -0x4 10. " PID10 ,Fast Forcing Disable/Enable and Status 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. -0x8 9. -0x4 9. " PID9 ,Fast Forcing Disable/Enable and Status 9" "Disabled,Enabled" setclrfld.long 0x00 8. -0x8 8. -0x4 8. " PID8 ,Fast Forcing Disable/Enable and Status 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. -0x8 7. -0x4 7. " PID7 ,Fast Forcing Disable/Enable and Status 7" "Disabled,Enabled" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " PID6 ,Fast Forcing Disable/Enable and Status 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. -0x8 5. -0x4 5. " PID5 ,Fast Forcing Disable/Enable and Status 5" "Disabled,Enabled" setclrfld.long 0x00 4. -0x8 4. -0x4 4. " PID4 ,Fast Forcing Disable/Enable and Status 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x8 3. -0x4 3. " PID3 ,Fast Forcing Disable/Enable and Status 3" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " PID2 ,Fast Forcing Disable/Enable and Status 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " SYS ,Fast Forcing Disable/Enable and Status 1" "Disabled,Enabled" tree.end width 0xb tree.end tree "Power Management Controller (PMC)" base 0xFFFFFC00 width 0x13 group.long 0x08++0x03 line.long 0x00 "PMC_SCSR_Set/Clr,System Clock Disable/Enable and Status Register" setclrfld.long 0x00 10. -0x8 10. -0x4 10. " PCK2 ,Programmable Clock 2 Output Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x8 9. -0x4 9. " PCK1 ,Programmable Clock 1 Output Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x8 8. -0x4 8. " PCK0 ,Programmable Clock 0 Output Status" "Disabled,Enabled" sif (cpu()!="AT91SAM7S32"&&cpu()!="AT91SAM7L64"&&cpu()!="AT91SAM7L128") setclrfld.long 0x00 7. -0x8 7. -0x4 7. " UDP ,USB Device Port Clock Status" "Disabled,Enabled" endif sif (cpu()!="AT91SAM7L64"&&cpu()!="AT91SAM7L128") textline " " setclrfld.long 0x00 0. -0x8 0. -0x4 0. " PCK ,Processor Clock Status" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x0 "PMC_SCDR,PMC System Clock Disable Register " bitfld.long 0x0 0. " PCK ,Processor Clock Disable" "No effect,Disabled" rgroup.long 0x08++0x3 line.long 0x0 "PMC_SCSR,PMC System Clock Status Register" bitfld.long 0x0 0. " PCK ,Processor Clock Status" "Disabled,Enabled" group.long 0x18++0x03 line.long 0x00 "PMC_PCSR_Set/Clr,Peripheral Clock Disable/Enable and Status Register" setclrfld.long 0x00 31. -0x8 31. -0x4 31. " PID31 ,Peripheral Clock 31 Status" "Disabled,Enabled" setclrfld.long 0x00 30. -0x8 30. -0x4 30. " PID30 ,Peripheral Clock 30 Status" "Disabled,Enabled" setclrfld.long 0x00 29. -0x8 29. -0x4 29. " PID29 ,Peripheral Clock 29 Status" "Disabled,Enabled" setclrfld.long 0x00 28. -0x8 28. -0x4 28. " PID28 ,Peripheral Clock 28 Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. -0x8 27. -0x4 27. " PID27 ,Peripheral Clock 27 Status" "Disabled,Enabled" setclrfld.long 0x00 26. -0x8 26. -0x4 26. " PID26 ,Peripheral Clock 26 Status" "Disabled,Enabled" setclrfld.long 0x00 25. -0x8 25. -0x4 25. " PID25 ,Peripheral Clock 25 Status" "Disabled,Enabled" setclrfld.long 0x00 24. -0x8 24. -0x4 24. " PID24 ,Peripheral Clock 24 Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. -0x8 23. -0x4 23. " PID23 ,Peripheral Clock 23 Status" "Disabled,Enabled" setclrfld.long 0x00 22. -0x8 22. -0x4 22. " PID22 ,Peripheral Clock 22 Status" "Disabled,Enabled" setclrfld.long 0x00 21. -0x8 21. -0x4 21. " PID21 ,Peripheral Clock 21 Status" "Disabled,Enabled" setclrfld.long 0x00 20. -0x8 20. -0x4 20. " PID20 ,Peripheral Clock 20 Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. -0x8 19. -0x4 19. " PID19 ,Peripheral Clock 19 Status" "Disabled,Enabled" setclrfld.long 0x00 18. -0x8 18. -0x4 18. " PID18 ,Peripheral Clock 18 Status" "Disabled,Enabled" setclrfld.long 0x00 17. -0x8 17. -0x4 17. " PID17 ,Peripheral Clock 17 Status" "Disabled,Enabled" setclrfld.long 0x00 16. -0x8 16. -0x4 16. " PID16 ,Peripheral Clock 16 Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. -0x8 15. -0x4 15. " PID15 ,Peripheral Clock 15 Status" "Disabled,Enabled" setclrfld.long 0x00 14. -0x8 14. -0x4 14. " PID14 ,Peripheral Clock 14 Status" "Disabled,Enabled" setclrfld.long 0x00 13. -0x8 13. -0x4 13. " PID13 ,Peripheral Clock 13 Status" "Disabled,Enabled" setclrfld.long 0x00 12. -0x8 12. -0x4 12. " PID12 ,Peripheral Clock 12 Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. -0x8 11. -0x4 11. " PID11 ,Peripheral Clock 11 Status" "Disabled,Enabled" setclrfld.long 0x00 10. -0x8 10. -0x4 10. " PID10 ,Peripheral Clock 10 Status" "Disabled,Enabled" setclrfld.long 0x00 9. -0x8 9. -0x4 9. " PID9 ,Peripheral Clock 9 Status" "Disabled,Enabled" setclrfld.long 0x00 8. -0x8 8. -0x4 8. " PID8 ,Peripheral Clock 8 Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. -0x8 7. -0x4 7. " PID7 ,Peripheral Clock 7 Status" "Disabled,Enabled" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " PID6 ,Peripheral Clock 6 Status" "Disabled,Enabled" setclrfld.long 0x00 5. -0x8 5. -0x4 5. " PID5 ,Peripheral Clock 5 Status" "Disabled,Enabled" setclrfld.long 0x00 4. -0x8 4. -0x4 4. " PID4 ,Peripheral Clock 4 Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x8 3. -0x4 3. " PID3 ,Peripheral Clock 3 Status" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " PID2 ,Peripheral Clock 2 Status" "Disabled,Enabled" textline " " width 0xb group.long 0x20++0x03 line.long 0x00 "CKGR_MOR,Main Oscillator Register" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") bitfld.long 0x00 24. " MCKSEL ,Main Oscillator Enable" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " KEY ,Password" bitfld.long 0x00 0. " MAINCKON , 2 MHz RC Oscillator Enable" "Disabled,Enabled" else hexmask.long.byte 0x00 8.--15. 1. " OSCOUNT ,Main Oscillator Start-up Time" bitfld.long 0x00 1. " OSCBYPASS ,Oscillator Bypass" "No effect,Bypassed" bitfld.long 0x00 0. " MOSCEN ,Main Oscillator Enable" "Disabled,Enabled" endif rgroup.long 0x24++0x03 line.long 0x00 "CKGR_MCFR,Main Clock Frequency Register" bitfld.long 0x00 16. " MAINRDY ,Main Clock Ready" "MAINF not valid,MAINF available" hexmask.long.word 0x00 0.--15. 1. " MAINF ,Main Clock Frequency" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") group.long 0x28++0x03 line.long 0x00 "CKGR_PLLR,PLL Register" hexmask.long.word 0x00 16.--26. 1. " MUL ,PLL Multiplier" textline " " bitfld.long 0x00 14.--15. " STMODE , Start Mode" "Fast Startup,Reserved,Normal Startup,?..." hexmask.long.byte 0x00 8.--13. 1. " PLLCOUNT ,PLL Counter" textline " " hexmask.long.byte 0x00 0.--7. 1. " DIV ,Divider" else group.long 0x2c++0x03 line.long 0x00 "CKGR_PLLR,PLL Register" bitfld.long 0x00 28.--29. " USBDIV ,Divider for USB Clock" "Output,Output/2,Output/4,?..." hexmask.long.word 0x00 16.--26. 1. " MUL ,PLL Multiplier" textline " " bitfld.long 0x00 14.--15. " OUT ,PLL Clock Frequency Range" "80-160MHz,Reserved,150-220MHz,?..." hexmask.long.byte 0x00 8.--13. 1. " PLLCOUNT ,PLL Counter" textline " " hexmask.long.byte 0x00 0.--7. 1. " DIV ,Divider" endif group.long 0x30++0x03 line.long 0x00 "PMC_MCKR,Master Clock Register" bitfld.long 0x00 2.--4. " PRES ,Master Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..." bitfld.long 0x00 0.--1. " CSS ,Master Clock Selection" "Slow Clock,Main Clock,Reserved,PLL Clock" ;width 0xa group.long 0x40++0x03 line.long 0x00 "PMC_PCK0,Programmable Clock 0 Register" bitfld.long 0x00 2.--4. " PRES ,Master Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..." bitfld.long 0x00 0.--1. " CSS ,Master Clock Selection" "Slow Clock,Main Clock,Reserved,PLL B Clock" width 0xb ;width 0xa group.long 0x44++0x03 line.long 0x00 "PMC_PCK1,Programmable Clock 1 Register" bitfld.long 0x00 2.--4. " PRES ,Master Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..." bitfld.long 0x00 0.--1. " CSS ,Master Clock Selection" "Slow Clock,Main Clock,Reserved,PLL B Clock" width 0xb sif (cpu()!="AT91SAM7L64"&&cpu()!="AT91SAM7L128") ;width 0xa group.long 0x48++0x03 line.long 0x00 "PMC_PCK2,Programmable Clock 2 Register" bitfld.long 0x00 2.--4. " PRES ,Master Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..." bitfld.long 0x00 0.--1. " CSS ,Master Clock Selection" "Slow Clock,Main Clock,Reserved,PLL B Clock" width 0xb ;width 0xa group.long 0x4c++0x03 line.long 0x00 "PMC_PCK3,Programmable Clock 3 Register" bitfld.long 0x00 2.--4. " PRES ,Master Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..." bitfld.long 0x00 0.--1. " CSS ,Master Clock Selection" "Slow Clock,Main Clock,Reserved,PLL B Clock" width 0xb ;width 0xa group.long 0x50++0x03 line.long 0x00 "PMC_PCK4,Programmable Clock 4 Register" bitfld.long 0x00 2.--4. " PRES ,Master Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..." bitfld.long 0x00 0.--1. " CSS ,Master Clock Selection" "Slow Clock,Main Clock,Reserved,PLL B Clock" width 0xb ;width 0xa group.long 0x54++0x03 line.long 0x00 "PMC_PCK5,Programmable Clock 5 Register" bitfld.long 0x00 2.--4. " PRES ,Master Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..." bitfld.long 0x00 0.--1. " CSS ,Master Clock Selection" "Slow Clock,Main Clock,Reserved,PLL B Clock" width 0xb ;width 0xa group.long 0x58++0x03 line.long 0x00 "PMC_PCK6,Programmable Clock 6 Register" bitfld.long 0x00 2.--4. " PRES ,Master Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..." bitfld.long 0x00 0.--1. " CSS ,Master Clock Selection" "Slow Clock,Main Clock,Reserved,PLL B Clock" width 0xb ;width 0xa group.long 0x5c++0x03 line.long 0x00 "PMC_PCK7,Programmable Clock 7 Register" bitfld.long 0x00 2.--4. " PRES ,Master Clock Prescaler" "Clock,Clock/2,Clock/4,Clock/8,Clock/16,Clock/32,Clock/64,?..." bitfld.long 0x00 0.--1. " CSS ,Master Clock Selection" "Slow Clock,Main Clock,Reserved,PLL B Clock" width 0xb endif ;sif (cpu()=="AT91SAM7SE32"||cpu()=="AT91SAM7SE256"||cpu()=="AT91SAM7SE512") ;%include sam7sx/sam7s32/pmc_pck.ph 3 4c ;endif ;%include sam7sx/sam7s32/pmc_pck.ph 4 50 ;%include sam7sx/sam7s32/pmc_pck.ph 5 54 ;%include sam7sx/sam7s32/pmc_pck.ph 6 58 ;%include sam7sx/sam7s32/pmc_pck.ph 7 5c rgroup.long 0x68++0x03 line.long 0x00 "PMC_SR,Status Register" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") bitfld.long 0x00 16. " MAINSELS , MAINSELS Main Clock Selection Status" "In progress,Completed" textline " " endif bitfld.long 0x00 10. " PCKRDY2 ,Programmable Clock Ready 2 Status" "Not ready,Ready" bitfld.long 0x00 9. " PCKRDY1 ,Programmable Clock Ready 1 Status" "Not ready,Ready" textline " " bitfld.long 0x00 8. " PCKRDY0 ,Programmable Clock Ready 0 Status" "Not ready,Ready" bitfld.long 0x00 3. " MCKRDY ,Master Clock Ready Status" "Not ready,Ready" textline " " bitfld.long 0x00 2. " LOCK ,PLL Lock Status" "Not locked,Locked" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") bitfld.long 0x00 0. " MAINRDY , MAINRDY Flag Status" "Not ready,Ready" else bitfld.long 0x00 0. " MOSCS ,Main Oscillator Status Status" "Not stabilized,Stabilized" endif width 0x11 textline " " group.long 0x6c++0x03 line.long 0x0 "PMC_IMR_Set/Clr,Interrupt Enable/Mask Register" setclrfld.long 0x0 10. -0xc 10. -0x8 10. " PCKRDY2 ,Programmable Clock Ready 2 Interrupt Mask" "Enabled,Disabled" setclrfld.long 0x0 9. -0xc 9. -0x8 9. " PCKRDY1 ,Programmable Clock Ready 1 Interrupt Mask" "Enabled,Disabled" textline " " setclrfld.long 0x0 8. -0xc 8. -0x8 8. " PCKRDY0 ,Programmable Clock Ready 0 Interrupt Mask" "Enabled,Disabled" setclrfld.long 0x0 3. -0xc 3. -0x8 3. " MCKRDY ,Master Clock Ready Interrupt Mask" "Enabled,Disabled" textline " " setclrfld.long 0x0 2. -0xc 2. -0x8 2. " LOCK ,PLL Lock Interrupt Mask" "Enabled,Disabled" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") setclrfld.long 0x0 0. -0xc 0. -0x8 0. " MAINRDY , Main Clock Ready Interrupt Mask" "Enabled,Disabled" else setclrfld.long 0x0 0. -0xc 0. -0x8 0. " MOSCS ,Main Oscillator Status Interrupt Mask" "Enabled,Disabled" endif sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") rgroup.long 0x68++0x03 line.long 0x00 "PMC_SR,PMC Fast Startup Mode Register" bitfld.long 0x00 15. " FSTT15 , Fast Start Input Enable " "Disabled,Enabled" bitfld.long 0x00 14. " FSTT14 , Fast Start Input Enable " "Disabled,Enabled" bitfld.long 0x00 13. " FSTT13 , Fast Start Input Enable " "Disabled,Enabled" textline " " bitfld.long 0x00 12. " FSTT12 , Fast Start Input Enable " "Disabled,Enabled" bitfld.long 0x00 11. " FSTT11 , Fast Start Input Enable " "Disabled,Enabled" bitfld.long 0x00 10. " FSTT10 , Fast Start Input Enable " "Disabled,Enabled" textline " " bitfld.long 0x00 9. " FSTT9 , Fast Start Input Enable " "Disabled,Enabled" bitfld.long 0x00 8. " FSTT8 , Fast Start Input Enable " "Disabled,Enabled" bitfld.long 0x00 7. " FSTT7 , Fast Start Input Enable " "Disabled,Enabled" textline " " bitfld.long 0x00 6. " FSTT6 , Fast Start Input Enable " "Disabled,Enabled" bitfld.long 0x00 5. " FSTT5 , Fast Start Input Enable " "Disabled,Enabled" bitfld.long 0x00 4. " FSTT4 , Fast Start Input Enable " "Disabled,Enabled" textline " " bitfld.long 0x00 3. " FSTT3 , Fast Start Input Enable " "Disabled,Enabled" bitfld.long 0x00 2. " FSTT2 , Fast Start Input Enable " "Disabled,Enabled" bitfld.long 0x00 1. " FSTT1 , Fast Start Input Enable " "Disabled,Enabled" bitfld.long 0x00 0. " FSTT0 , Fast Start Input Enable " "Disabled,Enabled" endif width 0xb tree.end tree "Debug Unit (DBGU)" base 0xFFFFF200 width 0x12 wgroup.long 0x00++0x03 line.long 0x00 "DBGU_CR,Control Register" bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset" bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled" textline " " bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled" bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled" textline " " bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled" bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset" textline " " bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset" group.long 0x04++0x03 line.long 0x00 "DBGU_MR,Mode Register" bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal Mode,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Space,Mark,No parity,No parity,No parity,No parity" group.long 0x10++0x3 line.long 0x00 "DBGU_IMR_Set/Clr,Interrupt Enable/Mask Register" setclrfld.long 0x00 31. -0x8 31. -0x4 31. " COMMRX ,Mask COMMRX (from ARM) Interrupt" "Disabled,Enabled" setclrfld.long 0x00 30. -0x8 30. -0x4 30. " COMMTX ,Mask COMMTX (from ARM) Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x8 12. -0x4 12. " RXBUFF ,Mask Buffer Full Interrupt" "Disabled,Enabled" setclrfld.long 0x00 11. -0x8 11. -0x4 11. " TXBUFE ,Mask Buffer Empty Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. -0x8 9. -0x4 9. " TXEMPTY ,Mask TXEMPTY Interrupt" "Disabled,Enabled" setclrfld.long 0x00 7. -0x8 7. -0x4 7. " PARE ,Mask Parity Error Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. -0x8 6. -0x4 6. " FRAME ,Mask Framing Error Interrupt" "Disabled,Enabled" setclrfld.long 0x00 5. -0x8 5. -0x4 5. " OVRE ,Mask Overrun Error Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x8 4. -0x4 4. " ENDTX ,Mask End of Transmit Interrupt" "Disabled,Enabled" setclrfld.long 0x00 3. -0x8 3. -0x4 3. " ENDRX ,Mask End of Receive Transfer Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " TXRDY ,Mask TXRDY Interrupt" "Disabled,Enabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " RXRDY ,Mask RXRDY Interrupt" "Disabled,Enabled" rgroup.long 0x14++0x7 line.long 0x00 "DBGU_SR,Status Register" bitfld.long 0x00 31. " COMMRX ,Debug Communication Channel Read Status" "Inactive,Active" bitfld.long 0x00 30. " COMMTX ,Debug Communication Channel Write Status" "Inactive,Active" textline " " bitfld.long 0x00 12. " RXBUFF ,Receive Buffer Full" "Inactive,Active" bitfld.long 0x00 11. " TXBUFE ,Transmission Buffer Empty" "Inactive,Active" textline " " bitfld.long 0x00 9. " TXEMPTY ,Transmitter Empty" "Not empty,Empty" bitfld.long 0x00 7. " PARE ,Parity Error" "No error,Error" textline " " bitfld.long 0x00 6. " FRAME ,Framing Error" "No error,Error" bitfld.long 0x00 5. " OVRE ,Overrun Error" "No error,Error" textline " " bitfld.long 0x00 4. " ENDTX ,End of Transmitter Transfer" "Inactive,Active" bitfld.long 0x00 3. " ENDRX ,End of Receiver Transfer" "Inactive,Active" textline " " bitfld.long 0x00 1. " TXRDY ,Transmitter Ready" "Not ready,Ready" bitfld.long 0x00 0. " RXRDY ,Receiver Ready" "Not ready,Ready" line.long 0x04 "DBGU_RHR,Receive Holding Register" hexmask.long.byte 0x04 0.--7. 1. " RXCHR ,Received Character" wgroup.long 0x1c++0x03 line.long 0x00 "DBGU_THR,Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " TXCHR ,Character to be Transmitted" group.long 0x20++0x03 line.long 0x00 "DBGU_BRGR,Baud Rate Generator Register" hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divisor" if (0==0) rgroup.long 0x40++0x07 line.long 0x00 "DBGU_CIDR,Chip ID Register" bitfld.long 0x00 31. " EXT ,Extension Flag" "Not extended,Extended" bitfld.long 0x00 28.--30. " NVPTYP ,Nonvolatile Program Memory Type" "ROM,ROMless/on-chip Flash,Embedded Flash,ROM and Embedded,SRAM emul ROM,?..." textline " " hexmask.long.byte 0x00 20.--27. 1. " ARCH ,Architecture Identifier" bitfld.long 0x00 12.--15. " NVPSIZ2 ,Second Nonvolatile Program Memory Size" "None,8K bytes,16K bytes,32K bytes,Reserved,64K bytes,Reserved,128K bytes,Reserved,256K bytes,512K bytes,Reserved,1024K bytes,Reserved,2048K bytes,?..." textline " " bitfld.long 0x00 8.--11. " NVPSIZ ,Nonvolatile Program Memory Size" "None,8K bytes,16K bytes,32K bytes,Reserved,64K bytes,Reserved,128K bytes,Reserved,256K bytes,512K bytes,Reserved,1024K bytes,Reserved,2048K bytes,?..." bitfld.long 0x00 5.--7. " EPROC ,Embedded Processor" "Reserved,ARM946ES,ARM7TDMI,Reserved,ARM920T,ARM926EJS,?..." textline " " hexmask.long.byte 0x00 0.--4. 1. " VERSION ,Version of the Device" sif (cpu()=="AT91SAM7S321"||cpu()=="AT91SAM7S512") bitfld.long 0x00 16.--19. " SRAMSIZ ,Internal SRAM Size" "Reserved,1K bytes,2K bytes,Reserved,112K bytes,4K bytes,80K bytes,160K bytes,8K bytes,16K bytes,32K bytes,64K bytes,128K bytes,256K bytes,96K bytes,512K bytes" else bitfld.long 0x00 16.--19. " SRAMSIZ ,Internal SRAM Size" "Reserved,1K bytes,2K bytes,Reserved,Reserved,4K bytes,80K bytes,160K bytes,8K bytes,16K bytes,32K bytes,64K bytes,128K bytes,256K bytes,96K bytes,512K bytes" endif else rgroup.long 0x40++0x07 line.long 0x00 "DBGU_CIDR,Chip ID Register" bitfld.long 0x00 31. " EXT ,Extension Flag" "Not extended,Extended" bitfld.long 0x00 28.--30. " NVPTYP ,Nonvolatile Program Memory Type" "ROM,ROMless/on-chip Flash,Embedded Flash,ROM and Embedded,SRAM emul ROM,?..." textline " " hexmask.long.byte 0x00 20.--27. 1. " ARCH ,Architecture Identifier" bitfld.long 0x00 16.--19. " SRAMSIZ ,Internal SRAM Size" "Reserved,1K bytes,2K bytes,Reserved,Reserved,4K bytes,80K bytes,160K bytes,8K bytes,16K bytes,32K bytes,64K bytes,128K bytes,256K bytes,96K bytes,512K bytes" textline " " bitfld.long 0x00 8.--11. " NVPSIZ ,Nonvolatile Program Memory Size" "None,8K bytes,16K bytes,32K bytes,Reserved,64K bytes,Reserved,128K bytes,Reserved,256K bytes,512K bytes,Reserved,1024K bytes,Reserved,2048K bytes,?..." bitfld.long 0x00 5.--7. " EPROC ,Embedded Processor" "Reserved,ARM946ES,ARM7TDMI,Reserved,ARM920T,ARM926EJS,?..." textline " " hexmask.long.byte 0x00 0.--4. 1. " VERSION ,Version of the Device" endif rgroup.long 0x44++0x07 line.long 0x00 "DBGU_EXID,Chip ID Extension Register" hexfld.long 0x00 " EXID ,Chip ID Extension" if (0==0) group.long 0x48++0x03 line.long 0x00 "DBGU_FNR,Force NTRST Register" bitfld.long 0x00 1. " FNTRST ,Force NTRST" "power_on_reset,Held low" endif width 0xb tree "Peripheral DMA Controller (PDC)" width 0xd group.long 0x100--0x11F line.long 0x00 "PERIPH_RPR,Receive Pointer Register" hexmask.long 0x00 0.--31. 1. " RXPTR ,Receive Pointer Address" line.long 0x04 "PERIPH_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "PERIPH_TPR,Transmit Pointer Register" hexmask.long 0x08 0.--31. 1. " TXPTR ,Transmit Pointer Address" line.long 0x0c "PERIPH_TCR,Transmit Counter Register" hexmask.long.word 0x0c 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "PERIPH_RNPR,Receive Next Pointer Register" hexmask.long 0x10 0.--31. 1. " RXNPTR ,Receive Next Pointer Address" line.long 0x14 "PERIPH_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "PERIPH_TNPR,Transmit Next Pointer Register" hexmask.long 0x18 0.--31. 1. " TXNPTR ,Transmit Next Pointer Address" line.long 0x1c "PERIPH_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "PERIPH_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disabled" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enabled" textline " " bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enabled" rgroup.long 0x124++0x03 line.long 0x00 "PERIPH_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0xb tree.end tree.end tree.open "Serial Peripheral Interface (SPI)" sif (cpu()=="AT91SAM7S512") tree "SPI Registers" base 0xFFFE0000 width 8. wgroup.long 0x00++0x03 line.long 0x00 "SPI_CR,Control Register" bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,TD transferred" bitfld.long 0x00 7. " SWRST ,SPI Software Reset" "No effect,Reset" textline " " bitfld.long 0x00 1. " SPIDIS ,SPI Disable" "No effect,Disabled" bitfld.long 0x00 0. " SPIEN ,SPI Enable" "No effect,Enabled" if ((data.long(ad:0xFFFE0000+0x04)&0x07)==0x0) ;if PCSDEC[2]=0 and PS[1]=0 and MSTR[0]=0 group.long 0x04++0x03 line.long 0x00 "SPI_MR,Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects" bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled" textline " " bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder" bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable" textline " " bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden" elif (((data.long(ad:0xFFFE0000+0x04)&0x06)==0x0)&&((d.l(ad:0xFFFE0000+0x04)&0x1)==0x1)) ;if PCSDEC[2]=0 and PS[1]=0 and MSTR[0]=1 group.long 0x04++0x03 line.long 0x00 "SPI_MR,Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects" bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled" textline " " bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder" bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable" textline " " bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden" textline " " bitfld.long 0x00 7. " LLB ,Local Loopback" "Disabled,Enabled" elif (((data.long(ad:0xFFFE0000+0x04)&0x04)==0x04)&&((d.l(ad:0xFFFE0000+0x04)&0x03)==0x0)) ;if PCSDEC[2]=1 and PS[1]=0 and MSTR[0]=0 group.long 0x04++0x03 line.long 0x00 "SPI_MR,Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects" bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled" textline " " bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder" bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable" textline " " bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15" elif (((data.long(ad:0xFFFE0000+0x04)&0x05)==0x05)&&((d.l(ad:0xFFFE0000+0x04)&0x2)==0x0)) ;if PCSDEC[2]=1 and PS[1]=0 and MSTR[0]=1 group.long 0x04++0x03 line.long 0x00 "SPI_MR,Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects" bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled" textline " " bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder" bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable" textline " " bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15" textline " " bitfld.long 0x00 7. " LLB ,Local Loopback" "Disabled,Enabled" elif (((data.long(ad:0xFFFE0000+0x04)&0x05)==0x0)&&((d.l(ad:0xFFFE0000+0x04)&0x2)==0x2)) ;if PCSDEC[2]=0 and PS[1]=1 and MSTR[0]=0 group.long 0x04++0x03 line.long 0x00 "SPI_MR,Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects" bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled" textline " " bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder" bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable" textline " " bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master" elif (((data.long(ad:0xFFFE0000+0x04)&0x04)==0x0)&&((d.l(ad:0xFFFE0000+0x04)&0x3)==0x3)) ;if PCSDEC[2]=0 and PS[1]=1 and MSTR[0]=1 group.long 0x04++0x03 line.long 0x00 "SPI_MR,Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects" bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled" textline " " bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder" bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable" textline " " bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master" textline " " bitfld.long 0x00 7. " LLB ,Local Loopback" "Disabled,Enabled" elif (((data.long(ad:0xFFFE0000+0x04)&0x06)==0x06)&&((d.l(ad:0xFFFE0000+0x04)&0x1)==0x0)) ;if PCSDEC[2]=1 and PS[1]=1 and MSTR[0]=0 group.long 0x04++0x03 line.long 0x00 "SPI_MR,Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects" bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled" textline " " bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder" bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable" textline " " bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master" elif (((data.long(ad:0xFFFE0000+0x04)&0x07)==0x07)) ;if PCSDEC[2]=1 and PS[1]=1 and MSTR[0]=1 group.long 0x04++0x03 line.long 0x00 "SPI_MR,Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects" bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled" textline " " bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder" bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable" textline " " bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master" textline " " bitfld.long 0x00 7. " LLB ,Local Loopback" "Disabled,Enabled" endif width 9. ;if PCSDEC[2]=0 and PS[1]=0 and MSTR[0]=0 if ((data.long(ad:0xFFFE0000+0x04)&0x07)==0x00) rgroup.long 0x08++0x03 line.long 0x00 "SPI_RDR,Receive Data Register" hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data" wgroup.long 0x0c++0x03 line.long 0x00 "SPI_TDR,Transmit Data Register" hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data" elif (((data.long(ad:0xFFFE0000+0x04)&0x06)==0x00)&&((data.long(ad:0xFFFE0000+0x04)&0x01)==0x01)) ;if PCSDEC[2]=0 and PS[1]=0 and MSTR[0]=1 rgroup.long 0x08++0x03 line.long 0x00 "SPI_RDR,Receive Data Register" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden" hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data" wgroup.long 0x0c++0x03 line.long 0x00 "SPI_TDR,Transmit Data Register" hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data" ;if PCSDEC[2]=0 and PS[1]=1 and MSTR[0]=0 elif (((data.long(ad:0xFFFE0000+0x04)&0x05)==0x00)&&((data.long(ad:0xFFFE0000+0x04)&0x2)==0x2)) rgroup.long 0x08++0x03 line.long 0x00 "SPI_RDR,Receive Data Register" hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data" wgroup.long 0x0c++0x03 line.long 0x00 "SPI_TDR,Transmit Data Register" bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,TD transferred" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden" textline " " hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data" elif (((data.long(ad:0xFFFE0000+0x04)&0x04)==0x00)&&((data.long(ad:0xFFFE0000+0x04)&0x3)==0x3)) ;if PCSDEC[2]=0 and PS[1]=1 and MSTR[0]=1 rgroup.long 0x08++0x03 line.long 0x00 "SPI_RDR,Receive Data Register" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden" hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data" wgroup.long 0x0c++0x03 line.long 0x00 "SPI_TDR,Transmit Data Register" bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,TD transferred" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden" textline " " hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data" elif ((data.long(ad:0xFFFE0000+0x04)&0x07)==0x07) ;if PCSDEC[2]=1 and PS[1]=1 and MSTR[0]=1 rgroup.long 0x08++0x03 line.long 0x00 "SPI_RDR,Receive Data Register" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden" hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data" wgroup.long 0x0c++0x03 line.long 0x00 "SPI_TDR,Transmit Data Register" bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,TD transferred" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15" textline " " hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data" elif (((data.long(ad:0xFFFE0000+0x04)&0x05)==0x05)&&((data.long(ad:0xFFFE0000+0x04)&0x02)==0x00)) ;if PCSDEC[2]=1 and PS[1]=0 and MSTR[0]=1 rgroup.long 0x08++0x03 line.long 0x00 "SPI_RDR,Receive Data Register" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden" hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data" wgroup.long 0x0c++0x03 line.long 0x00 "SPI_TDR,Transmit Data Register" hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data" elif (((data.long(ad:0xFFFE0000+0x04)&0x06)==0x06)&&((data.long(ad:0xFFFE0000+0x04)&0x1)==0x0)) ;if PCSDEC[2]=1 and PS[1]=1 and MSTR[0]=0 rgroup.long 0x08++0x03 line.long 0x00 "SPI_RDR,Receive Data Register" hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data" wgroup.long 0x0c++0x03 line.long 0x00 "SPI_TDR,Transmit Data Register" bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,TD transferred" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15" textline " " hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data" elif (((data.long(ad:0xFFFE0000+0x04)&0x04)==0x04)&&((data.long(ad:0xFFFE0000+0x04)&0x3)==0x0)) ;if PCSDEC[2]=1 and PS[1]=0 and MSTR[0]=0 rgroup.long 0x08++0x03 line.long 0x00 "SPI_RDR,Receive Data Register" hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data" wgroup.long 0x0c++0x03 line.long 0x00 "SPI_TDR,Transmit Data Register" hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data" endif width 8. rgroup.long 0x10++0x03 line.long 0x00 "SPI_SR,Status Register" bitfld.long 0x00 16. " SPIENS ,SPI Enable Status" "Disabled,Enabled" bitfld.long 0x00 9. " TXEMPTY ,Transmission Registers Empty" "Not empty,Empty" textline " " bitfld.long 0x00 8. " NSSR ,NSS Rising" "Not detected,Detected" bitfld.long 0x00 7. " TXBUFE ,TX Buffer Empty" "Not empty,Empty" textline " " bitfld.long 0x00 6. " RXBUFF ,RX Buffer Full" "Not full,Full" bitfld.long 0x00 5. " ENDTX ,End of TX Buffer" "No end,End" textline " " bitfld.long 0x00 4. " ENDRX ,End of RX buffer" "No end,End" bitfld.long 0x00 3. " OVRES ,Overrun Error Status" "No error,Error" textline " " bitfld.long 0x00 2. " MODF ,Mode Fault Error" "No error,Error" bitfld.long 0x00 1. " TDRE ,Transmit Data Register Empty" "Not empty,Empty" textline " " bitfld.long 0x00 0. " RDRF ,Receive Data Register Full" "Not full,Full" width 17. group.long 0x1c++0x03 line.long 0x00 "SPI_IMR_Set/Clr,Interrupt Enable/Mask Register" setclrfld.long 0x00 9. -0x8 9. -0x4 9. " TXEMPTY ,Transmission Registers Empty Mask" "Disabled,Enabled" setclrfld.long 0x00 8. -0x8 8. -0x4 8. " NSSR ,NSS Rising Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. -0x8 7. -0x4 7. " TXBUFE ,TX Buffer Empty Mask" "Disabled,Enabled" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " RXBUFF ,RX Buffer Full Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. -0x8 5. -0x4 5. " ENDTX ,End of TX Buffer Mask" "Disabled,Enabled" setclrfld.long 0x00 4. -0x8 4. -0x4 4. " ENDRX ,End of RX buffer Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x8 3. -0x4 3. " OVRES ,Overrun Error Status Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " MODF ,Mode Fault Error Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " TDRE ,Transmit Data Register Empty Mask" "Disabled,Enabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " RDRF ,Receive Data Register Full Mask" "Disabled,Enabled" width 10. group.long 0x30--0x3f line.long 0x00 "SPI_CSR0,Chip Select Register 0" hexmask.long.byte 0x00 24.--31. 1. " DLYBCT ,Delay Between Consecutive Transfers" hexmask.long.byte 0x00 16.--23. 1. " DLYBS ,Delay Before SPCK" textline " " hexmask.long.byte 0x00 8.--15. 1. " SCBR ,Serial Clock Baud Rate" bitfld.long 0x00 4.--7. " BITS ,Bits per Transfer" "8,9,10,11,12,13,14,15,16,?..." textline " " bitfld.long 0x00 3. " CSAAT ,Chip Select Active After Transfer" "Rised,Not rised" bitfld.long 0x00 1. " NCPHA ,Clock Phase" "Changed,Captured" textline " " bitfld.long 0x00 0. " CPOL ,Clock Polarity" "0,1" line.long 0x04 "SPI_CSR1,Chip Select Register 1" hexmask.long.byte 0x04 24.--31. 1. " DLYBCT ,Delay Between Consecutive Transfers" hexmask.long.byte 0x04 16.--23. 1. " DLYBS ,Delay Before SPCK" textline " " hexmask.long.byte 0x04 8.--15. 1. " SCBR ,Serial Clock Baud Rate" bitfld.long 0x04 4.--7. " BITS ,Bits per Transfer" "8,9,10,11,12,13,14,15,16,?..." textline " " bitfld.long 0x04 3. " CSAAT ,Chip Select Active After Transfer" "Rised,Not rised" bitfld.long 0x04 1. " NCPHA ,Clock Phase" "Changed,Captured" textline " " bitfld.long 0x04 0. " CPOL ,Clock Polarity" "0,1" line.long 0x08 "SPI_CSR2,Chip Select Register 2" hexmask.long.byte 0x08 24.--31. 1. " DLYBCT ,Delay Between Consecutive Transfers" hexmask.long.byte 0x08 16.--23. 1. " DLYBS ,Delay Before SPCK" textline " " hexmask.long.byte 0x08 8.--15. 1. " SCBR ,Serial Clock Baud Rate" bitfld.long 0x08 4.--7. " BITS ,Bits per Transfer" "8,9,10,11,12,13,14,15,16,?..." textline " " bitfld.long 0x08 3. " CSAAT ,Chip Select Active After Transfer" "Rised,Not rised" bitfld.long 0x08 1. " NCPHA ,Clock Phase" "Changed,Captured" textline " " bitfld.long 0x08 0. " CPOL ,Clock Polarity" "0,1" line.long 0x0c "SPI_CSR3,Chip Select Register 3" hexmask.long.byte 0x0c 24.--31. 1. " DLYBCT ,Delay Between Consecutive Transfers" hexmask.long.byte 0x0c 16.--23. 1. " DLYBS ,Delay Before SPCK" textline " " hexmask.long.byte 0x0c 8.--15. 1. " SCBR ,Serial Clock Baud Rate" bitfld.long 0x0c 4.--7. " BITS ,Bits per Transfer" "8,9,10,11,12,13,14,15,16,?..." textline " " bitfld.long 0x0c 3. " CSAAT ,Chip Select Active After Transfer" "Rised,Not rised" bitfld.long 0x0c 1. " NCPHA ,Clock Phase" "Changed,Captured" textline " " bitfld.long 0x0c 0. " CPOL ,Clock Polarity" "0,1" width 0xb tree "Peripheral DMA Registers" width 0xd group.long 0x100--0x11F line.long 0x00 "PERIPH_RPR,Receive Pointer Register" hexmask.long 0x00 0.--31. 1. " RXPTR ,Receive Pointer Address" line.long 0x04 "PERIPH_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "PERIPH_TPR,Transmit Pointer Register" hexmask.long 0x08 0.--31. 1. " TXPTR ,Transmit Pointer Address" line.long 0x0c "PERIPH_TCR,Transmit Counter Register" hexmask.long.word 0x0c 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "PERIPH_RNPR,Receive Next Pointer Register" hexmask.long 0x10 0.--31. 1. " RXNPTR ,Receive Next Pointer Address" line.long 0x14 "PERIPH_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "PERIPH_TNPR,Transmit Next Pointer Register" hexmask.long 0x18 0.--31. 1. " TXNPTR ,Transmit Next Pointer Address" line.long 0x1c "PERIPH_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "PERIPH_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disabled" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enabled" textline " " bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enabled" rgroup.long 0x124++0x03 line.long 0x00 "PERIPH_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0xb tree.end tree.end else tree "SPI Registers" base 0xFFFE0000 width 0x11 wgroup.long 0x00++0x03 line.long 0x00 "SPI_CR,Control Register" bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,TD transferred" bitfld.long 0x00 7. " SWRST ,SPI Software Reset" "No effect,Reset" textline " " bitfld.long 0x00 1. " SPIDIS ,SPI Disable" "No effect,Disabled" bitfld.long 0x00 0. " SPIEN ,SPI Enable" "No effect,Enabled" if (((data.long(ad:0xFFFE0000+0x04)&0x00000004)==0x00000000)&&((d.l(ad:0xFFFE0000+0x04)&0x2)==0x0)) group.long 0x04++0x03 line.long 0x00 "SPI_MR,Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden" textline " " bitfld.long 0x00 7. " LLB ,Local Loopback" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled" textline " " sif (cpu()!="AT91SAM7S321"&&cpu()!="AT91SAM7SE32"&&cpu()!="AT91SAM7SE256"&&cpu()!="AT91SAM7SE512"&&cpu()!="AT91SAM7L64"&&cpu()!="AT91SAM7L128") bitfld.long 0x00 3. " FDIV ,Clock Selection" "CORECLK,CORECLK/N" endif textline " " bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder" textline " " bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable" bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master" elif (((data.long(ad:0xFFFE0000+0x04)&0x00000004)==0x00000004)&&((d.l(ad:0xFFFE0000+0x04)&0x2)==0x0)) group.long 0x04++0x03 line.long 0x00 "SPI_MR,Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15" textline " " bitfld.long 0x00 7. " LLB ,Local Loopback" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled" textline " " sif (cpu()!="AT91SAM7S321"&&cpu()!="AT91SAM7SE32"&&cpu()!="AT91SAM7SE256"&&cpu()!="AT91SAM7SE512"&&cpu()!="AT91SAM7L64"&&cpu()!="AT91SAM7L128") bitfld.long 0x00 3. " FDIV ,Clock Selection" "CORECLK,CORECLK/N" endif textline " " bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder" textline " " bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable" bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master" elif (((data.long(ad:0xFFFE0000+0x04)&0x00000004)==0x00000000)&&((d.l(ad:0xFFFE0000+0x04)&0x2)==0x1)) group.long 0x04++0x03 line.long 0x00 "SPI_MR,Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects" ;bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden" textline " " bitfld.long 0x00 7. " LLB ,Local Loopback" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled" textline " " sif (cpu()!="AT91SAM7S321"&&cpu()!="AT91SAM7SE32"&&cpu()!="AT91SAM7SE256"&&cpu()!="AT91SAM7SE512"&&cpu()!="AT91SAM7L64"&&cpu()!="AT91SAM7L128") bitfld.long 0x00 3. " FDIV ,Clock Selection" "CORECLK,CORECLK/N" endif textline " " bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder" textline " " bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable" bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master" else group.long 0x04++0x03 line.long 0x00 "SPI_MR,Mode Register" hexmask.long.byte 0x00 24.--31. 1. " DLYBCS ,Delay Between Chip Selects" ;bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15" textline " " bitfld.long 0x00 7. " LLB ,Local Loopback" "Disabled,Enabled" bitfld.long 0x00 4. " MODFDIS ,Mode Fault Detection" "Enabled,Disabled" textline " " sif (cpu()!="AT91SAM7S321"&&cpu()!="AT91SAM7SE32"&&cpu()!="AT91SAM7SE256"&&cpu()!="AT91SAM7SE512"&&cpu()!="AT91SAM7L64"&&cpu()!="AT91SAM7L128") bitfld.long 0x00 3. " FDIV ,Clock Selection" "CORECLK,CORECLK/N" endif textline " " bitfld.long 0x00 2. " PCSDEC ,Chip Select Decode" "Direct,Decoder" textline " " bitfld.long 0x00 1. " PS ,Peripheral Select" "Fixed,Variable" bitfld.long 0x00 0. " MSTR ,Master/Slave Mode" "Slave,Master" endif if (((data.long(ad:0xFFFE0000+0x04)&0x00000005)==0x00000000)&&((data.long(ad:0xFFFE0000+0x04)&0x2)==0x2)) rgroup.long 0x08++0x03 line.long 0x00 "SPI_RDR,Receive Data Register" ;bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden" hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data" wgroup.long 0x0c++0x03 line.long 0x00 "SPI_TDR,Transmit Data Register" bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,TD transferred" ;bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden" textline " " hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data" elif (((data.long(ad:0xFFFE0000+0x04)&0x00000005)==0x00000000)&&((data.long(ad:0xFFFE0000+0x04)&0x2)==0x0)) rgroup.long 0x08++0x03 line.long 0x00 "SPI_RDR,Receive Data Register" ;bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden" hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data" wgroup.long 0x0c++0x03 line.long 0x00 "SPI_TDR,Transmit Data Register" ;bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,TD transferred" ;bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden" textline " " hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data" elif (((data.long(ad:0xFFFE0000+0x04)&0x00000005)==0x00000001)&&((data.long(ad:0xFFFE0000+0x04)&0x2)==0x2)) rgroup.long 0x08++0x03 line.long 0x00 "SPI_RDR,Receive Data Register" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden" hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data" wgroup.long 0x0c++0x03 line.long 0x00 "SPI_TDR,Transmit Data Register" bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,TD transferred" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden" textline " " hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data" elif (((data.long(ad:0xFFFE0000+0x04)&0x00000005)==0x00000001)&&((data.long(ad:0xFFFE0000+0x04)&0x2)==0x0)) rgroup.long 0x08++0x03 line.long 0x00 "SPI_RDR,Receive Data Register" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden" hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data" wgroup.long 0x0c++0x03 line.long 0x00 "SPI_TDR,Transmit Data Register" ;bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,TD transferred" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=0111,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,NPCS[3:0]=1011,NPCS[3:0]=1110,NPCS[3:0]=1101,NPCS[3:0]=1110,Forbidden" textline " " hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data" elif (((data.long(ad:0xFFFE0000+0x04)&0x00000005)==0x00000005)&&((data.long(ad:0xFFFE0000+0x04)&0x2)==0x2)) rgroup.long 0x08++0x03 line.long 0x00 "SPI_RDR,Receive Data Register" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15" hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data" wgroup.long 0x0c++0x03 line.long 0x00 "SPI_TDR,Transmit Data Register" bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,TD transferred" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15" textline " " hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data" elif (((data.long(ad:0xFFFE0000+0x04)&0x00000005)==0x00000005)&&((data.long(ad:0xFFFE0000+0x04)&0x2)==0x0)) rgroup.long 0x08++0x03 line.long 0x00 "SPI_RDR,Receive Data Register" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15" hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data" wgroup.long 0x0c++0x03 line.long 0x00 "SPI_TDR,Transmit Data Register" ;bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,TD transferred" bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15" textline " " hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data" elif (((data.long(ad:0xFFFE0000+0x04)&0x00000005)==0x00000004)&&((data.long(ad:0xFFFE0000+0x04)&0x2)==0x2)) rgroup.long 0x08++0x03 line.long 0x00 "SPI_RDR,Receive Data Register" ;bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15" hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data" wgroup.long 0x0c++0x03 line.long 0x00 "SPI_TDR,Transmit Data Register" bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,TD transferred" ;bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15" textline " " hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data" else rgroup.long 0x08++0x03 line.long 0x00 "SPI_RDR,Receive Data Register" ;bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15" hexmask.long.word 0x00 0.--15. 1. " RD ,Receive Data" wgroup.long 0x0c++0x03 line.long 0x00 "SPI_TDR,Transmit Data Register" ;bitfld.long 0x00 24. " LASTXFER ,Last Transfer" "No effect,TD transferred" ;bitfld.long 0x00 16.--19. " PCS ,Peripheral Chip Select" "PCS0,PCS1,PCS2,PCS3,PCS4,PCS5,PCS6,PCS7,PCS8,PCS9,PCS10,PCS11,PCS12,PCS13,PCS14,PCS15" textline " " hexmask.long.word 0x00 0.--15. 1. " TD ,Transmit Data" endif hgroup.long 0x10++0x03 hide.long 0x00 "SPI_SR,Status Register" in group.long 0x1c++0x03 line.long 0x00 "SPI_IMR_Set/Clr,Interrupt Enable/Mask Register" setclrfld.long 0x00 9. -0x8 9. -0x4 9. " TXEMPTY ,Transmission Registers Empty Mask" "Disabled,Enabled" setclrfld.long 0x00 8. -0x8 8. -0x4 8. " NSSR ,NSS Rising Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. -0x8 7. -0x4 7. " TXBUFE ,TX Buffer Empty Mask" "Disabled,Enabled" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " RXBUFF ,RX Buffer Full Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. -0x8 5. -0x4 5. " ENDTX ,End of TX Buffer Mask" "Disabled,Enabled" setclrfld.long 0x00 4. -0x8 4. -0x4 4. " ENDRX ,End of RX buffer Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x8 3. -0x4 3. " OVRES ,Overrun Error Status Mask" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " MODF ,Mode Fault Error Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " TDRE ,Transmit Data Register Empty Mask" "Disabled,Enabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " RDRF ,Receive Data Register Full Mask" "Disabled,Enabled" group.long 0x30--0x3f line.long 0x00 "SPI_CSR0,Chip Select Register 0" hexmask.long.byte 0x00 24.--31. 1. " DLYBCT ,Delay Between Consecutive Transfers" hexmask.long.byte 0x00 16.--23. 1. " DLYBS ,Delay Before SPCK" textline " " hexmask.long.byte 0x00 8.--15. 1. " SCBR ,Serial Clock Baud Rate" bitfld.long 0x00 4.--7. " BITS ,Bits per Transfer" "8,9,10,11,12,13,14,15,16,?..." textline " " bitfld.long 0x00 3. " CSAAT ,Chip Select Active After Transfer" "Rised,Not rised" bitfld.long 0x00 1. " NCPHA ,Clock Phase" "Captured,Changed" textline " " bitfld.long 0x00 0. " CPOL ,Clock Polarity" "0,1" line.long 0x04 "SPI_CSR1,Chip Select Register 1" hexmask.long.byte 0x04 24.--31. 1. " DLYBCT ,Delay Between Consecutive Transfers" hexmask.long.byte 0x04 16.--23. 1. " DLYBS ,Delay Before SPCK" textline " " hexmask.long.byte 0x04 8.--15. 1. " SCBR ,Serial Clock Baud Rate" bitfld.long 0x04 4.--7. " BITS ,Bits per Transfer" "8,9,10,11,12,13,14,15,16,?..." textline " " bitfld.long 0x04 3. " CSAAT ,Chip Select Active After Transfer" "Rised,Not rised" bitfld.long 0x04 1. " NCPHA ,Clock Phase" "Captured,Changed" textline " " bitfld.long 0x04 0. " CPOL ,Clock Polarity" "0,1" line.long 0x08 "SPI_CSR2,Chip Select Register 2" hexmask.long.byte 0x08 24.--31. 1. " DLYBCT ,Delay Between Consecutive Transfers" hexmask.long.byte 0x08 16.--23. 1. " DLYBS ,Delay Before SPCK" textline " " hexmask.long.byte 0x08 8.--15. 1. " SCBR ,Serial Clock Baud Rate" bitfld.long 0x08 4.--7. " BITS ,Bits per Transfer" "8,9,10,11,12,13,14,15,16,?..." textline " " bitfld.long 0x08 3. " CSAAT ,Chip Select Active After Transfer" "Rised,Not rised" bitfld.long 0x08 1. " NCPHA ,Clock Phase" "Captured,Changed" textline " " bitfld.long 0x08 0. " CPOL ,Clock Polarity" "0,1" line.long 0x0c "SPI_CSR3,Chip Select Register 3" hexmask.long.byte 0x0c 24.--31. 1. " DLYBCT ,Delay Between Consecutive Transfers" hexmask.long.byte 0x0c 16.--23. 1. " DLYBS ,Delay Before SPCK" textline " " hexmask.long.byte 0x0c 8.--15. 1. " SCBR ,Serial Clock Baud Rate" bitfld.long 0x0c 4.--7. " BITS ,Bits per Transfer" "8,9,10,11,12,13,14,15,16,?..." textline " " bitfld.long 0x0c 3. " CSAAT ,Chip Select Active After Transfer" "Rised,Not rised" bitfld.long 0x0c 1. " NCPHA ,Clock Phase" "Captured,Changed" textline " " bitfld.long 0x0c 0. " CPOL ,Clock Polarity" "0,1" width 0xb tree "Peripheral DMA Registers" width 0xd group.long 0x100--0x11F line.long 0x00 "PERIPH_RPR,Receive Pointer Register" hexmask.long 0x00 0.--31. 1. " RXPTR ,Receive Pointer Address" line.long 0x04 "PERIPH_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "PERIPH_TPR,Transmit Pointer Register" hexmask.long 0x08 0.--31. 1. " TXPTR ,Transmit Pointer Address" line.long 0x0c "PERIPH_TCR,Transmit Counter Register" hexmask.long.word 0x0c 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "PERIPH_RNPR,Receive Next Pointer Register" hexmask.long 0x10 0.--31. 1. " RXNPTR ,Receive Next Pointer Address" line.long 0x14 "PERIPH_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "PERIPH_TNPR,Transmit Next Pointer Register" hexmask.long 0x18 0.--31. 1. " TXNPTR ,Transmit Next Pointer Address" line.long 0x1c "PERIPH_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "PERIPH_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disabled" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enabled" textline " " bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enabled" rgroup.long 0x124++0x03 line.long 0x00 "PERIPH_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0xb tree.end tree.end endif tree.end tree "Two-wire Interface (TWI)" base 0xFFFB8000 width 0x11 wgroup.long 0x00++0x03 line.long 0x00 "TWI_CR,Control Register" bitfld.long 0x00 7. " SWRST ,Software Reset" "No effect,Reset" bitfld.long 0x00 3. " MSDIS ,TWI Master Transfer Disabled" "No effect,Disabled" textline " " bitfld.long 0x00 2. " MSEN ,TWI Master Transfer Enabled" "No effect,Enabled" bitfld.long 0x00 1. " STOP ,Send a STOP Condition" "No effect,Sent" textline " " bitfld.long 0x00 0. " START ,Send a START Condition" "No effect,Sent" group.long 0x04++0x03 line.long 0x00 "TWI_MMR,Master Mode Register" hexmask.long.byte 0x00 16.--22. 1. " DADR ,Device Address" bitfld.long 0x00 12. " MREAD ,Master Read Direction" "Write,Read" textline " " bitfld.long 0x00 8.--9. " IADRSZ ,Internal Device Address Size" "No address,One-byte,Two-byte,Three-byte" group.long 0x0c++0x07 line.long 0x00 "TWI_IADR,Internal Address Register" hexmask.long.tbyte 0x00 0.--23. 1. " IADR ,Internal Address" line.long 0x04 "TWI_CWGR,Clock Waveform Generator Register" hexmask.long.byte 0x04 16.--18. 1. " CKDIV ,Clock Divider" hexmask.long.byte 0x04 8.--15. 1. " CHDIV ,Clock High Divider" textline " " hexmask.long.byte 0x04 0.--7. 1. " CLDIV ,Clock Low Divider" rgroup.long 0x20++0x03 line.long 0x00 "TWI_SR,Status Register" bitfld.long 0x00 8. " NACK ,Not Acknowledged" "Data received,Not acknowledged" bitfld.long 0x00 2. " TXRDY ,Transmit Holding Register Ready" "Not ready,Ready" textline " " bitfld.long 0x00 1. " RXRDY ,Receive Holding Register Ready" "Not ready,Ready" bitfld.long 0x00 0. " TXCOMP ,Transmission Completed" "Not completed,Completed" textline " " sif (cpu()!="AT91SAM7S321"&&cpu()!="AT91SAM7S512") bitfld.long 0x00 7. " UNRE ,Underrun Error" "No error,Error" bitfld.long 0x00 6. " OVRE ,Overrun Error" "No error,Error" endif group.long 0x2c++0x03 line.long 0x00 "TWI_IMR_Set/Clr,Interrupt Mask Register" setclrfld.long 0x00 8. -0x8 8. -0x4 8. " NACK ,Not Acknowledged" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " TXRDY ,Transmit Holding Register Ready" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " RXRDY ,Receive Holding Register Ready" "Disabled,Enabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " TXCOMP ,Transmission Completed" "Disabled,Enabled" textline " " sif (cpu()!="AT91SAM7S321"&&cpu()!="AT91SAM7S512") setclrfld.long 0x00 7. -0x8 7. -0x4 7. " UNRE ,Underrun Error" "Disabled,Enabled" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " OVRE ,Overrun Error" "Disabled,Enabled" endif width 0x9 rgroup.long 0x30++0x03 line.long 0x0 "TWI_RHR,Receive Holding Register" hexmask.long.byte 0x0 0.--7. 1. " RXDATA ,Master or Slave Receive Holding Data" group.long 0x34++0x03 line.long 0x00 "TWI_THR,Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " TXDATA ,Master or Slave Transmit Holding Data" width 0xb tree.end tree.open "Universal Synchronous Asynchronous Receiver Transmitter (USART)" sif (cpu()=="AT91SAM7S32") tree "USART0" base 0xFFFC0000 width 0x7 wgroup.long 0x00++0x03 line.long 0x00 "US_CR,Control Register" bitfld.long 0x00 19. " RTSDIS ,Request to Send Disable" "No effect,RTS=1" bitfld.long 0x00 18. " RTSEN ,Request to Send Enable" "No effect,RTS=0" textline " " bitfld.long 0x00 15. " RETTO ,Rearm Time-out" "No effect,Restarted" bitfld.long 0x00 14. " RSTNACK ,Reset Non Acknowledge" "No effect,Reset" textline " " bitfld.long 0x00 13. " RSTIT ,Reset Iterations" "No effect,Reset" bitfld.long 0x00 12. " SENDA ,Send Address" "No effect,Sent" textline " " bitfld.long 0x00 11. " STTTO ,Start Time-out" "No effect,Started" bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stopped" textline " " bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Started" bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset" textline " " bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled" bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled" textline " " bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled" bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled" textline " " bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset" bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset" sif (cpu()!="AT91SAM7S32") textline " " bitfld.long 0x00 17. " DTRDIS ,Data Terminal Ready Disable" "N o effect,DTR=1" bitfld.long 0x00 16. " DTREN ,Data Terminal Ready Enable" "No effect,DTR=0" endif width 0x7 if (data.long(ad:0xFFFC0000+0x04)&0x00000100)==0x00000100 group.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered" hexmask.long.byte 0x00 24.--26. 1. " MAX_ITERATION ,Maximum Number of Iterations" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,US_THR register" endif textline " " bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "Sent on ISO,Disabled" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" textline " " bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" textline " " bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" textline " " bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,Reserved,2,?..." textline " " bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop" bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK / DIV,Reserved,SCK" textline " " sif (cpu()=="AT91SAM7S32") bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Reserved,T = 0,Reserved,T = 1,Reserved,IrDA,?..." else bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,T = 0,Reserved,T = 1,Reserved,IrDA,?..." endif else group.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered" hexmask.long.byte 0x00 24.--26. 1. " MAX_ITERATION ,Maximum Number of Iterations" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,US_THR register" endif textline " " bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "Sent on ISO,Disabled" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" textline " " bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" textline " " bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" textline " " bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,1.5,2,?..." textline " " bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop" bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK / DIV,Reserved,SCK" textline " " sif (cpu()=="AT91SAM7S32") bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Reserved,T = 0,Reserved,T = 1,Reserved,IrDA,?..." else bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,T = 0,Reserved,T = 1,Reserved,IrDA,?..." endif endif width 16. textline " " group.long 0x10++0x03 line.long 0x00 "US_IMR_Set/Clr,Interrupt Enable/Mask Register" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") setclrfld.long 0x00 20. -0x8 20. -0x4 20. " MANE , Manchester Error Interrupt Enable" "Disabled,Enabled" textline " " endif setclrfld.long 0x00 19. -0x8 19. -0x4 19. " CTSIC ,Clear to Send Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 13. -0x8 13. -0x4 13. " NACK ,Non Acknowledge Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x8 12. -0x4 12. " RXBUFF ,Buffer Full Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x8 11. -0x4 11. " TXBUFE ,Buffer Empty Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. -0x8 10. -0x4 10. " ITERATION ,Iteration Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 9. -0x8 9. -0x4 9. " TXEMPTY ,TXEMPTY Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x8 8. -0x4 8. " TIMEOUT ,Time-out Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x8 7. -0x4 7. " PARE ,Parity Error Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. -0x8 6. -0x4 6. " FRAME ,Framing Error Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x8 5. -0x4 5. " OVRE ,Overrun Error Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x8 4. -0x4 4. " ENDTX ,End of Transmit Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x8 3. -0x4 3. " ENDRX ,End of Receive Transfer Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. -0x8 2. -0x4 2. " RXBRK ,Receiver Break Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x8 1. -0x4 1. " TXRDY ,TXRDY Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x8 0. -0x4 0. " RXRDY ,RXRDY Interrupt Mask" "Disabled,Enabled" sif (cpu()!="AT91SAM7S32") setclrfld.long 0x00 18. -0x8 18. -0x4 18. " DCDIC ,Data Carrier Detect Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x8 17. -0x4 17. " DSRIC ,Data Set Ready Input Change Mask" "Disabled,Enabled" setclrfld.long 0x00 16. -0x8 16. -0x4 16. " RIIC ,Ring Indicator Input Change Mask" "Disabled,Enabled" endif hgroup.long 0x14++0x03 hide.long 0x0 "US_CSR,Channel Status Register" in rgroup.long 0x18++0x03 line.long 0x00 "US_RHR,Receiver Holding Register" bitfld.long 0x00 15. " RXSYNH ,Received Sync" "Data,Command" hexmask.long.word 0x00 0.--8. 1. " RXCHR ,Received Character" wgroup.long 0x1c++0x03 line.long 0x00 "US_THR,Transmitter Holding Register" bitfld.long 0x00 15. " TXSYNH ,Sync Field to be transmitted" "Data,Command" hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to be Transmitted" group.long 0x20--0x2b line.long 0x00 "US_BRGR,Baud Rate Generator Register" hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider" sif (cpu()=="AT91SAM7S512"||cpu()=="AT91SAM7S256"||cpu()=="AT91SAM7S128"||cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") bitfld.long 0x00 16.--18. " FP ,Fractional Part" "Disabled,1 x 1/8,2 x 1/8,3 x 1/8,4 x 1/8,5 x 1/8,6 x 1/8,7 x 1/8" endif line.long 0x04 "US_RTOR,Receiver Time-out Register" hexmask.long.word 0x04 0.--15. 1. " TO ,Time-out Value" line.long 0x08 "US_TTGR,Transmitter Timeguard Register" hexmask.long.byte 0x08 0.--7. 1. " TG ,Timeguard Value" group.long 0x40++0x03 line.long 0x00 "US_FIDI,FI DI Ratio Register" hexmask.long.word 0x00 0.--10. 1. " FI_DI_RATIO ,FI Over DI Ratio Value" rgroup.long 0x44++0x03 line.long 0x00 "US_NER,Number of Errors Register" hexmask.long.byte 0x00 0.--7. 1. " NB_ERRORS ,Number of Errors" if ((data.long((ad:0xFFFC0000+0x04))&0x0000000F)==0x00000008) group.long 0x4c++0x03 line.long 0x00 "US_IF,IrDA Filter Register" hexmask.long.byte 0x00 0.--7. 1. " IRDA_FILTER ,IrDA Filter" endif sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") group.long 0x50++0x03 line.long 0x00 "US_MAN,USART Manchester Configuration Register" bitfld.long 0x00 30. " DRIFT , Drift Compensation" "Disabled,Enabled" bitfld.long 0x00 28. " RX_MPOL , Receiver Manchester Polarity" "0-to-1,1-to-0" bitfld.long 0x00 24.--25. " RX_PP , Receiver Preamble Pattern Detected" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO" textline " " bitfld.long 0x00 16.--19. " RX_PL , Receiver Preamble Length" "Disabled,1 Bit,2 Bit,3 Bit,4 Bit,5 Bit,6 Bit,7 Bit,8 Bit,9 Bit,10 Bit,11 Bit,12 Bit,13 Bit,14 Bit,15 Bit" bitfld.long 0x00 12. " TX_MPOL , Transmitter Manchester Polarity" "0-to-1,1-to-0" textline " " bitfld.long 0x00 8.--9. " TX_PP , Transmitter Preamble Pattern" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO" bitfld.long 0x00 0.--3. " TX_PL , Transmitter Preamble Length" "Disabled,1 Bit,2 Bit,3 Bit,4 Bit,5 Bit,6 Bit,7 Bit,8 Bit,9 Bit,10 Bit,11 Bit,12 Bit,13 Bit,14 Bit,15 Bit" endif tree "Peripheral DMA Registers" width 0xd group.long 0x100--0x11F line.long 0x00 "PERIPH_RPR,Receive Pointer Register" hexmask.long 0x00 0.--31. 1. " RXPTR ,Receive Pointer Address" line.long 0x04 "PERIPH_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "PERIPH_TPR,Transmit Pointer Register" hexmask.long 0x08 0.--31. 1. " TXPTR ,Transmit Pointer Address" line.long 0x0c "PERIPH_TCR,Transmit Counter Register" hexmask.long.word 0x0c 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "PERIPH_RNPR,Receive Next Pointer Register" hexmask.long 0x10 0.--31. 1. " RXNPTR ,Receive Next Pointer Address" line.long 0x14 "PERIPH_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "PERIPH_TNPR,Transmit Next Pointer Register" hexmask.long 0x18 0.--31. 1. " TXNPTR ,Transmit Next Pointer Address" line.long 0x1c "PERIPH_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "PERIPH_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disabled" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enabled" textline " " bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enabled" rgroup.long 0x124++0x03 line.long 0x00 "PERIPH_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0xb tree.end tree.end endif sif (cpu()=="AT91SAM7S321"||cpu()=="AT91SAM7S64"||cpu()=="AT91SAM7S128"||cpu()=="AT91SAM7S256"||cpu()=="AT91SAM7S512") tree.open "USART (Universal Synchronous Asynchronous Receiver Transmitter)" tree "USART0" base 0xFFFC0000 width 0x7 wgroup.long 0x00++0x03 line.long 0x00 "US_CR,Control Register" bitfld.long 0x00 19. " RTSDIS ,Request to Send Disable" "No effect,RTS=1" bitfld.long 0x00 18. " RTSEN ,Request to Send Enable" "No effect,RTS=0" textline " " bitfld.long 0x00 15. " RETTO ,Rearm Time-out" "No effect,Restarted" bitfld.long 0x00 14. " RSTNACK ,Reset Non Acknowledge" "No effect,Reset" textline " " bitfld.long 0x00 13. " RSTIT ,Reset Iterations" "No effect,Reset" bitfld.long 0x00 12. " SENDA ,Send Address" "No effect,Sent" textline " " bitfld.long 0x00 11. " STTTO ,Start Time-out" "No effect,Started" bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stopped" textline " " bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Started" bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset" textline " " bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled" bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled" textline " " bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled" bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled" textline " " bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset" bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset" sif (cpu()!="AT91SAM7S32") textline " " bitfld.long 0x00 17. " DTRDIS ,Data Terminal Ready Disable" "N o effect,DTR=1" bitfld.long 0x00 16. " DTREN ,Data Terminal Ready Enable" "No effect,DTR=0" endif width 0x7 if (data.long(ad:0xFFFC0000+0x04)&0x00000100)==0x00000100 group.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered" hexmask.long.byte 0x00 24.--26. 1. " MAX_ITERATION ,Maximum Number of Iterations" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,US_THR register" endif textline " " bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "Sent on ISO,Disabled" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" textline " " bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" textline " " bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" textline " " bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,Reserved,2,?..." textline " " bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop" bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK / DIV,Reserved,SCK" textline " " sif (cpu()=="AT91SAM7S32") bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Reserved,T = 0,Reserved,T = 1,Reserved,IrDA,?..." else bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,T = 0,Reserved,T = 1,Reserved,IrDA,?..." endif else group.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered" hexmask.long.byte 0x00 24.--26. 1. " MAX_ITERATION ,Maximum Number of Iterations" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,US_THR register" endif textline " " bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "Sent on ISO,Disabled" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" textline " " bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" textline " " bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" textline " " bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,1.5,2,?..." textline " " bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop" bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK / DIV,Reserved,SCK" textline " " sif (cpu()=="AT91SAM7S32") bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Reserved,T = 0,Reserved,T = 1,Reserved,IrDA,?..." else bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,T = 0,Reserved,T = 1,Reserved,IrDA,?..." endif endif width 16. textline " " group.long 0x10++0x03 line.long 0x00 "US_IMR_Set/Clr,Interrupt Enable/Mask Register" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") setclrfld.long 0x00 20. -0x8 20. -0x4 20. " MANE , Manchester Error Interrupt Enable" "Disabled,Enabled" textline " " endif setclrfld.long 0x00 19. -0x8 19. -0x4 19. " CTSIC ,Clear to Send Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 13. -0x8 13. -0x4 13. " NACK ,Non Acknowledge Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x8 12. -0x4 12. " RXBUFF ,Buffer Full Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x8 11. -0x4 11. " TXBUFE ,Buffer Empty Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. -0x8 10. -0x4 10. " ITERATION ,Iteration Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 9. -0x8 9. -0x4 9. " TXEMPTY ,TXEMPTY Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x8 8. -0x4 8. " TIMEOUT ,Time-out Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x8 7. -0x4 7. " PARE ,Parity Error Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. -0x8 6. -0x4 6. " FRAME ,Framing Error Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x8 5. -0x4 5. " OVRE ,Overrun Error Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x8 4. -0x4 4. " ENDTX ,End of Transmit Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x8 3. -0x4 3. " ENDRX ,End of Receive Transfer Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. -0x8 2. -0x4 2. " RXBRK ,Receiver Break Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x8 1. -0x4 1. " TXRDY ,TXRDY Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x8 0. -0x4 0. " RXRDY ,RXRDY Interrupt Mask" "Disabled,Enabled" sif (cpu()!="AT91SAM7S32") setclrfld.long 0x00 18. -0x8 18. -0x4 18. " DCDIC ,Data Carrier Detect Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x8 17. -0x4 17. " DSRIC ,Data Set Ready Input Change Mask" "Disabled,Enabled" setclrfld.long 0x00 16. -0x8 16. -0x4 16. " RIIC ,Ring Indicator Input Change Mask" "Disabled,Enabled" endif hgroup.long 0x14++0x03 hide.long 0x0 "US_CSR,Channel Status Register" in rgroup.long 0x18++0x03 line.long 0x00 "US_RHR,Receiver Holding Register" bitfld.long 0x00 15. " RXSYNH ,Received Sync" "Data,Command" hexmask.long.word 0x00 0.--8. 1. " RXCHR ,Received Character" wgroup.long 0x1c++0x03 line.long 0x00 "US_THR,Transmitter Holding Register" bitfld.long 0x00 15. " TXSYNH ,Sync Field to be transmitted" "Data,Command" hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to be Transmitted" group.long 0x20--0x2b line.long 0x00 "US_BRGR,Baud Rate Generator Register" hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider" sif (cpu()=="AT91SAM7S512"||cpu()=="AT91SAM7S256"||cpu()=="AT91SAM7S128"||cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") bitfld.long 0x00 16.--18. " FP ,Fractional Part" "Disabled,1 x 1/8,2 x 1/8,3 x 1/8,4 x 1/8,5 x 1/8,6 x 1/8,7 x 1/8" endif line.long 0x04 "US_RTOR,Receiver Time-out Register" hexmask.long.word 0x04 0.--15. 1. " TO ,Time-out Value" line.long 0x08 "US_TTGR,Transmitter Timeguard Register" hexmask.long.byte 0x08 0.--7. 1. " TG ,Timeguard Value" group.long 0x40++0x03 line.long 0x00 "US_FIDI,FI DI Ratio Register" hexmask.long.word 0x00 0.--10. 1. " FI_DI_RATIO ,FI Over DI Ratio Value" rgroup.long 0x44++0x03 line.long 0x00 "US_NER,Number of Errors Register" hexmask.long.byte 0x00 0.--7. 1. " NB_ERRORS ,Number of Errors" if ((data.long((ad:0xFFFC0000+0x04))&0x0000000F)==0x00000008) group.long 0x4c++0x03 line.long 0x00 "US_IF,IrDA Filter Register" hexmask.long.byte 0x00 0.--7. 1. " IRDA_FILTER ,IrDA Filter" endif sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") group.long 0x50++0x03 line.long 0x00 "US_MAN,USART Manchester Configuration Register" bitfld.long 0x00 30. " DRIFT , Drift Compensation" "Disabled,Enabled" bitfld.long 0x00 28. " RX_MPOL , Receiver Manchester Polarity" "0-to-1,1-to-0" bitfld.long 0x00 24.--25. " RX_PP , Receiver Preamble Pattern Detected" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO" textline " " bitfld.long 0x00 16.--19. " RX_PL , Receiver Preamble Length" "Disabled,1 Bit,2 Bit,3 Bit,4 Bit,5 Bit,6 Bit,7 Bit,8 Bit,9 Bit,10 Bit,11 Bit,12 Bit,13 Bit,14 Bit,15 Bit" bitfld.long 0x00 12. " TX_MPOL , Transmitter Manchester Polarity" "0-to-1,1-to-0" textline " " bitfld.long 0x00 8.--9. " TX_PP , Transmitter Preamble Pattern" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO" bitfld.long 0x00 0.--3. " TX_PL , Transmitter Preamble Length" "Disabled,1 Bit,2 Bit,3 Bit,4 Bit,5 Bit,6 Bit,7 Bit,8 Bit,9 Bit,10 Bit,11 Bit,12 Bit,13 Bit,14 Bit,15 Bit" endif tree "Peripheral DMA Registers" width 0xd group.long 0x100--0x11F line.long 0x00 "PERIPH_RPR,Receive Pointer Register" hexmask.long 0x00 0.--31. 1. " RXPTR ,Receive Pointer Address" line.long 0x04 "PERIPH_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "PERIPH_TPR,Transmit Pointer Register" hexmask.long 0x08 0.--31. 1. " TXPTR ,Transmit Pointer Address" line.long 0x0c "PERIPH_TCR,Transmit Counter Register" hexmask.long.word 0x0c 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "PERIPH_RNPR,Receive Next Pointer Register" hexmask.long 0x10 0.--31. 1. " RXNPTR ,Receive Next Pointer Address" line.long 0x14 "PERIPH_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "PERIPH_TNPR,Transmit Next Pointer Register" hexmask.long 0x18 0.--31. 1. " TXNPTR ,Transmit Next Pointer Address" line.long 0x1c "PERIPH_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "PERIPH_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disabled" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enabled" textline " " bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enabled" rgroup.long 0x124++0x03 line.long 0x00 "PERIPH_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0xb tree.end tree.end tree "USART1" base 0xFFFC4000 width 0x7 wgroup.long 0x00++0x03 line.long 0x00 "US_CR,Control Register" bitfld.long 0x00 19. " RTSDIS ,Request to Send Disable" "No effect,RTS=1" bitfld.long 0x00 18. " RTSEN ,Request to Send Enable" "No effect,RTS=0" textline " " bitfld.long 0x00 15. " RETTO ,Rearm Time-out" "No effect,Restarted" bitfld.long 0x00 14. " RSTNACK ,Reset Non Acknowledge" "No effect,Reset" textline " " bitfld.long 0x00 13. " RSTIT ,Reset Iterations" "No effect,Reset" bitfld.long 0x00 12. " SENDA ,Send Address" "No effect,Sent" textline " " bitfld.long 0x00 11. " STTTO ,Start Time-out" "No effect,Started" bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stopped" textline " " bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Started" bitfld.long 0x00 8. " RSTSTA ,Reset Status Bits" "No effect,Reset" textline " " bitfld.long 0x00 7. " TXDIS ,Transmitter Disable" "No effect,Disabled" bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enabled" textline " " bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disabled" bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enabled" textline " " bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset" bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset" sif (cpu()!="AT91SAM7S32") textline " " bitfld.long 0x00 17. " DTRDIS ,Data Terminal Ready Disable" "N o effect,DTR=1" bitfld.long 0x00 16. " DTREN ,Data Terminal Ready Enable" "No effect,DTR=0" endif width 0x7 if (data.long(ad:0xFFFC4000+0x04)&0x00000100)==0x00000100 group.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered" hexmask.long.byte 0x00 24.--26. 1. " MAX_ITERATION ,Maximum Number of Iterations" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,US_THR register" endif textline " " bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "Sent on ISO,Disabled" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" textline " " bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" textline " " bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" textline " " bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,Reserved,2,?..." textline " " bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop" bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK / DIV,Reserved,SCK" textline " " sif (cpu()=="AT91SAM7S32") bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Reserved,T = 0,Reserved,T = 1,Reserved,IrDA,?..." else bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,T = 0,Reserved,T = 1,Reserved,IrDA,?..." endif else group.long 0x04++0x03 line.long 0x00 "US_MR,Mode Register" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") bitfld.long 0x00 31. " ONEBIT , Start Frame Delimiter Selector" "DATA SYNC,One Bit" bitfld.long 0x00 30. " MODSYNC ,Manchester Synchronization Mode" "0 to 1,1 to 0" bitfld.long 0x00 29. " MAN ,Manchester Encoder/Decoder Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " FILTER ,Infrared Receive Line Filter" "Not filtered,Filtered" hexmask.long.byte 0x00 24.--26. 1. " MAX_ITERATION ,Maximum Number of Iterations" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") bitfld.long 0x00 22. " VAR_SYNC ,Variable Synchronization of Command/Data Sync" "User defined,US_THR register" endif textline " " bitfld.long 0x00 21. " DSNACK ,Disable Successive NACK" "Sent on ISO,Disabled" bitfld.long 0x00 20. " INACK ,Inhibit Non Acknowledge" "NACK,No NACK" textline " " bitfld.long 0x00 19. " OVER ,Oversampling Mode" "16x,8x" bitfld.long 0x00 18. " CKLO ,Clock Output Select" "No SCK,SCK" textline " " bitfld.long 0x00 17. " MODE9 ,9-bit Character Length" "Def by CHRL,9-bit" bitfld.long 0x00 16. " MSBF ,Bit Order" "LSB first,MSB first" textline " " bitfld.long 0x00 14.--15. " CHMODE ,Channel Mode" "Normal,Automatic Echo,Local Loopback,Remote Loopback" bitfld.long 0x00 12.--13. " NBSTOP ,Number of Stop Bits" "1,1.5,2,?..." textline " " bitfld.long 0x00 9.--11. " PAR ,Parity Type" "Even,Odd,Forced to 0,Forced to 1,No parity,No parity,Multidrop,Multidrop" bitfld.long 0x00 8. " SYNC ,Synchronous Mode Select" "Asynchronous,Synchronous" textline " " bitfld.long 0x00 6.--7. " CHRL ,Character Length" "5 bits,6 bits,7 bits,8 bits" bitfld.long 0x00 4.--5. " USCLKS ,Clock Selection" "MCK,MCK / DIV,Reserved,SCK" textline " " sif (cpu()=="AT91SAM7S32") bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Reserved,T = 0,Reserved,T = 1,Reserved,IrDA,?..." else bitfld.long 0x00 0.--3. " USART_MODE ,Mode of the USART" "Normal,RS485,Hardware Handshaking,Modem,T = 0,Reserved,T = 1,Reserved,IrDA,?..." endif endif width 16. textline " " group.long 0x10++0x03 line.long 0x00 "US_IMR_Set/Clr,Interrupt Enable/Mask Register" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") setclrfld.long 0x00 20. -0x8 20. -0x4 20. " MANE , Manchester Error Interrupt Enable" "Disabled,Enabled" textline " " endif setclrfld.long 0x00 19. -0x8 19. -0x4 19. " CTSIC ,Clear to Send Input Change Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 13. -0x8 13. -0x4 13. " NACK ,Non Acknowledge Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. -0x8 12. -0x4 12. " RXBUFF ,Buffer Full Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 11. -0x8 11. -0x4 11. " TXBUFE ,Buffer Empty Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. -0x8 10. -0x4 10. " ITERATION ,Iteration Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 9. -0x8 9. -0x4 9. " TXEMPTY ,TXEMPTY Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 8. -0x8 8. -0x4 8. " TIMEOUT ,Time-out Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 7. -0x8 7. -0x4 7. " PARE ,Parity Error Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. -0x8 6. -0x4 6. " FRAME ,Framing Error Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 5. -0x8 5. -0x4 5. " OVRE ,Overrun Error Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. -0x8 4. -0x4 4. " ENDTX ,End of Transmit Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 3. -0x8 3. -0x4 3. " ENDRX ,End of Receive Transfer Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. -0x8 2. -0x4 2. " RXBRK ,Receiver Break Interrupt Mask" "Disabled,Enabled" setclrfld.long 0x00 1. -0x8 1. -0x4 1. " TXRDY ,TXRDY Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. -0x8 0. -0x4 0. " RXRDY ,RXRDY Interrupt Mask" "Disabled,Enabled" sif (cpu()!="AT91SAM7S32") setclrfld.long 0x00 18. -0x8 18. -0x4 18. " DCDIC ,Data Carrier Detect Input Change Interrupt Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x8 17. -0x4 17. " DSRIC ,Data Set Ready Input Change Mask" "Disabled,Enabled" setclrfld.long 0x00 16. -0x8 16. -0x4 16. " RIIC ,Ring Indicator Input Change Mask" "Disabled,Enabled" endif hgroup.long 0x14++0x03 hide.long 0x0 "US_CSR,Channel Status Register" in rgroup.long 0x18++0x03 line.long 0x00 "US_RHR,Receiver Holding Register" bitfld.long 0x00 15. " RXSYNH ,Received Sync" "Data,Command" hexmask.long.word 0x00 0.--8. 1. " RXCHR ,Received Character" wgroup.long 0x1c++0x03 line.long 0x00 "US_THR,Transmitter Holding Register" bitfld.long 0x00 15. " TXSYNH ,Sync Field to be transmitted" "Data,Command" hexmask.long.word 0x00 0.--8. 1. " TXCHR ,Character to be Transmitted" group.long 0x20--0x2b line.long 0x00 "US_BRGR,Baud Rate Generator Register" hexmask.long.word 0x00 0.--15. 1. " CD ,Clock Divider" sif (cpu()=="AT91SAM7S512"||cpu()=="AT91SAM7S256"||cpu()=="AT91SAM7S128"||cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") bitfld.long 0x00 16.--18. " FP ,Fractional Part" "Disabled,1 x 1/8,2 x 1/8,3 x 1/8,4 x 1/8,5 x 1/8,6 x 1/8,7 x 1/8" endif line.long 0x04 "US_RTOR,Receiver Time-out Register" hexmask.long.word 0x04 0.--15. 1. " TO ,Time-out Value" line.long 0x08 "US_TTGR,Transmitter Timeguard Register" hexmask.long.byte 0x08 0.--7. 1. " TG ,Timeguard Value" group.long 0x40++0x03 line.long 0x00 "US_FIDI,FI DI Ratio Register" hexmask.long.word 0x00 0.--10. 1. " FI_DI_RATIO ,FI Over DI Ratio Value" rgroup.long 0x44++0x03 line.long 0x00 "US_NER,Number of Errors Register" hexmask.long.byte 0x00 0.--7. 1. " NB_ERRORS ,Number of Errors" if ((data.long((ad:0xFFFC4000+0x04))&0x0000000F)==0x00000008) group.long 0x4c++0x03 line.long 0x00 "US_IF,IrDA Filter Register" hexmask.long.byte 0x00 0.--7. 1. " IRDA_FILTER ,IrDA Filter" endif sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") group.long 0x50++0x03 line.long 0x00 "US_MAN,USART Manchester Configuration Register" bitfld.long 0x00 30. " DRIFT , Drift Compensation" "Disabled,Enabled" bitfld.long 0x00 28. " RX_MPOL , Receiver Manchester Polarity" "0-to-1,1-to-0" bitfld.long 0x00 24.--25. " RX_PP , Receiver Preamble Pattern Detected" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO" textline " " bitfld.long 0x00 16.--19. " RX_PL , Receiver Preamble Length" "Disabled,1 Bit,2 Bit,3 Bit,4 Bit,5 Bit,6 Bit,7 Bit,8 Bit,9 Bit,10 Bit,11 Bit,12 Bit,13 Bit,14 Bit,15 Bit" bitfld.long 0x00 12. " TX_MPOL , Transmitter Manchester Polarity" "0-to-1,1-to-0" textline " " bitfld.long 0x00 8.--9. " TX_PP , Transmitter Preamble Pattern" "ALL_ONE,ALL_ZERO,ZERO_ONE,ONE_ZERO" bitfld.long 0x00 0.--3. " TX_PL , Transmitter Preamble Length" "Disabled,1 Bit,2 Bit,3 Bit,4 Bit,5 Bit,6 Bit,7 Bit,8 Bit,9 Bit,10 Bit,11 Bit,12 Bit,13 Bit,14 Bit,15 Bit" endif tree "Peripheral DMA Registers" width 0xd group.long 0x100--0x11F line.long 0x00 "PERIPH_RPR,Receive Pointer Register" hexmask.long 0x00 0.--31. 1. " RXPTR ,Receive Pointer Address" line.long 0x04 "PERIPH_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "PERIPH_TPR,Transmit Pointer Register" hexmask.long 0x08 0.--31. 1. " TXPTR ,Transmit Pointer Address" line.long 0x0c "PERIPH_TCR,Transmit Counter Register" hexmask.long.word 0x0c 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "PERIPH_RNPR,Receive Next Pointer Register" hexmask.long 0x10 0.--31. 1. " RXNPTR ,Receive Next Pointer Address" line.long 0x14 "PERIPH_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "PERIPH_TNPR,Transmit Next Pointer Register" hexmask.long 0x18 0.--31. 1. " TXNPTR ,Transmit Next Pointer Address" line.long 0x1c "PERIPH_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "PERIPH_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disabled" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enabled" textline " " bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enabled" rgroup.long 0x124++0x03 line.long 0x00 "PERIPH_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0xb tree.end tree.end tree.end endif tree.end tree.open "Synchronous Serial Controller (SSC)" base 0xFFFD4000 width 0x9 wgroup.long 0x00++0x03 line.long 0x00 "SSC_CR,Control Register" bitfld.long 0x00 15. " SWRST ,Software Reset" "No effect,Reset" bitfld.long 0x00 9. " TXDIS ,Transmit Disable" "No effect,Disabled" textline " " bitfld.long 0x00 8. " TXEN ,Transmit Enable" "No effect,Enabled" bitfld.long 0x00 1. " RXDIS ,Receive Disable" "No effect,Disabled" textline " " bitfld.long 0x00 0. " RXEN ,Receive Enable" "No effect,Enabled" group.long 0x04++0x03 line.long 0x00 "SSC_CMR,Clock Mode Register" hexmask.long.word 0x00 0.--11. 1. " DIV ,Clock Divider" width 10. group.long 0x10--0x1F line.long 0x00 "SSC_RCMR,Receive Clock Mode Register" hexmask.long.byte 0x00 24.--31. 1. " PERIOD ,Receive Period Divider Selection" hexmask.long.byte 0x00 16.--23. 1. " STTDLY ,Receive Start Delay" textline " " bitfld.long 0x00 8.--11. " START ,Receive Start Selection" "Continuous,Transmit Start,Low level on RF,High level on RF,Falling edge on RF,Rising edge on RF,Any level change on RF,Any edge on RF,Compare 0,?..." bitfld.long 0x00 5. " CKI ,Receive Clock Inversion" "Falling,Rising" textline " " bitfld.long 0x00 0.--1. " CKS ,Receive Clock Selection" "Divided Clock,TK Clock Signal,RK Pin,?..." sif (cpu()=="AT91SAM7S321"||cpu()=="AT91SAM7SE32"||cpu()=="AT91SAM7SE256"||cpu()=="AT91SAM7SE512"||cpu()=="AT91SAM7S512"||cpu()=="AT91SAM7S256"||cpu()=="AT91SAM7S128"||cpu()=="AT91SAM7S64"||cpu()=="AT91SAM7S32") bitfld.long 0x00 2.--4. " CKO ,Receive Clock Output Mode Selection" "None,Continuous,Receive,?..." else bitfld.long 0x00 2.--4. " CKO ,Receive Clock Output Mode Selection" "None,Continuous,?..." endif textline " " sif (cpu()=="AT91SAM7S321"||cpu()=="AT91SAM7SE32"||cpu()=="AT91SAM7SE256"||cpu()=="AT91SAM7SE512"||cpu()=="AT91SAM7S512"||cpu()=="AT91SAM7S256"||cpu()=="AT91SAM7S128"||cpu()=="AT91SAM7S64"||cpu()=="AT91SAM7S32") bitfld.long 0x00 12. " STOP ,Receive Stop Selection" "Stopped,Operating" endif sif (cpu()=="AT91SAM7S321"||cpu()=="AT91SAM7SE32"||cpu()=="AT91SAM7SE256"||cpu()=="AT91SAM7SE512"||cpu()=="AT91SAM7S512"||cpu()=="AT91SAM7S256"||cpu()=="AT91SAM7S128"||cpu()=="AT91SAM7S64"||cpu()=="AT91SAM7S32") bitfld.long 0x00 6.--7. " CKG ,Receive Clock Gating Selection" "None,RF low,RF high,?..." endif line.long 0x04 "SSC_RFMR,Receive Frame Mode Register" bitfld.long 0x04 24. " FSEDGE ,Frame Sync Edge Detection" "Positive,Negative" bitfld.long 0x04 20.--22. " FSOS ,Receive Frame Sync Output Selection" "None,Negative,Positive,Driven Low,Driven High,Toggling,?..." textline " " hexmask.long.byte 0x04 16.--19. 1. " FSLEN ,Receive Frame Sync Length" hexmask.long.byte 0x04 8.--11. 1. " DATNB ,Data Number per Frame" textline " " bitfld.long 0x04 7. " MSBF ,Most Significant Bit First" "LSB first,MSB first" bitfld.long 0x04 5. " LOOP ,Loop Mode" "Normal,Loop" textline " " bitfld.long 0x04 0.--4. " DATLEN ,Data Length" "Forbidden,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,19 bits,20 bits,21 bits,22 bits,23 bits,24 bits,25 bits,26 bits,27 bits,28 bits,29 bits,30 bits,31 bits,32 bits" line.long 0x08 "SSC_TCMR,Transmit Clock Mode Register" hexmask.long.byte 0x08 24.--31. 1. " PERIOD ,Transmit Period Divider Selection" hexmask.long.byte 0x08 16.--23. 1. " STTDLY ,Transmit Start Delay" textline " " bitfld.long 0x08 8.--11. " START ,Transmit Start Selection" "Continuous,Receive Start,Low level on TF,High level on TF,Falling edge on TF,Rising edge on TF,Any level change on TF,Any edge on TF,?..." bitfld.long 0x08 5. " CKI ,Transmit Clock Inversion" "Falling,Rising" textline " " bitfld.long 0x08 0.--1. " CKS ,Transmit Clock Selection" "Divided Clock,RK Clock signal,TK Pin,?..." sif (cpu()=="AT91SAM7S321"||cpu()=="AT91SAM7SE32"||cpu()=="AT91SAM7SE256"||cpu()=="AT91SAM7SE512"||cpu()=="AT91SAM7S512"||cpu()=="AT91SAM7S256"||cpu()=="AT91SAM7S128"||cpu()=="AT91SAM7S64"||cpu()=="AT91SAM7S32") bitfld.long 0x08 2.--4. " CKO ,Transmit Clock Output Mode Selection" "None,Continuous,Transmit,?..." else bitfld.long 0x08 2.--4. " CKO ,Transmit Clock Output Mode Selection" "None,Continuous,?..." endif textline " " sif (cpu()=="AT91SAM7S321"||cpu()=="AT91SAM7SE32"||cpu()=="AT91SAM7SE256"||cpu()=="AT91SAM7SE512"||cpu()=="AT91SAM7S512"||cpu()=="AT91SAM7S256"||cpu()=="AT91SAM7S128"||cpu()=="AT91SAM7S64"||cpu()=="AT91SAM7S32") bitfld.long 0x08 6.--7. " CKG ,Transmit Clock Gating Selection" "None,TF low,TF high,?..." endif line.long 0x0c "SSC_TFMR,Transmit Frame Mode Register" bitfld.long 0x0c 24. " FSEDGE ,Frame Sync Edge Detection" "Positive,Negative" bitfld.long 0x0c 20.--22. " FSOS ,Transmit Frame Sync Output Selection" "None,Negative,Positive,Driven Low,Driven High,Toggling,?..." textline " " bitfld.long 0x0c 16.--19. " FSLEN ,Transmit Frame Sync Length" "1 word,2 words,3 words,4 words,5 words,6 words,7 words,8 words,9 words,10 words,11 words,12 words,13 words,14 words,15 words,16 words" bitfld.long 0x0c 8.--11. " DATNB ,Data Number per Frame" "1 period,2 periods,3 periods,4 periods,5 periods,6 periods,7 periods,8 periods,9 periods,10 periods,11 periods,12 periods,13 periods,14 periods,15 periods,16 periods" textline " " bitfld.long 0x0c 7. " MSBF ,Most Significant Bit First" "LSB first,MSB first" bitfld.long 0x0c 5. " DATDEF ,Data Default Value" "Low,High" textline " " bitfld.long 0x0c 0.--4. " DATLEN ,Data Length" "Forbidden,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,19 bits,20 bits,21 bits,22 bits,23 bits,24 bits,25 bits,26 bits,27 bits,28 bits,29 bits,30 bits,31 bits,32 bits" sif (cpu()!="AT91SAM7SE32"||cpu()!="AT91SAM7SE256"||cpu()!="AT91SAM7SE256") bitfld.long 0x0c 23. " FSDEN ,Frame Sync Data Enable" "TD default,SSC_TSHR shifted out" endif rgroup.long 0x20++0x03 line.long 0x00 "SSC_RHR,Receive Holding Register" ;hexfld.long 0x00 " RDAT ,Receive Data" wgroup.long 0x24++0x03 line.long 0x00 "SSC_THR,Transmit Holding Register" ;hexfld.long 0x00 " TDAT ,Transmit Data" rgroup.long 0x30++0x03 line.long 0x00 "SSC_RSHR,Receive Sync Holding Register" hexmask.long.word 0x00 0.--15. 1. " RSDAT ,Receive Synchronization Data" group.long 0x34++0x03 line.long 0x00 "SSC_TSHR,Transmit Sync Holding Register" hexmask.long.word 0x00 0.--15. 1. " TSDAT ,Transmit Synchronization Data" sif (cpu()=="AT91SAM7S321"||cpu()=="AT91SAM7SE32"||cpu()=="AT91SAM7SE256"||cpu()=="AT91SAM7SE512"||cpu()=="AT91SAM7S512"||cpu()=="AT91SAM7S256"||cpu()=="AT91SAM7S128"||cpu()=="AT91SAM7S64"||cpu()=="AT91SAM7S32") group.long 0x38++7 line.long 0x0 "SSC_RC0R,Receive Compare 0 Register" hexmask.long.word 0x0 0.--15. 1. " CP0 ,Receive Compare 0 Register" line.long 0x4 "SSC_RC1R,Receive Compare 1 Register" hexmask.long.word 0x4 0.--15. 1. " CP1 ,Receive Compare 1 Register" endif width 8. rgroup.long 0x40++0x03 line.long 0x00 "SSC_SR,Status Register" bitfld.long 0x00 17. " RXEN ,Receive Enable" "Disabled,Enabled" bitfld.long 0x00 16. " TXEN ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RXSYN ,Receive Sync" "Not occurred,Occurred" bitfld.long 0x00 10. " TXSYN ,Transmit Sync" "Not occurred,Occurred" textline " " bitfld.long 0x00 7. " RXBUFF ,Receive Buffer Full" "RCR/RNCR!=0,RCR&RNCR=0" bitfld.long 0x00 6. " ENDRX ,End of Reception" "Not ended,Ended" textline " " bitfld.long 0x00 5. " OVRUN ,Receive Overrun" "No overrun,Overrun" bitfld.long 0x00 4. " RXRDY ,Receive Ready" "RHR empty,RHR has data" textline " " bitfld.long 0x00 3. " TXBUFE ,Transmit Buffer Empty" "TCR /TNCR!=0,TCR &TNCR=0" bitfld.long 0x00 2. " ENDTX ,End of Transmission" "Not ended,Ended" textline " " bitfld.long 0x00 1. " TXEMPTY ,Transmit Empty" "Not empty,Empty" bitfld.long 0x00 0. " TXRDY ,Transmit Ready" "Ready,Not ready" textline " " sif (cpu()=="AT91SAM7S321"||cpu()=="AT91SAM7SE32"||cpu()=="AT91SAM7SE256"||cpu()=="AT91SAM7SE512"||cpu()=="AT91SAM7S512"||cpu()=="AT91SAM7S256"||cpu()=="AT91SAM7S128"||cpu()=="AT91SAM7S64"||cpu()=="AT91SAM7S32") bitfld.long 0x00 9. " CP1 ,Compare 1" "Not occurred,Occurred" bitfld.long 0x00 8. " CP0 ,Compare 0" "Not occurred,Occurred" endif width 17. group.long 0x4c++0x03 line.long 0x00 "SSC_IMR_Set/Clr,Interrupt Enable/Mask Register" setclrfld.long 0x00 11. -0x8 11. -0x4 11. " RXSYN ,Receive Sync" "Disabled,Enabled" setclrfld.long 0x00 10. -0x8 10. -0x4 10. " TXSYN ,Transmit Sync" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. -0x8 7. -0x4 7. " RXBUFF ,Receive Buffer Full" "Disabled,Enabled" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " ENDRX ,End of Reception" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. -0x8 5. -0x4 5. " OVRUN ,Receive Overrun" "Disabled,Enabled" setclrfld.long 0x00 4. -0x8 4. -0x4 4. " RXRDY ,Receive Ready" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x8 3. -0x4 3. " TXBUFE ,Transmit Buffer Empty" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " ENDTX ,End of Transmission" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " TXEMPTY ,Transmit Empty" "Disabled,Enabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " TXRDY ,Transmit Ready" "Disabled,Enabled" textline " " sif (cpu()=="AT91SAM7S321"||cpu()=="AT91SAM7SE32"||cpu()=="AT91SAM7SE256"||cpu()=="AT91SAM7SE512"||cpu()=="AT91SAM7S512"||cpu()=="AT91SAM7S256"||cpu()=="AT91SAM7S128"||cpu()=="AT91SAM7S64"||cpu()=="AT91SAM7S32") setclrfld.long 0x00 9. -0x8 9. -0x4 9. " CP1 , Compare 1 Interrupt" "Disabled,Enabled" setclrfld.long 0x00 8. -0x8 8. -0x4 8. " CP0 , Compare 0 Interrupt" "Disabled,Enabled" endif width 0xb tree "Peripheral DMA Registers" width 0xd group.long 0x100--0x11F line.long 0x00 "PERIPH_RPR,Receive Pointer Register" hexmask.long 0x00 0.--31. 1. " RXPTR ,Receive Pointer Address" line.long 0x04 "PERIPH_RCR,Receive Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXCTR ,Receive Counter Value" line.long 0x08 "PERIPH_TPR,Transmit Pointer Register" hexmask.long 0x08 0.--31. 1. " TXPTR ,Transmit Pointer Address" line.long 0x0c "PERIPH_TCR,Transmit Counter Register" hexmask.long.word 0x0c 0.--15. 1. " TXCTR ,Transmit Counter Value" line.long 0x10 "PERIPH_RNPR,Receive Next Pointer Register" hexmask.long 0x10 0.--31. 1. " RXNPTR ,Receive Next Pointer Address" line.long 0x14 "PERIPH_RNCR,Receive Next Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXNCR ,Receive Next Counter Value" line.long 0x18 "PERIPH_TNPR,Transmit Next Pointer Register" hexmask.long 0x18 0.--31. 1. " TXNPTR ,Transmit Next Pointer Address" line.long 0x1c "PERIPH_TNCR,Transmit Next Counter Register" hexmask.long.word 0x1C 0.--15. 1. " TXNCR ,Transmit Next Counter Value" wgroup.long 0x120++0x03 line.long 0x00 "PERIPH_PTCR,PDC Transfer Control Register" bitfld.long 0x00 9. " TXTDIS ,Transmitter Transfer Disable" "No effect,Disabled" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "No effect,Enabled" textline " " bitfld.long 0x00 1. " RXTDIS ,Receiver Transfer Disable" "No effect,Disabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "No effect,Enabled" rgroup.long 0x124++0x03 line.long 0x00 "PERIPH_PTSR,PDC Transfer Status Register" bitfld.long 0x00 8. " TXTEN ,Transmitter Transfer Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RXTEN ,Receiver Transfer Enable" "Disabled,Enabled" width 0xb tree.end tree.end tree.open "Timer/Counter (TC)" tree "TC0" base 0xFFFA0000 width 0x10 wgroup.long 0x00++0x03 line.long 0x00 "TC_CCR,Channel Control Register" bitfld.long 0x00 2. " SWTRG ,Software Trigger Command" "No effect,Triggered" bitfld.long 0x00 1. " CLKDIS ,Counter Clock Disable Command" "No effect,Disabled" textline " " bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable Command" "No effect,Enabled" if (data.long(ad:0xFFFA0000+0x04)&0x00008000)==0x00000000 group.long 0x04++0x03 line.long 0x00 "TC_CMR,Channel Mode Register (Capture Mode)" bitfld.long 0x00 18.--19. " LDRB ,RB Loading Selection" "None,Rising,Falling,Any" bitfld.long 0x00 16.--17. " LDRA ,RA Loading Selection" "None,Rising,Falling,Any" textline " " textline " " textline " " textline " " bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform" bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled" textline " " bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB External Trigger Selection" "TIOB,TIOA" bitfld.long 0x00 8.--9. " ETRGEDG ,External Trigger Edge Selection" "None,Rising,Falling,Any" textline " " bitfld.long 0x00 7. " LDBDIS ,Counter Clock Disable with RB Loading" "Not disabled,Disabled" bitfld.long 0x00 6. " LDBSTOP ,Counter Clock Stopped with RB Loading" "Not stopped,Stopped" textline " " bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed" bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising,Falling" textline " " bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" else group.long 0x04++0x03 line.long 0x00 "TC_CMR,Channel Mode Register (Waveform Mode)" bitfld.long 0x00 30.--31. " BSWTRG ,Software Trigger Effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 28.--29. " BEEVT ,External Event Effect on TIOB" "None,Set,Clear,Toggle" textline " " bitfld.long 0x00 26.--27. " BCPC ,RC Compare Effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 24.--25. " BCPB ,RB Compare Effect on TIOB" "None,Set,Clear,Toggle" textline " " bitfld.long 0x00 22.--23. " ASWTRG ,Software Trigger Effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 20.--21. " AEEVT ,External Event Effect on TIOA" "None,Set,Clear,Toggle" textline " " bitfld.long 0x00 18.--19. " ACPC ,RC Compare Effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 16.--17. " ACPA ,RA Compare Effect on TIOA" "None,Set,Cleared,Toggle" textline " " bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform" bitfld.long 0x00 13.--14. " WAVSEL ,Waveform Selection" "UP w/o auto TRG,UP with auto TRG,UPDOWN w/o auto TRG,UPDOWN with auto TRG" textline " " bitfld.long 0x00 12. " ENETRG ,External Event Trigger Enable" "No effect,Enabled" bitfld.long 0x00 10.--11. " EEVT ,External Event Selection" "TIOB,XC0,XC1,XC2" textline " " bitfld.long 0x00 8.--9. " EEVTEDG ,External Event Edge Selection" "None,Rising,Falling,Any" bitfld.long 0x00 7. " CPCDIS ,Counter Clock Disable with RC Compare" "Not disabled,Disabled" textline " " bitfld.long 0x00 6. " CPCSTOP ,Counter Clock Stopped with RC Compare" "Not stopped,Stopped" bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed" textline " " bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising,Falling" bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" endif rgroup.long 0x10++0x03 line.long 0x00 "TC_CV,Counter Value Register" hexmask.long.word 0x00 0.--15. 1. " CV ,Counter Value" if (data.long(ad:0xFFFA0000+0x04)&0x00008000)==0x00000000 rgroup.long 0x14++0x07 line.long 0x00 "TC_RA,Register A" hexmask.long.word 0x00 0.--15. 1. " RA ,Register A" line.long 0x04 "TC_RB,Register B" hexmask.long.word 0x04 0.--15. 1. " RB ,Register B" else group.long 0x14++0x07 line.long 0x00 "TC_RA,Register A" hexmask.long.word 0x00 0.--15. 1. " RA ,Register A" line.long 0x04 "TC_RB,Register B" hexmask.long.word 0x04 0.--15. 1. " RB ,Register B" endif group.long 0x1c++0x03 line.long 0x00 "TC_RC,Register C" hexmask.long.word 0x00 0.--15. 1. " RC ,Register C" hgroup.long 0x20++0x03 hide.long 0x00 "TC_SR,Status Register" in group.long 0x2c++0x03 line.long 0x00 "TC_IMR_Set/Clr,Interrupt Enable/Mask Register" setclrfld.long 0x00 7. -0x8 7. -0x4 7. " ETRGS ,External Trigger" "Disabled,Enabled" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " LDRBS ,RB Loading" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. -0x8 5. -0x4 5. " LDRAS ,RA Loading" "Disabled,Enabled" setclrfld.long 0x00 4. -0x8 4. -0x4 4. " CPCS ,RC Compare" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x8 3. -0x4 3. " CPBS ,RB Compare" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " CPAS ,RA Compare" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " LOVRS ,Load Overrun" "Disabled,Enabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " COVFS ,Counter Overflow" "Disabled,Enabled" tree.end tree "TC1" base 0xFFFA0040 width 0x10 wgroup.long 0x00++0x03 line.long 0x00 "TC_CCR,Channel Control Register" bitfld.long 0x00 2. " SWTRG ,Software Trigger Command" "No effect,Triggered" bitfld.long 0x00 1. " CLKDIS ,Counter Clock Disable Command" "No effect,Disabled" textline " " bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable Command" "No effect,Enabled" if (data.long(ad:0xFFFA0040+0x04)&0x00008000)==0x00000000 group.long 0x04++0x03 line.long 0x00 "TC_CMR,Channel Mode Register (Capture Mode)" bitfld.long 0x00 18.--19. " LDRB ,RB Loading Selection" "None,Rising,Falling,Any" bitfld.long 0x00 16.--17. " LDRA ,RA Loading Selection" "None,Rising,Falling,Any" textline " " textline " " textline " " textline " " bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform" bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled" textline " " bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB External Trigger Selection" "TIOB,TIOA" bitfld.long 0x00 8.--9. " ETRGEDG ,External Trigger Edge Selection" "None,Rising,Falling,Any" textline " " bitfld.long 0x00 7. " LDBDIS ,Counter Clock Disable with RB Loading" "Not disabled,Disabled" bitfld.long 0x00 6. " LDBSTOP ,Counter Clock Stopped with RB Loading" "Not stopped,Stopped" textline " " bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed" bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising,Falling" textline " " bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" else group.long 0x04++0x03 line.long 0x00 "TC_CMR,Channel Mode Register (Waveform Mode)" bitfld.long 0x00 30.--31. " BSWTRG ,Software Trigger Effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 28.--29. " BEEVT ,External Event Effect on TIOB" "None,Set,Clear,Toggle" textline " " bitfld.long 0x00 26.--27. " BCPC ,RC Compare Effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 24.--25. " BCPB ,RB Compare Effect on TIOB" "None,Set,Clear,Toggle" textline " " bitfld.long 0x00 22.--23. " ASWTRG ,Software Trigger Effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 20.--21. " AEEVT ,External Event Effect on TIOA" "None,Set,Clear,Toggle" textline " " bitfld.long 0x00 18.--19. " ACPC ,RC Compare Effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 16.--17. " ACPA ,RA Compare Effect on TIOA" "None,Set,Cleared,Toggle" textline " " bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform" bitfld.long 0x00 13.--14. " WAVSEL ,Waveform Selection" "UP w/o auto TRG,UP with auto TRG,UPDOWN w/o auto TRG,UPDOWN with auto TRG" textline " " bitfld.long 0x00 12. " ENETRG ,External Event Trigger Enable" "No effect,Enabled" bitfld.long 0x00 10.--11. " EEVT ,External Event Selection" "TIOB,XC0,XC1,XC2" textline " " bitfld.long 0x00 8.--9. " EEVTEDG ,External Event Edge Selection" "None,Rising,Falling,Any" bitfld.long 0x00 7. " CPCDIS ,Counter Clock Disable with RC Compare" "Not disabled,Disabled" textline " " bitfld.long 0x00 6. " CPCSTOP ,Counter Clock Stopped with RC Compare" "Not stopped,Stopped" bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed" textline " " bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising,Falling" bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" endif rgroup.long 0x10++0x03 line.long 0x00 "TC_CV,Counter Value Register" hexmask.long.word 0x00 0.--15. 1. " CV ,Counter Value" if (data.long(ad:0xFFFA0040+0x04)&0x00008000)==0x00000000 rgroup.long 0x14++0x07 line.long 0x00 "TC_RA,Register A" hexmask.long.word 0x00 0.--15. 1. " RA ,Register A" line.long 0x04 "TC_RB,Register B" hexmask.long.word 0x04 0.--15. 1. " RB ,Register B" else group.long 0x14++0x07 line.long 0x00 "TC_RA,Register A" hexmask.long.word 0x00 0.--15. 1. " RA ,Register A" line.long 0x04 "TC_RB,Register B" hexmask.long.word 0x04 0.--15. 1. " RB ,Register B" endif group.long 0x1c++0x03 line.long 0x00 "TC_RC,Register C" hexmask.long.word 0x00 0.--15. 1. " RC ,Register C" hgroup.long 0x20++0x03 hide.long 0x00 "TC_SR,Status Register" in group.long 0x2c++0x03 line.long 0x00 "TC_IMR_Set/Clr,Interrupt Enable/Mask Register" setclrfld.long 0x00 7. -0x8 7. -0x4 7. " ETRGS ,External Trigger" "Disabled,Enabled" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " LDRBS ,RB Loading" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. -0x8 5. -0x4 5. " LDRAS ,RA Loading" "Disabled,Enabled" setclrfld.long 0x00 4. -0x8 4. -0x4 4. " CPCS ,RC Compare" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x8 3. -0x4 3. " CPBS ,RB Compare" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " CPAS ,RA Compare" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " LOVRS ,Load Overrun" "Disabled,Enabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " COVFS ,Counter Overflow" "Disabled,Enabled" tree.end tree "TC2" base 0xFFFA0080 width 0x10 wgroup.long 0x00++0x03 line.long 0x00 "TC_CCR,Channel Control Register" bitfld.long 0x00 2. " SWTRG ,Software Trigger Command" "No effect,Triggered" bitfld.long 0x00 1. " CLKDIS ,Counter Clock Disable Command" "No effect,Disabled" textline " " bitfld.long 0x00 0. " CLKEN ,Counter Clock Enable Command" "No effect,Enabled" if (data.long(ad:0xFFFA0080+0x04)&0x00008000)==0x00000000 group.long 0x04++0x03 line.long 0x00 "TC_CMR,Channel Mode Register (Capture Mode)" bitfld.long 0x00 18.--19. " LDRB ,RB Loading Selection" "None,Rising,Falling,Any" bitfld.long 0x00 16.--17. " LDRA ,RA Loading Selection" "None,Rising,Falling,Any" textline " " textline " " textline " " textline " " bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform" bitfld.long 0x00 14. " CPCTRG ,RC Compare Trigger Enable" "No effect,Enabled" textline " " bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB External Trigger Selection" "TIOB,TIOA" bitfld.long 0x00 8.--9. " ETRGEDG ,External Trigger Edge Selection" "None,Rising,Falling,Any" textline " " bitfld.long 0x00 7. " LDBDIS ,Counter Clock Disable with RB Loading" "Not disabled,Disabled" bitfld.long 0x00 6. " LDBSTOP ,Counter Clock Stopped with RB Loading" "Not stopped,Stopped" textline " " bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed" bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising,Falling" textline " " bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" else group.long 0x04++0x03 line.long 0x00 "TC_CMR,Channel Mode Register (Waveform Mode)" bitfld.long 0x00 30.--31. " BSWTRG ,Software Trigger Effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 28.--29. " BEEVT ,External Event Effect on TIOB" "None,Set,Clear,Toggle" textline " " bitfld.long 0x00 26.--27. " BCPC ,RC Compare Effect on TIOB" "None,Set,Clear,Toggle" bitfld.long 0x00 24.--25. " BCPB ,RB Compare Effect on TIOB" "None,Set,Clear,Toggle" textline " " bitfld.long 0x00 22.--23. " ASWTRG ,Software Trigger Effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 20.--21. " AEEVT ,External Event Effect on TIOA" "None,Set,Clear,Toggle" textline " " bitfld.long 0x00 18.--19. " ACPC ,RC Compare Effect on TIOA" "None,Set,Clear,Toggle" bitfld.long 0x00 16.--17. " ACPA ,RA Compare Effect on TIOA" "None,Set,Cleared,Toggle" textline " " bitfld.long 0x00 15. " WAVE ,Capture/Waveform Mode" "Capture,Waveform" bitfld.long 0x00 13.--14. " WAVSEL ,Waveform Selection" "UP w/o auto TRG,UP with auto TRG,UPDOWN w/o auto TRG,UPDOWN with auto TRG" textline " " bitfld.long 0x00 12. " ENETRG ,External Event Trigger Enable" "No effect,Enabled" bitfld.long 0x00 10.--11. " EEVT ,External Event Selection" "TIOB,XC0,XC1,XC2" textline " " bitfld.long 0x00 8.--9. " EEVTEDG ,External Event Edge Selection" "None,Rising,Falling,Any" bitfld.long 0x00 7. " CPCDIS ,Counter Clock Disable with RC Compare" "Not disabled,Disabled" textline " " bitfld.long 0x00 6. " CPCSTOP ,Counter Clock Stopped with RC Compare" "Not stopped,Stopped" bitfld.long 0x00 4.--5. " BURST ,Burst Signal Selection" "Not gated,XC0 ANDed,XC1 ANDed,XC2 ANDed" textline " " bitfld.long 0x00 3. " CLKI ,Clock Invert" "Rising,Falling" bitfld.long 0x00 0.--2. " TCCLKS ,Clock Selection" "TIMER_CLOCK1,TIMER_CLOCK2,TIMER_CLOCK3,TIMER_CLOCK4,TIMER_CLOCK5,XC0,XC1,XC2" endif rgroup.long 0x10++0x03 line.long 0x00 "TC_CV,Counter Value Register" hexmask.long.word 0x00 0.--15. 1. " CV ,Counter Value" if (data.long(ad:0xFFFA0080+0x04)&0x00008000)==0x00000000 rgroup.long 0x14++0x07 line.long 0x00 "TC_RA,Register A" hexmask.long.word 0x00 0.--15. 1. " RA ,Register A" line.long 0x04 "TC_RB,Register B" hexmask.long.word 0x04 0.--15. 1. " RB ,Register B" else group.long 0x14++0x07 line.long 0x00 "TC_RA,Register A" hexmask.long.word 0x00 0.--15. 1. " RA ,Register A" line.long 0x04 "TC_RB,Register B" hexmask.long.word 0x04 0.--15. 1. " RB ,Register B" endif group.long 0x1c++0x03 line.long 0x00 "TC_RC,Register C" hexmask.long.word 0x00 0.--15. 1. " RC ,Register C" hgroup.long 0x20++0x03 hide.long 0x00 "TC_SR,Status Register" in group.long 0x2c++0x03 line.long 0x00 "TC_IMR_Set/Clr,Interrupt Enable/Mask Register" setclrfld.long 0x00 7. -0x8 7. -0x4 7. " ETRGS ,External Trigger" "Disabled,Enabled" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " LDRBS ,RB Loading" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. -0x8 5. -0x4 5. " LDRAS ,RA Loading" "Disabled,Enabled" setclrfld.long 0x00 4. -0x8 4. -0x4 4. " CPCS ,RC Compare" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x8 3. -0x4 3. " CPBS ,RB Compare" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " CPAS ,RA Compare" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " LOVRS ,Load Overrun" "Disabled,Enabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " COVFS ,Counter Overflow" "Disabled,Enabled" tree.end tree "Block Registers" base 0xFFFA00C0 wgroup.long 0x00++0x03 line.long 0x00 "TC_BCR,TC Block Control Register" bitfld.long 0x00 0. " SYNC ,Synchro Command" "No effect,SYNC" group.long 0x04++0x03 line.long 0x00 "TC_BMR,TC Block Mode Register" bitfld.long 0x00 4.--5. " TC2XC2S ,External Clock Signal 2 Selection" "TCLK2,None,TIOA0,TIOA1" bitfld.long 0x00 2.--3. " TC1XC1S ,External Clock Signal 1 Selection" "TCLK1,None,TIOA0,TIOA2" textline " " bitfld.long 0x00 0.--1. " TC0XC0S ,External Clock Signal 0 Selection" "TCLK0,None,TIOA1,TIOA2" tree.end tree.end tree "Pulse Width Modulation Controller (PWM)" base 0xFFFCC000 width 0x11 group.long 0x00++0x03 line.long 0x00 "PWM_MR,PWM Mode Register" bitfld.long 0x00 24.--27. " PREB ,Divider Input Clock" "MCK,MCK/2,MCK/4,MCK/8,MCK/16,MCK/32,MCK/64,MCK/128,MCK/256,MCK/512,MCK/1024,?..." hexmask.long.byte 0x00 16.--23. 1. " DIVB ,CLKB Divide Factor" textline " " bitfld.long 0x00 8.--11. " PREA ,Divider Input Clock" "MCK,MCK/2,MCK/4,MCK/8,MCK/16,MCK/32,MCK/64,MCK/128,MCK/256,MCK/512,MCK/1024,?..." hexmask.long.byte 0x00 0.--7. 1. " DIVA ,CLKA Divide Factor" group.long 0x0c++0x03 line.long 0x00 "PWM_SR_Set/Clr,PWM Disable/Enable and Status Register" setclrfld.long 0x00 3. -0x8 3. -0x4 3. " CHID3 ,Channel ID Disable/Enable and Status" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " CHID2 ,Channel ID Disable/Enable and Status" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " CHID1 ,Channel ID Disable/Enable and Status" "Disabled,Enabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " CHID0 ,Channel ID Disable/Enable and Status" "Disabled,Enabled" group.long 0x18++0x03 line.long 0x00 "PWM_IMR_Set/Clr,PWM Interrupt Enable/Mask Register" setclrfld.long 0x00 3. -0x8 3. -0x4 3. " CHID3 ,Channel ID" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " CHID2 ,Channel ID" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " CHID1 ,Channel ID" "Disabled,Enabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " CHID0 ,Channel ID" "Disabled,Enabled" hgroup.long 0x1c++0x03 hide.long 0x0 "PWM_ISR,PWM Interrupt Status Register" in group.long 0x200--0x20b "Channel 0" line.long 0x00 "PWM_CMR0,Channel 0 Mode Register" bitfld.long 0x00 10. " CPD ,Channel Update Period" "Duty cycle,Period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "MCK,MCK/2,MCK/4,MCK/8,MCK/16,MCK/32,MCK/64,MCK/128,MCK/256,MCK/512,MCK/1024,CLKA,CLKB,?..." line.long 0x04 "PWM_CDTY0,Channel 0 Duty Cycle Register" line.long 0x08 "PWM_CPRD0,Channel 0 Period Register" rgroup.long 0x20c++0x03 line.long 0x00 "PWM_CCNT0,Channel 0 Counter Register" hexmask.long 0x00 0.--31. 1. " CNT ,Channel Counter" wgroup.long 0x210++0x03 line.long 0x00 "PWM_CUPD0,Channel 0 Update Register" hexmask.long.word 0x0 0.--15. 1. " CUPD ,Channel Update" group.long 0x220--0x22b "Channel 1" line.long 0x00 "PWM_CMR1,Channel 1 Mode Register" bitfld.long 0x00 10. " CPD ,Channel Update Period" "Duty cycle,Period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "MCK,MCK/2,MCK/4,MCK/8,MCK/16,MCK/32,MCK/64,MCK/128,MCK/256,MCK/512,MCK/1024,CLKA,CLKB,?..." line.long 0x04 "PWM_CDTY1,Channel 1 Duty Cycle Register" line.long 0x08 "PWM_CPRD1,Channel 1 Period Register" rgroup.long 0x22c++0x03 line.long 0x00 "PWM_CCNT1,Channel 1 Counter Register" hexmask.long 0x00 0.--31. 1. " CNT ,Channel Counter" wgroup.long 0x230++0x03 line.long 0x00 "PWM_CUPD1,Channel 1 Update Register" hexmask.long.word 0x0 0.--15. 1. " CUPD ,Channel Update" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") group.long 0x240++0xb "Channel 2" line.long 0x00 "PWM_CMR2,Channel 2 Mode Register" bitfld.long 0x00 10. " CPD ,Channel Update Period" "Duty cycle,Period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "MCK,MCK/2,MCK/4,MCK/8,MCK/16,MCK/32,MCK/64,MCK/128,MCK/256,MCK/512,MCK/1024,CLKA,CLKB,?..." line.long 0x04 "PWM_CDTY2,Channel 2 Duty Cycle Register" line.long 0x08 "PWM_CPRD2,Channel 2 Period Register" rgroup.long 0x24c++0x03 line.long 0x00 "PWM_CCNT2,Channel 2 Counter Register" hexmask.long 0x00 0.--31. 1. " CNT ,Channel Counter" wgroup.long 0x250++0x03 line.long 0x00 "PWM_CUPD2,Channel 2 Update Register" hexmask.long.word 0x0 0.--15. 1. " CUPD ,Channel Update" group.long 0x260++0xb "Channel 3" line.long 0x00 "PWM_CMR3,Channel 3 Mode Register" bitfld.long 0x00 10. " CPD ,Channel Update Period" "Duty cycle,Period" bitfld.long 0x00 9. " CPOL ,Channel Polarity" "Low level,High level" textline " " bitfld.long 0x00 8. " CALG ,Channel Alignment" "Left,Center" bitfld.long 0x00 0.--3. " CPRE ,Channel Pre-scaler" "MCK,MCK/2,MCK/4,MCK/8,MCK/16,MCK/32,MCK/64,MCK/128,MCK/256,MCK/512,MCK/1024,CLKA,CLKB,?..." line.long 0x04 "PWM_CDTY3,Channel 3 Duty Cycle Register" line.long 0x08 "PWM_CPRD3,Channel 3 Period Register" rgroup.long 0x26c++0x03 line.long 0x00 "PWM_CCNT3,Channel 3 Counter Register" hexmask.long 0x00 0.--31. 1. " CNT ,Channel Counter" wgroup.long 0x270++0x03 line.long 0x00 "PWM_CUPD3,Channel 3 Update Register" hexmask.long.word 0x0 0.--15. 1. " CUPD ,Channel Update" endif tree.end sif (cpu()=="AT91SAM7S321"||cpu()=="AT91SAM7S64"||cpu()=="AT91SAM7S128"||cpu()=="AT91SAM7S256"||cpu()=="AT91SAM7S512") tree "USB Device Port (UDP)" base 0xFFFB0000 width 14. rgroup.long 0x00++0x03 line.long 0x00 "UDP_FRM_NUM,Frame Number Register" bitfld.long 0x00 17. " FRM_OK ,Frame OK" "Error,OK" bitfld.long 0x00 16. " FRM_ERR ,Frame Error" "No error,Error" textline " " hexmask.long.word 0x00 0.--10. 1. " FRM_NUM[10:0] ,Frame Number as Defined in the Packet Field Formats" width 14. sif (cpu()=="AT91SAM7S321"||cpu()=="AT91SAM7S512"||cpu()=="AT91SAM7S256"||cpu()=="AT91SAM7S128"||cpu()=="AT91SAM7S64"||cpu()=="AT91SAM7S32") group.long 0x04++0x03 line.long 0x00 "UDP_GLB_STAT,Global State Register" bitfld.long 0x00 1. " CONFG ,Configured" "Not configured,Configured" bitfld.long 0x00 0. " FADDEN ,Function Address Enable" "Disabled,Enabled" elif (cpu()=="AT91SAM7SE32"||cpu()=="AT91SAM7SE256"||cpu()=="AT91SAM7SE512") group.long 0x04++0x03 line.long 0x00 "UDP_GLB_STAT,Global State Register" bitfld.long 0x00 4. " RMWUPE ,Remote Wake Up Enable" "Disabled,Enabled" bitfld.long 0x00 2. " ESR ,Enable Send Resume" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CONFG ,Configured" "Not configured,Configured" bitfld.long 0x00 0. " FADDEN ,Function Address Enable" "Disabled,Enabled" else group.long 0x04++0x03 line.long 0x00 "UDP_GLB_STAT,Global State Register" bitfld.long 0x00 4. " RMWUPE ,Remote Wake Up Enable" "Disabled,Enabled" bitfld.long 0x00 3. " RSMINPR ,A Resume Has Been Sent to the Host" "No effect,Sent" textline " " bitfld.long 0x00 2. " ESR ,Enable Send Resume" "Disabled,Enabled" bitfld.long 0x00 1. " CONFG ,Configured" "Not configured,Configured" textline " " bitfld.long 0x00 0. " FADDEN ,Function Address Enable" "Disabled,Enabled" endif width 14. group.long 0x08++0x03 line.long 0x00 "UDP_FADDR,Function Address Register" bitfld.long 0x00 8. " FEN ,Function Enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " FADD[6:0] ,Function Address Value" width 17. sif (cpu()=="AT91SAM7SE32"||cpu()=="AT91SAM7SE256"||cpu()=="AT91SAM7SE512") group.long 0x18++0x03 line.long 0x00 "UDP_IMR_Set/Clr,Interrupt Enable/Mask Register" setclrfld.long 0x00 13. -0x8 13. -0x4 13. " WAKEUP ,Mask UDP bus Wakeup Interrupt" "Disabled,Enabled" setclrfld.long 0x00 11. -0x8 11. -0x4 11. " SOFINT ,Mask Start Of Frame Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. -0x8 9. -0x4 9. " RXRSM ,Mask UDP Resume Interrupt" "Disabled,Enabled" setclrfld.long 0x00 8. -0x8 8. -0x4 8. " RXSUSP ,Mask UDP Suspend Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. -0x8 7. -0x4 7. " EP7INT ,Mask Endpoint 7 Interrupt" "Disabled,Enabled" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " EP6INT ,Mask Endpoint 6 Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. -0x8 5. -0x4 5. " EP5INT ,Mask Endpoint 5 Interrupt" "Disabled,Enabled" setclrfld.long 0x00 4. -0x8 4. -0x4 4. " EP4INT ,Mask Endpoint 4 Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x8 3. -0x4 3. " EP3INT ,Mask Endpoint 3 Interrupt" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " EP2INT ,Mask Endpoint 2 Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " EP1INT ,Mask Endpoint 1 Interrupt" "Disabled,Enabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " EP0INT ,Mask Endpoint 0 Interrupt" "Disabled,Enabled" else group.long 0x18++0x03 line.long 0x00 "UDP_IMR_Set/Clr,Interrupt Enable/Mask Register" setclrfld.long 0x00 13. -0x8 13. -0x4 13. " WAKEUP ,Mask UDP bus Wakeup Interrupt" "Disabled,Enabled" setclrfld.long 0x00 11. -0x8 11. -0x4 11. " SOFINT ,Mask Start Of Frame Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. -0x8 9. -0x4 9. " RXRSM ,Mask UDP Resume Interrupt" "Disabled,Enabled" setclrfld.long 0x00 8. -0x8 8. -0x4 8. " RXSUSP ,Mask UDP Suspend Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. -0x8 3. -0x4 3. " EP3INT ,Mask Endpoint 3 Interrupt" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " EP2INT ,Mask Endpoint 2Interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " EP1INT ,Mask Endpoint 1 Interrupt" "Disabled,Enabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " EP0INT ,Mask Endpoint 0 Interrupt" "Disabled,Enabled" textline " " sif (cpu()!="AT91SAM7S321"&&cpu()!="AT91SAM7S512"&&cpu()!="AT91SAM7S256"&&cpu()!="AT91SAM7S128"&&cpu()!="AT91SAM7S64"&&cpu()!="AT91SAM7S32") setclrfld.long 0x00 10. -0x8 10. -0x4 10. " EXTRSM ,Mask External Resume Interrupt" "Disabled,Enabled" endif endif width 12. sif (cpu()=="AT91SAM7SE32"||cpu()=="AT91SAM7SE256"||cpu()=="AT91SAM7SE512") rgroup.long 0x1c++0x03 line.long 0x0 "UDP_ISR,Interrupt Status Register" bitfld.long 0x0 13. " WAKEUP ,UDP Resume Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x0 12. " ENDBUSRES ,End of BUS Reset Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 11. " SOFINT ,Start of Frame Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x0 9. " RXRSM ,UDP Resume Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 8. " RXSUSP ,UDP Suspend Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x0 7. " EP7INT ,Endpoint 7 Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 6. " EP6INT ,Endpoint 6 Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x0 5. " EP5INT ,Endpoint 5 Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 4. " EP4INT ,Endpoint 4 Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x0 3. " EP3INT ,Endpoint 3 Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 2. " EP2INT ,Endpoint 2 Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x0 1. " EP1INT ,Endpoint 1 Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 0. " EP0INT ,Endpoint 0 Interrupt Status" "No interrupt,Interrupt" else rgroup.long 0x1c++0x03 line.long 0x0 "UDP_ISR,Interrupt Status Register" bitfld.long 0x0 13. " WAKEUP ,UDP Resume Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x0 12. " ENDBUSRES ,End of BUS Reset Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 11. " SOFINT ,Start of Frame Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x0 9. " RXRSM ,UDP Resume Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 8. " RXSUSP ,UDP Suspend Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x0 3. " EP3INT ,Endpoint 3 Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 2. " EP2INT ,Endpoint 2 Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x0 1. " EP1INT ,Endpoint 1 Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 0. " EP0INT ,Endpoint 0 Interrupt Status" "No interrupt,Interrupt" sif (cpu()!="AT91SAM7S321"&&cpu()!="AT91SAM7S512"&&cpu()!="AT91SAM7S256"&&cpu()!="AT91SAM7S128"&&cpu()!="AT91SAM7S64"&&cpu()!="AT91SAM7S32") bitfld.long 0x0 10. " EXTRSM ,External Resume Interrupt Status" "No interrupt,Interrupt" endif endif width 12. wgroup.long 0x20++0x03 line.long 0x00 "UDP_ICR,Interrupt Clear Register" bitfld.long 0x00 13. " WAKEUP ,Clear Wakeup Interrupt" "No effect,Cleared" bitfld.long 0x00 12. " ENDBUSRES ,Clear End of BUS Reset Interrupt" "No effect,Cleared" textline " " bitfld.long 0x00 11. " SOFINT ,Clear Start of Frame Interrupt" "No effect,Cleared" bitfld.long 0x00 9. " RXRSM ,Clear UDP Resume Interrupt" "No effect,Cleared" textline " " bitfld.long 0x00 8. " RXSUSP ,Clear UDP Suspend Interrupt" "No effect,Cleared" sif (cpu()!="AT91SAM7S321"&&cpu()!="AT91SAM7SE32"&&cpu()!="AT91SAM7SE256"&&cpu()!="AT91SAM7SE512"&&cpu()!="AT91SAM7S512"&&cpu()!="AT91SAM7S256"&&cpu()!="AT91SAM7S128"&&cpu()!="AT91SAM7S64"&&cpu()!="AT91SAM7S32") bitfld.long 0x00 10. " EXTRSM ,Clear External Resume Interrupt" "No effect,Cleared" endif width 12. group.long 0x28++0x03 line.long 0x00 "UDP_RST_EP,Reset Endpoint Register" bitfld.long 0x00 3. " EP3 ,Reset Endpoint 3" "No reset,Reset" bitfld.long 0x00 2. " EP2 ,Reset Endpoint 2" "No reset,Reset" textline " " bitfld.long 0x00 1. " EP1 ,Reset Endpoint 1" "No reset,Reset" bitfld.long 0x00 0. " EP0 ,Reset Endpoint 0" "No reset,Reset" width 11. if ((d.l(ad:(0xFFFB0000+0x30))&0x700)==0x000||((d.l(ad:(0xFFFB0000+0x30))&0x700)==0x200)||((d.l(ad:(0xFFFB0000+0x30))&0x700)==0x600)) ;Control,Bulk group.long 0x30++0x03 line.long 0x00 "UDP_CSR0,Endpoint 0 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" elif (((d.l(ad:(0x30+0))&0x700)==0x100)||((d.l(ad:(0x30+0))&0x700)==0x500)) ;Isochronous group.long 0x30++0x03 line.long 0x00 "UDP_CSR0,Endpoint 0 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " ISOERROR ,CRC Error" "No error,Error" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" elif ((d.l(ad:(0x30+0))&0x700)==0x400) group.long 0x30++0x03 line.long 0x00 "UDP_CSR0,Endpoint 0 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" ;bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " ;bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " ;bitfld.long 0x00 3. " ISOERROR ,CRC Error" "No error,Error" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" else ;Interrupt group.long 0x30++0x03 line.long 0x00 "UDP_CSR0,Endpoint 0 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x00 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" textline " " bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" endif if ((d.l(ad:(0xFFFB0000+0x34))&0x700)==0x000||((d.l(ad:(0xFFFB0000+0x34))&0x700)==0x200)||((d.l(ad:(0xFFFB0000+0x34))&0x700)==0x600)) ;Control,Bulk group.long 0x34++0x03 line.long 0x00 "UDP_CSR1,Endpoint 1 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" elif (((d.l(ad:(0x34+1))&0x700)==0x100)||((d.l(ad:(0x34+1))&0x700)==0x500)) ;Isochronous group.long 0x34++0x03 line.long 0x00 "UDP_CSR1,Endpoint 1 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " ISOERROR ,CRC Error" "No error,Error" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" elif ((d.l(ad:(0x34+1))&0x700)==0x400) group.long 0x34++0x03 line.long 0x00 "UDP_CSR1,Endpoint 1 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" ;bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " ;bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " ;bitfld.long 0x00 3. " ISOERROR ,CRC Error" "No error,Error" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" else ;Interrupt group.long 0x34++0x03 line.long 0x00 "UDP_CSR1,Endpoint 1 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x00 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" textline " " bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" endif if ((d.l(ad:(0xFFFB0000+0x38))&0x700)==0x000||((d.l(ad:(0xFFFB0000+0x38))&0x700)==0x200)||((d.l(ad:(0xFFFB0000+0x38))&0x700)==0x600)) ;Control,Bulk group.long 0x38++0x03 line.long 0x00 "UDP_CSR2,Endpoint 2 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" elif (((d.l(ad:(0x38+2))&0x700)==0x100)||((d.l(ad:(0x38+2))&0x700)==0x500)) ;Isochronous group.long 0x38++0x03 line.long 0x00 "UDP_CSR2,Endpoint 2 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " ISOERROR ,CRC Error" "No error,Error" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" elif ((d.l(ad:(0x38+2))&0x700)==0x400) group.long 0x38++0x03 line.long 0x00 "UDP_CSR2,Endpoint 2 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" ;bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " ;bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " ;bitfld.long 0x00 3. " ISOERROR ,CRC Error" "No error,Error" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" else ;Interrupt group.long 0x38++0x03 line.long 0x00 "UDP_CSR2,Endpoint 2 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x00 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" textline " " bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" endif if ((d.l(ad:(0xFFFB0000+0x3C))&0x700)==0x000||((d.l(ad:(0xFFFB0000+0x3C))&0x700)==0x200)||((d.l(ad:(0xFFFB0000+0x3C))&0x700)==0x600)) ;Control,Bulk group.long 0x3C++0x03 line.long 0x00 "UDP_CSR3,Endpoint 3 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" elif (((d.l(ad:(0x3C+3))&0x700)==0x100)||((d.l(ad:(0x3C+3))&0x700)==0x500)) ;Isochronous group.long 0x3C++0x03 line.long 0x00 "UDP_CSR3,Endpoint 3 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " ISOERROR ,CRC Error" "No error,Error" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" elif ((d.l(ad:(0x3C+3))&0x700)==0x400) group.long 0x3C++0x03 line.long 0x00 "UDP_CSR3,Endpoint 3 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" ;bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " ;bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " ;bitfld.long 0x00 3. " ISOERROR ,CRC Error" "No error,Error" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" else ;Interrupt group.long 0x3C++0x03 line.long 0x00 "UDP_CSR3,Endpoint 3 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x00 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" textline " " bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" endif sif (cpu()=="AT91SAM7SE32"||cpu()=="AT91SAM7SE256"||cpu()=="AT91SAM7SE512") if ((d.l(ad:(0xFFFB0000+0x40))&0x700)==0x00||((d.l(ad:(0xFFFB0000+0x40))&0x700)==0x200)||((d.l(ad:(0xFFFB0000+0x40))&0x700)==0x600)) ;Control,Bulk group.long 0x40++0x03 line.long 0x00 "UDP_CSR4,Endpoint 4 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" elif (((d.l(ad:(0x40+4))&0x700)==0x100)||((d.l(ad:(0x40+4))&0x700)==0x500)) ;Isochronous group.long 0x40++0x03 line.long 0x00 "UDP_CSR4,Endpoint 4 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " ISOERROR ,CRC Error" "No error,Error" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" elif ((d.l(ad:(0x40+4))&0x700)==0x400) group.long 0x40++0x03 line.long 0x00 "UDP_CSR4,Endpoint 4 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" ;bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " ;bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " ;bitfld.long 0x00 3. " ISOERROR ,CRC Error" "No error,Error" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" else ;Interrupt group.long 0x40++0x03 line.long 0x00 "UDP_CSR4,Endpoint 4 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x00 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" textline " " bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" endif if ((d.l(ad:(0xFFFB0000+0x44))&0x700)==0x00||((d.l(ad:(0xFFFB0000+0x44))&0x700)==0x200)||((d.l(ad:(0xFFFB0000+0x44))&0x700)==0x600)) ;Control,Bulk group.long 0x44++0x03 line.long 0x00 "UDP_CSR5,Endpoint 5 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" elif (((d.l(ad:(0x44+5))&0x700)==0x100)||((d.l(ad:(0x44+5))&0x700)==0x500)) ;Isochronous group.long 0x44++0x03 line.long 0x00 "UDP_CSR5,Endpoint 5 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " ISOERROR ,CRC Error" "No error,Error" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" elif ((d.l(ad:(0x44+5))&0x700)==0x400) group.long 0x44++0x03 line.long 0x00 "UDP_CSR5,Endpoint 5 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" ;bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " ;bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " ;bitfld.long 0x00 3. " ISOERROR ,CRC Error" "No error,Error" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" else ;Interrupt group.long 0x44++0x03 line.long 0x00 "UDP_CSR5,Endpoint 5 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x00 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" textline " " bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" endif if ((d.l(ad:(0xFFFB0000+0x48))&0x700)==0x00||((d.l(ad:(0xFFFB0000+0x48))&0x700)==0x200)||((d.l(ad:(0xFFFB0000+0x48))&0x700)==0x600)) ;Control,Bulk group.long 0x48++0x03 line.long 0x00 "UDP_CSR6,Endpoint 6 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" elif (((d.l(ad:(0x48+6))&0x700)==0x100)||((d.l(ad:(0x48+6))&0x700)==0x500)) ;Isochronous group.long 0x48++0x03 line.long 0x00 "UDP_CSR6,Endpoint 6 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " ISOERROR ,CRC Error" "No error,Error" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" elif ((d.l(ad:(0x48+6))&0x700)==0x400) group.long 0x48++0x03 line.long 0x00 "UDP_CSR6,Endpoint 6 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" ;bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " ;bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " ;bitfld.long 0x00 3. " ISOERROR ,CRC Error" "No error,Error" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" else ;Interrupt group.long 0x48++0x03 line.long 0x00 "UDP_CSR6,Endpoint 6 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x00 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" textline " " bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" endif if ((d.l(ad:(0xFFFB0000+0x4C))&0x700)==0x00||((d.l(ad:(0xFFFB0000+0x4C))&0x700)==0x200)||((d.l(ad:(0xFFFB0000+0x4C))&0x700)==0x600)) ;Control,Bulk group.long 0x4C++0x03 line.long 0x00 "UDP_CSR7,Endpoint 7 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" elif (((d.l(ad:(0x4C+7))&0x700)==0x100)||((d.l(ad:(0x4C+7))&0x700)==0x500)) ;Isochronous group.long 0x4C++0x03 line.long 0x00 "UDP_CSR7,Endpoint 7 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " ISOERROR ,CRC Error" "No error,Error" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" elif ((d.l(ad:(0x4C+7))&0x700)==0x400) group.long 0x4C++0x03 line.long 0x00 "UDP_CSR7,Endpoint 7 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" ;bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " ;bitfld.long 0x00 5. " FORCESTALL ,Force Stall" "Normal,Stall" bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" textline " " ;bitfld.long 0x00 3. " ISOERROR ,CRC Error" "No error,Error" bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" textline " " bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" else ;Interrupt group.long 0x4C++0x03 line.long 0x00 "UDP_CSR7,Endpoint 7 Control and Status Register" hexmask.long.word 0x00 16.--26. 1. " RXBYTECNT[10:0] ,Number of Bytes Available in the FIFO" bitfld.long 0x00 15. " EPEDS ,Endpoint Enable Disable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DTGLE ,Data Toggle" "DATA0,DATA1" bitfld.long 0x00 8.--10. " EPTYPE[2:0] ,Endpoint Type" "Control,Isochronous OUT,Bulk OUT,Interrupt OUT,Reserved,Isochronous IN,Bulk IN,Interrupt IN" textline " " ;bitfld.long 0x00 7. " DIR ,Transfer Direction" "Data OUT,Data IN" bitfld.long 0x00 6. " RX_DATA_BK1 ,Receive Data Bank 1" "No data,Data" textline " " bitfld.long 0x00 4. " TXPKTRDY ,Transmit Packet Ready" "Not ready,Ready" bitfld.long 0x00 3. " STALLSENT ,Stall Sent" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 2. " RXSETUP ,Sends STALL to the Host" "Not sent,Sent" bitfld.long 0x00 1. " RX_DATA_BK0 ,Receive Data Bank 0" "Not received,Received" textline " " bitfld.long 0x00 0. " TXCOMP ,Generates an IN packet with data previously written in the DPR" "Not acknowledged,Acknowledged" endif endif width 10. ; -------------------------------------------------------------------------------- hgroup.long 0x50++0x03 hide.long 0x00 "UDP_FDR0,Endpoint 0 FIFO Data Register" textfld " " in hgroup.long 0x54++0x03 hide.long 0x00 "UDP_FDR1,Endpoint 1 FIFO Data Register" textfld " " in hgroup.long 0x58++0x03 hide.long 0x00 "UDP_FDR2,Endpoint 2 FIFO Data Register" textfld " " in hgroup.long 0x5C++0x03 hide.long 0x00 "UDP_FDR3,Endpoint 3 FIFO Data Register" textfld " " in sif (cpu()=="AT91SAM7SE32"||cpu()=="AT91SAM7SE256"||cpu()=="AT91SAM7SE512") hgroup.long 0x60++3 hide.long 0x00 "UDP_FDR4,Endpoint 4 FIFO Data Register" textfld " " in hgroup.long 0x64++3 hide.long 0x00 "UDP_FDR5,Endpoint 5 FIFO Data Register" textfld " " in hgroup.long 0x68++3 hide.long 0x00 "UDP_FDR6,Endpoint 6 FIFO Data Register" textfld " " in hgroup.long 0x6c++3 hide.long 0x00 "UDP_FDR7,Endpoint 7 FIFO Data Register" textfld " " in endif group.long 0x74++0x03 line.long 0x00 "UDP_TXVC,Transceiver Control Register" bitfld.long 0x00 8. " TXVDIS ,Transceiver Disable" "Enabled,Disabled" sif (cpu()=="AT91SAM7SE32"||cpu()=="AT91SAM7SE256"||cpu()=="AT91SAM7SE512") bitfld.long 0x00 9. " PUON ,Pullup On" "Disconnected,Connected" endif width 0xb tree.end endif tree "Analog-to-digital Converter (ADC)" base 0xFFFD8000 width 0xd wgroup.long 0x00++0x03 line.long 0x00 "ADC_CR,Control Register" bitfld.long 0x00 1. " START ,Start Conversion" "No effect,Started" bitfld.long 0x00 0. " SWRST ,Software Reset" "No effect,Reset" group.long 0x04++0x03 line.long 0x00 "ADC_MR,Mode Register" hexmask.long.byte 0x00 24.--27. 1. " SHTIM ,Sample & Hold Time" sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") hexmask.long.byte 0x00 16.--22. 1. " STARTUP ,Start Up Time" else hexmask.long.byte 0x00 16.--20. 1. " STARTUP ,Start Up Time" endif textline " " sif (cpu()=="AT91SAM7L64"||cpu()=="AT91SAM7L128") hexmask.long.byte 0x00 8.--15. 1. " PRESCAL ,Prescaler Rate Selection" else hexmask.long.byte 0x00 8.--13. 1. " PRESCAL ,Prescaler Rate Selection" endif bitfld.long 0x00 5. " SLEEP ,Sleep Mode" "Normal,Sleep" textline " " bitfld.long 0x00 4. " LOWRES ,Resolution" "10-bit,8-bit" bitfld.long 0x00 1.--3. " TRGSEL ,Trigger Selection" "TIOA Ch0,TIOA Ch1,TIOA Ch2,Reserved,Reserved,Reserved,External trigger,?..." textline " " bitfld.long 0x00 0. " TRGEN ,Trigger Enable" "Disabled,Enabled" textline " " width 0x12 group.long 0x18++3 line.long 0x00 "ADC_CHSR_Dis/Ena,Channel Disable/Enable and Status Register" sif (cpu()!="AT91SAM7L64"&&cpu()!="AT91SAM7L128") setclrfld.long 0x00 7. -0x8 7. -0x4 7. " CH7 ,Channel 7 Status" "Disabled,Enabled" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " CH6 ,Channel 6 Status" "Disabled,Enabled" setclrfld.long 0x00 5. -0x8 5. -0x4 5. " CH5 ,Channel 5 Status" "Disabled,Enabled" setclrfld.long 0x00 4. -0x8 4. -0x4 4. " CH4 ,Channel 4 Status" "Disabled,Enabled" textline " " endif setclrfld.long 0x00 3. -0x8 3. -0x4 3. " CH3 ,Channel 3 Status" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " CH2 ,Channel 2 Status" "Disabled,Enabled" setclrfld.long 0x00 1. -0x8 1. -0x4 1. " CH1 ,Channel 1 Status" "Disabled,Enabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " CH0 ,Channel 0 Status" "Disabled,Enabled" width 0x12 hgroup.long 0x1c++0x03 hide.long 0x0 "ADC_SR,Status Register" in rgroup.long 0x20++0x03 line.long 0x00 "ADC_LCDR,Last Converted Data Register" hexmask.long.word 0x00 0.--9. 1. " LDATA ,Last Data Converted" textline " " width 0xd group.long 0x2c++3 line.long 0x00 "ADC_IMR_Ena,Interrupt Enable/Mask Register" setclrfld.long 0x00 19. -0x8 19. -0x4 19. " RXBUFF ,RX Buffer Full Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 18. -0x8 18. -0x4 18. " ENDRX ,End of RX Buffer Interrupt Enable/Mask" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. -0x8 17. -0x4 17. " GOVRE ,General Overrun Error Interrupt Enable/Mask" "Disabled,Enabled" setclrfld.long 0x00 16. -0x8 16. -0x4 16. " DRDY ,Data Ready Interrupt Enable/Mask" "Disabled,Enabled" textline " " sif (cpu()!="AT91SAM7L64"&&cpu()!="AT91SAM7L128") setclrfld.long 0x00 15. -0x8 15. -0x4 15. " OVRE7 ,Overrun Error Interrupt Enable/Mask 7" "Disabled,Enabled" setclrfld.long 0x00 14. -0x8 14. -0x4 14. " OVRE6 ,Overrun Error Interrupt Enable/Mask 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. -0x8 13. -0x4 13. " OVRE5 ,Overrun Error Interrupt Enable/Mask 5" "Disabled,Enabled" setclrfld.long 0x00 12. -0x8 12. -0x4 12. " OVRE4 ,Overrun Error Interrupt Enable/Mask 4" "Disabled,Enabled" textline " " endif setclrfld.long 0x00 11. -0x8 11. -0x4 11. " OVRE3 ,Overrun Error Interrupt Enable/Mask 3" "Disabled,Enabled" setclrfld.long 0x00 10. -0x8 10. -0x4 10. " OVRE2 ,Overrun Error Interrupt Enable/Mask 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. -0x8 9. -0x4 9. " OVRE1 ,Overrun Error Interrupt Enable/Mask 1" "Disabled,Enabled" setclrfld.long 0x00 8. -0x8 8. -0x4 8. " OVRE0 ,Overrun Error Interrupt Enable/Mask 0" "Disabled,Enabled" textline " " sif (cpu()!="AT91SAM7L64"&&cpu()!="AT91SAM7L128") setclrfld.long 0x00 7. -0x8 7. -0x4 7. " EOC7 ,End of Conversion Interrupt Enable/Mask 7" "Disabled,Enabled" setclrfld.long 0x00 6. -0x8 6. -0x4 6. " EOC6 ,End of Conversion Interrupt Enable/Mask 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. -0x8 5. -0x4 5. " EOC5 ,End of Conversion Interrupt Enable/Mask 5" "Disabled,Enabled" setclrfld.long 0x00 4. -0x8 4. -0x4 4. " EOC4 ,End of Conversion Interrupt Enable/Mask 4" "Disabled,Enabled" textline " " endif setclrfld.long 0x00 3. -0x8 3. -0x4 3. " EOC3 ,End of Conversion Interrupt Enable/Mask 3" "Disabled,Enabled" setclrfld.long 0x00 2. -0x8 2. -0x4 2. " EOC2 ,End of Conversion Interrupt Enable/Mask 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. -0x8 1. -0x4 1. " EOC1 ,End of Conversion Interrupt Enable/Mask 1" "Disabled,Enabled" setclrfld.long 0x00 0. -0x8 0. -0x4 0. " EOC0 ,End of Conversion Interrupt Enable/Mask 0" "Disabled,Enabled" rgroup.long 0x30++0x0F line.long 0x0 "ADC_CDR0,Channel Data Register 0" hexmask.long.word 0x0 0.--9. 1. " DATA ,Converted Data" line.long 0x04 "ADC_CDR1,Channel Data Register 1" hexmask.long.word 0x04 0.--9. 1. " DATA ,Converted Data" line.long 0x08 "ADC_CDR2,Channel Data Register 2" hexmask.long.word 0x08 0.--9. 1. " DATA ,Converted Data" line.long 0xc "ADC_CDR3,Channel Data Register 3" hexmask.long.word 0xc 0.--9. 1. " DATA ,Converted Data" sif (cpu()!="AT91SAM7L64"&&cpu()!="AT91SAM7L128") rgroup.long 0x40++0x0F line.long 0x00 "ADC_CDR4,Channel Data Register 4" hexmask.long.word 0x00 0.--9. 1. " DATA ,Converted Data" line.long 0x04 "ADC_CDR5,Channel Data Register 5" hexmask.long.word 0x04 0.--9. 1. " DATA ,Converted Data" line.long 0x08 "ADC_CDR6,Channel Data Register 6" hexmask.long.word 0x08 0.--9. 1. " DATA ,Converted Data" line.long 0x0c "ADC_CDR7,Channel Data Register 7" hexmask.long.word 0x0c 0.--9. 1. " DATA ,Converted Data" endif width 0xb tree.end width 8. group ice:0x8--0x0d "Watchpoint 0" line.long 0x0 "AV,Address Value" line.long 0x4 "AM,Address Mask" line.long 0x8 "DV,Data Value" line.long 0x0c "DM,Data Mask" line.long 0x10 "CV,Control Value" bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA" bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1" bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1" bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1" bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User" bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data" bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res" bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W" line.long 0x14 "CM,Control Mask" bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS" bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS" bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS" bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS " bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS" bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS" bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS" group ice:0x10--0x15 "Watchpoint 1" line.long 0x0 "AV,Address Value" line.long 0x4 "AM,Address Mask" line.long 0x8 "DV,Data Value" line.long 0x0c "DM,Data Mask" line.long 0x10 "CV,Control Value" bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA" bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1" bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1" bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1" bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User" bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data" bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res" bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w" line.long 0x14 "CM,Control Mask" bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS" bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS" bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS" bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS " bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS" bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS" bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS" textline ""