; -------------------------------------------------------------------------------- ; @Title: ARM7TDMI on chip peripherals ; @Props: ; @Author: - ; @Changelog: ; @Manufacturer: ; @Doc: ; @Core: ; @Chiplist: ARM7TDMI, ARM7TDMIS, SC100, SC110, TEGRA3PM ; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perarm7t.per 17440 2024-02-02 15:33:08Z kwisniewski $ config 16. 8. width 8. base ice:0x0 ASSERT VERSION.BUILD.BASE()>=80109. sif PER.isNOTIFICATION() base AVM:0x00000000 wgroup AVM:0x00++0 textline " Peripheral File Notification - " button "show missing files" "DIALOG.MESSAGE ""Please check your installation for the possibly missing files:""+CONV.CHAR(0xa)+PER.NOTIFICATION.MISSINGFILES()" textline " ---------------------------------------------------------------" textline " The peripheral file for this SoC cannot be displayed. " textline " Possible reasons are: " textline " - it is missing in the local installation or under development " textline " - it is confidential " textline " " textline " As fallback only the core registers are shown. " textline " Please check www.lauterbach.com/scripts.html " textline " or contact support@lauterbach.com . " textline " " endif ;begin include file arm/icebreaker.ph ;parameters: tree "ICEBreaker" group ice:0x8--0x8 "Watchpoint 0" line.long 0x0 "AV,Address Value" group ice:0x9--0x9 line.long 0x0 "AM,Address Mask" group ice:0x0a--0x0a line.long 0x0 "DV,Data Value" group ice:0x0b--0x0b line.long 0x0 "DM,Data Mask" group ice:0x0c--0x0c line.long 0x0 "CV,Control Value" bitfld.long 0x0 0x8 "ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA" bitfld.long 0x0 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1" bitfld.long 0x0 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1" bitfld.long 0x0 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1" bitfld.long 0x0 0x4 " nTRANS ,CPU Mode" "User,notU" bitfld.long 0x0 0x3 " nOPC ,Op Fetch" "Inst,Data" bitfld.long 0x0 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res" bitfld.long 0x0 0x0 " nRW ,Read/Write" "R ,W" group ice:0x0d--0x0d line.long 0x0 "CM,Control Mask" bitfld.long 0x0 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS" bitfld.long 0x0 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS" bitfld.long 0x0 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS" bitfld.long 0x0 0x4 " nTRANS ,CPU Mode" "ENA ,DIS" bitfld.long 0x0 0x3 " nOPC ,Op Fetch" "ENA ,DIS" bitfld.long 0x0 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS" bitfld.long 0x0 0x0 " nRW ,Read/Write" "ENA,DIS" group ice:0x10--0x10 "Watchpoint 1" line.long 0x0 "AV,Address Value" group ice:0x11--0x11 line.long 0x0 "AM,Address Mask" group ice:0x12--0x12 line.long 0x0 "DV,Data Value" group ice:0x13--0x13 line.long 0x0 "DM,Data Mask" group ice:0x14--0x14 line.long 0x0 "CV,Control Value" bitfld.long 0x0 0x8 "ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA" bitfld.long 0x0 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1" bitfld.long 0x0 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1" bitfld.long 0x0 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1" bitfld.long 0x0 0x4 " nTRANS ,CPU Mode" "User,notU" bitfld.long 0x0 0x3 " nOPC ,Op Fetch" "Inst,Data" bitfld.long 0x0 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res" bitfld.long 0x0 0x0 " nRW ,Read/Write" "R ,W" group ice:0x15--0x15 line.long 0x0 "CM,Control Mask" bitfld.long 0x0 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS" bitfld.long 0x0 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS" bitfld.long 0x0 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS" bitfld.long 0x0 0x4 " nTRANS ,CPU Mode" "ENA ,DIS" bitfld.long 0x0 0x3 " nOPC ,Op Fetch" "ENA ,DIS" bitfld.long 0x0 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS" bitfld.long 0x0 0x0 " nRW ,Read/Write" "ENA,DIS" tree.end ;end include file arm/icebreaker.ph