; -------------------------------------------------------------------------------- ; @Title: APM32F0 On-Chip Peripherals ; @Props: Released ; @Author: NEJ ; @Changelog: 2023-12-19 NEJ ; @Manufacturer: Geehy - Geehy Semiconductor ; @Doc: Generated (TRACE32, build: 165489.), based on: ; APM32F030.svd (Ver. 1.0), APM32F051.svd (Ver. 1.0), ; APM32F070.svd (Ver. 1.0), APM32F071.svd (Ver. 1.0), ; APM32F072.svd (Ver. 1.0), APM32F091.svd (Ver. 1.0) ; @Core: Cortex-M0+ ; @Chip: APM32F003F4, APM32F003F6, APM32F030C6, APM32F030C8 ; APM32F030CC, APM32F030K6, APM32F030K8, APM32F030R8 ; APM32F030RC, APM32F035C8, APM32F035K8, APM32F051C6 ; APM32F051C8, APM32F051K6, APM32F051K8, APM32F051R6 ; APM32F051R8, APM32F072C8, APM32F072CB, APM32F072R8 ; APM32F072RB, APM32F072V8, APM32F072VB, APM32F091CB ; APM32F091CC, APM32F091RB, APM32F091RC, APM32F091VB ; APM32F091VC ; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perapm32f0.per 17263 2023-12-22 15:06:56Z kwisniewski $ AUTOINDENT.ON CENTER TREE ENUMDELIMITER "," base ad:0x0 tree.close "Core Registers (Cortex-M0+)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 0x8 if (CORENAME()=="CORTEXM1") group.long 0x10++0x0b line.long 0x00 "STCSR,SysTick Control and Status Register" bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1" bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock" textline " " bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick" bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled" line.long 0x04 "STRVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0" line.long 0x08 "STCVR,SysTick Current Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter" else group.long 0x10++0x0b line.long 0x00 "STCSR,SysTick Control and Status Register" bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1" bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock" textline " " bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick" bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled" line.long 0x04 "STRVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0" line.long 0x08 "STCVR,SysTick Current Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter" endif if (CORENAME()=="CORTEXM1") rgroup.long 0x1c++0x03 line.long 0x00 "STCR,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1" bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known" else rgroup.long 0x1c++0x03 line.long 0x00 "STCR,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors" endif rgroup.long 0xd00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer code" hexmask.long.byte 0x00 20.--23. 1. " VARIANT ,Implementation defined variant number" textline " " hexmask.long.byte 0x00 4.--15. 1. " PARTNO ,Number of processor within family" hexmask.long.byte 0x00 0.--3. 1. " REVISION ,Implementation defined revision number" group.long 0xd04++0x03 line.long 0x00 "ICSR,Interrupt Control State Register" bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending" bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending" textline " " bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending" bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending" textline " " bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending" bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service" textline " " bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt" hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field" textline " " hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field" if (CORENAME()=="CORTEXM0+") group.long 0xd08++0x03 line.long 0x00 "VTOR,Vector Table Offset Register" hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address" else textline " " endif group.long 0xd0c++0x03 line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key" bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian" textline " " bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset" bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear" group.long 0xd10++0x03 line.long 0x00 "SCR,System Control Register" bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" textline " " bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" rgroup.long 0xd14++0x03 line.long 0x00 "CCR,Configuration and Control Register" bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned" bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped" group.long 0xd1c++0x0b line.long 0x00 "SHPR2,System Handler Priority Register 2" bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11" line.long 0x04 "SHPR3,System Handler Priority Register 3" bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11" bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11" line.long 0x08 "SHCSR,System Handler Control and State Register" bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending" if (CORENAME()=="CORTEXM0+") hgroup.long 0x08++0x03 hide.long 0x00 "ACTLR,Auxiliary Control Register" else textline " " endif else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit (MPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 8.--15. 1. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,?..." group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" textline " " textline " " endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller (NVIC)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 12. tree "Interrupt Enable Registers" group.long 0x100++0x03 line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" tree.end tree "Interrupt Pending Registers" group.long 0x200++0x03 line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" tree.end width 6. tree "Interrupt Priority Registers" group.long 0x400++0x1F line.long 0x00 "INT0,Interrupt Priority Register" bitfld.long 0x00 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3" bitfld.long 0x00 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3" bitfld.long 0x00 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3" bitfld.long 0x00 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3" line.long 0x04 "INT1,Interrupt Priority Register" bitfld.long 0x04 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3" bitfld.long 0x04 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3" bitfld.long 0x04 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3" bitfld.long 0x04 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3" line.long 0x08 "INT2,Interrupt Priority Register" bitfld.long 0x08 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3" bitfld.long 0x08 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3" bitfld.long 0x08 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3" bitfld.long 0x08 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3" line.long 0x0C "INT3,Interrupt Priority Register" bitfld.long 0x0C 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3" bitfld.long 0x0C 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3" bitfld.long 0x0C 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3" bitfld.long 0x0C 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3" line.long 0x10 "INT4,Interrupt Priority Register" bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3" bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3" bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3" bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3" line.long 0x14 "INT5,Interrupt Priority Register" bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3" bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3" bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3" bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3" line.long 0x18 "INT6,Interrupt Priority Register" bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3" bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3" bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3" bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3" line.long 0x1C "INT7,Interrupt Priority Register" bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3" bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3" bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3" bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3" tree.end width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 0xA group.long 0xD30++0x03 line.long 0x00 "DFSR,Data Fault Status Register" eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred" eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred" textline " " eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match" textline " " eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match" eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request" if (CORENAME()=="CORTEXM1") if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00) group.long 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " textline " " textfld " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" else group.long 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted" textline " " bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" endif else if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00) group.long 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " textline " " textfld " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" else group.long 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted" textline " " bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" endif endif wgroup.long 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Selector Register" bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write" bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..." group.long 0xDF8++0x07 line.long 0x00 "DCRDR,Debug Core Register Data Register" hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor" line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled" bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error" textline " " bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Breakpoint Unit (BPU)" sif COMPonent.AVAILABLE("BPU") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1)) width 8. group.long 0x00++0x03 line.long 0x00 "BP_CTRL,Breakpoint Control Register" bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " KEY ,Key field" "No write,Write" bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled" group.long 0x8++0x03 line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled" group.long 0xC++0x03 line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled" group.long 0x10++0x03 line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled" group.long 0x14++0x03 line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled" else newline textline "BPU component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 14. rgroup.long 0x00++0x03 line.long 0x00 "DW_CTRL,DW Control Register " bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x1c++0x03 line.long 0x00 "DW_PCSR,DW Program Counter Sample Register" hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF" group.long 0x20++0x0b line.long 0x00 "DW_COMP0,DW Comparator Register 0" hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address" line.long 0x04 "DW_MASK0,DW Mask Register 0" hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP" line.long 0x08 "DW_FUNCTION0,DW Function Register 0" bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match" bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..." group.long 0x30++0x0b line.long 0x00 "DW_COMP1,DW Comparator Register 1" hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address" line.long 0x04 "DW_MASK1,DW Mask Register 1 " hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP" line.long 0x08 "DW_FUNCTION1,DW Function Register 1" bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match" bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..." else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end tree "ADC (Analog-to-Digital Converter)" base ad:0x40012400 group.long 0x0++0x17 line.long 0x0 "STS,interrupt and status register" bitfld.long 0x0 7. "AWDFLG,Analog watchdog flag" "0,1" bitfld.long 0x0 4. "OVREFLG,ADC overrun flag" "0,1" bitfld.long 0x0 3. "EOSEQFLG,End of sequence flag" "0,1" bitfld.long 0x0 2. "EOCFLG,End of conversion flag" "0,1" bitfld.long 0x0 1. "EOSMPFLG,End of sampling flag" "0,1" bitfld.long 0x0 0. "ADCRDYFLG,ADC ready flag" "0,1" line.long 0x4 "IEN,interrupt enable register" bitfld.long 0x4 7. "AWDIEN,Analog watchdog interrupt enable" "0,1" bitfld.long 0x4 4. "OVRIEN,Overrun interrupt enable" "0,1" bitfld.long 0x4 3. "EOSEQIEN,End of conversion sequence interrupt enable" "0,1" bitfld.long 0x4 2. "EOCIEN,End of conversion interrupt enable" "0,1" bitfld.long 0x4 1. "EOSMPIEN,End of sampling flag interrupt enable" "0,1" bitfld.long 0x4 0. "ADCRDYIEN,ADC ready interrupt enable" "0,1" line.long 0x8 "CTRL,control register" bitfld.long 0x8 31. "CAL,ADC calibration" "0,1" bitfld.long 0x8 4. "STOPCEN,ADC stop conversion command" "0,1" bitfld.long 0x8 2. "STARTCEN,ADC start conversion command" "0,1" bitfld.long 0x8 1. "ADCD,ADC disable command" "0,1" bitfld.long 0x8 0. "ADCEN,ADC enable command" "0,1" line.long 0xC "CFG1,configuration register 1" hexmask.long.byte 0xC 26.--30. 1. "AWDCHSEL,Analog watchdog channel selection" bitfld.long 0xC 23. "AWDEN,Analog watchdog enable" "0,1" bitfld.long 0xC 22. "AWDCHEN,Enable the watchdog on a single channel or on all channels" "0,1" bitfld.long 0xC 16. "DISCEN,Discontinuous mode" "0,1" bitfld.long 0xC 15. "AOEN,Auto-off mode" "0,1" bitfld.long 0xC 14. "WAITCEN,Auto-delayed conversion mode" "0,1" bitfld.long 0xC 13. "CMODESEL,Single / continuous conversion mode" "0,1" bitfld.long 0xC 12. "OVRMAG,Overrun management mode" "0,1" bitfld.long 0xC 10.--11. "EXTPOLSEL,External trigger enable and polarity selection" "0,1,2,3" newline bitfld.long 0xC 6.--8. "EXTTRGSEL,External trigger selection" "0,1,2,3,4,5,6,7" bitfld.long 0xC 5. "DALIGCFG,Data alignment" "0,1" bitfld.long 0xC 3.--4. "DATARESCFG,Data resolution" "0,1,2,3" bitfld.long 0xC 2. "SCANSEQDIR,Scan sequence direction" "0,1" bitfld.long 0xC 1. "DMACFG,Direct memery access configuration" "0,1" bitfld.long 0xC 0. "DMAEN,Direct memory access enable" "0,1" line.long 0x10 "CFG2,configuration register 2" bitfld.long 0x10 30.--31. "CLKCFG,ADC clock mode" "0,1,2,3" line.long 0x14 "SMPTIM,sampling time register" bitfld.long 0x14 0.--2. "SMPCYCSEL,Sampling time selection" "0,1,2,3,4,5,6,7" group.long 0x20++0x3 line.long 0x0 "AWDT,watchdog threshold register" hexmask.long.word 0x0 16.--27. 1. "AWDHT,Analog watchdog higher threshold" hexmask.long.word 0x0 0.--11. 1. "AWDLT,Analog watchdog lower threshold" group.long 0x28++0x3 line.long 0x0 "CHSEL,channel selection register" bitfld.long 0x0 18. "CH18SEL,Channel-18 selection" "0,1" bitfld.long 0x0 17. "CH17SEL,Channel-17 selection" "0,1" bitfld.long 0x0 16. "CH16SEL,Channel-16 selection" "0,1" bitfld.long 0x0 15. "CH15SEL,Channel-15 selection" "0,1" bitfld.long 0x0 14. "CH14SEL,Channel-14 selection" "0,1" bitfld.long 0x0 13. "CH13SEL,Channel-13 selection" "0,1" bitfld.long 0x0 12. "CH12SEL,Channel-12 selection" "0,1" bitfld.long 0x0 11. "CH11SEL,Channel-11 selection" "0,1" bitfld.long 0x0 10. "CH10SEL,Channel-10 selection" "0,1" newline bitfld.long 0x0 9. "CH9SEL,Channel-9 selection" "0,1" bitfld.long 0x0 8. "CH8SEL,Channel-8 selection" "0,1" bitfld.long 0x0 7. "CH7SEL,Channel-7 selection" "0,1" bitfld.long 0x0 6. "CH6SEL,Channel-6 selection" "0,1" bitfld.long 0x0 5. "CH5SEL,Channel-5 selection" "0,1" bitfld.long 0x0 4. "CH4SEL,Channel-4 selection" "0,1" bitfld.long 0x0 3. "CH3SEL,Channel-3 selection" "0,1" bitfld.long 0x0 2. "CH2SEL,Channel-2 selection" "0,1" bitfld.long 0x0 1. "CH1SEL,Channel-1 selection" "0,1" newline bitfld.long 0x0 0. "CH0SEL,Channel-0 selection" "0,1" rgroup.long 0x40++0x3 line.long 0x0 "DATA,data register" hexmask.long.word 0x0 0.--15. 1. "CDATA,Converted data" group.long 0x308++0x3 line.long 0x0 "CCFG,common configuration register" sif (cpuis("APM32F070*")) bitfld.long 0x0 24. "VBATEN,VBAT enable" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x0 24. "VBATEN,VBAT enable" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x0 24. "VBATEN,VBAT enable" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x0 24. "VBATEN,VBAT enable" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x0 23. "TSEN,Temperature sensor enable" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x0 23. "TSEN,Temperature sensor enable" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x0 23. "TSEN,Temperature sensor enable" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x0 23. "TSEN,Temperature sensor enable" "0,1" endif bitfld.long 0x0 22. "VREFEN,Temperature sensor and VREFINT enable" "0,1" tree.end sif (cpuis("APM32F072*")||cpuis("APM32F091*")) tree "CAN (Controller Area Network)" base ad:0x40006400 group.long 0x0++0x1F line.long 0x0 "MCTRL,CAN master control register" bitfld.long 0x0 16. "DBGFRZE,Debug freeze" "0,1" bitfld.long 0x0 15. "SWRST,software master reset" "0,1" bitfld.long 0x0 6. "ALBOFFM,Automatic bus-off management" "0,1" bitfld.long 0x0 5. "AWUPCFG,Automatic wakeup mode" "0,1" bitfld.long 0x0 4. "ARTXMD,No automatic retransmission" "0,1" bitfld.long 0x0 3. "RXFLOCK,Receive FIFO locked mode" "0,1" bitfld.long 0x0 2. "TXFPCFG,Transmit FIFO priority" "0,1" bitfld.long 0x0 1. "SLEEPREQ,Sleep mode request" "0,1" newline bitfld.long 0x0 0. "INITREQ,Initialization request" "0,1" line.long 0x4 "MSTS,CAN master status register" rbitfld.long 0x4 11. "RXSIGL,CAN Rx signal" "0,1" rbitfld.long 0x4 10. "LSAMVALUE,Last sample point" "0,1" rbitfld.long 0x4 9. "RXMFLG,Receive mode" "0,1" rbitfld.long 0x4 8. "TXMFLG,Transmit mode" "0,1" bitfld.long 0x4 4. "SLEEPIFLG,Sleep acknowledge interrupt" "0,1" bitfld.long 0x4 3. "WUPIFLG,Wakeup interrupt" "0,1" bitfld.long 0x4 2. "ERRIFLG,Error interrupt" "0,1" rbitfld.long 0x4 1. "SLEEPFLG,Sleep acknowledge" "0,1" newline rbitfld.long 0x4 0. "INITFLG,Initialization acknowledge" "0,1" line.long 0x8 "TXSTS,CAN transmit status register" rbitfld.long 0x8 31. "LOWESTP2,Lowest priority flag for mailbox2" "0,1" rbitfld.long 0x8 30. "LOWESTP1,Lowest priority flag for mailbox1" "0,1" rbitfld.long 0x8 29. "LOWESTP0,Lowest priority flag for mailbox0" "0,1" rbitfld.long 0x8 28. "TXMEFLG2,Transmit mailbox 2 empty" "0,1" rbitfld.long 0x8 27. "TXMEFLG1,Transmit mailbox 1 empty" "0,1" rbitfld.long 0x8 26. "TXMEFLG0,Transmit mailbox 0 empty" "0,1" rbitfld.long 0x8 24.--25. "EMNUM,Mailbox code" "0,1,2,3" bitfld.long 0x8 23. "ABREQFLG2,Abort request for mailbox 2" "0,1" newline bitfld.long 0x8 19. "TXERRFLG2,Transmission error of mailbox 2" "0,1" bitfld.long 0x8 18. "ARBLSTFLG2,Arbitration lost for mailbox 2" "0,1" bitfld.long 0x8 17. "TXSUSFLG2,Transmission OK of mailbox 2" "0,1" bitfld.long 0x8 16. "REQCFLG2,Request completed mailbox 2" "0,1" bitfld.long 0x8 15. "ABREQFLG1,Abort request for mailbox 1" "0,1" bitfld.long 0x8 11. "TXERRFLG1,Transmission error of mailbox 1" "0,1" bitfld.long 0x8 10. "ARBLSTFLG1,Arbitration lost for mailbox 1" "0,1" bitfld.long 0x8 9. "TXSUSFLG1,Transmission OK of mailbox 1" "0,1" newline bitfld.long 0x8 8. "REQCFLG1,Request completed mailbox 1" "0,1" bitfld.long 0x8 7. "ABREQFLG0,Abort request for mailbox 0" "0,1" bitfld.long 0x8 3. "TXERRFLG0,Transmission error of mailbox 0" "0,1" bitfld.long 0x8 2. "ARBLSTFLG0,Arbitration lost for mailbox 0" "0,1" bitfld.long 0x8 1. "TXSUSFLG0,Transmission OK of mailbox ." "0,1" bitfld.long 0x8 0. "REQCFLG0,Request completed mailbox 0" "0,1" line.long 0xC "RXF0,CAN receive FIFO 0 register" bitfld.long 0xC 5. "RFOM0,Release FIFO 0 output mailbox" "0,1" bitfld.long 0xC 4. "FOVRFLG0,FIFO 0 overrun" "0,1" bitfld.long 0xC 3. "FFULLFLG0,FIFO 0 full" "0,1" rbitfld.long 0xC 0.--1. "FMNUM0,FIFO 0 message pending" "0,1,2,3" line.long 0x10 "RXF1,CAN receive FIFO 1 register" bitfld.long 0x10 5. "RFOM1,Release FIFO 1 output mailbox" "0,1" bitfld.long 0x10 4. "FOVRFLG1,FIFO 1 overrun" "0,1" bitfld.long 0x10 3. "FFULLFLG1,FIFO 1 full" "0,1" rbitfld.long 0x10 0.--1. "FMNUM1,FIFO 1 message pending" "0,1,2,3" line.long 0x14 "INTEN,CAN interrupt enable register" bitfld.long 0x14 17. "SLEEPIEN,Sleep interrupt enable" "0,1" bitfld.long 0x14 16. "WUPIEN,Wakeup interrupt enable" "0,1" bitfld.long 0x14 15. "ERRIEN,Error interrupt enable" "0,1" bitfld.long 0x14 11. "LECIEN,Last error code interrupt enable" "0,1" bitfld.long 0x14 10. "BOFFIEN,Bus-off interrupt enable" "0,1" bitfld.long 0x14 9. "ERRPIEN,Error passive interrupt enable" "0,1" bitfld.long 0x14 8. "ERRWIEN,Error warning interrupt enable" "0,1" bitfld.long 0x14 6. "FOVRIEN1,FIFO overrun interrupt enable" "0,1" newline bitfld.long 0x14 5. "FFULLIEN1,FIFO full interrupt enable" "0,1" bitfld.long 0x14 4. "FMPIEN1,FIFO message pending interrupt enable" "0,1" bitfld.long 0x14 3. "FOVRIEN0,FIFO overrun interrupt enable" "0,1" bitfld.long 0x14 2. "FFULLIEN0,FIFO full interrupt enable" "0,1" bitfld.long 0x14 1. "FMIEN0,FIFO message pending interrupt enable" "0,1" bitfld.long 0x14 0. "TXMEIEN,Transmit mailbox empty interrupt enable" "0,1" line.long 0x18 "ERRSTS,CAN error status register" hexmask.long.byte 0x18 24.--31. 1. "RXERRCNT,Receive error counter" hexmask.long.byte 0x18 16.--23. 1. "TXERRCNT,Transmit error counter" bitfld.long 0x18 4.--6. "LERRC,Last error code" "0,1,2,3,4,5,6,7" rbitfld.long 0x18 2. "BOFLG,Bus-off flag" "0,1" rbitfld.long 0x18 1. "ERRPFLG,Error passive flag" "0,1" rbitfld.long 0x18 0. "ERRWFLG,Error warning flag" "0,1" line.long 0x1C "BITTIM,CAN bit timing register" bitfld.long 0x1C 31. "SILMEN,Silent mode (debug)" "0,1" bitfld.long 0x1C 30. "LBKMEN,Loop back mode (debug)" "0,1" bitfld.long 0x1C 24.--25. "RSYNJW,Resynchronization jump width" "0,1,2,3" bitfld.long 0x1C 20.--22. "TIMSEG2,Time segment 2" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x1C 16.--19. 1. "TIMSEG1,Time segment 1" hexmask.long.word 0x1C 0.--9. 1. "BRPSC,Baud rate prescaler" group.long 0x180++0x2F line.long 0x0 "TXMID0,CAN TX mailbox 0 identifier register" hexmask.long.word 0x0 21.--31. 1. "STDID,Standard identifier or extended identifier" hexmask.long.tbyte 0x0 3.--20. 1. "EXTID,Extended identifier" bitfld.long 0x0 2. "IDTYPESEL,Identifier extension" "0,1" bitfld.long 0x0 1. "TXRFREQ,Remote transmission request" "0,1" bitfld.long 0x0 0. "TXMREQ,Transmit mailbox request" "0,1" line.long 0x4 "TXDLEN0,CAN mailbox 0 data length control and time stamp register" hexmask.long.byte 0x4 0.--3. 1. "DLCODE,Data length code" line.long 0x8 "TXMDL0,CAN mailbox 0 data low register" hexmask.long.byte 0x8 24.--31. 1. "DATABYTE3,Data byte 3" hexmask.long.byte 0x8 16.--23. 1. "DATABYTE2,Data byte 2" hexmask.long.byte 0x8 8.--15. 1. "DATABYTE1,Data byte 1" hexmask.long.byte 0x8 0.--7. 1. "DATABYTE0,Data byte 0" line.long 0xC "TXMDH0,CAN mailbox 0 data high register" hexmask.long.byte 0xC 24.--31. 1. "DATABYTE7,Data byte 7" hexmask.long.byte 0xC 16.--23. 1. "DATABYTE6,Data byte 6" hexmask.long.byte 0xC 8.--15. 1. "DATABYTE5,Data byte 5" hexmask.long.byte 0xC 0.--7. 1. "DATABYTE4,Data byte 4" line.long 0x10 "TXMID1,CAN TX mailbox 1 identifier register" hexmask.long.word 0x10 21.--31. 1. "STDID,Standard identifier or extended identifier" hexmask.long.tbyte 0x10 3.--20. 1. "EXTID,Extended identifier" bitfld.long 0x10 2. "IDTYPESEL,Identifier extension" "0,1" bitfld.long 0x10 1. "TXRFREQ,Remote transmission request" "0,1" bitfld.long 0x10 0. "TXMREQ,Transmit mailbox request" "0,1" line.long 0x14 "TXDLEN1,CAN mailbox 1 data length control and time stamp register" hexmask.long.byte 0x14 0.--3. 1. "DLCODE,Data length code" line.long 0x18 "TXMDL1,CAN mailbox 1 data low register" hexmask.long.byte 0x18 24.--31. 1. "DATABYTE3,Data byte 3" hexmask.long.byte 0x18 16.--23. 1. "DATABYTE2,Data byte 2" hexmask.long.byte 0x18 8.--15. 1. "DATABYTE1,Data byte 1" hexmask.long.byte 0x18 0.--7. 1. "DATABYTE0,Data byte 0" line.long 0x1C "TXMDH1,CAN mailbox 1 data high register" hexmask.long.byte 0x1C 24.--31. 1. "DATABYTE7,Data byte 7" hexmask.long.byte 0x1C 16.--23. 1. "DATABYTE6,Data byte 6" hexmask.long.byte 0x1C 8.--15. 1. "DATABYTE5,Data byte 5" hexmask.long.byte 0x1C 0.--7. 1. "DATABYTE4,Data byte 4" line.long 0x20 "TXMID2,CAN TX mailbox 0 identifier register" hexmask.long.word 0x20 21.--31. 1. "STDID,Standard identifier or extended identifier" hexmask.long.tbyte 0x20 3.--20. 1. "EXTID,Extended identifier" bitfld.long 0x20 2. "IDTYPESEL,Identifier extension" "0,1" bitfld.long 0x20 1. "TXRFREQ,Remote transmission request" "0,1" bitfld.long 0x20 0. "TXMREQ,Transmit mailbox request" "0,1" line.long 0x24 "TXDLEN2,CAN mailbox 2 data length control and time stamp register" hexmask.long.byte 0x24 0.--3. 1. "DLCODE,Data length code" line.long 0x28 "TXMDL2,CAN mailbox 2 data low register" hexmask.long.byte 0x28 24.--31. 1. "DATABYTE3,Data byte 3" hexmask.long.byte 0x28 16.--23. 1. "DATABYTE2,Data byte 2" hexmask.long.byte 0x28 8.--15. 1. "DATABYTE1,Data byte 1" hexmask.long.byte 0x28 0.--7. 1. "DATABYTE0,Data byte 0" line.long 0x2C "TXMDH2,CAN mailbox 2 data high register" hexmask.long.byte 0x2C 24.--31. 1. "DATABYTE7,Data byte 7" hexmask.long.byte 0x2C 16.--23. 1. "DATABYTE6,Data byte 6" hexmask.long.byte 0x2C 8.--15. 1. "DATABYTE5,Data byte 5" hexmask.long.byte 0x2C 0.--7. 1. "DATABYTE4,Data byte 4" rgroup.long 0x1B0++0x1F line.long 0x0 "RXMID0,CAN receive FIFO 0 mailbox identifier register" hexmask.long.word 0x0 21.--31. 1. "STDID,Standard identifier or extended identifier" hexmask.long.tbyte 0x0 3.--20. 1. "EXTID,Extended identifier" bitfld.long 0x0 2. "IDTYPESEL,Identifier extension" "0,1" bitfld.long 0x0 1. "RFTXREQ,Remote transmission request" "0,1" line.long 0x4 "RXDLEN0,CAN receive FIFO 0 mailbox data length control and time stamp register" hexmask.long.byte 0x4 8.--15. 1. "FMIDX,Filter match index" hexmask.long.byte 0x4 0.--3. 1. "DLCODE,Data length code" line.long 0x8 "RXMDL0,CAN receive FIFO 0 mailbox data low register" hexmask.long.byte 0x8 24.--31. 1. "DATABYTE3,Data byte 3" hexmask.long.byte 0x8 16.--23. 1. "DATABYTE2,Data byte 2" hexmask.long.byte 0x8 8.--15. 1. "DATABYTE1,Data byte 1" hexmask.long.byte 0x8 0.--7. 1. "DATABYTE0,Data byte 0" line.long 0xC "RXMDH0,CAN receive FIFO 0 mailbox data high register" hexmask.long.byte 0xC 24.--31. 1. "DATABYTE7,Data byte 7" hexmask.long.byte 0xC 16.--23. 1. "DATABYTE6,Data byte 6" hexmask.long.byte 0xC 8.--15. 1. "DATABYTE5,Data byte 5" hexmask.long.byte 0xC 0.--7. 1. "DATABYTE4,Data byte 4" line.long 0x10 "RXMID1,CAN receive FIFO 1 mailbox identifier register" hexmask.long.word 0x10 21.--31. 1. "STDID,Standard identifier or extended identifier" hexmask.long.tbyte 0x10 3.--20. 1. "EXTID,Extended identifier" bitfld.long 0x10 2. "IDTYPESEL,Identifier extension" "0,1" bitfld.long 0x10 1. "RFTXREQ,Remote transmission request" "0,1" line.long 0x14 "RXDLEN1,CAN receive FIFO 1 mailbox data length control and time stamp register" hexmask.long.byte 0x14 8.--15. 1. "FMIDX,Filter match index" hexmask.long.byte 0x14 0.--3. 1. "DLCODE,Data length code" line.long 0x18 "RXMDL1,CAN receive FIFO 1 mailbox data low register" hexmask.long.byte 0x18 24.--31. 1. "DATABYTE3,Data byte 3" hexmask.long.byte 0x18 16.--23. 1. "DATABYTE2,Data byte 2" hexmask.long.byte 0x18 8.--15. 1. "DATABYTE1,Data byte 1" hexmask.long.byte 0x18 0.--7. 1. "DATABYTE0,Data byte 0" line.long 0x1C "RXMDH1,CAN receive FIFO 1 mailbox data high register" hexmask.long.byte 0x1C 24.--31. 1. "DATABYTE7,Data byte 7" hexmask.long.byte 0x1C 16.--23. 1. "DATABYTE6,Data byte 6" hexmask.long.byte 0x1C 8.--15. 1. "DATABYTE5,Data byte 5" hexmask.long.byte 0x1C 0.--7. 1. "DATABYTE4,Data byte 4" group.long 0x200++0x7 line.long 0x0 "FCTRL,CAN filter master register" bitfld.long 0x0 0. "FINITEN,Filter initialization mode" "0,1" line.long 0x4 "FMCFG,CAN filter mode register" bitfld.long 0x4 13. "FMCFG13,Filter 13 mode" "0,1" bitfld.long 0x4 12. "FMCFG12,Filter 12 mode" "0,1" bitfld.long 0x4 11. "FMCFG11,Filter 11 mode" "0,1" bitfld.long 0x4 10. "FMCFG10,Filter 10 mode" "0,1" bitfld.long 0x4 9. "FMCFG9,Filter 9 mode" "0,1" bitfld.long 0x4 8. "FMCFG8,Filter 8 mode" "0,1" bitfld.long 0x4 7. "FMCFG7,Filter 7 mode" "0,1" bitfld.long 0x4 6. "FMCFG6,Filter 6 mode" "0,1" newline bitfld.long 0x4 5. "FMCFG5,Filter 5 mode" "0,1" bitfld.long 0x4 4. "FMCFG4,Filter 4 mode" "0,1" bitfld.long 0x4 3. "FMCFG3,Filter 3 mode" "0,1" bitfld.long 0x4 2. "FMCFG2,Filter 2 mode" "0,1" bitfld.long 0x4 1. "FMCFG1,Filter 1 mode" "0,1" bitfld.long 0x4 0. "FMCFG0,Filter 0 mode" "0,1" group.long 0x20C++0x3 line.long 0x0 "FSCFG,CAN filter scale register" bitfld.long 0x0 13. "FSCFG13,Filter 13 scale configuration" "0,1" bitfld.long 0x0 12. "FSCFG12,Filter 12 scale configuration" "0,1" bitfld.long 0x0 11. "FSCFG11,Filter 11 scale configuration" "0,1" bitfld.long 0x0 10. "FSCFG10,Filter 10 scale configuration" "0,1" bitfld.long 0x0 9. "FSCFG9,Filter 9 scale configuration" "0,1" bitfld.long 0x0 8. "FSCFG8,Filter 8 scale configuration" "0,1" bitfld.long 0x0 7. "FSCFG7,Filter 7 scale configuration" "0,1" bitfld.long 0x0 6. "FSCFG6,Filter 6 scale configuration" "0,1" newline bitfld.long 0x0 5. "FSCFG5,Filter 5 scale configuration" "0,1" bitfld.long 0x0 4. "FSCFG4,Filter 4 scale configuration" "0,1" bitfld.long 0x0 3. "FSCFG3,Filter 3 scale configuration" "0,1" bitfld.long 0x0 2. "FSCFG2,Filter 2 scale configuration" "0,1" bitfld.long 0x0 1. "FSCFG1,Filter 1 scale configuration" "0,1" bitfld.long 0x0 0. "FSCFG0,Filter 0 scale configuration" "0,1" group.long 0x214++0x3 line.long 0x0 "FFASS,CAN filter FIFO assignment register" bitfld.long 0x0 13. "FFASS13,Filter FIFO assignment for filter 13" "0,1" bitfld.long 0x0 12. "FFASS12,Filter FIFO assignment for filter 12" "0,1" bitfld.long 0x0 11. "FFASS11,Filter FIFO assignment for filter 11" "0,1" bitfld.long 0x0 10. "FFASS10,Filter FIFO assignment for filter" "0,1" bitfld.long 0x0 9. "FFASS9,Filter FIFO assignment for filter 9" "0,1" bitfld.long 0x0 8. "FFASS8,Filter FIFO assignment for filter 8" "0,1" bitfld.long 0x0 7. "FFASS7,Filter FIFO assignment for filter 7" "0,1" bitfld.long 0x0 6. "FFASS6,Filter FIFO assignment for filter 6" "0,1" newline bitfld.long 0x0 5. "FFASS5,Filter FIFO assignment for filter 5" "0,1" bitfld.long 0x0 4. "FFASS4,Filter FIFO assignment for filter 4" "0,1" bitfld.long 0x0 3. "FFASS3,Filter FIFO assignment for filter 3" "0,1" bitfld.long 0x0 2. "FFASS2,Filter FIFO assignment for filter 2" "0,1" bitfld.long 0x0 1. "FFASS1,Filter FIFO assignment for filter 1" "0,1" bitfld.long 0x0 0. "FFASS0,Filter FIFO assignment for filter 0" "0,1" group.long 0x21C++0x3 line.long 0x0 "FACT,CAN filter activation register" bitfld.long 0x0 13. "FACT13,Filter active" "0,1" bitfld.long 0x0 12. "FACT12,Filter active" "0,1" bitfld.long 0x0 11. "FACT11,Filter active" "0,1" bitfld.long 0x0 10. "FACT10,Filter active" "0,1" bitfld.long 0x0 9. "FACT9,Filter active" "0,1" bitfld.long 0x0 8. "FACT8,Filter active" "0,1" bitfld.long 0x0 7. "FACT7,Filter active" "0,1" bitfld.long 0x0 6. "FACT6,Filter active" "0,1" newline bitfld.long 0x0 5. "FACT5,Filter active" "0,1" bitfld.long 0x0 4. "FACT4,Filter active" "0,1" bitfld.long 0x0 3. "FACT3,Filter active" "0,1" bitfld.long 0x0 2. "FACT2,Filter active" "0,1" bitfld.long 0x0 1. "FACT1,Filter active" "0,1" bitfld.long 0x0 0. "FACT0,Filter active" "0,1" group.long 0x240++0x6F line.long 0x0 "F0BANK1,Filter bank 0 register 1" bitfld.long 0x0 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x0 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x0 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x0 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x0 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x0 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x0 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x0 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x0 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x0 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x0 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x0 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x0 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x0 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x0 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x0 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x0 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x0 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x0 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x0 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x0 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x0 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x0 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x0 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x0 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x0 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x0 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x0 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x0 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x0 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x0 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x0 0. "FBIT0,Filter bits" "0,1" line.long 0x4 "F0BANK2,Filter bank 0 register 2" bitfld.long 0x4 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x4 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x4 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x4 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x4 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x4 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x4 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x4 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x4 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x4 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x4 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x4 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x4 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x4 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x4 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x4 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x4 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x4 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x4 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x4 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x4 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x4 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x4 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x4 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x4 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x4 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x4 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x4 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x4 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x4 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x4 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x4 0. "FBIT0,Filter bits" "0,1" line.long 0x8 "F1BANK1,Filter bank 1 register 1" bitfld.long 0x8 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x8 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x8 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x8 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x8 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x8 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x8 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x8 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x8 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x8 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x8 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x8 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x8 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x8 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x8 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x8 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x8 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x8 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x8 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x8 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x8 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x8 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x8 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x8 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x8 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x8 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x8 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x8 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x8 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x8 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x8 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x8 0. "FBIT0,Filter bits" "0,1" line.long 0xC "F1BANK2,Filter bank 1 register 2" bitfld.long 0xC 31. "FBIT31,Filter bits" "0,1" bitfld.long 0xC 30. "FBIT30,Filter bits" "0,1" bitfld.long 0xC 29. "FBIT29,Filter bits" "0,1" bitfld.long 0xC 28. "FBIT28,Filter bits" "0,1" bitfld.long 0xC 27. "FBIT27,Filter bits" "0,1" bitfld.long 0xC 26. "FBIT26,Filter bits" "0,1" bitfld.long 0xC 25. "FBIT25,Filter bits" "0,1" bitfld.long 0xC 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0xC 23. "FBIT23,Filter bits" "0,1" bitfld.long 0xC 22. "FBIT22,Filter bits" "0,1" bitfld.long 0xC 21. "FBIT21,Filter bits" "0,1" bitfld.long 0xC 20. "FBIT20,Filter bits" "0,1" bitfld.long 0xC 19. "FBIT19,Filter bits" "0,1" bitfld.long 0xC 18. "FBIT18,Filter bits" "0,1" bitfld.long 0xC 17. "FBIT17,Filter bits" "0,1" bitfld.long 0xC 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0xC 15. "FBIT15,Filter bits" "0,1" bitfld.long 0xC 14. "FBIT14,Filter bits" "0,1" bitfld.long 0xC 13. "FBIT13,Filter bits" "0,1" bitfld.long 0xC 12. "FBIT12,Filter bits" "0,1" bitfld.long 0xC 11. "FBIT11,Filter bits" "0,1" bitfld.long 0xC 10. "FBIT10,Filter bits" "0,1" bitfld.long 0xC 9. "FBIT9,Filter bits" "0,1" bitfld.long 0xC 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0xC 7. "FBIT7,Filter bits" "0,1" bitfld.long 0xC 6. "FBIT6,Filter bits" "0,1" bitfld.long 0xC 5. "FBIT5,Filter bits" "0,1" bitfld.long 0xC 4. "FBIT4,Filter bits" "0,1" bitfld.long 0xC 3. "FBIT3,Filter bits" "0,1" bitfld.long 0xC 2. "FBIT2,Filter bits" "0,1" bitfld.long 0xC 1. "FBIT1,Filter bits" "0,1" bitfld.long 0xC 0. "FBIT0,Filter bits" "0,1" line.long 0x10 "F2BANK1,Filter bank 2 register 1" bitfld.long 0x10 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x10 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x10 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x10 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x10 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x10 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x10 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x10 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x10 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x10 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x10 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x10 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x10 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x10 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x10 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x10 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x10 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x10 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x10 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x10 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x10 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x10 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x10 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x10 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x10 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x10 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x10 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x10 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x10 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x10 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x10 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x10 0. "FBIT0,Filter bits" "0,1" line.long 0x14 "F2BANK2,Filter bank 2 register 2" bitfld.long 0x14 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x14 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x14 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x14 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x14 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x14 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x14 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x14 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x14 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x14 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x14 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x14 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x14 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x14 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x14 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x14 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x14 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x14 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x14 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x14 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x14 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x14 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x14 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x14 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x14 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x14 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x14 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x14 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x14 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x14 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x14 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x14 0. "FBIT0,Filter bits" "0,1" line.long 0x18 "F3BANK1,Filter bank 3 register 1" bitfld.long 0x18 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x18 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x18 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x18 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x18 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x18 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x18 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x18 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x18 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x18 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x18 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x18 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x18 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x18 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x18 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x18 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x18 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x18 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x18 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x18 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x18 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x18 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x18 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x18 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x18 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x18 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x18 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x18 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x18 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x18 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x18 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x18 0. "FBIT0,Filter bits" "0,1" line.long 0x1C "F3BANK2,Filter bank 3 register 2" bitfld.long 0x1C 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x1C 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x1C 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x1C 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x1C 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x1C 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x1C 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x1C 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x1C 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x1C 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x1C 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x1C 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x1C 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x1C 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x1C 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x1C 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x1C 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x1C 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x1C 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x1C 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x1C 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x1C 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x1C 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x1C 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x1C 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x1C 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x1C 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x1C 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x1C 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x1C 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x1C 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x1C 0. "FBIT0,Filter bits" "0,1" line.long 0x20 "F4BANK1,Filter bank 4 register 1" bitfld.long 0x20 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x20 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x20 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x20 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x20 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x20 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x20 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x20 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x20 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x20 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x20 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x20 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x20 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x20 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x20 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x20 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x20 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x20 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x20 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x20 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x20 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x20 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x20 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x20 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x20 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x20 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x20 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x20 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x20 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x20 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x20 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x20 0. "FBIT0,Filter bits" "0,1" line.long 0x24 "F4BANK2,Filter bank 4 register 2" bitfld.long 0x24 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x24 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x24 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x24 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x24 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x24 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x24 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x24 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x24 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x24 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x24 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x24 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x24 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x24 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x24 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x24 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x24 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x24 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x24 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x24 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x24 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x24 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x24 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x24 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x24 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x24 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x24 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x24 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x24 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x24 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x24 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x24 0. "FBIT0,Filter bits" "0,1" line.long 0x28 "F5BANK1,Filter bank 5 register 1" bitfld.long 0x28 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x28 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x28 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x28 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x28 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x28 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x28 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x28 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x28 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x28 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x28 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x28 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x28 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x28 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x28 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x28 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x28 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x28 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x28 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x28 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x28 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x28 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x28 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x28 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x28 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x28 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x28 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x28 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x28 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x28 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x28 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x28 0. "FBIT0,Filter bits" "0,1" line.long 0x2C "F5BANK2,Filter bank 5 register 2" bitfld.long 0x2C 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x2C 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x2C 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x2C 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x2C 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x2C 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x2C 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x2C 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x2C 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x2C 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x2C 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x2C 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x2C 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x2C 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x2C 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x2C 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x2C 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x2C 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x2C 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x2C 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x2C 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x2C 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x2C 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x2C 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x2C 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x2C 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x2C 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x2C 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x2C 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x2C 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x2C 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x2C 0. "FBIT0,Filter bits" "0,1" line.long 0x30 "F6BANK1,Filter bank 6 register 1" bitfld.long 0x30 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x30 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x30 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x30 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x30 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x30 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x30 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x30 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x30 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x30 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x30 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x30 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x30 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x30 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x30 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x30 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x30 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x30 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x30 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x30 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x30 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x30 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x30 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x30 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x30 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x30 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x30 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x30 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x30 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x30 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x30 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x30 0. "FBIT0,Filter bits" "0,1" line.long 0x34 "F6BANK2,Filter bank 6 register 1" bitfld.long 0x34 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x34 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x34 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x34 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x34 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x34 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x34 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x34 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x34 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x34 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x34 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x34 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x34 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x34 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x34 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x34 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x34 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x34 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x34 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x34 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x34 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x34 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x34 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x34 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x34 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x34 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x34 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x34 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x34 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x34 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x34 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x34 0. "FBIT0,Filter bits" "0,1" line.long 0x38 "F7BANK1,Filter bank 7 register 1" bitfld.long 0x38 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x38 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x38 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x38 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x38 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x38 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x38 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x38 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x38 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x38 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x38 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x38 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x38 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x38 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x38 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x38 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x38 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x38 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x38 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x38 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x38 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x38 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x38 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x38 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x38 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x38 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x38 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x38 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x38 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x38 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x38 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x38 0. "FBIT0,Filter bits" "0,1" line.long 0x3C "F7BANK2,Filter bank 7 register 2" bitfld.long 0x3C 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x3C 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x3C 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x3C 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x3C 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x3C 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x3C 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x3C 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x3C 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x3C 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x3C 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x3C 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x3C 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x3C 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x3C 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x3C 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x3C 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x3C 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x3C 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x3C 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x3C 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x3C 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x3C 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x3C 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x3C 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x3C 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x3C 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x3C 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x3C 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x3C 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x3C 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x3C 0. "FBIT0,Filter bits" "0,1" line.long 0x40 "F8BANK1,Filter bank 8 register 1" bitfld.long 0x40 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x40 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x40 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x40 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x40 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x40 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x40 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x40 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x40 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x40 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x40 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x40 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x40 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x40 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x40 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x40 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x40 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x40 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x40 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x40 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x40 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x40 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x40 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x40 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x40 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x40 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x40 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x40 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x40 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x40 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x40 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x40 0. "FBIT0,Filter bits" "0,1" line.long 0x44 "F8BANK2,Filter bank 8 register 2" bitfld.long 0x44 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x44 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x44 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x44 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x44 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x44 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x44 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x44 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x44 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x44 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x44 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x44 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x44 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x44 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x44 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x44 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x44 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x44 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x44 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x44 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x44 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x44 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x44 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x44 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x44 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x44 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x44 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x44 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x44 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x44 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x44 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x44 0. "FBIT0,Filter bits" "0,1" line.long 0x48 "F9BANK1,Filter bank 9 register 1" bitfld.long 0x48 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x48 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x48 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x48 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x48 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x48 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x48 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x48 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x48 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x48 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x48 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x48 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x48 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x48 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x48 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x48 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x48 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x48 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x48 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x48 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x48 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x48 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x48 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x48 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x48 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x48 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x48 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x48 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x48 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x48 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x48 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x48 0. "FBIT0,Filter bits" "0,1" line.long 0x4C "F9BANK2,Filter bank 9 register 2" bitfld.long 0x4C 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x4C 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x4C 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x4C 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x4C 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x4C 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x4C 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x4C 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x4C 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x4C 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x4C 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x4C 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x4C 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x4C 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x4C 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x4C 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x4C 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x4C 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x4C 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x4C 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x4C 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x4C 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x4C 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x4C 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x4C 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x4C 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x4C 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x4C 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x4C 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x4C 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x4C 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x4C 0. "FBIT0,Filter bits" "0,1" line.long 0x50 "F10BANK1,Filter bank 10 register 1" bitfld.long 0x50 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x50 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x50 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x50 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x50 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x50 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x50 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x50 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x50 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x50 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x50 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x50 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x50 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x50 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x50 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x50 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x50 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x50 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x50 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x50 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x50 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x50 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x50 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x50 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x50 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x50 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x50 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x50 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x50 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x50 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x50 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x50 0. "FBIT0,Filter bits" "0,1" line.long 0x54 "F10BANK2,Filter bank 10 register 2" bitfld.long 0x54 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x54 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x54 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x54 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x54 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x54 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x54 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x54 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x54 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x54 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x54 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x54 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x54 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x54 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x54 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x54 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x54 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x54 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x54 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x54 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x54 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x54 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x54 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x54 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x54 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x54 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x54 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x54 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x54 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x54 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x54 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x54 0. "FBIT0,Filter bits" "0,1" line.long 0x58 "F11BANK1,Filter bank 11 register 1" bitfld.long 0x58 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x58 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x58 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x58 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x58 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x58 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x58 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x58 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x58 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x58 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x58 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x58 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x58 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x58 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x58 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x58 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x58 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x58 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x58 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x58 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x58 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x58 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x58 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x58 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x58 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x58 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x58 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x58 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x58 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x58 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x58 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x58 0. "FBIT0,Filter bits" "0,1" line.long 0x5C "F11BANK2,Filter bank 11 register 2" bitfld.long 0x5C 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x5C 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x5C 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x5C 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x5C 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x5C 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x5C 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x5C 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x5C 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x5C 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x5C 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x5C 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x5C 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x5C 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x5C 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x5C 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x5C 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x5C 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x5C 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x5C 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x5C 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x5C 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x5C 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x5C 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x5C 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x5C 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x5C 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x5C 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x5C 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x5C 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x5C 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x5C 0. "FBIT0,Filter bits" "0,1" line.long 0x60 "F12BANK1,Filter bank 12 register 1" bitfld.long 0x60 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x60 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x60 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x60 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x60 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x60 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x60 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x60 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x60 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x60 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x60 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x60 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x60 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x60 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x60 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x60 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x60 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x60 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x60 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x60 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x60 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x60 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x60 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x60 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x60 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x60 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x60 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x60 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x60 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x60 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x60 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x60 0. "FBIT0,Filter bits" "0,1" line.long 0x64 "F12BANK2,Filter bank 12 register 2" bitfld.long 0x64 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x64 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x64 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x64 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x64 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x64 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x64 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x64 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x64 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x64 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x64 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x64 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x64 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x64 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x64 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x64 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x64 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x64 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x64 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x64 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x64 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x64 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x64 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x64 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x64 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x64 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x64 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x64 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x64 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x64 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x64 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x64 0. "FBIT0,Filter bits" "0,1" line.long 0x68 "F13BANK1,Filter bank 13 register 1" bitfld.long 0x68 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x68 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x68 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x68 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x68 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x68 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x68 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x68 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x68 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x68 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x68 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x68 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x68 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x68 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x68 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x68 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x68 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x68 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x68 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x68 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x68 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x68 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x68 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x68 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x68 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x68 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x68 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x68 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x68 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x68 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x68 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x68 0. "FBIT0,Filter bits" "0,1" line.long 0x6C "F13BANK2,Filter bank 13 register 2" bitfld.long 0x6C 31. "FBIT31,Filter bits" "0,1" bitfld.long 0x6C 30. "FBIT30,Filter bits" "0,1" bitfld.long 0x6C 29. "FBIT29,Filter bits" "0,1" bitfld.long 0x6C 28. "FBIT28,Filter bits" "0,1" bitfld.long 0x6C 27. "FBIT27,Filter bits" "0,1" bitfld.long 0x6C 26. "FBIT26,Filter bits" "0,1" bitfld.long 0x6C 25. "FBIT25,Filter bits" "0,1" bitfld.long 0x6C 24. "FBIT24,Filter bits" "0,1" newline bitfld.long 0x6C 23. "FBIT23,Filter bits" "0,1" bitfld.long 0x6C 22. "FBIT22,Filter bits" "0,1" bitfld.long 0x6C 21. "FBIT21,Filter bits" "0,1" bitfld.long 0x6C 20. "FBIT20,Filter bits" "0,1" bitfld.long 0x6C 19. "FBIT19,Filter bits" "0,1" bitfld.long 0x6C 18. "FBIT18,Filter bits" "0,1" bitfld.long 0x6C 17. "FBIT17,Filter bits" "0,1" bitfld.long 0x6C 16. "FBIT16,Filter bits" "0,1" newline bitfld.long 0x6C 15. "FBIT15,Filter bits" "0,1" bitfld.long 0x6C 14. "FBIT14,Filter bits" "0,1" bitfld.long 0x6C 13. "FBIT13,Filter bits" "0,1" bitfld.long 0x6C 12. "FBIT12,Filter bits" "0,1" bitfld.long 0x6C 11. "FBIT11,Filter bits" "0,1" bitfld.long 0x6C 10. "FBIT10,Filter bits" "0,1" bitfld.long 0x6C 9. "FBIT9,Filter bits" "0,1" bitfld.long 0x6C 8. "FBIT8,Filter bits" "0,1" newline bitfld.long 0x6C 7. "FBIT7,Filter bits" "0,1" bitfld.long 0x6C 6. "FBIT6,Filter bits" "0,1" bitfld.long 0x6C 5. "FBIT5,Filter bits" "0,1" bitfld.long 0x6C 4. "FBIT4,Filter bits" "0,1" bitfld.long 0x6C 3. "FBIT3,Filter bits" "0,1" bitfld.long 0x6C 2. "FBIT2,Filter bits" "0,1" bitfld.long 0x6C 1. "FBIT1,Filter bits" "0,1" bitfld.long 0x6C 0. "FBIT0,Filter bits" "0,1" tree.end endif sif (cpuis("APM32F051*")||cpuis("APM32F071*")||cpuis("APM32F072*")||cpuis("APM32F091*")) tree "CEC (Consumer Electronic Controller)" base ad:0x40007800 group.long 0x0++0x7 line.long 0x0 "CTRL,CEC control register" bitfld.long 0x0 2. "TXEM,Tx End Of Message" "0,1" bitfld.long 0x0 1. "TXSM,Tx Start Of Message" "0,1" bitfld.long 0x0 0. "CECEN,CEC Enable" "0,1" line.long 0x4 "CFG,CEC configuration register" bitfld.long 0x4 31. "LMODSEL,Listen mode" "0,1" hexmask.long.word 0x4 16.--30. 1. "OACFG,Own addresses configuration" bitfld.long 0x4 8. "SFTOB,SFT Option Bit" "0,1" bitfld.long 0x4 7. "AEBGIB,Avoid Error-Bit Generation in Broadcast" "0,1" bitfld.long 0x4 6. "GELBPERR,Generate Error-Bit on Long Bit Period Error" "0,1" bitfld.long 0x4 5. "GEBRERR,Generate Error-Bit on Bit Rising Error" "0,1" bitfld.long 0x4 4. "RXSBRERR,Rx-Stop on Bit Rising Error" "0,1" bitfld.long 0x4 3. "RXTCFG,Rx-Tolerance" "0,1" bitfld.long 0x4 0.--2. "SFTCFG,Signal Free Time" "0,1,2,3,4,5,6,7" wgroup.long 0x8++0x3 line.long 0x0 "TXDATA,CEC Tx data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,Tx Data register" rgroup.long 0xC++0x3 line.long 0x0 "RXDATA,CEC Rx data register" hexmask.long.byte 0x0 0.--7. 1. "RXDATA,Rx Data register" group.long 0x10++0x7 line.long 0x0 "STS,CEC Interrupt and Status Register" bitfld.long 0x0 12. "TXMACKFLG,Tx-Missing Acknowledge Error" "0,1" bitfld.long 0x0 11. "TXERRFLG,Tx-Error" "0,1" bitfld.long 0x0 10. "TXBUFLG,Tx-Buffer Underrun" "0,1" bitfld.long 0x0 9. "TXEFLG,End of Transmission" "0,1" bitfld.long 0x0 8. "TXBREFLG,Tx-Byte Request" "0,1" bitfld.long 0x0 7. "ARBLOSFLG,Arbitration Lost" "0,1" bitfld.long 0x0 6. "RXMACKFLG,Rx-Missing Acknowledge" "0,1" bitfld.long 0x0 5. "RXLBPEFLG,Rx-Long Bit Period Error" "0,1" bitfld.long 0x0 4. "RXSBPEFLG,Rx-Short Bit Period Error" "0,1" newline bitfld.long 0x0 3. "RXBRERRFLG,Rx-Bit Rising Error" "0,1" bitfld.long 0x0 2. "RXOVRFLG,Rx-Overrun" "0,1" bitfld.long 0x0 1. "RXEFLG,End Of Reception" "0,1" bitfld.long 0x0 0. "RXBREFLG,Rx-Byte Received" "0,1" line.long 0x4 "INTEN,CEC interrupt enable register" bitfld.long 0x4 12. "TXMACKIEN,Tx-Missing Acknowledge Error Interrupt Enable" "0,1" bitfld.long 0x4 11. "TXERRIEN,Tx-Error Interrupt Enable" "0,1" bitfld.long 0x4 10. "TXBUIEN,Tx-Underrun Interrupt Enable" "0,1" bitfld.long 0x4 9. "TXIEN,Tx-End Of Message Interrupt Enable" "0,1" bitfld.long 0x4 8. "TXBREIEN,Tx-Byte Request Interrupt Enable" "0,1" bitfld.long 0x4 7. "ARBLOSIEN,Arbitration Lost Interrupt Enable" "0,1" bitfld.long 0x4 6. "RXMACKIEN,Rx-Missing Acknowledge Error Interrupt Enable" "0,1" bitfld.long 0x4 5. "RXLBPEIEN,Long Bit Period Error Interrupt Enable" "0,1" bitfld.long 0x4 4. "RXSBPEIEN,Short Bit Period Error Interrupt Enable" "0,1" newline bitfld.long 0x4 3. "RXBRERRIEN,Bit Rising Error Interrupt Enable" "0,1" bitfld.long 0x4 2. "RXOVRIEN,Rx-Buffer Overrun Interrupt Enable" "0,1" bitfld.long 0x4 1. "RXEIEN,End Of Reception Interrupt Enable" "0,1" bitfld.long 0x4 0. "RXBREIEN,Rx-Byte Received Interrupt Enable" "0,1" tree.end endif sif (cpuis("APM32F071*")||cpuis("APM32F072*")||cpuis("APM32F091*")) tree "COMP (Comparator)" base ad:0x4001001C group.long 0x0++0x3 line.long 0x0 "CSTS,control and status register" bitfld.long 0x0 31. "LOCK2,Comparator 2 lock" "0,1" rbitfld.long 0x0 30. "OUTSTS2,Comparator 2 output" "0,1" bitfld.long 0x0 28.--29. "HYSCFG2,Comparator 2 hysteresis" "0,1,2,3" bitfld.long 0x0 27. "OPINV2,Comparator 2 output" "0,1" bitfld.long 0x0 24.--26. "OUTSEL2,Comparator 2 output" "0,1,2,3,4,5,6,7" bitfld.long 0x0 23. "WMODEN,Window mode enable" "0,1" bitfld.long 0x0 20.--22. "INVINSEL2,Comparator 2 inverting input" "0,1,2,3,4,5,6,7" bitfld.long 0x0 18.--19. "MOD2,Comparator 2 mode" "0,1,2,3" bitfld.long 0x0 16. "EN2,Comparator 2 enable" "0,1" bitfld.long 0x0 15. "LOCK1,Comparator 1 lock" "0,1" newline rbitfld.long 0x0 14. "OUTSTS1,Comparator 1 output" "0,1" bitfld.long 0x0 12.--13. "HYSCFG1,Comparator 1 hysteresis" "0,1,2,3" bitfld.long 0x0 11. "OPINV1,Comparator 1 output" "0,1" bitfld.long 0x0 8.--10. "OUTSEL1,Comparator 1 output" "0,1,2,3,4,5,6,7" bitfld.long 0x0 4.--6. "INVINSEL1,Comparator 1 inverting input" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2.--3. "MOD1,Comparator 1 mode" "0,1,2,3" bitfld.long 0x0 1. "SW1,COMP1SW" "0,1" bitfld.long 0x0 0. "EN1,Comparator 1 enable" "0,1" tree.end endif tree "CRC (Cyclic Redundancy Check Computing Unit)" base ad:0x40023000 group.long 0x0++0xB line.long 0x0 "DATA,Data register" hexmask.long 0x0 0.--31. 1. "DATA,Data register bits" line.long 0x4 "INDATA,Independent data register" hexmask.long.byte 0x4 0.--7. 1. "INDATA,General-purpose 8-bit data register bits" line.long 0x8 "CTRL,Control register" bitfld.long 0x8 7. "REVO,Reverse output data" "0,1" bitfld.long 0x8 5.--6. "REVI,Reverse input data" "0,1,2,3" sif (cpuis("APM32F070*")) bitfld.long 0x8 3.--4. "POLSIZE,Polynomial size" "0,1,2,3" endif sif (cpuis("APM32F071*")) bitfld.long 0x8 3.--4. "POLSIZE,Polynomial size" "0,1,2,3" endif sif (cpuis("APM32F072*")) bitfld.long 0x8 3.--4. "POLSIZE,Polynomial size" "0,1,2,3" endif sif (cpuis("APM32F091*")) bitfld.long 0x8 3.--4. "POLSIZE,Polynomial size" "0,1,2,3" endif bitfld.long 0x8 0. "RST,reset bit" "0,1" group.long 0x10++0x3 line.long 0x0 "INITVAL,Initial CRC value" hexmask.long 0x0 0.--31. 1. "VALUE,Programmable initial CRC value" sif (cpuis("APM32F070*")) group.long 0x14++0x3 line.long 0x0 "POL,Programmable polynomial" hexmask.long 0x0 0.--31. 1. "PPOL,Programmable polynomial" endif sif (cpuis("APM32F071*")) group.long 0x14++0x3 line.long 0x0 "POL,Programmable polynomial" hexmask.long 0x0 0.--31. 1. "PPOL,Programmable polynomial" endif sif (cpuis("APM32F072*")) group.long 0x14++0x3 line.long 0x0 "POL,Programmable polynomial" hexmask.long 0x0 0.--31. 1. "PPOL,Programmable polynomial" endif sif (cpuis("APM32F091*")) group.long 0x14++0x3 line.long 0x0 "POL,Programmable polynomial" hexmask.long 0x0 0.--31. 1. "PPOL,Programmable polynomial" endif tree.end sif (cpuis("APM32F071*")||cpuis("APM32F072*")||cpuis("APM32F091*")) tree "CRS (Clock Recovery System)" base ad:0x40006C00 group.long 0x0++0x7 line.long 0x0 "CTRL,CRS control register" hexmask.long.byte 0x0 8.--13. 1. "HSI48TRM,HIRC48 oscillator smooth trimming" bitfld.long 0x0 7. "SWSGNR,Generate software SYNC event" "0,1" bitfld.long 0x0 6. "AUTOTRMEN,Automatic trimming enable" "0,1" bitfld.long 0x0 5. "CNTEN,Frequency error counter enable" "0,1" bitfld.long 0x0 3. "ESINTEN,Expected SYNC interrupt enable" "0,1" bitfld.long 0x0 2. "EINTEN,Synchronization or trimming error interrupt enable" "0,1" bitfld.long 0x0 1. "SWINTEN,SYNC warning interrupt enable" "0,1" bitfld.long 0x0 0. "SNINTEN,SYNC event OK interrupt enable" "0,1" line.long 0x4 "CFG,CRS configuration register" bitfld.long 0x4 31. "SYNCPOLSEL,SYNC polarity selection" "0,1" bitfld.long 0x4 28.--29. "SYNCSRCSEL,SYNC signal source selection" "0,1,2,3" bitfld.long 0x4 24.--26. "SYNCPSC,SYNC divider" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 16.--23. 1. "FELMT,Frequency error limit" hexmask.long.word 0x4 0.--15. 1. "RLDVAL,Counter reload value" rgroup.long 0x8++0x3 line.long 0x0 "INTSTS,CRS interrupt and status register" hexmask.long.word 0x0 16.--31. 1. "FECPT,Frequency error capture" bitfld.long 0x0 15. "CNTDRCT,Frequency error direction" "0,1" bitfld.long 0x0 10. "TRMFLG,Trimming overflow or underflow" "0,1" bitfld.long 0x0 9. "SYNCMISS,SYNC missed" "0,1" bitfld.long 0x0 8. "ERRORFLG,SYNC error" "0,1" bitfld.long 0x0 3. "ESFLG,Expected SYNC flag" "0,1" bitfld.long 0x0 2. "EFLG,Error flag" "0,1" bitfld.long 0x0 1. "SWFLG,SYNC warning flag" "0,1" newline bitfld.long 0x0 0. "SNFLG,SYNC event OK flag" "0,1" group.long 0xC++0x3 line.long 0x0 "INTCLR,CRS interrupt flag clear register" bitfld.long 0x0 3. "ESCLR,Expected SYNC clear flag" "0,1" bitfld.long 0x0 2. "ECLR,Error clear flag" "0,1" bitfld.long 0x0 1. "SWCLR,SYNC warning clear flag" "0,1" bitfld.long 0x0 0. "SNCLR,SYNC event OK clear flag" "0,1" tree.end endif sif (cpuis("APM32F051*")||cpuis("APM32F071*")||cpuis("APM32F072*")||cpuis("APM32F091*")) tree "DAC (Digital-to-Analog Converter)" base ad:0x40007400 group.long 0x0++0x3 line.long 0x0 "CTRL,DAC control register" sif (cpuis("APM32F071*")) bitfld.long 0x0 29. "DMAUDRIEN2,DAC channel2 DMA underrun interrupt enable" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x0 29. "DMAUDRIEN2,DAC channel2 DMA underrun interrupt enable" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x0 29. "DMAUDRIEN2,DAC channel2 DMA underrun interrupt enable" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x0 28. "DMAENCH2,DAC channel2 DMA enable" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x0 28. "DMAENCH2,DAC channel2 DMA enable" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x0 28. "DMAENCH2,DAC channel2 DMA enable" "0,1" endif sif (cpuis("APM32F071*")) hexmask.long.byte 0x0 24.--27. 1. "MAMPSELCH2,DAC channel2 mask/amplitude selector" endif sif (cpuis("APM32F072*")) hexmask.long.byte 0x0 24.--27. 1. "MAMPSELCH2,DAC channel2 mask/amplitude selector" newline endif sif (cpuis("APM32F091*")) hexmask.long.byte 0x0 24.--27. 1. "MAMPSELCH2,DAC channel2 mask/amplitude selector" endif sif (cpuis("APM32F071*")) bitfld.long 0x0 22.--23. "WAVENCH2,DAC channel2 noise/triangle wave generation enable" "0,1,2,3" endif sif (cpuis("APM32F072*")) bitfld.long 0x0 22.--23. "WAVENCH2,DAC channel2 noise/triangle wave generation enable" "0,1,2,3" endif sif (cpuis("APM32F091*")) bitfld.long 0x0 22.--23. "WAVENCH2,DAC channel2 noise/triangle wave generation enable" "0,1,2,3" endif sif (cpuis("APM32F071*")) bitfld.long 0x0 19.--21. "TRGSELCH2,DAC channel2 trigger selection" "0,1,2,3,4,5,6,7" endif sif (cpuis("APM32F072*")) bitfld.long 0x0 19.--21. "TRGSELCH2,DAC channel2 trigger selection" "0,1,2,3,4,5,6,7" endif sif (cpuis("APM32F091*")) bitfld.long 0x0 19.--21. "TRGSELCH2,DAC channel2 trigger selection" "0,1,2,3,4,5,6,7" endif sif (cpuis("APM32F071*")) bitfld.long 0x0 18. "TRGENCH2,DAC channel2 trigger enable" "0,1" newline endif sif (cpuis("APM32F072*")) bitfld.long 0x0 18. "TRGENCH2,DAC channel2 trigger enable" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x0 18. "TRGENCH2,DAC channel2 trigger enable" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x0 17. "BUFFDCH2,DAC channel2 output buffer disable" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x0 17. "BUFFDCH2,DAC channel2 output buffer disable" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x0 17. "BUFFDCH2,DAC channel2 output buffer disable" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x0 16. "ENCH2,DAC channel2 enable" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x0 16. "ENCH2,DAC channel2 enable" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x0 16. "ENCH2,DAC channel2 enable" "0,1" newline endif bitfld.long 0x0 13. "DMAUDRIEN1,DAC channel1 DMA Underrun Interrupt enable" "0,1" bitfld.long 0x0 12. "DMAENCH1,DAC channel1 DMA enable" "0,1" sif (cpuis("APM32F071*")) hexmask.long.byte 0x0 8.--11. 1. "MAMPSELCH1,DAC channel1 mask/amplitude selector" endif sif (cpuis("APM32F072*")) hexmask.long.byte 0x0 8.--11. 1. "MAMPSELCH1,DAC channel1 mask/amplitude selector" endif sif (cpuis("APM32F091*")) hexmask.long.byte 0x0 8.--11. 1. "MAMPSELCH1,DAC channel1 mask/amplitude selector" endif newline sif (cpuis("APM32F071*")) bitfld.long 0x0 6.--7. "WAVENCH1,DAC channel1 noise/triangle wave generation enable" "0,1,2,3" endif sif (cpuis("APM32F072*")) bitfld.long 0x0 6.--7. "WAVENCH1,DAC channel1 noise/triangle wave generation enable" "0,1,2,3" endif sif (cpuis("APM32F091*")) bitfld.long 0x0 6.--7. "WAVENCH1,DAC channel1 noise/triangle wave generation enable" "0,1,2,3" newline endif bitfld.long 0x0 3.--5. "TRGSELCH1,DAC channel1 trigger selection" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "TRGENCH1,DAC channel1 trigger enable" "0,1" bitfld.long 0x0 1. "BUFFDCH1,DAC channel1 output buffer disable" "0,1" bitfld.long 0x0 0. "ENCH1,DAC channel1 enable" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "SWTRG,DAC software trigger register" sif (cpuis("APM32F071*")) bitfld.long 0x0 1. "SWTRG2,DAC channel2 software trigger" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x0 1. "SWTRG2,DAC channel2 software trigger" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x0 1. "SWTRG2,DAC channel2 software trigger" "0,1" endif bitfld.long 0x0 0. "SWTRG1,DAC channel1 software trigger" "0,1" group.long 0x8++0xB line.long 0x0 "DH12R1,DAC channel1 12-bit right-aligned data holding register" hexmask.long.word 0x0 0.--11. 1. "DATA,DAC channel1 12-bit right-aligned data" line.long 0x4 "DH12L1,DAC channel1 12-bit left-aligned data holding register" hexmask.long.word 0x4 4.--15. 1. "DATA,DAC channel1 12-bit left-aligned data" line.long 0x8 "DH8R1,DAC channel1 8-bit right-aligned data holding register" hexmask.long.byte 0x8 0.--7. 1. "DATA,DAC channel1 8-bit right-aligned data" sif (cpuis("APM32F071*")) group.long 0x14++0x13 line.long 0x0 "DH12R2,DAC channel2 12-bit right-aligned data holding register" hexmask.long.word 0x0 0.--11. 1. "DATA,DAC channel2 12-bit right-aligned data" line.long 0x4 "DH12L2,DAC channel2 12-bit left-aligned data holding register" hexmask.long.word 0x4 4.--15. 1. "DATA,DAC channel2 12-bit left-aligned data" line.long 0x8 "DH8R2,DAC channel2 8-bit right-aligned data holding register" hexmask.long.byte 0x8 0.--7. 1. "DATA,DAC channel2 8-bit right-aligned data" line.long 0xC "DH12RDUAL,Dual DAC 12-bit right-aligned data holding register" hexmask.long.word 0xC 16.--27. 1. "DATACH2,DAC channel2 12-bit right-aligned data" hexmask.long.word 0xC 0.--11. 1. "DATACH1,DAC channel1 12-bit right-aligned data" line.long 0x10 "DH12LDUAL,Dual DAC 12-bit left-aligned data holding register" hexmask.long.word 0x10 20.--31. 1. "DATACH2,DAC channel2 12-bit left-aligned data" hexmask.long.word 0x10 4.--15. 1. "DATACH1,DAC channel1 12-bit left-aligned data" rgroup.long 0x30++0x3 line.long 0x0 "DATAOCH2,DAC channel2 data output register" hexmask.long.word 0x0 0.--11. 1. "DATA,DAC channel2 data output" endif sif (cpuis("APM32F072*")) group.long 0x14++0x13 line.long 0x0 "DH12R2,DAC channel2 12-bit right-aligned data holding register" hexmask.long.word 0x0 0.--11. 1. "DATA,DAC channel2 12-bit right-aligned data" line.long 0x4 "DH12L2,DAC channel2 12-bit left-aligned data holding register" hexmask.long.word 0x4 4.--15. 1. "DATA,DAC channel2 12-bit left-aligned data" line.long 0x8 "DH8R2,DAC channel2 8-bit right-aligned data holding register" hexmask.long.byte 0x8 0.--7. 1. "DATA,DAC channel2 8-bit right-aligned data" line.long 0xC "DH12RDUAL,Dual DAC 12-bit right-aligned data holding register" hexmask.long.word 0xC 16.--27. 1. "DATACH2,DAC channel2 12-bit right-aligned data" hexmask.long.word 0xC 0.--11. 1. "DATACH1,DAC channel1 12-bit right-aligned data" line.long 0x10 "DH12LDUAL,Dual DAC 12-bit left-aligned data holding register" hexmask.long.word 0x10 20.--31. 1. "DATACH2,DAC channel2 12-bit left-aligned data" hexmask.long.word 0x10 4.--15. 1. "DATACH1,DAC channel1 12-bit left-aligned data" rgroup.long 0x30++0x3 line.long 0x0 "DATAOCH2,DAC channel2 data output register" hexmask.long.word 0x0 0.--11. 1. "DATA,DAC channel2 data output" endif sif (cpuis("APM32F091*")) group.long 0x14++0x13 line.long 0x0 "DH12R2,DAC channel2 12-bit right-aligned data holding register" hexmask.long.word 0x0 0.--11. 1. "DATA,DAC channel2 12-bit right-aligned data" line.long 0x4 "DH12L2,DAC channel2 12-bit left-aligned data holding register" hexmask.long.word 0x4 4.--15. 1. "DATA,DAC channel2 12-bit left-aligned data" line.long 0x8 "DH8R2,DAC channel2 8-bit right-aligned data holding register" hexmask.long.byte 0x8 0.--7. 1. "DATA,DAC channel2 8-bit right-aligned data" line.long 0xC "DH12RDUAL,Dual DAC 12-bit right-aligned data holding register" hexmask.long.word 0xC 16.--27. 1. "DATACH2,DAC channel2 12-bit right-aligned data" hexmask.long.word 0xC 0.--11. 1. "DATACH1,DAC channel1 12-bit right-aligned data" line.long 0x10 "DH12LDUAL,Dual DAC 12-bit left-aligned data holding register" hexmask.long.word 0x10 20.--31. 1. "DATACH2,DAC channel2 12-bit left-aligned data" hexmask.long.word 0x10 4.--15. 1. "DATACH1,DAC channel1 12-bit left-aligned data" rgroup.long 0x30++0x3 line.long 0x0 "DATAOCH2,DAC channel2 data output register" hexmask.long.word 0x0 0.--11. 1. "DATA,DAC channel2 data output" endif group.long 0x28++0x3 line.long 0x0 "DH8RDUAL,Dual DAC 8-bit right-aligned data holding register" sif (cpuis("APM32F071*")) hexmask.long.byte 0x0 8.--15. 1. "DATACH2,DAC channel2 8-bit right-aligned data" endif sif (cpuis("APM32F072*")) hexmask.long.byte 0x0 8.--15. 1. "DATACH2,DAC channel2 8-bit right-aligned data" endif sif (cpuis("APM32F091*")) hexmask.long.byte 0x0 8.--15. 1. "DATACH2,DAC channel2 8-bit right-aligned data" endif hexmask.long.byte 0x0 0.--7. 1. "DATACH1,DAC channel1 8-bit right-aligned data" rgroup.long 0x2C++0x3 line.long 0x0 "DATAOCH1,DAC channel1 data output register" hexmask.long.word 0x0 0.--11. 1. "DATA,DAC channel1 data output" group.long 0x34++0x3 line.long 0x0 "STS,DAC status register" sif (cpuis("APM32F071*")) bitfld.long 0x0 29. "DMAUDRFLG2,DAC channel2 8-bit right-aligned data" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x0 29. "DMAUDRFLG2,DAC channel2 8-bit right-aligned data" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x0 29. "DMAUDRFLG2,DAC channel2 8-bit right-aligned data" "0,1" endif bitfld.long 0x0 13. "DMAUDRFLG1,DAC channel1 8-bit right-aligned data" "0,1" tree.end endif tree "DBG (Debug Support)" base ad:0x40015800 rgroup.long 0x0++0x3 line.long 0x0 "IDCODE,MCU Device ID Code Register" hexmask.long.word 0x0 16.--31. 1. "WVR,Revision Identifier" hexmask.long.word 0x0 0.--11. 1. "EQR,Device Identifier" group.long 0x4++0xB line.long 0x0 "CFG,Debug MCU Configuration" bitfld.long 0x0 2. "STANDBY_CLK_STS,Debug Standby Mode" "0,1" bitfld.long 0x0 1. "STOP_CLK_STS,Debug Stop Mode" "0,1" line.long 0x4 "APB1F,APB Low Freeze Register" sif (cpuis("APM32F072*")) bitfld.long 0x4 25. "CAN_STS,Debug CAN stopped when Core is halted" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x4 25. "CAN_STS,Debug CAN stopped when Core is halted" "0,1" endif bitfld.long 0x4 21. "I2C1_SMBUS_TIMEOUT_STS,I2C1 SMBUS timeout mode stopped when Core is halted" "0,1" bitfld.long 0x4 12. "IWDT_STS,Debug Independent Wachdog stopped when Core is halted" "0,1" bitfld.long 0x4 11. "WWDT_STS,Debug Window Wachdog stopped when Core is halted" "0,1" newline bitfld.long 0x4 10. "RTC_STS,Debug RTC stopped when Core is halted" "0,1" bitfld.long 0x4 8. "TMR14_STS,Debug Timer 14 stopped when Core is halted" "0,1" sif (cpuis("APM32F030*")) bitfld.long 0x4 5. "TMR7_STS,Debug Timer 7 stopped when Core is halted" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x4 5. "TMR7_STS,Debug Timer 7 stopped when Core is halted" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x4 5. "TMR7_STS,Debug Timer 7 stopped when Core is halted" "0,1" newline endif sif (cpuis("APM32F072*")) bitfld.long 0x4 5. "TMR7_STS,Debug Timer 7 stopped when Core is halted" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x4 5. "TMR7_STS,Debug Timer 7 stopped when Core is halted" "0,1" endif bitfld.long 0x4 4. "TMR6_STS,Debug Timer 6 stopped when Core is halted" "0,1" bitfld.long 0x4 1. "TMR3_STS,Debug Timer 3 stopped when Core is halted" "0,1" sif (cpuis("APM32F071*")) bitfld.long 0x4 0. "TMR2_STS,Debug Timer 2 stopped when Core is halted" "0,1" newline endif sif (cpuis("APM32F072*")) bitfld.long 0x4 0. "TMR2_STS,Debug Timer 2 stopped when Core is halted" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x4 0. "TMR2_STS,Debug Timer 2 stopped when Core is halted" "0,1" endif line.long 0x8 "APB2F,APB High Freeze Register" bitfld.long 0x8 18. "TMR17_STS,Debug Timer 17 stopped when Core is halted" "0,1" bitfld.long 0x8 17. "TMR16_STS,Debug Timer 16 stopped when Core is halted" "0,1" bitfld.long 0x8 16. "TMR15_STS,Debug Timer 15 stopped when Core is halted" "0,1" bitfld.long 0x8 11. "TMR1_STS,Debug Timer 1 stopped when Core is halted" "0,1" tree.end tree "DMA (Direct Memory Access)" base ad:0x0 sif (cpuis("APM32F030*")||cpuis("APM32F051*")) tree "DMA" base ad:0x40020000 rgroup.long 0x0++0x3 line.long 0x0 "INTSTS,DMA interrupt status register" bitfld.long 0x0 19. "TERRFLG5,Channel 5 Transfer Error flag" "0,1" bitfld.long 0x0 18. "HTFLG5,Channel 5 Half Transfer Complete flag" "0,1" bitfld.long 0x0 17. "TCFLG5,Channel 5 Transfer Complete flag" "0,1" bitfld.long 0x0 16. "GINTFLG5,Channel 5 All interrupt flag" "0,1" bitfld.long 0x0 15. "TERRFLG4,Channel 4 Transfer Error flag" "0,1" bitfld.long 0x0 14. "HTFLG4,Channel 4 Half Transfer Complete flag" "0,1" bitfld.long 0x0 13. "TCFLG4,Channel 4 Transfer Complete flag" "0,1" bitfld.long 0x0 12. "GINTFLG4,Channel 4 All interrupt flag" "0,1" bitfld.long 0x0 11. "TERRFLG3,Channel 3 Transfer Error flag" "0,1" newline bitfld.long 0x0 10. "HTFLG3,Channel 3 Half Transfer Complete flag" "0,1" bitfld.long 0x0 9. "TCFLG3,Channel 3 Transfer Complete flag" "0,1" bitfld.long 0x0 8. "GINTFLG3,Channel 3 All interrupt flag" "0,1" bitfld.long 0x0 7. "TERRFLG2,Channel 2 Transfer Error flag" "0,1" bitfld.long 0x0 6. "HTFLG2,Channel 2 Half Transfer Complete flag" "0,1" bitfld.long 0x0 5. "TCFLG2,Channel 2 Transfer Complete flag" "0,1" bitfld.long 0x0 4. "GINTFLG2,Channel 2 All interrupt flag" "0,1" bitfld.long 0x0 3. "TERRFLG1,Channel 1 Transfer Error flag" "0,1" bitfld.long 0x0 2. "HTFLG1,Channel 1 Half Transfer Complete flag" "0,1" newline bitfld.long 0x0 1. "TCFLG1,Channel 1 Transfer Complete flag" "0,1" bitfld.long 0x0 0. "GINTFLG1,Channel 1 All interrupt flag" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "INTFCLR,DMA interrupt flag clear register" bitfld.long 0x0 19. "TERRCLR5,Channel 5 Transfer Error" "0,1" bitfld.long 0x0 18. "HTCLR5,Channel 5 Half Transfer" "0,1" bitfld.long 0x0 17. "TCCLR5,Channel 5 Transfer Complete" "0,1" bitfld.long 0x0 16. "GINTCLR5,Channel 5 All interrupt" "0,1" bitfld.long 0x0 15. "TERRCLR4,Channel 4 Transfer Error" "0,1" bitfld.long 0x0 14. "HTCLR4,Channel 4 Half Transfer" "0,1" bitfld.long 0x0 13. "TCCLR4,Channel 4 Transfer Complete" "0,1" bitfld.long 0x0 12. "GINTCLR4,Channel 4 All interrupt" "0,1" bitfld.long 0x0 11. "TERRCLR3,Channel 3 Transfer Error" "0,1" newline bitfld.long 0x0 10. "HTCLR3,Channel 3 Half Transfer" "0,1" bitfld.long 0x0 9. "TCCLR3,Channel 3 Transfer Complete" "0,1" bitfld.long 0x0 8. "GINTCLR3,Channel 3 All interrupt" "0,1" bitfld.long 0x0 7. "TERRCLR2,Channel 2 Transfer Error" "0,1" bitfld.long 0x0 6. "HTCLR2,Channel 2 Half Transfer" "0,1" bitfld.long 0x0 5. "TCCLR2,Channel 2 Transfer Complete" "0,1" bitfld.long 0x0 4. "GINTCLR2,Channel 2 All interrupt" "0,1" bitfld.long 0x0 3. "TERRCLR1,Channel 1 Transfer Error" "0,1" bitfld.long 0x0 2. "HTCLR1,Channel 1 Half Transfer" "0,1" newline bitfld.long 0x0 1. "TCCLR1,Channel 1 Transfer Complete" "0,1" bitfld.long 0x0 0. "GINTCLR1,Channel 1 All interrupt" "0,1" group.long 0x8++0xF line.long 0x0 "CHCFG1,DMA channel 1 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA1,DMA channel 1 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR1,DMA channel 1 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR1,DMA channel 1 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x1C++0xF line.long 0x0 "CHCFG2,DMA channel 2 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA2,DMA channel 2 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR2,DMA channel 2 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR2,DMA channel 2 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x30++0xF line.long 0x0 "CHCFG3,DMA channel 3 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA3,DMA channel 3 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR3,DMA channel 3 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR3,DMA channel 3 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x44++0xF line.long 0x0 "CHCFG4,DMA channel 4 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA4,DMA channel 4 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR4,DMA channel 4 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR4,DMA channel 4 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x58++0xF line.long 0x0 "CHCFG5,DMA channel 5 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA5,DMA channel 5 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR5,DMA channel 5 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR5,DMA channel 5 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0xA8++0x3 line.long 0x0 "CHSEL,DMA channel select register" hexmask.long.byte 0x0 16.--19. 1. "CHSEL5,DMA Channel 5 Select" hexmask.long.byte 0x0 12.--15. 1. "CHSEL4,DMA Channel 4 Select" hexmask.long.byte 0x0 8.--11. 1. "CHSEL3,DMA Channel 3 Select" hexmask.long.byte 0x0 4.--7. 1. "CHSEL2,DMA Channel 2 Select" hexmask.long.byte 0x0 0.--3. 1. "CHSEL1,DMA Channel 1 Select" tree.end endif sif (cpuis("APM32F070*")||cpuis("APM32F071*")||cpuis("APM32F072*")) tree "DMA" base ad:0x40020000 rgroup.long 0x0++0x3 line.long 0x0 "INTSTS,DMA interrupt status register" bitfld.long 0x0 27. "TERRFLG7,Channel 7 Transfer Error" "0,1" bitfld.long 0x0 26. "HTFLG7,Channel 7 Half Transfer Complete" "0,1" bitfld.long 0x0 25. "TCFLG7,Channel 7 Transfer Complete" "0,1" bitfld.long 0x0 24. "GINTFLG7,Channel 7 All interrupt" "0,1" bitfld.long 0x0 23. "TERRFLG6,Channel 6 Transfer Error" "0,1" bitfld.long 0x0 22. "HTFLG6,Channel 6 Half Transfer Complete" "0,1" bitfld.long 0x0 21. "TCFLG6,Channel 6 Transfer Complete" "0,1" bitfld.long 0x0 20. "GINTFLG6,Channel 6 All interrupt" "0,1" bitfld.long 0x0 19. "TERRFLG5,Channel 5 Transfer Error" "0,1" newline bitfld.long 0x0 18. "HTFLG5,Channel 5 Half Transfer Complete" "0,1" bitfld.long 0x0 17. "TCFLG5,Channel 5 Transfer Complete" "0,1" bitfld.long 0x0 16. "GINTFLG5,Channel 5 All interrupt" "0,1" bitfld.long 0x0 15. "TERRFLG4,Channel 4 Transfer Error" "0,1" bitfld.long 0x0 14. "HTFLG4,Channel 4 Half Transfer Complete" "0,1" bitfld.long 0x0 13. "TCFLG4,Channel 4 Transfer Complete" "0,1" bitfld.long 0x0 12. "GINTFLG4,Channel 4 All interrupt" "0,1" bitfld.long 0x0 11. "TERRFLG3,Channel 3 Transfer Error" "0,1" bitfld.long 0x0 10. "HTFLG3,Channel 3 Half Transfer Complete" "0,1" newline bitfld.long 0x0 9. "TCFLG3,Channel 3 Transfer Complete" "0,1" bitfld.long 0x0 8. "GINTFLG3,Channel 3 All interrupt" "0,1" bitfld.long 0x0 7. "TERRFLG2,Channel 2 Transfer Error" "0,1" bitfld.long 0x0 6. "HTFLG2,Channel 2 Half Transfer Complete" "0,1" bitfld.long 0x0 5. "TCFLG2,Channel 2 Transfer Complete" "0,1" bitfld.long 0x0 4. "GINTFLG2,Channel 2 All interrupt" "0,1" bitfld.long 0x0 3. "TERRFLG1,Channel 1 Transfer Error" "0,1" bitfld.long 0x0 2. "HTFLG1,Channel 1 Half Transfer Complete" "0,1" bitfld.long 0x0 1. "TCFLG1,Channel 1 Transfer Complete" "0,1" newline bitfld.long 0x0 0. "GINTFLG1,Channel 1 All interrupt" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "INTFCLR,DMA interrupt flag clear register" bitfld.long 0x0 27. "TERRCLR7,Channel 7 Transfer Error" "0,1" bitfld.long 0x0 26. "HTCLR7,Channel 7 Half Transfer" "0,1" bitfld.long 0x0 25. "TCCLR7,Channel 7 Transfer Complete" "0,1" bitfld.long 0x0 24. "GINTCLR7,Channel 7 All interrupt" "0,1" bitfld.long 0x0 23. "TERRCLR6,Channel 6 Transfer Error" "0,1" bitfld.long 0x0 22. "HTCLR6,Channel 6 Half Transfer" "0,1" bitfld.long 0x0 21. "TCCLR6,Channel 6 Transfer Complete" "0,1" bitfld.long 0x0 20. "GINTCLR6,Channel 6 All interrupt" "0,1" bitfld.long 0x0 19. "TERRCLR5,Channel 5 Transfer Error" "0,1" newline bitfld.long 0x0 18. "HTCLR5,Channel 5 Half Transfer" "0,1" bitfld.long 0x0 17. "TCCLR5,Channel 5 Transfer Complete" "0,1" bitfld.long 0x0 16. "GINTCLR5,Channel 5 All interrupt" "0,1" bitfld.long 0x0 15. "TERRCLR4,Channel 4 Transfer Error" "0,1" bitfld.long 0x0 14. "HTCLR4,Channel 4 Half Transfer" "0,1" bitfld.long 0x0 13. "TCCLR4,Channel 4 Transfer Complete" "0,1" bitfld.long 0x0 12. "GINTCLR4,Channel 4 All interrupt" "0,1" bitfld.long 0x0 11. "TERRCLR3,Channel 3 Transfer Error" "0,1" bitfld.long 0x0 10. "HTCLR3,Channel 3 Half Transfer" "0,1" newline bitfld.long 0x0 9. "TCCLR3,Channel 3 Transfer Complete" "0,1" bitfld.long 0x0 8. "GINTCLR3,Channel 3 All interrupt" "0,1" bitfld.long 0x0 7. "TERRCLR2,Channel 2 Transfer Error" "0,1" bitfld.long 0x0 6. "HTCLR2,Channel 2 Half Transfer" "0,1" bitfld.long 0x0 5. "TCCLR2,Channel 2 Transfer Complete" "0,1" bitfld.long 0x0 4. "GINTCLR2,Channel 2 All interrupt" "0,1" bitfld.long 0x0 3. "TERRCLR1,Channel 1 Transfer Error" "0,1" bitfld.long 0x0 2. "HTCLR1,Channel 1 Half Transfer" "0,1" bitfld.long 0x0 1. "TCCLR1,Channel 1 Transfer Complete" "0,1" newline bitfld.long 0x0 0. "GINTCLR1,Channel 1 All interrupt" "0,1" group.long 0x8++0xF line.long 0x0 "CHCFG1,DMA channel 1 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA1,DMA channel 1 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR1,DMA channel 1 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR1,DMA channel 1 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x1C++0xF line.long 0x0 "CHCFG2,DMA channel 2 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA2,DMA channel 2 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR2,DMA channel 2 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR2,DMA channel 2 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x30++0xF line.long 0x0 "CHCFG3,DMA channel 3 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA3,DMA channel 3 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR3,DMA channel 3 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR3,DMA channel 3 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x44++0xF line.long 0x0 "CHCFG4,DMA channel 4 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA4,DMA channel 4 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR4,DMA channel 4 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR4,DMA channel 4 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x58++0xF line.long 0x0 "CHCFG5,DMA channel 5 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA5,DMA channel 5 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR5,DMA channel 5 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR5,DMA channel 5 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x6C++0xF line.long 0x0 "CHCFG6,DMA channel 6 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA6,DMA channel 6 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR6,DMA channel 6 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR6,DMA channel 6 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x80++0xF line.long 0x0 "CHCFG7,DMA channel 7 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA7,DMA channel 7 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR7,DMA channel 7 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR7,DMA channel 7 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" tree.end endif sif (cpuis("APM32F091*")) tree "DMA1" base ad:0x40020000 rgroup.long 0x0++0x3 line.long 0x0 "INTSTS,DMA interrupt status register" bitfld.long 0x0 27. "TERRFLG7,Channel 7 Transfer Error" "0,1" bitfld.long 0x0 26. "HTFLG7,Channel 7 Half Transfer Complete" "0,1" bitfld.long 0x0 25. "TCFLG7,Channel 7 Transfer Complete" "0,1" bitfld.long 0x0 24. "GINTFLG7,Channel 7 All interrupt" "0,1" bitfld.long 0x0 23. "TERRFLG6,Channel 6 Transfer Error" "0,1" bitfld.long 0x0 22. "HTFLG6,Channel 6 Half Transfer Complete" "0,1" bitfld.long 0x0 21. "TCFLG6,Channel 6 Transfer Complete" "0,1" bitfld.long 0x0 20. "GINTFLG6,Channel 6 All interrupt" "0,1" bitfld.long 0x0 19. "TERRFLG5,Channel 5 Transfer Error" "0,1" newline bitfld.long 0x0 18. "HTFLG5,Channel 5 Half Transfer Complete" "0,1" bitfld.long 0x0 17. "TCFLG5,Channel 5 Transfer Complete" "0,1" bitfld.long 0x0 16. "GINTFLG5,Channel 5 All interrupt" "0,1" bitfld.long 0x0 15. "TERRFLG4,Channel 4 Transfer Error" "0,1" bitfld.long 0x0 14. "HTFLG4,Channel 4 Half Transfer Complete" "0,1" bitfld.long 0x0 13. "TCFLG4,Channel 4 Transfer Complete" "0,1" bitfld.long 0x0 12. "GINTFLG4,Channel 4 All interrupt" "0,1" bitfld.long 0x0 11. "TERRFLG3,Channel 3 Transfer Error" "0,1" bitfld.long 0x0 10. "HTFLG3,Channel 3 Half Transfer Complete" "0,1" newline bitfld.long 0x0 9. "TCFLG3,Channel 3 Transfer Complete" "0,1" bitfld.long 0x0 8. "GINTFLG3,Channel 3 All interrupt" "0,1" bitfld.long 0x0 7. "TERRFLG2,Channel 2 Transfer Error" "0,1" bitfld.long 0x0 6. "HTFLG2,Channel 2 Half Transfer Complete" "0,1" bitfld.long 0x0 5. "TCFLG2,Channel 2 Transfer Complete" "0,1" bitfld.long 0x0 4. "GINTFLG2,Channel 2 All interrupt" "0,1" bitfld.long 0x0 3. "TERRFLG1,Channel 1 Transfer Error" "0,1" bitfld.long 0x0 2. "HTFLG1,Channel 1 Half Transfer Complete" "0,1" bitfld.long 0x0 1. "TCFLG1,Channel 1 Transfer Complete" "0,1" newline bitfld.long 0x0 0. "GINTFLG1,Channel 1 All interrupt" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "INTFCLR,DMA interrupt flag clear register" bitfld.long 0x0 27. "TERRCLR7,Channel 7 Transfer Error" "0,1" bitfld.long 0x0 26. "HTCLR7,Channel 7 Half Transfer" "0,1" bitfld.long 0x0 25. "TCCLR7,Channel 7 Transfer Complete" "0,1" bitfld.long 0x0 24. "GINTCLR7,Channel 7 All interrupt" "0,1" bitfld.long 0x0 23. "TERRCLR6,Channel 6 Transfer Error" "0,1" bitfld.long 0x0 22. "HTCLR6,Channel 6 Half Transfer" "0,1" bitfld.long 0x0 21. "TCCLR6,Channel 6 Transfer Complete" "0,1" bitfld.long 0x0 20. "GINTCLR6,Channel 6 All interrupt" "0,1" bitfld.long 0x0 19. "TERRCLR5,Channel 5 Transfer Error" "0,1" newline bitfld.long 0x0 18. "HTCLR5,Channel 5 Half Transfer" "0,1" bitfld.long 0x0 17. "TCCLR5,Channel 5 Transfer Complete" "0,1" bitfld.long 0x0 16. "GINTCLR5,Channel 5 All interrupt" "0,1" bitfld.long 0x0 15. "TERRCLR4,Channel 4 Transfer Error" "0,1" bitfld.long 0x0 14. "HTCLR4,Channel 4 Half Transfer" "0,1" bitfld.long 0x0 13. "TCCLR4,Channel 4 Transfer Complete" "0,1" bitfld.long 0x0 12. "GINTCLR4,Channel 4 All interrupt" "0,1" bitfld.long 0x0 11. "TERRCLR3,Channel 3 Transfer Error" "0,1" bitfld.long 0x0 10. "HTCLR3,Channel 3 Half Transfer" "0,1" newline bitfld.long 0x0 9. "TCCLR3,Channel 3 Transfer Complete" "0,1" bitfld.long 0x0 8. "GINTCLR3,Channel 3 All interrupt" "0,1" bitfld.long 0x0 7. "TERRCLR2,Channel 2 Transfer Error" "0,1" bitfld.long 0x0 6. "HTCLR2,Channel 2 Half Transfer" "0,1" bitfld.long 0x0 5. "TCCLR2,Channel 2 Transfer Complete" "0,1" bitfld.long 0x0 4. "GINTCLR2,Channel 2 All interrupt" "0,1" bitfld.long 0x0 3. "TERRCLR1,Channel 1 Transfer Error" "0,1" bitfld.long 0x0 2. "HTCLR1,Channel 1 Half Transfer" "0,1" bitfld.long 0x0 1. "TCCLR1,Channel 1 Transfer Complete" "0,1" newline bitfld.long 0x0 0. "GINTCLR1,Channel 1 All interrupt" "0,1" group.long 0x8++0xF line.long 0x0 "CHCFG1,DMA channel 1 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA1,DMA channel 1 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR1,DMA channel 1 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR1,DMA channel 1 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x1C++0xF line.long 0x0 "CHCFG2,DMA channel 2 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA2,DMA channel 2 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR2,DMA channel 2 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR2,DMA channel 2 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x30++0xF line.long 0x0 "CHCFG3,DMA channel 3 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA3,DMA channel 3 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR3,DMA channel 3 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR3,DMA channel 3 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x44++0xF line.long 0x0 "CHCFG4,DMA channel 4 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA4,DMA channel 4 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR4,DMA channel 4 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR4,DMA channel 4 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x58++0xF line.long 0x0 "CHCFG5,DMA channel 5 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA5,DMA channel 5 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR5,DMA channel 5 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR5,DMA channel 5 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x6C++0xF line.long 0x0 "CHCFG6,DMA channel 6 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA6,DMA channel 6 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR6,DMA channel 6 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR6,DMA channel 6 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x80++0xF line.long 0x0 "CHCFG7,DMA channel 7 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA7,DMA channel 7 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR7,DMA channel 7 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR7,DMA channel 7 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0xA8++0x3 line.long 0x0 "CHSEL,DMA channel select" hexmask.long.byte 0x0 24.--27. 1. "CHSEL7,DMA Channel 7 Select" hexmask.long.byte 0x0 20.--23. 1. "CHSEL6,DMA Channel 6 Select" hexmask.long.byte 0x0 16.--19. 1. "CHSEL5,DMA Channel 5 Select" hexmask.long.byte 0x0 12.--15. 1. "CHSEL4,DMA Channel 4 Select" hexmask.long.byte 0x0 8.--11. 1. "CHSEL3,DMA Channel 3 Select" hexmask.long.byte 0x0 4.--7. 1. "CHSEL2,DMA Channel 2 Select" hexmask.long.byte 0x0 0.--3. 1. "CHSEL1,DMA Channel 1 Select" tree.end tree "DMA2" base ad:0x40020400 rgroup.long 0x0++0x3 line.long 0x0 "INTSTS,DMA interrupt status register" bitfld.long 0x0 27. "TERRFLG7,Channel 7 Transfer Error" "0,1" bitfld.long 0x0 26. "HTFLG7,Channel 7 Half Transfer Complete" "0,1" bitfld.long 0x0 25. "TCFLG7,Channel 7 Transfer Complete" "0,1" bitfld.long 0x0 24. "GINTFLG7,Channel 7 All interrupt" "0,1" bitfld.long 0x0 23. "TERRFLG6,Channel 6 Transfer Error" "0,1" bitfld.long 0x0 22. "HTFLG6,Channel 6 Half Transfer Complete" "0,1" bitfld.long 0x0 21. "TCFLG6,Channel 6 Transfer Complete" "0,1" bitfld.long 0x0 20. "GINTFLG6,Channel 6 All interrupt" "0,1" bitfld.long 0x0 19. "TERRFLG5,Channel 5 Transfer Error" "0,1" newline bitfld.long 0x0 18. "HTFLG5,Channel 5 Half Transfer Complete" "0,1" bitfld.long 0x0 17. "TCFLG5,Channel 5 Transfer Complete" "0,1" bitfld.long 0x0 16. "GINTFLG5,Channel 5 All interrupt" "0,1" bitfld.long 0x0 15. "TERRFLG4,Channel 4 Transfer Error" "0,1" bitfld.long 0x0 14. "HTFLG4,Channel 4 Half Transfer Complete" "0,1" bitfld.long 0x0 13. "TCFLG4,Channel 4 Transfer Complete" "0,1" bitfld.long 0x0 12. "GINTFLG4,Channel 4 All interrupt" "0,1" bitfld.long 0x0 11. "TERRFLG3,Channel 3 Transfer Error" "0,1" bitfld.long 0x0 10. "HTFLG3,Channel 3 Half Transfer Complete" "0,1" newline bitfld.long 0x0 9. "TCFLG3,Channel 3 Transfer Complete" "0,1" bitfld.long 0x0 8. "GINTFLG3,Channel 3 All interrupt" "0,1" bitfld.long 0x0 7. "TERRFLG2,Channel 2 Transfer Error" "0,1" bitfld.long 0x0 6. "HTFLG2,Channel 2 Half Transfer Complete" "0,1" bitfld.long 0x0 5. "TCFLG2,Channel 2 Transfer Complete" "0,1" bitfld.long 0x0 4. "GINTFLG2,Channel 2 All interrupt" "0,1" bitfld.long 0x0 3. "TERRFLG1,Channel 1 Transfer Error" "0,1" bitfld.long 0x0 2. "HTFLG1,Channel 1 Half Transfer Complete" "0,1" bitfld.long 0x0 1. "TCFLG1,Channel 1 Transfer Complete" "0,1" newline bitfld.long 0x0 0. "GINTFLG1,Channel 1 All interrupt" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "INTFCLR,DMA interrupt flag clear register" bitfld.long 0x0 27. "TERRCLR7,Channel 7 Transfer Error" "0,1" bitfld.long 0x0 26. "HTCLR7,Channel 7 Half Transfer" "0,1" bitfld.long 0x0 25. "TCCLR7,Channel 7 Transfer Complete" "0,1" bitfld.long 0x0 24. "GINTCLR7,Channel 7 All interrupt" "0,1" bitfld.long 0x0 23. "TERRCLR6,Channel 6 Transfer Error" "0,1" bitfld.long 0x0 22. "HTCLR6,Channel 6 Half Transfer" "0,1" bitfld.long 0x0 21. "TCCLR6,Channel 6 Transfer Complete" "0,1" bitfld.long 0x0 20. "GINTCLR6,Channel 6 All interrupt" "0,1" bitfld.long 0x0 19. "TERRCLR5,Channel 5 Transfer Error" "0,1" newline bitfld.long 0x0 18. "HTCLR5,Channel 5 Half Transfer" "0,1" bitfld.long 0x0 17. "TCCLR5,Channel 5 Transfer Complete" "0,1" bitfld.long 0x0 16. "GINTCLR5,Channel 5 All interrupt" "0,1" bitfld.long 0x0 15. "TERRCLR4,Channel 4 Transfer Error" "0,1" bitfld.long 0x0 14. "HTCLR4,Channel 4 Half Transfer" "0,1" bitfld.long 0x0 13. "TCCLR4,Channel 4 Transfer Complete" "0,1" bitfld.long 0x0 12. "GINTCLR4,Channel 4 All interrupt" "0,1" bitfld.long 0x0 11. "TERRCLR3,Channel 3 Transfer Error" "0,1" bitfld.long 0x0 10. "HTCLR3,Channel 3 Half Transfer" "0,1" newline bitfld.long 0x0 9. "TCCLR3,Channel 3 Transfer Complete" "0,1" bitfld.long 0x0 8. "GINTCLR3,Channel 3 All interrupt" "0,1" bitfld.long 0x0 7. "TERRCLR2,Channel 2 Transfer Error" "0,1" bitfld.long 0x0 6. "HTCLR2,Channel 2 Half Transfer" "0,1" bitfld.long 0x0 5. "TCCLR2,Channel 2 Transfer Complete" "0,1" bitfld.long 0x0 4. "GINTCLR2,Channel 2 All interrupt" "0,1" bitfld.long 0x0 3. "TERRCLR1,Channel 1 Transfer Error" "0,1" bitfld.long 0x0 2. "HTCLR1,Channel 1 Half Transfer" "0,1" bitfld.long 0x0 1. "TCCLR1,Channel 1 Transfer Complete" "0,1" newline bitfld.long 0x0 0. "GINTCLR1,Channel 1 All interrupt" "0,1" group.long 0x8++0xF line.long 0x0 "CHCFG1,DMA channel 1 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA1,DMA channel 1 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR1,DMA channel 1 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR1,DMA channel 1 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x1C++0xF line.long 0x0 "CHCFG2,DMA channel 2 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA2,DMA channel 2 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR2,DMA channel 2 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR2,DMA channel 2 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x30++0xF line.long 0x0 "CHCFG3,DMA channel 3 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA3,DMA channel 3 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR3,DMA channel 3 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR3,DMA channel 3 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x44++0xF line.long 0x0 "CHCFG4,DMA channel 4 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA4,DMA channel 4 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR4,DMA channel 4 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR4,DMA channel 4 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x58++0xF line.long 0x0 "CHCFG5,DMA channel 5 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA5,DMA channel 5 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR5,DMA channel 5 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR5,DMA channel 5 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x6C++0xF line.long 0x0 "CHCFG6,DMA channel 6 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA6,DMA channel 6 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR6,DMA channel 6 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR6,DMA channel 6 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0x80++0xF line.long 0x0 "CHCFG7,DMA channel 7 configuration register" bitfld.long 0x0 14. "M2MMODE,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "CHPL,Channel Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MSIZE,Memory size" "0,1,2,3" bitfld.long 0x0 8.--9. "PERSIZE,Peripheral size" "0,1,2,3" bitfld.long 0x0 7. "MIMODE,Memory increment mode" "0,1" bitfld.long 0x0 6. "PERIMODE,Peripheral increment mode" "0,1" bitfld.long 0x0 5. "CIRMODE,Circular mode" "0,1" bitfld.long 0x0 4. "DIRCFG,Data transfer direction" "0,1" bitfld.long 0x0 3. "TERRINTEN,Transfer error interrupt" "0,1" newline bitfld.long 0x0 2. "HTINTEN,Half Transfer interrupt" "0,1" bitfld.long 0x0 1. "TCINTEN,Transfer complete interrupt" "0,1" bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CHNDATA7,DMA channel 7 number of data" hexmask.long.word 0x4 0.--15. 1. "NDATAT,Number of data to transfer" line.long 0x8 "CHPADDR7,DMA channel 7 peripheral address" hexmask.long 0x8 0.--31. 1. "PERADDR,Peripheral address" line.long 0xC "CHMADDR7,DMA channel 7 memory address" hexmask.long 0xC 0.--31. 1. "MEMADDR,Memory address" group.long 0xA8++0x3 line.long 0x0 "CHSEL,DMA channel select" hexmask.long.byte 0x0 24.--27. 1. "CHSEL7,DMA Channel 7 Select" hexmask.long.byte 0x0 20.--23. 1. "CHSEL6,DMA Channel 6 Select" hexmask.long.byte 0x0 16.--19. 1. "CHSEL5,DMA Channel 5 Select" hexmask.long.byte 0x0 12.--15. 1. "CHSEL4,DMA Channel 4 Select" hexmask.long.byte 0x0 8.--11. 1. "CHSEL3,DMA Channel 3 Select" hexmask.long.byte 0x0 4.--7. 1. "CHSEL2,DMA Channel 2 Select" hexmask.long.byte 0x0 0.--3. 1. "CHSEL1,DMA Channel 1 Select" tree.end endif tree.end tree "EINT (External Interrupt/Event Controller)" base ad:0x40010400 group.long 0x0++0x17 line.long 0x0 "IMASK,Interrupt mask register" bitfld.long 0x0 31. "IMASK31,Interrupt Mask on line 31" "0,1" bitfld.long 0x0 30. "IMASK30,Interrupt Mask on line 30" "0,1" bitfld.long 0x0 29. "IMASK29,Interrupt Mask on line 29" "0,1" bitfld.long 0x0 28. "IMASK28,Interrupt Mask on line 28" "0,1" bitfld.long 0x0 27. "IMASK27,Interrupt Mask on line 27" "0,1" bitfld.long 0x0 26. "IMASK26,Interrupt Mask on line 26" "0,1" bitfld.long 0x0 25. "IMASK25,Interrupt Mask on line 25" "0,1" bitfld.long 0x0 24. "IMASK24,Interrupt Mask on line 24" "0,1" bitfld.long 0x0 23. "IMASK23,Interrupt Mask on line 23" "0,1" bitfld.long 0x0 22. "IMASK22,Interrupt Mask on line 22" "0,1" bitfld.long 0x0 21. "IMASK21,Interrupt Mask on line 21" "0,1" newline bitfld.long 0x0 20. "IMASK20,Interrupt Mask on line 20" "0,1" bitfld.long 0x0 19. "IMASK19,Interrupt Mask on line 19" "0,1" bitfld.long 0x0 18. "IMASK18,Interrupt Mask on line 18" "0,1" bitfld.long 0x0 17. "IMASK17,Interrupt Mask on line 17" "0,1" bitfld.long 0x0 16. "IMASK16,Interrupt Mask on line 16" "0,1" bitfld.long 0x0 15. "IMASK15,Interrupt Mask on line 15" "0,1" bitfld.long 0x0 14. "IMASK14,Interrupt Mask on line 14" "0,1" bitfld.long 0x0 13. "IMASK13,Interrupt Mask on line 13" "0,1" bitfld.long 0x0 12. "IMASK12,Interrupt Mask on line 12" "0,1" bitfld.long 0x0 11. "IMASK11,Interrupt Mask on line 11" "0,1" bitfld.long 0x0 10. "IMASK10,Interrupt Mask on line 10" "0,1" newline bitfld.long 0x0 9. "IMASK9,Interrupt Mask on line 9" "0,1" bitfld.long 0x0 8. "IMASK8,Interrupt Mask on line 8" "0,1" bitfld.long 0x0 7. "IMASK7,Interrupt Mask on line 7" "0,1" bitfld.long 0x0 6. "IMASK6,Interrupt Mask on line 6" "0,1" bitfld.long 0x0 5. "IMASK5,Interrupt Mask on line 5" "0,1" bitfld.long 0x0 4. "IMASK4,Interrupt Mask on line 4" "0,1" bitfld.long 0x0 3. "IMASK3,Interrupt Mask on line 3" "0,1" bitfld.long 0x0 2. "IMASK2,Interrupt Mask on line 2" "0,1" bitfld.long 0x0 1. "IMASK1,Interrupt Mask on line 1" "0,1" bitfld.long 0x0 0. "IMASK0,Interrupt Mask on line 0" "0,1" line.long 0x4 "EMASK,Event mask register (EINT_EVTMASK)" bitfld.long 0x4 31. "EMASK31,Event Mask on line 31" "0,1" bitfld.long 0x4 30. "EMASK30,Event Mask on line 30" "0,1" bitfld.long 0x4 29. "EMASK29,Event Mask on line 29" "0,1" bitfld.long 0x4 28. "EMASK28,Event Mask on line 28" "0,1" bitfld.long 0x4 27. "EMASK27,Event Mask on line 27" "0,1" bitfld.long 0x4 26. "EMASK26,Event Mask on line 26" "0,1" bitfld.long 0x4 25. "EMASK25,Event Mask on line 25" "0,1" bitfld.long 0x4 24. "EMASK24,Event Mask on line 24" "0,1" bitfld.long 0x4 23. "EMASK23,Event Mask on line 23" "0,1" bitfld.long 0x4 22. "EMASK22,Event Mask on line 22" "0,1" bitfld.long 0x4 21. "EMASK21,Event Mask on line 21" "0,1" newline bitfld.long 0x4 20. "EMASK20,Event Mask on line 20" "0,1" bitfld.long 0x4 19. "EMASK19,Event Mask on line 19" "0,1" bitfld.long 0x4 18. "EMASK18,Event Mask on line 18" "0,1" bitfld.long 0x4 17. "EMASK17,Event Mask on line 17" "0,1" bitfld.long 0x4 16. "EMASK16,Event Mask on line 16" "0,1" bitfld.long 0x4 15. "EMASK15,Event Mask on line 15" "0,1" bitfld.long 0x4 14. "EMASK14,Event Mask on line 14" "0,1" bitfld.long 0x4 13. "EMASK13,Event Mask on line 13" "0,1" bitfld.long 0x4 12. "EMASK12,Event Mask on line 12" "0,1" bitfld.long 0x4 11. "EMASK11,Event Mask on line 11" "0,1" bitfld.long 0x4 10. "EMASK10,Event Mask on line 10" "0,1" newline bitfld.long 0x4 9. "EMASK9,Event Mask on line 9" "0,1" bitfld.long 0x4 8. "EMASK8,Event Mask on line 8" "0,1" bitfld.long 0x4 7. "EMASK7,Event Mask on line 7" "0,1" bitfld.long 0x4 6. "EMASK6,Event Mask on line 6" "0,1" bitfld.long 0x4 5. "EMASK5,Event Mask on line 5" "0,1" bitfld.long 0x4 4. "EMASK4,Event Mask on line 4" "0,1" bitfld.long 0x4 3. "EMASK3,Event Mask on line 3" "0,1" bitfld.long 0x4 2. "EMASK2,Event Mask on line 2" "0,1" bitfld.long 0x4 1. "EMASK1,Event Mask on line 1" "0,1" bitfld.long 0x4 0. "EMASK0,Event Mask on line 0" "0,1" line.long 0x8 "RTEN,Rising Trigger selection register" bitfld.long 0x8 31. "RTEN31,Rising trigger event configuration of" "0,1" bitfld.long 0x8 22. "RTEN22,Rising trigger event configuration of" "0,1" bitfld.long 0x8 21. "RTEN21,Rising trigger event configuration of" "0,1" bitfld.long 0x8 20. "RTEN20,Rising trigger event configuration of" "0,1" bitfld.long 0x8 19. "RTEN19,Rising trigger event configuration of" "0,1" bitfld.long 0x8 17. "RTEN17,Rising trigger event configuration of" "0,1" bitfld.long 0x8 16. "RTEN16,Rising trigger event configuration of" "0,1" bitfld.long 0x8 15. "RTEN15,Rising trigger event configuration of" "0,1" bitfld.long 0x8 14. "RTEN14,Rising trigger event configuration of" "0,1" bitfld.long 0x8 13. "RTEN13,Rising trigger event configuration of" "0,1" bitfld.long 0x8 12. "RTEN12,Rising trigger event configuration of" "0,1" newline bitfld.long 0x8 11. "RTEN11,Rising trigger event configuration of" "0,1" bitfld.long 0x8 10. "RTEN10,Rising trigger event configuration of" "0,1" bitfld.long 0x8 9. "RTEN9,Rising trigger event configuration of" "0,1" bitfld.long 0x8 8. "RTEN8,Rising trigger event configuration of" "0,1" bitfld.long 0x8 7. "RTEN7,Rising trigger event configuration of" "0,1" bitfld.long 0x8 6. "RTEN6,Rising trigger event configuration of" "0,1" bitfld.long 0x8 5. "RTEN5,Rising trigger event configuration of" "0,1" bitfld.long 0x8 4. "RTEN4,Rising trigger event configuration of" "0,1" bitfld.long 0x8 3. "RTEN3,Rising trigger event configuration of" "0,1" bitfld.long 0x8 2. "RTEN2,Rising trigger event configuration of" "0,1" bitfld.long 0x8 1. "RTEN1,Rising trigger event configuration of" "0,1" newline bitfld.long 0x8 0. "RTEN0,Rising trigger event configuration of" "0,1" line.long 0xC "FTEN,Falling Trigger selection register" bitfld.long 0xC 31. "FTEN31,Falling trigger event configuration of" "0,1" bitfld.long 0xC 22. "FTEN22,Falling trigger event configuration of" "0,1" bitfld.long 0xC 21. "FTEN21,Falling trigger event configuration of" "0,1" bitfld.long 0xC 20. "FTEN20,Falling trigger event configuration of" "0,1" bitfld.long 0xC 19. "FTEN19,Falling trigger event configuration of" "0,1" bitfld.long 0xC 17. "FTEN17,Falling trigger event configuration of" "0,1" bitfld.long 0xC 16. "FTEN16,Falling trigger event configuration of" "0,1" bitfld.long 0xC 15. "FTEN15,Falling trigger event configuration of" "0,1" bitfld.long 0xC 14. "FTEN14,Falling trigger event configuration of" "0,1" bitfld.long 0xC 13. "FTEN13,Falling trigger event configuration of" "0,1" bitfld.long 0xC 12. "FTEN12,Falling trigger event configuration of" "0,1" newline bitfld.long 0xC 11. "FTEN11,Falling trigger event configuration of" "0,1" bitfld.long 0xC 10. "FTEN10,Falling trigger event configuration of" "0,1" bitfld.long 0xC 9. "FTEN9,Falling trigger event configuration of" "0,1" bitfld.long 0xC 8. "FTEN8,Falling trigger event configuration of" "0,1" bitfld.long 0xC 7. "FTEN7,Falling trigger event configuration of" "0,1" bitfld.long 0xC 6. "FTEN6,Falling trigger event configuration of" "0,1" bitfld.long 0xC 5. "FTEN5,Falling trigger event configuration of" "0,1" bitfld.long 0xC 4. "FTEN4,Falling trigger event configuration of" "0,1" bitfld.long 0xC 3. "FTEN3,Falling trigger event configuration of" "0,1" bitfld.long 0xC 2. "FTEN2,Falling trigger event configuration of" "0,1" bitfld.long 0xC 1. "FTEN1,Falling trigger event configuration of" "0,1" newline bitfld.long 0xC 0. "FTEN0,Falling trigger event configuration of" "0,1" line.long 0x10 "SWINTE,Software interrupt event register" bitfld.long 0x10 31. "SWINTE31,Software Interrupt on line31" "0,1" bitfld.long 0x10 22. "SWINTE22,Software Interrupt on line22" "0,1" bitfld.long 0x10 21. "SWINTE21,Software Interrupt on line21" "0,1" bitfld.long 0x10 20. "SWINTE20,Software Interrupt on line20" "0,1" bitfld.long 0x10 19. "SWINTE19,Software Interrupt on line19" "0,1" bitfld.long 0x10 17. "SWINTE17,Software Interrupt on line17" "0,1" bitfld.long 0x10 16. "SWINTE16,Software Interrupt on line16" "0,1" bitfld.long 0x10 15. "SWINTE15,Software Interrupt on line15" "0,1" bitfld.long 0x10 14. "SWINTE14,Software Interrupt on line14" "0,1" bitfld.long 0x10 13. "SWINTE13,Software Interrupt on line13" "0,1" bitfld.long 0x10 12. "SWINTE12,Software Interrupt on line12" "0,1" newline bitfld.long 0x10 11. "SWINTE11,Software Interrupt on line11" "0,1" bitfld.long 0x10 10. "SWINTE10,Software Interrupt on line10" "0,1" bitfld.long 0x10 9. "SWINTE9,Software Interrupt on line9" "0,1" bitfld.long 0x10 8. "SWINTE8,Software Interrupt on line8" "0,1" bitfld.long 0x10 7. "SWINTE7,Software Interrupt on line7" "0,1" bitfld.long 0x10 6. "SWINTE6,Software Interrupt on line6" "0,1" bitfld.long 0x10 5. "SWINTE5,Software Interrupt on line5" "0,1" bitfld.long 0x10 4. "SWINTE4,Software Interrupt on line4" "0,1" bitfld.long 0x10 3. "SWINTE3,Software Interrupt on line3" "0,1" bitfld.long 0x10 2. "SWINTE2,Software Interrupt on line2" "0,1" bitfld.long 0x10 1. "SWINTE1,Software Interrupt on line1" "0,1" newline bitfld.long 0x10 0. "SWINTE0,Software Interrupt on line0" "0,1" line.long 0x14 "IPEND,Pending register (EINT_PEND)" bitfld.long 0x14 31. "IPEND31,Pending bit 31" "0,1" bitfld.long 0x14 22. "IPEND22,Pending bit 22" "0,1" bitfld.long 0x14 21. "IPEND21,Pending bit 21" "0,1" bitfld.long 0x14 20. "IPEND20,Pending bit 20" "0,1" bitfld.long 0x14 19. "IPEND19,Pending bit 19" "0,1" bitfld.long 0x14 17. "IPEND17,Pending bit 17" "0,1" bitfld.long 0x14 16. "IPEND16,Pending bit 16" "0,1" bitfld.long 0x14 15. "IPEND15,Pending bit 15" "0,1" bitfld.long 0x14 14. "IPEND14,Pending bit 14" "0,1" bitfld.long 0x14 13. "IPEND13,Pending bit 13" "0,1" bitfld.long 0x14 12. "IPEND12,Pending bit 12" "0,1" newline bitfld.long 0x14 11. "IPEND11,Pending bit 11" "0,1" bitfld.long 0x14 10. "IPEND10,Pending bit 10" "0,1" bitfld.long 0x14 9. "IPEND9,Pending bit 9" "0,1" bitfld.long 0x14 8. "IPEND8,Pending bit 8" "0,1" bitfld.long 0x14 7. "IPEND7,Pending bit 7" "0,1" bitfld.long 0x14 6. "IPEND6,Pending bit 6" "0,1" bitfld.long 0x14 5. "IPEND5,Pending bit 5" "0,1" bitfld.long 0x14 4. "IPEND4,Pending bit 4" "0,1" bitfld.long 0x14 3. "IPEND3,Pending bit 3" "0,1" bitfld.long 0x14 2. "IPEND2,Pending bit 2" "0,1" bitfld.long 0x14 1. "IPEND1,Pending bit 1" "0,1" newline bitfld.long 0x14 0. "IPEND0,Pending bit 0" "0,1" tree.end tree "FMC (Flash Memory Controller)" base ad:0x40022000 group.long 0x0++0x3 line.long 0x0 "CTRL1,Flash access control register" rbitfld.long 0x0 5. "PBSF,PBSF" "0,1" bitfld.long 0x0 4. "PBEN,PBEN" "0,1" bitfld.long 0x0 0.--2. "WS,LATENCY" "0,1,2,3,4,5,6,7" wgroup.long 0x4++0x7 line.long 0x0 "KEY,Flash key register" hexmask.long 0x0 0.--31. 1. "KEY,Flash Key" line.long 0x4 "OBKEY,Flash option key register" hexmask.long 0x4 0.--31. 1. "OBKEY,Option byte key" group.long 0xC++0x7 line.long 0x0 "STS,Flash status register" bitfld.long 0x0 5. "OCF,End of operation" "0,1" bitfld.long 0x0 4. "WPEF,Write protection error" "0,1" bitfld.long 0x0 2. "PEF,Programming error" "0,1" rbitfld.long 0x0 0. "BUSYF,Busy" "0,1" line.long 0x4 "CTRL2,Flash control register" bitfld.long 0x4 13. "OBLOAD,Force option byte loading" "0,1" bitfld.long 0x4 12. "OCIE,End of operation interrupt enable" "0,1" bitfld.long 0x4 10. "ERRIE,Error interrupt enable" "0,1" bitfld.long 0x4 9. "OBWEN,Option bytes write enable" "0,1" bitfld.long 0x4 7. "LOCK,Lock" "0,1" bitfld.long 0x4 6. "STA,Start" "0,1" bitfld.long 0x4 5. "OBE,Option byte erase" "0,1" bitfld.long 0x4 4. "OBP,Option byte programming" "0,1" bitfld.long 0x4 2. "MASSERA,Mass erase" "0,1" newline bitfld.long 0x4 1. "PAGEERA,Page erase" "0,1" bitfld.long 0x4 0. "PG,Programming" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "ADDR,Flash address register" hexmask.long 0x0 0.--31. 1. "ADDR,Flash address" rgroup.long 0x1C++0x7 line.long 0x0 "OBCS,Option byte register" hexmask.long.byte 0x0 24.--31. 1. "DATA1,DATA1" hexmask.long.byte 0x0 16.--23. 1. "DATA0,DATA0" sif (cpuis("APM32F091*")) bitfld.long 0x0 15. "nBOOT0,BOT0" "0,1" endif bitfld.long 0x0 14. "SRAMPARITY,RPC" "0,1" bitfld.long 0x0 13. "VDDAMONI,VDDAMON" "0,1" bitfld.long 0x0 12. "nBOOT1,BOT1" "0,1" bitfld.long 0x0 10. "RSTSTDB,RSTSTDBY" "0,1" bitfld.long 0x0 9. "RSTSTOP,RSTSTOP" "0,1" bitfld.long 0x0 8. "WDTSEL,WDTSEL" "0,1" newline bitfld.long 0x0 1.--2. "READPROT,Level x protection status" "0,1,2,3" bitfld.long 0x0 0. "OBE,Option byte error" "0,1" line.long 0x4 "WRTPROT,Write protection register" hexmask.long 0x4 0.--31. 1. "WRTPROT,Write protect" tree.end tree "GPIO (General-Purpose Input/Output)" base ad:0x0 sif (cpuis("APM32F070*")) tree "GPIOE" base ad:0x48001000 group.long 0x0++0xF line.long 0x0 "MODE,GPIO port mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 18.--19. "MODE9,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration bits (y = 0..15)" "0,1,2,3" newline bitfld.long 0x0 8.--9. "MODE4,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 6.--7. "MODE3,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration bits (y = 0..15)" "0,1,2,3" line.long 0x4 "OMODE,GPIO port output type register" bitfld.long 0x4 15. "OMODE15,Port x configuration bit 15" "0,1" bitfld.long 0x4 14. "OMODE14,Port x configuration bit 14" "0,1" bitfld.long 0x4 13. "OMODE13,Port x configuration bit 13" "0,1" bitfld.long 0x4 12. "OMODE12,Port x configuration bit 12" "0,1" bitfld.long 0x4 11. "OMODE11,Port x configuration bit" "0,1" bitfld.long 0x4 10. "OMODE10,Port x configuration bit" "0,1" bitfld.long 0x4 9. "OMODE9,Port x configuration bit 9" "0,1" bitfld.long 0x4 8. "OMODE8,Port x configuration bit 8" "0,1" bitfld.long 0x4 7. "OMODE7,Port x configuration bit 7" "0,1" bitfld.long 0x4 6. "OMODE6,Port x configuration bit 6" "0,1" bitfld.long 0x4 5. "OMODE5,Port x configuration bit 5" "0,1" newline bitfld.long 0x4 4. "OMODE4,Port x configuration bit 4" "0,1" bitfld.long 0x4 3. "OMODE3,Port x configuration bit 3" "0,1" bitfld.long 0x4 2. "OMODE2,Port x configuration bit 2" "0,1" bitfld.long 0x4 1. "OMODE1,Port x configuration bit 1" "0,1" bitfld.long 0x4 0. "OMODE0,Port x configuration bit 0" "0,1" line.long 0x8 "OSSEL,GPIO port output speed register" bitfld.long 0x8 30.--31. "OSSEL15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 28.--29. "OSSEL14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 26.--27. "OSSEL13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 24.--25. "OSSEL12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 22.--23. "OSSEL11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 20.--21. "OSSEL10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 18.--19. "OSSEL9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 16.--17. "OSSEL8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 14.--15. "OSSEL7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 12.--13. "OSSEL6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 10.--11. "OSSEL5,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x8 8.--9. "OSSEL4,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 6.--7. "OSSEL3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 4.--5. "OSSEL2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 2.--3. "OSSEL1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 0.--1. "OSSEL0,Port x configuration bits (y =" "0,1,2,3" line.long 0xC "PUPD,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 18.--19. "PUPD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0xC 8.--9. "PUPD4,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 6.--7. "PUPD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration bits (y =" "0,1,2,3" rgroup.long 0x10++0x3 line.long 0x0 "IDATA,GPIO port input data register" bitfld.long 0x0 15. "IDATA15,Port input data (y =" "0,1" bitfld.long 0x0 14. "IDATA14,Port input data (y =" "0,1" bitfld.long 0x0 13. "IDATA13,Port input data (y =" "0,1" bitfld.long 0x0 12. "IDATA12,Port input data (y =" "0,1" bitfld.long 0x0 11. "IDATA11,Port input data (y =" "0,1" bitfld.long 0x0 10. "IDATA10,Port input data (y =" "0,1" bitfld.long 0x0 9. "IDATA9,Port input data (y =" "0,1" bitfld.long 0x0 8. "IDATA8,Port input data (y =" "0,1" bitfld.long 0x0 7. "IDATA7,Port input data (y =" "0,1" bitfld.long 0x0 6. "IDATA6,Port input data (y =" "0,1" bitfld.long 0x0 5. "IDATA5,Port input data (y =" "0,1" newline bitfld.long 0x0 4. "IDATA4,Port input data (y =" "0,1" bitfld.long 0x0 3. "IDATA3,Port input data (y =" "0,1" bitfld.long 0x0 2. "IDATA2,Port input data (y =" "0,1" bitfld.long 0x0 1. "IDATA1,Port input data (y =" "0,1" bitfld.long 0x0 0. "IDATA0,Port input data (y =" "0,1" group.long 0x14++0x3 line.long 0x0 "ODATA,GPIO port output data register" bitfld.long 0x0 15. "ODATA15,Port output data (y =" "0,1" bitfld.long 0x0 14. "ODATA14,Port output data (y =" "0,1" bitfld.long 0x0 13. "ODATA13,Port output data (y =" "0,1" bitfld.long 0x0 12. "ODATA12,Port output data (y =" "0,1" bitfld.long 0x0 11. "ODATA11,Port output data (y =" "0,1" bitfld.long 0x0 10. "ODATA10,Port output data (y =" "0,1" bitfld.long 0x0 9. "ODATA9,Port output data (y =" "0,1" bitfld.long 0x0 8. "ODATA8,Port output data (y =" "0,1" bitfld.long 0x0 7. "ODATA7,Port output data (y =" "0,1" bitfld.long 0x0 6. "ODATA6,Port output data (y =" "0,1" bitfld.long 0x0 5. "ODATA5,Port output data (y =" "0,1" newline bitfld.long 0x0 4. "ODATA4,Port output data (y =" "0,1" bitfld.long 0x0 3. "ODATA3,Port output data (y =" "0,1" bitfld.long 0x0 2. "ODATA2,Port output data (y =" "0,1" bitfld.long 0x0 1. "ODATA1,Port output data (y =" "0,1" bitfld.long 0x0 0. "ODATA0,Port output data (y =" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "BSC,GPIO port bit set/clear register" bitfld.long 0x0 31. "BC15,Port x clear bit y (y =" "0,1" bitfld.long 0x0 30. "BC14,Port x clear bit y (y =" "0,1" bitfld.long 0x0 29. "BC13,Port x clear bit y (y =" "0,1" bitfld.long 0x0 28. "BC12,Port x clear bit y (y =" "0,1" bitfld.long 0x0 27. "BC11,Port x clear bit y (y =" "0,1" bitfld.long 0x0 26. "BC10,Port x clear bit y (y =" "0,1" bitfld.long 0x0 25. "BC9,Port x clear bit y (y =" "0,1" bitfld.long 0x0 24. "BC8,Port x clear bit y (y =" "0,1" bitfld.long 0x0 23. "BC7,Port x clear bit y (y =" "0,1" bitfld.long 0x0 22. "BC6,Port x clear bit y (y =" "0,1" bitfld.long 0x0 21. "BC5,Port x clear bit y (y =" "0,1" newline bitfld.long 0x0 20. "BC4,Port x clear bit y (y =" "0,1" bitfld.long 0x0 19. "BC3,Port x clear bit y (y =" "0,1" bitfld.long 0x0 18. "BC2,Port x clear bit y (y =" "0,1" bitfld.long 0x0 17. "BC1,Port x clear bit y (y =" "0,1" bitfld.long 0x0 16. "BC0,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 15. "BS15,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 14. "BS14,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 13. "BS13,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 12. "BS12,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 11. "BS11,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 10. "BS10,Port x set bit y ( y = 0..15)" "0,1" newline bitfld.long 0x0 9. "BS9,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 8. "BS8,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 7. "BS7,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 6. "BS6,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 5. "BS5,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 4. "BS4,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 3. "BS3,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 2. "BS2,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 1. "BS1,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 0. "BS0,Port x set bit y (y = 0..15)" "0,1" group.long 0x1C++0xB line.long 0x0 "LOCK,GPIO port configuration lock" bitfld.long 0x0 16. "LOCKKEY,Port x lock bit y" "0,1" bitfld.long 0x0 15. "LOCK15,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 14. "LOCK14,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 13. "LOCK13,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 12. "LOCK12,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 11. "LOCK11,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 10. "LOCK10,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 9. "LOCK9,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 8. "LOCK8,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 7. "LOCK7,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 6. "LOCK6,Port x lock bit y (y = 0..15)" "0,1" newline bitfld.long 0x0 5. "LOCK5,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 4. "LOCK4,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 3. "LOCK3,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 2. "LOCK2,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 1. "LOCK1,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 0. "LOCK0,Port x lock bit y (y = 0..15)" "0,1" line.long 0x4 "ALFL,GPIO alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "ALFSEL7,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 24.--27. 1. "ALFSEL6,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 20.--23. 1. "ALFSEL5,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 16.--19. 1. "ALFSEL4,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 12.--15. 1. "ALFSEL3,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 8.--11. 1. "ALFSEL2,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 4.--7. 1. "ALFSEL1,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 0.--3. 1. "ALFSEL0,Alternate function selection for port xbit y (y = 0..7)" line.long 0x8 "ALFH,GPIO alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "ALFSEL15,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 24.--27. 1. "ALFSEL14,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 20.--23. 1. "ALFSEL13,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 16.--19. 1. "ALFSEL12,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 12.--15. 1. "ALFSEL11,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 8.--11. 1. "ALFSEL10,Alternate function selection for port x" hexmask.long.byte 0x8 4.--7. 1. "ALFSEL9,Alternate function selection for port x" hexmask.long.byte 0x8 0.--3. 1. "ALFSEL8,Alternate function selection for port x" wgroup.long 0x28++0x3 line.long 0x0 "BR,Port bit clear register" bitfld.long 0x0 15. "BR15,Port x clear bit y" "0,1" bitfld.long 0x0 14. "BR14,Port x clear bit y" "0,1" bitfld.long 0x0 13. "BR13,Port x clear bit y" "0,1" bitfld.long 0x0 12. "BR12,Port x clear bit y" "0,1" bitfld.long 0x0 11. "BR11,Port x clear bit y" "0,1" bitfld.long 0x0 10. "BR10,Port x clear bit y" "0,1" bitfld.long 0x0 9. "BR9,Port x clear bit y" "0,1" bitfld.long 0x0 8. "BR8,Port x clear bit y" "0,1" bitfld.long 0x0 7. "BR7,Port x clear bit y" "0,1" bitfld.long 0x0 6. "BR6,Port x clear bit y" "0,1" bitfld.long 0x0 5. "BR5,Port x clear bit y" "0,1" newline bitfld.long 0x0 4. "BR4,Port x clear bit y" "0,1" bitfld.long 0x0 3. "BR3,Port x clear bit y" "0,1" bitfld.long 0x0 2. "BR2,Port x clear bit y" "0,1" bitfld.long 0x0 1. "BR1,Port x clear bit y" "0,1" bitfld.long 0x0 0. "BR0,Port x clear bit y" "0,1" tree.end endif sif (cpuis("APM32F071*")) tree "GPIOE" base ad:0x48001000 group.long 0x0++0xF line.long 0x0 "MODE,GPIO port mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 18.--19. "MODE9,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration bits (y = 0..15)" "0,1,2,3" newline bitfld.long 0x0 8.--9. "MODE4,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 6.--7. "MODE3,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration bits (y = 0..15)" "0,1,2,3" line.long 0x4 "OMODE,GPIO port output type register" bitfld.long 0x4 15. "OMODE15,Port x configuration bit 15" "0,1" bitfld.long 0x4 14. "OMODE14,Port x configuration bit 14" "0,1" bitfld.long 0x4 13. "OMODE13,Port x configuration bit 13" "0,1" bitfld.long 0x4 12. "OMODE12,Port x configuration bit 12" "0,1" bitfld.long 0x4 11. "OMODE11,Port x configuration bit" "0,1" bitfld.long 0x4 10. "OMODE10,Port x configuration bit" "0,1" bitfld.long 0x4 9. "OMODE9,Port x configuration bit 9" "0,1" bitfld.long 0x4 8. "OMODE8,Port x configuration bit 8" "0,1" bitfld.long 0x4 7. "OMODE7,Port x configuration bit 7" "0,1" bitfld.long 0x4 6. "OMODE6,Port x configuration bit 6" "0,1" bitfld.long 0x4 5. "OMODE5,Port x configuration bit 5" "0,1" newline bitfld.long 0x4 4. "OMODE4,Port x configuration bit 4" "0,1" bitfld.long 0x4 3. "OMODE3,Port x configuration bit 3" "0,1" bitfld.long 0x4 2. "OMODE2,Port x configuration bit 2" "0,1" bitfld.long 0x4 1. "OMODE1,Port x configuration bit 1" "0,1" bitfld.long 0x4 0. "OMODE0,Port x configuration bit 0" "0,1" line.long 0x8 "OSSEL,GPIO port output speed register" bitfld.long 0x8 30.--31. "OSSEL15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 28.--29. "OSSEL14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 26.--27. "OSSEL13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 24.--25. "OSSEL12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 22.--23. "OSSEL11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 20.--21. "OSSEL10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 18.--19. "OSSEL9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 16.--17. "OSSEL8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 14.--15. "OSSEL7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 12.--13. "OSSEL6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 10.--11. "OSSEL5,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x8 8.--9. "OSSEL4,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 6.--7. "OSSEL3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 4.--5. "OSSEL2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 2.--3. "OSSEL1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 0.--1. "OSSEL0,Port x configuration bits (y =" "0,1,2,3" line.long 0xC "PUPD,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 18.--19. "PUPD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0xC 8.--9. "PUPD4,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 6.--7. "PUPD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration bits (y =" "0,1,2,3" rgroup.long 0x10++0x3 line.long 0x0 "IDATA,GPIO port input data register" bitfld.long 0x0 15. "IDATA15,Port input data (y =" "0,1" bitfld.long 0x0 14. "IDATA14,Port input data (y =" "0,1" bitfld.long 0x0 13. "IDATA13,Port input data (y =" "0,1" bitfld.long 0x0 12. "IDATA12,Port input data (y =" "0,1" bitfld.long 0x0 11. "IDATA11,Port input data (y =" "0,1" bitfld.long 0x0 10. "IDATA10,Port input data (y =" "0,1" bitfld.long 0x0 9. "IDATA9,Port input data (y =" "0,1" bitfld.long 0x0 8. "IDATA8,Port input data (y =" "0,1" bitfld.long 0x0 7. "IDATA7,Port input data (y =" "0,1" bitfld.long 0x0 6. "IDATA6,Port input data (y =" "0,1" bitfld.long 0x0 5. "IDATA5,Port input data (y =" "0,1" newline bitfld.long 0x0 4. "IDATA4,Port input data (y =" "0,1" bitfld.long 0x0 3. "IDATA3,Port input data (y =" "0,1" bitfld.long 0x0 2. "IDATA2,Port input data (y =" "0,1" bitfld.long 0x0 1. "IDATA1,Port input data (y =" "0,1" bitfld.long 0x0 0. "IDATA0,Port input data (y =" "0,1" group.long 0x14++0x3 line.long 0x0 "ODATA,GPIO port output data register" bitfld.long 0x0 15. "ODATA15,Port output data (y =" "0,1" bitfld.long 0x0 14. "ODATA14,Port output data (y =" "0,1" bitfld.long 0x0 13. "ODATA13,Port output data (y =" "0,1" bitfld.long 0x0 12. "ODATA12,Port output data (y =" "0,1" bitfld.long 0x0 11. "ODATA11,Port output data (y =" "0,1" bitfld.long 0x0 10. "ODATA10,Port output data (y =" "0,1" bitfld.long 0x0 9. "ODATA9,Port output data (y =" "0,1" bitfld.long 0x0 8. "ODATA8,Port output data (y =" "0,1" bitfld.long 0x0 7. "ODATA7,Port output data (y =" "0,1" bitfld.long 0x0 6. "ODATA6,Port output data (y =" "0,1" bitfld.long 0x0 5. "ODATA5,Port output data (y =" "0,1" newline bitfld.long 0x0 4. "ODATA4,Port output data (y =" "0,1" bitfld.long 0x0 3. "ODATA3,Port output data (y =" "0,1" bitfld.long 0x0 2. "ODATA2,Port output data (y =" "0,1" bitfld.long 0x0 1. "ODATA1,Port output data (y =" "0,1" bitfld.long 0x0 0. "ODATA0,Port output data (y =" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "BSC,GPIO port bit set/clear register" bitfld.long 0x0 31. "BC15,Port x clear bit y (y =" "0,1" bitfld.long 0x0 30. "BC14,Port x clear bit y (y =" "0,1" bitfld.long 0x0 29. "BC13,Port x clear bit y (y =" "0,1" bitfld.long 0x0 28. "BC12,Port x clear bit y (y =" "0,1" bitfld.long 0x0 27. "BC11,Port x clear bit y (y =" "0,1" bitfld.long 0x0 26. "BC10,Port x clear bit y (y =" "0,1" bitfld.long 0x0 25. "BC9,Port x clear bit y (y =" "0,1" bitfld.long 0x0 24. "BC8,Port x clear bit y (y =" "0,1" bitfld.long 0x0 23. "BC7,Port x clear bit y (y =" "0,1" bitfld.long 0x0 22. "BC6,Port x clear bit y (y =" "0,1" bitfld.long 0x0 21. "BC5,Port x clear bit y (y =" "0,1" newline bitfld.long 0x0 20. "BC4,Port x clear bit y (y =" "0,1" bitfld.long 0x0 19. "BC3,Port x clear bit y (y =" "0,1" bitfld.long 0x0 18. "BC2,Port x clear bit y (y =" "0,1" bitfld.long 0x0 17. "BC1,Port x clear bit y (y =" "0,1" bitfld.long 0x0 16. "BC0,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 15. "BS15,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 14. "BS14,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 13. "BS13,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 12. "BS12,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 11. "BS11,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 10. "BS10,Port x set bit y ( y = 0..15)" "0,1" newline bitfld.long 0x0 9. "BS9,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 8. "BS8,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 7. "BS7,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 6. "BS6,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 5. "BS5,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 4. "BS4,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 3. "BS3,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 2. "BS2,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 1. "BS1,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 0. "BS0,Port x set bit y (y = 0..15)" "0,1" group.long 0x1C++0xB line.long 0x0 "LOCK,GPIO port configuration lock" bitfld.long 0x0 16. "LOCKKEY,Port x lock bit y" "0,1" bitfld.long 0x0 15. "LOCK15,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 14. "LOCK14,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 13. "LOCK13,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 12. "LOCK12,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 11. "LOCK11,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 10. "LOCK10,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 9. "LOCK9,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 8. "LOCK8,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 7. "LOCK7,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 6. "LOCK6,Port x lock bit y (y = 0..15)" "0,1" newline bitfld.long 0x0 5. "LOCK5,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 4. "LOCK4,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 3. "LOCK3,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 2. "LOCK2,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 1. "LOCK1,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 0. "LOCK0,Port x lock bit y (y = 0..15)" "0,1" line.long 0x4 "ALFL,GPIO alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "ALFSEL7,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 24.--27. 1. "ALFSEL6,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 20.--23. 1. "ALFSEL5,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 16.--19. 1. "ALFSEL4,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 12.--15. 1. "ALFSEL3,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 8.--11. 1. "ALFSEL2,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 4.--7. 1. "ALFSEL1,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 0.--3. 1. "ALFSEL0,Alternate function selection for port xbit y (y = 0..7)" line.long 0x8 "ALFH,GPIO alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "ALFSEL15,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 24.--27. 1. "ALFSEL14,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 20.--23. 1. "ALFSEL13,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 16.--19. 1. "ALFSEL12,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 12.--15. 1. "ALFSEL11,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 8.--11. 1. "ALFSEL10,Alternate function selection for port x" hexmask.long.byte 0x8 4.--7. 1. "ALFSEL9,Alternate function selection for port x" hexmask.long.byte 0x8 0.--3. 1. "ALFSEL8,Alternate function selection for port x" wgroup.long 0x28++0x3 line.long 0x0 "BR,Port bit clear register" bitfld.long 0x0 15. "BR15,Port x clear bit y" "0,1" bitfld.long 0x0 14. "BR14,Port x clear bit y" "0,1" bitfld.long 0x0 13. "BR13,Port x clear bit y" "0,1" bitfld.long 0x0 12. "BR12,Port x clear bit y" "0,1" bitfld.long 0x0 11. "BR11,Port x clear bit y" "0,1" bitfld.long 0x0 10. "BR10,Port x clear bit y" "0,1" bitfld.long 0x0 9. "BR9,Port x clear bit y" "0,1" bitfld.long 0x0 8. "BR8,Port x clear bit y" "0,1" bitfld.long 0x0 7. "BR7,Port x clear bit y" "0,1" bitfld.long 0x0 6. "BR6,Port x clear bit y" "0,1" bitfld.long 0x0 5. "BR5,Port x clear bit y" "0,1" newline bitfld.long 0x0 4. "BR4,Port x clear bit y" "0,1" bitfld.long 0x0 3. "BR3,Port x clear bit y" "0,1" bitfld.long 0x0 2. "BR2,Port x clear bit y" "0,1" bitfld.long 0x0 1. "BR1,Port x clear bit y" "0,1" bitfld.long 0x0 0. "BR0,Port x clear bit y" "0,1" tree.end endif sif (cpuis("APM32F072*")) tree "GPIOE" base ad:0x48001000 group.long 0x0++0xF line.long 0x0 "MODE,GPIO port mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 18.--19. "MODE9,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration bits (y = 0..15)" "0,1,2,3" newline bitfld.long 0x0 8.--9. "MODE4,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 6.--7. "MODE3,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration bits (y = 0..15)" "0,1,2,3" line.long 0x4 "OMODE,GPIO port output type register" bitfld.long 0x4 15. "OMODE15,Port x configuration bit 15" "0,1" bitfld.long 0x4 14. "OMODE14,Port x configuration bit 14" "0,1" bitfld.long 0x4 13. "OMODE13,Port x configuration bit 13" "0,1" bitfld.long 0x4 12. "OMODE12,Port x configuration bit 12" "0,1" bitfld.long 0x4 11. "OMODE11,Port x configuration bit" "0,1" bitfld.long 0x4 10. "OMODE10,Port x configuration bit" "0,1" bitfld.long 0x4 9. "OMODE9,Port x configuration bit 9" "0,1" bitfld.long 0x4 8. "OMODE8,Port x configuration bit 8" "0,1" bitfld.long 0x4 7. "OMODE7,Port x configuration bit 7" "0,1" bitfld.long 0x4 6. "OMODE6,Port x configuration bit 6" "0,1" bitfld.long 0x4 5. "OMODE5,Port x configuration bit 5" "0,1" newline bitfld.long 0x4 4. "OMODE4,Port x configuration bit 4" "0,1" bitfld.long 0x4 3. "OMODE3,Port x configuration bit 3" "0,1" bitfld.long 0x4 2. "OMODE2,Port x configuration bit 2" "0,1" bitfld.long 0x4 1. "OMODE1,Port x configuration bit 1" "0,1" bitfld.long 0x4 0. "OMODE0,Port x configuration bit 0" "0,1" line.long 0x8 "OSSEL,GPIO port output speed register" bitfld.long 0x8 30.--31. "OSSEL15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 28.--29. "OSSEL14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 26.--27. "OSSEL13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 24.--25. "OSSEL12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 22.--23. "OSSEL11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 20.--21. "OSSEL10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 18.--19. "OSSEL9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 16.--17. "OSSEL8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 14.--15. "OSSEL7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 12.--13. "OSSEL6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 10.--11. "OSSEL5,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x8 8.--9. "OSSEL4,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 6.--7. "OSSEL3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 4.--5. "OSSEL2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 2.--3. "OSSEL1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 0.--1. "OSSEL0,Port x configuration bits (y =" "0,1,2,3" line.long 0xC "PUPD,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 18.--19. "PUPD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0xC 8.--9. "PUPD4,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 6.--7. "PUPD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration bits (y =" "0,1,2,3" rgroup.long 0x10++0x3 line.long 0x0 "IDATA,GPIO port input data register" bitfld.long 0x0 15. "IDATA15,Port input data (y =" "0,1" bitfld.long 0x0 14. "IDATA14,Port input data (y =" "0,1" bitfld.long 0x0 13. "IDATA13,Port input data (y =" "0,1" bitfld.long 0x0 12. "IDATA12,Port input data (y =" "0,1" bitfld.long 0x0 11. "IDATA11,Port input data (y =" "0,1" bitfld.long 0x0 10. "IDATA10,Port input data (y =" "0,1" bitfld.long 0x0 9. "IDATA9,Port input data (y =" "0,1" bitfld.long 0x0 8. "IDATA8,Port input data (y =" "0,1" bitfld.long 0x0 7. "IDATA7,Port input data (y =" "0,1" bitfld.long 0x0 6. "IDATA6,Port input data (y =" "0,1" bitfld.long 0x0 5. "IDATA5,Port input data (y =" "0,1" newline bitfld.long 0x0 4. "IDATA4,Port input data (y =" "0,1" bitfld.long 0x0 3. "IDATA3,Port input data (y =" "0,1" bitfld.long 0x0 2. "IDATA2,Port input data (y =" "0,1" bitfld.long 0x0 1. "IDATA1,Port input data (y =" "0,1" bitfld.long 0x0 0. "IDATA0,Port input data (y =" "0,1" group.long 0x14++0x3 line.long 0x0 "ODATA,GPIO port output data register" bitfld.long 0x0 15. "ODATA15,Port output data (y =" "0,1" bitfld.long 0x0 14. "ODATA14,Port output data (y =" "0,1" bitfld.long 0x0 13. "ODATA13,Port output data (y =" "0,1" bitfld.long 0x0 12. "ODATA12,Port output data (y =" "0,1" bitfld.long 0x0 11. "ODATA11,Port output data (y =" "0,1" bitfld.long 0x0 10. "ODATA10,Port output data (y =" "0,1" bitfld.long 0x0 9. "ODATA9,Port output data (y =" "0,1" bitfld.long 0x0 8. "ODATA8,Port output data (y =" "0,1" bitfld.long 0x0 7. "ODATA7,Port output data (y =" "0,1" bitfld.long 0x0 6. "ODATA6,Port output data (y =" "0,1" bitfld.long 0x0 5. "ODATA5,Port output data (y =" "0,1" newline bitfld.long 0x0 4. "ODATA4,Port output data (y =" "0,1" bitfld.long 0x0 3. "ODATA3,Port output data (y =" "0,1" bitfld.long 0x0 2. "ODATA2,Port output data (y =" "0,1" bitfld.long 0x0 1. "ODATA1,Port output data (y =" "0,1" bitfld.long 0x0 0. "ODATA0,Port output data (y =" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "BSC,GPIO port bit set/clear register" bitfld.long 0x0 31. "BC15,Port x clear bit y (y =" "0,1" bitfld.long 0x0 30. "BC14,Port x clear bit y (y =" "0,1" bitfld.long 0x0 29. "BC13,Port x clear bit y (y =" "0,1" bitfld.long 0x0 28. "BC12,Port x clear bit y (y =" "0,1" bitfld.long 0x0 27. "BC11,Port x clear bit y (y =" "0,1" bitfld.long 0x0 26. "BC10,Port x clear bit y (y =" "0,1" bitfld.long 0x0 25. "BC9,Port x clear bit y (y =" "0,1" bitfld.long 0x0 24. "BC8,Port x clear bit y (y =" "0,1" bitfld.long 0x0 23. "BC7,Port x clear bit y (y =" "0,1" bitfld.long 0x0 22. "BC6,Port x clear bit y (y =" "0,1" bitfld.long 0x0 21. "BC5,Port x clear bit y (y =" "0,1" newline bitfld.long 0x0 20. "BC4,Port x clear bit y (y =" "0,1" bitfld.long 0x0 19. "BC3,Port x clear bit y (y =" "0,1" bitfld.long 0x0 18. "BC2,Port x clear bit y (y =" "0,1" bitfld.long 0x0 17. "BC1,Port x clear bit y (y =" "0,1" bitfld.long 0x0 16. "BC0,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 15. "BS15,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 14. "BS14,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 13. "BS13,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 12. "BS12,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 11. "BS11,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 10. "BS10,Port x set bit y ( y = 0..15)" "0,1" newline bitfld.long 0x0 9. "BS9,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 8. "BS8,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 7. "BS7,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 6. "BS6,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 5. "BS5,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 4. "BS4,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 3. "BS3,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 2. "BS2,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 1. "BS1,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 0. "BS0,Port x set bit y (y = 0..15)" "0,1" group.long 0x1C++0xB line.long 0x0 "LOCK,GPIO port configuration lock" bitfld.long 0x0 16. "LOCKKEY,Port x lock bit y" "0,1" bitfld.long 0x0 15. "LOCK15,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 14. "LOCK14,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 13. "LOCK13,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 12. "LOCK12,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 11. "LOCK11,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 10. "LOCK10,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 9. "LOCK9,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 8. "LOCK8,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 7. "LOCK7,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 6. "LOCK6,Port x lock bit y (y = 0..15)" "0,1" newline bitfld.long 0x0 5. "LOCK5,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 4. "LOCK4,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 3. "LOCK3,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 2. "LOCK2,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 1. "LOCK1,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 0. "LOCK0,Port x lock bit y (y = 0..15)" "0,1" line.long 0x4 "ALFL,GPIO alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "ALFSEL7,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 24.--27. 1. "ALFSEL6,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 20.--23. 1. "ALFSEL5,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 16.--19. 1. "ALFSEL4,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 12.--15. 1. "ALFSEL3,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 8.--11. 1. "ALFSEL2,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 4.--7. 1. "ALFSEL1,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 0.--3. 1. "ALFSEL0,Alternate function selection for port xbit y (y = 0..7)" line.long 0x8 "ALFH,GPIO alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "ALFSEL15,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 24.--27. 1. "ALFSEL14,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 20.--23. 1. "ALFSEL13,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 16.--19. 1. "ALFSEL12,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 12.--15. 1. "ALFSEL11,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 8.--11. 1. "ALFSEL10,Alternate function selection for port x" hexmask.long.byte 0x8 4.--7. 1. "ALFSEL9,Alternate function selection for port x" hexmask.long.byte 0x8 0.--3. 1. "ALFSEL8,Alternate function selection for port x" wgroup.long 0x28++0x3 line.long 0x0 "BR,Port bit clear register" bitfld.long 0x0 15. "BR15,Port x clear bit y" "0,1" bitfld.long 0x0 14. "BR14,Port x clear bit y" "0,1" bitfld.long 0x0 13. "BR13,Port x clear bit y" "0,1" bitfld.long 0x0 12. "BR12,Port x clear bit y" "0,1" bitfld.long 0x0 11. "BR11,Port x clear bit y" "0,1" bitfld.long 0x0 10. "BR10,Port x clear bit y" "0,1" bitfld.long 0x0 9. "BR9,Port x clear bit y" "0,1" bitfld.long 0x0 8. "BR8,Port x clear bit y" "0,1" bitfld.long 0x0 7. "BR7,Port x clear bit y" "0,1" bitfld.long 0x0 6. "BR6,Port x clear bit y" "0,1" bitfld.long 0x0 5. "BR5,Port x clear bit y" "0,1" newline bitfld.long 0x0 4. "BR4,Port x clear bit y" "0,1" bitfld.long 0x0 3. "BR3,Port x clear bit y" "0,1" bitfld.long 0x0 2. "BR2,Port x clear bit y" "0,1" bitfld.long 0x0 1. "BR1,Port x clear bit y" "0,1" bitfld.long 0x0 0. "BR0,Port x clear bit y" "0,1" tree.end endif sif (cpuis("APM32F091*")) tree "GPIOE" base ad:0x48001000 group.long 0x0++0xF line.long 0x0 "MODE,GPIO port mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 18.--19. "MODE9,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration bits (y = 0..15)" "0,1,2,3" newline bitfld.long 0x0 8.--9. "MODE4,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 6.--7. "MODE3,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration bits (y = 0..15)" "0,1,2,3" line.long 0x4 "OMODE,GPIO port output type register" bitfld.long 0x4 15. "OMODE15,Port x configuration bit 15" "0,1" bitfld.long 0x4 14. "OMODE14,Port x configuration bit 14" "0,1" bitfld.long 0x4 13. "OMODE13,Port x configuration bit 13" "0,1" bitfld.long 0x4 12. "OMODE12,Port x configuration bit 12" "0,1" bitfld.long 0x4 11. "OMODE11,Port x configuration bit" "0,1" bitfld.long 0x4 10. "OMODE10,Port x configuration bit" "0,1" bitfld.long 0x4 9. "OMODE9,Port x configuration bit 9" "0,1" bitfld.long 0x4 8. "OMODE8,Port x configuration bit 8" "0,1" bitfld.long 0x4 7. "OMODE7,Port x configuration bit 7" "0,1" bitfld.long 0x4 6. "OMODE6,Port x configuration bit 6" "0,1" bitfld.long 0x4 5. "OMODE5,Port x configuration bit 5" "0,1" newline bitfld.long 0x4 4. "OMODE4,Port x configuration bit 4" "0,1" bitfld.long 0x4 3. "OMODE3,Port x configuration bit 3" "0,1" bitfld.long 0x4 2. "OMODE2,Port x configuration bit 2" "0,1" bitfld.long 0x4 1. "OMODE1,Port x configuration bit 1" "0,1" bitfld.long 0x4 0. "OMODE0,Port x configuration bit 0" "0,1" line.long 0x8 "OSSEL,GPIO port output speed register" bitfld.long 0x8 30.--31. "OSSEL15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 28.--29. "OSSEL14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 26.--27. "OSSEL13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 24.--25. "OSSEL12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 22.--23. "OSSEL11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 20.--21. "OSSEL10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 18.--19. "OSSEL9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 16.--17. "OSSEL8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 14.--15. "OSSEL7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 12.--13. "OSSEL6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 10.--11. "OSSEL5,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x8 8.--9. "OSSEL4,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 6.--7. "OSSEL3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 4.--5. "OSSEL2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 2.--3. "OSSEL1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 0.--1. "OSSEL0,Port x configuration bits (y =" "0,1,2,3" line.long 0xC "PUPD,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 18.--19. "PUPD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0xC 8.--9. "PUPD4,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 6.--7. "PUPD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration bits (y =" "0,1,2,3" rgroup.long 0x10++0x3 line.long 0x0 "IDATA,GPIO port input data register" bitfld.long 0x0 15. "IDATA15,Port input data (y =" "0,1" bitfld.long 0x0 14. "IDATA14,Port input data (y =" "0,1" bitfld.long 0x0 13. "IDATA13,Port input data (y =" "0,1" bitfld.long 0x0 12. "IDATA12,Port input data (y =" "0,1" bitfld.long 0x0 11. "IDATA11,Port input data (y =" "0,1" bitfld.long 0x0 10. "IDATA10,Port input data (y =" "0,1" bitfld.long 0x0 9. "IDATA9,Port input data (y =" "0,1" bitfld.long 0x0 8. "IDATA8,Port input data (y =" "0,1" bitfld.long 0x0 7. "IDATA7,Port input data (y =" "0,1" bitfld.long 0x0 6. "IDATA6,Port input data (y =" "0,1" bitfld.long 0x0 5. "IDATA5,Port input data (y =" "0,1" newline bitfld.long 0x0 4. "IDATA4,Port input data (y =" "0,1" bitfld.long 0x0 3. "IDATA3,Port input data (y =" "0,1" bitfld.long 0x0 2. "IDATA2,Port input data (y =" "0,1" bitfld.long 0x0 1. "IDATA1,Port input data (y =" "0,1" bitfld.long 0x0 0. "IDATA0,Port input data (y =" "0,1" group.long 0x14++0x3 line.long 0x0 "ODATA,GPIO port output data register" bitfld.long 0x0 15. "ODATA15,Port output data (y =" "0,1" bitfld.long 0x0 14. "ODATA14,Port output data (y =" "0,1" bitfld.long 0x0 13. "ODATA13,Port output data (y =" "0,1" bitfld.long 0x0 12. "ODATA12,Port output data (y =" "0,1" bitfld.long 0x0 11. "ODATA11,Port output data (y =" "0,1" bitfld.long 0x0 10. "ODATA10,Port output data (y =" "0,1" bitfld.long 0x0 9. "ODATA9,Port output data (y =" "0,1" bitfld.long 0x0 8. "ODATA8,Port output data (y =" "0,1" bitfld.long 0x0 7. "ODATA7,Port output data (y =" "0,1" bitfld.long 0x0 6. "ODATA6,Port output data (y =" "0,1" bitfld.long 0x0 5. "ODATA5,Port output data (y =" "0,1" newline bitfld.long 0x0 4. "ODATA4,Port output data (y =" "0,1" bitfld.long 0x0 3. "ODATA3,Port output data (y =" "0,1" bitfld.long 0x0 2. "ODATA2,Port output data (y =" "0,1" bitfld.long 0x0 1. "ODATA1,Port output data (y =" "0,1" bitfld.long 0x0 0. "ODATA0,Port output data (y =" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "BSC,GPIO port bit set/clear register" bitfld.long 0x0 31. "BC15,Port x clear bit y (y =" "0,1" bitfld.long 0x0 30. "BC14,Port x clear bit y (y =" "0,1" bitfld.long 0x0 29. "BC13,Port x clear bit y (y =" "0,1" bitfld.long 0x0 28. "BC12,Port x clear bit y (y =" "0,1" bitfld.long 0x0 27. "BC11,Port x clear bit y (y =" "0,1" bitfld.long 0x0 26. "BC10,Port x clear bit y (y =" "0,1" bitfld.long 0x0 25. "BC9,Port x clear bit y (y =" "0,1" bitfld.long 0x0 24. "BC8,Port x clear bit y (y =" "0,1" bitfld.long 0x0 23. "BC7,Port x clear bit y (y =" "0,1" bitfld.long 0x0 22. "BC6,Port x clear bit y (y =" "0,1" bitfld.long 0x0 21. "BC5,Port x clear bit y (y =" "0,1" newline bitfld.long 0x0 20. "BC4,Port x clear bit y (y =" "0,1" bitfld.long 0x0 19. "BC3,Port x clear bit y (y =" "0,1" bitfld.long 0x0 18. "BC2,Port x clear bit y (y =" "0,1" bitfld.long 0x0 17. "BC1,Port x clear bit y (y =" "0,1" bitfld.long 0x0 16. "BC0,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 15. "BS15,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 14. "BS14,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 13. "BS13,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 12. "BS12,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 11. "BS11,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 10. "BS10,Port x set bit y ( y = 0..15)" "0,1" newline bitfld.long 0x0 9. "BS9,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 8. "BS8,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 7. "BS7,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 6. "BS6,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 5. "BS5,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 4. "BS4,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 3. "BS3,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 2. "BS2,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 1. "BS1,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 0. "BS0,Port x set bit y (y = 0..15)" "0,1" group.long 0x1C++0xB line.long 0x0 "LOCK,GPIO port configuration lock" bitfld.long 0x0 16. "LOCKKEY,Port x lock bit y" "0,1" bitfld.long 0x0 15. "LOCK15,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 14. "LOCK14,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 13. "LOCK13,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 12. "LOCK12,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 11. "LOCK11,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 10. "LOCK10,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 9. "LOCK9,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 8. "LOCK8,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 7. "LOCK7,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 6. "LOCK6,Port x lock bit y (y = 0..15)" "0,1" newline bitfld.long 0x0 5. "LOCK5,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 4. "LOCK4,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 3. "LOCK3,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 2. "LOCK2,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 1. "LOCK1,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 0. "LOCK0,Port x lock bit y (y = 0..15)" "0,1" line.long 0x4 "ALFL,GPIO alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "ALFSEL7,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 24.--27. 1. "ALFSEL6,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 20.--23. 1. "ALFSEL5,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 16.--19. 1. "ALFSEL4,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 12.--15. 1. "ALFSEL3,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 8.--11. 1. "ALFSEL2,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 4.--7. 1. "ALFSEL1,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 0.--3. 1. "ALFSEL0,Alternate function selection for port xbit y (y = 0..7)" line.long 0x8 "ALFH,GPIO alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "ALFSEL15,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 24.--27. 1. "ALFSEL14,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 20.--23. 1. "ALFSEL13,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 16.--19. 1. "ALFSEL12,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 12.--15. 1. "ALFSEL11,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 8.--11. 1. "ALFSEL10,Alternate function selection for port x" hexmask.long.byte 0x8 4.--7. 1. "ALFSEL9,Alternate function selection for port x" hexmask.long.byte 0x8 0.--3. 1. "ALFSEL8,Alternate function selection for port x" wgroup.long 0x28++0x3 line.long 0x0 "BR,Port bit clear register" bitfld.long 0x0 15. "BR15,Port x clear bit y" "0,1" bitfld.long 0x0 14. "BR14,Port x clear bit y" "0,1" bitfld.long 0x0 13. "BR13,Port x clear bit y" "0,1" bitfld.long 0x0 12. "BR12,Port x clear bit y" "0,1" bitfld.long 0x0 11. "BR11,Port x clear bit y" "0,1" bitfld.long 0x0 10. "BR10,Port x clear bit y" "0,1" bitfld.long 0x0 9. "BR9,Port x clear bit y" "0,1" bitfld.long 0x0 8. "BR8,Port x clear bit y" "0,1" bitfld.long 0x0 7. "BR7,Port x clear bit y" "0,1" bitfld.long 0x0 6. "BR6,Port x clear bit y" "0,1" bitfld.long 0x0 5. "BR5,Port x clear bit y" "0,1" newline bitfld.long 0x0 4. "BR4,Port x clear bit y" "0,1" bitfld.long 0x0 3. "BR3,Port x clear bit y" "0,1" bitfld.long 0x0 2. "BR2,Port x clear bit y" "0,1" bitfld.long 0x0 1. "BR1,Port x clear bit y" "0,1" bitfld.long 0x0 0. "BR0,Port x clear bit y" "0,1" tree.end endif tree "GPIOA" base ad:0x48000000 group.long 0x0++0xF line.long 0x0 "MODE,GPIO port mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 18.--19. "MODE9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x0 8.--9. "MODE4,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 6.--7. "MODE3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration bits (y = 0..15)" "0,1,2,3" line.long 0x4 "OMODE,GPIO port output type register" bitfld.long 0x4 15. "OMODE15,Port x configuration bits (y =" "0,1" bitfld.long 0x4 14. "OMODE14,Port x configuration bits (y =" "0,1" bitfld.long 0x4 13. "OMODE13,Port x configuration bits (y =" "0,1" bitfld.long 0x4 12. "OMODE12,Port x configuration bits (y =" "0,1" bitfld.long 0x4 11. "OMODE11,Port x configuration bits (y =" "0,1" bitfld.long 0x4 10. "OMODE10,Port x configuration bits (y =" "0,1" bitfld.long 0x4 9. "OMODE9,Port x configuration bits (y =" "0,1" bitfld.long 0x4 8. "OMODE8,Port x configuration bits (y = 0..15)" "0,1" bitfld.long 0x4 7. "OMODE7,Port x configuration bits (y =" "0,1" bitfld.long 0x4 6. "OMODE6,Port x configuration bits (y =" "0,1" bitfld.long 0x4 5. "OMODE5,Port x configuration bits (y =" "0,1" newline bitfld.long 0x4 4. "OMODE4,Port x configuration bits (y =" "0,1" bitfld.long 0x4 3. "OMODE3,Port x configuration bits (y =" "0,1" bitfld.long 0x4 2. "OMODE2,Port x configuration bits (y =" "0,1" bitfld.long 0x4 1. "OMODE1,Port x configuration bits (y =" "0,1" bitfld.long 0x4 0. "OMODE0,Port x configuration bits (y =" "0,1" line.long 0x8 "OSSEL,GPIO port output speed register" bitfld.long 0x8 30.--31. "OSSEL15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 28.--29. "OSSEL14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 26.--27. "OSSEL13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 24.--25. "OSSEL12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 22.--23. "OSSEL11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 20.--21. "OSSEL10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 18.--19. "OSSEL9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 16.--17. "OSSEL8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 14.--15. "OSSEL7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 12.--13. "OSSEL6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 10.--11. "OSSEL5,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x8 8.--9. "OSSEL4,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 6.--7. "OSSEL3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 4.--5. "OSSEL2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 2.--3. "OSSEL1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 0.--1. "OSSEL0,Port x configuration bits (y =" "0,1,2,3" line.long 0xC "PUPD,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 18.--19. "PUPD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0xC 8.--9. "PUPD4,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 6.--7. "PUPD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration bits (y =" "0,1,2,3" rgroup.long 0x10++0x3 line.long 0x0 "IDATA,GPIO port input data register" bitfld.long 0x0 15. "IDATA15,Port input data (y =" "0,1" bitfld.long 0x0 14. "IDATA14,Port input data (y =" "0,1" bitfld.long 0x0 13. "IDATA13,Port input data (y =" "0,1" bitfld.long 0x0 12. "IDATA12,Port input data (y =" "0,1" bitfld.long 0x0 11. "IDATA11,Port input data (y =" "0,1" bitfld.long 0x0 10. "IDATA10,Port input data (y =" "0,1" bitfld.long 0x0 9. "IDATA9,Port input data (y =" "0,1" bitfld.long 0x0 8. "IDATA8,Port input data (y =" "0,1" bitfld.long 0x0 7. "IDATA7,Port input data (y =" "0,1" bitfld.long 0x0 6. "IDATA6,Port input data (y =" "0,1" bitfld.long 0x0 5. "IDATA5,Port input data (y =" "0,1" newline bitfld.long 0x0 4. "IDATA4,Port input data (y =" "0,1" bitfld.long 0x0 3. "IDATA3,Port input data (y =" "0,1" bitfld.long 0x0 2. "IDATA2,Port input data (y =" "0,1" bitfld.long 0x0 1. "IDATA1,Port input data (y =" "0,1" bitfld.long 0x0 0. "IDATA0,Port input data (y =" "0,1" group.long 0x14++0x3 line.long 0x0 "ODATA,GPIO port output data register" bitfld.long 0x0 15. "ODATA15,Port output data (y =" "0,1" bitfld.long 0x0 14. "ODATA14,Port output data (y =" "0,1" bitfld.long 0x0 13. "ODATA13,Port output data (y =" "0,1" bitfld.long 0x0 12. "ODATA12,Port output data (y =" "0,1" bitfld.long 0x0 11. "ODATA11,Port output data (y =" "0,1" bitfld.long 0x0 10. "ODATA10,Port output data (y =" "0,1" bitfld.long 0x0 9. "ODATA9,Port output data (y =" "0,1" bitfld.long 0x0 8. "ODATA8,Port output data (y =" "0,1" bitfld.long 0x0 7. "ODATA7,Port output data (y =" "0,1" bitfld.long 0x0 6. "ODATA6,Port output data (y =" "0,1" bitfld.long 0x0 5. "ODATA5,Port output data (y =" "0,1" newline bitfld.long 0x0 4. "ODATA4,Port output data (y =" "0,1" bitfld.long 0x0 3. "ODATA3,Port output data (y =" "0,1" bitfld.long 0x0 2. "ODATA2,Port output data (y =" "0,1" bitfld.long 0x0 1. "ODATA1,Port output data (y =" "0,1" bitfld.long 0x0 0. "ODATA0,Port output data (y =" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "BSC,GPIO port bit set/clear register" bitfld.long 0x0 31. "BC15,Port x clear bit y (y = 0..15)" "0,1" bitfld.long 0x0 30. "BC14,Port x clear bit y (y =" "0,1" bitfld.long 0x0 29. "BC13,Port x clear bit y (y =" "0,1" bitfld.long 0x0 28. "BC12,Port x clear bit y (y =" "0,1" bitfld.long 0x0 27. "BC11,Port x clear bit y (y =" "0,1" bitfld.long 0x0 26. "BC10,Port x clear bit y (y =" "0,1" bitfld.long 0x0 25. "BC9,Port x clear bit y (y =" "0,1" bitfld.long 0x0 24. "BC8,Port x clear bit y (y =" "0,1" bitfld.long 0x0 23. "BC7,Port x clear bit y (y =" "0,1" bitfld.long 0x0 22. "BC6,Port x clear bit y (y =" "0,1" bitfld.long 0x0 21. "BC5,Port x clear bit y (y =" "0,1" newline bitfld.long 0x0 20. "BC4,Port x clear bit y (y =" "0,1" bitfld.long 0x0 19. "BC3,Port x clear bit y (y =" "0,1" bitfld.long 0x0 18. "BC2,Port x clear bit y (y =" "0,1" bitfld.long 0x0 17. "BC1,Port x clear bit y (y =" "0,1" bitfld.long 0x0 16. "BC0,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 15. "BS15,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 14. "BS14,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 13. "BS13,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 12. "BS12,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 11. "BS11,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 10. "BS10,Port x set bit y (y = 0..15)" "0,1" newline bitfld.long 0x0 9. "BS9,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 8. "BS8,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 7. "BS7,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 6. "BS6,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 5. "BS5,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 4. "BS4,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 3. "BS3,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 2. "BS2,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 1. "BS1,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 0. "BS0,Port x set bit y (y = 0..15)" "0,1" group.long 0x1C++0xB line.long 0x0 "LOCK,GPIO port configuration lock" bitfld.long 0x0 16. "LOCKKEY,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 15. "LOCK15,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 14. "LOCK14,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 13. "LOCK13,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 12. "LOCK12,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 11. "LOCK11,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 10. "LOCK10,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 9. "LOCK9,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 8. "LOCK8,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 7. "LOCK7,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 6. "LOCK6,Port x lock bit y (y = 0..15)" "0,1" newline bitfld.long 0x0 5. "LOCK5,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 4. "LOCK4,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 3. "LOCK3,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 2. "LOCK2,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 1. "LOCK1,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 0. "LOCK0,Port x lock bit y (y = 0..15))" "0,1" line.long 0x4 "ALFL,GPIO alternate function low" hexmask.long.byte 0x4 28.--31. 1. "ALFSEL7,Alternate function selection for port x bit y (y = 0..7)" hexmask.long.byte 0x4 24.--27. 1. "ALFSEL6,Alternate function selection for port x bit y (y = 0..7)" hexmask.long.byte 0x4 20.--23. 1. "ALFSEL5,Alternate function selection for port x bit y (y = 0..7)" hexmask.long.byte 0x4 16.--19. 1. "ALFSEL4,Alternate function selection for port x bit y (y = 0..7)" hexmask.long.byte 0x4 12.--15. 1. "ALFSEL3,Alternate function selection for port x bit y (y = 0..7)" hexmask.long.byte 0x4 8.--11. 1. "ALFSEL2,Alternate function selection for port x bit y (y = 0..7)" hexmask.long.byte 0x4 4.--7. 1. "ALFSEL1,Alternate function selection for port x bit y (y = 0..7)" hexmask.long.byte 0x4 0.--3. 1. "ALFSEL0,Alternate function selection for port x bit y (y = 0..7)" line.long 0x8 "ALFH,GPIO alternate function high" hexmask.long.byte 0x8 28.--31. 1. "ALFSEL15,Alternate function selection for port x bit y (y = 8..15)" hexmask.long.byte 0x8 24.--27. 1. "ALFSEL14,Alternate function selection for port x bit y (y = 8..15)" hexmask.long.byte 0x8 20.--23. 1. "ALFSEL13,Alternate function selection for port x bit y (y = 8..15)" hexmask.long.byte 0x8 16.--19. 1. "ALFSEL12,Alternate function selection for port x bit y (y = 8..15)" hexmask.long.byte 0x8 12.--15. 1. "ALFSEL11,Alternate function selection for port x bit y (y = 8..15)" hexmask.long.byte 0x8 8.--11. 1. "ALFSEL10,Alternate function selection for port x bit y (y = 8..15)" hexmask.long.byte 0x8 4.--7. 1. "ALFSEL9,Alternate function selection for port x bit y (y = 8..15)" hexmask.long.byte 0x8 0.--3. 1. "ALFSEL8,Alternate function selection for port x bit y (y = 8..15)" wgroup.long 0x28++0x3 line.long 0x0 "BR,Port bit clear register" bitfld.long 0x0 15. "BR15,Port x clear bit y" "0,1" bitfld.long 0x0 14. "BR14,Port x clear bit y" "0,1" bitfld.long 0x0 13. "BR13,Port x clear bit y" "0,1" bitfld.long 0x0 12. "BR12,Port x clear bit y" "0,1" bitfld.long 0x0 11. "BR11,Port x clear bit y" "0,1" bitfld.long 0x0 10. "BR10,Port x clear bit y" "0,1" bitfld.long 0x0 9. "BR9,Port x clear bit y" "0,1" bitfld.long 0x0 8. "BR8,Port x clear bit y" "0,1" bitfld.long 0x0 7. "BR7,Port x clear bit y" "0,1" bitfld.long 0x0 6. "BR6,Port x clear bit y" "0,1" bitfld.long 0x0 5. "BR5,Port x clear bit y" "0,1" newline bitfld.long 0x0 4. "BR4,Port x clear bit y" "0,1" bitfld.long 0x0 3. "BR3,Port x clear bit y" "0,1" bitfld.long 0x0 2. "BR2,Port x clear bit y" "0,1" bitfld.long 0x0 1. "BR1,Port x clear bit y" "0,1" bitfld.long 0x0 0. "BR0,Port x clear bit y" "0,1" tree.end tree "GPIOB" base ad:0x48000400 group.long 0x0++0xF line.long 0x0 "MODE,GPIO port mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 18.--19. "MODE9,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration bits (y = 0..15)" "0,1,2,3" newline bitfld.long 0x0 8.--9. "MODE4,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 6.--7. "MODE3,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration bits (y = 0..15)" "0,1,2,3" line.long 0x4 "OMODE,GPIO port output type register" bitfld.long 0x4 15. "OMODE15,Port x configuration bit 15" "0,1" bitfld.long 0x4 14. "OMODE14,Port x configuration bit 14" "0,1" bitfld.long 0x4 13. "OMODE13,Port x configuration bit 13" "0,1" bitfld.long 0x4 12. "OMODE12,Port x configuration bit 12" "0,1" bitfld.long 0x4 11. "OMODE11,Port x configuration bit" "0,1" bitfld.long 0x4 10. "OMODE10,Port x configuration bit" "0,1" bitfld.long 0x4 9. "OMODE9,Port x configuration bit 9" "0,1" bitfld.long 0x4 8. "OMODE8,Port x configuration bit 8" "0,1" bitfld.long 0x4 7. "OMODE7,Port x configuration bit 7" "0,1" bitfld.long 0x4 6. "OMODE6,Port x configuration bit 6" "0,1" bitfld.long 0x4 5. "OMODE5,Port x configuration bit 5" "0,1" newline bitfld.long 0x4 4. "OMODE4,Port x configuration bit 4" "0,1" bitfld.long 0x4 3. "OMODE3,Port x configuration bit 3" "0,1" bitfld.long 0x4 2. "OMODE2,Port x configuration bit 2" "0,1" bitfld.long 0x4 1. "OMODE1,Port x configuration bit 1" "0,1" bitfld.long 0x4 0. "OMODE0,Port x configuration bit 0" "0,1" line.long 0x8 "OSSEL,GPIO port output speed register" bitfld.long 0x8 30.--31. "OSSEL15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 28.--29. "OSSEL14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 26.--27. "OSSEL13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 24.--25. "OSSEL12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 22.--23. "OSSEL11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 20.--21. "OSSEL10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 18.--19. "OSSEL9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 16.--17. "OSSEL8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 14.--15. "OSSEL7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 12.--13. "OSSEL6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 10.--11. "OSSEL5,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x8 8.--9. "OSSEL4,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 6.--7. "OSSEL3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 4.--5. "OSSEL2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 2.--3. "OSSEL1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 0.--1. "OSSEL0,Port x configuration bits (y =" "0,1,2,3" line.long 0xC "PUPD,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 18.--19. "PUPD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0xC 8.--9. "PUPD4,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 6.--7. "PUPD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration bits (y =" "0,1,2,3" rgroup.long 0x10++0x3 line.long 0x0 "IDATA,GPIO port input data register" bitfld.long 0x0 15. "IDATA15,Port input data (y =" "0,1" bitfld.long 0x0 14. "IDATA14,Port input data (y =" "0,1" bitfld.long 0x0 13. "IDATA13,Port input data (y =" "0,1" bitfld.long 0x0 12. "IDATA12,Port input data (y =" "0,1" bitfld.long 0x0 11. "IDATA11,Port input data (y =" "0,1" bitfld.long 0x0 10. "IDATA10,Port input data (y =" "0,1" bitfld.long 0x0 9. "IDATA9,Port input data (y =" "0,1" bitfld.long 0x0 8. "IDATA8,Port input data (y =" "0,1" bitfld.long 0x0 7. "IDATA7,Port input data (y =" "0,1" bitfld.long 0x0 6. "IDATA6,Port input data (y =" "0,1" bitfld.long 0x0 5. "IDATA5,Port input data (y =" "0,1" newline bitfld.long 0x0 4. "IDATA4,Port input data (y =" "0,1" bitfld.long 0x0 3. "IDATA3,Port input data (y =" "0,1" bitfld.long 0x0 2. "IDATA2,Port input data (y =" "0,1" bitfld.long 0x0 1. "IDATA1,Port input data (y =" "0,1" bitfld.long 0x0 0. "IDATA0,Port input data (y =" "0,1" group.long 0x14++0x3 line.long 0x0 "ODATA,GPIO port output data register" bitfld.long 0x0 15. "ODATA15,Port output data (y =" "0,1" bitfld.long 0x0 14. "ODATA14,Port output data (y =" "0,1" bitfld.long 0x0 13. "ODATA13,Port output data (y =" "0,1" bitfld.long 0x0 12. "ODATA12,Port output data (y =" "0,1" bitfld.long 0x0 11. "ODATA11,Port output data (y =" "0,1" bitfld.long 0x0 10. "ODATA10,Port output data (y =" "0,1" bitfld.long 0x0 9. "ODATA9,Port output data (y =" "0,1" bitfld.long 0x0 8. "ODATA8,Port output data (y =" "0,1" bitfld.long 0x0 7. "ODATA7,Port output data (y =" "0,1" bitfld.long 0x0 6. "ODATA6,Port output data (y =" "0,1" bitfld.long 0x0 5. "ODATA5,Port output data (y =" "0,1" newline bitfld.long 0x0 4. "ODATA4,Port output data (y =" "0,1" bitfld.long 0x0 3. "ODATA3,Port output data (y =" "0,1" bitfld.long 0x0 2. "ODATA2,Port output data (y =" "0,1" bitfld.long 0x0 1. "ODATA1,Port output data (y =" "0,1" bitfld.long 0x0 0. "ODATA0,Port output data (y =" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "BSC,GPIO port bit set/clear register" bitfld.long 0x0 31. "BC15,Port x clear bit y (y =" "0,1" bitfld.long 0x0 30. "BC14,Port x clear bit y (y =" "0,1" bitfld.long 0x0 29. "BC13,Port x clear bit y (y =" "0,1" bitfld.long 0x0 28. "BC12,Port x clear bit y (y =" "0,1" bitfld.long 0x0 27. "BC11,Port x clear bit y (y =" "0,1" bitfld.long 0x0 26. "BC10,Port x clear bit y (y =" "0,1" bitfld.long 0x0 25. "BC9,Port x clear bit y (y =" "0,1" bitfld.long 0x0 24. "BC8,Port x clear bit y (y =" "0,1" bitfld.long 0x0 23. "BC7,Port x clear bit y (y =" "0,1" bitfld.long 0x0 22. "BC6,Port x clear bit y (y =" "0,1" bitfld.long 0x0 21. "BC5,Port x clear bit y (y =" "0,1" newline bitfld.long 0x0 20. "BC4,Port x clear bit y (y =" "0,1" bitfld.long 0x0 19. "BC3,Port x clear bit y (y =" "0,1" bitfld.long 0x0 18. "BC2,Port x clear bit y (y =" "0,1" bitfld.long 0x0 17. "BC1,Port x clear bit y (y =" "0,1" bitfld.long 0x0 16. "BC0,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 15. "BS15,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 14. "BS14,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 13. "BS13,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 12. "BS12,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 11. "BS11,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 10. "BS10,Port x set bit y ( y = 0..15)" "0,1" newline bitfld.long 0x0 9. "BS9,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 8. "BS8,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 7. "BS7,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 6. "BS6,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 5. "BS5,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 4. "BS4,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 3. "BS3,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 2. "BS2,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 1. "BS1,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 0. "BS0,Port x set bit y (y = 0..15)" "0,1" group.long 0x1C++0xB line.long 0x0 "LOCK,GPIO port configuration lock" bitfld.long 0x0 16. "LOCKKEY,Port x lock bit y" "0,1" bitfld.long 0x0 15. "LOCK15,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 14. "LOCK14,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 13. "LOCK13,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 12. "LOCK12,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 11. "LOCK11,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 10. "LOCK10,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 9. "LOCK9,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 8. "LOCK8,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 7. "LOCK7,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 6. "LOCK6,Port x lock bit y (y = 0..15)" "0,1" newline bitfld.long 0x0 5. "LOCK5,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 4. "LOCK4,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 3. "LOCK3,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 2. "LOCK2,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 1. "LOCK1,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 0. "LOCK0,Port x lock bit y (y = 0..15)" "0,1" line.long 0x4 "ALFL,GPIO alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "ALFSEL7,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 24.--27. 1. "ALFSEL6,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 20.--23. 1. "ALFSEL5,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 16.--19. 1. "ALFSEL4,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 12.--15. 1. "ALFSEL3,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 8.--11. 1. "ALFSEL2,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 4.--7. 1. "ALFSEL1,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 0.--3. 1. "ALFSEL0,Alternate function selection for port xbit y (y = 0..7)" line.long 0x8 "ALFH,GPIO alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "ALFSEL15,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 24.--27. 1. "ALFSEL14,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 20.--23. 1. "ALFSEL13,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 16.--19. 1. "ALFSEL12,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 12.--15. 1. "ALFSEL11,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 8.--11. 1. "ALFSEL10,Alternate function selection for port x" hexmask.long.byte 0x8 4.--7. 1. "ALFSEL9,Alternate function selection for port x" hexmask.long.byte 0x8 0.--3. 1. "ALFSEL8,Alternate function selection for port x" wgroup.long 0x28++0x3 line.long 0x0 "BR,Port bit clear register" bitfld.long 0x0 15. "BR15,Port x clear bit y" "0,1" bitfld.long 0x0 14. "BR14,Port x clear bit y" "0,1" bitfld.long 0x0 13. "BR13,Port x clear bit y" "0,1" bitfld.long 0x0 12. "BR12,Port x clear bit y" "0,1" bitfld.long 0x0 11. "BR11,Port x clear bit y" "0,1" bitfld.long 0x0 10. "BR10,Port x clear bit y" "0,1" bitfld.long 0x0 9. "BR9,Port x clear bit y" "0,1" bitfld.long 0x0 8. "BR8,Port x clear bit y" "0,1" bitfld.long 0x0 7. "BR7,Port x clear bit y" "0,1" bitfld.long 0x0 6. "BR6,Port x clear bit y" "0,1" bitfld.long 0x0 5. "BR5,Port x clear bit y" "0,1" newline bitfld.long 0x0 4. "BR4,Port x clear bit y" "0,1" bitfld.long 0x0 3. "BR3,Port x clear bit y" "0,1" bitfld.long 0x0 2. "BR2,Port x clear bit y" "0,1" bitfld.long 0x0 1. "BR1,Port x clear bit y" "0,1" bitfld.long 0x0 0. "BR0,Port x clear bit y" "0,1" tree.end tree "GPIOC" base ad:0x48000800 group.long 0x0++0xF line.long 0x0 "MODE,GPIO port mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 18.--19. "MODE9,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration bits (y = 0..15)" "0,1,2,3" newline bitfld.long 0x0 8.--9. "MODE4,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 6.--7. "MODE3,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration bits (y = 0..15)" "0,1,2,3" line.long 0x4 "OMODE,GPIO port output type register" bitfld.long 0x4 15. "OMODE15,Port x configuration bit 15" "0,1" bitfld.long 0x4 14. "OMODE14,Port x configuration bit 14" "0,1" bitfld.long 0x4 13. "OMODE13,Port x configuration bit 13" "0,1" bitfld.long 0x4 12. "OMODE12,Port x configuration bit 12" "0,1" bitfld.long 0x4 11. "OMODE11,Port x configuration bit" "0,1" bitfld.long 0x4 10. "OMODE10,Port x configuration bit" "0,1" bitfld.long 0x4 9. "OMODE9,Port x configuration bit 9" "0,1" bitfld.long 0x4 8. "OMODE8,Port x configuration bit 8" "0,1" bitfld.long 0x4 7. "OMODE7,Port x configuration bit 7" "0,1" bitfld.long 0x4 6. "OMODE6,Port x configuration bit 6" "0,1" bitfld.long 0x4 5. "OMODE5,Port x configuration bit 5" "0,1" newline bitfld.long 0x4 4. "OMODE4,Port x configuration bit 4" "0,1" bitfld.long 0x4 3. "OMODE3,Port x configuration bit 3" "0,1" bitfld.long 0x4 2. "OMODE2,Port x configuration bit 2" "0,1" bitfld.long 0x4 1. "OMODE1,Port x configuration bit 1" "0,1" bitfld.long 0x4 0. "OMODE0,Port x configuration bit 0" "0,1" line.long 0x8 "OSSEL,GPIO port output speed register" bitfld.long 0x8 30.--31. "OSSEL15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 28.--29. "OSSEL14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 26.--27. "OSSEL13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 24.--25. "OSSEL12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 22.--23. "OSSEL11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 20.--21. "OSSEL10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 18.--19. "OSSEL9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 16.--17. "OSSEL8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 14.--15. "OSSEL7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 12.--13. "OSSEL6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 10.--11. "OSSEL5,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x8 8.--9. "OSSEL4,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 6.--7. "OSSEL3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 4.--5. "OSSEL2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 2.--3. "OSSEL1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 0.--1. "OSSEL0,Port x configuration bits (y =" "0,1,2,3" line.long 0xC "PUPD,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 18.--19. "PUPD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0xC 8.--9. "PUPD4,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 6.--7. "PUPD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration bits (y =" "0,1,2,3" rgroup.long 0x10++0x3 line.long 0x0 "IDATA,GPIO port input data register" bitfld.long 0x0 15. "IDATA15,Port input data (y =" "0,1" bitfld.long 0x0 14. "IDATA14,Port input data (y =" "0,1" bitfld.long 0x0 13. "IDATA13,Port input data (y =" "0,1" bitfld.long 0x0 12. "IDATA12,Port input data (y =" "0,1" bitfld.long 0x0 11. "IDATA11,Port input data (y =" "0,1" bitfld.long 0x0 10. "IDATA10,Port input data (y =" "0,1" bitfld.long 0x0 9. "IDATA9,Port input data (y =" "0,1" bitfld.long 0x0 8. "IDATA8,Port input data (y =" "0,1" bitfld.long 0x0 7. "IDATA7,Port input data (y =" "0,1" bitfld.long 0x0 6. "IDATA6,Port input data (y =" "0,1" bitfld.long 0x0 5. "IDATA5,Port input data (y =" "0,1" newline bitfld.long 0x0 4. "IDATA4,Port input data (y =" "0,1" bitfld.long 0x0 3. "IDATA3,Port input data (y =" "0,1" bitfld.long 0x0 2. "IDATA2,Port input data (y =" "0,1" bitfld.long 0x0 1. "IDATA1,Port input data (y =" "0,1" bitfld.long 0x0 0. "IDATA0,Port input data (y =" "0,1" group.long 0x14++0x3 line.long 0x0 "ODATA,GPIO port output data register" bitfld.long 0x0 15. "ODATA15,Port output data (y =" "0,1" bitfld.long 0x0 14. "ODATA14,Port output data (y =" "0,1" bitfld.long 0x0 13. "ODATA13,Port output data (y =" "0,1" bitfld.long 0x0 12. "ODATA12,Port output data (y =" "0,1" bitfld.long 0x0 11. "ODATA11,Port output data (y =" "0,1" bitfld.long 0x0 10. "ODATA10,Port output data (y =" "0,1" bitfld.long 0x0 9. "ODATA9,Port output data (y =" "0,1" bitfld.long 0x0 8. "ODATA8,Port output data (y =" "0,1" bitfld.long 0x0 7. "ODATA7,Port output data (y =" "0,1" bitfld.long 0x0 6. "ODATA6,Port output data (y =" "0,1" bitfld.long 0x0 5. "ODATA5,Port output data (y =" "0,1" newline bitfld.long 0x0 4. "ODATA4,Port output data (y =" "0,1" bitfld.long 0x0 3. "ODATA3,Port output data (y =" "0,1" bitfld.long 0x0 2. "ODATA2,Port output data (y =" "0,1" bitfld.long 0x0 1. "ODATA1,Port output data (y =" "0,1" bitfld.long 0x0 0. "ODATA0,Port output data (y =" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "BSC,GPIO port bit set/clear register" bitfld.long 0x0 31. "BC15,Port x clear bit y (y =" "0,1" bitfld.long 0x0 30. "BC14,Port x clear bit y (y =" "0,1" bitfld.long 0x0 29. "BC13,Port x clear bit y (y =" "0,1" bitfld.long 0x0 28. "BC12,Port x clear bit y (y =" "0,1" bitfld.long 0x0 27. "BC11,Port x clear bit y (y =" "0,1" bitfld.long 0x0 26. "BC10,Port x clear bit y (y =" "0,1" bitfld.long 0x0 25. "BC9,Port x clear bit y (y =" "0,1" bitfld.long 0x0 24. "BC8,Port x clear bit y (y =" "0,1" bitfld.long 0x0 23. "BC7,Port x clear bit y (y =" "0,1" bitfld.long 0x0 22. "BC6,Port x clear bit y (y =" "0,1" bitfld.long 0x0 21. "BC5,Port x clear bit y (y =" "0,1" newline bitfld.long 0x0 20. "BC4,Port x clear bit y (y =" "0,1" bitfld.long 0x0 19. "BC3,Port x clear bit y (y =" "0,1" bitfld.long 0x0 18. "BC2,Port x clear bit y (y =" "0,1" bitfld.long 0x0 17. "BC1,Port x clear bit y (y =" "0,1" bitfld.long 0x0 16. "BC0,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 15. "BS15,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 14. "BS14,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 13. "BS13,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 12. "BS12,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 11. "BS11,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 10. "BS10,Port x set bit y ( y = 0..15)" "0,1" newline bitfld.long 0x0 9. "BS9,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 8. "BS8,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 7. "BS7,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 6. "BS6,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 5. "BS5,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 4. "BS4,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 3. "BS3,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 2. "BS2,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 1. "BS1,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 0. "BS0,Port x set bit y (y = 0..15)" "0,1" group.long 0x1C++0xB line.long 0x0 "LOCK,GPIO port configuration lock" bitfld.long 0x0 16. "LOCKKEY,Port x lock bit y" "0,1" bitfld.long 0x0 15. "LOCK15,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 14. "LOCK14,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 13. "LOCK13,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 12. "LOCK12,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 11. "LOCK11,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 10. "LOCK10,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 9. "LOCK9,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 8. "LOCK8,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 7. "LOCK7,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 6. "LOCK6,Port x lock bit y (y = 0..15)" "0,1" newline bitfld.long 0x0 5. "LOCK5,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 4. "LOCK4,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 3. "LOCK3,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 2. "LOCK2,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 1. "LOCK1,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 0. "LOCK0,Port x lock bit y (y = 0..15)" "0,1" line.long 0x4 "ALFL,GPIO alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "ALFSEL7,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 24.--27. 1. "ALFSEL6,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 20.--23. 1. "ALFSEL5,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 16.--19. 1. "ALFSEL4,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 12.--15. 1. "ALFSEL3,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 8.--11. 1. "ALFSEL2,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 4.--7. 1. "ALFSEL1,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 0.--3. 1. "ALFSEL0,Alternate function selection for port xbit y (y = 0..7)" line.long 0x8 "ALFH,GPIO alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "ALFSEL15,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 24.--27. 1. "ALFSEL14,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 20.--23. 1. "ALFSEL13,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 16.--19. 1. "ALFSEL12,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 12.--15. 1. "ALFSEL11,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 8.--11. 1. "ALFSEL10,Alternate function selection for port x" hexmask.long.byte 0x8 4.--7. 1. "ALFSEL9,Alternate function selection for port x" hexmask.long.byte 0x8 0.--3. 1. "ALFSEL8,Alternate function selection for port x" wgroup.long 0x28++0x3 line.long 0x0 "BR,Port bit clear register" bitfld.long 0x0 15. "BR15,Port x clear bit y" "0,1" bitfld.long 0x0 14. "BR14,Port x clear bit y" "0,1" bitfld.long 0x0 13. "BR13,Port x clear bit y" "0,1" bitfld.long 0x0 12. "BR12,Port x clear bit y" "0,1" bitfld.long 0x0 11. "BR11,Port x clear bit y" "0,1" bitfld.long 0x0 10. "BR10,Port x clear bit y" "0,1" bitfld.long 0x0 9. "BR9,Port x clear bit y" "0,1" bitfld.long 0x0 8. "BR8,Port x clear bit y" "0,1" bitfld.long 0x0 7. "BR7,Port x clear bit y" "0,1" bitfld.long 0x0 6. "BR6,Port x clear bit y" "0,1" bitfld.long 0x0 5. "BR5,Port x clear bit y" "0,1" newline bitfld.long 0x0 4. "BR4,Port x clear bit y" "0,1" bitfld.long 0x0 3. "BR3,Port x clear bit y" "0,1" bitfld.long 0x0 2. "BR2,Port x clear bit y" "0,1" bitfld.long 0x0 1. "BR1,Port x clear bit y" "0,1" bitfld.long 0x0 0. "BR0,Port x clear bit y" "0,1" tree.end tree "GPIOD" base ad:0x48000C00 group.long 0x0++0xF line.long 0x0 "MODE,GPIO port mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 18.--19. "MODE9,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration bits (y = 0..15)" "0,1,2,3" newline bitfld.long 0x0 8.--9. "MODE4,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 6.--7. "MODE3,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration bits (y = 0..15)" "0,1,2,3" line.long 0x4 "OMODE,GPIO port output type register" bitfld.long 0x4 15. "OMODE15,Port x configuration bit 15" "0,1" bitfld.long 0x4 14. "OMODE14,Port x configuration bit 14" "0,1" bitfld.long 0x4 13. "OMODE13,Port x configuration bit 13" "0,1" bitfld.long 0x4 12. "OMODE12,Port x configuration bit 12" "0,1" bitfld.long 0x4 11. "OMODE11,Port x configuration bit" "0,1" bitfld.long 0x4 10. "OMODE10,Port x configuration bit" "0,1" bitfld.long 0x4 9. "OMODE9,Port x configuration bit 9" "0,1" bitfld.long 0x4 8. "OMODE8,Port x configuration bit 8" "0,1" bitfld.long 0x4 7. "OMODE7,Port x configuration bit 7" "0,1" bitfld.long 0x4 6. "OMODE6,Port x configuration bit 6" "0,1" bitfld.long 0x4 5. "OMODE5,Port x configuration bit 5" "0,1" newline bitfld.long 0x4 4. "OMODE4,Port x configuration bit 4" "0,1" bitfld.long 0x4 3. "OMODE3,Port x configuration bit 3" "0,1" bitfld.long 0x4 2. "OMODE2,Port x configuration bit 2" "0,1" bitfld.long 0x4 1. "OMODE1,Port x configuration bit 1" "0,1" bitfld.long 0x4 0. "OMODE0,Port x configuration bit 0" "0,1" line.long 0x8 "OSSEL,GPIO port output speed register" bitfld.long 0x8 30.--31. "OSSEL15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 28.--29. "OSSEL14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 26.--27. "OSSEL13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 24.--25. "OSSEL12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 22.--23. "OSSEL11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 20.--21. "OSSEL10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 18.--19. "OSSEL9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 16.--17. "OSSEL8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 14.--15. "OSSEL7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 12.--13. "OSSEL6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 10.--11. "OSSEL5,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x8 8.--9. "OSSEL4,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 6.--7. "OSSEL3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 4.--5. "OSSEL2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 2.--3. "OSSEL1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 0.--1. "OSSEL0,Port x configuration bits (y =" "0,1,2,3" line.long 0xC "PUPD,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 18.--19. "PUPD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0xC 8.--9. "PUPD4,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 6.--7. "PUPD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration bits (y =" "0,1,2,3" rgroup.long 0x10++0x3 line.long 0x0 "IDATA,GPIO port input data register" bitfld.long 0x0 15. "IDATA15,Port input data (y =" "0,1" bitfld.long 0x0 14. "IDATA14,Port input data (y =" "0,1" bitfld.long 0x0 13. "IDATA13,Port input data (y =" "0,1" bitfld.long 0x0 12. "IDATA12,Port input data (y =" "0,1" bitfld.long 0x0 11. "IDATA11,Port input data (y =" "0,1" bitfld.long 0x0 10. "IDATA10,Port input data (y =" "0,1" bitfld.long 0x0 9. "IDATA9,Port input data (y =" "0,1" bitfld.long 0x0 8. "IDATA8,Port input data (y =" "0,1" bitfld.long 0x0 7. "IDATA7,Port input data (y =" "0,1" bitfld.long 0x0 6. "IDATA6,Port input data (y =" "0,1" bitfld.long 0x0 5. "IDATA5,Port input data (y =" "0,1" newline bitfld.long 0x0 4. "IDATA4,Port input data (y =" "0,1" bitfld.long 0x0 3. "IDATA3,Port input data (y =" "0,1" bitfld.long 0x0 2. "IDATA2,Port input data (y =" "0,1" bitfld.long 0x0 1. "IDATA1,Port input data (y =" "0,1" bitfld.long 0x0 0. "IDATA0,Port input data (y =" "0,1" group.long 0x14++0x3 line.long 0x0 "ODATA,GPIO port output data register" bitfld.long 0x0 15. "ODATA15,Port output data (y =" "0,1" bitfld.long 0x0 14. "ODATA14,Port output data (y =" "0,1" bitfld.long 0x0 13. "ODATA13,Port output data (y =" "0,1" bitfld.long 0x0 12. "ODATA12,Port output data (y =" "0,1" bitfld.long 0x0 11. "ODATA11,Port output data (y =" "0,1" bitfld.long 0x0 10. "ODATA10,Port output data (y =" "0,1" bitfld.long 0x0 9. "ODATA9,Port output data (y =" "0,1" bitfld.long 0x0 8. "ODATA8,Port output data (y =" "0,1" bitfld.long 0x0 7. "ODATA7,Port output data (y =" "0,1" bitfld.long 0x0 6. "ODATA6,Port output data (y =" "0,1" bitfld.long 0x0 5. "ODATA5,Port output data (y =" "0,1" newline bitfld.long 0x0 4. "ODATA4,Port output data (y =" "0,1" bitfld.long 0x0 3. "ODATA3,Port output data (y =" "0,1" bitfld.long 0x0 2. "ODATA2,Port output data (y =" "0,1" bitfld.long 0x0 1. "ODATA1,Port output data (y =" "0,1" bitfld.long 0x0 0. "ODATA0,Port output data (y =" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "BSC,GPIO port bit set/clear register" bitfld.long 0x0 31. "BC15,Port x clear bit y (y =" "0,1" bitfld.long 0x0 30. "BC14,Port x clear bit y (y =" "0,1" bitfld.long 0x0 29. "BC13,Port x clear bit y (y =" "0,1" bitfld.long 0x0 28. "BC12,Port x clear bit y (y =" "0,1" bitfld.long 0x0 27. "BC11,Port x clear bit y (y =" "0,1" bitfld.long 0x0 26. "BC10,Port x clear bit y (y =" "0,1" bitfld.long 0x0 25. "BC9,Port x clear bit y (y =" "0,1" bitfld.long 0x0 24. "BC8,Port x clear bit y (y =" "0,1" bitfld.long 0x0 23. "BC7,Port x clear bit y (y =" "0,1" bitfld.long 0x0 22. "BC6,Port x clear bit y (y =" "0,1" bitfld.long 0x0 21. "BC5,Port x clear bit y (y =" "0,1" newline bitfld.long 0x0 20. "BC4,Port x clear bit y (y =" "0,1" bitfld.long 0x0 19. "BC3,Port x clear bit y (y =" "0,1" bitfld.long 0x0 18. "BC2,Port x clear bit y (y =" "0,1" bitfld.long 0x0 17. "BC1,Port x clear bit y (y =" "0,1" bitfld.long 0x0 16. "BC0,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 15. "BS15,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 14. "BS14,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 13. "BS13,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 12. "BS12,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 11. "BS11,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 10. "BS10,Port x set bit y ( y = 0..15)" "0,1" newline bitfld.long 0x0 9. "BS9,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 8. "BS8,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 7. "BS7,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 6. "BS6,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 5. "BS5,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 4. "BS4,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 3. "BS3,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 2. "BS2,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 1. "BS1,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 0. "BS0,Port x set bit y (y = 0..15)" "0,1" group.long 0x1C++0xB line.long 0x0 "LOCK,GPIO port configuration lock" bitfld.long 0x0 16. "LOCKKEY,Port x lock bit y" "0,1" bitfld.long 0x0 15. "LOCK15,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 14. "LOCK14,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 13. "LOCK13,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 12. "LOCK12,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 11. "LOCK11,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 10. "LOCK10,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 9. "LOCK9,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 8. "LOCK8,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 7. "LOCK7,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 6. "LOCK6,Port x lock bit y (y = 0..15)" "0,1" newline bitfld.long 0x0 5. "LOCK5,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 4. "LOCK4,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 3. "LOCK3,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 2. "LOCK2,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 1. "LOCK1,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 0. "LOCK0,Port x lock bit y (y = 0..15)" "0,1" line.long 0x4 "ALFL,GPIO alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "ALFSEL7,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 24.--27. 1. "ALFSEL6,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 20.--23. 1. "ALFSEL5,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 16.--19. 1. "ALFSEL4,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 12.--15. 1. "ALFSEL3,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 8.--11. 1. "ALFSEL2,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 4.--7. 1. "ALFSEL1,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 0.--3. 1. "ALFSEL0,Alternate function selection for port xbit y (y = 0..7)" line.long 0x8 "ALFH,GPIO alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "ALFSEL15,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 24.--27. 1. "ALFSEL14,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 20.--23. 1. "ALFSEL13,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 16.--19. 1. "ALFSEL12,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 12.--15. 1. "ALFSEL11,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 8.--11. 1. "ALFSEL10,Alternate function selection for port x" hexmask.long.byte 0x8 4.--7. 1. "ALFSEL9,Alternate function selection for port x" hexmask.long.byte 0x8 0.--3. 1. "ALFSEL8,Alternate function selection for port x" wgroup.long 0x28++0x3 line.long 0x0 "BR,Port bit clear register" bitfld.long 0x0 15. "BR15,Port x clear bit y" "0,1" bitfld.long 0x0 14. "BR14,Port x clear bit y" "0,1" bitfld.long 0x0 13. "BR13,Port x clear bit y" "0,1" bitfld.long 0x0 12. "BR12,Port x clear bit y" "0,1" bitfld.long 0x0 11. "BR11,Port x clear bit y" "0,1" bitfld.long 0x0 10. "BR10,Port x clear bit y" "0,1" bitfld.long 0x0 9. "BR9,Port x clear bit y" "0,1" bitfld.long 0x0 8. "BR8,Port x clear bit y" "0,1" bitfld.long 0x0 7. "BR7,Port x clear bit y" "0,1" bitfld.long 0x0 6. "BR6,Port x clear bit y" "0,1" bitfld.long 0x0 5. "BR5,Port x clear bit y" "0,1" newline bitfld.long 0x0 4. "BR4,Port x clear bit y" "0,1" bitfld.long 0x0 3. "BR3,Port x clear bit y" "0,1" bitfld.long 0x0 2. "BR2,Port x clear bit y" "0,1" bitfld.long 0x0 1. "BR1,Port x clear bit y" "0,1" bitfld.long 0x0 0. "BR0,Port x clear bit y" "0,1" tree.end tree "GPIOF" base ad:0x48001400 group.long 0x0++0xF line.long 0x0 "MODE,GPIO port mode register" bitfld.long 0x0 30.--31. "MODE15,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 28.--29. "MODE14,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 26.--27. "MODE13,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 24.--25. "MODE12,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 22.--23. "MODE11,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 20.--21. "MODE10,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 18.--19. "MODE9,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 16.--17. "MODE8,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 14.--15. "MODE7,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 12.--13. "MODE6,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 10.--11. "MODE5,Port x configuration bits (y = 0..15)" "0,1,2,3" newline bitfld.long 0x0 8.--9. "MODE4,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 6.--7. "MODE3,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 4.--5. "MODE2,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 2.--3. "MODE1,Port x configuration bits (y = 0..15)" "0,1,2,3" bitfld.long 0x0 0.--1. "MODE0,Port x configuration bits (y = 0..15)" "0,1,2,3" line.long 0x4 "OMODE,GPIO port output type register" bitfld.long 0x4 15. "OMODE15,Port x configuration bit 15" "0,1" bitfld.long 0x4 14. "OMODE14,Port x configuration bit 14" "0,1" bitfld.long 0x4 13. "OMODE13,Port x configuration bit 13" "0,1" bitfld.long 0x4 12. "OMODE12,Port x configuration bit 12" "0,1" bitfld.long 0x4 11. "OMODE11,Port x configuration bit" "0,1" bitfld.long 0x4 10. "OMODE10,Port x configuration bit" "0,1" bitfld.long 0x4 9. "OMODE9,Port x configuration bit 9" "0,1" bitfld.long 0x4 8. "OMODE8,Port x configuration bit 8" "0,1" bitfld.long 0x4 7. "OMODE7,Port x configuration bit 7" "0,1" bitfld.long 0x4 6. "OMODE6,Port x configuration bit 6" "0,1" bitfld.long 0x4 5. "OMODE5,Port x configuration bit 5" "0,1" newline bitfld.long 0x4 4. "OMODE4,Port x configuration bit 4" "0,1" bitfld.long 0x4 3. "OMODE3,Port x configuration bit 3" "0,1" bitfld.long 0x4 2. "OMODE2,Port x configuration bit 2" "0,1" bitfld.long 0x4 1. "OMODE1,Port x configuration bit 1" "0,1" bitfld.long 0x4 0. "OMODE0,Port x configuration bit 0" "0,1" line.long 0x8 "OSSEL,GPIO port output speed register" bitfld.long 0x8 30.--31. "OSSEL15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 28.--29. "OSSEL14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 26.--27. "OSSEL13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 24.--25. "OSSEL12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 22.--23. "OSSEL11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 20.--21. "OSSEL10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 18.--19. "OSSEL9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 16.--17. "OSSEL8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 14.--15. "OSSEL7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 12.--13. "OSSEL6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 10.--11. "OSSEL5,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x8 8.--9. "OSSEL4,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 6.--7. "OSSEL3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 4.--5. "OSSEL2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 2.--3. "OSSEL1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 0.--1. "OSSEL0,Port x configuration bits (y =" "0,1,2,3" line.long 0xC "PUPD,GPIO port pull-up/pull-down register" bitfld.long 0xC 30.--31. "PUPD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 28.--29. "PUPD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 26.--27. "PUPD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 24.--25. "PUPD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 22.--23. "PUPD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 20.--21. "PUPD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 18.--19. "PUPD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 16.--17. "PUPD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 14.--15. "PUPD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 12.--13. "PUPD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 10.--11. "PUPD5,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0xC 8.--9. "PUPD4,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 6.--7. "PUPD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 4.--5. "PUPD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 2.--3. "PUPD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 0.--1. "PUPD0,Port x configuration bits (y =" "0,1,2,3" rgroup.long 0x10++0x3 line.long 0x0 "IDATA,GPIO port input data register" bitfld.long 0x0 15. "IDATA15,Port input data (y =" "0,1" bitfld.long 0x0 14. "IDATA14,Port input data (y =" "0,1" bitfld.long 0x0 13. "IDATA13,Port input data (y =" "0,1" bitfld.long 0x0 12. "IDATA12,Port input data (y =" "0,1" bitfld.long 0x0 11. "IDATA11,Port input data (y =" "0,1" bitfld.long 0x0 10. "IDATA10,Port input data (y =" "0,1" bitfld.long 0x0 9. "IDATA9,Port input data (y =" "0,1" bitfld.long 0x0 8. "IDATA8,Port input data (y =" "0,1" bitfld.long 0x0 7. "IDATA7,Port input data (y =" "0,1" bitfld.long 0x0 6. "IDATA6,Port input data (y =" "0,1" bitfld.long 0x0 5. "IDATA5,Port input data (y =" "0,1" newline bitfld.long 0x0 4. "IDATA4,Port input data (y =" "0,1" bitfld.long 0x0 3. "IDATA3,Port input data (y =" "0,1" bitfld.long 0x0 2. "IDATA2,Port input data (y =" "0,1" bitfld.long 0x0 1. "IDATA1,Port input data (y =" "0,1" bitfld.long 0x0 0. "IDATA0,Port input data (y =" "0,1" group.long 0x14++0x3 line.long 0x0 "ODATA,GPIO port output data register" bitfld.long 0x0 15. "ODATA15,Port output data (y =" "0,1" bitfld.long 0x0 14. "ODATA14,Port output data (y =" "0,1" bitfld.long 0x0 13. "ODATA13,Port output data (y =" "0,1" bitfld.long 0x0 12. "ODATA12,Port output data (y =" "0,1" bitfld.long 0x0 11. "ODATA11,Port output data (y =" "0,1" bitfld.long 0x0 10. "ODATA10,Port output data (y =" "0,1" bitfld.long 0x0 9. "ODATA9,Port output data (y =" "0,1" bitfld.long 0x0 8. "ODATA8,Port output data (y =" "0,1" bitfld.long 0x0 7. "ODATA7,Port output data (y =" "0,1" bitfld.long 0x0 6. "ODATA6,Port output data (y =" "0,1" bitfld.long 0x0 5. "ODATA5,Port output data (y =" "0,1" newline bitfld.long 0x0 4. "ODATA4,Port output data (y =" "0,1" bitfld.long 0x0 3. "ODATA3,Port output data (y =" "0,1" bitfld.long 0x0 2. "ODATA2,Port output data (y =" "0,1" bitfld.long 0x0 1. "ODATA1,Port output data (y =" "0,1" bitfld.long 0x0 0. "ODATA0,Port output data (y =" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "BSC,GPIO port bit set/clear register" bitfld.long 0x0 31. "BC15,Port x clear bit y (y =" "0,1" bitfld.long 0x0 30. "BC14,Port x clear bit y (y =" "0,1" bitfld.long 0x0 29. "BC13,Port x clear bit y (y =" "0,1" bitfld.long 0x0 28. "BC12,Port x clear bit y (y =" "0,1" bitfld.long 0x0 27. "BC11,Port x clear bit y (y =" "0,1" bitfld.long 0x0 26. "BC10,Port x clear bit y (y =" "0,1" bitfld.long 0x0 25. "BC9,Port x clear bit y (y =" "0,1" bitfld.long 0x0 24. "BC8,Port x clear bit y (y =" "0,1" bitfld.long 0x0 23. "BC7,Port x clear bit y (y =" "0,1" bitfld.long 0x0 22. "BC6,Port x clear bit y (y =" "0,1" bitfld.long 0x0 21. "BC5,Port x clear bit y (y =" "0,1" newline bitfld.long 0x0 20. "BC4,Port x clear bit y (y =" "0,1" bitfld.long 0x0 19. "BC3,Port x clear bit y (y =" "0,1" bitfld.long 0x0 18. "BC2,Port x clear bit y (y =" "0,1" bitfld.long 0x0 17. "BC1,Port x clear bit y (y =" "0,1" bitfld.long 0x0 16. "BC0,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 15. "BS15,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 14. "BS14,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 13. "BS13,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 12. "BS12,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 11. "BS11,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 10. "BS10,Port x set bit y ( y = 0..15)" "0,1" newline bitfld.long 0x0 9. "BS9,Port x set bit y ( y = 0..15)" "0,1" bitfld.long 0x0 8. "BS8,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 7. "BS7,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 6. "BS6,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 5. "BS5,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 4. "BS4,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 3. "BS3,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 2. "BS2,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 1. "BS1,Port x set bit y (y = 0..15)" "0,1" bitfld.long 0x0 0. "BS0,Port x set bit y (y = 0..15)" "0,1" group.long 0x1C++0xB line.long 0x0 "LOCK,GPIO port configuration lock" bitfld.long 0x0 16. "LOCKKEY,Port x lock bit y" "0,1" bitfld.long 0x0 15. "LOCK15,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 14. "LOCK14,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 13. "LOCK13,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 12. "LOCK12,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 11. "LOCK11,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 10. "LOCK10,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 9. "LOCK9,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 8. "LOCK8,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 7. "LOCK7,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 6. "LOCK6,Port x lock bit y (y = 0..15)" "0,1" newline bitfld.long 0x0 5. "LOCK5,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 4. "LOCK4,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 3. "LOCK3,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 2. "LOCK2,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 1. "LOCK1,Port x lock bit y (y = 0..15)" "0,1" bitfld.long 0x0 0. "LOCK0,Port x lock bit y (y = 0..15)" "0,1" line.long 0x4 "ALFL,GPIO alternate function low register" hexmask.long.byte 0x4 28.--31. 1. "ALFSEL7,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 24.--27. 1. "ALFSEL6,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 20.--23. 1. "ALFSEL5,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 16.--19. 1. "ALFSEL4,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 12.--15. 1. "ALFSEL3,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 8.--11. 1. "ALFSEL2,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 4.--7. 1. "ALFSEL1,Alternate function selection for port xbit y (y = 0..7)" hexmask.long.byte 0x4 0.--3. 1. "ALFSEL0,Alternate function selection for port xbit y (y = 0..7)" line.long 0x8 "ALFH,GPIO alternate function high register" hexmask.long.byte 0x8 28.--31. 1. "ALFSEL15,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 24.--27. 1. "ALFSEL14,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 20.--23. 1. "ALFSEL13,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 16.--19. 1. "ALFSEL12,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 12.--15. 1. "ALFSEL11,Alternate function selection for port xbit y (y = 8..15)" hexmask.long.byte 0x8 8.--11. 1. "ALFSEL10,Alternate function selection for port x" hexmask.long.byte 0x8 4.--7. 1. "ALFSEL9,Alternate function selection for port x" hexmask.long.byte 0x8 0.--3. 1. "ALFSEL8,Alternate function selection for port x" wgroup.long 0x28++0x3 line.long 0x0 "BR,Port bit clear register" bitfld.long 0x0 15. "BR15,Port x clear bit y" "0,1" bitfld.long 0x0 14. "BR14,Port x clear bit y" "0,1" bitfld.long 0x0 13. "BR13,Port x clear bit y" "0,1" bitfld.long 0x0 12. "BR12,Port x clear bit y" "0,1" bitfld.long 0x0 11. "BR11,Port x clear bit y" "0,1" bitfld.long 0x0 10. "BR10,Port x clear bit y" "0,1" bitfld.long 0x0 9. "BR9,Port x clear bit y" "0,1" bitfld.long 0x0 8. "BR8,Port x clear bit y" "0,1" bitfld.long 0x0 7. "BR7,Port x clear bit y" "0,1" bitfld.long 0x0 6. "BR6,Port x clear bit y" "0,1" bitfld.long 0x0 5. "BR5,Port x clear bit y" "0,1" newline bitfld.long 0x0 4. "BR4,Port x clear bit y" "0,1" bitfld.long 0x0 3. "BR3,Port x clear bit y" "0,1" bitfld.long 0x0 2. "BR2,Port x clear bit y" "0,1" bitfld.long 0x0 1. "BR1,Port x clear bit y" "0,1" bitfld.long 0x0 0. "BR0,Port x clear bit y" "0,1" tree.end tree.end tree "I2C (Internal Integrated Circuit Interface)" base ad:0x0 sif (cpuis("APM32F030*")||cpuis("APM32F051*")||cpuis("APM32F070*")) tree "I2C1" base ad:0x40005400 group.long 0x0++0x1B line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 23. "PECEN,PEC enable" "0,1" bitfld.long 0x0 22. "ALTEN,SMBUS alert enable" "0,1" bitfld.long 0x0 21. "DEADDREN,SMBus Device Default address" "0,1" bitfld.long 0x0 20. "HADDREN,SMBus Host address enable" "0,1" bitfld.long 0x0 19. "RBEN,Broadcast call enable" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 18. "WUPEN,Wake Up enable" "0,1" endif bitfld.long 0x0 17. "CLKSTRETCHD,Clock stretching disable" "0,1" bitfld.long 0x0 16. "SBCEN,Slave byte control" "0,1" newline bitfld.long 0x0 15. "DMARXEN,DMA reception requests enable" "0,1" bitfld.long 0x0 14. "DMATXEN,DMA transmission requests enable" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 13. "SWRST,Software reset" "0,1" endif bitfld.long 0x0 12. "ANFD,Analog noise filter mode" "0,1" hexmask.long.byte 0x0 8.--11. 1. "DNFCFG,Digital noise filter" bitfld.long 0x0 7. "ERRIEN,Error interrupts enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transfer Complete interrupt enable" "0,1" bitfld.long 0x0 5. "STOPIEN,STOP detection Interrupt enable" "0,1" newline bitfld.long 0x0 4. "NACKRXIEN,Not acknowledge received interrupt enable" "0,1" bitfld.long 0x0 3. "SADDRMIEN,Address match interrupt enable (slave only)" "0,1" bitfld.long 0x0 2. "RXIEN,RX Interrupt enable" "0,1" bitfld.long 0x0 1. "TXIEN,TX Interrupt enable" "0,1" bitfld.long 0x0 0. "I2CEN,I2C enable" "0,1" line.long 0x4 "CTRL2,CTRL2" bitfld.long 0x4 26. "PEC,Packet error checking byte" "0,1" bitfld.long 0x4 25. "ENDCFG,Automatic end mode (master mode)" "0,1" bitfld.long 0x4 24. "RELOADEN,NBYTES reload mode" "0,1" hexmask.long.byte 0x4 16.--23. 1. "NUMBYT,Number of bytes" bitfld.long 0x4 15. "NACKEN,NACK generation (slave mode)" "0,1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "0,1" bitfld.long 0x4 13. "START,Start generation" "0,1" bitfld.long 0x4 12. "ADDR10,10-bit address header only read direction (master receiver mode)" "0,1" newline bitfld.long 0x4 11. "SADDRLEN,10-bit addressing mode (master mode)" "0,1" bitfld.long 0x4 10. "TXDIR,Transfer direction (master mode)" "0,1" bitfld.long 0x4 8.--9. "SADDR8,Slave address bit 9:8 (master mode)" "0,1,2,3" hexmask.long.byte 0x4 1.--7. 1. "SADDR1,Slave address bit 7:1 (master mode)" bitfld.long 0x4 0. "SADDR0,Slave address bit 0 (master mode)" "0,1" line.long 0x8 "ADDR1,Own address register 1" bitfld.long 0x8 15. "ADDR1EN,Own Address 1 enable" "0,1" bitfld.long 0x8 10. "ADDR1LEN,Own Address 1 10-bit mode" "0,1" bitfld.long 0x8 8.--9. "ADDR8,Interface address" "0,1,2,3" hexmask.long.byte 0x8 1.--7. 1. "ADDR1,Interface address" bitfld.long 0x8 0. "ADDR0,Interface address" "0,1" line.long 0xC "ADDR2,Own address register 2" bitfld.long 0xC 15. "ADDR2EN,Own Address 2 enable" "0,1" bitfld.long 0xC 8.--10. "ADDR2MSK,Own Address 2 masks" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 1.--7. 1. "ADDR2,Interface address" line.long 0x10 "TIMING,Timing register" hexmask.long.byte 0x10 28.--31. 1. "TIMINGPSC,Clock prescaler" hexmask.long.byte 0x10 20.--23. 1. "DATAT,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "DATAHT,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "TIMEOUT,Status register 1" bitfld.long 0x14 31. "EXCLKTOEN,Extended clock timeout" "0,1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "CLKTOEN,Clock timeout enable" "0,1" bitfld.long 0x14 12. "IDLECLKTO,Idle clock timeout detection" "0,1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "STS,Interrupt and Status register" hexmask.long.byte 0x18 17.--23. 1. "ADDRCMFLG,Address match code (Slave mode)" rbitfld.long 0x18 16. "TXDIRFLG,Transfer direction (Slave" "0,1" rbitfld.long 0x18 15. "BUSBSYFLG,Bus busy" "0,1" rbitfld.long 0x18 13. "SMBALTFLG,SMBus alert" "0,1" rbitfld.long 0x18 12. "TTEFLG,Timeout or t_low detection" "0,1" rbitfld.long 0x18 11. "PECEFLG,PEC Error in reception" "0,1" rbitfld.long 0x18 10. "OVRURFLG,Overrun/Underrun (slave mode)" "0,1" rbitfld.long 0x18 9. "ALFLG,Arbitration lost" "0,1" newline rbitfld.long 0x18 8. "BERRFLG,Bus error" "0,1" rbitfld.long 0x18 7. "TXCRFLG,Transfer Complete Reload" "0,1" rbitfld.long 0x18 6. "TXCFLG,Transfer Complete (master" "0,1" rbitfld.long 0x18 5. "STOPFLG,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKFLG,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDRMFLG,Address matched (slave mode)" "0,1" rbitfld.long 0x18 2. "RXBNEFLG,Receive data register not empty" "0,1" bitfld.long 0x18 1. "TXINTFLG,Transmit interrupt status" "0,1" newline bitfld.long 0x18 0. "TXBEFLG,Transmit data register empty" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "INTFCLR,Interrupt clear register" bitfld.long 0x0 13. "SMBALTCLR,Alert flag clear" "0,1" bitfld.long 0x0 12. "TTECLR,Timeout detection flag" "0,1" bitfld.long 0x0 11. "PECECLR,PEC Error flag clear" "0,1" bitfld.long 0x0 10. "OVRURCLR,Overrun/Underrun flag" "0,1" bitfld.long 0x0 9. "ALCLR,Arbitration lost flag" "0,1" bitfld.long 0x0 8. "BERRCLR,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCLR,Stop detection flag clear" "0,1" bitfld.long 0x0 4. "NACKCLR,Not Acknowledge flag clear" "0,1" newline bitfld.long 0x0 3. "ADDRMCLR,Address Matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "PEC,PEC data register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking data" line.long 0x4 "RXDATA,Receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" tree.end endif sif (cpuis("APM32F030*")||cpuis("APM32F051*")||cpuis("APM32F070*")) tree "I2C2" base ad:0x40005800 group.long 0x0++0x1B line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 23. "PECEN,PEC enable" "0,1" bitfld.long 0x0 22. "ALTEN,SMBUS alert enable" "0,1" bitfld.long 0x0 21. "DEADDREN,SMBus Device Default address" "0,1" bitfld.long 0x0 20. "HADDREN,SMBus Host address enable" "0,1" bitfld.long 0x0 19. "RBEN,Broadcast call enable" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 18. "WUPEN,Wake Up enable" "0,1" endif bitfld.long 0x0 17. "CLKSTRETCHD,Clock stretching disable" "0,1" bitfld.long 0x0 16. "SBCEN,Slave byte control" "0,1" newline bitfld.long 0x0 15. "DMARXEN,DMA reception requests enable" "0,1" bitfld.long 0x0 14. "DMATXEN,DMA transmission requests enable" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 13. "SWRST,Software reset" "0,1" endif bitfld.long 0x0 12. "ANFD,Analog noise filter mode" "0,1" hexmask.long.byte 0x0 8.--11. 1. "DNFCFG,Digital noise filter" bitfld.long 0x0 7. "ERRIEN,Error interrupts enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transfer Complete interrupt enable" "0,1" bitfld.long 0x0 5. "STOPIEN,STOP detection Interrupt enable" "0,1" newline bitfld.long 0x0 4. "NACKRXIEN,Not acknowledge received interrupt enable" "0,1" bitfld.long 0x0 3. "SADDRMIEN,Address match interrupt enable (slave only)" "0,1" bitfld.long 0x0 2. "RXIEN,RX Interrupt enable" "0,1" bitfld.long 0x0 1. "TXIEN,TX Interrupt enable" "0,1" bitfld.long 0x0 0. "I2CEN,I2C enable" "0,1" line.long 0x4 "CTRL2,CTRL2" bitfld.long 0x4 26. "PEC,Packet error checking byte" "0,1" bitfld.long 0x4 25. "ENDCFG,Automatic end mode (master mode)" "0,1" bitfld.long 0x4 24. "RELOADEN,NBYTES reload mode" "0,1" hexmask.long.byte 0x4 16.--23. 1. "NUMBYT,Number of bytes" bitfld.long 0x4 15. "NACKEN,NACK generation (slave mode)" "0,1" bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "0,1" bitfld.long 0x4 13. "START,Start generation" "0,1" bitfld.long 0x4 12. "ADDR10,10-bit address header only read direction (master receiver mode)" "0,1" newline bitfld.long 0x4 11. "SADDRLEN,10-bit addressing mode (master mode)" "0,1" bitfld.long 0x4 10. "TXDIR,Transfer direction (master mode)" "0,1" bitfld.long 0x4 8.--9. "SADDR8,Slave address bit 9:8 (master mode)" "0,1,2,3" hexmask.long.byte 0x4 1.--7. 1. "SADDR1,Slave address bit 7:1 (master mode)" bitfld.long 0x4 0. "SADDR0,Slave address bit 0 (master mode)" "0,1" line.long 0x8 "ADDR1,Own address register 1" bitfld.long 0x8 15. "ADDR1EN,Own Address 1 enable" "0,1" bitfld.long 0x8 10. "ADDR1LEN,Own Address 1 10-bit mode" "0,1" bitfld.long 0x8 8.--9. "ADDR8,Interface address" "0,1,2,3" hexmask.long.byte 0x8 1.--7. 1. "ADDR1,Interface address" bitfld.long 0x8 0. "ADDR0,Interface address" "0,1" line.long 0xC "ADDR2,Own address register 2" bitfld.long 0xC 15. "ADDR2EN,Own Address 2 enable" "0,1" bitfld.long 0xC 8.--10. "ADDR2MSK,Own Address 2 masks" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 1.--7. 1. "ADDR2,Interface address" line.long 0x10 "TIMING,Timing register" hexmask.long.byte 0x10 28.--31. 1. "TIMINGPSC,Clock prescaler" hexmask.long.byte 0x10 20.--23. 1. "DATAT,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "DATAHT,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "TIMEOUT,Status register 1" bitfld.long 0x14 31. "EXCLKTOEN,Extended clock timeout" "0,1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "CLKTOEN,Clock timeout enable" "0,1" bitfld.long 0x14 12. "IDLECLKTO,Idle clock timeout detection" "0,1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "STS,Interrupt and Status register" hexmask.long.byte 0x18 17.--23. 1. "ADDRCMFLG,Address match code (Slave mode)" rbitfld.long 0x18 16. "TXDIRFLG,Transfer direction (Slave" "0,1" rbitfld.long 0x18 15. "BUSBSYFLG,Bus busy" "0,1" rbitfld.long 0x18 13. "SMBALTFLG,SMBus alert" "0,1" rbitfld.long 0x18 12. "TTEFLG,Timeout or t_low detection" "0,1" rbitfld.long 0x18 11. "PECEFLG,PEC Error in reception" "0,1" rbitfld.long 0x18 10. "OVRURFLG,Overrun/Underrun (slave mode)" "0,1" rbitfld.long 0x18 9. "ALFLG,Arbitration lost" "0,1" newline rbitfld.long 0x18 8. "BERRFLG,Bus error" "0,1" rbitfld.long 0x18 7. "TXCRFLG,Transfer Complete Reload" "0,1" rbitfld.long 0x18 6. "TXCFLG,Transfer Complete (master" "0,1" rbitfld.long 0x18 5. "STOPFLG,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKFLG,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDRMFLG,Address matched (slave mode)" "0,1" rbitfld.long 0x18 2. "RXBNEFLG,Receive data register not empty" "0,1" bitfld.long 0x18 1. "TXINTFLG,Transmit interrupt status" "0,1" newline bitfld.long 0x18 0. "TXBEFLG,Transmit data register empty" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "INTFCLR,Interrupt clear register" bitfld.long 0x0 13. "SMBALTCLR,Alert flag clear" "0,1" bitfld.long 0x0 12. "TTECLR,Timeout detection flag" "0,1" bitfld.long 0x0 11. "PECECLR,PEC Error flag clear" "0,1" bitfld.long 0x0 10. "OVRURCLR,Overrun/Underrun flag" "0,1" bitfld.long 0x0 9. "ALCLR,Arbitration lost flag" "0,1" bitfld.long 0x0 8. "BERRCLR,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCLR,Stop detection flag clear" "0,1" bitfld.long 0x0 4. "NACKCLR,Not Acknowledge flag clear" "0,1" newline bitfld.long 0x0 3. "ADDRMCLR,Address Matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "PEC,PEC data register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking data" line.long 0x4 "RXDATA,Receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" tree.end endif sif (cpuis("APM32F071*")) tree "I2C1" base ad:0x40005400 group.long 0x0++0x1B line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 23. "PECEN,PEC enable" "0,1" bitfld.long 0x0 22. "ALTEN,SMBUS alert enable" "0,1" bitfld.long 0x0 21. "DEADDREN,SMBus Device Default address" "0,1" bitfld.long 0x0 20. "HADDREN,SMBus Host address enable" "0,1" bitfld.long 0x0 19. "RBEN,Broadcast call enable" "0,1" bitfld.long 0x0 18. "WUPEN,Wake Up enable" "0,1" bitfld.long 0x0 17. "CLKSTRETCHD,Clock stretching disable" "0,1" bitfld.long 0x0 16. "SBCEN,Slave byte control" "0,1" newline bitfld.long 0x0 15. "DMARXEN,DMA reception requests enable" "0,1" bitfld.long 0x0 14. "DMATXEN,DMA transmission requests enable" "0,1" bitfld.long 0x0 13. "SWRST,Software reset" "0,1" bitfld.long 0x0 12. "ANFD,Analog noise filter mode" "0,1" hexmask.long.byte 0x0 8.--11. 1. "DNFCFG,Digital noise filter" bitfld.long 0x0 7. "ERRIEN,Error interrupts enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transfer Complete interrupt enable" "0,1" bitfld.long 0x0 5. "STOPIEN,STOP detection Interrupt enable" "0,1" newline bitfld.long 0x0 4. "NACKRXIEN,Not acknowledge received interrupt enable" "0,1" bitfld.long 0x0 3. "SADDRMIEN,Address match interrupt enable (slave only)" "0,1" bitfld.long 0x0 2. "RXIEN,RX Interrupt enable" "0,1" bitfld.long 0x0 1. "TXIEN,TX Interrupt enable" "0,1" bitfld.long 0x0 0. "I2CEN,I2C enable" "0,1" line.long 0x4 "CTRL2,CTRL2" bitfld.long 0x4 26. "PEC,Packet error checking byte" "0,1" bitfld.long 0x4 25. "ENDCFG,Automatic end mode (master" "0,1" bitfld.long 0x4 24. "RELOADEN,NBYTES reload mode" "0,1" hexmask.long.byte 0x4 16.--23. 1. "NUMBYT,Number of bytes" bitfld.long 0x4 15. "NACKEN,NACK generation (slave" "0,1" bitfld.long 0x4 14. "STOP,Stop generation (master" "0,1" bitfld.long 0x4 13. "START,Start generation" "0,1" bitfld.long 0x4 12. "ADDR10,10-bit address header only read" "0,1" newline bitfld.long 0x4 11. "SADDRLEN,10-bit addressing mode (master" "0,1" bitfld.long 0x4 10. "TXDIR,Transfer direction (master" "0,1" bitfld.long 0x4 8.--9. "SADDR8,Slave address bit 9:8 (master" "0,1,2,3" hexmask.long.byte 0x4 1.--7. 1. "SADDR1,Slave address bit 7:1 (master" bitfld.long 0x4 0. "SADDR0,Slave address bit 0 (master" "0,1" line.long 0x8 "ADDR1,Own address register 1" bitfld.long 0x8 15. "ADDR1EN,Own Address 1 enable" "0,1" bitfld.long 0x8 10. "ADDR1LEN,Own Address 1 10-bit mode" "0,1" bitfld.long 0x8 8.--9. "ADDR8,Interface address" "0,1,2,3" hexmask.long.byte 0x8 1.--7. 1. "ADDR1,Interface address" bitfld.long 0x8 0. "ADDR0,Interface address" "0,1" line.long 0xC "ADDR2,Own address register 2" bitfld.long 0xC 15. "ADDR2EN,Own Address 2 enable" "0,1" bitfld.long 0xC 8.--10. "ADDR2MSK,Own Address 2 masks" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 1.--7. 1. "ADDR2,Interface address" line.long 0x10 "TIMING,Timing register" hexmask.long.byte 0x10 28.--31. 1. "TIMINGPSC,Clock prescaler" hexmask.long.byte 0x10 20.--23. 1. "DATAT,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "DATAHT,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "TIMEOUT,Status register 1" bitfld.long 0x14 31. "EXCLKTOEN,Extended clock timeout" "0,1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "CLKTOEN,Clock timeout enable" "0,1" bitfld.long 0x14 12. "IDLECLKTO,Idle clock timeout detection" "0,1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "STS,Interrupt and Status register" hexmask.long.byte 0x18 17.--23. 1. "ADDRCMFLG,Address match code (Slave mode)" rbitfld.long 0x18 16. "TXDIRFLG,Transfer direction (Slave" "0,1" rbitfld.long 0x18 15. "BUSBSYFLG,Bus busy" "0,1" rbitfld.long 0x18 13. "SMBALTFLG,SMBus alert" "0,1" rbitfld.long 0x18 12. "TTEFLG,Timeout or t_low detection" "0,1" rbitfld.long 0x18 11. "PECEFLG,PEC Error in reception" "0,1" rbitfld.long 0x18 10. "OVRURFLG,Overrun/Underrun (slave mode)" "0,1" rbitfld.long 0x18 9. "ALFLG,Arbitration lost" "0,1" newline rbitfld.long 0x18 8. "BERRFLG,Bus error" "0,1" rbitfld.long 0x18 7. "TXCRFLG,Transfer Complete Reload" "0,1" rbitfld.long 0x18 6. "TXCFLG,Transfer Complete (master" "0,1" rbitfld.long 0x18 5. "STOPFLG,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKFLG,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDRMFLG,Address matched (slave mode)" "0,1" rbitfld.long 0x18 2. "RXBNEFLG,Receive data register not empty" "0,1" bitfld.long 0x18 1. "TXINTFLG,Transmit interrupt status" "0,1" newline bitfld.long 0x18 0. "TXBEFLG,Transmit data register empty" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "INTFCLR,Interrupt clear register" bitfld.long 0x0 13. "SMBALTCLR,Alert flag clear" "0,1" bitfld.long 0x0 12. "TTECLR,Timeout detection flag" "0,1" bitfld.long 0x0 11. "PECECLR,PEC Error flag clear" "0,1" bitfld.long 0x0 10. "OVRURCLR,Overrun/Underrun flag" "0,1" bitfld.long 0x0 9. "ALCLR,Arbitration lost flag" "0,1" bitfld.long 0x0 8. "BERRCLR,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCLR,Stop detection flag clear" "0,1" bitfld.long 0x0 4. "NACKCLR,Not Acknowledge flag clear" "0,1" newline bitfld.long 0x0 3. "ADDRMCLR,Address Matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "PEC,PEC data register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking data" line.long 0x4 "RXDATA,Receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" tree.end tree "I2C2" base ad:0x40005800 group.long 0x0++0x1B line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 23. "PECEN,PEC enable" "0,1" bitfld.long 0x0 22. "ALTEN,SMBUS alert enable" "0,1" bitfld.long 0x0 21. "DEADDREN,SMBus Device Default address" "0,1" bitfld.long 0x0 20. "HADDREN,SMBus Host address enable" "0,1" bitfld.long 0x0 19. "RBEN,Broadcast call enable" "0,1" bitfld.long 0x0 18. "WUPEN,Wake Up enable" "0,1" bitfld.long 0x0 17. "CLKSTRETCHD,Clock stretching disable" "0,1" bitfld.long 0x0 16. "SBCEN,Slave byte control" "0,1" newline bitfld.long 0x0 15. "DMARXEN,DMA reception requests enable" "0,1" bitfld.long 0x0 14. "DMATXEN,DMA transmission requests enable" "0,1" bitfld.long 0x0 13. "SWRST,Software reset" "0,1" bitfld.long 0x0 12. "ANFD,Analog noise filter mode" "0,1" hexmask.long.byte 0x0 8.--11. 1. "DNFCFG,Digital noise filter" bitfld.long 0x0 7. "ERRIEN,Error interrupts enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transfer Complete interrupt enable" "0,1" bitfld.long 0x0 5. "STOPIEN,STOP detection Interrupt enable" "0,1" newline bitfld.long 0x0 4. "NACKRXIEN,Not acknowledge received interrupt enable" "0,1" bitfld.long 0x0 3. "SADDRMIEN,Address match interrupt enable (slave only)" "0,1" bitfld.long 0x0 2. "RXIEN,RX Interrupt enable" "0,1" bitfld.long 0x0 1. "TXIEN,TX Interrupt enable" "0,1" bitfld.long 0x0 0. "I2CEN,I2C enable" "0,1" line.long 0x4 "CTRL2,CTRL2" bitfld.long 0x4 26. "PEC,Packet error checking byte" "0,1" bitfld.long 0x4 25. "ENDCFG,Automatic end mode (master" "0,1" bitfld.long 0x4 24. "RELOADEN,NBYTES reload mode" "0,1" hexmask.long.byte 0x4 16.--23. 1. "NUMBYT,Number of bytes" bitfld.long 0x4 15. "NACKEN,NACK generation (slave" "0,1" bitfld.long 0x4 14. "STOP,Stop generation (master" "0,1" bitfld.long 0x4 13. "START,Start generation" "0,1" bitfld.long 0x4 12. "ADDR10,10-bit address header only read" "0,1" newline bitfld.long 0x4 11. "SADDRLEN,10-bit addressing mode (master" "0,1" bitfld.long 0x4 10. "TXDIR,Transfer direction (master" "0,1" bitfld.long 0x4 8.--9. "SADDR8,Slave address bit 9:8 (master" "0,1,2,3" hexmask.long.byte 0x4 1.--7. 1. "SADDR1,Slave address bit 7:1 (master" bitfld.long 0x4 0. "SADDR0,Slave address bit 0 (master" "0,1" line.long 0x8 "ADDR1,Own address register 1" bitfld.long 0x8 15. "ADDR1EN,Own Address 1 enable" "0,1" bitfld.long 0x8 10. "ADDR1LEN,Own Address 1 10-bit mode" "0,1" bitfld.long 0x8 8.--9. "ADDR8,Interface address" "0,1,2,3" hexmask.long.byte 0x8 1.--7. 1. "ADDR1,Interface address" bitfld.long 0x8 0. "ADDR0,Interface address" "0,1" line.long 0xC "ADDR2,Own address register 2" bitfld.long 0xC 15. "ADDR2EN,Own Address 2 enable" "0,1" bitfld.long 0xC 8.--10. "ADDR2MSK,Own Address 2 masks" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 1.--7. 1. "ADDR2,Interface address" line.long 0x10 "TIMING,Timing register" hexmask.long.byte 0x10 28.--31. 1. "TIMINGPSC,Clock prescaler" hexmask.long.byte 0x10 20.--23. 1. "DATAT,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "DATAHT,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "TIMEOUT,Status register 1" bitfld.long 0x14 31. "EXCLKTOEN,Extended clock timeout" "0,1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "CLKTOEN,Clock timeout enable" "0,1" bitfld.long 0x14 12. "IDLECLKTO,Idle clock timeout detection" "0,1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "STS,Interrupt and Status register" hexmask.long.byte 0x18 17.--23. 1. "ADDRCMFLG,Address match code (Slave mode)" rbitfld.long 0x18 16. "TXDIRFLG,Transfer direction (Slave" "0,1" rbitfld.long 0x18 15. "BUSBSYFLG,Bus busy" "0,1" rbitfld.long 0x18 13. "SMBALTFLG,SMBus alert" "0,1" rbitfld.long 0x18 12. "TTEFLG,Timeout or t_low detection" "0,1" rbitfld.long 0x18 11. "PECEFLG,PEC Error in reception" "0,1" rbitfld.long 0x18 10. "OVRURFLG,Overrun/Underrun (slave mode)" "0,1" rbitfld.long 0x18 9. "ALFLG,Arbitration lost" "0,1" newline rbitfld.long 0x18 8. "BERRFLG,Bus error" "0,1" rbitfld.long 0x18 7. "TXCRFLG,Transfer Complete Reload" "0,1" rbitfld.long 0x18 6. "TXCFLG,Transfer Complete (master" "0,1" rbitfld.long 0x18 5. "STOPFLG,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKFLG,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDRMFLG,Address matched (slave mode)" "0,1" rbitfld.long 0x18 2. "RXBNEFLG,Receive data register not empty" "0,1" bitfld.long 0x18 1. "TXINTFLG,Transmit interrupt status" "0,1" newline bitfld.long 0x18 0. "TXBEFLG,Transmit data register empty" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "INTFCLR,Interrupt clear register" bitfld.long 0x0 13. "SMBALTCLR,Alert flag clear" "0,1" bitfld.long 0x0 12. "TTECLR,Timeout detection flag" "0,1" bitfld.long 0x0 11. "PECECLR,PEC Error flag clear" "0,1" bitfld.long 0x0 10. "OVRURCLR,Overrun/Underrun flag" "0,1" bitfld.long 0x0 9. "ALCLR,Arbitration lost flag" "0,1" bitfld.long 0x0 8. "BERRCLR,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCLR,Stop detection flag clear" "0,1" bitfld.long 0x0 4. "NACKCLR,Not Acknowledge flag clear" "0,1" newline bitfld.long 0x0 3. "ADDRMCLR,Address Matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "PEC,PEC data register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking data" line.long 0x4 "RXDATA,Receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" tree.end endif sif (cpuis("APM32F072*")) tree "I2C1" base ad:0x40005400 group.long 0x0++0x1B line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 23. "PECEN,PEC enable" "0,1" bitfld.long 0x0 22. "ALTEN,SMBUS alert enable" "0,1" bitfld.long 0x0 21. "DEADDREN,SMBus Device Default address" "0,1" bitfld.long 0x0 20. "HADDREN,SMBus Host address enable" "0,1" bitfld.long 0x0 19. "RBEN,Broadcast call enable" "0,1" bitfld.long 0x0 18. "WUPEN,Wake Up enable" "0,1" bitfld.long 0x0 17. "CLKSTRETCHD,Clock stretching disable" "0,1" bitfld.long 0x0 16. "SBCEN,Slave byte control" "0,1" newline bitfld.long 0x0 15. "DMARXEN,DMA reception requests enable" "0,1" bitfld.long 0x0 14. "DMATXEN,DMA transmission requests enable" "0,1" bitfld.long 0x0 13. "SWRST,Software reset" "0,1" bitfld.long 0x0 12. "ANFD,Analog noise filter mode" "0,1" hexmask.long.byte 0x0 8.--11. 1. "DNFCFG,Digital noise filter" bitfld.long 0x0 7. "ERRIEN,Error interrupts enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transfer Complete interrupt enable" "0,1" bitfld.long 0x0 5. "STOPIEN,STOP detection Interrupt enable" "0,1" newline bitfld.long 0x0 4. "NACKRXIEN,Not acknowledge received interrupt enable" "0,1" bitfld.long 0x0 3. "SADDRMIEN,Address match interrupt enable (slave only)" "0,1" bitfld.long 0x0 2. "RXIEN,RX Interrupt enable" "0,1" bitfld.long 0x0 1. "TXIEN,TX Interrupt enable" "0,1" bitfld.long 0x0 0. "I2CEN,I2C enable" "0,1" line.long 0x4 "CTRL2,CTRL2" bitfld.long 0x4 26. "PEC,Packet error checking byte" "0,1" bitfld.long 0x4 25. "ENDCFG,Automatic end mode (master" "0,1" bitfld.long 0x4 24. "RELOADEN,NBYTES reload mode" "0,1" hexmask.long.byte 0x4 16.--23. 1. "NUMBYT,Number of bytes" bitfld.long 0x4 15. "NACKEN,NACK generation (slave" "0,1" bitfld.long 0x4 14. "STOP,Stop generation (master" "0,1" bitfld.long 0x4 13. "START,Start generation" "0,1" bitfld.long 0x4 12. "ADDR10,10-bit address header only read" "0,1" newline bitfld.long 0x4 11. "SADDRLEN,10-bit addressing mode (master" "0,1" bitfld.long 0x4 10. "TXDIR,Transfer direction (master" "0,1" bitfld.long 0x4 8.--9. "SADDR8,Slave address bit 9:8 (master" "0,1,2,3" hexmask.long.byte 0x4 1.--7. 1. "SADDR1,Slave address bit 7:1 (master" bitfld.long 0x4 0. "SADDR0,Slave address bit 0 (master" "0,1" line.long 0x8 "ADDR1,Own address register 1" bitfld.long 0x8 15. "ADDR1EN,Own Address 1 enable" "0,1" bitfld.long 0x8 10. "ADDR1LEN,Own Address 1 10-bit mode" "0,1" bitfld.long 0x8 8.--9. "ADDR8,Interface address" "0,1,2,3" hexmask.long.byte 0x8 1.--7. 1. "ADDR1,Interface address" bitfld.long 0x8 0. "ADDR0,Interface address" "0,1" line.long 0xC "ADDR2,Own address register 2" bitfld.long 0xC 15. "ADDR2EN,Own Address 2 enable" "0,1" bitfld.long 0xC 8.--10. "ADDR2MSK,Own Address 2 masks" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 1.--7. 1. "ADDR2,Interface address" line.long 0x10 "TIMING,Timing register" hexmask.long.byte 0x10 28.--31. 1. "TIMINGPSC,Clock prescaler" hexmask.long.byte 0x10 20.--23. 1. "DATAT,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "DATAHT,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "TIMEOUT,Status register 1" bitfld.long 0x14 31. "EXCLKTOEN,Extended clock timeout" "0,1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "CLKTOEN,Clock timeout enable" "0,1" bitfld.long 0x14 12. "IDLECLKTO,Idle clock timeout detection" "0,1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "STS,Interrupt and Status register" hexmask.long.byte 0x18 17.--23. 1. "ADDRCMFLG,Address match code (Slave mode)" rbitfld.long 0x18 16. "TXDIRFLG,Transfer direction (Slave" "0,1" rbitfld.long 0x18 15. "BUSBSYFLG,Bus busy" "0,1" rbitfld.long 0x18 13. "SMBALTFLG,SMBus alert" "0,1" rbitfld.long 0x18 12. "TTEFLG,Timeout or t_low detection" "0,1" rbitfld.long 0x18 11. "PECEFLG,PEC Error in reception" "0,1" rbitfld.long 0x18 10. "OVRURFLG,Overrun/Underrun (slave mode)" "0,1" rbitfld.long 0x18 9. "ALFLG,Arbitration lost" "0,1" newline rbitfld.long 0x18 8. "BERRFLG,Bus error" "0,1" rbitfld.long 0x18 7. "TXCRFLG,Transfer Complete Reload" "0,1" rbitfld.long 0x18 6. "TXCFLG,Transfer Complete (master" "0,1" rbitfld.long 0x18 5. "STOPFLG,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKFLG,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDRMFLG,Address matched (slave mode)" "0,1" rbitfld.long 0x18 2. "RXBNEFLG,Receive data register not empty" "0,1" bitfld.long 0x18 1. "TXINTFLG,Transmit interrupt status" "0,1" newline bitfld.long 0x18 0. "TXBEFLG,Transmit data register empty" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "INTFCLR,Interrupt clear register" bitfld.long 0x0 13. "SMBALTCLR,Alert flag clear" "0,1" bitfld.long 0x0 12. "TTECLR,Timeout detection flag" "0,1" bitfld.long 0x0 11. "PECECLR,PEC Error flag clear" "0,1" bitfld.long 0x0 10. "OVRURCLR,Overrun/Underrun flag" "0,1" bitfld.long 0x0 9. "ALCLR,Arbitration lost flag" "0,1" bitfld.long 0x0 8. "BERRCLR,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCLR,Stop detection flag clear" "0,1" bitfld.long 0x0 4. "NACKCLR,Not Acknowledge flag clear" "0,1" newline bitfld.long 0x0 3. "ADDRMCLR,Address Matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "PEC,PEC data register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking data" line.long 0x4 "RXDATA,Receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" tree.end tree "I2C2" base ad:0x40005800 group.long 0x0++0x1B line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 23. "PECEN,PEC enable" "0,1" bitfld.long 0x0 22. "ALTEN,SMBUS alert enable" "0,1" bitfld.long 0x0 21. "DEADDREN,SMBus Device Default address" "0,1" bitfld.long 0x0 20. "HADDREN,SMBus Host address enable" "0,1" bitfld.long 0x0 19. "RBEN,Broadcast call enable" "0,1" bitfld.long 0x0 18. "WUPEN,Wake Up enable" "0,1" bitfld.long 0x0 17. "CLKSTRETCHD,Clock stretching disable" "0,1" bitfld.long 0x0 16. "SBCEN,Slave byte control" "0,1" newline bitfld.long 0x0 15. "DMARXEN,DMA reception requests enable" "0,1" bitfld.long 0x0 14. "DMATXEN,DMA transmission requests enable" "0,1" bitfld.long 0x0 13. "SWRST,Software reset" "0,1" bitfld.long 0x0 12. "ANFD,Analog noise filter mode" "0,1" hexmask.long.byte 0x0 8.--11. 1. "DNFCFG,Digital noise filter" bitfld.long 0x0 7. "ERRIEN,Error interrupts enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transfer Complete interrupt enable" "0,1" bitfld.long 0x0 5. "STOPIEN,STOP detection Interrupt enable" "0,1" newline bitfld.long 0x0 4. "NACKRXIEN,Not acknowledge received interrupt enable" "0,1" bitfld.long 0x0 3. "SADDRMIEN,Address match interrupt enable (slave only)" "0,1" bitfld.long 0x0 2. "RXIEN,RX Interrupt enable" "0,1" bitfld.long 0x0 1. "TXIEN,TX Interrupt enable" "0,1" bitfld.long 0x0 0. "I2CEN,I2C enable" "0,1" line.long 0x4 "CTRL2,CTRL2" bitfld.long 0x4 26. "PEC,Packet error checking byte" "0,1" bitfld.long 0x4 25. "ENDCFG,Automatic end mode (master" "0,1" bitfld.long 0x4 24. "RELOADEN,NBYTES reload mode" "0,1" hexmask.long.byte 0x4 16.--23. 1. "NUMBYT,Number of bytes" bitfld.long 0x4 15. "NACKEN,NACK generation (slave" "0,1" bitfld.long 0x4 14. "STOP,Stop generation (master" "0,1" bitfld.long 0x4 13. "START,Start generation" "0,1" bitfld.long 0x4 12. "ADDR10,10-bit address header only read" "0,1" newline bitfld.long 0x4 11. "SADDRLEN,10-bit addressing mode (master" "0,1" bitfld.long 0x4 10. "TXDIR,Transfer direction (master" "0,1" bitfld.long 0x4 8.--9. "SADDR8,Slave address bit 9:8 (master" "0,1,2,3" hexmask.long.byte 0x4 1.--7. 1. "SADDR1,Slave address bit 7:1 (master" bitfld.long 0x4 0. "SADDR0,Slave address bit 0 (master" "0,1" line.long 0x8 "ADDR1,Own address register 1" bitfld.long 0x8 15. "ADDR1EN,Own Address 1 enable" "0,1" bitfld.long 0x8 10. "ADDR1LEN,Own Address 1 10-bit mode" "0,1" bitfld.long 0x8 8.--9. "ADDR8,Interface address" "0,1,2,3" hexmask.long.byte 0x8 1.--7. 1. "ADDR1,Interface address" bitfld.long 0x8 0. "ADDR0,Interface address" "0,1" line.long 0xC "ADDR2,Own address register 2" bitfld.long 0xC 15. "ADDR2EN,Own Address 2 enable" "0,1" bitfld.long 0xC 8.--10. "ADDR2MSK,Own Address 2 masks" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 1.--7. 1. "ADDR2,Interface address" line.long 0x10 "TIMING,Timing register" hexmask.long.byte 0x10 28.--31. 1. "TIMINGPSC,Clock prescaler" hexmask.long.byte 0x10 20.--23. 1. "DATAT,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "DATAHT,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "TIMEOUT,Status register 1" bitfld.long 0x14 31. "EXCLKTOEN,Extended clock timeout" "0,1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "CLKTOEN,Clock timeout enable" "0,1" bitfld.long 0x14 12. "IDLECLKTO,Idle clock timeout detection" "0,1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "STS,Interrupt and Status register" hexmask.long.byte 0x18 17.--23. 1. "ADDRCMFLG,Address match code (Slave mode)" rbitfld.long 0x18 16. "TXDIRFLG,Transfer direction (Slave" "0,1" rbitfld.long 0x18 15. "BUSBSYFLG,Bus busy" "0,1" rbitfld.long 0x18 13. "SMBALTFLG,SMBus alert" "0,1" rbitfld.long 0x18 12. "TTEFLG,Timeout or t_low detection" "0,1" rbitfld.long 0x18 11. "PECEFLG,PEC Error in reception" "0,1" rbitfld.long 0x18 10. "OVRURFLG,Overrun/Underrun (slave mode)" "0,1" rbitfld.long 0x18 9. "ALFLG,Arbitration lost" "0,1" newline rbitfld.long 0x18 8. "BERRFLG,Bus error" "0,1" rbitfld.long 0x18 7. "TXCRFLG,Transfer Complete Reload" "0,1" rbitfld.long 0x18 6. "TXCFLG,Transfer Complete (master" "0,1" rbitfld.long 0x18 5. "STOPFLG,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKFLG,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDRMFLG,Address matched (slave mode)" "0,1" rbitfld.long 0x18 2. "RXBNEFLG,Receive data register not empty" "0,1" bitfld.long 0x18 1. "TXINTFLG,Transmit interrupt status" "0,1" newline bitfld.long 0x18 0. "TXBEFLG,Transmit data register empty" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "INTFCLR,Interrupt clear register" bitfld.long 0x0 13. "SMBALTCLR,Alert flag clear" "0,1" bitfld.long 0x0 12. "TTECLR,Timeout detection flag" "0,1" bitfld.long 0x0 11. "PECECLR,PEC Error flag clear" "0,1" bitfld.long 0x0 10. "OVRURCLR,Overrun/Underrun flag" "0,1" bitfld.long 0x0 9. "ALCLR,Arbitration lost flag" "0,1" bitfld.long 0x0 8. "BERRCLR,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCLR,Stop detection flag clear" "0,1" bitfld.long 0x0 4. "NACKCLR,Not Acknowledge flag clear" "0,1" newline bitfld.long 0x0 3. "ADDRMCLR,Address Matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "PEC,PEC data register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking data" line.long 0x4 "RXDATA,Receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" tree.end endif sif (cpuis("APM32F091*")) tree "I2C1" base ad:0x40005400 group.long 0x0++0x1B line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 23. "PECEN,PEC enable" "0,1" bitfld.long 0x0 22. "ALTEN,SMBUS alert enable" "0,1" bitfld.long 0x0 21. "DEADDREN,SMBus Device Default address" "0,1" bitfld.long 0x0 20. "HADDREN,SMBus Host address enable" "0,1" bitfld.long 0x0 19. "RBEN,Broadcast call enable" "0,1" bitfld.long 0x0 18. "WUPEN,Wake Up enable" "0,1" bitfld.long 0x0 17. "CLKSTRETCHD,Clock stretching disable" "0,1" bitfld.long 0x0 16. "SBCEN,Slave byte control" "0,1" newline bitfld.long 0x0 15. "DMARXEN,DMA reception requests enable" "0,1" bitfld.long 0x0 14. "DMATXEN,DMA transmission requests enable" "0,1" bitfld.long 0x0 13. "SWRST,Software reset" "0,1" bitfld.long 0x0 12. "ANFD,Analog noise filter mode" "0,1" hexmask.long.byte 0x0 8.--11. 1. "DNFCFG,Digital noise filter" bitfld.long 0x0 7. "ERRIEN,Error interrupts enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transfer Complete interrupt enable" "0,1" bitfld.long 0x0 5. "STOPIEN,STOP detection Interrupt enable" "0,1" newline bitfld.long 0x0 4. "NACKRXIEN,Not acknowledge received interrupt enable" "0,1" bitfld.long 0x0 3. "SADDRMIEN,Address match interrupt enable (slave only)" "0,1" bitfld.long 0x0 2. "RXIEN,RX Interrupt enable" "0,1" bitfld.long 0x0 1. "TXIEN,TX Interrupt enable" "0,1" bitfld.long 0x0 0. "I2CEN,I2C enable" "0,1" line.long 0x4 "CTRL2,CTRL2" bitfld.long 0x4 26. "PEC,Packet error checking byte" "0,1" bitfld.long 0x4 25. "ENDCFG,Automatic end mode (master" "0,1" bitfld.long 0x4 24. "RELOADEN,NBYTES reload mode" "0,1" hexmask.long.byte 0x4 16.--23. 1. "NUMBYT,Number of bytes" bitfld.long 0x4 15. "NACKEN,NACK generation (slave" "0,1" bitfld.long 0x4 14. "STOP,Stop generation (master" "0,1" bitfld.long 0x4 13. "START,Start generation" "0,1" bitfld.long 0x4 12. "ADDR10,10-bit address header only read" "0,1" newline bitfld.long 0x4 11. "SADDRLEN,10-bit addressing mode (master" "0,1" bitfld.long 0x4 10. "TXDIR,Transfer direction (master" "0,1" bitfld.long 0x4 8.--9. "SADDR8,Slave address bit 9:8 (master" "0,1,2,3" hexmask.long.byte 0x4 1.--7. 1. "SADDR1,Slave address bit 7:1 (master" bitfld.long 0x4 0. "SADDR0,Slave address bit 0 (master" "0,1" line.long 0x8 "ADDR1,Own address register 1" bitfld.long 0x8 15. "ADDR1EN,Own Address 1 enable" "0,1" bitfld.long 0x8 10. "ADDR1LEN,Own Address 1 10-bit mode" "0,1" bitfld.long 0x8 8.--9. "ADDR8,Interface address" "0,1,2,3" hexmask.long.byte 0x8 1.--7. 1. "ADDR1,Interface address" bitfld.long 0x8 0. "ADDR0,Interface address" "0,1" line.long 0xC "ADDR2,Own address register 2" bitfld.long 0xC 15. "ADDR2EN,Own Address 2 enable" "0,1" bitfld.long 0xC 8.--10. "ADDR2MSK,Own Address 2 masks" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 1.--7. 1. "ADDR2,Interface address" line.long 0x10 "TIMING,Timing register" hexmask.long.byte 0x10 28.--31. 1. "TIMINGPSC,Clock prescaler" hexmask.long.byte 0x10 20.--23. 1. "DATAT,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "DATAHT,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "TIMEOUT,Status register 1" bitfld.long 0x14 31. "EXCLKTOEN,Extended clock timeout" "0,1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "CLKTOEN,Clock timeout enable" "0,1" bitfld.long 0x14 12. "IDLECLKTO,Idle clock timeout detection" "0,1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "STS,Interrupt and Status register" hexmask.long.byte 0x18 17.--23. 1. "ADDRCMFLG,Address match code (Slave mode)" rbitfld.long 0x18 16. "TXDIRFLG,Transfer direction (Slave" "0,1" rbitfld.long 0x18 15. "BUSBSYFLG,Bus busy" "0,1" rbitfld.long 0x18 13. "SMBALTFLG,SMBus alert" "0,1" rbitfld.long 0x18 12. "TTEFLG,Timeout or t_low detection" "0,1" rbitfld.long 0x18 11. "PECEFLG,PEC Error in reception" "0,1" rbitfld.long 0x18 10. "OVRURFLG,Overrun/Underrun (slave mode)" "0,1" rbitfld.long 0x18 9. "ALFLG,Arbitration lost" "0,1" newline rbitfld.long 0x18 8. "BERRFLG,Bus error" "0,1" rbitfld.long 0x18 7. "TXCRFLG,Transfer Complete Reload" "0,1" rbitfld.long 0x18 6. "TXCFLG,Transfer Complete (master" "0,1" rbitfld.long 0x18 5. "STOPFLG,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKFLG,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDRMFLG,Address matched (slave mode)" "0,1" rbitfld.long 0x18 2. "RXBNEFLG,Receive data register not empty" "0,1" bitfld.long 0x18 1. "TXINTFLG,Transmit interrupt status" "0,1" newline bitfld.long 0x18 0. "TXBEFLG,Transmit data register empty" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "INTFCLR,Interrupt clear register" bitfld.long 0x0 13. "SMBALTCLR,Alert flag clear" "0,1" bitfld.long 0x0 12. "TTECLR,Timeout detection flag" "0,1" bitfld.long 0x0 11. "PECECLR,PEC Error flag clear" "0,1" bitfld.long 0x0 10. "OVRURCLR,Overrun/Underrun flag" "0,1" bitfld.long 0x0 9. "ALCLR,Arbitration lost flag" "0,1" bitfld.long 0x0 8. "BERRCLR,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCLR,Stop detection flag clear" "0,1" bitfld.long 0x0 4. "NACKCLR,Not Acknowledge flag clear" "0,1" newline bitfld.long 0x0 3. "ADDRMCLR,Address Matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "PEC,PEC data register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking data" line.long 0x4 "RXDATA,Receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" tree.end tree "I2C2" base ad:0x40005800 group.long 0x0++0x1B line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 23. "PECEN,PEC enable" "0,1" bitfld.long 0x0 22. "ALTEN,SMBUS alert enable" "0,1" bitfld.long 0x0 21. "DEADDREN,SMBus Device Default address" "0,1" bitfld.long 0x0 20. "HADDREN,SMBus Host address enable" "0,1" bitfld.long 0x0 19. "RBEN,Broadcast call enable" "0,1" bitfld.long 0x0 18. "WUPEN,Wake Up enable" "0,1" bitfld.long 0x0 17. "CLKSTRETCHD,Clock stretching disable" "0,1" bitfld.long 0x0 16. "SBCEN,Slave byte control" "0,1" newline bitfld.long 0x0 15. "DMARXEN,DMA reception requests enable" "0,1" bitfld.long 0x0 14. "DMATXEN,DMA transmission requests enable" "0,1" bitfld.long 0x0 13. "SWRST,Software reset" "0,1" bitfld.long 0x0 12. "ANFD,Analog noise filter mode" "0,1" hexmask.long.byte 0x0 8.--11. 1. "DNFCFG,Digital noise filter" bitfld.long 0x0 7. "ERRIEN,Error interrupts enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transfer Complete interrupt enable" "0,1" bitfld.long 0x0 5. "STOPIEN,STOP detection Interrupt enable" "0,1" newline bitfld.long 0x0 4. "NACKRXIEN,Not acknowledge received interrupt enable" "0,1" bitfld.long 0x0 3. "SADDRMIEN,Address match interrupt enable (slave only)" "0,1" bitfld.long 0x0 2. "RXIEN,RX Interrupt enable" "0,1" bitfld.long 0x0 1. "TXIEN,TX Interrupt enable" "0,1" bitfld.long 0x0 0. "I2CEN,I2C enable" "0,1" line.long 0x4 "CTRL2,CTRL2" bitfld.long 0x4 26. "PEC,Packet error checking byte" "0,1" bitfld.long 0x4 25. "ENDCFG,Automatic end mode (master" "0,1" bitfld.long 0x4 24. "RELOADEN,NBYTES reload mode" "0,1" hexmask.long.byte 0x4 16.--23. 1. "NUMBYT,Number of bytes" bitfld.long 0x4 15. "NACKEN,NACK generation (slave" "0,1" bitfld.long 0x4 14. "STOP,Stop generation (master" "0,1" bitfld.long 0x4 13. "START,Start generation" "0,1" bitfld.long 0x4 12. "ADDR10,10-bit address header only read" "0,1" newline bitfld.long 0x4 11. "SADDRLEN,10-bit addressing mode (master" "0,1" bitfld.long 0x4 10. "TXDIR,Transfer direction (master" "0,1" bitfld.long 0x4 8.--9. "SADDR8,Slave address bit 9:8 (master" "0,1,2,3" hexmask.long.byte 0x4 1.--7. 1. "SADDR1,Slave address bit 7:1 (master" bitfld.long 0x4 0. "SADDR0,Slave address bit 0 (master" "0,1" line.long 0x8 "ADDR1,Own address register 1" bitfld.long 0x8 15. "ADDR1EN,Own Address 1 enable" "0,1" bitfld.long 0x8 10. "ADDR1LEN,Own Address 1 10-bit mode" "0,1" bitfld.long 0x8 8.--9. "ADDR8,Interface address" "0,1,2,3" hexmask.long.byte 0x8 1.--7. 1. "ADDR1,Interface address" bitfld.long 0x8 0. "ADDR0,Interface address" "0,1" line.long 0xC "ADDR2,Own address register 2" bitfld.long 0xC 15. "ADDR2EN,Own Address 2 enable" "0,1" bitfld.long 0xC 8.--10. "ADDR2MSK,Own Address 2 masks" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 1.--7. 1. "ADDR2,Interface address" line.long 0x10 "TIMING,Timing register" hexmask.long.byte 0x10 28.--31. 1. "TIMINGPSC,Clock prescaler" hexmask.long.byte 0x10 20.--23. 1. "DATAT,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "DATAHT,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)" line.long 0x14 "TIMEOUT,Status register 1" bitfld.long 0x14 31. "EXCLKTOEN,Extended clock timeout" "0,1" hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B" bitfld.long 0x14 15. "CLKTOEN,Clock timeout enable" "0,1" bitfld.long 0x14 12. "IDLECLKTO,Idle clock timeout detection" "0,1" hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus timeout A" line.long 0x18 "STS,Interrupt and Status register" hexmask.long.byte 0x18 17.--23. 1. "ADDRCMFLG,Address match code (Slave mode)" rbitfld.long 0x18 16. "TXDIRFLG,Transfer direction (Slave" "0,1" rbitfld.long 0x18 15. "BUSBSYFLG,Bus busy" "0,1" rbitfld.long 0x18 13. "SMBALTFLG,SMBus alert" "0,1" rbitfld.long 0x18 12. "TTEFLG,Timeout or t_low detection" "0,1" rbitfld.long 0x18 11. "PECEFLG,PEC Error in reception" "0,1" rbitfld.long 0x18 10. "OVRURFLG,Overrun/Underrun (slave mode)" "0,1" rbitfld.long 0x18 9. "ALFLG,Arbitration lost" "0,1" newline rbitfld.long 0x18 8. "BERRFLG,Bus error" "0,1" rbitfld.long 0x18 7. "TXCRFLG,Transfer Complete Reload" "0,1" rbitfld.long 0x18 6. "TXCFLG,Transfer Complete (master" "0,1" rbitfld.long 0x18 5. "STOPFLG,Stop detection flag" "0,1" rbitfld.long 0x18 4. "NACKFLG,Not acknowledge received flag" "0,1" rbitfld.long 0x18 3. "ADDRMFLG,Address matched (slave mode)" "0,1" rbitfld.long 0x18 2. "RXBNEFLG,Receive data register not empty" "0,1" bitfld.long 0x18 1. "TXINTFLG,Transmit interrupt status" "0,1" newline bitfld.long 0x18 0. "TXBEFLG,Transmit data register empty" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "INTFCLR,Interrupt clear register" bitfld.long 0x0 13. "SMBALTCLR,Alert flag clear" "0,1" bitfld.long 0x0 12. "TTECLR,Timeout detection flag" "0,1" bitfld.long 0x0 11. "PECECLR,PEC Error flag clear" "0,1" bitfld.long 0x0 10. "OVRURCLR,Overrun/Underrun flag" "0,1" bitfld.long 0x0 9. "ALCLR,Arbitration lost flag" "0,1" bitfld.long 0x0 8. "BERRCLR,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STOPCLR,Stop detection flag clear" "0,1" bitfld.long 0x0 4. "NACKCLR,Not Acknowledge flag clear" "0,1" newline bitfld.long 0x0 3. "ADDRMCLR,Address Matched flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "PEC,PEC data register" hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking data" line.long 0x4 "RXDATA,Receive data register" hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data" tree.end endif tree.end tree "IWDT (Independent Watchdog Timer)" base ad:0x40003000 wgroup.long 0x0++0x3 line.long 0x0 "KEY,Key register" hexmask.long.word 0x0 0.--15. 1. "KEY,Key value" group.long 0x4++0x7 line.long 0x0 "PSC,Prescaler register" bitfld.long 0x0 0.--2. "PSC,Prescaler divider" "0,1,2,3,4,5,6,7" line.long 0x4 "CNTRLD,Counter reload register" hexmask.long.word 0x4 0.--11. 1. "CNTRLD,Watchdog counter reload" rgroup.long 0xC++0x3 line.long 0x0 "STS,Status register" bitfld.long 0x0 2. "WINUFLG,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "CNTUFLG,Watchdog counter reload value update" "0,1" bitfld.long 0x0 0. "PSCUFLG,Watchdog prescaler value update" "0,1" group.long 0x10++0x3 line.long 0x0 "WIN,Window register" hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value" tree.end tree "NVIC (Nested Vector Interrupt Controller)" base ad:0xE000E100 group.long 0x0++0x3 line.long 0x0 "ISER,Interrupt Set Enable Register" hexmask.long 0x0 0.--31. 1. "SETENA,SETENA" group.long 0x80++0x3 line.long 0x0 "ICER,Interrupt Clear Enable" hexmask.long 0x0 0.--31. 1. "CLRENA,CLRENA" group.long 0x100++0x3 line.long 0x0 "ISPR,Interrupt Set-Pending Register" hexmask.long 0x0 0.--31. 1. "SETPEND,SETPEND" group.long 0x180++0x3 line.long 0x0 "ICPR,Interrupt Clear-Pending" hexmask.long 0x0 0.--31. 1. "CLRPEND,CLRPEND" group.long 0x300++0x1F line.long 0x0 "IPR0,Interrupt Priority Register 0" bitfld.long 0x0 30.--31. "PRI_03,PRI_03" "0,1,2,3" bitfld.long 0x0 22.--23. "PRI_02,PRI_02" "0,1,2,3" bitfld.long 0x0 14.--15. "PRI_01,PRI_01" "0,1,2,3" bitfld.long 0x0 6.--7. "PRI_00,PRI_00" "0,1,2,3" line.long 0x4 "IPR1,Interrupt Priority Register 1" bitfld.long 0x4 30.--31. "PRI_43,PRI_43" "0,1,2,3" bitfld.long 0x4 22.--23. "PRI_42,PRI_42" "0,1,2,3" bitfld.long 0x4 14.--15. "PRI_41,PRI_41" "0,1,2,3" bitfld.long 0x4 6.--7. "PRI_40,PRI_40" "0,1,2,3" line.long 0x8 "IPR2,Interrupt Priority Register 2" bitfld.long 0x8 30.--31. "PRI_83,PRI_83" "0,1,2,3" bitfld.long 0x8 22.--23. "PRI_82,PRI_82" "0,1,2,3" bitfld.long 0x8 14.--15. "PRI_81,PRI_81" "0,1,2,3" bitfld.long 0x8 6.--7. "PRI_80,PRI_80" "0,1,2,3" line.long 0xC "IPR3,Interrupt Priority Register 3" bitfld.long 0xC 30.--31. "PRI_123,PRI_123" "0,1,2,3" bitfld.long 0xC 22.--23. "PRI_122,PRI_122" "0,1,2,3" bitfld.long 0xC 14.--15. "PRI_121,PRI_121" "0,1,2,3" bitfld.long 0xC 6.--7. "PRI_120,PRI_120" "0,1,2,3" line.long 0x10 "IPR4,Interrupt Priority Register 4" bitfld.long 0x10 30.--31. "PRI_163,PRI_163" "0,1,2,3" bitfld.long 0x10 22.--23. "PRI_162,PRI_162" "0,1,2,3" bitfld.long 0x10 14.--15. "PRI_161,PRI_161" "0,1,2,3" bitfld.long 0x10 6.--7. "PRI_160,PRI_160" "0,1,2,3" line.long 0x14 "IPR5,Interrupt Priority Register 5" bitfld.long 0x14 30.--31. "PRI_203,PRI_203" "0,1,2,3" bitfld.long 0x14 22.--23. "PRI_202,PRI_202" "0,1,2,3" bitfld.long 0x14 14.--15. "PRI_201,PRI_201" "0,1,2,3" bitfld.long 0x14 6.--7. "PRI_200,PRI_200" "0,1,2,3" line.long 0x18 "IPR6,Interrupt Priority Register 6" bitfld.long 0x18 30.--31. "PRI_243,PRI_243" "0,1,2,3" bitfld.long 0x18 22.--23. "PRI_242,PRI_242" "0,1,2,3" bitfld.long 0x18 14.--15. "PRI_241,PRI_241" "0,1,2,3" bitfld.long 0x18 6.--7. "PRI_240,PRI_240" "0,1,2,3" line.long 0x1C "IPR7,Interrupt Priority Register 7" bitfld.long 0x1C 30.--31. "PRI_283,PRI_283" "0,1,2,3" bitfld.long 0x1C 22.--23. "PRI_282,PRI_282" "0,1,2,3" bitfld.long 0x1C 14.--15. "PRI_281,PRI_281" "0,1,2,3" bitfld.long 0x1C 6.--7. "PRI_280,PRI_280" "0,1,2,3" tree.end tree "PMU (Power Management Unit)" base ad:0x40007000 group.long 0x0++0x7 line.long 0x0 "CTRL,power control register" bitfld.long 0x0 8. "BPWEN,Disable backup domain write" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 5.--7. "PLSEL,PVD level selection" "0,1,2,3,4,5,6,7" endif sif (cpuis("APM32F071*")) bitfld.long 0x0 5.--7. "PLSEL,PVD level selection" "0,1,2,3,4,5,6,7" endif sif (cpuis("APM32F072*")) bitfld.long 0x0 5.--7. "PLSEL,PVD level selection" "0,1,2,3,4,5,6,7" endif sif (cpuis("APM32F091*")) bitfld.long 0x0 5.--7. "PLSEL,PVD level selection" "0,1,2,3,4,5,6,7" endif sif (cpuis("APM32F070*")) bitfld.long 0x0 4. "PVDEN,Power voltage detector enable" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x0 4. "PVDEN,Power voltage detector enable" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x0 4. "PVDEN,Power voltage detector enable" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x0 4. "PVDEN,Power voltage detector enable" "0,1" endif bitfld.long 0x0 3. "SBFLGCLR,Clear standby flag" "0,1" bitfld.long 0x0 2. "WUFLGCLR,Clear wakeup flag" "0,1" newline bitfld.long 0x0 1. "PDDSCFG,Power down deepsleep" "0,1" bitfld.long 0x0 0. "LPDSCFG,Low-power deep sleep" "0,1" line.long 0x4 "CSTS,power control/status register" sif (cpuis("APM32F070*")) bitfld.long 0x4 15. "WKUPCFG8,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x4 15. "WKUPCFG8,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x4 15. "WKUPCFG8,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x4 15. "WKUPCFG8,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x4 14. "WKUPCFG7,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x4 14. "WKUPCFG7,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x4 14. "WKUPCFG7,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x4 14. "WKUPCFG7,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x4 13. "WKUPCFG6,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x4 13. "WKUPCFG6,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x4 13. "WKUPCFG6,Enable WKUP pin" "0,1" newline endif sif (cpuis("APM32F091*")) bitfld.long 0x4 13. "WKUPCFG6,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x4 12. "WKUPCFG5,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x4 12. "WKUPCFG5,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x4 12. "WKUPCFG5,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x4 12. "WKUPCFG5,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x4 11. "WKUPCFG4,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x4 11. "WKUPCFG4,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x4 11. "WKUPCFG4,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x4 11. "WKUPCFG4,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x4 10. "WKUPCFG3,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x4 10. "WKUPCFG3,Enable WKUP pin" "0,1" newline endif sif (cpuis("APM32F072*")) bitfld.long 0x4 10. "WKUPCFG3,Enable WKUP pin" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x4 10. "WKUPCFG3,Enable WKUP pin" "0,1" endif bitfld.long 0x4 9. "WKUPCFG2,Enable WKUP pin" "0,1" bitfld.long 0x4 8. "WKUPCFG1,Enable WKUP pin" "0,1" sif (cpuis("APM32F070*")) rbitfld.long 0x4 2. "PVDOFLG,PVD output" "0,1" endif sif (cpuis("APM32F071*")) rbitfld.long 0x4 2. "PVDOFLG,PVD output" "0,1" endif sif (cpuis("APM32F072*")) rbitfld.long 0x4 2. "PVDOFLG,PVD output" "0,1" endif sif (cpuis("APM32F091*")) rbitfld.long 0x4 2. "PVDOFLG,PVD output" "0,1" endif rbitfld.long 0x4 1. "SBFLG,Standby flag" "0,1" rbitfld.long 0x4 0. "WUEFLG,Wakeup flag" "0,1" tree.end tree "RCM (Reset and Clock)" base ad:0x40021000 group.long 0x0++0x1F line.long 0x0 "CTRL1,Clock control register 1" rbitfld.long 0x0 25. "PLLRDYFLG,PLL clock ready flag" "0,1" bitfld.long 0x0 24. "PLLEN,PLL enable" "0,1" bitfld.long 0x0 19. "CSSEN,Clock Security System" "0,1" bitfld.long 0x0 18. "HSEBCFG,External High Speed clock" "0,1" rbitfld.long 0x0 17. "HSERDYFLG,External High Speed clock ready" "0,1" bitfld.long 0x0 16. "HSEEN,External High Speed clock" "0,1" hexmask.long.byte 0x0 8.--15. 1. "HSICAL,Internal High Speed clock" hexmask.long.byte 0x0 3.--7. 1. "HSITRM,Internal High Speed clock trimming" newline rbitfld.long 0x0 1. "HSIRDYFLG,Internal High Speed clock ready flag" "0,1" bitfld.long 0x0 0. "HSIEN,Internal High Speed clock enable" "0,1" line.long 0x4 "CFG1,Clock configuration register 1" sif (cpuis("APM32F070*")) bitfld.long 0x4 31. "MCOPLLPSC,PLL clock not divided for COC" "0,1" bitfld.long 0x4 28.--30. "MCOPSC,Microcontroller Clock Output divide" "0,1,2,3,4,5,6,7" endif sif (cpuis("APM32F071*")) bitfld.long 0x4 31. "MCOPLLPSC,PLL clock not divided for COC" "0,1" bitfld.long 0x4 28.--30. "MCOPSC,Microcontroller Clock Output divide" "0,1,2,3,4,5,6,7" endif sif (cpuis("APM32F072*")) bitfld.long 0x4 31. "MCOPLLPSC,PLL clock not divided for COC" "0,1" bitfld.long 0x4 28.--30. "MCOPSC,Microcontroller Clock Output divide" "0,1,2,3,4,5,6,7" endif sif (cpuis("APM32F091*")) bitfld.long 0x4 31. "MCOPLLPSC,PLL clock not divided for COC" "0,1" bitfld.long 0x4 28.--30. "MCOPSC,Microcontroller Clock Output divide" "0,1,2,3,4,5,6,7" newline endif hexmask.long.byte 0x4 24.--27. 1. "MCOSEL,Microcontroller clock output" hexmask.long.byte 0x4 18.--21. 1. "PLLMULCFG,PLL Multiplication Factor" bitfld.long 0x4 17. "PLLHSEPSC,HXT divider for PLL entry" "0,1" sif (cpuis("APM32F030*")||cpuis("APM32F051*")) bitfld.long 0x4 16. "PLLSRCSEL,PLL input clock source" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x4 15.--16. "PLLSRCSEL,PLL input clock source" "0,1,2,3" bitfld.long 0x4 14. "ADCPSC,ADC prescaler" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x4 15.--16. "PLLSRCSEL,PLL input clock source" "0,1,2,3" bitfld.long 0x4 14. "ADCPSC,ADC prescaler" "0,1" newline endif sif (cpuis("APM32F072*")) bitfld.long 0x4 15.--16. "PLLSRCSEL,PLL input clock source" "0,1,2,3" bitfld.long 0x4 14. "ADCPSC,ADC prescaler" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x4 15.--16. "PLLSRCSEL,PLL input clock source" "0,1,2,3" bitfld.long 0x4 14. "ADCPSC,ADC prescaler" "0,1" endif bitfld.long 0x4 8.--10. "APB1PSC,APB Low speed prescaler" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 4.--7. 1. "AHBPSC,AHB prescaler" newline rbitfld.long 0x4 2.--3. "SCLKSWSTS,System Clock Switch Status" "0,1,2,3" bitfld.long 0x4 0.--1. "SCLKSEL,System clock Switch" "0,1,2,3" line.long 0x8 "INT,Clock interrupt register" bitfld.long 0x8 23. "CSSCLR,Clock security system interrupt clear" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x8 22. "HSI48RDYCLR,HIRC48 Ready Interrupt Clear" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x8 22. "HSI48RDYCLR,HIRC48 Ready Interrupt Clear" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x8 22. "HSI48RDYCLR,HIRC48 Ready Interrupt Clear" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x8 22. "HSI48RDYCLR,HIRC48 Ready Interrupt Clear" "0,1" endif bitfld.long 0x8 21. "HSI14RDYCLR,HIRC 14 MHz Ready Interrupt Clear" "0,1" bitfld.long 0x8 20. "PLLRDYCLR,PLL Ready Interrupt Clear" "0,1" bitfld.long 0x8 19. "HSERDYCLR,HXT Ready Interrupt Clear" "0,1" newline bitfld.long 0x8 18. "HSIRDYCLR,HIRC Ready Interrupt Clear" "0,1" bitfld.long 0x8 17. "LSERDYCLR,LXT Ready Interrupt Clear" "0,1" bitfld.long 0x8 16. "LSIRDYCLR,LIRC Ready Interrupt Clear" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x8 14. "HSI48RDYEN,HIRC48 ready interrupt enable" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x8 14. "HSI48RDYEN,HIRC48 ready interrupt enable" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x8 14. "HSI48RDYEN,HIRC48 ready interrupt enable" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x8 14. "HSI48RDYEN,HIRC48 ready interrupt enable" "0,1" endif bitfld.long 0x8 13. "HSI14RDYEN,HIRC14 ready interrupt enable" "0,1" newline bitfld.long 0x8 12. "PLLRDYEN,PLL Ready Interrupt Enable" "0,1" bitfld.long 0x8 11. "HSERDYEN,HXT Ready Interrupt Enable" "0,1" bitfld.long 0x8 10. "HSIRDYEN,HIRC Ready Interrupt Enable" "0,1" bitfld.long 0x8 9. "LSERDYEN,LXT Ready Interrupt Enable" "0,1" bitfld.long 0x8 8. "LSIRDYEN,LIRC Ready Interrupt Enable" "0,1" rbitfld.long 0x8 7. "CSSFLG,Clock Security System Interrupt flag" "0,1" sif (cpuis("APM32F070*")) rbitfld.long 0x8 6. "HSI48RDYFLG,HIRC48 ready interrupt flag" "0,1" endif sif (cpuis("APM32F071*")) rbitfld.long 0x8 6. "HSI48RDYFLG,HIRC48 ready interrupt flag" "0,1" newline endif sif (cpuis("APM32F072*")) rbitfld.long 0x8 6. "HSI48RDYFLG,HIRC48 ready interrupt flag" "0,1" endif sif (cpuis("APM32F091*")) rbitfld.long 0x8 6. "HSI48RDYFLG,HIRC48 ready interrupt flag" "0,1" endif rbitfld.long 0x8 5. "HSI14RDYFLG,HIRC14 ready interrupt flag" "0,1" rbitfld.long 0x8 4. "PLLRDYFLG,PLL Ready Interrupt flag" "0,1" newline rbitfld.long 0x8 3. "HSERDYFLG,HXT Ready Interrupt flag" "0,1" rbitfld.long 0x8 2. "HSIRDYFLG,HIRC Ready Interrupt flag" "0,1" rbitfld.long 0x8 1. "LSERDYFLG,LXT Ready Interrupt flag" "0,1" rbitfld.long 0x8 0. "LSIRDYFLG,LIRC Ready Interrupt flag" "0,1" line.long 0xC "APBRST2,APB2 peripheral reset register" bitfld.long 0xC 22. "DBGRST,Debug MCU reset" "0,1" bitfld.long 0xC 18. "TMR17RST,TMR17 timer reset" "0,1" bitfld.long 0xC 17. "TMR16RST,TMR16 timer reset" "0,1" bitfld.long 0xC 16. "TMR15RST,TMR15 timer reset" "0,1" bitfld.long 0xC 14. "USART1RST,USART1 reset" "0,1" bitfld.long 0xC 12. "SPI1RST,SPI 1 reset" "0,1" bitfld.long 0xC 11. "TMR1RST,TMR1 timer reset" "0,1" bitfld.long 0xC 9. "ADCRST,ADC interface reset" "0,1" newline sif (cpuis("APM32F091*")) bitfld.long 0xC 7. "USART8RST,USART8 reset" "0,1" bitfld.long 0xC 6. "USART7RST,USART7 reset" "0,1" bitfld.long 0xC 5. "USART6RST,USART6 reset" "0,1" endif sif (cpuis("APM32F030*")) bitfld.long 0xC 5. "USART6RST,USART6 reset" "0,1" endif bitfld.long 0xC 0. "SYSCFGRST,SYSCFG and COMP reset" "0,1" line.long 0x10 "APBRST1,APB1 peripheral reset register" sif (cpuis("APM32F051*")) bitfld.long 0x10 30. "CECRST,CEC reset" "0,1" bitfld.long 0x10 29. "DACRST,DAC reset" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x10 30. "CECRST,CEC reset" "0,1" bitfld.long 0x10 29. "DACRST,DAC reset" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x10 30. "CECRST,CEC reset" "0,1" bitfld.long 0x10 29. "DACRST,DAC reset" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x10 30. "CECRST,CEC reset" "0,1" bitfld.long 0x10 29. "DACRST,DAC reset" "0,1" newline endif bitfld.long 0x10 28. "PMURST,PMU reset" "0,1" sif (cpuis("APM32F071*")) bitfld.long 0x10 27. "CRSRST,CRS reset" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x10 27. "CRSRST,CRS reset" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x10 27. "CRSRST,CRS reset" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x10 25. "CANRST,CAN reset" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x10 25. "CANRST,CAN reset" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x10 23. "USBDRST,USB reset" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x10 23. "USBDRST,USB reset" "0,1" newline endif bitfld.long 0x10 22. "I2C2RST,I2C2 reset" "0,1" bitfld.long 0x10 21. "I2C1RST,I2C1 reset" "0,1" sif (cpuis("APM32F030*")) bitfld.long 0x10 20. "USART5RST,USART 5 reset" "0,1" bitfld.long 0x10 19. "USART4RST,USART 4 reset" "0,1" bitfld.long 0x10 18. "USART3RST,USART 3 reset" "0,1" bitfld.long 0x10 5. "TMR7RST,Timer 7 reset" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x10 20. "USART5RST,USART 5 reset" "0,1" bitfld.long 0x10 19. "USART4RST,USART 4 reset" "0,1" newline bitfld.long 0x10 18. "USART3RST,USART 3 reset" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x10 19. "USART4RST,USART 4 reset" "0,1" bitfld.long 0x10 18. "USART3RST,USART 3 reset" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x10 19. "USART4RST,USART 4 reset" "0,1" bitfld.long 0x10 18. "USART3RST,USART 3 reset" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x10 19. "USART4RST,USART 4 reset" "0,1" bitfld.long 0x10 18. "USART3RST,USART 3 reset" "0,1" endif bitfld.long 0x10 17. "USART2RST,USART 2 reset" "0,1" newline bitfld.long 0x10 14. "SPI2RST,SPI2 reset" "0,1" bitfld.long 0x10 11. "WWDTRST,Window watchdog reset" "0,1" bitfld.long 0x10 8. "TMR14RST,Timer 14 reset" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x10 5. "TMR7RST,Timer 7 reset" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x10 5. "TMR7RST,Timer 7 reset" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x10 5. "TMR7RST,Timer 7 reset" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x10 5. "TMR7RST,Timer 7 reset" "0,1" endif bitfld.long 0x10 4. "TMR6RST,Timer 6 reset" "0,1" newline bitfld.long 0x10 1. "TMR3RST,Timer 3 reset" "0,1" sif (cpuis("APM32F051*")) bitfld.long 0x10 0. "TMR2RST,Timer 2 reset" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x10 0. "TMR2RST,Timer 2 reset" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x10 0. "TMR2RST,Timer 2 reset" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x10 0. "TMR2RST,Timer 2 reset" "0,1" endif line.long 0x14 "AHBCLKEN,AHB Peripheral Clock enable register" sif (cpuis("APM32F051*")) bitfld.long 0x14 24. "TSCEN,Touch sensing controller clock enable" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x14 24. "TSCEN,Touch sensing controller clock enable" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x14 24. "TSCEN,Touch sensing controller clock enable" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x14 24. "TSCEN,Touch sensing controller clock enable" "0,1" endif bitfld.long 0x14 22. "PFEN,I/O port F clock enable" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x14 21. "PEEN,I/O port E clock enable" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x14 21. "PEEN,I/O port E clock enable" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x14 21. "PEEN,I/O port E clock enable" "0,1" newline endif sif (cpuis("APM32F091*")) bitfld.long 0x14 21. "PEEN,I/O port E clock enable" "0,1" endif bitfld.long 0x14 20. "PDEN,I/O port D clock enable" "0,1" bitfld.long 0x14 19. "PCEN,I/O port C clock enable" "0,1" bitfld.long 0x14 18. "PBEN,I/O port B clock enable" "0,1" bitfld.long 0x14 17. "PAEN,I/O port A clock enable" "0,1" bitfld.long 0x14 6. "CRCEN,CRC clock enable" "0,1" bitfld.long 0x14 4. "FMCEN,FLITF clock enable" "0,1" bitfld.long 0x14 2. "SRAMEN,SRAM interface clock enable" "0,1" newline sif (cpuis("APM32F070*")) bitfld.long 0x14 1. "DMA2EN,DMA1 clock enable" "0,1" bitfld.long 0x14 0. "DMA1EN,DMA1 clock enable" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x14 1. "DMA2EN,DMA1 clock enable" "0,1" bitfld.long 0x14 0. "DMA1EN,DMA1 clock enable" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x14 1. "DMA2EN,DMA1 clock enable" "0,1" bitfld.long 0x14 0. "DMA1EN,DMA1 clock enable" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x14 1. "DMA2EN,DMA1 clock enable" "0,1" bitfld.long 0x14 0. "DMA1EN,DMA1 clock enable" "0,1" newline endif sif (cpuis("APM32F030*")||cpuis("APM32F051*")) bitfld.long 0x14 0. "DMAEN,DMA clock enable" "0,1" endif line.long 0x18 "APBCLKEN2,APB2 peripheral clock enable register" bitfld.long 0x18 22. "DBGEN,MCU debug module clock enable" "0,1" bitfld.long 0x18 18. "TMR17EN,TMR17 timer clock enable" "0,1" bitfld.long 0x18 17. "TMR16EN,TMR16 timer clock enable" "0,1" bitfld.long 0x18 16. "TMR15EN,TMR15 timer clock enable" "0,1" bitfld.long 0x18 14. "USART1EN,USART1 clock enable" "0,1" bitfld.long 0x18 12. "SPI1EN,SPI 1 clock enable" "0,1" bitfld.long 0x18 11. "TMR1EN,TMR1 Timer clock enable" "0,1" bitfld.long 0x18 9. "ADCEN,ADC 1 interface clock enable" "0,1" newline sif (cpuis("APM32F091*")) bitfld.long 0x18 7. "USART8EN,USART8 enable" "0,1" bitfld.long 0x18 6. "USART7EN,USART7 enable" "0,1" bitfld.long 0x18 5. "USART6EN,USART6 enable" "0,1" endif sif (cpuis("APM32F030*")) bitfld.long 0x18 5. "USART6EN,USART6 clock enable" "0,1" endif sif (cpuis("APM32F030*")||cpuis("APM32F051*")) bitfld.long 0x18 0. "SCFGCOMPEN,SYSCFG clock enable" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x18 0. "SCFGEN,SYSCFG clock enable" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x18 0. "SCFGCOMPEN,SYSCFG and COMP clock enable" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x18 0. "SCFGCOMPEN,SYSCFG and COMP clock enable" "0,1" newline endif sif (cpuis("APM32F091*")) bitfld.long 0x18 0. "SCFGCOMPEN,SYSCFG and COMP clock enable" "0,1" endif line.long 0x1C "APBCLKEN1,APB1 peripheral clock enable register" sif (cpuis("APM32F051*")) bitfld.long 0x1C 30. "CECEN,CEC clock enable" "0,1" bitfld.long 0x1C 29. "DACEN,DAC clock enable" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x1C 30. "CECEN,CEC clock enable" "0,1" bitfld.long 0x1C 29. "DACEN,DAC clock enable" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x1C 30. "CECEN,CEC clock enable" "0,1" bitfld.long 0x1C 29. "DACEN,DAC clock enable" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x1C 30. "CECEN,CEC clock enable" "0,1" bitfld.long 0x1C 29. "DACEN,DAC clock enable" "0,1" newline endif bitfld.long 0x1C 28. "PMUEN,PMU clock enable" "0,1" sif (cpuis("APM32F071*")) bitfld.long 0x1C 27. "CRSEN,CRS clock enable" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x1C 27. "CRSEN,CRS clock enable" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x1C 27. "CRSEN,CRS clock enable" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x1C 25. "CANEN,CAN clock enable" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x1C 25. "CANEN,CAN clock enable" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x1C 23. "USBDEN,USB clock enable" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x1C 23. "USBDEN,USB clock enable" "0,1" newline endif bitfld.long 0x1C 22. "I2C2EN,I2C 2 clock enable" "0,1" bitfld.long 0x1C 21. "I2C1EN,I2C 1 clock enable" "0,1" sif (cpuis("APM32F030*")) bitfld.long 0x1C 20. "USART5EN,USART 5 clock enable" "0,1" bitfld.long 0x1C 19. "USART4EN,USART 4 clock enable" "0,1" bitfld.long 0x1C 18. "USART3EN,USART 3 clock enable" "0,1" bitfld.long 0x1C 5. "TMR7EN,Timer 7 clock enable" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x1C 20. "USART5EN,USART 5 clock enable" "0,1" bitfld.long 0x1C 19. "USART4EN,USART 4 clock enable" "0,1" newline bitfld.long 0x1C 18. "USART3EN,USART 3 clock enable" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x1C 19. "USART4EN,USART 4 clock enable" "0,1" bitfld.long 0x1C 18. "USART3EN,USART 3 clock enable" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x1C 19. "USART4EN,USART 4 clock enable" "0,1" bitfld.long 0x1C 18. "USART3EN,USART 3 clock enable" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x1C 19. "USART4EN,USART 4 clock enable" "0,1" bitfld.long 0x1C 18. "USART3EN,USART 3 clock enable" "0,1" endif bitfld.long 0x1C 17. "USART2EN,USART 2 clock enable" "0,1" newline bitfld.long 0x1C 14. "SPI2EN,SPI 2 clock enable" "0,1" bitfld.long 0x1C 11. "WWDTEN,Window watchdog clock enable" "0,1" bitfld.long 0x1C 8. "TMR14EN,Timer 14 clock enable" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x1C 5. "TMR7EN,Timer 7 clock enable" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x1C 5. "TMR7EN,Timer 7 clock enable" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x1C 5. "TMR7EN,Timer 7 clock enable" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x1C 5. "TMR7EN,Timer 7 clock enable" "0,1" endif bitfld.long 0x1C 4. "TMR6EN,Timer 6 clock enable" "0,1" newline bitfld.long 0x1C 1. "TMR3EN,Timer 3 clock enable" "0,1" sif (cpuis("APM32F051*")) bitfld.long 0x1C 0. "TMR2EN,Timer 2 clock enable" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x1C 0. "TMR2EN,Timer 2 clock enable" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x1C 0. "TMR2EN,Timer 2 clock enable" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x1C 0. "TMR2EN,Timer 2 clock enable" "0,1" endif sif (cpuis("APM32F030*")||cpuis("APM32F051*")) group.long 0x20++0x3 line.long 0x0 "RTCCTRL,Backup domain control register" bitfld.long 0x0 16. "RTCRST,Backup domain software reset" "0,1" bitfld.long 0x0 15. "RTCCLKEN,RTC clock enable" "0,1" newline bitfld.long 0x0 8.--9. "RTCSRCSEL,RTC clock source selection" "0,1,2,3" bitfld.long 0x0 3.--4. "LSEDRVCFG,LXT oscillator drive capability" "0,1,2,3" newline bitfld.long 0x0 2. "LSEBCFG,External Low Speed oscillator bypass" "0,1" rbitfld.long 0x0 1. "LSERDYFLG,External Low Speed oscillator ready" "0,1" newline bitfld.long 0x0 0. "LSEEN,External Low Speed oscillator enable" "0,1" endif sif (cpuis("APM32F070*")) group.long 0x20++0x3 line.long 0x0 "BDCTRL,Backup domain control register" bitfld.long 0x0 16. "BDRST,Backup domain software reset" "0,1" bitfld.long 0x0 15. "RTCCLKEN,RTC clock enable" "0,1" newline bitfld.long 0x0 8.--9. "RTCSRCSEL,RTC clock source selection" "0,1,2,3" bitfld.long 0x0 3.--4. "LSEDRVCFG,LXT oscillator drive capability" "0,1,2,3" newline bitfld.long 0x0 2. "LSEBCFG,External Low Speed oscillator bypass" "0,1" rbitfld.long 0x0 1. "LSERDYFLG,External Low Speed oscillator ready" "0,1" newline bitfld.long 0x0 0. "LSEEN,External Low Speed oscillator enable" "0,1" group.long 0x28++0x3 line.long 0x0 "AHBRST,AHB peripheral reset register" bitfld.long 0x0 22. "PFRST,I/O port F reset" "0,1" bitfld.long 0x0 21. "PERST,I/O port E reset" "0,1" newline bitfld.long 0x0 20. "PDRST,I/O port D reset" "0,1" bitfld.long 0x0 19. "PCRST,I/O port C reset" "0,1" newline bitfld.long 0x0 18. "PBRST,I/O port B reset" "0,1" bitfld.long 0x0 17. "PARST,I/O port A reset" "0,1" endif sif (cpuis("APM32F071*")) group.long 0x20++0x3 line.long 0x0 "BDCTRL,Backup domain control register" bitfld.long 0x0 16. "BDRST,Backup domain software reset" "0,1" bitfld.long 0x0 15. "RTCCLKEN,RTC clock enable" "0,1" newline bitfld.long 0x0 8.--9. "RTCSRCSEL,RTC clock source selection" "0,1,2,3" bitfld.long 0x0 3.--4. "LSEDRVCFG,LXT oscillator drive capability" "0,1,2,3" newline bitfld.long 0x0 2. "LSEBCFG,External Low Speed oscillator bypass" "0,1" rbitfld.long 0x0 1. "LSERDYFLG,External Low Speed oscillator ready" "0,1" newline bitfld.long 0x0 0. "LSEEN,External Low Speed oscillator enable" "0,1" group.long 0x28++0x3 line.long 0x0 "AHBRST,AHB peripheral reset register" bitfld.long 0x0 24. "TSCRST,Touch sensing controller reset" "0,1" bitfld.long 0x0 22. "PFRST,I/O port F reset" "0,1" newline bitfld.long 0x0 21. "PERST,I/O port E reset" "0,1" bitfld.long 0x0 20. "PDRST,I/O port D reset" "0,1" newline bitfld.long 0x0 19. "PCRST,I/O port C reset" "0,1" bitfld.long 0x0 18. "PBRST,I/O port B reset" "0,1" newline bitfld.long 0x0 17. "PARST,I/O port A reset" "0,1" endif sif (cpuis("APM32F072*")) group.long 0x20++0x3 line.long 0x0 "BDCTRL,Backup domain control register" bitfld.long 0x0 16. "BDRST,Backup domain software reset" "0,1" bitfld.long 0x0 15. "RTCCLKEN,RTC clock enable" "0,1" newline bitfld.long 0x0 8.--9. "RTCSRCSEL,RTC clock source selection" "0,1,2,3" bitfld.long 0x0 3.--4. "LSEDRVCFG,LXT oscillator drive capability" "0,1,2,3" newline bitfld.long 0x0 2. "LSEBCFG,External Low Speed oscillator bypass" "0,1" rbitfld.long 0x0 1. "LSERDYFLG,External Low Speed oscillator ready" "0,1" newline bitfld.long 0x0 0. "LSEEN,External Low Speed oscillator enable" "0,1" group.long 0x28++0x3 line.long 0x0 "AHBRST,AHB peripheral reset register" bitfld.long 0x0 24. "TSCRST,Touch sensing controller reset" "0,1" bitfld.long 0x0 22. "PFRST,I/O port F reset" "0,1" newline bitfld.long 0x0 21. "PERST,I/O port E reset" "0,1" bitfld.long 0x0 20. "PDRST,I/O port D reset" "0,1" newline bitfld.long 0x0 19. "PCRST,I/O port C reset" "0,1" bitfld.long 0x0 18. "PBRST,I/O port B reset" "0,1" newline bitfld.long 0x0 17. "PARST,I/O port A reset" "0,1" endif sif (cpuis("APM32F091*")) group.long 0x20++0x3 line.long 0x0 "BDCTRL,Backup domain control register" bitfld.long 0x0 16. "BDRST,Backup domain software reset" "0,1" bitfld.long 0x0 15. "RTCCLKEN,RTC clock enable" "0,1" newline bitfld.long 0x0 8.--9. "RTCSRCSEL,RTC clock source selection" "0,1,2,3" bitfld.long 0x0 3.--4. "LSEDRVCFG,LXT oscillator drive capability" "0,1,2,3" newline bitfld.long 0x0 2. "LSEBCFG,External Low Speed oscillator bypass" "0,1" rbitfld.long 0x0 1. "LSERDYFLG,External Low Speed oscillator ready" "0,1" newline bitfld.long 0x0 0. "LSEEN,External Low Speed oscillator enable" "0,1" group.long 0x28++0x3 line.long 0x0 "AHBRST,AHB peripheral reset register" bitfld.long 0x0 24. "TSCRST,Touch sensing controller reset" "0,1" bitfld.long 0x0 22. "PFRST,I/O port F reset" "0,1" newline bitfld.long 0x0 21. "PERST,I/O port E reset" "0,1" bitfld.long 0x0 20. "PDRST,I/O port D reset" "0,1" newline bitfld.long 0x0 19. "PCRST,I/O port C reset" "0,1" bitfld.long 0x0 18. "PBRST,I/O port B reset" "0,1" newline bitfld.long 0x0 17. "PARST,I/O port A reset" "0,1" endif group.long 0x24++0x3 line.long 0x0 "CSTS,Control/status register" rbitfld.long 0x0 31. "LPWRRSTFLG,Low-power reset flag" "0,1" rbitfld.long 0x0 30. "WWDTRSTFLG,Window watchdog reset flag" "0,1" rbitfld.long 0x0 29. "IWDTRSTFLG,Independent watchdog reset flag" "0,1" rbitfld.long 0x0 28. "SWRSTFLG,Software reset flag" "0,1" rbitfld.long 0x0 27. "PODRSTFLG,POR/PDR reset flag" "0,1" rbitfld.long 0x0 26. "PINRSTFLG,PIN reset flag" "0,1" rbitfld.long 0x0 25. "OBRSTFLG,Option byte loader reset flag" "0,1" bitfld.long 0x0 24. "RSTFLGCLR,Remove reset flag" "0,1" newline rbitfld.long 0x0 23. "PWRRSTFLG,Reset Flag of The 1.5V Domain" "0,1" rbitfld.long 0x0 1. "LSIRDYFLG,Internal low speed oscillator ready" "0,1" bitfld.long 0x0 0. "LSIEN,Internal low speed oscillator enable" "0,1" sif (cpuis("APM32F030*")) group.long 0x28++0x3 line.long 0x0 "IORST,I/O Port x Reset" bitfld.long 0x0 22. "PFRST,I/O port F reset" "0,1" bitfld.long 0x0 20. "PDRST,I/O port D reset" "0,1" newline bitfld.long 0x0 19. "PCRST,I/O port C reset" "0,1" bitfld.long 0x0 18. "PBRST,I/O port B reset" "0,1" newline bitfld.long 0x0 17. "PARST,I/O port A reset" "0,1" endif sif (cpuis("APM32F051*")) group.long 0x28++0x3 line.long 0x0 "AHBRST,AHB peripheral reset register" bitfld.long 0x0 24. "TSCRST,Touch sensing controller reset" "0,1" bitfld.long 0x0 22. "PFRST,I/O port F reset" "0,1" newline bitfld.long 0x0 20. "PDRST,I/O port D reset" "0,1" bitfld.long 0x0 19. "PCRST,I/O port C reset" "0,1" newline bitfld.long 0x0 18. "PBRST,I/O port B reset" "0,1" bitfld.long 0x0 17. "PARST,I/O port A reset" "0,1" endif group.long 0x2C++0xB line.long 0x0 "CFG2,Clock configuration register 2" hexmask.long.byte 0x0 0.--3. 1. "PLLDIVCFG,CLKDIV division factor" line.long 0x4 "CFG3,Clock configuration register 3" sif (cpuis("APM32F091*")) bitfld.long 0x4 18.--19. "USART3SEL,USART3 clock source selection" "0,1,2,3" bitfld.long 0x4 16.--17. "USART2SEL,USART2 clock source selection" "0,1,2,3" endif sif (cpuis("APM32F070*")) bitfld.long 0x4 16.--17. "USART2SEL,USART2 clock source selection" "0,1,2,3" endif sif (cpuis("APM32F071*")) bitfld.long 0x4 16.--17. "USART2SEL,USART2 clock source selection" "0,1,2,3" endif sif (cpuis("APM32F072*")) bitfld.long 0x4 16.--17. "USART2SEL,USART2 clock source selection" "0,1,2,3" endif bitfld.long 0x4 8. "ADCSEL,ADC clock source selection" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x4 7. "USBDSEL,USB clock source selection" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x4 7. "USBDSEL,USB clock source selection" "0,1" newline bitfld.long 0x4 6. "CECSEL,CEC clock source selection" "0,1" endif sif (cpuis("APM32F051*")) bitfld.long 0x4 6. "CECSEL,CEC clock source selection" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x4 6. "CECSEL,CEC clock source selection" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x4 6. "CECSEL,CEC clock source selection" "0,1" endif bitfld.long 0x4 4. "I2C1SEL,I2C1 clock source selection" "0,1" bitfld.long 0x4 0.--1. "USART1SEL,USART1 clock source selection" "0,1,2,3" line.long 0x8 "CTRL2,Clock control register 2" sif (cpuis("APM32F070*")) hexmask.long.byte 0x8 24.--31. 1. "HSI48CAL,HIRC48 factory clock calibration" endif sif (cpuis("APM32F071*")) hexmask.long.byte 0x8 24.--31. 1. "HSI48CAL,HIRC48 factory clock calibration" endif sif (cpuis("APM32F072*")) hexmask.long.byte 0x8 24.--31. 1. "HSI48CAL,HIRC48 factory clock calibration" endif sif (cpuis("APM32F091*")) hexmask.long.byte 0x8 24.--31. 1. "HSI48CAL,HIRC48 factory clock calibration" endif sif (cpuis("APM32F070*")) rbitfld.long 0x8 17. "HSI48RDFLG,HIRC48 clock ready flag" "0,1" bitfld.long 0x8 16. "HSI48EN,HIRC48 clock enable" "0,1" endif sif (cpuis("APM32F071*")) rbitfld.long 0x8 17. "HSI48RDFLG,HIRC48 clock ready flag" "0,1" bitfld.long 0x8 16. "HSI48EN,HIRC48 clock enable" "0,1" newline endif sif (cpuis("APM32F072*")) rbitfld.long 0x8 17. "HSI48RDFLG,HIRC48 clock ready flag" "0,1" bitfld.long 0x8 16. "HSI48EN,HIRC48 clock enable" "0,1" endif sif (cpuis("APM32F091*")) rbitfld.long 0x8 17. "HSI48RDFLG,HIRC48 clock ready flag" "0,1" bitfld.long 0x8 16. "HSI48EN,HIRC48 clock enable" "0,1" endif hexmask.long.byte 0x8 8.--15. 1. "HSI14CAL,HIRC14 clock calibration" hexmask.long.byte 0x8 3.--7. 1. "HSI14TRM,HIRC14 clock trimming" bitfld.long 0x8 2. "HSI14TO,HIRC14 clock request from ADC disable" "0,1" rbitfld.long 0x8 1. "HSI14RDFLG,HIRC14 clock ready flag" "0,1" newline bitfld.long 0x8 0. "HSI14EN,HIRC14 clock enable" "0,1" tree.end tree "RTC (Real-Time Clock)" base ad:0x40002800 group.long 0x0++0x17 line.long 0x0 "TIME,time register" bitfld.long 0x0 22. "TIMEFCFG,AM/PM notation" "0,1" bitfld.long 0x0 20.--21. "HRT,Hour tens in BCD format" "0,1,2,3" hexmask.long.byte 0x0 16.--19. 1. "HRU,Hour units in BCD format" bitfld.long 0x0 12.--14. "MINT,Minute tens in BCD format" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--11. 1. "MINU,Minute units in BCD format" bitfld.long 0x0 4.--6. "SECT,Second tens in BCD format" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--3. 1. "SECU,Second units in BCD format" line.long 0x4 "DATE,date register" hexmask.long.byte 0x4 20.--23. 1. "YRT,Year tens in BCD format" hexmask.long.byte 0x4 16.--19. 1. "YRU,Year units in BCD format" bitfld.long 0x4 13.--15. "WEEKSEL,Week day units" "0,1,2,3,4,5,6,7" bitfld.long 0x4 12. "MONT,Month tens in BCD format" "0,1" hexmask.long.byte 0x4 8.--11. 1. "MONU,Month units in BCD format" bitfld.long 0x4 4.--5. "DAYT,Date tens in BCD format" "0,1,2,3" hexmask.long.byte 0x4 0.--3. 1. "DAYU,Date units in BCD format" line.long 0x8 "CTRL,control register" bitfld.long 0x8 23. "CALOEN,Calibration output enable" "0,1" bitfld.long 0x8 21.--22. "OUTSEL,Output selection" "0,1,2,3" bitfld.long 0x8 20. "POLCFG,Output polarity" "0,1" bitfld.long 0x8 19. "CALOSEL,Calibration output selection" "0,1" bitfld.long 0x8 18. "BAKP,Backup" "0,1" bitfld.long 0x8 17. "WTCCFG,Lessen 1 hour (winter time change)" "0,1" bitfld.long 0x8 16. "STCCFG,Add 1 hour (summer time change)" "0,1" bitfld.long 0x8 15. "TSIEN,Time-stamp interrupt enable" "0,1" bitfld.long 0x8 14. "WUTIEN,Wakeup timer interrupt enable" "0,1" newline bitfld.long 0x8 12. "ALRIEN,Alarm A interrupt enable" "0,1" bitfld.long 0x8 11. "TSEN,timestamp enable" "0,1" bitfld.long 0x8 10. "WUTEN,Wakeup timer enable" "0,1" bitfld.long 0x8 8. "ALREN,Alarm A enable" "0,1" bitfld.long 0x8 6. "TIMEFCFG,Hour format" "0,1" bitfld.long 0x8 5. "RCMCFG,Bypass the shadow registers" "0,1" bitfld.long 0x8 4. "RCLKDEN,RTC_REFIN reference clock detection enable (50 or 60 Hz)" "0,1" bitfld.long 0x8 3. "TSETECFG,Time-stamp event active edge" "0,1" bitfld.long 0x8 0.--2. "WUCLKSEL,Wakeup clock selection" "0,1,2,3,4,5,6,7" line.long 0xC "STS,initialization and status register" rbitfld.long 0xC 16. "RCALPFLG,Recalibration pending Flag" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0xC 15. "TP3FLG,RTC_TAMP3 detection flag" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0xC 15. "TP3FLG,RTC_TAMP3 detection flag" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0xC 15. "TP3FLG,RTC_TAMP3 detection flag" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0xC 15. "TP3FLG,RTC_TAMP3 detection flag" "0,1" endif bitfld.long 0xC 14. "TP2FLG,RTC_TAMP2 detection flag" "0,1" bitfld.long 0xC 13. "TP1FLG,RTC_TAMP1 detection flag" "0,1" bitfld.long 0xC 12. "TSOVRFLG,Time-stamp overflow flag" "0,1" bitfld.long 0xC 11. "TSFLG,Time-stamp flag" "0,1" newline bitfld.long 0xC 10. "WUTFLG,Wakeup timer flag" "0,1" bitfld.long 0xC 8. "ALRAFLG,Alarm A flag" "0,1" bitfld.long 0xC 7. "INITEN,Initialization mode" "0,1" rbitfld.long 0xC 6. "RINITFLG,Initialization flag" "0,1" bitfld.long 0xC 5. "RSFLG,Registers synchronization" "0,1" rbitfld.long 0xC 4. "INITSFLG,Initialization status flag" "0,1" rbitfld.long 0xC 3. "SOPFLG,Shift operation pending" "0,1" rbitfld.long 0xC 2. "WUTWFLG,Wakeup timer write flag" "0,1" rbitfld.long 0xC 0. "ALRWFLG,Alarm A write flag" "0,1" line.long 0x10 "PSC,prescaler register" hexmask.long.byte 0x10 16.--22. 1. "APSC,Asynchronous prescaler" hexmask.long.word 0x10 0.--14. 1. "SPSC,Synchronous prescaler" line.long 0x14 "AUTORLD,write protection register" hexmask.long.word 0x14 0.--14. 1. "WUAUTORE,Wakeup auto-reload value bits" group.long 0x1C++0x3 line.long 0x0 "ALRMA,alarm A register" bitfld.long 0x0 31. "DATEMEN,Alarm A date mask" "0,1" bitfld.long 0x0 30. "WEEKSEL,Week day selection" "0,1" bitfld.long 0x0 28.--29. "DAYT,Date tens in BCD format." "0,1,2,3" hexmask.long.byte 0x0 24.--27. 1. "DAYU,Date units or day in BCD" bitfld.long 0x0 23. "HRMEN,Alarm A hours mask" "0,1" bitfld.long 0x0 22. "TIMEFCFG,AM/PM notation" "0,1" bitfld.long 0x0 20.--21. "HRT,Hour tens in BCD format." "0,1,2,3" hexmask.long.byte 0x0 16.--19. 1. "HRU,Hour units in BCD format." bitfld.long 0x0 15. "MINMEN,Alarm A minutes mask" "0,1" newline bitfld.long 0x0 12.--14. "MINT,Minute tens in BCD format." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--11. 1. "MINU,Minute units in BCD" bitfld.long 0x0 7. "SECMEN,Alarm A seconds mask" "0,1" bitfld.long 0x0 4.--6. "SECT,Second tens in BCD format." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--3. 1. "SECU,Second units in BCD" wgroup.long 0x24++0x3 line.long 0x0 "WRPROT,write protection register" hexmask.long.byte 0x0 0.--7. 1. "KEY,Write protection key" rgroup.long 0x28++0x3 line.long 0x0 "SUBSEC,sub second register" hexmask.long.word 0x0 0.--15. 1. "SUBSEC,Sub second value" wgroup.long 0x2C++0x3 line.long 0x0 "SHIFT,shift control register" bitfld.long 0x0 31. "ADD1SECEN,Reserved" "0,1" hexmask.long.word 0x0 0.--14. 1. "SFSEC,Subtract a fraction of a" rgroup.long 0x30++0xB line.long 0x0 "TSTIME,timestamp time register" bitfld.long 0x0 22. "TIMEFCFG,AM/PM notation" "0,1" bitfld.long 0x0 20.--21. "HRT,Hour tens in BCD format." "0,1,2,3" hexmask.long.byte 0x0 16.--19. 1. "HRU,Hour units in BCD format." bitfld.long 0x0 12.--14. "MINT,Minute tens in BCD format." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--11. 1. "MINU,Minute units in BCD" bitfld.long 0x0 4.--6. "SECT,Second tens in BCD format." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--3. 1. "SECU,Second units in BCD" line.long 0x4 "TSDATE,timestamp date register" bitfld.long 0x4 13.--15. "WEEKSEL,Week day units" "0,1,2,3,4,5,6,7" bitfld.long 0x4 12. "MONT,Month tens in BCD format" "0,1" hexmask.long.byte 0x4 8.--11. 1. "MONU,Month units in BCD format" bitfld.long 0x4 4.--5. "DAYT,Date tens in BCD format" "0,1,2,3" hexmask.long.byte 0x4 0.--3. 1. "DAYU,Date units in BCD format" line.long 0x8 "TSSUBSEC,time-stamp sub second register" hexmask.long.word 0x8 0.--15. 1. "SUBSEC,Sub second value" group.long 0x3C++0xB line.long 0x0 "CAL,calibration register" bitfld.long 0x0 15. "ICALFEN,Use an 8-second calibration cycle" "0,1" bitfld.long 0x0 14. "CAL8CFG,Use a 16-second calibration cycle" "0,1" bitfld.long 0x0 13. "CAL16CFG,Reserved" "0,1" hexmask.long.word 0x0 0.--8. 1. "RECALF,Calibration minus" line.long 0x4 "TACFG,tamper and alternate function configuration register" bitfld.long 0x4 23. "PC15EN,PC15 mode" "0,1" bitfld.long 0x4 22. "PC15VAL,PC15 value" "0,1" bitfld.long 0x4 21. "PC14EN,PC14 mode" "0,1" bitfld.long 0x4 20. "PC14VAL,PC14 value" "0,1" bitfld.long 0x4 19. "PC13EN,PC13 mode" "0,1" bitfld.long 0x4 18. "PC13VAL,RTC_ALARM output type/PC13" "0,1" bitfld.long 0x4 15. "TPPUDIS,RTC_TAMPx pull-up disable" "0,1" bitfld.long 0x4 13.--14. "TPPRDUSEL,RTC_TAMPx precharge" "0,1,2,3" bitfld.long 0x4 11.--12. "TPFCSEL,RTC_TAMPx filter count" "0,1,2,3" newline bitfld.long 0x4 8.--10. "TPSFSEL,Tamper sampling frequency" "0,1,2,3,4,5,6,7" bitfld.long 0x4 7. "TPTSEN,Activate timestamp on tamper detection" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x4 6. "TP3ALCFG,Active level for RTC_TAMP3 input" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x4 6. "TP3ALCFG,Active level for RTC_TAMP3 input" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x4 6. "TP3ALCFG,Active level for RTC_TAMP3 input" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x4 6. "TP3ALCFG,Active level for RTC_TAMP3 input" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x4 5. "TP3EN,RTC_TAMP3 input detection" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x4 5. "TP3EN,RTC_TAMP3 input detection" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x4 5. "TP3EN,RTC_TAMP3 input detection" "0,1" newline endif sif (cpuis("APM32F091*")) bitfld.long 0x4 5. "TP3EN,RTC_TAMP3 input detection" "0,1" endif bitfld.long 0x4 4. "TP2ALCFG,Active level for RTC_TAMP2 input" "0,1" bitfld.long 0x4 3. "TP2EN,RTC_TAMP2 input detection" "0,1" bitfld.long 0x4 2. "TPIEN,Tamper interrupt enable" "0,1" bitfld.long 0x4 1. "TP1ALCFG,Active level for RTC_TAMP1" "0,1" bitfld.long 0x4 0. "TP1EN,RTC_TAMP1 input detection" "0,1" line.long 0x8 "ALRMASS,alarm A sub second register" hexmask.long.byte 0x8 24.--27. 1. "MASKSEL,Mask the most-significant bits starting" hexmask.long.word 0x8 0.--14. 1. "SUBSEC,Sub seconds value" sif (cpuis("APM32F070*")) group.long 0x50++0x13 line.long 0x0 "BAKP0,backup register" hexmask.long 0x0 0.--31. 1. "BAKP,Backup Value Setup" line.long 0x4 "BAKP1,backup register" hexmask.long 0x4 0.--31. 1. "BAKP,Backup Value Setup" line.long 0x8 "BAKP2,backup register" hexmask.long 0x8 0.--31. 1. "BAKP,Backup Value Setup" line.long 0xC "BAKP3,backup register" hexmask.long 0xC 0.--31. 1. "BAKP,Backup Value Setup" line.long 0x10 "BAKP4,backup register" hexmask.long 0x10 0.--31. 1. "BAKP,Backup Value Setup" endif sif (cpuis("APM32F071*")) group.long 0x50++0x13 line.long 0x0 "BAKP0,backup register" hexmask.long 0x0 0.--31. 1. "BAKP,Backup Value Setup" line.long 0x4 "BAKP1,backup register" hexmask.long 0x4 0.--31. 1. "BAKP,Backup Value Setup" line.long 0x8 "BAKP2,backup register" hexmask.long 0x8 0.--31. 1. "BAKP,Backup Value Setup" line.long 0xC "BAKP3,backup register" hexmask.long 0xC 0.--31. 1. "BAKP,Backup Value Setup" line.long 0x10 "BAKP4,backup register" hexmask.long 0x10 0.--31. 1. "BAKP,Backup Value Setup" endif sif (cpuis("APM32F072*")) group.long 0x50++0x13 line.long 0x0 "BAKP0,backup register" hexmask.long 0x0 0.--31. 1. "BAKP,Backup Value Setup" line.long 0x4 "BAKP1,backup register" hexmask.long 0x4 0.--31. 1. "BAKP,Backup Value Setup" line.long 0x8 "BAKP2,backup register" hexmask.long 0x8 0.--31. 1. "BAKP,Backup Value Setup" line.long 0xC "BAKP3,backup register" hexmask.long 0xC 0.--31. 1. "BAKP,Backup Value Setup" line.long 0x10 "BAKP4,backup register" hexmask.long 0x10 0.--31. 1. "BAKP,Backup Value Setup" endif sif (cpuis("APM32F091*")) group.long 0x50++0x13 line.long 0x0 "BAKP0,backup register" hexmask.long 0x0 0.--31. 1. "BAKP,Backup Value Setup" line.long 0x4 "BAKP1,backup register" hexmask.long 0x4 0.--31. 1. "BAKP,Backup Value Setup" line.long 0x8 "BAKP2,backup register" hexmask.long 0x8 0.--31. 1. "BAKP,Backup Value Setup" line.long 0xC "BAKP3,backup register" hexmask.long 0xC 0.--31. 1. "BAKP,Backup Value Setup" line.long 0x10 "BAKP4,backup register" hexmask.long 0x10 0.--31. 1. "BAKP,Backup Value Setup" endif tree.end tree "SPI (Serial Peripheral Interface)" base ad:0x0 sif (cpuis("APM32F030*")||cpuis("APM32F051*")||cpuis("APM32F070*")) tree "SPI1" base ad:0x40013000 group.long 0x0++0x7 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 15. "BMEN,Bidirectional data mode" "0,1" bitfld.long 0x0 14. "BMOEN,Output enable in bidirectional" "0,1" bitfld.long 0x0 13. "CRCEN,Hardware CRC calculation" "0,1" bitfld.long 0x0 12. "CRCNXT,CRC transfer next" "0,1" bitfld.long 0x0 11. "CRCLSEL,CRC length" "0,1" bitfld.long 0x0 10. "RXOMEN,Receive only" "0,1" bitfld.long 0x0 9. "SSEN,Software slave management" "0,1" bitfld.long 0x0 8. "ISSEL,Internal slave select" "0,1" bitfld.long 0x0 7. "LSBSEL,Frame format" "0,1" bitfld.long 0x0 6. "SPIEN,SPI enable" "0,1" bitfld.long 0x0 3.--5. "BRSEL,Baud rate control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 2. "MSMCFG,Master selection" "0,1" bitfld.long 0x0 1. "CPOL,Clock polarity" "0,1" bitfld.long 0x0 0. "CPHA,Clock phase" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 14. "LDTX,Last DMA transfer for" "0,1" bitfld.long 0x4 13. "LDRX,Last DMA transfer for" "0,1" bitfld.long 0x4 12. "FRTCFG,FIFO reception threshold" "0,1" hexmask.long.byte 0x4 8.--11. 1. "DSCFG,Data size" bitfld.long 0x4 7. "TXBEIEN,Tx buffer empty interrupt" "0,1" bitfld.long 0x4 6. "RXBNEIEN,RX buffer not empty interrupt" "0,1" bitfld.long 0x4 5. "ERRIEN,Error interrupt enable" "0,1" bitfld.long 0x4 4. "FRFCFG,Frame format" "0,1" bitfld.long 0x4 3. "NSSPEN,NSS pulse management" "0,1" bitfld.long 0x4 2. "SSOEN,SS output enable" "0,1" bitfld.long 0x4 1. "TXDEN,Tx buffer DMA enable" "0,1" newline bitfld.long 0x4 0. "RXDEN,Rx buffer DMA enable" "0,1" rgroup.long 0x8++0x3 line.long 0x0 "STS,status register" bitfld.long 0x0 11.--12. "FTLSEL,FIFO transmission level" "0,1,2,3" bitfld.long 0x0 9.--10. "FRLSEL,FIFO reception level" "0,1,2,3" bitfld.long 0x0 8. "FRECFG,TI frame format error" "0,1" bitfld.long 0x0 7. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 6. "OVRFLG,Overrun flag" "0,1" bitfld.long 0x0 5. "MEFLG,Mode fault" "0,1" bitfld.long 0x0 4. "CRCEFLG,CRC error flag" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 3. "UDRFLG,Underrun flag" "0,1" bitfld.long 0x0 2. "SCHDIR,Channel direction" "0,1" endif bitfld.long 0x0 1. "TXBEFLG,Transmit buffer empty" "0,1" bitfld.long 0x0 0. "RXBNEFLG,Receive buffer not empty" "0,1" group.long 0xC++0x7 line.long 0x0 "DATA,data register" hexmask.long.word 0x0 0.--15. 1. "DATA,Data register" line.long 0x4 "CRCPOLY,CRC polynomial register" hexmask.long.word 0x4 0.--15. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x14++0x7 line.long 0x0 "RXCRC,RX CRC register" hexmask.long.word 0x0 0.--15. 1. "RXCRC,Rx CRC register" line.long 0x4 "TXCRC,TX CRC register" hexmask.long.word 0x4 0.--15. 1. "TXCRC,Tx CRC register" sif (cpuis("APM32F070*")) group.long 0x1C++0x7 line.long 0x0 "I2SCFG,I2S configuration register" bitfld.long 0x0 11. "MODESEL,I2S mode selection" "0,1" bitfld.long 0x0 10. "I2SEN,I2S enable" "0,1" newline bitfld.long 0x0 8.--9. "I2SMOD,I2S configuration mode" "0,1,2,3" bitfld.long 0x0 7. "PFSSEL,PCM frame synchronization" "0,1" newline bitfld.long 0x0 4.--5. "I2SSSEL,I2S standard selection" "0,1,2,3" bitfld.long 0x0 3. "CPOL,Inactive state clock polarity" "0,1" newline bitfld.long 0x0 1.--2. "DATALEN,Data length to be transferred" "0,1,2,3" bitfld.long 0x0 0. "CHLEN,Channel length" "0,1" line.long 0x4 "I2SPSC,I2S prescaler register" bitfld.long 0x4 9. "MCOEN,Master clock output enable" "0,1" bitfld.long 0x4 8. "ODDPSC,Odd prescaler" "0,1" newline hexmask.long.byte 0x4 0.--7. 1. "I2SPSC,I2S prescaler" endif tree.end endif sif (cpuis("APM32F030*")||cpuis("APM32F051*")||cpuis("APM32F070*")) tree "SPI2" base ad:0x40003800 group.long 0x0++0x7 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 15. "BMEN,Bidirectional data mode" "0,1" bitfld.long 0x0 14. "BMOEN,Output enable in bidirectional" "0,1" bitfld.long 0x0 13. "CRCEN,Hardware CRC calculation" "0,1" bitfld.long 0x0 12. "CRCNXT,CRC transfer next" "0,1" bitfld.long 0x0 11. "CRCLSEL,CRC length" "0,1" bitfld.long 0x0 10. "RXOMEN,Receive only" "0,1" bitfld.long 0x0 9. "SSEN,Software slave management" "0,1" bitfld.long 0x0 8. "ISSEL,Internal slave select" "0,1" bitfld.long 0x0 7. "LSBSEL,Frame format" "0,1" bitfld.long 0x0 6. "SPIEN,SPI enable" "0,1" bitfld.long 0x0 3.--5. "BRSEL,Baud rate control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 2. "MSMCFG,Master selection" "0,1" bitfld.long 0x0 1. "CPOL,Clock polarity" "0,1" bitfld.long 0x0 0. "CPHA,Clock phase" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 14. "LDTX,Last DMA transfer for" "0,1" bitfld.long 0x4 13. "LDRX,Last DMA transfer for" "0,1" bitfld.long 0x4 12. "FRTCFG,FIFO reception threshold" "0,1" hexmask.long.byte 0x4 8.--11. 1. "DSCFG,Data size" bitfld.long 0x4 7. "TXBEIEN,Tx buffer empty interrupt" "0,1" bitfld.long 0x4 6. "RXBNEIEN,RX buffer not empty interrupt" "0,1" bitfld.long 0x4 5. "ERRIEN,Error interrupt enable" "0,1" bitfld.long 0x4 4. "FRFCFG,Frame format" "0,1" bitfld.long 0x4 3. "NSSPEN,NSS pulse management" "0,1" bitfld.long 0x4 2. "SSOEN,SS output enable" "0,1" bitfld.long 0x4 1. "TXDEN,Tx buffer DMA enable" "0,1" newline bitfld.long 0x4 0. "RXDEN,Rx buffer DMA enable" "0,1" rgroup.long 0x8++0x3 line.long 0x0 "STS,status register" bitfld.long 0x0 11.--12. "FTLSEL,FIFO transmission level" "0,1,2,3" bitfld.long 0x0 9.--10. "FRLSEL,FIFO reception level" "0,1,2,3" bitfld.long 0x0 8. "FRECFG,TI frame format error" "0,1" bitfld.long 0x0 7. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 6. "OVRFLG,Overrun flag" "0,1" bitfld.long 0x0 5. "MEFLG,Mode fault" "0,1" bitfld.long 0x0 4. "CRCEFLG,CRC error flag" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 3. "UDRFLG,Underrun flag" "0,1" bitfld.long 0x0 2. "SCHDIR,Channel direction" "0,1" endif bitfld.long 0x0 1. "TXBEFLG,Transmit buffer empty" "0,1" bitfld.long 0x0 0. "RXBNEFLG,Receive buffer not empty" "0,1" group.long 0xC++0x7 line.long 0x0 "DATA,data register" hexmask.long.word 0x0 0.--15. 1. "DATA,Data register" line.long 0x4 "CRCPOLY,CRC polynomial register" hexmask.long.word 0x4 0.--15. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x14++0x7 line.long 0x0 "RXCRC,RX CRC register" hexmask.long.word 0x0 0.--15. 1. "RXCRC,Rx CRC register" line.long 0x4 "TXCRC,TX CRC register" hexmask.long.word 0x4 0.--15. 1. "TXCRC,Tx CRC register" sif (cpuis("APM32F070*")) group.long 0x1C++0x7 line.long 0x0 "I2SCFG,I2S configuration register" bitfld.long 0x0 11. "MODESEL,I2S mode selection" "0,1" bitfld.long 0x0 10. "I2SEN,I2S enable" "0,1" newline bitfld.long 0x0 8.--9. "I2SMOD,I2S configuration mode" "0,1,2,3" bitfld.long 0x0 7. "PFSSEL,PCM frame synchronization" "0,1" newline bitfld.long 0x0 4.--5. "I2SSSEL,I2S standard selection" "0,1,2,3" bitfld.long 0x0 3. "CPOL,Inactive state clock polarity" "0,1" newline bitfld.long 0x0 1.--2. "DATALEN,Data length to be transferred" "0,1,2,3" bitfld.long 0x0 0. "CHLEN,Channel length" "0,1" line.long 0x4 "I2SPSC,I2S prescaler register" bitfld.long 0x4 9. "MCOEN,Master clock output enable" "0,1" bitfld.long 0x4 8. "ODDPSC,Odd prescaler" "0,1" newline hexmask.long.byte 0x4 0.--7. 1. "I2SPSC,I2S prescaler" endif tree.end endif sif (cpuis("APM32F071*")) tree "SPI1" base ad:0x40013000 group.long 0x0++0x13 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 15. "BMEN,Bidirectional data mode" "0,1" bitfld.long 0x0 14. "BMOEN,Output enable in bidirectional" "0,1" bitfld.long 0x0 13. "CRCEN,Hardware CRC calculation" "0,1" bitfld.long 0x0 12. "CRCNXT,CRC transfer next" "0,1" bitfld.long 0x0 11. "CRCLSEL,CRC length" "0,1" bitfld.long 0x0 10. "RXOMEN,Receive only" "0,1" bitfld.long 0x0 9. "SSEN,Software slave management" "0,1" bitfld.long 0x0 8. "ISSEL,Internal slave select" "0,1" bitfld.long 0x0 7. "LSBSEL,Frame format" "0,1" bitfld.long 0x0 6. "SPIEN,SPI enable" "0,1" newline bitfld.long 0x0 3.--5. "BRSEL,Baud rate control" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "MSMCFG,Master selection" "0,1" bitfld.long 0x0 1. "CPOL,Clock polarity" "0,1" bitfld.long 0x0 0. "CPHA,Clock phase" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 14. "LDTX,Last DMA transfer for" "0,1" bitfld.long 0x4 13. "LDRX,Last DMA transfer for" "0,1" bitfld.long 0x4 12. "FRTCFG,FIFO reception threshold" "0,1" hexmask.long.byte 0x4 8.--11. 1. "DSCFG,Data size" bitfld.long 0x4 7. "TXBEIEN,Tx buffer empty interrupt" "0,1" bitfld.long 0x4 6. "RXBNEIEN,RX buffer not empty interrupt" "0,1" bitfld.long 0x4 5. "ERRIEN,Error interrupt enable" "0,1" bitfld.long 0x4 4. "FRFCFG,Frame format" "0,1" bitfld.long 0x4 3. "NSSPEN,NSS pulse management" "0,1" bitfld.long 0x4 2. "SSOEN,SS output enable" "0,1" newline bitfld.long 0x4 1. "TXDEN,Tx buffer DMA enable" "0,1" bitfld.long 0x4 0. "RXDEN,Rx buffer DMA enable" "0,1" line.long 0x8 "STS,status register" rbitfld.long 0x8 11.--12. "FTLSEL,FIFO transmission level" "0,1,2,3" rbitfld.long 0x8 9.--10. "FRLSEL,FIFO reception level" "0,1,2,3" rbitfld.long 0x8 8. "FRECFG,TI frame format error" "0,1" rbitfld.long 0x8 7. "BSYFLG,Busy flag" "0,1" rbitfld.long 0x8 6. "OVRFLG,Overrun flag" "0,1" rbitfld.long 0x8 5. "MEFLG,Mode fault" "0,1" bitfld.long 0x8 4. "CRCEFLG,CRC error flag" "0,1" rbitfld.long 0x8 3. "UDRFLG,Underrun flag" "0,1" rbitfld.long 0x8 2. "SCHDIR,Channel direction" "0,1" rbitfld.long 0x8 1. "TXBEFLG,Transmit buffer empty" "0,1" newline rbitfld.long 0x8 0. "RXBNEFLG,Receive buffer not empty" "0,1" line.long 0xC "DATA,data register" hexmask.long.word 0xC 0.--15. 1. "DATA,Data register" line.long 0x10 "CRCPOLY,CRC polynomial register" hexmask.long.word 0x10 0.--15. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x14++0x7 line.long 0x0 "RXCRC,RX CRC register" hexmask.long.word 0x0 0.--15. 1. "RXCRC,Rx CRC register" line.long 0x4 "TXCRC,TX CRC register" hexmask.long.word 0x4 0.--15. 1. "TXCRC,Tx CRC register" group.long 0x1C++0x7 line.long 0x0 "I2SCFG,I2S configuration register" bitfld.long 0x0 11. "MODESEL,I2S mode selection" "0,1" bitfld.long 0x0 10. "I2SEN,I2S enable" "0,1" bitfld.long 0x0 8.--9. "I2SMOD,I2S configuration mode" "0,1,2,3" bitfld.long 0x0 7. "PFSSEL,PCM frame synchronization" "0,1" bitfld.long 0x0 4.--5. "I2SSSEL,I2S standard selection" "0,1,2,3" bitfld.long 0x0 3. "CPOL,Inactive state clock polarity" "0,1" bitfld.long 0x0 1.--2. "DATALEN,Data length to be transferred" "0,1,2,3" bitfld.long 0x0 0. "CHLEN,Channel length" "0,1" line.long 0x4 "I2SPSC,I2S prescaler register" bitfld.long 0x4 9. "MCOEN,Master clock output enable" "0,1" bitfld.long 0x4 8. "ODDPSC,Odd prescaler" "0,1" hexmask.long.byte 0x4 0.--7. 1. "I2SPSC,I2S prescaler" tree.end endif sif (cpuis("APM32F071*")) tree "SPI2" base ad:0x40003800 group.long 0x0++0x13 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 15. "BMEN,Bidirectional data mode" "0,1" bitfld.long 0x0 14. "BMOEN,Output enable in bidirectional" "0,1" bitfld.long 0x0 13. "CRCEN,Hardware CRC calculation" "0,1" bitfld.long 0x0 12. "CRCNXT,CRC transfer next" "0,1" bitfld.long 0x0 11. "CRCLSEL,CRC length" "0,1" bitfld.long 0x0 10. "RXOMEN,Receive only" "0,1" bitfld.long 0x0 9. "SSEN,Software slave management" "0,1" bitfld.long 0x0 8. "ISSEL,Internal slave select" "0,1" bitfld.long 0x0 7. "LSBSEL,Frame format" "0,1" bitfld.long 0x0 6. "SPIEN,SPI enable" "0,1" newline bitfld.long 0x0 3.--5. "BRSEL,Baud rate control" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "MSMCFG,Master selection" "0,1" bitfld.long 0x0 1. "CPOL,Clock polarity" "0,1" bitfld.long 0x0 0. "CPHA,Clock phase" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 14. "LDTX,Last DMA transfer for" "0,1" bitfld.long 0x4 13. "LDRX,Last DMA transfer for" "0,1" bitfld.long 0x4 12. "FRTCFG,FIFO reception threshold" "0,1" hexmask.long.byte 0x4 8.--11. 1. "DSCFG,Data size" bitfld.long 0x4 7. "TXBEIEN,Tx buffer empty interrupt" "0,1" bitfld.long 0x4 6. "RXBNEIEN,RX buffer not empty interrupt" "0,1" bitfld.long 0x4 5. "ERRIEN,Error interrupt enable" "0,1" bitfld.long 0x4 4. "FRFCFG,Frame format" "0,1" bitfld.long 0x4 3. "NSSPEN,NSS pulse management" "0,1" bitfld.long 0x4 2. "SSOEN,SS output enable" "0,1" newline bitfld.long 0x4 1. "TXDEN,Tx buffer DMA enable" "0,1" bitfld.long 0x4 0. "RXDEN,Rx buffer DMA enable" "0,1" line.long 0x8 "STS,status register" rbitfld.long 0x8 11.--12. "FTLSEL,FIFO transmission level" "0,1,2,3" rbitfld.long 0x8 9.--10. "FRLSEL,FIFO reception level" "0,1,2,3" rbitfld.long 0x8 8. "FRECFG,TI frame format error" "0,1" rbitfld.long 0x8 7. "BSYFLG,Busy flag" "0,1" rbitfld.long 0x8 6. "OVRFLG,Overrun flag" "0,1" rbitfld.long 0x8 5. "MEFLG,Mode fault" "0,1" bitfld.long 0x8 4. "CRCEFLG,CRC error flag" "0,1" rbitfld.long 0x8 3. "UDRFLG,Underrun flag" "0,1" rbitfld.long 0x8 2. "SCHDIR,Channel direction" "0,1" rbitfld.long 0x8 1. "TXBEFLG,Transmit buffer empty" "0,1" newline rbitfld.long 0x8 0. "RXBNEFLG,Receive buffer not empty" "0,1" line.long 0xC "DATA,data register" hexmask.long.word 0xC 0.--15. 1. "DATA,Data register" line.long 0x10 "CRCPOLY,CRC polynomial register" hexmask.long.word 0x10 0.--15. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x14++0x7 line.long 0x0 "RXCRC,RX CRC register" hexmask.long.word 0x0 0.--15. 1. "RXCRC,Rx CRC register" line.long 0x4 "TXCRC,TX CRC register" hexmask.long.word 0x4 0.--15. 1. "TXCRC,Tx CRC register" group.long 0x1C++0x7 line.long 0x0 "I2SCFG,I2S configuration register" bitfld.long 0x0 11. "MODESEL,I2S mode selection" "0,1" bitfld.long 0x0 10. "I2SEN,I2S enable" "0,1" bitfld.long 0x0 8.--9. "I2SMOD,I2S configuration mode" "0,1,2,3" bitfld.long 0x0 7. "PFSSEL,PCM frame synchronization" "0,1" bitfld.long 0x0 4.--5. "I2SSSEL,I2S standard selection" "0,1,2,3" bitfld.long 0x0 3. "CPOL,Inactive state clock polarity" "0,1" bitfld.long 0x0 1.--2. "DATALEN,Data length to be transferred" "0,1,2,3" bitfld.long 0x0 0. "CHLEN,Channel length" "0,1" line.long 0x4 "I2SPSC,I2S prescaler register" bitfld.long 0x4 9. "MCOEN,Master clock output enable" "0,1" bitfld.long 0x4 8. "ODDPSC,Odd prescaler" "0,1" hexmask.long.byte 0x4 0.--7. 1. "I2SPSC,I2S prescaler" tree.end endif sif (cpuis("APM32F072*")) tree "SPI1" base ad:0x40013000 group.long 0x0++0x13 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 15. "BMEN,Bidirectional data mode" "0,1" bitfld.long 0x0 14. "BMOEN,Output enable in bidirectional" "0,1" bitfld.long 0x0 13. "CRCEN,Hardware CRC calculation" "0,1" bitfld.long 0x0 12. "CRCNXT,CRC transfer next" "0,1" bitfld.long 0x0 11. "CRCLSEL,CRC length" "0,1" bitfld.long 0x0 10. "RXOMEN,Receive only" "0,1" bitfld.long 0x0 9. "SSEN,Software slave management" "0,1" bitfld.long 0x0 8. "ISSEL,Internal slave select" "0,1" bitfld.long 0x0 7. "LSBSEL,Frame format" "0,1" bitfld.long 0x0 6. "SPIEN,SPI enable" "0,1" newline bitfld.long 0x0 3.--5. "BRSEL,Baud rate control" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "MSMCFG,Master selection" "0,1" bitfld.long 0x0 1. "CPOL,Clock polarity" "0,1" bitfld.long 0x0 0. "CPHA,Clock phase" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 14. "LDTX,Last DMA transfer for" "0,1" bitfld.long 0x4 13. "LDRX,Last DMA transfer for" "0,1" bitfld.long 0x4 12. "FRTCFG,FIFO reception threshold" "0,1" hexmask.long.byte 0x4 8.--11. 1. "DSCFG,Data size" bitfld.long 0x4 7. "TXBEIEN,Tx buffer empty interrupt" "0,1" bitfld.long 0x4 6. "RXBNEIEN,RX buffer not empty interrupt" "0,1" bitfld.long 0x4 5. "ERRIEN,Error interrupt enable" "0,1" bitfld.long 0x4 4. "FRFCFG,Frame format" "0,1" bitfld.long 0x4 3. "NSSPEN,NSS pulse management" "0,1" bitfld.long 0x4 2. "SSOEN,SS output enable" "0,1" newline bitfld.long 0x4 1. "TXDEN,Tx buffer DMA enable" "0,1" bitfld.long 0x4 0. "RXDEN,Rx buffer DMA enable" "0,1" line.long 0x8 "STS,status register" rbitfld.long 0x8 11.--12. "FTLSEL,FIFO transmission level" "0,1,2,3" rbitfld.long 0x8 9.--10. "FRLSEL,FIFO reception level" "0,1,2,3" rbitfld.long 0x8 8. "FRECFG,TI frame format error" "0,1" rbitfld.long 0x8 7. "BSYFLG,Busy flag" "0,1" rbitfld.long 0x8 6. "OVRFLG,Overrun flag" "0,1" rbitfld.long 0x8 5. "MEFLG,Mode fault" "0,1" bitfld.long 0x8 4. "CRCEFLG,CRC error flag" "0,1" rbitfld.long 0x8 3. "UDRFLG,Underrun flag" "0,1" rbitfld.long 0x8 2. "SCHDIR,Channel direction" "0,1" rbitfld.long 0x8 1. "TXBEFLG,Transmit buffer empty" "0,1" newline rbitfld.long 0x8 0. "RXBNEFLG,Receive buffer not empty" "0,1" line.long 0xC "DATA,data register" hexmask.long.word 0xC 0.--15. 1. "DATA,Data register" line.long 0x10 "CRCPOLY,CRC polynomial register" hexmask.long.word 0x10 0.--15. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x14++0x7 line.long 0x0 "RXCRC,RX CRC register" hexmask.long.word 0x0 0.--15. 1. "RXCRC,Rx CRC register" line.long 0x4 "TXCRC,TX CRC register" hexmask.long.word 0x4 0.--15. 1. "TXCRC,Tx CRC register" group.long 0x1C++0x7 line.long 0x0 "I2SCFG,I2S configuration register" bitfld.long 0x0 11. "MODESEL,I2S mode selection" "0,1" bitfld.long 0x0 10. "I2SEN,I2S enable" "0,1" bitfld.long 0x0 8.--9. "I2SMOD,I2S configuration mode" "0,1,2,3" bitfld.long 0x0 7. "PFSSEL,PCM frame synchronization" "0,1" bitfld.long 0x0 4.--5. "I2SSSEL,I2S standard selection" "0,1,2,3" bitfld.long 0x0 3. "CPOL,Inactive state clock polarity" "0,1" bitfld.long 0x0 1.--2. "DATALEN,Data length to be transferred" "0,1,2,3" bitfld.long 0x0 0. "CHLEN,Channel length" "0,1" line.long 0x4 "I2SPSC,I2S prescaler register" bitfld.long 0x4 9. "MCOEN,Master clock output enable" "0,1" bitfld.long 0x4 8. "ODDPSC,Odd prescaler" "0,1" hexmask.long.byte 0x4 0.--7. 1. "I2SPSC,I2S prescaler" tree.end endif sif (cpuis("APM32F072*")) tree "SPI2" base ad:0x40003800 group.long 0x0++0x13 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 15. "BMEN,Bidirectional data mode" "0,1" bitfld.long 0x0 14. "BMOEN,Output enable in bidirectional" "0,1" bitfld.long 0x0 13. "CRCEN,Hardware CRC calculation" "0,1" bitfld.long 0x0 12. "CRCNXT,CRC transfer next" "0,1" bitfld.long 0x0 11. "CRCLSEL,CRC length" "0,1" bitfld.long 0x0 10. "RXOMEN,Receive only" "0,1" bitfld.long 0x0 9. "SSEN,Software slave management" "0,1" bitfld.long 0x0 8. "ISSEL,Internal slave select" "0,1" bitfld.long 0x0 7. "LSBSEL,Frame format" "0,1" bitfld.long 0x0 6. "SPIEN,SPI enable" "0,1" newline bitfld.long 0x0 3.--5. "BRSEL,Baud rate control" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "MSMCFG,Master selection" "0,1" bitfld.long 0x0 1. "CPOL,Clock polarity" "0,1" bitfld.long 0x0 0. "CPHA,Clock phase" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 14. "LDTX,Last DMA transfer for" "0,1" bitfld.long 0x4 13. "LDRX,Last DMA transfer for" "0,1" bitfld.long 0x4 12. "FRTCFG,FIFO reception threshold" "0,1" hexmask.long.byte 0x4 8.--11. 1. "DSCFG,Data size" bitfld.long 0x4 7. "TXBEIEN,Tx buffer empty interrupt" "0,1" bitfld.long 0x4 6. "RXBNEIEN,RX buffer not empty interrupt" "0,1" bitfld.long 0x4 5. "ERRIEN,Error interrupt enable" "0,1" bitfld.long 0x4 4. "FRFCFG,Frame format" "0,1" bitfld.long 0x4 3. "NSSPEN,NSS pulse management" "0,1" bitfld.long 0x4 2. "SSOEN,SS output enable" "0,1" newline bitfld.long 0x4 1. "TXDEN,Tx buffer DMA enable" "0,1" bitfld.long 0x4 0. "RXDEN,Rx buffer DMA enable" "0,1" line.long 0x8 "STS,status register" rbitfld.long 0x8 11.--12. "FTLSEL,FIFO transmission level" "0,1,2,3" rbitfld.long 0x8 9.--10. "FRLSEL,FIFO reception level" "0,1,2,3" rbitfld.long 0x8 8. "FRECFG,TI frame format error" "0,1" rbitfld.long 0x8 7. "BSYFLG,Busy flag" "0,1" rbitfld.long 0x8 6. "OVRFLG,Overrun flag" "0,1" rbitfld.long 0x8 5. "MEFLG,Mode fault" "0,1" bitfld.long 0x8 4. "CRCEFLG,CRC error flag" "0,1" rbitfld.long 0x8 3. "UDRFLG,Underrun flag" "0,1" rbitfld.long 0x8 2. "SCHDIR,Channel direction" "0,1" rbitfld.long 0x8 1. "TXBEFLG,Transmit buffer empty" "0,1" newline rbitfld.long 0x8 0. "RXBNEFLG,Receive buffer not empty" "0,1" line.long 0xC "DATA,data register" hexmask.long.word 0xC 0.--15. 1. "DATA,Data register" line.long 0x10 "CRCPOLY,CRC polynomial register" hexmask.long.word 0x10 0.--15. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x14++0x7 line.long 0x0 "RXCRC,RX CRC register" hexmask.long.word 0x0 0.--15. 1. "RXCRC,Rx CRC register" line.long 0x4 "TXCRC,TX CRC register" hexmask.long.word 0x4 0.--15. 1. "TXCRC,Tx CRC register" group.long 0x1C++0x7 line.long 0x0 "I2SCFG,I2S configuration register" bitfld.long 0x0 11. "MODESEL,I2S mode selection" "0,1" bitfld.long 0x0 10. "I2SEN,I2S enable" "0,1" bitfld.long 0x0 8.--9. "I2SMOD,I2S configuration mode" "0,1,2,3" bitfld.long 0x0 7. "PFSSEL,PCM frame synchronization" "0,1" bitfld.long 0x0 4.--5. "I2SSSEL,I2S standard selection" "0,1,2,3" bitfld.long 0x0 3. "CPOL,Inactive state clock polarity" "0,1" bitfld.long 0x0 1.--2. "DATALEN,Data length to be transferred" "0,1,2,3" bitfld.long 0x0 0. "CHLEN,Channel length" "0,1" line.long 0x4 "I2SPSC,I2S prescaler register" bitfld.long 0x4 9. "MCOEN,Master clock output enable" "0,1" bitfld.long 0x4 8. "ODDPSC,Odd prescaler" "0,1" hexmask.long.byte 0x4 0.--7. 1. "I2SPSC,I2S prescaler" tree.end endif sif (cpuis("APM32F091*")) tree "SPI1" base ad:0x40013000 group.long 0x0++0x13 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 15. "BMEN,Bidirectional data mode" "0,1" bitfld.long 0x0 14. "BMOEN,Bidirectional Mode Output Enable" "0,1" bitfld.long 0x0 13. "CRCEN,Hardware CRC calculation" "0,1" bitfld.long 0x0 12. "CRCNXT,CRC transfer next" "0,1" bitfld.long 0x0 11. "CRCLSEL,CRC Length Select" "0,1" bitfld.long 0x0 10. "RXOMEN,Receive Only Mode Enable" "0,1" bitfld.long 0x0 9. "SSEN,Software Slave Device Enable" "0,1" bitfld.long 0x0 8. "ISSEL,Internal Slave Device Select" "0,1" bitfld.long 0x0 7. "LSBSEL,LSB First Transfer Select" "0,1" bitfld.long 0x0 6. "SPIEN,SPI enable" "0,1" newline bitfld.long 0x0 3.--5. "BRSEL,Baud Rate Divider Factor Selectl" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "MSMCFG,Master/Salve Mode Configure" "0,1" bitfld.long 0x0 1. "CPOL,Clock Phase Configure" "0,1" bitfld.long 0x0 0. "CPHA,Clock Polarity Configure" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 14. "LDTX,Last DMA transfer for" "0,1" bitfld.long 0x4 13. "LDRX,Last DMA transfer for" "0,1" bitfld.long 0x4 12. "FRTCFG,FIFO reception threshold" "0,1" hexmask.long.byte 0x4 8.--11. 1. "DSCFG,Data size" bitfld.long 0x4 7. "TXBEIEN,Tx buffer empty interrupt" "0,1" bitfld.long 0x4 6. "RXBNEIEN,RX buffer not empty interrupt" "0,1" bitfld.long 0x4 5. "ERRIEN,Error interrupt enable" "0,1" bitfld.long 0x4 4. "FRFCFG ,Frame format" "0,1" bitfld.long 0x4 3. "NSSPEN,NSS pulse management" "0,1" bitfld.long 0x4 2. "SSOEN ,SS output enable" "0,1" newline bitfld.long 0x4 1. "TXDEN,Tx buffer DMA enable" "0,1" bitfld.long 0x4 0. "RXDEN,Rx buffer DMA enable" "0,1" line.long 0x8 "STS,status register" rbitfld.long 0x8 11.--12. "FTLSEL,FIFO transmission level" "0,1,2,3" rbitfld.long 0x8 9.--10. "FRLSEL,FIFO reception level" "0,1,2,3" rbitfld.long 0x8 8. "FRECFG,TI frame format error" "0,1" rbitfld.long 0x8 7. "BSYFLG,Busy flag" "0,1" rbitfld.long 0x8 6. "OVRFLG,Overrun flag" "0,1" rbitfld.long 0x8 5. "MEFLG,Mode fault" "0,1" bitfld.long 0x8 4. "CRCEFLG,CRC error flag" "0,1" rbitfld.long 0x8 3. "UDRFLG,Underrun flag" "0,1" rbitfld.long 0x8 2. "SCHDIR,Channel direction" "0,1" rbitfld.long 0x8 1. "TXBEFLG,Transmit buffer empty" "0,1" newline rbitfld.long 0x8 0. "RXBNEFLG,Receive buffer not empty" "0,1" line.long 0xC "DATA,data register" hexmask.long.word 0xC 0.--15. 1. "DATA,Data register" line.long 0x10 "CRCPOLY,CRC polynomial register" hexmask.long.word 0x10 0.--15. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x14++0x7 line.long 0x0 "RXCRC,RX CRC register" hexmask.long.word 0x0 0.--15. 1. "RXCRC,Rx CRC register" line.long 0x4 "TXCRC,TX CRC register" hexmask.long.word 0x4 0.--15. 1. "TXCRC,Tx CRC register" group.long 0x1C++0x7 line.long 0x0 "I2SCFG,I2S configuration register" bitfld.long 0x0 11. "MODESEL,I2S mode selection" "0,1" bitfld.long 0x0 10. "I2SEN,I2S enable" "0,1" bitfld.long 0x0 8.--9. "I2SMOD,I2S configuration mode" "0,1,2,3" bitfld.long 0x0 7. "PFSSEL,PCM frame synchronization" "0,1" bitfld.long 0x0 4.--5. "I2SSSEL,I2S standard selection" "0,1,2,3" bitfld.long 0x0 3. "CPOL,Inactive state clock polarity" "0,1" bitfld.long 0x0 1.--2. "DATALEN,Data length to be transferred" "0,1,2,3" bitfld.long 0x0 0. "CHLEN,Channel length" "0,1" line.long 0x4 "I2SPSC,I2S prescaler register" bitfld.long 0x4 9. "MCOEN,Master clock output enable" "0,1" bitfld.long 0x4 8. "ODDPSC,Odd prescaler" "0,1" hexmask.long.byte 0x4 0.--7. 1. "I2SPSC,I2S prescaler" tree.end endif sif (cpuis("APM32F091*")) tree "SPI2" base ad:0x40003800 group.long 0x0++0x13 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 15. "BMEN,Bidirectional data mode" "0,1" bitfld.long 0x0 14. "BMOEN,Bidirectional Mode Output Enable" "0,1" bitfld.long 0x0 13. "CRCEN,Hardware CRC calculation" "0,1" bitfld.long 0x0 12. "CRCNXT,CRC transfer next" "0,1" bitfld.long 0x0 11. "CRCLSEL,CRC Length Select" "0,1" bitfld.long 0x0 10. "RXOMEN,Receive Only Mode Enable" "0,1" bitfld.long 0x0 9. "SSEN,Software Slave Device Enable" "0,1" bitfld.long 0x0 8. "ISSEL,Internal Slave Device Select" "0,1" bitfld.long 0x0 7. "LSBSEL,LSB First Transfer Select" "0,1" bitfld.long 0x0 6. "SPIEN,SPI enable" "0,1" newline bitfld.long 0x0 3.--5. "BRSEL,Baud Rate Divider Factor Selectl" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "MSMCFG,Master/Salve Mode Configure" "0,1" bitfld.long 0x0 1. "CPOL,Clock Phase Configure" "0,1" bitfld.long 0x0 0. "CPHA,Clock Polarity Configure" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 14. "LDTX,Last DMA transfer for" "0,1" bitfld.long 0x4 13. "LDRX,Last DMA transfer for" "0,1" bitfld.long 0x4 12. "FRTCFG,FIFO reception threshold" "0,1" hexmask.long.byte 0x4 8.--11. 1. "DSCFG,Data size" bitfld.long 0x4 7. "TXBEIEN,Tx buffer empty interrupt" "0,1" bitfld.long 0x4 6. "RXBNEIEN,RX buffer not empty interrupt" "0,1" bitfld.long 0x4 5. "ERRIEN,Error interrupt enable" "0,1" bitfld.long 0x4 4. "FRFCFG ,Frame format" "0,1" bitfld.long 0x4 3. "NSSPEN,NSS pulse management" "0,1" bitfld.long 0x4 2. "SSOEN ,SS output enable" "0,1" newline bitfld.long 0x4 1. "TXDEN,Tx buffer DMA enable" "0,1" bitfld.long 0x4 0. "RXDEN,Rx buffer DMA enable" "0,1" line.long 0x8 "STS,status register" rbitfld.long 0x8 11.--12. "FTLSEL,FIFO transmission level" "0,1,2,3" rbitfld.long 0x8 9.--10. "FRLSEL,FIFO reception level" "0,1,2,3" rbitfld.long 0x8 8. "FRECFG,TI frame format error" "0,1" rbitfld.long 0x8 7. "BSYFLG,Busy flag" "0,1" rbitfld.long 0x8 6. "OVRFLG,Overrun flag" "0,1" rbitfld.long 0x8 5. "MEFLG,Mode fault" "0,1" bitfld.long 0x8 4. "CRCEFLG,CRC error flag" "0,1" rbitfld.long 0x8 3. "UDRFLG,Underrun flag" "0,1" rbitfld.long 0x8 2. "SCHDIR,Channel direction" "0,1" rbitfld.long 0x8 1. "TXBEFLG,Transmit buffer empty" "0,1" newline rbitfld.long 0x8 0. "RXBNEFLG,Receive buffer not empty" "0,1" line.long 0xC "DATA,data register" hexmask.long.word 0xC 0.--15. 1. "DATA,Data register" line.long 0x10 "CRCPOLY,CRC polynomial register" hexmask.long.word 0x10 0.--15. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x14++0x7 line.long 0x0 "RXCRC,RX CRC register" hexmask.long.word 0x0 0.--15. 1. "RXCRC,Rx CRC register" line.long 0x4 "TXCRC,TX CRC register" hexmask.long.word 0x4 0.--15. 1. "TXCRC,Tx CRC register" group.long 0x1C++0x7 line.long 0x0 "I2SCFG,I2S configuration register" bitfld.long 0x0 11. "MODESEL,I2S mode selection" "0,1" bitfld.long 0x0 10. "I2SEN,I2S enable" "0,1" bitfld.long 0x0 8.--9. "I2SMOD,I2S configuration mode" "0,1,2,3" bitfld.long 0x0 7. "PFSSEL,PCM frame synchronization" "0,1" bitfld.long 0x0 4.--5. "I2SSSEL,I2S standard selection" "0,1,2,3" bitfld.long 0x0 3. "CPOL,Inactive state clock polarity" "0,1" bitfld.long 0x0 1.--2. "DATALEN,Data length to be transferred" "0,1,2,3" bitfld.long 0x0 0. "CHLEN,Channel length" "0,1" line.long 0x4 "I2SPSC,I2S prescaler register" bitfld.long 0x4 9. "MCOEN,Master clock output enable" "0,1" bitfld.long 0x4 8. "ODDPSC,Odd prescaler" "0,1" hexmask.long.byte 0x4 0.--7. 1. "I2SPSC,I2S prescaler" tree.end endif tree.end tree "SYSCFG (System Configuration Controller)" base ad:0x40010000 group.long 0x0++0x3 line.long 0x0 "CFG1,configuration register 1" sif (cpuis("APM32F070*")) bitfld.long 0x0 30. "TMR3DMARMP,TMR3 DMA request remapping bit" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x0 30. "TMR3DMARMP,TMR3 DMA request remapping bit" "0,1" bitfld.long 0x0 29. "TMR2DMARMP,TMR2 DMA request remapping bit" "0,1" bitfld.long 0x0 28. "TMR1DMARMP,TMR1 DMA request remapping bit" "0,1" bitfld.long 0x0 27. "I2C1DMARMP,I2C1 DMA request remapping bit" "0,1" bitfld.long 0x0 26. "USART3DMARMP,USART3 DMA request remapping bit" "0,1" bitfld.long 0x0 25. "USART2DMARMP,USART2 DMA request remapping bit" "0,1" bitfld.long 0x0 24. "SPI2DMARMP,SPI2 DMA request remapping bit." "0,1" newline endif sif (cpuis("APM32F072*")) bitfld.long 0x0 30. "TMR3DMARMP,TMR3 DMA request remapping bit" "0,1" bitfld.long 0x0 29. "TMR2DMARMP,TMR2 DMA request remapping bit" "0,1" bitfld.long 0x0 28. "TMR1DMARMP,TMR1 DMA request remapping bit" "0,1" bitfld.long 0x0 27. "I2C1DMARMP,I2C1 DMA request remapping bit" "0,1" bitfld.long 0x0 26. "USART3DMARMP,USART3 DMA request remapping bit" "0,1" bitfld.long 0x0 25. "USART2DMARMP,USART2 DMA request remapping bit" "0,1" bitfld.long 0x0 24. "SPI2DMARMP,SPI2 DMA request remapping bit." "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x0 28. "TMR1DMARMP,TMR1 DMA request remapping bit" "0,1" newline bitfld.long 0x0 27. "I2C1DMARMP,I2C1 DMA request remapping bit" "0,1" bitfld.long 0x0 26. "USART3DMARMP,USART3 DMA request remapping bit" "0,1" bitfld.long 0x0 25. "USART2DMARMP,USART2 DMA request remapping bit" "0,1" bitfld.long 0x0 24. "SPI2DMARMP,SPI2 DMA request remapping bit." "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x0 23. "I2CPA10FMP,Fast Mode Plus Driving" "0,1" bitfld.long 0x0 22. "I2CPA9FMP,Fast Mode Plus Driving" "0,1" newline bitfld.long 0x0 21. "I2C2FMP,FM+ driving capability activation for I2C1" "0,1" endif sif (cpuis("APM32F030*")||cpuis("APM32F051*")) bitfld.long 0x0 22.--23. "I2CFMP,FM+ driving capability activation for I2C1" "0,1,2,3" newline endif sif (cpuis("APM32F070*")) newline bitfld.long 0x0 21. "I2C2FMP,FM+ driving capability activation for I2C1" "0,1" endif sif (cpuis("APM32F071*")) newline bitfld.long 0x0 21. "I2C2FMP,FM+ driving capability activation for I2C1" "0,1" endif sif (cpuis("APM32F072*")) newline bitfld.long 0x0 21. "I2C2FMP,FM+ driving capability activation for I2C1" "0,1" endif newline bitfld.long 0x0 20. "I2C1FMP,FM+ driving capability activation for I2C1" "0,1" bitfld.long 0x0 19. "I2CPB9FMP,Fast Mode Plus (FM+) driving capability activation bits." "0,1" bitfld.long 0x0 18. "I2CPB8FMP,Fast Mode Plus (FM+) driving capability activation bits." "0,1" bitfld.long 0x0 17. "I2CPB7FMP,Fast Mode Plus (FM+) driving capability activation bits." "0,1" bitfld.long 0x0 16. "I2CPB6FMP,Fast Mode Plus (FM plus) driving" "0,1" newline sif (cpuis("APM32F070*")) bitfld.long 0x0 14. "TMR17DMARMP2,TMR17 alternate DMA request remapping bit." "0,1" bitfld.long 0x0 13. "TMR16DMARMP2,TMR16 alternate DMA request remapping bit." "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x0 14. "TMR17DMARMP2,TMR17 alternate DMA request remapping bit." "0,1" bitfld.long 0x0 13. "TMR16DMARMP2,TMR16 alternate DMA request remapping bit." "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x0 14. "TMR17DMARMP2,TMR17 alternate DMA request remapping bit." "0,1" bitfld.long 0x0 13. "TMR16DMARMP2,TMR16 alternate DMA request remapping bit." "0,1" endif sif (cpuis("APM32F030*")||cpuis("APM32F051*")||cpuis("APM32F070*")||cpuis("APM32F071*")||cpuis("APM32F072*")) bitfld.long 0x0 12. "TMR17DMARMP,TMR17 DMA request remapping" "0,1" bitfld.long 0x0 11. "TMR16DMARMP,TMR16 DMA request remapping" "0,1" newline bitfld.long 0x0 10. "USART1RXRMP,USART1_RX DMA request remapping" "0,1" bitfld.long 0x0 9. "USART1TXRMP,USART1_TX DMA remapping" "0,1" bitfld.long 0x0 8. "ADCDMARMP,ADC DMA remapping bit" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x0 6.--7. "IRSEL,IR Modulation Envelope Signal Select" "0,1,2,3" endif bitfld.long 0x0 0.--1. "MMSEL,Memory mapping selection" "0,1,2,3" group.long 0x8++0x13 line.long 0x0 "EINTCFG1,external interrupt configuration register 1" hexmask.long.byte 0x0 12.--15. 1. "EINT3,EINT 3 configuration bits" hexmask.long.byte 0x0 8.--11. 1. "EINT2,EINT 2 configuration bits" hexmask.long.byte 0x0 4.--7. 1. "EINT1,EINT 1 configuration bits" hexmask.long.byte 0x0 0.--3. 1. "EINT0,EINT 0 configuration bits" line.long 0x4 "EINTCFG2,external interrupt configuration register 2" hexmask.long.byte 0x4 12.--15. 1. "EINT7,EINT 7 configuration bits" hexmask.long.byte 0x4 8.--11. 1. "EINT6,EINT 6 configuration bits" hexmask.long.byte 0x4 4.--7. 1. "EINT5,EINT 5 configuration bits" hexmask.long.byte 0x4 0.--3. 1. "EINT4,EINT 4 configuration bits" line.long 0x8 "EINTCFG3,external interrupt configuration register 3" hexmask.long.byte 0x8 12.--15. 1. "EINT11,EINT 11 configuration bits" hexmask.long.byte 0x8 8.--11. 1. "EINT10,EINT 10 configuration bits" hexmask.long.byte 0x8 4.--7. 1. "EINT9,EINT 9 configuration bits" hexmask.long.byte 0x8 0.--3. 1. "EINT8,EINT 8 configuration bits" line.long 0xC "EINTCFG4,external interrupt configuration register 4" hexmask.long.byte 0xC 12.--15. 1. "EINT15,EINT 15 configuration bits" hexmask.long.byte 0xC 8.--11. 1. "EINT14,EINT 14 configuration bits" hexmask.long.byte 0xC 4.--7. 1. "EINT13,EINT 13 configuration bits" hexmask.long.byte 0xC 0.--3. 1. "EINT12,EINT 12 configuration bits" line.long 0x10 "CFG2,configuration register 2" bitfld.long 0x10 8. "SRAMEFLG,SRAM parity error flag" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x10 2. "PVDLOCK,PVD lock enable bit" "0,1" endif sif (cpuis("APM32F071*")) bitfld.long 0x10 2. "PVDLOCK,PVD lock enable bit" "0,1" endif sif (cpuis("APM32F072*")) bitfld.long 0x10 2. "PVDLOCK,PVD lock enable bit" "0,1" endif sif (cpuis("APM32F091*")) bitfld.long 0x10 2. "PVDLOCK,PVD lock enable bit" "0,1" endif bitfld.long 0x10 1. "SRAMLOCK,SRAM parity lock bit" "0,1" bitfld.long 0x10 0. "LOCK,Cortex-M0 Hardfault enable bit" "0,1" tree.end tree "TMR (Timers)" base ad:0x0 sif (cpuis("APM32F051*")) tree "TMR2 (General-Purpose Timer)" base ad:0x40000000 group.long 0x0++0x13 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 5.--6. "CAMSEL,Center-aligned mode" "0,1,2,3" bitfld.long 0x0 4. "CNTDIR,Direction" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 7. "TI1SEL,TI1 selection" "0,1" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA selection" "0,1" line.long 0x8 "SMCTRL,slave mode control register" bitfld.long 0x8 15. "ETPOL,External trigger polarity" "0,1" bitfld.long 0x8 14. "ECEN,External clock enable" "0,1" bitfld.long 0x8 12.--13. "ETPCFG,External trigger prescaler" "0,1,2,3" hexmask.long.byte 0x8 8.--11. 1. "ETFCFG,External trigger filter" bitfld.long 0x8 7. "MSMEN,Master/Slave mode" "0,1" bitfld.long 0x8 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7" bitfld.long 0x8 3. "OCCSEL,OCREF clear selection" "0,1" bitfld.long 0x8 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7" line.long 0xC "DIEN,DMA/Interrupt enable register" bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1" bitfld.long 0xC 12. "CC4DEN,Capture/Compare 4 DMA request" "0,1" bitfld.long 0xC 11. "CC3DEN,Capture/Compare 3 DMA request" "0,1" bitfld.long 0xC 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1" bitfld.long 0xC 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1" bitfld.long 0xC 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0xC 6. "TRGIEN,Trigger interrupt enable" "0,1" bitfld.long 0xC 4. "CC4IEN,Capture/Compare 4 interrupt" "0,1" bitfld.long 0xC 3. "CC3IEN,Capture/Compare 3 interrupt" "0,1" newline bitfld.long 0xC 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1" bitfld.long 0xC 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1" bitfld.long 0xC 0. "UIEN,Update interrupt enable" "0,1" line.long 0x10 "STS,status register" bitfld.long 0x10 12. "CC4RCFLG,Capture/Compare 4 overcapture" "0,1" bitfld.long 0x10 11. "CC3RCFLG,Capture/Compare 3 overcapture" "0,1" bitfld.long 0x10 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1" bitfld.long 0x10 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1" bitfld.long 0x10 6. "TRGIFLG,Trigger interrupt flag" "0,1" bitfld.long 0x10 4. "CC4IFLG,Capture/Compare 4 interrupt" "0,1" bitfld.long 0x10 3. "CC3IFLG,Capture/Compare 3 interrupt" "0,1" bitfld.long 0x10 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1" bitfld.long 0x10 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1" newline bitfld.long 0x10 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 6. "TEG,Trigger generation" "0,1" bitfld.long 0x0 4. "CC4EG,Capture/compare 4" "0,1" bitfld.long 0x0 3. "CC3EG,Capture/compare 3" "0,1" bitfld.long 0x0 2. "CC2EG,Capture/compare 2" "0,1" bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CCM1_OUTPUT,capture/compare mode register (output mode)" bitfld.long 0x0 15. "OC2CEN,Output Compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3" bitfld.long 0x0 7. "OC1CEN,Output Compare 1 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload enable" "0,1" bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast enable" "0,1" newline bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3" group.long 0x18++0x7 line.long 0x0 "CCM1_INPUT,capture/compare mode register 1 (input mode)" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" line.long 0x4 "CCM2_OUTPUT,capture/compare mode register (output" bitfld.long 0x4 15. "OC4CEN,Output compare 4 clear enable" "0,1" bitfld.long 0x4 12.--14. "OC4MOD,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 11. "OC4PEN,Output compare 4 preload enable" "0,1" bitfld.long 0x4 10. "OC4FEN,Output compare 4 fast enable" "0,1" bitfld.long 0x4 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3" bitfld.long 0x4 7. "OC3CEN,Output compare 3 clear enable" "0,1" bitfld.long 0x4 4.--6. "OC3MOD,Output compare 3 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "OC3PEN,Output compare 3 preload enable" "0,1" bitfld.long 0x4 2. "OC3FEN,Output compare 3 fast enable" "0,1" newline bitfld.long 0x4 0.--1. "CC3SEL,Capture/Compare 3 selection" "0,1,2,3" group.long 0x1C++0x13 line.long 0x0 "CCM2_INPUT,capture/compare mode register 2 (input" hexmask.long.byte 0x0 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x0 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x0 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC3SEL,Capture/compare 3 selection" "0,1,2,3" line.long 0x4 "CCEN,capture/compare enable" bitfld.long 0x4 15. "CC4NPOL,Capture/Compare 4 output" "0,1" bitfld.long 0x4 13. "CC4POL,Capture/Compare 4 output" "0,1" bitfld.long 0x4 12. "CC4EN,Capture/Compare 4 output" "0,1" bitfld.long 0x4 11. "CC3NPOL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 9. "CC3POL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 8. "CC3EN,Capture/Compare 3 output enable" "0,1" bitfld.long 0x4 7. "CC2NPOL,Capture/Compare 2 output Polarity" "0,1" bitfld.long 0x4 5. "CC2POL,Capture/Compare 2 output" "0,1" bitfld.long 0x4 4. "CC2EN,Capture/Compare 2 output" "0,1" newline bitfld.long 0x4 3. "CC1NPOL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 1. "CC1POL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 0. "CC1EN,Capture/Compare 1 output" "0,1" line.long 0x8 "CNT,counter" hexmask.long.word 0x8 16.--31. 1. "CNT_H,Hige counter value(Only TMR2)" hexmask.long.word 0x8 0.--15. 1. "CNT_L,Low counter value" line.long 0xC "PSC,prescaler" hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value" line.long 0x10 "AUTORLD,auto-reload register" hexmask.long.word 0x10 16.--31. 1. "AUTORLD_H,Hige Auto-reload value(Only TMR2)" hexmask.long.word 0x10 0.--15. 1. "AUTORLD_L,Low Auto-reload value" group.long 0x34++0xF line.long 0x0 "CC1,capture/compare register 1" hexmask.long.word 0x0 16.--31. 1. "CC1_H,Hige Capture/Compare 1 value(Only TMR2)" hexmask.long.word 0x0 0.--15. 1. "CC1_L,Low Capture/Compare 1 value" line.long 0x4 "CC2,capture/compare register 2" hexmask.long.word 0x4 16.--31. 1. "CC2_H,Hige Capture/Compare 2 value(Only TMR2)" hexmask.long.word 0x4 0.--15. 1. "CC2_L,Low Capture/Compare 2 value" line.long 0x8 "CC3,capture/compare register 3" hexmask.long.word 0x8 16.--31. 1. "CC3_H,Hige Capture/Compare 3 value(Only TMR2)" hexmask.long.word 0x8 0.--15. 1. "CC3_L,Low Capture/Compare 3 value" line.long 0xC "CC4,capture/compare register 4" hexmask.long.word 0xC 16.--31. 1. "CC4_H,Hige Capture/Compare 4 value(Only TMR2)" hexmask.long.word 0xC 0.--15. 1. "CC4_L,Low Capture/Compare 4 value" group.long 0x48++0x7 line.long 0x0 "DCTRL,DMA control register" hexmask.long.byte 0x0 8.--12. 1. "DBLEN,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBADDR,DMA base address" line.long 0x4 "DMADDR,DMA address for full transfer" hexmask.long.word 0x4 0.--15. 1. "DMADDR,DMA register for burst" tree.end endif sif (cpuis("APM32F070*")) tree "TMR3 (General-Purpose Timer)" base ad:0x40000400 group.long 0x0++0x13 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 5.--6. "CAMSEL,Center-aligned mode" "0,1,2,3" bitfld.long 0x0 4. "CNTDIR,Direction" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 7. "TI1SEL,TI1 selection" "0,1" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA selection" "0,1" line.long 0x8 "SMCTRL,slave mode control register" bitfld.long 0x8 15. "ETPOL,External trigger polarity" "0,1" bitfld.long 0x8 14. "ECEN,External clock enable" "0,1" bitfld.long 0x8 12.--13. "ETPCFG,External trigger prescaler" "0,1,2,3" hexmask.long.byte 0x8 8.--11. 1. "ETFCFG,External trigger filter" bitfld.long 0x8 7. "MSMEN,Master/Slave mode" "0,1" bitfld.long 0x8 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7" bitfld.long 0x8 3. "OCCSEL,OCREF clear selection" "0,1" bitfld.long 0x8 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7" line.long 0xC "DIEN,DMA/Interrupt enable register" bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1" bitfld.long 0xC 12. "CC4DEN,Capture/Compare 4 DMA request" "0,1" bitfld.long 0xC 11. "CC3DEN,Capture/Compare 3 DMA request" "0,1" bitfld.long 0xC 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1" bitfld.long 0xC 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1" bitfld.long 0xC 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0xC 6. "TRGIEN,Trigger interrupt enable" "0,1" bitfld.long 0xC 4. "CC4IEN,Capture/Compare 4 interrupt" "0,1" bitfld.long 0xC 3. "CC3IEN,Capture/Compare 3 interrupt" "0,1" newline bitfld.long 0xC 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1" bitfld.long 0xC 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1" bitfld.long 0xC 0. "UIEN,Update interrupt enable" "0,1" line.long 0x10 "STS,status register" bitfld.long 0x10 12. "CC4RCFLG,Capture/Compare 4 overcapture" "0,1" bitfld.long 0x10 11. "CC3RCFLG,Capture/Compare 3 overcapture" "0,1" bitfld.long 0x10 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1" bitfld.long 0x10 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1" bitfld.long 0x10 6. "TRGIFLG,Trigger interrupt flag" "0,1" bitfld.long 0x10 4. "CC4IFLG,Capture/Compare 4 interrupt" "0,1" bitfld.long 0x10 3. "CC3IFLG,Capture/Compare 3 interrupt" "0,1" bitfld.long 0x10 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1" bitfld.long 0x10 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1" newline bitfld.long 0x10 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 6. "TEG,Trigger generation" "0,1" bitfld.long 0x0 4. "CC4EG,Capture/compare 4" "0,1" bitfld.long 0x0 3. "CC3EG,Capture/compare 3" "0,1" bitfld.long 0x0 2. "CC2EG,Capture/compare 2" "0,1" bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CCM1_OUTPUT,capture/compare mode register (output mode)" bitfld.long 0x0 15. "OC2CEN,Output Compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3" bitfld.long 0x0 7. "OC1CEN,Output Compare 1 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload enable" "0,1" bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast enable" "0,1" newline bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3" group.long 0x18++0x7 line.long 0x0 "CCM1_INPUT,capture/compare mode register 1 (input mode)" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" line.long 0x4 "CCM2_OUTPUT,capture/compare mode register (output" bitfld.long 0x4 15. "OC4CEN,Output compare 4 clear enable" "0,1" bitfld.long 0x4 12.--14. "OC4MOD,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 11. "OC4PEN,Output compare 4 preload enable" "0,1" bitfld.long 0x4 10. "OC4FEN,Output compare 4 fast enable" "0,1" bitfld.long 0x4 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3" bitfld.long 0x4 7. "OC3CEN,Output compare 3 clear enable" "0,1" bitfld.long 0x4 4.--6. "OC3MOD,Output compare 3 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "OC3PEN,Output compare 3 preload enable" "0,1" bitfld.long 0x4 2. "OC3FEN,Output compare 3 fast enable" "0,1" newline bitfld.long 0x4 0.--1. "CC3SEL,Capture/Compare 3 selection" "0,1,2,3" group.long 0x1C++0x13 line.long 0x0 "CCM2_INPUT,capture/compare mode register 2 (input" hexmask.long.byte 0x0 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x0 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x0 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC3SEL,Capture/compare 3 selection" "0,1,2,3" line.long 0x4 "CCEN,capture/compare enable" bitfld.long 0x4 15. "CC4NPOL,Capture/Compare 4 output" "0,1" bitfld.long 0x4 13. "CC4POL,Capture/Compare 4 output" "0,1" bitfld.long 0x4 12. "CC4EN,Capture/Compare 4 output" "0,1" bitfld.long 0x4 11. "CC3NPOL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 9. "CC3POL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 8. "CC3EN,Capture/Compare 3 output enable" "0,1" bitfld.long 0x4 7. "CC2NPOL,Capture/Compare 2 output Polarity" "0,1" bitfld.long 0x4 5. "CC2POL,Capture/Compare 2 output" "0,1" bitfld.long 0x4 4. "CC2EN,Capture/Compare 2 output" "0,1" newline bitfld.long 0x4 3. "CC1NPOL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 1. "CC1POL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 0. "CC1EN,Capture/Compare 1 output" "0,1" line.long 0x8 "CNT,counter" hexmask.long.word 0x8 16.--31. 1. "CNT_H,Hige counter value(Only TMR2)" hexmask.long.word 0x8 0.--15. 1. "CNT_L,Low counter value" line.long 0xC "PSC,prescaler" hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value" line.long 0x10 "AUTORLD,auto-reload register" hexmask.long.word 0x10 16.--31. 1. "AUTORLD_H,Hige Auto-reload value(Only TMR2)" hexmask.long.word 0x10 0.--15. 1. "AUTORLD_L,Low Auto-reload value" group.long 0x34++0xF line.long 0x0 "CC1,capture/compare register 1" hexmask.long.word 0x0 16.--31. 1. "CC1_H,Hige Capture/Compare 1 value(Only TMR2)" hexmask.long.word 0x0 0.--15. 1. "CC1_L,Low Capture/Compare 1 value" line.long 0x4 "CC2,capture/compare register 2" hexmask.long.word 0x4 16.--31. 1. "CC2_H,Hige Capture/Compare 2 value(Only TMR2)" hexmask.long.word 0x4 0.--15. 1. "CC2_L,Low Capture/Compare 2 value" line.long 0x8 "CC3,capture/compare register 3" hexmask.long.word 0x8 16.--31. 1. "CC3_H,Hige Capture/Compare 3 value(Only TMR2)" hexmask.long.word 0x8 0.--15. 1. "CC3_L,Low Capture/Compare 3 value" line.long 0xC "CC4,capture/compare register 4" hexmask.long.word 0xC 16.--31. 1. "CC4_H,Hige Capture/Compare 4 value(Only TMR2)" hexmask.long.word 0xC 0.--15. 1. "CC4_L,Low Capture/Compare 4 value" group.long 0x48++0x7 line.long 0x0 "DCTRL,DMA control register" hexmask.long.byte 0x0 8.--12. 1. "DBLEN,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBADDR,DMA base address" line.long 0x4 "DMADDR,DMA address for full transfer" hexmask.long.word 0x4 0.--15. 1. "DMADDR,DMA register for burst" tree.end tree "TMR7 (Basic Timer)" base ad:0x40001400 group.long 0x0++0x7 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" group.long 0xC++0x7 line.long 0x0 "DIEN,DMA/Interrupt enable register" bitfld.long 0x0 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0x0 0. "UIEN,Update interrupt enable" "0,1" line.long 0x4 "STS,status register" bitfld.long 0x4 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x24++0xB line.long 0x0 "CNT,counter" hexmask.long.word 0x0 0.--15. 1. "CNT,Low counter value" line.long 0x4 "PSC,prescaler" hexmask.long.word 0x4 0.--15. 1. "PSC,Prescaler value" line.long 0x8 "AUTORLD,auto-reload register" hexmask.long.word 0x8 0.--15. 1. "AUTORLD,Low Auto-reload value" tree.end endif sif (cpuis("APM32F071*")) tree "TMR2 (General-Purpose Timer)" base ad:0x40000000 group.long 0x0++0x13 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 5.--6. "CAMSEL,Center-aligned mode" "0,1,2,3" bitfld.long 0x0 4. "CNTDIR,Direction" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 7. "TI1SEL,TI1 selection" "0,1" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA selection" "0,1" line.long 0x8 "SMCTRL,slave mode control register" bitfld.long 0x8 15. "ETPOL,External trigger polarity" "0,1" bitfld.long 0x8 14. "ECEN,External clock enable" "0,1" bitfld.long 0x8 12.--13. "ETPCFG,External trigger prescaler" "0,1,2,3" hexmask.long.byte 0x8 8.--11. 1. "ETFCFG,External trigger filter" bitfld.long 0x8 7. "MSMEN,Master/Slave mode" "0,1" bitfld.long 0x8 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7" bitfld.long 0x8 3. "OCCSEL,OCREF clear selection" "0,1" bitfld.long 0x8 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7" line.long 0xC "DIEN,DMA/Interrupt enable register" bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1" bitfld.long 0xC 12. "CC4DEN,Capture/Compare 4 DMA request" "0,1" bitfld.long 0xC 11. "CC3DEN,Capture/Compare 3 DMA request" "0,1" bitfld.long 0xC 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1" bitfld.long 0xC 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1" bitfld.long 0xC 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0xC 6. "TRGIEN,Trigger interrupt enable" "0,1" bitfld.long 0xC 4. "CC4IEN,Capture/Compare 4 interrupt" "0,1" bitfld.long 0xC 3. "CC3IEN,Capture/Compare 3 interrupt" "0,1" newline bitfld.long 0xC 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1" bitfld.long 0xC 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1" bitfld.long 0xC 0. "UIEN,Update interrupt enable" "0,1" line.long 0x10 "STS,status register" bitfld.long 0x10 12. "CC4RCFLG,Capture/Compare 4 overcapture" "0,1" bitfld.long 0x10 11. "CC3RCFLG,Capture/Compare 3 overcapture" "0,1" bitfld.long 0x10 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1" bitfld.long 0x10 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1" bitfld.long 0x10 6. "TRGIFLG,Trigger interrupt flag" "0,1" bitfld.long 0x10 4. "CC4IFLG,Capture/Compare 4 interrupt" "0,1" bitfld.long 0x10 3. "CC3IFLG,Capture/Compare 3 interrupt" "0,1" bitfld.long 0x10 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1" bitfld.long 0x10 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1" newline bitfld.long 0x10 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 6. "TEG,Trigger generation" "0,1" bitfld.long 0x0 4. "CC4EG,Capture/compare 4" "0,1" bitfld.long 0x0 3. "CC3EG,Capture/compare 3" "0,1" bitfld.long 0x0 2. "CC2EG,Capture/compare 2" "0,1" bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CCM1_OUTPUT,capture/compare mode register (output mode)" bitfld.long 0x0 15. "OC2CEN,Output Compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3" bitfld.long 0x0 7. "OC1CEN,Output Compare 1 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload enable" "0,1" bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast enable" "0,1" newline bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3" group.long 0x18++0x7 line.long 0x0 "CCM1_INPUT,capture/compare mode register 1 (input mode)" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" line.long 0x4 "CCM2_OUTPUT,capture/compare mode register (output" bitfld.long 0x4 15. "OC4CEN,Output compare 4 clear enable" "0,1" bitfld.long 0x4 12.--14. "OC4MOD,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 11. "OC4PEN,Output compare 4 preload enable" "0,1" bitfld.long 0x4 10. "OC4FEN,Output compare 4 fast enable" "0,1" bitfld.long 0x4 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3" bitfld.long 0x4 7. "OC3CEN,Output compare 3 clear enable" "0,1" bitfld.long 0x4 4.--6. "OC3MOD,Output compare 3 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "OC3PEN,Output compare 3 preload enable" "0,1" bitfld.long 0x4 2. "OC3FEN,Output compare 3 fast enable" "0,1" newline bitfld.long 0x4 0.--1. "CC3SEL,Capture/Compare 3 selection" "0,1,2,3" group.long 0x1C++0x13 line.long 0x0 "CCM2_INPUT,capture/compare mode register 2 (input" hexmask.long.byte 0x0 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x0 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x0 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC3SEL,Capture/compare 3 selection" "0,1,2,3" line.long 0x4 "CCEN,capture/compare enable" bitfld.long 0x4 15. "CC4NPOL,Capture/Compare 4 output" "0,1" bitfld.long 0x4 13. "CC4POL,Capture/Compare 4 output" "0,1" bitfld.long 0x4 12. "CC4EN,Capture/Compare 4 output" "0,1" bitfld.long 0x4 11. "CC3NPOL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 9. "CC3POL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 8. "CC3EN,Capture/Compare 3 output enable" "0,1" bitfld.long 0x4 7. "CC2NPOL,Capture/Compare 2 output Polarity" "0,1" bitfld.long 0x4 5. "CC2POL,Capture/Compare 2 output" "0,1" bitfld.long 0x4 4. "CC2EN,Capture/Compare 2 output" "0,1" newline bitfld.long 0x4 3. "CC1NPOL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 1. "CC1POL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 0. "CC1EN,Capture/Compare 1 output" "0,1" line.long 0x8 "CNT,counter" hexmask.long.word 0x8 16.--31. 1. "CNT_H,Hige counter value(Only TMR2)" hexmask.long.word 0x8 0.--15. 1. "CNT_L,Low counter value" line.long 0xC "PSC,prescaler" hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value" line.long 0x10 "AUTORLD,auto-reload register" hexmask.long.word 0x10 16.--31. 1. "AUTORLD_H,Hige Auto-reload value(Only TMR2)" hexmask.long.word 0x10 0.--15. 1. "AUTORLD_L,Low Auto-reload value" group.long 0x34++0xF line.long 0x0 "CC1,capture/compare register 1" hexmask.long.word 0x0 16.--31. 1. "CC1_H,Hige Capture/Compare 1 value(Only TMR2)" hexmask.long.word 0x0 0.--15. 1. "CC1_L,Low Capture/Compare 1 value" line.long 0x4 "CC2,capture/compare register 2" hexmask.long.word 0x4 16.--31. 1. "CC2_H,Hige Capture/Compare 2 value(Only TMR2)" hexmask.long.word 0x4 0.--15. 1. "CC2_L,Low Capture/Compare 2 value" line.long 0x8 "CC3,capture/compare register 3" hexmask.long.word 0x8 16.--31. 1. "CC3_H,Hige Capture/Compare 3 value(Only TMR2)" hexmask.long.word 0x8 0.--15. 1. "CC3_L,Low Capture/Compare 3 value" line.long 0xC "CC4,capture/compare register 4" hexmask.long.word 0xC 16.--31. 1. "CC4_H,Hige Capture/Compare 4 value(Only TMR2)" hexmask.long.word 0xC 0.--15. 1. "CC4_L,Low Capture/Compare 4 value" group.long 0x48++0x7 line.long 0x0 "DCTRL,DMA control register" hexmask.long.byte 0x0 8.--12. 1. "DBLEN,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBADDR,DMA base address" line.long 0x4 "DMADDR,DMA address for full transfer" hexmask.long.word 0x4 0.--15. 1. "DMADDR,DMA register for burst" tree.end tree "TMR3 (General-Purpose Timer)" base ad:0x40000400 group.long 0x0++0x13 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 5.--6. "CAMSEL,Center-aligned mode" "0,1,2,3" bitfld.long 0x0 4. "CNTDIR,Direction" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 7. "TI1SEL,TI1 selection" "0,1" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA selection" "0,1" line.long 0x8 "SMCTRL,slave mode control register" bitfld.long 0x8 15. "ETPOL,External trigger polarity" "0,1" bitfld.long 0x8 14. "ECEN,External clock enable" "0,1" bitfld.long 0x8 12.--13. "ETPCFG,External trigger prescaler" "0,1,2,3" hexmask.long.byte 0x8 8.--11. 1. "ETFCFG,External trigger filter" bitfld.long 0x8 7. "MSMEN,Master/Slave mode" "0,1" bitfld.long 0x8 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7" bitfld.long 0x8 3. "OCCSEL,OCREF clear selection" "0,1" bitfld.long 0x8 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7" line.long 0xC "DIEN,DMA/Interrupt enable register" bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1" bitfld.long 0xC 12. "CC4DEN,Capture/Compare 4 DMA request" "0,1" bitfld.long 0xC 11. "CC3DEN,Capture/Compare 3 DMA request" "0,1" bitfld.long 0xC 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1" bitfld.long 0xC 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1" bitfld.long 0xC 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0xC 6. "TRGIEN,Trigger interrupt enable" "0,1" bitfld.long 0xC 4. "CC4IEN,Capture/Compare 4 interrupt" "0,1" bitfld.long 0xC 3. "CC3IEN,Capture/Compare 3 interrupt" "0,1" newline bitfld.long 0xC 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1" bitfld.long 0xC 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1" bitfld.long 0xC 0. "UIEN,Update interrupt enable" "0,1" line.long 0x10 "STS,status register" bitfld.long 0x10 12. "CC4RCFLG,Capture/Compare 4 overcapture" "0,1" bitfld.long 0x10 11. "CC3RCFLG,Capture/Compare 3 overcapture" "0,1" bitfld.long 0x10 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1" bitfld.long 0x10 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1" bitfld.long 0x10 6. "TRGIFLG,Trigger interrupt flag" "0,1" bitfld.long 0x10 4. "CC4IFLG,Capture/Compare 4 interrupt" "0,1" bitfld.long 0x10 3. "CC3IFLG,Capture/Compare 3 interrupt" "0,1" bitfld.long 0x10 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1" bitfld.long 0x10 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1" newline bitfld.long 0x10 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 6. "TEG,Trigger generation" "0,1" bitfld.long 0x0 4. "CC4EG,Capture/compare 4" "0,1" bitfld.long 0x0 3. "CC3EG,Capture/compare 3" "0,1" bitfld.long 0x0 2. "CC2EG,Capture/compare 2" "0,1" bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CCM1_OUTPUT,capture/compare mode register (output mode)" bitfld.long 0x0 15. "OC2CEN,Output Compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3" bitfld.long 0x0 7. "OC1CEN,Output Compare 1 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload enable" "0,1" bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast enable" "0,1" newline bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3" group.long 0x18++0x7 line.long 0x0 "CCM1_INPUT,capture/compare mode register 1 (input mode)" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" line.long 0x4 "CCM2_OUTPUT,capture/compare mode register (output" bitfld.long 0x4 15. "OC4CEN,Output compare 4 clear enable" "0,1" bitfld.long 0x4 12.--14. "OC4MOD,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 11. "OC4PEN,Output compare 4 preload enable" "0,1" bitfld.long 0x4 10. "OC4FEN,Output compare 4 fast enable" "0,1" bitfld.long 0x4 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3" bitfld.long 0x4 7. "OC3CEN,Output compare 3 clear enable" "0,1" bitfld.long 0x4 4.--6. "OC3MOD,Output compare 3 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "OC3PEN,Output compare 3 preload enable" "0,1" bitfld.long 0x4 2. "OC3FEN,Output compare 3 fast enable" "0,1" newline bitfld.long 0x4 0.--1. "CC3SEL,Capture/Compare 3 selection" "0,1,2,3" group.long 0x1C++0x13 line.long 0x0 "CCM2_INPUT,capture/compare mode register 2 (input" hexmask.long.byte 0x0 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x0 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x0 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC3SEL,Capture/compare 3 selection" "0,1,2,3" line.long 0x4 "CCEN,capture/compare enable" bitfld.long 0x4 15. "CC4NPOL,Capture/Compare 4 output" "0,1" bitfld.long 0x4 13. "CC4POL,Capture/Compare 4 output" "0,1" bitfld.long 0x4 12. "CC4EN,Capture/Compare 4 output" "0,1" bitfld.long 0x4 11. "CC3NPOL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 9. "CC3POL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 8. "CC3EN,Capture/Compare 3 output enable" "0,1" bitfld.long 0x4 7. "CC2NPOL,Capture/Compare 2 output Polarity" "0,1" bitfld.long 0x4 5. "CC2POL,Capture/Compare 2 output" "0,1" bitfld.long 0x4 4. "CC2EN,Capture/Compare 2 output" "0,1" newline bitfld.long 0x4 3. "CC1NPOL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 1. "CC1POL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 0. "CC1EN,Capture/Compare 1 output" "0,1" line.long 0x8 "CNT,counter" hexmask.long.word 0x8 16.--31. 1. "CNT_H,Hige counter value(Only TMR2)" hexmask.long.word 0x8 0.--15. 1. "CNT_L,Low counter value" line.long 0xC "PSC,prescaler" hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value" line.long 0x10 "AUTORLD,auto-reload register" hexmask.long.word 0x10 16.--31. 1. "AUTORLD_H,Hige Auto-reload value(Only TMR2)" hexmask.long.word 0x10 0.--15. 1. "AUTORLD_L,Low Auto-reload value" group.long 0x34++0xF line.long 0x0 "CC1,capture/compare register 1" hexmask.long.word 0x0 16.--31. 1. "CC1_H,Hige Capture/Compare 1 value(Only TMR2)" hexmask.long.word 0x0 0.--15. 1. "CC1_L,Low Capture/Compare 1 value" line.long 0x4 "CC2,capture/compare register 2" hexmask.long.word 0x4 16.--31. 1. "CC2_H,Hige Capture/Compare 2 value(Only TMR2)" hexmask.long.word 0x4 0.--15. 1. "CC2_L,Low Capture/Compare 2 value" line.long 0x8 "CC3,capture/compare register 3" hexmask.long.word 0x8 16.--31. 1. "CC3_H,Hige Capture/Compare 3 value(Only TMR2)" hexmask.long.word 0x8 0.--15. 1. "CC3_L,Low Capture/Compare 3 value" line.long 0xC "CC4,capture/compare register 4" hexmask.long.word 0xC 16.--31. 1. "CC4_H,Hige Capture/Compare 4 value(Only TMR2)" hexmask.long.word 0xC 0.--15. 1. "CC4_L,Low Capture/Compare 4 value" group.long 0x48++0x7 line.long 0x0 "DCTRL,DMA control register" hexmask.long.byte 0x0 8.--12. 1. "DBLEN,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBADDR,DMA base address" line.long 0x4 "DMADDR,DMA address for full transfer" hexmask.long.word 0x4 0.--15. 1. "DMADDR,DMA register for burst" tree.end tree "TMR6 (Basic Timer)" base ad:0x40001000 group.long 0x0++0x7 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" group.long 0xC++0x7 line.long 0x0 "DIEN,DMA/Interrupt enable register" bitfld.long 0x0 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0x0 0. "UIEN,Update interrupt enable" "0,1" line.long 0x4 "STS,status register" bitfld.long 0x4 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x24++0xB line.long 0x0 "CNT,counter" hexmask.long.word 0x0 0.--15. 1. "CNT,Low counter value" line.long 0x4 "PSC,prescaler" hexmask.long.word 0x4 0.--15. 1. "PSC,Prescaler value" line.long 0x8 "AUTORLD,auto-reload register" hexmask.long.word 0x8 0.--15. 1. "AUTORLD,Low Auto-reload value" tree.end tree "TMR7 (Basic Timer)" base ad:0x40001400 group.long 0x0++0x7 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" group.long 0xC++0x7 line.long 0x0 "DIEN,DMA/Interrupt enable register" bitfld.long 0x0 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0x0 0. "UIEN,Update interrupt enable" "0,1" line.long 0x4 "STS,status register" bitfld.long 0x4 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x24++0xB line.long 0x0 "CNT,counter" hexmask.long.word 0x0 0.--15. 1. "CNT,Low counter value" line.long 0x4 "PSC,prescaler" hexmask.long.word 0x4 0.--15. 1. "PSC,Prescaler value" line.long 0x8 "AUTORLD,auto-reload register" hexmask.long.word 0x8 0.--15. 1. "AUTORLD,Low Auto-reload value" tree.end tree "TMR15 (General-Purpose Timer)" base ad:0x40014000 group.long 0x0++0x13 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 10. "OC2OIS,Output Idle state 2" "0,1" bitfld.long 0x4 9. "OC1NOIS,Output Idle state 1" "0,1" bitfld.long 0x4 8. "OC1OIS,Output Idle state 1" "0,1" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA" "0,1" bitfld.long 0x4 2. "CCUSEL,Capture/compare control update" "0,1" bitfld.long 0x4 0. "CCPEN,Capture/compare preloaded" "0,1" line.long 0x8 "SMCTRL,slave mode control register" bitfld.long 0x8 7. "MSMEN,Master/Slave mode" "0,1" bitfld.long 0x8 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7" line.long 0xC "DIEN,DMA/Interrupt enable register" bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1" bitfld.long 0xC 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1" bitfld.long 0xC 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1" bitfld.long 0xC 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0xC 7. "BRKIEN,Break interrupt enable" "0,1" bitfld.long 0xC 6. "TRGIEN,Trigger interrupt enable" "0,1" bitfld.long 0xC 5. "COMIEN,COM interrupt enable" "0,1" bitfld.long 0xC 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1" bitfld.long 0xC 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1" bitfld.long 0xC 0. "UIEN,Update interrupt enable" "0,1" line.long 0x10 "STS,status register" bitfld.long 0x10 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1" bitfld.long 0x10 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1" bitfld.long 0x10 7. "BRKIFLG,Break interrupt flag" "0,1" bitfld.long 0x10 6. "TRGIFLG,Trigger interrupt flag" "0,1" bitfld.long 0x10 5. "COMIFLG,COM interrupt flag" "0,1" bitfld.long 0x10 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1" bitfld.long 0x10 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1" bitfld.long 0x10 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 7. "BEG,Break generation" "0,1" bitfld.long 0x0 6. "TEG,Trigger generation" "0,1" bitfld.long 0x0 5. "COMG,Capture/Compare control update" "0,1" bitfld.long 0x0 2. "CC2EG,Capture/compare 2" "0,1" bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CCM1_OUTPUT,capture/compare mode register (output" bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload" "0,1" bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast" "0,1" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2" "0,1,2,3" bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload" "0,1" bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast" "0,1" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" group.long 0x18++0x3 line.long 0x0 "CCM1_INPUT,capture/compare mode register 1 (input" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" group.long 0x20++0x1B line.long 0x0 "CCEN,capture/compare enable" bitfld.long 0x0 7. "CC2NPOL,Capture/Compare 2 output Polarity" "0,1" bitfld.long 0x0 5. "CC2POL,Capture/Compare 2 output" "0,1" bitfld.long 0x0 4. "CC2EN,Capture/Compare 2 output" "0,1" bitfld.long 0x0 3. "CC1NPOL,Capture/Compare 1 output" "0,1" bitfld.long 0x0 2. "CC1NEN,Capture/Compare 1 complementary output" "0,1" bitfld.long 0x0 1. "CC1POL,Capture/Compare 1 output" "0,1" bitfld.long 0x0 0. "CC1EN,Capture/Compare 1 output" "0,1" line.long 0x4 "CNT,counter" hexmask.long.word 0x4 0.--15. 1. "CNT,counter value" line.long 0x8 "PSC,prescaler" hexmask.long.word 0x8 0.--15. 1. "PSC,Prescaler value" line.long 0xC "AUTORLD,auto-reload register" hexmask.long.word 0xC 0.--15. 1. "AUTORLD,Auto-reload value" line.long 0x10 "REPCNT,repetition counter register" hexmask.long.byte 0x10 0.--7. 1. "REPCNT,Repetition counter value" line.long 0x14 "CC1,capture/compare register 1" hexmask.long.word 0x14 0.--15. 1. "CC1,Capture/Compare 1 value" line.long 0x18 "CC2,capture/compare register 2" hexmask.long.word 0x18 0.--15. 1. "CC2,Capture/Compare 2 value" group.long 0x44++0xB line.long 0x0 "BDT,break and dead-time register" bitfld.long 0x0 15. "MOEN,Main output enable" "0,1" bitfld.long 0x0 14. "AOEN,Automatic output enable" "0,1" bitfld.long 0x0 13. "BRKPOL,Break polarity" "0,1" bitfld.long 0x0 12. "BRKEN,Break enable" "0,1" bitfld.long 0x0 11. "RMOS,Off-state selection for Run" "0,1" bitfld.long 0x0 10. "IMOS,Off-state selection for Idle" "0,1" bitfld.long 0x0 8.--9. "LOCKCFG,Lock configuration" "0,1,2,3" hexmask.long.byte 0x0 0.--7. 1. "DTS,Dead-time generator setup" line.long 0x4 "DCTRL,DMA control register" hexmask.long.byte 0x4 8.--12. 1. "DBLEN,DMA burst length" hexmask.long.byte 0x4 0.--4. 1. "DBADDR,DMA base address" line.long 0x8 "DMADDR,DMA address for full transfer" hexmask.long.word 0x8 0.--15. 1. "DMADDR,DMA register for burst" tree.end endif sif (cpuis("APM32F072*")) tree "TMR2 (General-Purpose Timer)" base ad:0x40000000 group.long 0x0++0x13 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 5.--6. "CAMSEL,Center-aligned mode" "0,1,2,3" bitfld.long 0x0 4. "CNTDIR,Direction" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 7. "TI1SEL,TI1 selection" "0,1" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA selection" "0,1" line.long 0x8 "SMCTRL,slave mode control register" bitfld.long 0x8 15. "ETPOL,External trigger polarity" "0,1" bitfld.long 0x8 14. "ECEN,External clock enable" "0,1" bitfld.long 0x8 12.--13. "ETPCFG,External trigger prescaler" "0,1,2,3" hexmask.long.byte 0x8 8.--11. 1. "ETFCFG,External trigger filter" bitfld.long 0x8 7. "MSMEN,Master/Slave mode" "0,1" bitfld.long 0x8 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7" bitfld.long 0x8 3. "OCCSEL,OCREF clear selection" "0,1" bitfld.long 0x8 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7" line.long 0xC "DIEN,DMA/Interrupt enable register" bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1" bitfld.long 0xC 12. "CC4DEN,Capture/Compare 4 DMA request" "0,1" bitfld.long 0xC 11. "CC3DEN,Capture/Compare 3 DMA request" "0,1" bitfld.long 0xC 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1" bitfld.long 0xC 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1" bitfld.long 0xC 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0xC 6. "TRGIEN,Trigger interrupt enable" "0,1" bitfld.long 0xC 4. "CC4IEN,Capture/Compare 4 interrupt" "0,1" bitfld.long 0xC 3. "CC3IEN,Capture/Compare 3 interrupt" "0,1" newline bitfld.long 0xC 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1" bitfld.long 0xC 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1" bitfld.long 0xC 0. "UIEN,Update interrupt enable" "0,1" line.long 0x10 "STS,status register" bitfld.long 0x10 12. "CC4RCFLG,Capture/Compare 4 overcapture" "0,1" bitfld.long 0x10 11. "CC3RCFLG,Capture/Compare 3 overcapture" "0,1" bitfld.long 0x10 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1" bitfld.long 0x10 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1" bitfld.long 0x10 6. "TRGIFLG,Trigger interrupt flag" "0,1" bitfld.long 0x10 4. "CC4IFLG,Capture/Compare 4 interrupt" "0,1" bitfld.long 0x10 3. "CC3IFLG,Capture/Compare 3 interrupt" "0,1" bitfld.long 0x10 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1" bitfld.long 0x10 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1" newline bitfld.long 0x10 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 6. "TEG,Trigger generation" "0,1" bitfld.long 0x0 4. "CC4EG,Capture/compare 4" "0,1" bitfld.long 0x0 3. "CC3EG,Capture/compare 3" "0,1" bitfld.long 0x0 2. "CC2EG,Capture/compare 2" "0,1" bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CCM1_OUTPUT,capture/compare mode register (output mode)" bitfld.long 0x0 15. "OC2CEN,Output Compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3" bitfld.long 0x0 7. "OC1CEN,Output Compare 1 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload enable" "0,1" bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast enable" "0,1" newline bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3" group.long 0x18++0x7 line.long 0x0 "CCM1_INPUT,capture/compare mode register 1 (input mode)" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" line.long 0x4 "CCM2_OUTPUT,capture/compare mode register (output" bitfld.long 0x4 15. "OC4CEN,Output compare 4 clear enable" "0,1" bitfld.long 0x4 12.--14. "OC4MOD,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 11. "OC4PEN,Output compare 4 preload enable" "0,1" bitfld.long 0x4 10. "OC4FEN,Output compare 4 fast enable" "0,1" bitfld.long 0x4 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3" bitfld.long 0x4 7. "OC3CEN,Output compare 3 clear enable" "0,1" bitfld.long 0x4 4.--6. "OC3MOD,Output compare 3 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "OC3PEN,Output compare 3 preload enable" "0,1" bitfld.long 0x4 2. "OC3FEN,Output compare 3 fast enable" "0,1" newline bitfld.long 0x4 0.--1. "CC3SEL,Capture/Compare 3 selection" "0,1,2,3" group.long 0x1C++0x13 line.long 0x0 "CCM2_INPUT,capture/compare mode register 2 (input" hexmask.long.byte 0x0 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x0 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x0 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC3SEL,Capture/compare 3 selection" "0,1,2,3" line.long 0x4 "CCEN,capture/compare enable" bitfld.long 0x4 15. "CC4NPOL,Capture/Compare 4 output" "0,1" bitfld.long 0x4 13. "CC4POL,Capture/Compare 4 output" "0,1" bitfld.long 0x4 12. "CC4EN,Capture/Compare 4 output" "0,1" bitfld.long 0x4 11. "CC3NPOL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 9. "CC3POL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 8. "CC3EN,Capture/Compare 3 output enable" "0,1" bitfld.long 0x4 7. "CC2NPOL,Capture/Compare 2 output Polarity" "0,1" bitfld.long 0x4 5. "CC2POL,Capture/Compare 2 output" "0,1" bitfld.long 0x4 4. "CC2EN,Capture/Compare 2 output" "0,1" newline bitfld.long 0x4 3. "CC1NPOL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 1. "CC1POL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 0. "CC1EN,Capture/Compare 1 output" "0,1" line.long 0x8 "CNT,counter" hexmask.long.word 0x8 16.--31. 1. "CNT_H,Hige counter value(Only TMR2)" hexmask.long.word 0x8 0.--15. 1. "CNT_L,Low counter value" line.long 0xC "PSC,prescaler" hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value" line.long 0x10 "AUTORLD,auto-reload register" hexmask.long.word 0x10 16.--31. 1. "AUTORLD_H,Hige Auto-reload value(Only TMR2)" hexmask.long.word 0x10 0.--15. 1. "AUTORLD_L,Low Auto-reload value" group.long 0x34++0xF line.long 0x0 "CC1,capture/compare register 1" hexmask.long.word 0x0 16.--31. 1. "CC1_H,Hige Capture/Compare 1 value(Only TMR2)" hexmask.long.word 0x0 0.--15. 1. "CC1_L,Low Capture/Compare 1 value" line.long 0x4 "CC2,capture/compare register 2" hexmask.long.word 0x4 16.--31. 1. "CC2_H,Hige Capture/Compare 2 value(Only TMR2)" hexmask.long.word 0x4 0.--15. 1. "CC2_L,Low Capture/Compare 2 value" line.long 0x8 "CC3,capture/compare register 3" hexmask.long.word 0x8 16.--31. 1. "CC3_H,Hige Capture/Compare 3 value(Only TMR2)" hexmask.long.word 0x8 0.--15. 1. "CC3_L,Low Capture/Compare 3 value" line.long 0xC "CC4,capture/compare register 4" hexmask.long.word 0xC 16.--31. 1. "CC4_H,Hige Capture/Compare 4 value(Only TMR2)" hexmask.long.word 0xC 0.--15. 1. "CC4_L,Low Capture/Compare 4 value" group.long 0x48++0x7 line.long 0x0 "DCTRL,DMA control register" hexmask.long.byte 0x0 8.--12. 1. "DBLEN,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBADDR,DMA base address" line.long 0x4 "DMADDR,DMA address for full transfer" hexmask.long.word 0x4 0.--15. 1. "DMADDR,DMA register for burst" tree.end tree "TMR3 (General-Purpose Timer)" base ad:0x40000400 group.long 0x0++0x13 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 5.--6. "CAMSEL,Center-aligned mode" "0,1,2,3" bitfld.long 0x0 4. "CNTDIR,Direction" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 7. "TI1SEL,TI1 selection" "0,1" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA selection" "0,1" line.long 0x8 "SMCTRL,slave mode control register" bitfld.long 0x8 15. "ETPOL,External trigger polarity" "0,1" bitfld.long 0x8 14. "ECEN,External clock enable" "0,1" bitfld.long 0x8 12.--13. "ETPCFG,External trigger prescaler" "0,1,2,3" hexmask.long.byte 0x8 8.--11. 1. "ETFCFG,External trigger filter" bitfld.long 0x8 7. "MSMEN,Master/Slave mode" "0,1" bitfld.long 0x8 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7" bitfld.long 0x8 3. "OCCSEL,OCREF clear selection" "0,1" bitfld.long 0x8 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7" line.long 0xC "DIEN,DMA/Interrupt enable register" bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1" bitfld.long 0xC 12. "CC4DEN,Capture/Compare 4 DMA request" "0,1" bitfld.long 0xC 11. "CC3DEN,Capture/Compare 3 DMA request" "0,1" bitfld.long 0xC 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1" bitfld.long 0xC 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1" bitfld.long 0xC 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0xC 6. "TRGIEN,Trigger interrupt enable" "0,1" bitfld.long 0xC 4. "CC4IEN,Capture/Compare 4 interrupt" "0,1" bitfld.long 0xC 3. "CC3IEN,Capture/Compare 3 interrupt" "0,1" newline bitfld.long 0xC 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1" bitfld.long 0xC 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1" bitfld.long 0xC 0. "UIEN,Update interrupt enable" "0,1" line.long 0x10 "STS,status register" bitfld.long 0x10 12. "CC4RCFLG,Capture/Compare 4 overcapture" "0,1" bitfld.long 0x10 11. "CC3RCFLG,Capture/Compare 3 overcapture" "0,1" bitfld.long 0x10 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1" bitfld.long 0x10 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1" bitfld.long 0x10 6. "TRGIFLG,Trigger interrupt flag" "0,1" bitfld.long 0x10 4. "CC4IFLG,Capture/Compare 4 interrupt" "0,1" bitfld.long 0x10 3. "CC3IFLG,Capture/Compare 3 interrupt" "0,1" bitfld.long 0x10 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1" bitfld.long 0x10 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1" newline bitfld.long 0x10 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 6. "TEG,Trigger generation" "0,1" bitfld.long 0x0 4. "CC4EG,Capture/compare 4" "0,1" bitfld.long 0x0 3. "CC3EG,Capture/compare 3" "0,1" bitfld.long 0x0 2. "CC2EG,Capture/compare 2" "0,1" bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CCM1_OUTPUT,capture/compare mode register (output mode)" bitfld.long 0x0 15. "OC2CEN,Output Compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3" bitfld.long 0x0 7. "OC1CEN,Output Compare 1 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload enable" "0,1" bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast enable" "0,1" newline bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3" group.long 0x18++0x7 line.long 0x0 "CCM1_INPUT,capture/compare mode register 1 (input mode)" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" line.long 0x4 "CCM2_OUTPUT,capture/compare mode register (output" bitfld.long 0x4 15. "OC4CEN,Output compare 4 clear enable" "0,1" bitfld.long 0x4 12.--14. "OC4MOD,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 11. "OC4PEN,Output compare 4 preload enable" "0,1" bitfld.long 0x4 10. "OC4FEN,Output compare 4 fast enable" "0,1" bitfld.long 0x4 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3" bitfld.long 0x4 7. "OC3CEN,Output compare 3 clear enable" "0,1" bitfld.long 0x4 4.--6. "OC3MOD,Output compare 3 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "OC3PEN,Output compare 3 preload enable" "0,1" bitfld.long 0x4 2. "OC3FEN,Output compare 3 fast enable" "0,1" newline bitfld.long 0x4 0.--1. "CC3SEL,Capture/Compare 3 selection" "0,1,2,3" group.long 0x1C++0x13 line.long 0x0 "CCM2_INPUT,capture/compare mode register 2 (input" hexmask.long.byte 0x0 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x0 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x0 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC3SEL,Capture/compare 3 selection" "0,1,2,3" line.long 0x4 "CCEN,capture/compare enable" bitfld.long 0x4 15. "CC4NPOL,Capture/Compare 4 output" "0,1" bitfld.long 0x4 13. "CC4POL,Capture/Compare 4 output" "0,1" bitfld.long 0x4 12. "CC4EN,Capture/Compare 4 output" "0,1" bitfld.long 0x4 11. "CC3NPOL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 9. "CC3POL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 8. "CC3EN,Capture/Compare 3 output enable" "0,1" bitfld.long 0x4 7. "CC2NPOL,Capture/Compare 2 output Polarity" "0,1" bitfld.long 0x4 5. "CC2POL,Capture/Compare 2 output" "0,1" bitfld.long 0x4 4. "CC2EN,Capture/Compare 2 output" "0,1" newline bitfld.long 0x4 3. "CC1NPOL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 1. "CC1POL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 0. "CC1EN,Capture/Compare 1 output" "0,1" line.long 0x8 "CNT,counter" hexmask.long.word 0x8 16.--31. 1. "CNT_H,Hige counter value(Only TMR2)" hexmask.long.word 0x8 0.--15. 1. "CNT_L,Low counter value" line.long 0xC "PSC,prescaler" hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value" line.long 0x10 "AUTORLD,auto-reload register" hexmask.long.word 0x10 16.--31. 1. "AUTORLD_H,Hige Auto-reload value(Only TMR2)" hexmask.long.word 0x10 0.--15. 1. "AUTORLD_L,Low Auto-reload value" group.long 0x34++0xF line.long 0x0 "CC1,capture/compare register 1" hexmask.long.word 0x0 16.--31. 1. "CC1_H,Hige Capture/Compare 1 value(Only TMR2)" hexmask.long.word 0x0 0.--15. 1. "CC1_L,Low Capture/Compare 1 value" line.long 0x4 "CC2,capture/compare register 2" hexmask.long.word 0x4 16.--31. 1. "CC2_H,Hige Capture/Compare 2 value(Only TMR2)" hexmask.long.word 0x4 0.--15. 1. "CC2_L,Low Capture/Compare 2 value" line.long 0x8 "CC3,capture/compare register 3" hexmask.long.word 0x8 16.--31. 1. "CC3_H,Hige Capture/Compare 3 value(Only TMR2)" hexmask.long.word 0x8 0.--15. 1. "CC3_L,Low Capture/Compare 3 value" line.long 0xC "CC4,capture/compare register 4" hexmask.long.word 0xC 16.--31. 1. "CC4_H,Hige Capture/Compare 4 value(Only TMR2)" hexmask.long.word 0xC 0.--15. 1. "CC4_L,Low Capture/Compare 4 value" group.long 0x48++0x7 line.long 0x0 "DCTRL,DMA control register" hexmask.long.byte 0x0 8.--12. 1. "DBLEN,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBADDR,DMA base address" line.long 0x4 "DMADDR,DMA address for full transfer" hexmask.long.word 0x4 0.--15. 1. "DMADDR,DMA register for burst" tree.end tree "TMR6 (Basic Timer)" base ad:0x40001000 group.long 0x0++0x7 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" group.long 0xC++0x7 line.long 0x0 "DIEN,DMA/Interrupt enable register" bitfld.long 0x0 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0x0 0. "UIEN,Update interrupt enable" "0,1" line.long 0x4 "STS,status register" bitfld.long 0x4 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x24++0xB line.long 0x0 "CNT,counter" hexmask.long.word 0x0 0.--15. 1. "CNT,Low counter value" line.long 0x4 "PSC,prescaler" hexmask.long.word 0x4 0.--15. 1. "PSC,Prescaler value" line.long 0x8 "AUTORLD,auto-reload register" hexmask.long.word 0x8 0.--15. 1. "AUTORLD,Low Auto-reload value" tree.end tree "TMR7 (Basic Timer)" base ad:0x40001400 group.long 0x0++0x7 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" group.long 0xC++0x7 line.long 0x0 "DIEN,DMA/Interrupt enable register" bitfld.long 0x0 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0x0 0. "UIEN,Update interrupt enable" "0,1" line.long 0x4 "STS,status register" bitfld.long 0x4 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x24++0xB line.long 0x0 "CNT,counter" hexmask.long.word 0x0 0.--15. 1. "CNT,Low counter value" line.long 0x4 "PSC,prescaler" hexmask.long.word 0x4 0.--15. 1. "PSC,Prescaler value" line.long 0x8 "AUTORLD,auto-reload register" hexmask.long.word 0x8 0.--15. 1. "AUTORLD,Low Auto-reload value" tree.end tree "TMR15 (General-Purpose Timer)" base ad:0x40014000 group.long 0x0++0x13 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 10. "OC2OIS,Output Idle state 2" "0,1" bitfld.long 0x4 9. "OC1NOIS,Output Idle state 1" "0,1" bitfld.long 0x4 8. "OC1OIS,Output Idle state 1" "0,1" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA" "0,1" bitfld.long 0x4 2. "CCUSEL,Capture/compare control update" "0,1" bitfld.long 0x4 0. "CCPEN,Capture/compare preloaded" "0,1" line.long 0x8 "SMCTRL,slave mode control register" bitfld.long 0x8 7. "MSMEN,Master/Slave mode" "0,1" bitfld.long 0x8 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7" line.long 0xC "DIEN,DMA/Interrupt enable register" bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1" bitfld.long 0xC 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1" bitfld.long 0xC 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1" bitfld.long 0xC 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0xC 7. "BRKIEN,Break interrupt enable" "0,1" bitfld.long 0xC 6. "TRGIEN,Trigger interrupt enable" "0,1" bitfld.long 0xC 5. "COMIEN,COM interrupt enable" "0,1" bitfld.long 0xC 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1" bitfld.long 0xC 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1" bitfld.long 0xC 0. "UIEN,Update interrupt enable" "0,1" line.long 0x10 "STS,status register" bitfld.long 0x10 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1" bitfld.long 0x10 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1" bitfld.long 0x10 7. "BRKIFLG,Break interrupt flag" "0,1" bitfld.long 0x10 6. "TRGIFLG,Trigger interrupt flag" "0,1" bitfld.long 0x10 5. "COMIFLG,COM interrupt flag" "0,1" bitfld.long 0x10 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1" bitfld.long 0x10 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1" bitfld.long 0x10 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 7. "BEG,Break generation" "0,1" bitfld.long 0x0 6. "TEG,Trigger generation" "0,1" bitfld.long 0x0 5. "COMG,Capture/Compare control update" "0,1" bitfld.long 0x0 2. "CC2EG,Capture/compare 2" "0,1" bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CCM1_OUTPUT,capture/compare mode register (output" bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload" "0,1" bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast" "0,1" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2" "0,1,2,3" bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload" "0,1" bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast" "0,1" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" group.long 0x18++0x3 line.long 0x0 "CCM1_INPUT,capture/compare mode register 1 (input" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" group.long 0x20++0x1B line.long 0x0 "CCEN,capture/compare enable" bitfld.long 0x0 7. "CC2NPOL,Capture/Compare 2 output Polarity" "0,1" bitfld.long 0x0 5. "CC2POL,Capture/Compare 2 output" "0,1" bitfld.long 0x0 4. "CC2EN,Capture/Compare 2 output" "0,1" bitfld.long 0x0 3. "CC1NPOL,Capture/Compare 1 output" "0,1" bitfld.long 0x0 2. "CC1NEN,Capture/Compare 1 complementary output" "0,1" bitfld.long 0x0 1. "CC1POL,Capture/Compare 1 output" "0,1" bitfld.long 0x0 0. "CC1EN,Capture/Compare 1 output" "0,1" line.long 0x4 "CNT,counter" hexmask.long.word 0x4 0.--15. 1. "CNT,counter value" line.long 0x8 "PSC,prescaler" hexmask.long.word 0x8 0.--15. 1. "PSC,Prescaler value" line.long 0xC "AUTORLD,auto-reload register" hexmask.long.word 0xC 0.--15. 1. "AUTORLD,Auto-reload value" line.long 0x10 "REPCNT,repetition counter register" hexmask.long.byte 0x10 0.--7. 1. "REPCNT,Repetition counter value" line.long 0x14 "CC1,capture/compare register 1" hexmask.long.word 0x14 0.--15. 1. "CC1,Capture/Compare 1 value" line.long 0x18 "CC2,capture/compare register 2" hexmask.long.word 0x18 0.--15. 1. "CC2,Capture/Compare 2 value" group.long 0x44++0xB line.long 0x0 "BDT,break and dead-time register" bitfld.long 0x0 15. "MOEN,Main output enable" "0,1" bitfld.long 0x0 14. "AOEN,Automatic output enable" "0,1" bitfld.long 0x0 13. "BRKPOL,Break polarity" "0,1" bitfld.long 0x0 12. "BRKEN,Break enable" "0,1" bitfld.long 0x0 11. "RMOS,Off-state selection for Run" "0,1" bitfld.long 0x0 10. "IMOS,Off-state selection for Idle" "0,1" bitfld.long 0x0 8.--9. "LOCKCFG,Lock configuration" "0,1,2,3" hexmask.long.byte 0x0 0.--7. 1. "DTS,Dead-time generator setup" line.long 0x4 "DCTRL,DMA control register" hexmask.long.byte 0x4 8.--12. 1. "DBLEN,DMA burst length" hexmask.long.byte 0x4 0.--4. 1. "DBADDR,DMA base address" line.long 0x8 "DMADDR,DMA address for full transfer" hexmask.long.word 0x8 0.--15. 1. "DMADDR,DMA register for burst" tree.end endif sif (cpuis("APM32F091*")) tree "TMR2 (General-Purpose Timer)" base ad:0x40000000 group.long 0x0++0x13 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 5.--6. "CAMSEL,Center-aligned mode" "0,1,2,3" bitfld.long 0x0 4. "CNTDIR,Direction" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 7. "TI1SEL,TI1 selection" "0,1" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA selection" "0,1" line.long 0x8 "SMCTRL,slave mode control register" bitfld.long 0x8 15. "ETPOL,External trigger polarity" "0,1" bitfld.long 0x8 14. "ECEN,External clock enable" "0,1" bitfld.long 0x8 12.--13. "ETPCFG,External trigger prescaler" "0,1,2,3" hexmask.long.byte 0x8 8.--11. 1. "ETFCFG,External trigger filter" bitfld.long 0x8 7. "MSMEN,Master/Slave mode" "0,1" bitfld.long 0x8 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7" bitfld.long 0x8 3. "OCCSEL,OCREF clear selection" "0,1" bitfld.long 0x8 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7" line.long 0xC "DIEN,DMA/Interrupt enable register" bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1" bitfld.long 0xC 12. "CC4DEN,Capture/Compare 4 DMA request" "0,1" bitfld.long 0xC 11. "CC3DEN,Capture/Compare 3 DMA request" "0,1" bitfld.long 0xC 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1" bitfld.long 0xC 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1" bitfld.long 0xC 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0xC 6. "TRGIEN,Trigger interrupt enable" "0,1" bitfld.long 0xC 4. "CC4IEN,Capture/Compare 4 interrupt" "0,1" bitfld.long 0xC 3. "CC3IEN,Capture/Compare 3 interrupt" "0,1" newline bitfld.long 0xC 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1" bitfld.long 0xC 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1" bitfld.long 0xC 0. "UIEN,Update interrupt enable" "0,1" line.long 0x10 "STS,status register" bitfld.long 0x10 12. "CC4RCFLG,Capture/Compare 4 overcapture" "0,1" bitfld.long 0x10 11. "CC3RCFLG,Capture/Compare 3 overcapture" "0,1" bitfld.long 0x10 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1" bitfld.long 0x10 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1" bitfld.long 0x10 6. "TRGIFLG,Trigger interrupt flag" "0,1" bitfld.long 0x10 4. "CC4IFLG,Capture/Compare 4 interrupt" "0,1" bitfld.long 0x10 3. "CC3IFLG,Capture/Compare 3 interrupt" "0,1" bitfld.long 0x10 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1" bitfld.long 0x10 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1" newline bitfld.long 0x10 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 6. "TEG,Trigger generation" "0,1" bitfld.long 0x0 4. "CC4EG,Capture/compare 4" "0,1" bitfld.long 0x0 3. "CC3EG,Capture/compare 3" "0,1" bitfld.long 0x0 2. "CC2EG,Capture/compare 2" "0,1" bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CCM1_OUTPUT,capture/compare mode register (output mode)" bitfld.long 0x0 15. "OC2CEN,Output Compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3" bitfld.long 0x0 7. "OC1CEN,Output Compare 1 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload enable" "0,1" bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast enable" "0,1" newline bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3" group.long 0x18++0x7 line.long 0x0 "CCM1_INPUT,capture/compare mode register 1 (input mode)" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" line.long 0x4 "CCM2_OUTPUT,capture/compare mode register (output" bitfld.long 0x4 15. "OC4CEN,Output compare 4 clear enable" "0,1" bitfld.long 0x4 12.--14. "OC4MOD,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 11. "OC4PEN,Output compare 4 preload enable" "0,1" bitfld.long 0x4 10. "OC4FEN,Output compare 4 fast enable" "0,1" bitfld.long 0x4 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3" bitfld.long 0x4 7. "OC3CEN,Output compare 3 clear enable" "0,1" bitfld.long 0x4 4.--6. "OC3MOD,Output compare 3 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "OC3PEN,Output compare 3 preload enable" "0,1" bitfld.long 0x4 2. "OC3FEN,Output compare 3 fast enable" "0,1" newline bitfld.long 0x4 0.--1. "CC3SEL,Capture/Compare 3 selection" "0,1,2,3" group.long 0x1C++0x13 line.long 0x0 "CCM2_INPUT,capture/compare mode register 2 (input" hexmask.long.byte 0x0 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x0 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x0 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC3SEL,Capture/compare 3 selection" "0,1,2,3" line.long 0x4 "CCEN,capture/compare enable" bitfld.long 0x4 15. "CC4NPOL,Capture/Compare 4 output" "0,1" bitfld.long 0x4 13. "CC4POL,Capture/Compare 4 output" "0,1" bitfld.long 0x4 12. "CC4EN,Capture/Compare 4 output" "0,1" bitfld.long 0x4 11. "CC3NPOL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 9. "CC3POL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 8. "CC3EN,Capture/Compare 3 output enable" "0,1" bitfld.long 0x4 7. "CC2NPOL,Capture/Compare 2 output Polarity" "0,1" bitfld.long 0x4 5. "CC2POL,Capture/Compare 2 output" "0,1" bitfld.long 0x4 4. "CC2EN,Capture/Compare 2 output" "0,1" newline bitfld.long 0x4 3. "CC1NPOL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 1. "CC1POL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 0. "CC1EN,Capture/Compare 1 output" "0,1" line.long 0x8 "CNT,counter" hexmask.long.word 0x8 16.--31. 1. "CNT_H,Hige counter value(Only TMR2)" hexmask.long.word 0x8 0.--15. 1. "CNT_L,Low counter value" line.long 0xC "PSC,prescaler" hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value" line.long 0x10 "AUTORLD,auto-reload register" hexmask.long.word 0x10 16.--31. 1. "AUTORLD_H,Hige Auto-reload value(Only TMR2)" hexmask.long.word 0x10 0.--15. 1. "AUTORLD_L,Low Auto-reload value" group.long 0x34++0xF line.long 0x0 "CC1,capture/compare register 1" hexmask.long.word 0x0 16.--31. 1. "CC1_H,Hige Capture/Compare 1 value(Only TMR2)" hexmask.long.word 0x0 0.--15. 1. "CC1_L,Low Capture/Compare 1 value" line.long 0x4 "CC2,capture/compare register 2" hexmask.long.word 0x4 16.--31. 1. "CC2_H,Hige Capture/Compare 2 value(Only TMR2)" hexmask.long.word 0x4 0.--15. 1. "CC2_L,Low Capture/Compare 2 value" line.long 0x8 "CC3,capture/compare register 3" hexmask.long.word 0x8 16.--31. 1. "CC3_H,Hige Capture/Compare 3 value(Only TMR2)" hexmask.long.word 0x8 0.--15. 1. "CC3_L,Low Capture/Compare 3 value" line.long 0xC "CC4,capture/compare register 4" hexmask.long.word 0xC 16.--31. 1. "CC4_H,Hige Capture/Compare 4 value(Only TMR2)" hexmask.long.word 0xC 0.--15. 1. "CC4_L,Low Capture/Compare 4 value" group.long 0x48++0x7 line.long 0x0 "DCTRL,DMA control register" hexmask.long.byte 0x0 8.--12. 1. "DBLEN,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBADDR,DMA base address" line.long 0x4 "DMADDR,DMA address for full transfer" hexmask.long.word 0x4 0.--15. 1. "DMADDR,DMA register for burst" tree.end tree "TMR3 (General-Purpose Timer)" base ad:0x40000400 group.long 0x0++0x13 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 5.--6. "CAMSEL,Center-aligned mode" "0,1,2,3" bitfld.long 0x0 4. "CNTDIR,Direction" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 7. "TI1SEL,TI1 selection" "0,1" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA selection" "0,1" line.long 0x8 "SMCTRL,slave mode control register" bitfld.long 0x8 15. "ETPOL,External trigger polarity" "0,1" bitfld.long 0x8 14. "ECEN,External clock enable" "0,1" bitfld.long 0x8 12.--13. "ETPCFG,External trigger prescaler" "0,1,2,3" hexmask.long.byte 0x8 8.--11. 1. "ETFCFG,External trigger filter" bitfld.long 0x8 7. "MSMEN,Master/Slave mode" "0,1" bitfld.long 0x8 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7" bitfld.long 0x8 3. "OCCSEL,OCREF clear selection" "0,1" bitfld.long 0x8 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7" line.long 0xC "DIEN,DMA/Interrupt enable register" bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1" bitfld.long 0xC 12. "CC4DEN,Capture/Compare 4 DMA request" "0,1" bitfld.long 0xC 11. "CC3DEN,Capture/Compare 3 DMA request" "0,1" bitfld.long 0xC 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1" bitfld.long 0xC 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1" bitfld.long 0xC 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0xC 6. "TRGIEN,Trigger interrupt enable" "0,1" bitfld.long 0xC 4. "CC4IEN,Capture/Compare 4 interrupt" "0,1" bitfld.long 0xC 3. "CC3IEN,Capture/Compare 3 interrupt" "0,1" newline bitfld.long 0xC 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1" bitfld.long 0xC 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1" bitfld.long 0xC 0. "UIEN,Update interrupt enable" "0,1" line.long 0x10 "STS,status register" bitfld.long 0x10 12. "CC4RCFLG,Capture/Compare 4 overcapture" "0,1" bitfld.long 0x10 11. "CC3RCFLG,Capture/Compare 3 overcapture" "0,1" bitfld.long 0x10 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1" bitfld.long 0x10 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1" bitfld.long 0x10 6. "TRGIFLG,Trigger interrupt flag" "0,1" bitfld.long 0x10 4. "CC4IFLG,Capture/Compare 4 interrupt" "0,1" bitfld.long 0x10 3. "CC3IFLG,Capture/Compare 3 interrupt" "0,1" bitfld.long 0x10 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1" bitfld.long 0x10 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1" newline bitfld.long 0x10 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 6. "TEG,Trigger generation" "0,1" bitfld.long 0x0 4. "CC4EG,Capture/compare 4" "0,1" bitfld.long 0x0 3. "CC3EG,Capture/compare 3" "0,1" bitfld.long 0x0 2. "CC2EG,Capture/compare 2" "0,1" bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CCM1_OUTPUT,capture/compare mode register (output mode)" bitfld.long 0x0 15. "OC2CEN,Output Compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3" bitfld.long 0x0 7. "OC1CEN,Output Compare 1 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload enable" "0,1" bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast enable" "0,1" newline bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3" group.long 0x18++0x7 line.long 0x0 "CCM1_INPUT,capture/compare mode register 1 (input mode)" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" line.long 0x4 "CCM2_OUTPUT,capture/compare mode register (output" bitfld.long 0x4 15. "OC4CEN,Output compare 4 clear enable" "0,1" bitfld.long 0x4 12.--14. "OC4MOD,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 11. "OC4PEN,Output compare 4 preload enable" "0,1" bitfld.long 0x4 10. "OC4FEN,Output compare 4 fast enable" "0,1" bitfld.long 0x4 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3" bitfld.long 0x4 7. "OC3CEN,Output compare 3 clear enable" "0,1" bitfld.long 0x4 4.--6. "OC3MOD,Output compare 3 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "OC3PEN,Output compare 3 preload enable" "0,1" bitfld.long 0x4 2. "OC3FEN,Output compare 3 fast enable" "0,1" newline bitfld.long 0x4 0.--1. "CC3SEL,Capture/Compare 3 selection" "0,1,2,3" group.long 0x1C++0x13 line.long 0x0 "CCM2_INPUT,capture/compare mode register 2 (input" hexmask.long.byte 0x0 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x0 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x0 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC3SEL,Capture/compare 3 selection" "0,1,2,3" line.long 0x4 "CCEN,capture/compare enable" bitfld.long 0x4 15. "CC4NPOL,Capture/Compare 4 output" "0,1" bitfld.long 0x4 13. "CC4POL,Capture/Compare 4 output" "0,1" bitfld.long 0x4 12. "CC4EN,Capture/Compare 4 output" "0,1" bitfld.long 0x4 11. "CC3NPOL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 9. "CC3POL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 8. "CC3EN,Capture/Compare 3 output enable" "0,1" bitfld.long 0x4 7. "CC2NPOL,Capture/Compare 2 output Polarity" "0,1" bitfld.long 0x4 5. "CC2POL,Capture/Compare 2 output" "0,1" bitfld.long 0x4 4. "CC2EN,Capture/Compare 2 output" "0,1" newline bitfld.long 0x4 3. "CC1NPOL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 1. "CC1POL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 0. "CC1EN,Capture/Compare 1 output" "0,1" line.long 0x8 "CNT,counter" hexmask.long.word 0x8 16.--31. 1. "CNT_H,Hige counter value(Only TMR2)" hexmask.long.word 0x8 0.--15. 1. "CNT_L,Low counter value" line.long 0xC "PSC,prescaler" hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value" line.long 0x10 "AUTORLD,auto-reload register" hexmask.long.word 0x10 16.--31. 1. "AUTORLD_H,Hige Auto-reload value(Only TMR2)" hexmask.long.word 0x10 0.--15. 1. "AUTORLD_L,Low Auto-reload value" group.long 0x34++0xF line.long 0x0 "CC1,capture/compare register 1" hexmask.long.word 0x0 16.--31. 1. "CC1_H,Hige Capture/Compare 1 value(Only TMR2)" hexmask.long.word 0x0 0.--15. 1. "CC1_L,Low Capture/Compare 1 value" line.long 0x4 "CC2,capture/compare register 2" hexmask.long.word 0x4 16.--31. 1. "CC2_H,Hige Capture/Compare 2 value(Only TMR2)" hexmask.long.word 0x4 0.--15. 1. "CC2_L,Low Capture/Compare 2 value" line.long 0x8 "CC3,capture/compare register 3" hexmask.long.word 0x8 16.--31. 1. "CC3_H,Hige Capture/Compare 3 value(Only TMR2)" hexmask.long.word 0x8 0.--15. 1. "CC3_L,Low Capture/Compare 3 value" line.long 0xC "CC4,capture/compare register 4" hexmask.long.word 0xC 16.--31. 1. "CC4_H,Hige Capture/Compare 4 value(Only TMR2)" hexmask.long.word 0xC 0.--15. 1. "CC4_L,Low Capture/Compare 4 value" group.long 0x48++0x7 line.long 0x0 "DCTRL,DMA control register" hexmask.long.byte 0x0 8.--12. 1. "DBLEN,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBADDR,DMA base address" line.long 0x4 "DMADDR,DMA address for full transfer" hexmask.long.word 0x4 0.--15. 1. "DMADDR,DMA register for burst" tree.end tree "TMR6 (Basic Timer)" base ad:0x40001000 group.long 0x0++0x7 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" group.long 0xC++0x7 line.long 0x0 "DIEN,DMA/Interrupt enable register" bitfld.long 0x0 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0x0 0. "UIEN,Update interrupt enable" "0,1" line.long 0x4 "STS,status register" bitfld.long 0x4 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x24++0xB line.long 0x0 "CNT,counter" hexmask.long.word 0x0 0.--15. 1. "CNT,Low counter value" line.long 0x4 "PSC,prescaler" hexmask.long.word 0x4 0.--15. 1. "PSC,Prescaler value" line.long 0x8 "AUTORLD,auto-reload register" hexmask.long.word 0x8 0.--15. 1. "AUTORLD,Low Auto-reload value" tree.end tree "TMR7 (Basic Timer)" base ad:0x40001400 group.long 0x0++0x7 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" group.long 0xC++0x7 line.long 0x0 "DIEN,DMA/Interrupt enable register" bitfld.long 0x0 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0x0 0. "UIEN,Update interrupt enable" "0,1" line.long 0x4 "STS,status register" bitfld.long 0x4 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x24++0xB line.long 0x0 "CNT,counter" hexmask.long.word 0x0 0.--15. 1. "CNT,Low counter value" line.long 0x4 "PSC,prescaler" hexmask.long.word 0x4 0.--15. 1. "PSC,Prescaler value" line.long 0x8 "AUTORLD,auto-reload register" hexmask.long.word 0x8 0.--15. 1. "AUTORLD,Low Auto-reload value" tree.end tree "TMR15 (General-Purpose Timer)" base ad:0x40014000 group.long 0x0++0x13 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 10. "OC2OIS,Output Idle state 2" "0,1" bitfld.long 0x4 9. "OC1NOIS,Output Idle state 1" "0,1" bitfld.long 0x4 8. "OC1OIS,Output Idle state 1" "0,1" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA" "0,1" bitfld.long 0x4 2. "CCUSEL,Capture/compare control update" "0,1" bitfld.long 0x4 0. "CCPEN,Capture/compare preloaded" "0,1" line.long 0x8 "SMCTRL,slave mode control register" bitfld.long 0x8 7. "MSMEN,Master/Slave mode" "0,1" bitfld.long 0x8 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7" line.long 0xC "DIEN,DMA/Interrupt enable register" bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1" bitfld.long 0xC 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1" bitfld.long 0xC 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1" bitfld.long 0xC 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0xC 7. "BRKIEN,Break interrupt enable" "0,1" bitfld.long 0xC 6. "TRGIEN,Trigger interrupt enable" "0,1" bitfld.long 0xC 5. "COMIEN,COM interrupt enable" "0,1" bitfld.long 0xC 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1" bitfld.long 0xC 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1" bitfld.long 0xC 0. "UIEN,Update interrupt enable" "0,1" line.long 0x10 "STS,status register" bitfld.long 0x10 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1" bitfld.long 0x10 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1" bitfld.long 0x10 7. "BRKIFLG,Break interrupt flag" "0,1" bitfld.long 0x10 6. "TRGIFLG,Trigger interrupt flag" "0,1" bitfld.long 0x10 5. "COMIFLG,COM interrupt flag" "0,1" bitfld.long 0x10 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1" bitfld.long 0x10 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1" bitfld.long 0x10 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 7. "BEG,Break generation" "0,1" bitfld.long 0x0 6. "TEG,Trigger generation" "0,1" bitfld.long 0x0 5. "COMG,Capture/Compare control update" "0,1" bitfld.long 0x0 2. "CC2EG,Capture/compare 2" "0,1" bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CCM1_OUTPUT,capture/compare mode register (output" bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload" "0,1" bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast" "0,1" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2" "0,1,2,3" bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload" "0,1" bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast" "0,1" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" group.long 0x18++0x3 line.long 0x0 "CCM1_INPUT,capture/compare mode register 1 (input" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" group.long 0x20++0x1B line.long 0x0 "CCEN,capture/compare enable" bitfld.long 0x0 7. "CC2NPOL,Capture/Compare 2 output Polarity" "0,1" bitfld.long 0x0 5. "CC2POL,Capture/Compare 2 output" "0,1" bitfld.long 0x0 4. "CC2EN,Capture/Compare 2 output" "0,1" bitfld.long 0x0 3. "CC1NPOL,Capture/Compare 1 output" "0,1" bitfld.long 0x0 2. "CC1NEN,Capture/Compare 1 complementary output" "0,1" bitfld.long 0x0 1. "CC1POL,Capture/Compare 1 output" "0,1" bitfld.long 0x0 0. "CC1EN,Capture/Compare 1 output" "0,1" line.long 0x4 "CNT,counter" hexmask.long.word 0x4 0.--15. 1. "CNT,counter value" line.long 0x8 "PSC,prescaler" hexmask.long.word 0x8 0.--15. 1. "PSC,Prescaler value" line.long 0xC "AUTORLD,auto-reload register" hexmask.long.word 0xC 0.--15. 1. "AUTORLD,Auto-reload value" line.long 0x10 "REPCNT,repetition counter register" hexmask.long.byte 0x10 0.--7. 1. "REPCNT,Repetition counter value" line.long 0x14 "CC1,capture/compare register 1" hexmask.long.word 0x14 0.--15. 1. "CC1,Capture/Compare 1 value" line.long 0x18 "CC2,capture/compare register 2" hexmask.long.word 0x18 0.--15. 1. "CC2,Capture/Compare 2 value" group.long 0x44++0xB line.long 0x0 "BDT,break and dead-time register" bitfld.long 0x0 15. "MOEN,Main output enable" "0,1" bitfld.long 0x0 14. "AOEN,Automatic output enable" "0,1" bitfld.long 0x0 13. "BRKPOL,Break polarity" "0,1" bitfld.long 0x0 12. "BRKEN,Break enable" "0,1" bitfld.long 0x0 11. "RMOS,Off-state selection for Run" "0,1" bitfld.long 0x0 10. "IMOS,Off-state selection for Idle" "0,1" bitfld.long 0x0 8.--9. "LOCKCFG,Lock configuration" "0,1,2,3" hexmask.long.byte 0x0 0.--7. 1. "DTS,Dead-time generator setup" line.long 0x4 "DCTRL,DMA control register" hexmask.long.byte 0x4 8.--12. 1. "DBLEN,DMA burst length" hexmask.long.byte 0x4 0.--4. 1. "DBADDR,DMA base address" line.long 0x8 "DMADDR,DMA address for full transfer" hexmask.long.word 0x8 0.--15. 1. "DMADDR,DMA register for burst" tree.end endif tree "TMR1 (Advanced Timer)" base ad:0x40012C00 group.long 0x0++0x13 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 5.--6. "CAMSEL,Center-aligned mode" "0,1,2,3" bitfld.long 0x0 4. "CNTDIR,Direction" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 14. "OC4OIS,Output Idle state 4" "0,1" bitfld.long 0x4 13. "OC3NOIS,Output Idle state 3" "0,1" bitfld.long 0x4 12. "OC3OIS,Output Idle state 3" "0,1" bitfld.long 0x4 11. "OC2NOIS,Output Idle state 2" "0,1" bitfld.long 0x4 10. "OC2OIS,Output Idle state 2" "0,1" bitfld.long 0x4 9. "OC1NOIS,Output Idle state 1" "0,1" bitfld.long 0x4 8. "OC1OIS,Output Idle state 1" "0,1" bitfld.long 0x4 7. "TI1SEL,TI1 selection" "0,1" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA" "0,1" newline bitfld.long 0x4 2. "CCUSEL,Capture/compare control update" "0,1" bitfld.long 0x4 0. "CCPEN,Capture/compare preloaded" "0,1" line.long 0x8 "SMCTRL,slave mode control register" bitfld.long 0x8 15. "ETPOL,External trigger polarity" "0,1" bitfld.long 0x8 14. "ECEN,External clock enable" "0,1" bitfld.long 0x8 12.--13. "ETPCFG,External trigger prescaler" "0,1,2,3" hexmask.long.byte 0x8 8.--11. 1. "ETFCFG,External trigger filter" bitfld.long 0x8 7. "MSMEN,Master/Slave mode" "0,1" bitfld.long 0x8 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7" bitfld.long 0x8 3. "OCCSEL,OCREF clear selection" "0,1" bitfld.long 0x8 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7" line.long 0xC "DIEN,DMA/Interrupt enable register" bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1" bitfld.long 0xC 13. "COMDEN,Reserved" "0,1" bitfld.long 0xC 12. "CC4DEN,Capture/Compare 4 DMA request" "0,1" bitfld.long 0xC 11. "CC3DEN,Capture/Compare 3 DMA request" "0,1" bitfld.long 0xC 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1" bitfld.long 0xC 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1" bitfld.long 0xC 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0xC 7. "BRKIEN,Break interrupt enable" "0,1" bitfld.long 0xC 6. "TRGIEN,Trigger interrupt enable" "0,1" bitfld.long 0xC 5. "COMIEN,COM interrupt enable" "0,1" newline bitfld.long 0xC 4. "CC4IEN,Capture/Compare 4 interrupt" "0,1" bitfld.long 0xC 3. "CC3IEN,Capture/Compare 3 interrupt" "0,1" bitfld.long 0xC 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1" bitfld.long 0xC 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1" bitfld.long 0xC 0. "UIEN,Update interrupt enable" "0,1" line.long 0x10 "STS,status register" bitfld.long 0x10 12. "CC4RCFLG,Capture/Compare 4 overcapture" "0,1" bitfld.long 0x10 11. "CC3RCFLG,Capture/Compare 3 overcapture" "0,1" bitfld.long 0x10 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1" bitfld.long 0x10 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1" bitfld.long 0x10 7. "BRKIFLG,Break interrupt flag" "0,1" bitfld.long 0x10 6. "TRGIFLG,Trigger interrupt flag" "0,1" bitfld.long 0x10 5. "COMIFLG,COM interrupt flag" "0,1" bitfld.long 0x10 4. "CC4IFLG,Capture/Compare 4 interrupt" "0,1" bitfld.long 0x10 3. "CC3IFLG,Capture/Compare 3 interrupt" "0,1" bitfld.long 0x10 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1" newline bitfld.long 0x10 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1" bitfld.long 0x10 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 7. "BEG,Break generation" "0,1" bitfld.long 0x0 6. "TEG,Trigger generation" "0,1" bitfld.long 0x0 5. "COMG,Capture/Compare control update" "0,1" bitfld.long 0x0 4. "CC4EG,Capture/compare 4 generation" "0,1" bitfld.long 0x0 3. "CC3EG,Capture/compare 3 generation" "0,1" bitfld.long 0x0 2. "CC2EG,Capture/compare 2 generation" "0,1" bitfld.long 0x0 1. "CC1EG,Capture/compare 1 generation" "0,1" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CCM1_OUTPUT,capture/compare mode register (output mode)" bitfld.long 0x0 15. "OC2CEN,Output Compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3" bitfld.long 0x0 7. "OC1CEN,Output Compare 1 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload enable" "0,1" bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast enable" "0,1" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3" group.long 0x18++0x7 line.long 0x0 "CCM1_INPUT,capture/compare mode register 1 (input mode)" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" line.long 0x4 "CCM2_OUTPUT,capture/compare mode register (output" bitfld.long 0x4 15. "OC4CEN,Output compare 4 clear" "0,1" bitfld.long 0x4 12.--14. "OC4MOD,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 11. "OC4PEN,Output compare 4 preload" "0,1" bitfld.long 0x4 10. "OC4FEN,Output compare 4 fast" "0,1" bitfld.long 0x4 8.--9. "CC4SEL,Capture/Compare 4" "0,1,2,3" bitfld.long 0x4 7. "OC3CEN,Output compare 3 clear" "0,1" bitfld.long 0x4 4.--6. "OC3MOD,Output compare 3 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "OC3PEN,Output compare 3 preload" "0,1" bitfld.long 0x4 2. "OC3FEN,Output compare 3 fast" "0,1" bitfld.long 0x4 0.--1. "CC3SEL,Capture/Compare 3" "0,1,2,3" group.long 0x1C++0x33 line.long 0x0 "CCM2_INPUT,capture/compare mode register 2 (input" hexmask.long.byte 0x0 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x0 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC4SEL,Capture/Compare 4" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x0 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC3SEL,Capture/compare 3" "0,1,2,3" line.long 0x4 "CCEN,capture/compare enable" bitfld.long 0x4 13. "CC4POL,Capture/Compare 4 output" "0,1" bitfld.long 0x4 12. "CC4EN,Capture/Compare 4 output" "0,1" bitfld.long 0x4 11. "CC3NPOL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 10. "CC3NEN,Capture/Compare 3 complementary output" "0,1" bitfld.long 0x4 9. "CC3POL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 8. "CC3EN,Capture/Compare 3 output enable" "0,1" bitfld.long 0x4 7. "CC2NPOL,Capture/Compare 2 output Polarity" "0,1" bitfld.long 0x4 6. "CC2NEN,Capture/Compare 2 complementary output enable" "0,1" bitfld.long 0x4 5. "CC2POL,Capture/Compare 2 output" "0,1" bitfld.long 0x4 4. "CC2EN,Capture/Compare 2 output" "0,1" newline bitfld.long 0x4 3. "CC1NPOL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 2. "CC1NEN,Capture/Compare 1 complementary output" "0,1" bitfld.long 0x4 1. "CC1POL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 0. "CC1EN,Capture/Compare 1 output" "0,1" line.long 0x8 "CNT,counter" hexmask.long.word 0x8 0.--15. 1. "CNT,counter value" line.long 0xC "PSC,prescaler" hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value" line.long 0x10 "AUTORLD,auto-reload register" hexmask.long.word 0x10 0.--15. 1. "AUTORLD,Auto-reload value" line.long 0x14 "REPCNT,repetition counter register" hexmask.long.byte 0x14 0.--7. 1. "REPCNT,Repetition counter value" line.long 0x18 "CC1,capture/compare register 1" hexmask.long.word 0x18 0.--15. 1. "CC1,Capture/Compare 1 value" line.long 0x1C "CC2,capture/compare register 2" hexmask.long.word 0x1C 0.--15. 1. "CC2,Capture/Compare 2 value" line.long 0x20 "CC3,capture/compare register 3" hexmask.long.word 0x20 0.--15. 1. "CC3,Capture/Compare 3 value" line.long 0x24 "CC4,capture/compare register 4" hexmask.long.word 0x24 0.--15. 1. "CC4,Capture/Compare 3 value" line.long 0x28 "BDT,break and dead-time register" bitfld.long 0x28 15. "MOEN,Main output enable" "0,1" bitfld.long 0x28 14. "AOEN,Automatic output enable" "0,1" bitfld.long 0x28 13. "BRKPOL,Break polarity" "0,1" bitfld.long 0x28 12. "BRKEN,Break enable" "0,1" bitfld.long 0x28 11. "RMOS,Off-state selection for Run" "0,1" bitfld.long 0x28 10. "IMOS,Off-state selection for Idle" "0,1" bitfld.long 0x28 8.--9. "LOCKCFG,Lock configuration" "0,1,2,3" hexmask.long.byte 0x28 0.--7. 1. "DTS,Dead-time generator setup" line.long 0x2C "DCTRL,DMA control register" hexmask.long.byte 0x2C 8.--12. 1. "DBLEN,DMA burst length" hexmask.long.byte 0x2C 0.--4. 1. "DBADDR,DMA base address" line.long 0x30 "DMADDR,DMA address for full transfer" hexmask.long.word 0x30 0.--15. 1. "DMADDR,DMA register for burst accesses" tree.end sif (cpuis("APM32F030*")||cpuis("APM32F051*")) tree "TMR3 (General-Purpose Timer)" base ad:0x40000400 group.long 0x0++0x13 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 5.--6. "CAMSEL,Center-aligned mode" "0,1,2,3" bitfld.long 0x0 4. "CNTDIR,Direction" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 7. "TI1SEL,TI1 selection" "0,1" bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA selection" "0,1" line.long 0x8 "SMCTRL,slave mode control register" bitfld.long 0x8 15. "ETPOL,External trigger polarity" "0,1" bitfld.long 0x8 14. "ECEN,External clock enable" "0,1" bitfld.long 0x8 12.--13. "ETPCFG,External trigger prescaler" "0,1,2,3" hexmask.long.byte 0x8 8.--11. 1. "ETFCFG,External trigger filter" bitfld.long 0x8 7. "MSMEN,Master/Slave mode" "0,1" bitfld.long 0x8 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7" bitfld.long 0x8 3. "OCCSEL,OCREF clear selection" "0,1" bitfld.long 0x8 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7" line.long 0xC "DIEN,DMA/Interrupt enable register" bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1" bitfld.long 0xC 12. "CC4DEN,Capture/Compare 4 DMA request" "0,1" bitfld.long 0xC 11. "CC3DEN,Capture/Compare 3 DMA request" "0,1" bitfld.long 0xC 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1" bitfld.long 0xC 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1" bitfld.long 0xC 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0xC 6. "TRGIEN,Trigger interrupt enable" "0,1" bitfld.long 0xC 4. "CC4IEN,Capture/Compare 4 interrupt" "0,1" newline bitfld.long 0xC 3. "CC3IEN,Capture/Compare 3 interrupt" "0,1" bitfld.long 0xC 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1" bitfld.long 0xC 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1" bitfld.long 0xC 0. "UIEN,Update interrupt enable" "0,1" line.long 0x10 "STS,status register" bitfld.long 0x10 12. "CC4RCFLG,Capture/Compare 4 overcapture" "0,1" bitfld.long 0x10 11. "CC3RCFLG,Capture/Compare 3 overcapture" "0,1" bitfld.long 0x10 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1" bitfld.long 0x10 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1" bitfld.long 0x10 6. "TRGIFLG,Trigger interrupt flag" "0,1" bitfld.long 0x10 4. "CC4IFLG,Capture/Compare 4 interrupt" "0,1" bitfld.long 0x10 3. "CC3IFLG,Capture/Compare 3 interrupt" "0,1" bitfld.long 0x10 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1" newline bitfld.long 0x10 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1" bitfld.long 0x10 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 6. "TEG,Trigger generation" "0,1" bitfld.long 0x0 4. "CC4EG,Capture/compare 4" "0,1" bitfld.long 0x0 3. "CC3EG,Capture/compare 3" "0,1" bitfld.long 0x0 2. "CC2EG,Capture/compare 2" "0,1" bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CCM1_OUTPUT,capture/compare mode register (output mode)" bitfld.long 0x0 15. "OC2CEN,Output Compare 2 clear enable" "0,1" bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload enable" "0,1" bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast enable" "0,1" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2 selection" "0,1,2,3" bitfld.long 0x0 7. "OC1CEN,Output Compare 1 clear enable" "0,1" bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload enable" "0,1" newline bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast enable" "0,1" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1 selection" "0,1,2,3" group.long 0x18++0x7 line.long 0x0 "CCM1_INPUT,capture/compare mode register 1 (input mode)" hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" line.long 0x4 "CCM2_OUTPUT,capture/compare mode register (output" bitfld.long 0x4 15. "OC4CEN,Output compare 4 clear enable" "0,1" bitfld.long 0x4 12.--14. "OC4MOD,Output compare 4 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 11. "OC4PEN,Output compare 4 preload enable" "0,1" bitfld.long 0x4 10. "OC4FEN,Output compare 4 fast enable" "0,1" bitfld.long 0x4 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3" bitfld.long 0x4 7. "OC3CEN,Output compare 3 clear enable" "0,1" bitfld.long 0x4 4.--6. "OC3MOD,Output compare 3 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "OC3PEN,Output compare 3 preload enable" "0,1" newline bitfld.long 0x4 2. "OC3FEN,Output compare 3 fast enable" "0,1" bitfld.long 0x4 0.--1. "CC3SEL,Capture/Compare 3 selection" "0,1,2,3" group.long 0x1C++0x13 line.long 0x0 "CCM2_INPUT,capture/compare mode register 2 (input" hexmask.long.byte 0x0 12.--15. 1. "IC4F,Input capture 4 filter" bitfld.long 0x0 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CC4SEL,Capture/Compare 4 selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "IC3F,Input capture 3 filter" bitfld.long 0x0 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC3SEL,Capture/compare 3 selection" "0,1,2,3" line.long 0x4 "CCEN,capture/compare enable" bitfld.long 0x4 15. "CC4NPOL,Capture/Compare 4 output" "0,1" bitfld.long 0x4 13. "CC4POL,Capture/Compare 4 output" "0,1" bitfld.long 0x4 12. "CC4EN,Capture/Compare 4 output" "0,1" bitfld.long 0x4 11. "CC3NPOL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 9. "CC3POL,Capture/Compare 3 output" "0,1" bitfld.long 0x4 8. "CC3EN,Capture/Compare 3 output enable" "0,1" bitfld.long 0x4 7. "CC2NPOL,Capture/Compare 2 output Polarity" "0,1" bitfld.long 0x4 5. "CC2POL,Capture/Compare 2 output" "0,1" newline bitfld.long 0x4 4. "CC2EN,Capture/Compare 2 output" "0,1" bitfld.long 0x4 3. "CC1NPOL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 1. "CC1POL,Capture/Compare 1 output" "0,1" bitfld.long 0x4 0. "CC1EN,Capture/Compare 1 output" "0,1" line.long 0x8 "CNT,counter" hexmask.long.word 0x8 16.--31. 1. "CNT_H,Hige counter value(Only TMR2)" hexmask.long.word 0x8 0.--15. 1. "CNT_L,Low counter value" line.long 0xC "PSC,prescaler" hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value" line.long 0x10 "AUTORLD,auto-reload register" sif (cpuis("APM32F051*")) hexmask.long.word 0x10 16.--31. 1. "AUTORLD_H,Hige Auto-reload value(Only TMR2)" hexmask.long.word 0x10 0.--15. 1. "AUTORLD_L,Low Auto-reload value" endif sif (cpuis("APM32F030*")) hexmask.long.word 0x10 0.--15. 1. "AUTORLD,Auto-reload value" endif group.long 0x34++0xF line.long 0x0 "CC1,capture/compare register 1" sif (cpuis("APM32F051*")) hexmask.long.word 0x0 16.--31. 1. "CC1_H,Hige Capture/Compare 1 value(Only TMR2)" hexmask.long.word 0x0 0.--15. 1. "CC1_L,Low Capture/Compare 1 value" endif sif (cpuis("APM32F030*")) hexmask.long.word 0x0 0.--15. 1. "CC1,Capture/Compare 1 value" endif line.long 0x4 "CC2,capture/compare register 2" sif (cpuis("APM32F051*")) hexmask.long.word 0x4 16.--31. 1. "CC2_H,Hige Capture/Compare 2 value(Only TMR2)" hexmask.long.word 0x4 0.--15. 1. "CC2_L,Low Capture/Compare 2 value" endif sif (cpuis("APM32F030*")) hexmask.long.word 0x4 0.--15. 1. "CC2,Capture/Compare 2 value" endif line.long 0x8 "CC3,capture/compare register 3" sif (cpuis("APM32F051*")) hexmask.long.word 0x8 16.--31. 1. "CC3_H,Hige Capture/Compare 3 value(Only TMR2)" hexmask.long.word 0x8 0.--15. 1. "CC3_L,Low Capture/Compare 3 value" endif sif (cpuis("APM32F030*")) hexmask.long.word 0x8 0.--15. 1. "CC3,Capture/Compare 3 value" endif line.long 0xC "CC4,capture/compare register 4" sif (cpuis("APM32F051*")) hexmask.long.word 0xC 16.--31. 1. "CC4_H,Hige Capture/Compare 4 value(Only TMR2)" hexmask.long.word 0xC 0.--15. 1. "CC4_L,Low Capture/Compare 4 value" endif sif (cpuis("APM32F030*")) hexmask.long.word 0xC 0.--15. 1. "CC4,Capture/Compare 4 value" endif group.long 0x48++0x7 line.long 0x0 "DCTRL,DMA control register" hexmask.long.byte 0x0 8.--12. 1. "DBLEN,DMA burst length" hexmask.long.byte 0x0 0.--4. 1. "DBADDR,DMA base address" line.long 0x4 "DMADDR,DMA address for full transfer" hexmask.long.word 0x4 0.--15. 1. "DMADDR,DMA register for burst" tree.end endif sif (cpuis("APM32F030*")||cpuis("APM32F051*")||cpuis("APM32F070*")) tree "TMR6 (Basic Timer)" base ad:0x40001000 group.long 0x0++0x3 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" sif (cpuis("APM32F070*")) group.long 0x4++0x3 line.long 0x0 "CTRL2,control register 2" bitfld.long 0x0 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" endif group.long 0xC++0x7 line.long 0x0 "DIEN,DMA/Interrupt enable register" bitfld.long 0x0 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0x0 0. "UIEN,Update interrupt enable" "0,1" line.long 0x4 "STS,status register" bitfld.long 0x4 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x24++0xB line.long 0x0 "CNT,counter" hexmask.long.word 0x0 0.--15. 1. "CNT,Low counter value" line.long 0x4 "PSC,prescaler" hexmask.long.word 0x4 0.--15. 1. "PSC,Prescaler value" line.long 0x8 "AUTORLD,auto-reload register" hexmask.long.word 0x8 0.--15. 1. "AUTORLD,Low Auto-reload value" tree.end endif sif (cpuis("APM32F030*")) tree "TMR7 (Basic Timer)" base ad:0x40001400 group.long 0x0++0x3 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" group.long 0xC++0x7 line.long 0x0 "DIEN,DMA/Interrupt enable register" bitfld.long 0x0 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0x0 0. "UIEN,Update interrupt enable" "0,1" line.long 0x4 "STS,status register" bitfld.long 0x4 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x24++0xB line.long 0x0 "CNT,counter" hexmask.long.word 0x0 0.--15. 1. "CNT,Low counter value" line.long 0x4 "PSC,prescaler" hexmask.long.word 0x4 0.--15. 1. "PSC,Prescaler value" line.long 0x8 "AUTORLD,auto-reload register" hexmask.long.word 0x8 0.--15. 1. "AUTORLD,Low Auto-reload value" tree.end endif tree "TMR14 (General-Purpose Timer)" base ad:0x40002000 group.long 0x0++0x3 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" group.long 0xC++0x7 line.long 0x0 "DIEN,DMA/Interrupt enable register" bitfld.long 0x0 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1" bitfld.long 0x0 0. "UIEN,Update interrupt enable" "0,1" line.long 0x4 "STS,status register" bitfld.long 0x4 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1" bitfld.long 0x4 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1" bitfld.long 0x4 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CCM1_OUTPUT,capture/compare mode register (output" bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload" "0,1" bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast" "0,1" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" group.long 0x18++0x3 line.long 0x0 "CCM1_INPUT,capture/compare mode register 1 (input" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" group.long 0x20++0xF line.long 0x0 "CCEN,capture/compare enable" bitfld.long 0x0 3. "CC1NPOL,Capture/Compare 1 output" "0,1" bitfld.long 0x0 1. "CC1POL,Capture/Compare 1 output" "0,1" bitfld.long 0x0 0. "CC1EN,Capture/Compare 1 output" "0,1" line.long 0x4 "CNT,counter" hexmask.long.word 0x4 0.--15. 1. "CNT,counter value" line.long 0x8 "PSC,prescaler" hexmask.long.word 0x8 0.--15. 1. "PSC,Prescaler value" line.long 0xC "AUTORLD,auto-reload register" hexmask.long.word 0xC 0.--15. 1. "AUTORLD,Auto-reload value" group.long 0x34++0x3 line.long 0x0 "CC1,capture/compare register 1" hexmask.long.word 0x0 0.--15. 1. "CC1,Capture/Compare 1 value" group.long 0x50++0x3 line.long 0x0 "OPT,option register" bitfld.long 0x0 0.--1. "RMPSEL,Timer input 1 remap" "0,1,2,3" tree.end sif (cpuis("APM32F030*")||cpuis("APM32F051*")||cpuis("APM32F070*")) tree "TMR15 (General-Purpose Timer)" base ad:0x40014000 group.long 0x0++0x7 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" sif (cpuis("APM32F070*")) bitfld.long 0x4 10. "OC2OIS,Output Idle state 2" "0,1" endif bitfld.long 0x4 9. "OC1NOIS,Output Idle state 1" "0,1" bitfld.long 0x4 8. "OC1OIS,Output Idle state 1" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x4 4.--6. "MMSEL,Master mode selection" "0,1,2,3,4,5,6,7" endif bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA" "0,1" bitfld.long 0x4 2. "CCUSEL,Capture/compare control update" "0,1" bitfld.long 0x4 0. "CCPEN,Capture/compare preloaded" "0,1" sif (cpuis("APM32F070*")) group.long 0x8++0x3 line.long 0x0 "SMCTRL,slave mode control register" bitfld.long 0x0 7. "MSMEN,Master/Slave mode" "0,1" bitfld.long 0x0 4.--6. "TRGSEL,Trigger selection" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0.--2. "SMFSEL,Slave mode selection" "0,1,2,3,4,5,6,7" group.long 0x38++0x3 line.long 0x0 "CC2,capture/compare register 2" hexmask.long.word 0x0 0.--15. 1. "CC2,Capture/Compare 2 value" endif group.long 0xC++0x7 line.long 0x0 "DIEN,DMA/Interrupt enable register" sif (cpuis("APM32F070*")) bitfld.long 0x0 14. "TRGDEN,Trigger DMA request enable" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x0 10. "CC2DEN,Capture/Compare 2 DMA request" "0,1" endif bitfld.long 0x0 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1" bitfld.long 0x0 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0x0 7. "BRKIEN,Break interrupt enable" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 6. "TRGIEN,Trigger interrupt enable" "0,1" endif bitfld.long 0x0 5. "COMIEN,COM interrupt enable" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 2. "CC2IEN,Capture/Compare 2 interrupt" "0,1" endif bitfld.long 0x0 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1" bitfld.long 0x0 0. "UIEN,Update interrupt enable" "0,1" line.long 0x4 "STS,status register" sif (cpuis("APM32F070*")) bitfld.long 0x4 10. "CC2RCFLG,Capture/compare 2 overcapture" "0,1" endif bitfld.long 0x4 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1" bitfld.long 0x4 7. "BRKIFLG,Break interrupt flag" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x4 6. "TRGIFLG,Trigger interrupt flag" "0,1" endif bitfld.long 0x4 5. "COMIFLG,COM interrupt flag" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x4 2. "CC2IFLG,Capture/Compare 2 interrupt" "0,1" endif bitfld.long 0x4 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1" bitfld.long 0x4 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 7. "BEG,Break generation" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 6. "TEG,Trigger generation" "0,1" endif bitfld.long 0x0 5. "COMG,Capture/Compare control update" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 2. "CC2EG,Capture/compare 2" "0,1" endif bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CCM1_OUTPUT,capture/compare mode register (output" sif (cpuis("APM32F070*")) bitfld.long 0x0 12.--14. "OC2MOD,Output Compare 2 mode" "0,1,2,3,4,5,6,7" endif sif (cpuis("APM32F070*")) bitfld.long 0x0 11. "OC2PEN,Output Compare 2 preload" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x0 10. "OC2FEN,Output Compare 2 fast" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2" "0,1,2,3" endif bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload" "0,1" bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast" "0,1" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" group.long 0x18++0x3 line.long 0x0 "CCM1_INPUT,capture/compare mode register 1 (input" sif (cpuis("APM32F070*")) hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter" endif sif (cpuis("APM32F070*")) bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3" endif sif (cpuis("APM32F070*")) bitfld.long 0x0 8.--9. "CC2SEL,Capture/Compare 2" "0,1,2,3" endif hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" group.long 0x20++0x17 line.long 0x0 "CCEN,capture/compare enable" sif (cpuis("APM32F070*")) bitfld.long 0x0 7. "CC2NPOL,Capture/Compare 2 output Polarity" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x0 5. "CC2POL,Capture/Compare 2 output" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x0 4. "CC2EN,Capture/Compare 2 output" "0,1" endif bitfld.long 0x0 3. "CC1NPOL,Capture/Compare 1 output" "0,1" bitfld.long 0x0 2. "CC1NEN,Capture/Compare 1 complementary output" "0,1" bitfld.long 0x0 1. "CC1POL,Capture/Compare 1 output" "0,1" bitfld.long 0x0 0. "CC1EN,Capture/Compare 1 output" "0,1" line.long 0x4 "CNT,counter" hexmask.long.word 0x4 0.--15. 1. "CNT,counter value" line.long 0x8 "PSC,prescaler" hexmask.long.word 0x8 0.--15. 1. "PSC,Prescaler value" line.long 0xC "AUTORLD,auto-reload register" hexmask.long.word 0xC 0.--15. 1. "AUTORLD,Auto-reload value" line.long 0x10 "REPCNT,repetition counter register" hexmask.long.byte 0x10 0.--7. 1. "REPCNT,Repetition counter value" line.long 0x14 "CC1,capture/compare register 1" hexmask.long.word 0x14 0.--15. 1. "CC1,Capture/Compare 1 value" group.long 0x44++0xB line.long 0x0 "BDT,break and dead-time register" bitfld.long 0x0 15. "MOEN,Main output enable" "0,1" bitfld.long 0x0 14. "AOEN,Automatic output enable" "0,1" bitfld.long 0x0 13. "BRKPOL,Break polarity" "0,1" bitfld.long 0x0 12. "BRKEN,Break enable" "0,1" bitfld.long 0x0 11. "RMOS,Off-state selection for Run" "0,1" bitfld.long 0x0 10. "IMOS,Off-state selection for Idle" "0,1" bitfld.long 0x0 8.--9. "LOCKCFG,Lock configuration" "0,1,2,3" hexmask.long.byte 0x0 0.--7. 1. "DTS,Dead-time generator setup" line.long 0x4 "DCTRL,DMA control register" hexmask.long.byte 0x4 8.--12. 1. "DBLEN,DMA burst length" hexmask.long.byte 0x4 0.--4. 1. "DBADDR,DMA base address" line.long 0x8 "DMADDR,DMA address for full transfer" hexmask.long.word 0x8 0.--15. 1. "DMADDR,DMA register for burst" tree.end endif tree "TMR16 (General-Purpose Timer)" base ad:0x40014400 group.long 0x0++0x7 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 9. "OC1NOIS,Output Idle state 1" "0,1" bitfld.long 0x4 8. "OC1OIS,Output Idle state 1" "0,1" bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA" "0,1" bitfld.long 0x4 2. "CCUSEL,Capture/compare control update" "0,1" bitfld.long 0x4 0. "CCPEN,Capture/compare preloaded" "0,1" group.long 0xC++0x7 line.long 0x0 "DIEN,DMA/Interrupt enable register" bitfld.long 0x0 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1" bitfld.long 0x0 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0x0 7. "BRKIEN,Break interrupt enable" "0,1" bitfld.long 0x0 5. "COMIEN,COM interrupt enable" "0,1" bitfld.long 0x0 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1" bitfld.long 0x0 0. "UIEN,Update interrupt enable" "0,1" line.long 0x4 "STS,status register" bitfld.long 0x4 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1" bitfld.long 0x4 7. "BRKIFLG,Break interrupt flag" "0,1" bitfld.long 0x4 5. "COMIFLG,COM interrupt flag" "0,1" bitfld.long 0x4 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1" bitfld.long 0x4 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 7. "BEG,Break generation" "0,1" bitfld.long 0x0 5. "COMG,Capture/Compare control update" "0,1" bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CCM1_OUTPUT,capture/compare mode register (output" bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload" "0,1" bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast" "0,1" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" group.long 0x18++0x3 line.long 0x0 "CCM1_INPUT,capture/compare mode register 1 (input" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" group.long 0x20++0x17 line.long 0x0 "CCEN,capture/compare enable" bitfld.long 0x0 3. "CC1NPOL,Capture/Compare 1 output" "0,1" bitfld.long 0x0 2. "CC1NEN,Capture/Compare 1 complementary output" "0,1" bitfld.long 0x0 1. "CC1POL,Capture/Compare 1 output" "0,1" bitfld.long 0x0 0. "CC1EN,Capture/Compare 1 output" "0,1" line.long 0x4 "CNT,counter" hexmask.long.word 0x4 0.--15. 1. "CNT,counter value" line.long 0x8 "PSC,prescaler" hexmask.long.word 0x8 0.--15. 1. "PSC,Prescaler value" line.long 0xC "AUTORLD,auto-reload register" hexmask.long.word 0xC 0.--15. 1. "AUTORLD,Auto-reload value" line.long 0x10 "REPCNT,repetition counter register" hexmask.long.byte 0x10 0.--7. 1. "REPCNT,Repetition counter value" line.long 0x14 "CC1,capture/compare register 1" hexmask.long.word 0x14 0.--15. 1. "CC1,Capture/Compare 1 value" group.long 0x44++0xB line.long 0x0 "BDT,break and dead-time register" bitfld.long 0x0 15. "MOEN,Main output enable" "0,1" bitfld.long 0x0 14. "AOEN,Automatic output enable" "0,1" bitfld.long 0x0 13. "BRKPOL,Break polarity" "0,1" bitfld.long 0x0 12. "BRKEN,Break enable" "0,1" bitfld.long 0x0 11. "RMOS,Off-state selection for Run" "0,1" bitfld.long 0x0 10. "IMOS,Off-state selection for Idle" "0,1" bitfld.long 0x0 8.--9. "LOCKCFG,Lock configuration" "0,1,2,3" hexmask.long.byte 0x0 0.--7. 1. "DTS,Dead-time generator setup" line.long 0x4 "DCTRL,DMA control register" hexmask.long.byte 0x4 8.--12. 1. "DBLEN,DMA burst length" hexmask.long.byte 0x4 0.--4. 1. "DBADDR,DMA base address" line.long 0x8 "DMADDR,DMA address for full transfer" hexmask.long.word 0x8 0.--15. 1. "DMADDR,DMA register for burst" tree.end tree "TMR17 (General-Purpose Timer)" base ad:0x40014800 group.long 0x0++0x7 line.long 0x0 "CTRL1,control register 1" bitfld.long 0x0 8.--9. "CLKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARPEN,Auto-reload preload enable" "0,1" bitfld.long 0x0 3. "SPMEN,One-pulse mode" "0,1" bitfld.long 0x0 2. "URSSEL,Update request source" "0,1" bitfld.long 0x0 1. "UD,Update disable" "0,1" bitfld.long 0x0 0. "CNTEN,Counter enable" "0,1" line.long 0x4 "CTRL2,control register 2" bitfld.long 0x4 9. "OC1NOIS,Output Idle state 1" "0,1" bitfld.long 0x4 8. "OC1OIS,Output Idle state 1" "0,1" bitfld.long 0x4 3. "CCDSEL,Capture/compare DMA" "0,1" bitfld.long 0x4 2. "CCUSEL,Capture/compare control update" "0,1" bitfld.long 0x4 0. "CCPEN,Capture/compare preloaded" "0,1" group.long 0xC++0x7 line.long 0x0 "DIEN,DMA/Interrupt enable register" bitfld.long 0x0 9. "CC1DEN,Capture/Compare 1 DMA request" "0,1" bitfld.long 0x0 8. "UDIEN,Update DMA request enable" "0,1" bitfld.long 0x0 7. "BRKIEN,Break interrupt enable" "0,1" bitfld.long 0x0 5. "COMIEN,COM interrupt enable" "0,1" bitfld.long 0x0 1. "CC1IEN,Capture/Compare 1 interrupt" "0,1" bitfld.long 0x0 0. "UIEN,Update interrupt enable" "0,1" line.long 0x4 "STS,status register" bitfld.long 0x4 9. "CC1RCFLG,Capture/Compare 1 overcapture" "0,1" bitfld.long 0x4 7. "BRKIFLG,Break interrupt flag" "0,1" bitfld.long 0x4 5. "COMIFLG,COM interrupt flag" "0,1" bitfld.long 0x4 1. "CC1IFLG,Capture/compare 1 interrupt" "0,1" bitfld.long 0x4 0. "UIFLG,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "CEG,event generation register" bitfld.long 0x0 7. "BEG,Break generation" "0,1" bitfld.long 0x0 5. "COMG,Capture/Compare control update" "0,1" bitfld.long 0x0 1. "CC1EG,Capture/compare 1" "0,1" bitfld.long 0x0 0. "UEG,Update generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CCM1_OUTPUT,capture/compare mode register (output" bitfld.long 0x0 4.--6. "OC1MOD,Output Compare 1 mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "OC1PEN,Output Compare 1 preload" "0,1" bitfld.long 0x0 2. "OC1FEN,Output Compare 1 fast" "0,1" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" group.long 0x18++0x3 line.long 0x0 "CCM1_INPUT,capture/compare mode register 1 (input" hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter" bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CC1SEL,Capture/Compare 1" "0,1,2,3" group.long 0x20++0x17 line.long 0x0 "CCEN,capture/compare enable" bitfld.long 0x0 3. "CC1NPOL,Capture/Compare 1 output" "0,1" bitfld.long 0x0 2. "CC1NEN,Capture/Compare 1 complementary output" "0,1" bitfld.long 0x0 1. "CC1POL,Capture/Compare 1 output" "0,1" bitfld.long 0x0 0. "CC1EN,Capture/Compare 1 output" "0,1" line.long 0x4 "CNT,counter" hexmask.long.word 0x4 0.--15. 1. "CNT,counter value" line.long 0x8 "PSC,prescaler" hexmask.long.word 0x8 0.--15. 1. "PSC,Prescaler value" line.long 0xC "AUTORLD,auto-reload register" hexmask.long.word 0xC 0.--15. 1. "AUTORLD,Auto-reload value" line.long 0x10 "REPCNT,repetition counter register" hexmask.long.byte 0x10 0.--7. 1. "REPCNT,Repetition counter value" line.long 0x14 "CC1,capture/compare register 1" hexmask.long.word 0x14 0.--15. 1. "CC1,Capture/Compare 1 value" group.long 0x44++0xB line.long 0x0 "BDT,break and dead-time register" bitfld.long 0x0 15. "MOEN,Main output enable" "0,1" bitfld.long 0x0 14. "AOEN,Automatic output enable" "0,1" bitfld.long 0x0 13. "BRKPOL,Break polarity" "0,1" bitfld.long 0x0 12. "BRKEN,Break enable" "0,1" bitfld.long 0x0 11. "RMOS,Off-state selection for Run" "0,1" bitfld.long 0x0 10. "IMOS,Off-state selection for Idle" "0,1" bitfld.long 0x0 8.--9. "LOCKCFG,Lock configuration" "0,1,2,3" hexmask.long.byte 0x0 0.--7. 1. "DTS,Dead-time generator setup" line.long 0x4 "DCTRL,DMA control register" hexmask.long.byte 0x4 8.--12. 1. "DBLEN,DMA burst length" hexmask.long.byte 0x4 0.--4. 1. "DBADDR,DMA base address" line.long 0x8 "DMADDR,DMA address for full transfer" hexmask.long.word 0x8 0.--15. 1. "DMADDR,DMA register for burst" tree.end tree.end sif (cpuis("APM32F051*")||cpuis("APM32F071*")||cpuis("APM32F072*")||cpuis("APM32F091*")) tree "TSC (Touch Sensing Controller)" base ad:0x40024000 group.long 0x0++0x13 line.long 0x0 "CTRL,control register" hexmask.long.byte 0x0 28.--31. 1. "CTPHSEL,Charge transfer pulse high" hexmask.long.byte 0x0 24.--27. 1. "CTPLSEL,Charge transfer pulse low" hexmask.long.byte 0x0 17.--23. 1. "SSERRVSEL,Spread spectrum deviation" bitfld.long 0x0 16. "SSEN,Spread spectrum enable" "0,1" bitfld.long 0x0 15. "SSCDFSEL,Spread spectrum prescaler" "0,1" bitfld.long 0x0 12.--14. "PGCDFSEL,pulse generator prescaler" "0,1,2,3,4,5,6,7" bitfld.long 0x0 5.--7. "MCNTVSEL,Max count error value" "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "IODEFCFG,I/O Default mode" "0,1" bitfld.long 0x0 3. "SYNCPOL,Synchronization pin" "0,1" bitfld.long 0x0 2. "AMCFG,Acquisition mode" "0,1" newline bitfld.long 0x0 1. "STARTAFLG,Start a new acquisition" "0,1" bitfld.long 0x0 0. "TSCEN,Touch sensing controller" "0,1" line.long 0x4 "INTEN,interrupt enable register" bitfld.long 0x4 1. "MCEIEN,Max count error interrupt" "0,1" bitfld.long 0x4 0. "EOAIEN,End of acquisition interrupt" "0,1" line.long 0x8 "INTFCLR,interrupt clear register" bitfld.long 0x8 1. "MCEICLR,Max count error interrupt" "0,1" bitfld.long 0x8 0. "EOAICLR,End of acquisition interrupt" "0,1" line.long 0xC "INTSTS,interrupt status register" bitfld.long 0xC 1. "MCEFLG,Max count error flag" "0,1" bitfld.long 0xC 0. "EOAFLG,End of acquisition flag" "0,1" line.long 0x10 "IOHCTRL,I/O hysteresis control" bitfld.long 0x10 23. "G6P4,G6P4 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 22. "G6P3,G6P3 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 21. "G6P2,G6P2 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 20. "G6P1,G6P1 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 19. "G5P4,G5P4 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 18. "G5P3,G5P3 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 17. "G5P2,G5P2 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 16. "G5P1,G5P1 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 15. "G4P4,G4P4 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 14. "G4P3,G4P3 Schmitt trigger hysteresis" "0,1" newline bitfld.long 0x10 13. "G4P2,G4P2 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 12. "G4P1,G4P1 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 11. "G3P4,G3P4 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 10. "G3P3,G3P3 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 9. "G3P2,G3P2 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 8. "G3P1,G3P1 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 7. "G2P4,G2P4 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 6. "G2P3,G2P3 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 5. "G2P2,G2P2 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 4. "G2P1,G2P1 Schmitt trigger hysteresis" "0,1" newline bitfld.long 0x10 3. "G1P4,G1P4 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 2. "G1P3,G1P3 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 1. "G1P2,G1P2 Schmitt trigger hysteresis" "0,1" bitfld.long 0x10 0. "G1P1,G1P1 Schmitt trigger hysteresis" "0,1" group.long 0x18++0x3 line.long 0x0 "IOASWCTRL,I/O analog switch control" bitfld.long 0x0 23. "G6P4,G6P4 analog switch enable" "0,1" bitfld.long 0x0 22. "G6P3,G6P3 analog switch enable" "0,1" bitfld.long 0x0 21. "G6P2,G6P2 analog switch enable" "0,1" bitfld.long 0x0 20. "G6P1,G6P1 analog switch enable" "0,1" bitfld.long 0x0 19. "G5P4,G5P4 analog switch enable" "0,1" bitfld.long 0x0 18. "G5P3,G5P3 analog switch enable" "0,1" bitfld.long 0x0 17. "G5P2,G5P2 analog switch enable" "0,1" bitfld.long 0x0 16. "G5P1,G5P1 analog switch enable" "0,1" bitfld.long 0x0 15. "G4P4,G4P4 analog switch enable" "0,1" bitfld.long 0x0 14. "G4P3,G4P3 analog switch enable" "0,1" newline bitfld.long 0x0 13. "G4P2,G4P2 analog switch enable" "0,1" bitfld.long 0x0 12. "G4P1,G4P1 analog switch enable" "0,1" bitfld.long 0x0 11. "G3P4,G3P4 analog switch enable" "0,1" bitfld.long 0x0 10. "G3P3,G3P3 analog switch enable" "0,1" bitfld.long 0x0 9. "G3P2,G3P2 analog switch enable" "0,1" bitfld.long 0x0 8. "G3P1,G3P1 analog switch enable" "0,1" bitfld.long 0x0 7. "G2P4,G2P4 analog switch enable" "0,1" bitfld.long 0x0 6. "G2P3,G2P3 analog switch enable" "0,1" bitfld.long 0x0 5. "G2P2,G2P2 analog switch enable" "0,1" bitfld.long 0x0 4. "G2P1,G2P1 analog switch enable" "0,1" newline bitfld.long 0x0 3. "G1P4,G1P4 analog switch enable" "0,1" bitfld.long 0x0 2. "G1P3,G1P3 analog switch enable" "0,1" bitfld.long 0x0 1. "G1P2,G1P2 analog switch enable" "0,1" bitfld.long 0x0 0. "G1P1,G1P1 analog switch enable" "0,1" group.long 0x20++0x3 line.long 0x0 "IOSMPCTRL,I/O sampling control register" bitfld.long 0x0 23. "G6P4,G6P4 sampling mode" "0,1" bitfld.long 0x0 22. "G6P3,G6P3 sampling mode" "0,1" bitfld.long 0x0 21. "G6P2,G6P2 sampling mode" "0,1" bitfld.long 0x0 20. "G6P1,G6P1 sampling mode" "0,1" bitfld.long 0x0 19. "G5P4,G5P4 sampling mode" "0,1" bitfld.long 0x0 18. "G5P3,G5P3 sampling mode" "0,1" bitfld.long 0x0 17. "G5P2,G5P2 sampling mode" "0,1" bitfld.long 0x0 16. "G5P1,G5P1 sampling mode" "0,1" bitfld.long 0x0 15. "G4P4,G4P4 sampling mode" "0,1" bitfld.long 0x0 14. "G4P3,G4P3 sampling mode" "0,1" newline bitfld.long 0x0 13. "G4P2,G4P2 sampling mode" "0,1" bitfld.long 0x0 12. "G4P1,G4P1 sampling mode" "0,1" bitfld.long 0x0 11. "G3P4,G3P4 sampling mode" "0,1" bitfld.long 0x0 10. "G3P3,G3P3 sampling mode" "0,1" bitfld.long 0x0 9. "G3P2,G3P2 sampling mode" "0,1" bitfld.long 0x0 8. "G3P1,G3P1 sampling mode" "0,1" bitfld.long 0x0 7. "G2P4,G2P4 sampling mode" "0,1" bitfld.long 0x0 6. "G2P3,G2P3 sampling mode" "0,1" bitfld.long 0x0 5. "G2P2,G2P2 sampling mode" "0,1" bitfld.long 0x0 4. "G2P1,G2P1 sampling mode" "0,1" newline bitfld.long 0x0 3. "G1P4,G1P4 sampling mode" "0,1" bitfld.long 0x0 2. "G1P3,G1P3 sampling mode" "0,1" bitfld.long 0x0 1. "G1P2,G1P2 sampling mode" "0,1" bitfld.long 0x0 0. "G1P1,G1P1 sampling mode" "0,1" group.long 0x28++0x3 line.long 0x0 "IOCHCTRL,I/O channel control register" bitfld.long 0x0 23. "G6P4,G6P4 channel mode" "0,1" bitfld.long 0x0 22. "G6P3,G6P3 channel mode" "0,1" bitfld.long 0x0 21. "G6P2,G6P2 channel mode" "0,1" bitfld.long 0x0 20. "G6P1,G6P1 channel mode" "0,1" bitfld.long 0x0 19. "G5P4,G5P4 channel mode" "0,1" bitfld.long 0x0 18. "G5P3,G5P3 channel mode" "0,1" bitfld.long 0x0 17. "G5P2,G5P2 channel mode" "0,1" bitfld.long 0x0 16. "G5P1,G5P1 channel mode" "0,1" bitfld.long 0x0 15. "G4P4,G4P4 channel mode" "0,1" bitfld.long 0x0 14. "G4P3,G4P3 channel mode" "0,1" newline bitfld.long 0x0 13. "G4P2,G4P2 channel mode" "0,1" bitfld.long 0x0 12. "G4P1,G4P1 channel mode" "0,1" bitfld.long 0x0 11. "G3P4,G3P4 channel mode" "0,1" bitfld.long 0x0 10. "G3P3,G3P3 channel mode" "0,1" bitfld.long 0x0 9. "G3P2,G3P2 channel mode" "0,1" bitfld.long 0x0 8. "G3P1,G3P1 channel mode" "0,1" bitfld.long 0x0 7. "G2P4,G2P4 channel mode" "0,1" bitfld.long 0x0 6. "G2P3,G2P3 channel mode" "0,1" bitfld.long 0x0 5. "G2P2,G2P2 channel mode" "0,1" bitfld.long 0x0 4. "G2P1,G2P1 channel mode" "0,1" newline bitfld.long 0x0 3. "G1P4,G1P4 channel mode" "0,1" bitfld.long 0x0 2. "G1P3,G1P3 channel mode" "0,1" bitfld.long 0x0 1. "G1P2,G1P2 channel mode" "0,1" bitfld.long 0x0 0. "G1P1,G1P1 channel mode" "0,1" group.long 0x30++0x3 line.long 0x0 "IOGCSTS,I/O group control status" rbitfld.long 0x0 23. "G8CFLG,Analog I/O group x status" "0,1" rbitfld.long 0x0 22. "G7CFLG,Analog I/O group x status" "0,1" rbitfld.long 0x0 21. "G6CFLG,Analog I/O group x status" "0,1" rbitfld.long 0x0 20. "G5CFLG,Analog I/O group x status" "0,1" rbitfld.long 0x0 19. "G4CFLG,Analog I/O group x status" "0,1" rbitfld.long 0x0 18. "G3CFLG,Analog I/O group x status" "0,1" rbitfld.long 0x0 17. "G2CFLG,Analog I/O group x status" "0,1" rbitfld.long 0x0 16. "G1CFLG,Analog I/O group x status" "0,1" bitfld.long 0x0 7. "G8EN,Analog I/O group x enable" "0,1" bitfld.long 0x0 6. "G7EN,Analog I/O group x enable" "0,1" newline bitfld.long 0x0 5. "G6EN,Analog I/O group x enable" "0,1" bitfld.long 0x0 4. "G5EN,Analog I/O group x enable" "0,1" bitfld.long 0x0 3. "G4EN,Analog I/O group x enable" "0,1" bitfld.long 0x0 2. "G3EN,Analog I/O group x enable" "0,1" bitfld.long 0x0 1. "G2EN,Analog I/O group x enable" "0,1" bitfld.long 0x0 0. "G1EN,Analog I/O group x enable" "0,1" rgroup.long 0x34++0x1F line.long 0x0 "IOG1CNT,I/O group x counter register" hexmask.long.word 0x0 0.--13. 1. "CNTVAL,Counter value" line.long 0x4 "IOG2CNT,I/O group x counter register" hexmask.long.word 0x4 0.--13. 1. "CNTVAL,Counter value" line.long 0x8 "IOG3CNT,I/O group x counter register" hexmask.long.word 0x8 0.--13. 1. "CNTVAL,Counter value" line.long 0xC "IOG4CNT,I/O group x counter register" hexmask.long.word 0xC 0.--13. 1. "CNTVAL,Counter value" line.long 0x10 "IOG5CNT,I/O group x counter register" hexmask.long.word 0x10 0.--13. 1. "CNTVAL,Counter value" line.long 0x14 "IOG6CNT,I/O group x counter register" hexmask.long.word 0x14 0.--13. 1. "CNTVAL,Counter value" line.long 0x18 "IOG7CNT,I/O group x counter register" hexmask.long.word 0x18 0.--13. 1. "CNTVAL,Counter value" line.long 0x1C "IOG8CNT,I/O group x counter register" hexmask.long.word 0x1C 0.--13. 1. "CNTVAL,Counter value" tree.end endif tree "USART (Universal Synchronous/Asynchronous Transceiver)" base ad:0x0 sif (cpuis("APM32F030*")||cpuis("APM32F051*")||cpuis("APM32F070*")) tree "USART1" base ad:0x40013800 group.long 0x0++0xF line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" endif bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" endif bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" endif bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline sif (cpuis("APM32F070*")) bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" endif bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" sif (cpuis("APM32F070*")) bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" endif sif (cpuis("APM32F070*")) bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" endif bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" endif bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline sif (cpuis("APM32F070*")) bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" endif bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" sif (cpuis("APM32F070*")) group.long 0x10++0x3 line.long 0x0 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x0 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x0 0.--7. 1. "PSC,Prescaler value" endif group.long 0x14++0x3 line.long 0x0 "RXTO,Receiver timeout register" sif (cpuis("APM32F070*")) hexmask.long.byte 0x0 24.--31. 1. "BLEN,Block Length" endif hexmask.long.tbyte 0x0 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" sif (cpuis("APM32F070*")) bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" endif bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" sif (cpuis("APM32F070*")) bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" endif bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" endif bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" endif bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" sif (cpuis("APM32F070*")) bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" endif bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" endif bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" endif bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end endif sif (cpuis("APM32F030*")||cpuis("APM32F051*")||cpuis("APM32F070*")) tree "USART2" base ad:0x40004400 group.long 0x0++0xF line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" endif bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" endif bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" endif bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline sif (cpuis("APM32F070*")) bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" endif bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" sif (cpuis("APM32F070*")) bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" endif sif (cpuis("APM32F070*")) bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" endif bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" endif bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline sif (cpuis("APM32F070*")) bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" endif bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" sif (cpuis("APM32F070*")) group.long 0x10++0x3 line.long 0x0 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x0 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x0 0.--7. 1. "PSC,Prescaler value" endif group.long 0x14++0x3 line.long 0x0 "RXTO,Receiver timeout register" sif (cpuis("APM32F070*")) hexmask.long.byte 0x0 24.--31. 1. "BLEN,Block Length" endif hexmask.long.tbyte 0x0 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" sif (cpuis("APM32F070*")) bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" endif bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" sif (cpuis("APM32F070*")) bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" endif sif (cpuis("APM32F070*")) bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" endif bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" endif bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" endif bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" sif (cpuis("APM32F070*")) bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" endif bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" endif bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" sif (cpuis("APM32F070*")) bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" endif bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end endif sif (cpuis("APM32F030*")) tree "USART3" base ad:0x40004800 group.long 0x0++0xF line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" newline bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" newline bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" newline bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" newline bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" group.long 0x14++0x3 line.long 0x0 "RXTO,Receiver timeout register" hexmask.long.tbyte 0x0 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" newline bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end tree "USART4" base ad:0x40004C00 group.long 0x0++0xF line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" newline bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" newline bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" newline bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" newline bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" group.long 0x14++0x3 line.long 0x0 "RXTO,Receiver timeout register" hexmask.long.tbyte 0x0 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" newline bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end tree "USART5" base ad:0x40005000 group.long 0x0++0xF line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" newline bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" newline bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" newline bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" newline bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" group.long 0x14++0x3 line.long 0x0 "RXTO,Receiver timeout register" hexmask.long.tbyte 0x0 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" newline bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end tree "USART6" base ad:0x40011400 group.long 0x0++0xF line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" newline bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" newline bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" newline bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" newline bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" group.long 0x14++0x3 line.long 0x0 "RXTO,Receiver timeout register" hexmask.long.tbyte 0x0 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" newline bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end endif sif (cpuis("APM32F070*")) tree "USART3" base ad:0x40004800 group.long 0x0++0x17 line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" line.long 0x10 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RXTO,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end tree "USART4" base ad:0x40004C00 group.long 0x0++0x17 line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" line.long 0x10 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RXTO,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end endif sif (cpuis("APM32F071*")) tree "USART1" base ad:0x40013800 group.long 0x0++0x17 line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" line.long 0x10 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RXTO,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end endif sif (cpuis("APM32F071*")) tree "USART2" base ad:0x40004400 group.long 0x0++0x17 line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" line.long 0x10 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RXTO,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end tree "USART3" base ad:0x40004800 group.long 0x0++0x17 line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" line.long 0x10 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RXTO,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end tree "USART4" base ad:0x40004C00 group.long 0x0++0x17 line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" line.long 0x10 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RXTO,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end endif sif (cpuis("APM32F072*")) tree "USART1" base ad:0x40013800 group.long 0x0++0x17 line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" line.long 0x10 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RXTO,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end endif sif (cpuis("APM32F072*")) tree "USART2" base ad:0x40004400 group.long 0x0++0x17 line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" line.long 0x10 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RXTO,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end tree "USART3" base ad:0x40004800 group.long 0x0++0x17 line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" line.long 0x10 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RXTO,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end tree "USART4" base ad:0x40004C00 group.long 0x0++0x17 line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" line.long 0x10 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RXTO,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end endif sif (cpuis("APM32F091*")) tree "USART1" base ad:0x40013800 group.long 0x0++0x17 line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" line.long 0x10 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RXTO,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end endif sif (cpuis("APM32F091*")) tree "USART2" base ad:0x40004400 group.long 0x0++0x17 line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" line.long 0x10 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RXTO,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end tree "USART3" base ad:0x40004800 group.long 0x0++0x17 line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" line.long 0x10 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RXTO,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end tree "USART4" base ad:0x40004C00 group.long 0x0++0x17 line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" line.long 0x10 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RXTO,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end tree "USART5" base ad:0x40005000 group.long 0x0++0x17 line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" line.long 0x10 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RXTO,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end tree "USART6" base ad:0x40011400 group.long 0x0++0x17 line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" line.long 0x10 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RXTO,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end tree "USART7" base ad:0x40011800 group.long 0x0++0x17 line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" line.long 0x10 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RXTO,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end tree "USART8" base ad:0x40011C00 group.long 0x0++0x17 line.long 0x0 "CTRL1,Control register 1" bitfld.long 0x0 28. "DBLCFG1,Word length" "0,1" bitfld.long 0x0 27. "EOBIEN,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RXTOIEN,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DLTEN,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DDLTEN,Driver Enable deassertion" bitfld.long 0x0 15. "OSMCFG,Oversampling mode" "0,1" bitfld.long 0x0 14. "CMIEN,Character match interrupt" "0,1" bitfld.long 0x0 13. "RXMUTEEN,Mute mode enable" "0,1" newline bitfld.long 0x0 12. "DBLCFG0,Word length" "0,1" bitfld.long 0x0 11. "WUPMCFG,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PCFG,Parity selection" "0,1" bitfld.long 0x0 8. "PEIEN,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TXBEIEN,interrupt enable" "0,1" bitfld.long 0x0 6. "TXCIEN,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RXBNEIEN,RXNE interrupt enable" "0,1" newline bitfld.long 0x0 4. "IDLEIEN,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmitter enable" "0,1" bitfld.long 0x0 2. "RXEN,Receiver enable" "0,1" bitfld.long 0x0 1. "USWMEN,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTRL2,Control register 2" hexmask.long.byte 0x4 28.--31. 1. "ADDRH,Address of the USART node" hexmask.long.byte 0x4 24.--27. 1. "ADDRL,Address of the USART node" bitfld.long 0x4 23. "RXTODEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABRDCFG,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABRDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBFEN,Most significant bit first" "0,1" bitfld.long 0x4 18. "BINVEN,Binary data inversion" "0,1" bitfld.long 0x4 17. "TXINVEN,TX pin active level" "0,1" newline bitfld.long 0x4 16. "RXINVEN,RX pin active level inversion" "0,1" bitfld.long 0x4 15. "SWAPEN,Swap TX/RX pins" "0,1" bitfld.long 0x4 14. "LINMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STOPCFG,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CLKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPOL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPHA,Clock phase" "0,1" bitfld.long 0x4 8. "LBCPOEN,Last bit clock pulse" "0,1" newline bitfld.long 0x4 6. "LBDIEN,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBDLCFG,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDRLEN,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTRL3,Control register 3" bitfld.long 0x8 22. "WSMIEN,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WSIFLGSEL,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCARCCFG,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DPCFG,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEN,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDISRXEEN,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRDEDIS,Overrun Disable" "0,1" bitfld.long 0x8 11. "SAMCFG,One sample bit method" "0,1" newline bitfld.long 0x8 10. "CTSIEN,CTS interrupt enable" "0,1" bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DMATXEN,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DMARXEN,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "SCNACKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" newline bitfld.long 0x8 2. "IRLPEN,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" bitfld.long 0x8 0. "ERRIEN,Error interrupt enable" "0,1" line.long 0xC "BR,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "IBR,mantissa of USARTDIV" hexmask.long.byte 0xC 0.--3. 1. "FBR,fraction of USARTDIV" line.long 0x10 "GTPSC,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GRDT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RXTO,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RXTO,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "REQUEST,Request register" bitfld.long 0x0 4. "TXDFQ,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXDFQ,Receive data flush request" "0,1" bitfld.long 0x0 2. "MUTEQ,Mute mode request" "0,1" bitfld.long 0x0 1. "TXBFQ,Send break request" "0,1" bitfld.long 0x0 0. "ABRDQ,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STS,Interrupt & status" bitfld.long 0x0 22. "RXENACKFLG,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TXENACKFLG,Transmit enable acknowledge flag" "0,1" bitfld.long 0x0 20. "WSMFLG,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RXWFMUTE,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "TXBFFLG,Send break flag" "0,1" bitfld.long 0x0 17. "CMFLG,character match flag" "0,1" bitfld.long 0x0 16. "BSYFLG,Busy flag" "0,1" bitfld.long 0x0 15. "ABRDFLG,Auto baud rate flag" "0,1" newline bitfld.long 0x0 14. "ABRDEFLG,Auto baud rate error" "0,1" bitfld.long 0x0 12. "EOBFLG,End of block flag" "0,1" bitfld.long 0x0 11. "RXTOFLG,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTSCFG,CTS flag" "0,1" bitfld.long 0x0 9. "CTSFLG,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDFLG,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TXBEFLG,Transmit data register" "0,1" bitfld.long 0x0 6. "TXCFLG,Transmission complete" "0,1" newline bitfld.long 0x0 5. "RXBNEFLG,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEFLG,Idle line detected" "0,1" bitfld.long 0x0 3. "OVREFLG,Overrun error" "0,1" bitfld.long 0x0 2. "NEFLG,Noise detected flag" "0,1" bitfld.long 0x0 1. "FEFLG,Framing error" "0,1" bitfld.long 0x0 0. "PEFLG,Parity error" "0,1" group.long 0x20++0x3 line.long 0x0 "INTFCLR,Interrupt flag clear register" bitfld.long 0x0 20. "WSMCLR,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "CMCLR,Character match clear flag" "0,1" bitfld.long 0x0 12. "EOBCLR,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RXTOCLR,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSCLR,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDCLR,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TXCCLR,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLECLR,Idle line detected clear" "0,1" newline bitfld.long 0x0 3. "OVRECLR,Overrun error clear flag" "0,1" bitfld.long 0x0 2. "NECLR,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FECLR,Framing error clear flag" "0,1" bitfld.long 0x0 0. "PECLR,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RXDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RXDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TXDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TXDATA,Transmit data value" tree.end endif tree.end sif (cpuis("APM32F070*")||cpuis("APM32F072*")) tree "USBD (Full-speed USBD Interface Device)" base ad:0x40005C00 group.long 0x40++0x7 line.long 0x0 "CTRL,control register" bitfld.long 0x0 15. "CTRIEN,Correct Transfer Interrupt Enable" "0,1" bitfld.long 0x0 14. "PMAOUIEN,Packet Memory Area Over / Underrun Interrupt Enable" "0,1" bitfld.long 0x0 13. "ERRIEN,Error Interrupt Enable" "0,1" bitfld.long 0x0 12. "WKUPIEN,Wakeup Interrupt Enable" "0,1" bitfld.long 0x0 11. "SUSIEN,Suspend Mode Interrupt Enable" "0,1" bitfld.long 0x0 10. "RSTIEN,USBD Reset Interrupt Enable" "0,1" bitfld.long 0x0 9. "SOFIEN,Start of Frame Interrupt Enable" "0,1" bitfld.long 0x0 8. "ESOFIEN,Expected Startwof Frame Interrupt Enable" "0,1" bitfld.long 0x0 7. "L1STSREQIM,LPML1 state request interrupt mask" "0,1" newline bitfld.long 0x0 5. "L1WKUPREQ,LPML1 Wakeup request" "0,1" bitfld.long 0x0 4. "WKUPREQ,Wakeup Request" "0,1" bitfld.long 0x0 3. "FORSUS,Force Suspend" "0,1" bitfld.long 0x0 2. "LPWREN,Lowpower Mode Enable" "0,1" bitfld.long 0x0 1. "PWRDOWN,Power Down" "0,1" bitfld.long 0x0 0. "FORRST,Force USBD Reset" "0,1" line.long 0x4 "INTSTS,interrupt status register" rbitfld.long 0x4 15. "CTFLG,Correct Transfer Flag" "0,1" bitfld.long 0x4 14. "PMOFLG,Packet Memory Overflow Flag" "0,1" bitfld.long 0x4 13. "ERRFLG,Failure Of Transfer Flag" "0,1" bitfld.long 0x4 12. "WUPREQ,Wakeup Request" "0,1" bitfld.long 0x4 11. "SUSREQ,Suspend Mode Request" "0,1" bitfld.long 0x4 10. "RSTREQ,Reset Request" "0,1" bitfld.long 0x4 9. "SOFFLG,Start Of Frame Flag" "0,1" bitfld.long 0x4 8. "ESOFFLG,Expected Start of Frame Flag" "0,1" bitfld.long 0x4 7. "L1STSREQ,LPML1 state request" "0,1" newline rbitfld.long 0x4 4. "DOT,Direction of Transaction" "0,1" rbitfld.long 0x4 0.--2. "EPID,Endpoint Identifier" "0,1,2,3,4,5,6,7" rgroup.long 0x48++0x3 line.long 0x0 "FRANUM,frame number register" bitfld.long 0x0 15. "RXDPSTS,Receive Data+ Line Status" "0,1" bitfld.long 0x0 14. "RXDMSTS,Receive Data- line Status" "0,1" bitfld.long 0x0 13. "LOCK,Lock" "0,1" bitfld.long 0x0 11.--12. "LSOFNUM,Continuous Lost SOF Number" "0,1,2,3" hexmask.long.word 0x0 0.--10. 1. "FRANUM,Frame Sequence Number" group.long 0x4C++0xF line.long 0x0 "ADDR,device address" bitfld.long 0x0 7. "USBDEN,USBD Enable" "0,1" hexmask.long.byte 0x0 0.--6. 1. "ADDR,Device Address" line.long 0x4 "BUFFTB,Buffer table address" hexmask.long.word 0x4 3.--15. 1. "BUFFTB,ADC clock mode" line.long 0x8 "LPMCTRLSTS,LPM control and status register" hexmask.long.byte 0x8 4.--7. 1. "BESL,BESL Value" rbitfld.long 0x8 3. "REMWAKE,bRemoteWake Value" "0,1" bitfld.long 0x8 1. "LPMACKEN,LPM Support Acknowledge Enable" "0,1" bitfld.long 0x8 0. "LPMEN,LPM Support Enable" "0,1" line.long 0xC "BCD,Battery charging detector register" bitfld.long 0xC 15. "DPPUCTRL,DP Pull-up Control" "0,1" rbitfld.long 0xC 7. "DMPUDFLG,DM Pull-up Detection Status Flag" "0,1" rbitfld.long 0xC 6. "SDFLG,Secondary Detection Status Flag" "0,1" rbitfld.long 0xC 5. "PDFLG,Primary Detection Status Flag" "0,1" rbitfld.long 0xC 4. "DCDFLG,Data Contact Detection Status Flag" "0,1" bitfld.long 0xC 3. "SDEN,Secondary Detection Mode Enable" "0,1" bitfld.long 0xC 2. "PDEN,Primary Detection Mode Enable" "0,1" bitfld.long 0xC 1. "DCDEN,Data Contact Detection ModewEnable" "0,1" bitfld.long 0xC 0. "BCDEN,Battery Charging Detector Enable" "0,1" group.long 0x0++0x1F line.long 0x0 "EP0,endpoint register 0" bitfld.long 0x0 15. "CTFR,Correct Transfer Flag for Reception" "0,1" bitfld.long 0x0 14. "RXDTOG,Data Toggle for Reception Transfers" "0,1" bitfld.long 0x0 12.--13. "RXSTS,Status Bits for Reception Transfers" "0,1,2,3" bitfld.long 0x0 11. "SETUP,Setup Transaction Completed" "0,1" bitfld.long 0x0 9.--10. "TYPE,Endpoint Type" "0,1,2,3" bitfld.long 0x0 8. "KIND,Endpoint Kind" "0,1" bitfld.long 0x0 7. "CTFT,Correct Transfer Flag for Transmission" "0,1" bitfld.long 0x0 6. "TXDTOG,Data Toggle for Transmission Transfers" "0,1" bitfld.long 0x0 4.--5. "TXSTS,Status Bits for Transmission Transfers" "0,1,2,3" newline hexmask.long.byte 0x0 0.--3. 1. "ADDR,Endpoint Address" line.long 0x4 "EP1,endpoint register 1" bitfld.long 0x4 15. "CTFR,Correct Transfer Flag for Reception" "0,1" bitfld.long 0x4 14. "RXDTOG,Data Toggle for Reception Transfers" "0,1" bitfld.long 0x4 12.--13. "RXSTS,Status Bits for Reception Transfers" "0,1,2,3" bitfld.long 0x4 11. "SETUP,Setup Transaction Completed" "0,1" bitfld.long 0x4 9.--10. "TYPE,Endpoint Type" "0,1,2,3" bitfld.long 0x4 8. "KIND,Endpoint Kind" "0,1" bitfld.long 0x4 7. "CTFT,Correct Transfer Flag for Transmission" "0,1" bitfld.long 0x4 6. "TXDTOG,Data Toggle for Transmission Transfers" "0,1" bitfld.long 0x4 4.--5. "TXSTS,Status Bits for Transmission Transfers" "0,1,2,3" newline hexmask.long.byte 0x4 0.--3. 1. "ADDR,Endpoint Address" line.long 0x8 "EP2,endpoint register 2" bitfld.long 0x8 15. "CTFR,Correct Transfer Flag for Reception" "0,1" bitfld.long 0x8 14. "RXDTOG,Data Toggle for Reception Transfers" "0,1" bitfld.long 0x8 12.--13. "RXSTS,Status Bits for Reception Transfers" "0,1,2,3" bitfld.long 0x8 11. "SETUP,Setup Transaction Completed" "0,1" bitfld.long 0x8 9.--10. "TYPE,Endpoint Type" "0,1,2,3" bitfld.long 0x8 8. "KIND,Endpoint Kind" "0,1" bitfld.long 0x8 7. "CTFT,Correct Transfer Flag for Transmission" "0,1" bitfld.long 0x8 6. "TXDTOG,Data Toggle for Transmission Transfers" "0,1" bitfld.long 0x8 4.--5. "TXSTS,Status Bits for Transmission Transfers" "0,1,2,3" newline hexmask.long.byte 0x8 0.--3. 1. "ADDR,Endpoint Address" line.long 0xC "EP3,endpoint register 3" bitfld.long 0xC 15. "CTFR,Correct Transfer Flag for Reception" "0,1" bitfld.long 0xC 14. "RXDTOG,Data Toggle for Reception Transfers" "0,1" bitfld.long 0xC 12.--13. "RXSTS,Status Bits for Reception Transfers" "0,1,2,3" bitfld.long 0xC 11. "SETUP,Setup Transaction Completed" "0,1" bitfld.long 0xC 9.--10. "TYPE,Endpoint Type" "0,1,2,3" bitfld.long 0xC 8. "KIND,Endpoint Kind" "0,1" bitfld.long 0xC 7. "CTFT,Correct Transfer Flag for Transmission" "0,1" bitfld.long 0xC 6. "TXDTOG,Data Toggle for Transmission Transfers" "0,1" bitfld.long 0xC 4.--5. "TXSTS,Status Bits for Transmission Transfers" "0,1,2,3" newline hexmask.long.byte 0xC 0.--3. 1. "ADDR,Endpoint Address" line.long 0x10 "EP4,endpoint register 4" bitfld.long 0x10 15. "CTFR,Correct Transfer Flag for Reception" "0,1" bitfld.long 0x10 14. "RXDTOG,Data Toggle for Reception Transfers" "0,1" bitfld.long 0x10 12.--13. "RXSTS,Status Bits for Reception Transfers" "0,1,2,3" bitfld.long 0x10 11. "SETUP,Setup Transaction Completed" "0,1" bitfld.long 0x10 9.--10. "TYPE,Endpoint Type" "0,1,2,3" bitfld.long 0x10 8. "KIND,Endpoint Kind" "0,1" bitfld.long 0x10 7. "CTFT,Correct Transfer Flag for Transmission" "0,1" bitfld.long 0x10 6. "TXDTOG,Data Toggle for Transmission Transfers" "0,1" bitfld.long 0x10 4.--5. "TXSTS,Status Bits for Transmission Transfers" "0,1,2,3" newline hexmask.long.byte 0x10 0.--3. 1. "ADDR,Endpoint Address" line.long 0x14 "EP5,endpoint register 5" bitfld.long 0x14 15. "CTFR,Correct Transfer Flag for Reception" "0,1" bitfld.long 0x14 14. "RXDTOG,Data Toggle for Reception Transfers" "0,1" bitfld.long 0x14 12.--13. "RXSTS,Status Bits for Reception Transfers" "0,1,2,3" bitfld.long 0x14 11. "SETUP,Setup Transaction Completed" "0,1" bitfld.long 0x14 9.--10. "TYPE,Endpoint Type" "0,1,2,3" bitfld.long 0x14 8. "KIND,Endpoint Kind" "0,1" bitfld.long 0x14 7. "CTFT,Correct Transfer Flag for Transmission" "0,1" bitfld.long 0x14 6. "TXDTOG,Data Toggle for Transmission Transfers" "0,1" bitfld.long 0x14 4.--5. "TXSTS,Status Bits for Transmission Transfers" "0,1,2,3" newline hexmask.long.byte 0x14 0.--3. 1. "ADDR,Endpoint Address" line.long 0x18 "EP6,endpoint register 6" bitfld.long 0x18 15. "CTFR,Correct Transfer Flag for Reception" "0,1" bitfld.long 0x18 14. "RXDTOG,Data Toggle for Reception Transfers" "0,1" bitfld.long 0x18 12.--13. "RXSTS,Status Bits for Reception Transfers" "0,1,2,3" bitfld.long 0x18 11. "SETUP,Setup Transaction Completed" "0,1" bitfld.long 0x18 9.--10. "TYPE,Endpoint Type" "0,1,2,3" bitfld.long 0x18 8. "KIND,Endpoint Kind" "0,1" bitfld.long 0x18 7. "CTFT,Correct Transfer Flag for Transmission" "0,1" bitfld.long 0x18 6. "TXDTOG,Data Toggle for Transmission Transfers" "0,1" bitfld.long 0x18 4.--5. "TXSTS,Status Bits for Transmission Transfers" "0,1,2,3" newline hexmask.long.byte 0x18 0.--3. 1. "ADDR,Endpoint Address" line.long 0x1C "EP7,endpoint register 7" bitfld.long 0x1C 15. "CTFR,Correct Transfer Flag for Reception" "0,1" bitfld.long 0x1C 14. "RXDTOG,Data Toggle for Reception Transfers" "0,1" bitfld.long 0x1C 12.--13. "RXSTS,Status Bits for Reception Transfers" "0,1,2,3" bitfld.long 0x1C 11. "SETUP,Setup Transaction Completed" "0,1" bitfld.long 0x1C 9.--10. "TYPE,Endpoint Type" "0,1,2,3" bitfld.long 0x1C 8. "KIND,Endpoint Kind" "0,1" bitfld.long 0x1C 7. "CTFT,Correct Transfer Flag for Transmission" "0,1" bitfld.long 0x1C 6. "TXDTOG,Data Toggle for Transmission Transfers" "0,1" bitfld.long 0x1C 4.--5. "TXSTS,Status Bits for Transmission Transfers" "0,1,2,3" newline hexmask.long.byte 0x1C 0.--3. 1. "ADDR,Endpoint Address" group.word 0x400++0x3F line.word 0x0 "TXADDR0,Transmission buffer address register 0" hexmask.word 0x0 1.--15. 1. "ADDR,Transmission Buffer Address" line.word 0x2 "TXCNT0,Transmission byte count register 0" hexmask.word 0x2 0.--9. 1. "CNT,Transmission Byte Count" line.word 0x4 "RXADDR0,Reception buffer address register 0" hexmask.word 0x4 1.--15. 1. "ADDR,Reception Buffer Address" line.word 0x6 "RXCNT0,Transmission byte count register 0" bitfld.word 0x6 15. "BLKSIZE,Block Size" "0,1" hexmask.word.byte 0x6 10.--14. 1. "BLKNUM,Number of Blocks" hexmask.word 0x6 0.--9. 1. "CNT,Reception Byte Count" line.word 0x8 "TXADDR1,Transmission buffer address register 0" hexmask.word 0x8 1.--15. 1. "ADDR,Transmission Buffer Address" line.word 0xA "TXCNT1,Transmission byte count register 0" hexmask.word 0xA 0.--9. 1. "CNT,Transmission Byte Count" line.word 0xC "RXADDR1,Reception buffer address register 0" hexmask.word 0xC 1.--15. 1. "ADDR,Reception Buffer Address" line.word 0xE "RXCNT1,Transmission byte count register 0" bitfld.word 0xE 15. "BLKSIZE,Block Size" "0,1" hexmask.word.byte 0xE 10.--14. 1. "BLKNUM,Number of Blocks" hexmask.word 0xE 0.--9. 1. "CNT,Reception Byte Count" line.word 0x10 "TXADDR2,Transmission buffer address register 0" hexmask.word 0x10 1.--15. 1. "ADDR,Transmission Buffer Address" line.word 0x12 "TXCNT2,Transmission byte count register 0" hexmask.word 0x12 0.--9. 1. "CNT,Transmission Byte Count" line.word 0x14 "RXADDR2,Reception buffer address register 0" hexmask.word 0x14 1.--15. 1. "ADDR,Reception Buffer Address" line.word 0x16 "RXCNT2,Transmission byte count register 0" bitfld.word 0x16 15. "BLKSIZE,Block Size" "0,1" hexmask.word.byte 0x16 10.--14. 1. "BLKNUM,Number of Blocks" hexmask.word 0x16 0.--9. 1. "CNT,Reception Byte Count" line.word 0x18 "TXADDR3,Transmission buffer address register 0" hexmask.word 0x18 1.--15. 1. "ADDR,Transmission Buffer Address" line.word 0x1A "TXCNT3,Transmission byte count register 0" hexmask.word 0x1A 0.--9. 1. "CNT,Transmission Byte Count" line.word 0x1C "RXADDR3,Reception buffer address register 0" hexmask.word 0x1C 1.--15. 1. "ADDR,Reception Buffer Address" line.word 0x1E "RXCNT3,Transmission byte count register 0" bitfld.word 0x1E 15. "BLKSIZE,Block Size" "0,1" hexmask.word.byte 0x1E 10.--14. 1. "BLKNUM,Number of Blocks" hexmask.word 0x1E 0.--9. 1. "CNT,Reception Byte Count" line.word 0x20 "TXADDR4,Transmission buffer address register 0" hexmask.word 0x20 1.--15. 1. "ADDR,Transmission Buffer Address" line.word 0x22 "TXCNT4,Transmission byte count register 0" hexmask.word 0x22 0.--9. 1. "CNT,Transmission Byte Count" line.word 0x24 "RXADDR4,Reception buffer address register 0" hexmask.word 0x24 1.--15. 1. "ADDR,Reception Buffer Address" line.word 0x26 "RXCNT4,Transmission byte count register 0" bitfld.word 0x26 15. "BLKSIZE,Block Size" "0,1" hexmask.word.byte 0x26 10.--14. 1. "BLKNUM,Number of Blocks" hexmask.word 0x26 0.--9. 1. "CNT,Reception Byte Count" line.word 0x28 "TXADDR5,Transmission buffer address register 0" hexmask.word 0x28 1.--15. 1. "ADDR,Transmission Buffer Address" line.word 0x2A "TXCNT5,Transmission byte count register 0" hexmask.word 0x2A 0.--9. 1. "CNT,Transmission Byte Count" line.word 0x2C "RXADDR5,Reception buffer address register 0" hexmask.word 0x2C 1.--15. 1. "ADDR,Reception Buffer Address" line.word 0x2E "RXCNT5,Transmission byte count register 0" bitfld.word 0x2E 15. "BLKSIZE,Block Size" "0,1" hexmask.word.byte 0x2E 10.--14. 1. "BLKNUM,Number of Blocks" hexmask.word 0x2E 0.--9. 1. "CNT,Reception Byte Count" line.word 0x30 "TXADDR6,Transmission buffer address register 0" hexmask.word 0x30 1.--15. 1. "ADDR,Transmission Buffer Address" line.word 0x32 "TXCNT6,Transmission byte count register 0" hexmask.word 0x32 0.--9. 1. "CNT,Transmission Byte Count" line.word 0x34 "RXADDR6,Reception buffer address register 0" hexmask.word 0x34 1.--15. 1. "ADDR,Reception Buffer Address" line.word 0x36 "RXCNT6,Transmission byte count register 0" bitfld.word 0x36 15. "BLKSIZE,Block Size" "0,1" hexmask.word.byte 0x36 10.--14. 1. "BLKNUM,Number of Blocks" hexmask.word 0x36 0.--9. 1. "CNT,Reception Byte Count" line.word 0x38 "TXADDR7,Transmission buffer address register 0" hexmask.word 0x38 1.--15. 1. "ADDR,Transmission Buffer Address" line.word 0x3A "TXCNT7,Transmission byte count register 0" hexmask.word 0x3A 0.--9. 1. "CNT,Transmission Byte Count" line.word 0x3C "RXADDR7,Reception buffer address register 0" hexmask.word 0x3C 1.--15. 1. "ADDR,Reception Buffer Address" line.word 0x3E "RXCNT7,Transmission byte count register 0" bitfld.word 0x3E 15. "BLKSIZE,Block Size" "0,1" hexmask.word.byte 0x3E 10.--14. 1. "BLKNUM,Number of Blocks" hexmask.word 0x3E 0.--9. 1. "CNT,Reception Byte Count" tree.end endif tree "WWDT (Window Watchdog Timer)" base ad:0x40002C00 group.long 0x0++0xB line.long 0x0 "CTRL,Control register" bitfld.long 0x0 7. "WWDTEN,Activation bit" "0,1" hexmask.long.byte 0x0 0.--6. 1. "CNT,7-bit counter" line.long 0x4 "CFG,Configuration register" bitfld.long 0x4 9. "EWIEN,Early wakeup interrupt" "0,1" bitfld.long 0x4 7.--8. "TBPSC,Timer base" "0,1,2,3" hexmask.long.byte 0x4 0.--6. 1. "WIN,7-bit window value" line.long 0x8 "STS,Status register" bitfld.long 0x8 0. "EWIFLG,Early wakeup interrupt flag" "0,1" tree.end AUTOINDENT.OFF