; -------------------------------------------------------------------------------- ; @Title: AM335x-CM3 On-Chip Peripherals ; @Props: Released ; @Author: MAF, PIW ; @Changelog: 2017-03-27 MAF ; 2022-05-17 PIW ; @Manufacturer: TI - Texas Instruments ; @Doc: spruh73o.pdf: (Rev. O, 2016-09) ; @Core: Cortex-M3, Cortex-A8, PRU ; @Chip: AM3351-CM3 AM3352-CM3 AM3354-CM3 AM3356-CM3 AM3357-CM3 AM3358-CM3 ; AM3359-CM3 AM335X-ICSS ; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: peram335xcm3.per 14787 2022-05-17 12:27:09Z kwisniewski $ ; Known problems ; MODULE REGISTER DESCRIPTION ; eQEP QFRC UPEVNT bitfld is read and Write 1 to clear at same time ; UART UART_MSR This registers are available depending on UART_EFR and UART_MCR register, ; UART_TCR but in Operation Mode and Mode A UART_EFR do not exist, ; UART_XOFF1 in mode B the UART_MCR register does not exist. Only bit in existing register is checked. ; UART FCR In operation mode DLL and DLH does not exist and are not checked. ; UART TCR In mode B MCR reg cannot be checked. It does not exist ; I2C I2C_SYSS RDONE bit is R/W and R. ; CM_WKUP CM_CLKMODE_DPLL_(x) DPLL_REGM4XEN bit in Rev. j was rbitfld, in Rev. o is "Returns0s" like it would be WOnly. In PER it is left as R/W ; PRM_DEVICE PRM_RSTCTRL both bits are "Returns0s" - left as R/W ; EDMA_EDMA3CC PID Register length is 16 bits, but description says it is 32 bit long ; I2C I2C_IRQSTATUS_RAW XUDF,AAS,BF bitflds are R/W and RO at the same time sif (CORENAME()=="CORTEXA8") tree "Core Registers (Cortex-A8)" width 0x8 ; -------------------------------------------------------------------------------- ; Identification registers ; -------------------------------------------------------------------------------- tree "ID Registers" rgroup c15:0x0--0x0 line.long 0x0 "MIDR,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH , Architecture" "Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 0x1 " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup c15:0x100--0x100 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 29.--31. " FORMAT ,Format" "Not ARMv7,Not ARMv7,Not ARMv7,Not ARMv7,ARMv7,Not ARMv7,Not ARMv7,Not ARMv7" bitfld.long 0x0 16.--19. " DMINLINE ,D-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words" bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,ASID,Virtual,Physical" textline " " bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words" rgroup c15:0x200--0x200 line.long 0x0 "TCMTR,Tighly-Coupled Memory Type Register" bitfld.long 0x0 29.--31. " FORMAT ,Format" "ARMv6,ARMv6,ARMv6,ARMv6,ARMv7,ARMv6,ARMv6,ARMv6" bitfld.long 0x0 16.--19. " DTCMS ,Data Banks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0.--3. " ITCMS ,Instruction Banks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup c15:0x300--0x300 line.long 0x0 "TLBTR,TLB Type Register" hexmask.long.byte 0x0 16.--23. 0x1 " ITLBLOCK ,Specifies the number of instruction TLB lockable entries" hexmask.long.byte 0x0 8.--15. 0x1 " DTLBLOCK ,Specifies the number of unified or data TLB lockable entries" bitfld.long 0x0 0. " S ,Unified or Separate TLBs" "Unified,Separate" rgroup c15:0x400--0x400 line.long 0x0 "MPUTR,MPU type register" rgroup c15:0x500--0x500 line.long 0x0 "MPIDR,Multiprocessor Affinity Register" hexmask.long.byte 0x00 16.--23. 1. " AFFL2 ,Affitniy Level 2" hexmask.long.byte 0x00 8.--15. 1. " AFFL1 ,Affitniy Level 1" hexmask.long.byte 0x00 0.--7. 1. " AFFL0 ,Affitniy Level 0" textline " " rgroup c15:0x0410++0x00 line.long 0x00 "MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. " IT ,Instruction Type Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " ACR ,Auxiliary Control Register Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " CC_PLEA ,Cache Coherency With PLE Agent/Shared Memory Support" "Not supported,?..." bitfld.long 0x00 8.--11. " CC_CPUA ,Cache Coherency Support With CPU Agent/Shared Memory Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Supported,?..." rgroup c15:0x0510++0x00 line.long 0x00 "MMFR1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. " BTB ,Branch Target Buffer Support" "Reserved,Reserved,Not required,?..." bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Supported,?..." textline " " bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Supported,?..." textline " " bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Harvard Architecture" "Supported,?..." rgroup c15:0x0610++0x00 line.long 0x00 "MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,?..." bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." rgroup c15:0x0710++0x00 line.long 0x00 "MMFR3,Memory Model Feature Register 3" bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache by MVA/Clean by MVA/Invalidate and Clean by MVA/Invalidate All Support" "Reserved,Supported,?..." rgroup c15:0x0020++0x00 line.long 0x00 "ISAR0,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,?..." bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..." bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " AI ,Atomic Load and Store Instructions Support" "Reserved,Supported,?..." rgroup c15:0x0120++0x00 line.long 0x00 "ISAR1,Instruction Set Attribute Register 1" bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " INTI ,Instructions That Branch Between ARM and Thumb Code Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " EXTI ,Sign or Zero Extend Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " ENDI ,Endianness Control Instructions Support" "Reserved,Supported,?..." rgroup c15:0x0220++0x00 line.long 0x00 "ISAR2,Instruction Set Attribute Register 2" bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Supported,?..." textline " " bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Reserved,Supported,?..." rgroup c15:0x0320++0x00 line.long 0x00 "ISAR3,Instruction Set Attribute Register 3" bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " SWII ,SWI Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Reserved,Supported,?..." rgroup c15:0x0420++0x00 line.long 0x00 "ISAR4,Instruction Set Attribute Register 4" bitfld.long 0x00 20.--23. " EI ,Exclusive Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " SMII ,SMI Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..." rgroup c15:0x0520++0x00 line.long 0x00 "ISAR5,Instruction Set Attribute Registers 5 (Reserved)" rgroup c15:0x0620++0x00 line.long 0x00 "ISAR6,Instruction Set Attribute Registers 6 (Reserved)" rgroup c15:0x0720++0x00 line.long 0x00 "ISAR7,Instruction Set Attribute Registers 7 (Reserved)" rgroup c15:0x0010++0x00 line.long 0x00 "PFR0,Processor Feature Register 0" bitfld.long 0x00 12.--15. " STATE3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " STATE2 ,Java Extension Interface Support" "Not supported,?..." bitfld.long 0x00 4.--7. " STATE1 ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " STATE0 ,ARM Instruction Set Support" "Reserved,Supported,?..." rgroup c15:0x0110++0x00 line.long 0x00 "PFR1,Processor Feature Register 1" bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Supported,?..." bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..." textline " " rgroup c15:0x0210++0x00 line.long 0x00 "DFR0,Debug Feature Register 0" bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,?..." bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." textline " " bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Not supported,?..." bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Not supported,?..." rgroup c15:0x0310++0x00 line.long 0x00 "AFR0,Auxiliary Feature Register 0" hexmask.long 0x00 0.--31. 1. " AF ,Auxiliary Feature" tree.end width 0x8 tree "System Control and Configuration" group c15:0x1--0x1 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 27. " NMFI ,DNonmaskable Fast Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big" bitfld.long 0x0 24. " VE ,Vector Enable" "Not vectored,Vectored" bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" textline " " bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disable,Enable" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disable,Enable" textline " " bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disable,Enable" bitfld.long 0x0 1. " A ,Strict Alignment" "Disable,Enable" bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disable,Enable" textline " " group c15:0x101--0x101 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 31. " L2RD ,L2 hardware reset disable" "Enable,Disable" bitfld.long 0x00 30. " L1RD ,L1 hardware reset disable" "Enable,Disable" textline " " bitfld.long 0x00 18. " CPISEL ,CP14/CP15 instruction serialization" "No,Yes" bitfld.long 0x00 17. " CPWAI ,CP14/CP15 wait on idle" "No,Yes" bitfld.long 0x00 16. " CPFL ,CP14/CP15 pipeline flush" "No,Yes" textline " " bitfld.long 0x00 15. " FETMCLK ,Force ETM clock" "No,Yes" bitfld.long 0x00 14. " FNCLK ,Force NEON clock" "No,Yes" bitfld.long 0x00 13. " FMCLK ,Force main clock" "No,Yes" textline " " bitfld.long 0x00 12. " FNSI ,Force NEON single issue" "No,Yes" bitfld.long 0x00 11. " FLSSI ,Force load/store single issue" "No,Yes" bitfld.long 0x00 10. " FSI ,Force single issue" "No,Yes" textline " " bitfld.long 0x00 9. " PLDNOP ,PLD executes as NOP" "Execute,NOP" bitfld.long 0x00 8. " WFINOP ,WFI executes as NOP" "Execute,NOP" textline " " bitfld.long 0x00 7. " DBSM ,Disable branch size mispredicts" "Enable,Disable" bitfld.long 0x00 6. " IBE ,Invalidate BTB Enable" "Disable,Enable" textline " " bitfld.long 0x00 5. " L1NEON ,NEON Data Caching Within the L1 Data Cache Enable" "Disable,Enable" bitfld.long 0x00 4. " ASA ,Speculative Accesses on AXI Enable" "Disable,Enable" textline " " bitfld.long 0x00 3. " L1PE ,L1 Cache Parity Detection Enable" "Disable,Enable" bitfld.long 0x00 1. " L2EN ,L2 Cache Enable" "Disable,Enable" bitfld.long 0x00 0. " L1ALIAS ,L1 Data Cache Hardware Alias Checks Enable" "Enable,Disable" group c15:0x201--0x201 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 26.--27. " CP13 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x0 24.--25. " CP12 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" textline " " bitfld.long 0x0 22.--23. " CP11 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x0 20.--21. " CP10 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" textline " " bitfld.long 0x0 18.--19. " CP9 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x0 16.--17. " CP8 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" textline " " bitfld.long 0x0 14.--15. " CP7 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x0 12.--13. " CP6 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" textline " " bitfld.long 0x0 10.--11. " CP5 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x0 8.--9. " CP4 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" textline " " bitfld.long 0x0 6.--7. " CP3 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x0 4.--5. " CP2 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" textline " " bitfld.long 0x0 2.--3. " CP1 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x0 0.--1. " CP0 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" textline " " group c15:0x11--0x11 line.long 0x0 "SCR,Secure Configuration Register" bitfld.long 0x00 5. " AW ,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed" bitfld.long 0x00 4. " FW ,FW-bit controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed" textline " " bitfld.long 0x00 3. " EA ,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor" bitfld.long 0x00 2. " FIQ ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor" textline " " bitfld.long 0x00 1. " IRQ ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor" bitfld.long 0x00 0. " NS ,Secure mode " "Secure,Non-secure" group c15:0x111--0x111 line.long 0x0 "SDER,Secure Debug Enable Register" bitfld.long 0x00 1. " SUNIDEN ,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted" bitfld.long 0x00 0. " SUIDEN ,Invasive Secure User Debug Enable bit" "Denied,Permitted" group c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 18. " PLE ,PLE Registers Access in Nonsecure World" "Denied,Permitted" bitfld.long 0x00 17. " TL ,Lockable Page Table Entries Allocation in Nonsecure World" "Denied,Permitted" textline " " bitfld.long 0x00 16. " CL ,Lockdown Entries Allocation Within the L2 Cache in Nonsecure World" "Denied,Permitted" textline " " bitfld.long 0x00 13. " CP13 ,Coprocessor 13 in the Nonsecure World Access Permission" "Denied,Permitted" bitfld.long 0x00 12. " CP12 ,Coprocessor 12 in the Nonsecure World Access Permission" "Denied,Permitted" textline " " bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Nonsecure World Access Permission" "Denied,Permitted" bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Nonsecure World Access Permission" "Denied,Permitted" textline " " bitfld.long 0x00 9. " CP9 ,Coprocessor 9 in the Nonsecure World Access Permission" "Denied,Permitted" bitfld.long 0x00 8. " CP8 ,Coprocessor 8 in the Nonsecure World Access Permission" "Denied,Permitted" textline " " bitfld.long 0x00 7. " CP7 ,Coprocessor 7 in the Nonsecure World Access Permission" "Denied,Permitted" bitfld.long 0x00 6. " CP6 ,Coprocessor 6 in the Nonsecure World Access Permission" "Denied,Permitted" textline " " bitfld.long 0x00 5. " CP5 ,Coprocessor 5 in the Nonsecure World Access Permission" "Denied,Permitted" bitfld.long 0x00 4. " CP4 ,Coprocessor 4 in the Nonsecure World Access Permission" "Denied,Permitted" textline " " bitfld.long 0x00 3. " CP3 ,Coprocessor 3 in the Nonsecure World Access Permission" "Denied,Permitted" bitfld.long 0x00 2. " CP2 ,Coprocessor 2 in the Nonsecure World Access Permission" "Denied,Permitted" textline " " bitfld.long 0x00 1. " CP1 ,Coprocessor 1 in the Nonsecure World Access Permission" "Denied,Permitted" bitfld.long 0x00 0. " CP0 ,Coprocessor 0 in the Nonsecure World Access Permission" "Denied,Permitted" textline " " group c15:0x000c++0x00 line.long 0x00 "VBAR,Secure or Nonsecure Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " VBA ,Base Address" group c15:0x10c--0x10c line.long 0x0 "MVBAR,Monitor Vector Base Address Register" hexmask.long.long 0x00 5.--31. 0x20 " MVBA , Monitor Vector Base Address" textline " " rgroup c15:0x1C--0x1C line.long 0x0 "ISR,Interrupt status Register" bitfld.long 0x0 8. " A ,Pending External Abort" "Not pending,Pending" bitfld.long 0x0 7. " I ,Pending IRQ" "Not pending,Pending" bitfld.long 0x0 6. " F ,Pending FIQ" "Not pending,Pending" tree.end width 0x0d tree "Memory Management Unit" width 8. group c15:0x1--0x1 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disable,Enable" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disable,Enable" bitfld.long 0x0 27. " NMFI ,DNonmaskable Fast Interrupt enable" "Disable,Enable" textline " " bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big" bitfld.long 0x0 24. " VE ,Vector Enable" "Not vectored,Vectored" bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" textline " " bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disable,Enable" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disable,Enable" textline " " bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disable,Enable" bitfld.long 0x0 1. " A ,Strict Alignment" "Disable,Enable" bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disable,Enable" textline " " group c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Register 0" hexmask.long 0x00 14.--31. 0x4000 " TTB0 ,Translation Table Base Address" bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Back/allocated,Through,Back/not allocated" textline " " bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared" bitfld.long 0x00 0. " C ,Page Table Walk Inner Cacheable" "Noncacheable,Cacheable" group c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Register 1" hexmask.long 0x00 14.--31. 0x4000 " TTB1 ,Translation Table Base Address" bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Back/allocated,Through,Back/not allocated" textline " " bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared" bitfld.long 0x00 0. " C ,Page Table Walk Inner Cacheable" "Noncacheable,Cacheable" group c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 5. " PD1 ,Page Table Walk on a TLB Miss When Using Translation Table Base Register 1" "Enable,Disable" bitfld.long 0x00 4. " PD0 ,Page Table Walk on a TLB Miss When Using Translation Table Base Register 0" "Enable,Disable" bitfld.long 0x0 0.--2. " N ,Translation Table Base Register 0 page table boundary size" "Off,0x80000000,0x40000000,0x20000000,0x10000000,0x08000000,0x04000000,0x02000000" textline " " group c15:0x3--0x3 line.long 0x0 "DACR,Domain Access Control Register" bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager" bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager" bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager" bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager" bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager" bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager" bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager" bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager" textline " " group c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 11. " RW ,Access Caused an Abort Type" "Read,Write" bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. 12. " STATUS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Precise/decode,Domain/section,Reserved,Domain/page,L1/external/decode,Permission/section,L2/external/decode,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Imprecise/external/decode,Reserved,Imprecise/parity/ECC,Reserved,Reserved,Reserved,L1/parity,Reserved,L2/parity,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Precise/slave,Reserved,Reserved,Reserved,L1/external/slave,Reserved,L2/external/slave,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Imprecise/external/slave,?..." group c15:0x0006++0x00 line.long 0x00 "DFAR,Data Fault Address Register" group c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. 12. " STATUS ,Generated Exception Type" "Reserved,Reserved,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Precise/decode,Domain/section,Reserved,Domain/page,L1/external/decode,Permission/section,L2/external/decode,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Precise/parity,Reserved,Reserved,Reserved,L1/parity,Reserved,L2/parity,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Precise/slave,Reserved,Reserved,Reserved,L1/external/slave,Reserved,L2/external/slave,?..." group c15:0x0206++0x00 line.long 0x00 "IFAR,Instruction Fault Address Register" group c15:0x0015++0x00 line.long 0x00 "DAFSR,Data Auxiliary Fault Status Register" group c15:0x0115++0x00 line.long 0x00 "IAFSR,Instruction Auxiliary Fault Status Register" textline " " group c15:0x002A--0x002A line.long 0x00 "PMRRR,Primary Memory Region Remap Register" bitfld.long 0x00 19. " NS1 ,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped" bitfld.long 0x00 18. " NS0 ,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped" textline " " bitfld.long 0x00 17. " DS1 ,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped" bitfld.long 0x00 16. " DS0 ,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped" textline " " bitfld.long 0x00 14.--15. " TR7 ,{TEX[0] C B} = b111 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 12.--13. " TR6 ,{TEX[0] C B} = b110 Remap" "Strongly ordered,Device,Normal,UNP" textline " " bitfld.long 0x00 10.--11. " TR5 ,{TEX[0] C B} = b101 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 8.--9. " TR4 ,{TEX[0] C B} = b100 Remap" "Strongly ordered,Device,Normal,UNP" textline " " bitfld.long 0x00 6.--7. " TR3 ,{TEX[0] C B} = b011 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 4.--5. " TR2 ,{TEX[0] C B} = b010 Remap" "Strongly ordered,Device,Normal,UNP" textline " " bitfld.long 0x00 2.--3. " TR1 ,{TEX[0] C B} = b001 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 0.--1. " TR0 ,{TEX[0] C B} = b000 Remap" "Strongly ordered,Device,Normal,UNP" group c15:0x012A--0x012A line.long 0x00 "NMRR,Normal Memory Remap Register" bitfld.long 0x00 30.--31. " OR7 ,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 28.--29. " OR6 ,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 26.--27. " OR5 ,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 24.--25. " OR4 ,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 22.--23. " OR3 ,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 20.--21. " OR2 ,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 18.--19. " OR1 ,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 16.--17. " OR0 ,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 14.--15. " IR7 ,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 12.--13. " IR6 ,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 10.--11. " IR5 ,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 8.--9. " IR4 ,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 6.--7. " IR3 ,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 4.--5. " IR2 ,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 2.--3. " IR1 ,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 0.--1. " IR0 ,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" textline " " group c15:0x000d++0x00 line.long 0x00 "FCSEPID,FCSE PID Register" hexmask.long.byte 0x00 25.--31. 1. " FCSEPID ,Process for Fast Context Switch Identification and Specification" group c15:0x10d--0x10d line.long 0x0 "CONTEXT,Context ID Register" hexmask.long.tbyte 0x0 8.--31. 1. " PROCID ,Process ID" hexmask.long.byte 0x0 0.--7. 1. " ASID ,Application Space ID" group c15:0x020d++0x00 line.long 0x00 "URWTPID,User Read/Write Thread and Process ID Register" hexmask.long 0x00 0.--31. 1. " URWTPID ,User Read/Write Thread and Process ID" group c15:0x030d++0x00 line.long 0x00 "UROTPID,User Read-Only Thread and Process ID Register" hexmask.long 0x00 0.--31. 1. " UROTPID ,User Read-Only Thread and Process ID" group c15:0x040d++0x00 line.long 0x00 "POTPID,Privileged Only Thread and Process ID Register" hexmask.long 0x00 0.--31. 1. " POTPID ,Privileged Only Thread and Process ID" tree.end width 0xC tree "Cache Control and Configuration" rgroup c15:0x1100--0x1100 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 27.--29. " LOU ,Level of Unification" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8" bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8" textline " " bitfld.long 0x00 21.--23. " CTYPE8 ,Cache type for levels 8" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." bitfld.long 0x00 18.--20. " CTYPE7 ,Cache type for levels 7" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." textline " " bitfld.long 0x00 15.--17. " CTYPE6 ,Cache type for levels 6" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." bitfld.long 0x00 12.--14. " CTYPE5 ,Cache type for levels 5" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." textline " " bitfld.long 0x00 9.--11. " CTYPE4 ,Cache type for levels 4" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." bitfld.long 0x00 6.--8. " CTYPE3 ,Cache type for levels 3" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." textline " " bitfld.long 0x00 3.--5. " CTYPE2 ,Cache type for levels 2" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." bitfld.long 0x00 0.--2. " CTYPE1 ,Cache type for levels 1" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." rgroup c15:0x1000--0x1000 line.long 0x0 "CCSIDR,Current Cache Size ID Register" bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported" bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported" textline " " bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported" bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported" textline " " hexmask.long.word 0x00 13.--27. 1. 1. " SETS ,Number of Sets" hexmask.long.word 0x00 3.--12. 1. 1. " ASSOC ,Associativity" textline " " bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words" group c15:0x2000--0x2000 line.long 0x0 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. " LEVEL ,Level" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8" bitfld.long 0x00 0. " IND ,Instruction/Not Data" "Data/unified,Instruction" tree.end width 0x8 tree "L2 Cache Control and Configuration" group c15:0x1009++0x00 line.long 0x00 "L2CLR,L2 Cache Lockdown Register" bitfld.long 0x00 7. " LOCK_way_7 ,Way 7 of the L2 Cache Lockdown" "Not locked,Locked" bitfld.long 0x00 6. " LOCK_way_6 ,Way 6 of the L2 Cache Lockdown" "Not locked,Locked" bitfld.long 0x00 5. " LOCK_way_5 ,Way 5 of the L2 Cache Lockdown" "Not locked,Locked" textline " " bitfld.long 0x00 4. " LOCK_way_4 ,Way 4 of the L2 Cache Lockdown" "Not locked,Locked" bitfld.long 0x00 3. " LOCK_way_3 ,Way 3 of the L2 Cache Lockdown" "Not locked,Locked" bitfld.long 0x00 2. " LOCK_way_2 ,Way 2 of the L2 Cache Lockdown" "Not locked,Locked" textline " " bitfld.long 0x00 1. " LOCK_way_1 ,Way 1 of the L2 Cache Lockdown" "Not locked,Locked" bitfld.long 0x00 0. " LOCK_way_0 ,Way 0 of the L2 Cache Lockdown" "Not locked,Locked" group c15:0x1209++0x00 line.long 0x00 "L2CACR,L2 Cache Auxiliary Control Register" bitfld.long 0x00 28. " ECCP ,ECC/Parity Selection" "Parity,ECC" bitfld.long 0x00 27. " PLDFD ,PLD Forwarding to LS Request Disable" "Enabled,Disabled" bitfld.long 0x00 26. " PLDD ,PLD Disable" "Enabled,Disabled" textline " " bitfld.long 0x00 25. " WCD ,Write Combining Disable" "Enabled,Disabled" bitfld.long 0x00 24. " WADD ,External Linefill When Storing an Entire Line With Write Allocate Permission Disable" "Enabled,Disabled" bitfld.long 0x00 23. " WACD ,Combining of Data in the L2 Write Combining Buffers Disable" "Enabled,Disabled" textline " " bitfld.long 0x00 22. " WAD ,Allocate on Write Miss in L2 Disable" "Enabled,Disabled" bitfld.long 0x00 21. " PECCE ,Parity/ECC Enable" "Disabled,Enabled" bitfld.long 0x00 16. " L2I ,L2 Inner" "Outer,Inner" textline " " bitfld.long 0x00 6.--8. " TRAML ,Program Tag RAM Latency" "2 cycles,2 cycles,3 cycles,4 cycles,4 cycles,4 cycles,4 cycles,4 cycles" bitfld.long 0x00 0.--3. " DRAML ,Program Data RAM Latency" "3 cycles,3 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,13 cycles,13 cycles,13 cycles" textline " " rgroup c15:0x000b++0x00 line.long 0x00 "PLEISR0,PLE Identification and Status Register 0" bitfld.long 0x00 1. " CH1P ,Channel 1 Present" "Not present,Present" bitfld.long 0x00 0. " CH0P ,Channel 0 Present" "Not present,Present" rgroup c15:0x010b++0x00 line.long 0x00 "PLEISR1,PLE Identification and Status Register 1" bitfld.long 0x00 1. " CH1Q ,Channel 1 Queue" "Not queued,Queued" bitfld.long 0x00 0. " CH0Q ,Channel 0 Queue" "Not queued,Queued" rgroup c15:0x020b++0x00 line.long 0x00 "PLEISR2,PLE Identification and Status Register 2" bitfld.long 0x00 1. " CH1R ,Channel 1 Run" "Not running,Running" bitfld.long 0x00 0. " CH0R ,Channel 0 Run" "Not running,Running" rgroup c15:0x030b++0x00 line.long 0x00 "PLEISR3,PLE Identification and Status Register 3" bitfld.long 0x00 1. " CH1I ,Channel 1 Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " CH0I ,Channel 0 Interrupt" "No interrupt,Interrupt" group c15:0x001b++0x00 line.long 0x00 "PLEUAR,PLE User Accessibility Register" bitfld.long 0x00 1. " U1 ,User Mode Process Access Registers for Channel 1 Permission" "Not permitted,Permitted" bitfld.long 0x00 0. " U0 ,User Mode Process Access Registers for Channel 0 Permission" "Not permitted,Permitted" group c15:0x002b++0x00 line.long 0x00 "PLECNR,PLE Channel Number Register" bitfld.long 0x00 0. " CN ,PLE Channel Selection" "Channel 0,Channel 1" wgroup c15:0x003b++0x00 line.long 0x00 "PLEER0,PLE Enable Register 0" hexmask.long 0x00 0.--31. 1. " PLEE_STOP ,PLE Enable Stop" wgroup c15:0x013b++0x00 line.long 0x00 "PLEER1,PLE Enable Register 1" hexmask.long 0x00 0.--31. 1. " PLEE_START ,PLE Enable Start" wgroup c15:0x023b++0x00 line.long 0x00 "PLEER2,PLE Enable Register 2" hexmask.long 0x00 0.--31. 1. " PLEES_CLEAR ,PLE Enable Clear" group c15:0x004b++0x00 line.long 0x00 "PLECR,PLE Control Register" bitfld.long 0x00 30. " DT ,Transfer Direction" "Memory->cache,Cache->memory" bitfld.long 0x00 29. " IC ,Interrupt on Completion of the PLE Transfer" "No interrupt,Interrupt" bitfld.long 0x00 28. " IE ,Interrupt on an Error" "No interrupt,Interrupt" textline " " bitfld.long 0x00 26. " UM ,Permission Checks Type" "Privileged,User" bitfld.long 0x00 0.--2. " Wy ,L2 Cache Way for Filling Data" "Way 0,Way 1,Way 2,Way 3,Way 4,Way 5,Way 6,Way 7" textline " " group c15:0x005b++0x00 line.long 0x00 "PLEISAR,PLE Internal Start Address Register" hexmask.long 0x00 0.--31. 1. " PLEISA ,PLE Internal Start Address" group c15:0x007b++0x00 line.long 0x00 "PLEIEAR,PLE Internal End Address Register" hexmask.long.word 0x00 6.--17. 1. " Lines ,Number of Cache Lines Transferred" rgroup c15:0x008b++0x00 line.long 0x00 "PLECSR,PLE Channel Status Register" hexmask.long.byte 0x00 2.--8. 1. " EC ,External Address Error Status" bitfld.long 0x00 0.--1. " Status ,PLE Channel Status" "Idle,Queued,Running,Complete/error" group c15:0x00fb++0x00 line.long 0x00 "PLECIDR,PLE Context ID Register" hexmask.long.tbyte 0x00 8.--31. 1. " PROCID ,ASID Extension to Form the Process ID and Current Process Identification" hexmask.long.byte 0x00 0.--7. 1. " ASID ,ASID of the Current Process and the Current ASID Identification" tree.end width 12. tree "System Performance Monitor" group c15:0xC9--0xC9 line.long 0x0 "PMCR,Performance Monitor Control Register" hexmask.long.byte 0x00 24.--31. 1. " IMP ,Implementer code" hexmask.long.byte 0x00 16.--23. 1. " IDCODE ,Identification code" bitfld.long 0x00 11.--15. " N ,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5. " DP ,Disable CCNT when prohibited" "Enabled,Disabled" textline " " bitfld.long 0x00 4. " X ,Export Enabled" "Disabled,Enabled" bitfld.long 0x00 3. " D ,Clock Divider" "Every cycle,64th cycle" bitfld.long 0x00 2. " C ,Clock Counter Reset" "No action,Reset" bitfld.long 0x00 1. " P ,Performance Counter Reset" "No action,Reset" textline " " bitfld.long 0x00 0. " E ,Counters Enable" "Disabled,Enabled" group c15:0x1C9--0x1C9 line.long 0x0 "CNTENS,Count Enable Set Register" eventfld.long 0x00 31. " C ,CCNT Enabled / Enable / Disable CCNT" "Disabled,Enabled" eventfld.long 0x00 3. " P3 ,PMN3 Enabled / Enable / Disable counter" "Disabled,Enabled" eventfld.long 0x00 2. " P2 ,PMN2 Enabled / Enable / Disable counter" "Disabled,Enabled" eventfld.long 0x00 1. " P1 ,PMN1 Enabled / Enable / Disable counter" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,PMN0 Enabled / Enable / Disable counter" "Disabled,Enabled" group c15:0x2C9--0x2C9 line.long 0x0 "CNTENC,Count Enable Clear Register" eventfld.long 0x00 31. " C ,CCNT Enabled / Enable / Disable CCNT" "Disabled,Enabled" eventfld.long 0x00 3. " P3 ,PMN3 Enabled / Enable / Disable counter" "Disabled,Enabled" eventfld.long 0x00 2. " P2 ,PMN2 Enabled / Enable / Disable counter" "Disabled,Enabled" eventfld.long 0x00 1. " P1 ,PMN1 Enabled / Enable / Disable counter" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,PMN0 Enabled / Enable / Disable counter" "Disabled,Enabled" group c15:0x3C9--0x3C9 line.long 0x0 "FLAG,Overflow Flag Status Register" eventfld.long 0x00 31. " C ,CCNT overflowed" "No overflow,Overflow" eventfld.long 0x00 3. " P3 ,PMN3 overflowed" "No overflow,Overflow" eventfld.long 0x00 2. " P2 ,PMN2 overflowed" "No overflow,Overflow" eventfld.long 0x00 1. " P1 ,PMN1 overflowed" "No overflow,Overflow" eventfld.long 0x00 0. " P0 ,PMN0 overflowed" "No overflow,Overflow" group c15:0x4C9--0x4C9 line.long 0x0 "SWINCR,Software Increment Register" eventfld.long 0x00 3. " P3 ,Increment PMN3" "No action,Increment" eventfld.long 0x00 2. " P2 ,Increment PMN2" "No action,Increment" eventfld.long 0x00 1. " P1 ,Increment PMN1" "No action,Increment" eventfld.long 0x00 0. " P0 ,Increment PMN0" "No action,Increment" group c15:0x5C9--0x5C9 line.long 0x0 "PMSELR,Performance Counter Selection Register" bitfld.long 0x00 0.--4. " SEL ,Selection value" "CNT0,CNT1,CNT2,CNT3,..." group c15:0xD9--0xD9 line.long 0x0 "PMCCNTR,Cycle Count Register" group c15:0x01d9++0x00 line.long 0x00 "PMXEVTYPER,Event Selection Register" hexmask.long.byte 0x00 0.--7. 1. " SEL ,Event Selection" group c15:0x02d9++0x00 line.long 0x00 "PMCNT,Performance Monitor Count Register" group c15:0xE9--0xE9 line.long 0x0 "PMUSERENR,User Enable Register" bitfld.long 0x00 0. " EN ,User Mode Enable" "Disabled,Enabled" group c15:0x1E9--0x1E9 line.long 0x0 "INTENS,Interrupt Enable Set Register" eventfld.long 0x00 31. " C ,Interrupt on CCNT Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled" eventfld.long 0x00 3. " P3 ,Interrupt on PMN3 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled" eventfld.long 0x00 2. " P2 ,Interrupt on PMN2 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled" eventfld.long 0x00 1. " P1 ,Interrupt on PMN1 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,Interrupt on PMN0 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled" group c15:0x2E9--0x2E9 line.long 0x0 "INTENC,Interrupt Enable Clear Register" eventfld.long 0x00 31. " C ,Interrupt on CCNT Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled" eventfld.long 0x00 3. " P3 ,Interrupt on PMN3 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled" eventfld.long 0x00 2. " P2 ,Interrupt on PMN2 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled" eventfld.long 0x00 1. " P1 ,Interrupt on PMN1 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,Interrupt on PMN0 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled" tree.end width 8. tree "Debug Registers" width 10. rgroup c14:0x000--0x000 line.long 0x0 "DBGDIDR,Debug ID Register" bitfld.long 0x0 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 24.--27. " BRP ,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 20.--23. " CONTEXT ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x0 16.--19. " VERSION ,Debug Architecture Version" "Reserved,ARMv6,ARMv6.1,ARMv7,?..." textline " " bitfld.long 0x0 13. " PCSAMPLE ,PC Sample register implemented" "Not implemented,Implemented" bitfld.long 0x0 12. " SECURITY ,Security Extensions implemented" "Not implemented,Implemented" textline " " bitfld.long 0x0 4.--7. " VARIANT ,Implementation-defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0.--3. " REVISION ,Implementation-defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " width 10. group c14:0x22--0x22 line.long 0x0 "DBGDSCR,Debug Status and Control Register" bitfld.long 0x0 30. " DTRRXFULL ,The DTRRX Full Flag" "Empty,Full" bitfld.long 0x0 29. " DTRTXfull ,The DTRTX Full Flag" "Empty,Full" textline " " bitfld.long 0x00 27. " DTRRXFULL_L ,The DTRRX Full Flag 1" "Empty,Full" bitfld.long 0x00 26. " DTRTXfull_l ,The DTRTX Full Flag 1" "Empty,Full" textline " " bitfld.long 0x0 25. " SPA ,Sticky Pipeline Advance" "No effect,Instruction retired" bitfld.long 0x0 24. " IC ,Instruction Complete" "Executing,Not executing" textline " " bitfld.long 0x0 20.--21. " DTR ,DTR Access Mode" "Non-blocking,Stall,Fast,?..." bitfld.long 0x0 19. " NSWS ,Imprecise Data Aborts discarded" "Not discarded,Discarded" textline " " bitfld.long 0x0 18. " NS ,Non-secure World Status" "Secured,Not secured" bitfld.long 0x0 17. " nSPNIDEN ,Secure Non-invasive Debug Disabled" "Enabled,Disabled" textline " " bitfld.long 0x0 16. " NSPIDEN ,Secure Invasive Debug Disabled" "Enabled,Disabled" bitfld.long 0x0 15. " MONITOR ,Monitor Debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0 14. " HDEn ,Halting Debug-mode enable" "Disabled,Enabled" bitfld.long 0x0 13. " EXECUTE ,Execute instruction enable" "Disabled,Enabled" textline " " bitfld.long 0x0 12. " COMMS ,User mode access to Comms Channel disable" "Enabled,Disabled" bitfld.long 0x0 11. " IntDis ,Disable Interrupts" "Enabled,Disabled" textline " " bitfld.long 0x0 10. " DBGACK ,Force Debug Acknowledge" "Not forced,Forced" bitfld.long 0x0 8. " UEXT ,Sticky Undefined Exception" "No exception,Exception" textline " " bitfld.long 0x0 7. " IABORT ,Sticky Imprecise Abort" "Not aborted,Aborted" bitfld.long 0x0 6. " PABORT ,Sticky Precise Abort" "Not aborted,Aborted" textline " " bitfld.long 0x0 2.--5. " MOE ,Method of Debug Entry" "Debug Entry,Breakpoint,Imprecise Watchpoint,BKPT instruction,External debug,Vector catch,Reserved,Reserved,OS Unlock,?..." bitfld.long 0x0 1. " RESTARTED ,Core Restarted" "Debug not exited,Debug exited" textline " " bitfld.long 0x0 0. " HALTED ,Core Halted" "Normal state,Debug state" textline " " width 10. if (((data.long(c14:0x00))&0x01000)==0x00000) group c14:0x007--0x007 line.long 0x0 "DBGVCR,Vector Catch Register" bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled" bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled" textline " " bitfld.long 0x0 4. " DABORT ,Vector Catch Enable Data Abort" "Disabled,Enabled" bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled" bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled" else group c14:0x007--0x007 line.long 0x0 "DBGVCR,Vector Catch Register" bitfld.long 0x0 31. " FIQN ,Vector Catch Enable FIQ (Non-secure)" "Disabled,Enabled" bitfld.long 0x0 30. " IRQN ,Vector Catch Enable IRQ (Non-secure)" "Disabled,Enabled" textline " " bitfld.long 0x0 28. " DABORTN ,Vector Catch Enable Data Abort (Non-secure)" "Disabled,Enabled" bitfld.long 0x0 27. " PABORTN ,Vector Catch Enable Prefetch abort (Non-secure)" "Disabled,Enabled" textline " " bitfld.long 0x0 26. " SWIN ,Vector Catch Enable SWI (Non-secure)" "Disabled,Enabled" bitfld.long 0x0 25. " UNDEFS ,Vector Catch Enable Undefined (Non-secure)" "Disabled,Enabled" textline " " bitfld.long 0x0 15. " FIQS ,Vector Catch Enable FIQ (Secure)" "Disabled,Enabled" bitfld.long 0x0 14. " IRQS ,Vector Catch Enable IRQ (Secure)" "Disabled,Enabled" textline " " bitfld.long 0x0 12. " DABORTS ,Vector Catch Enable Data Abort (Secure)" "Disabled,Enabled" bitfld.long 0x00 11. " PABORTS ,Vector Catch Enable Prefetch abort (Secure)" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " SMI ,Vector Catch Enable SMI (Secure)" "Disabled,Enabled" bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled" textline " " bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled" bitfld.long 0x0 4. " DABORT0 ,Vector Catch Enable Data Abort" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled" bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled" bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled" endif width 10. hgroup c14:0x020--0x020 hide.long 0x0 "DBGDTRRX,Debug Receive Register (External View)" in group c14:0x023--0x023 line.long 0x0 "DBGDTRTX,Debug Transmit Register (External View)" group c14:0x09++0x00 line.long 0x00 "DBGECR,Event Catch Register" bitfld.long 0x00 0. " OSUC ,OS Unlock Catch" "Disabled,Enabled" group c14:0x0a++0x00 line.long 0x00 "DBGDSCCR,Debug State Cache Control Register" bitfld.long 0x00 2. " NWT ,Not Write-Through" "Forced,Normal" bitfld.long 0x00 0. " DUCL ,Data and Unified Cache Linefill" "Disabled,Normal" wgroup c14:0x21++0x00 line.long 0x00 "DBGITR,Instruction Transfer Register" wgroup c14:0x24++0x00 line.long 0x00 "DBGDRCR,Debug Run Control Register" bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance" "Not cleared,Cleared" bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions" "Not cleared,Cleared" textline " " bitfld.long 0x00 1. " RR ,Restart Request" "Not requested,Requested" bitfld.long 0x00 0. " HR ,Halt Request" "Not requested,Requested" wgroup c14:0xc0++0x00 line.long 0x00 "DBGOSLAR,Operating System Lock Access Register" rgroup c14:0xc1++0x00 line.long 0x00 "DBGOSLSR,Operating System Lock Status Register" bitfld.long 0x00 2. " 32_BA ,32-Bit Access" "Not required,Required" bitfld.long 0x00 1. " LB ,Locked Bit" "Not locked,Locked" bitfld.long 0x00 0. " LIB ,Lock Implemented Bit" "Not implemented,Implemented" group c14:0xc2++0x00 line.long 0x00 "DBGOSSRR,Operating System Save and Restore Register" hexmask.long 0x00 0.--31. 1. " OSSR ,OS Save and Restore" group c14:0xc4++0x00 line.long 0x00 "DBGPRCR,Device Power-Down and Reset Control Register" bitfld.long 0x00 2. " HIR ,Hold Internal Reset" "Not held,Held" bitfld.long 0x00 1. " FIR ,Force Internal Reset" "Not forced,Forced" bitfld.long 0x00 0. " NPD ,No Power-Down" "DBGNOPWRDWN low,DBGNOPWRDWN high" hgroup c14:0xc5++0x00 hide.long 0x00 "DBGPRSR,Device Power-Down and Reset Status Register" in width 11. tree "Processor Identifier Registers" rgroup c14:0x340--0x340 line.long 0x00 "CPUID,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" hexmask.long.byte 0x0 20.--23. 0x1 " SPECREV ,Variant number" textline " " hexmask.long.byte 0x0 16.--19. 0x1 " ARCH , Architecture" hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number" textline " " hexmask.long.byte 0x0 0.--3. 0x1 " REV ,Layout Revision" rgroup c14:0x341--0x341 line.long 0x00 "CACHETYPE,Cache Type Register" bitfld.long 0x00 16.--19. " DMINLINE ,Words of Smallest Line Length in L1 or L2 Data Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..." bitfld.long 0x00 14.--15. " L1_IPOLICY ,VIPT Instruction Cache Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " IMINLINE ,Words of Smallest Line Length in L1 or L2 Instruction Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..." rgroup c14:0x343--0x343 line.long 0x00 "TLBTYPE,TLB Type Register" hexmask.long.byte 0x0 16.--23. 0x1 " ILSIZE ,Specifies the number of instruction TLB lockable entries" hexmask.long.byte 0x0 8.--15. 0x1 " DLSIZE ,Specifies the number of unified or data TLB lockable entries" textline " " bitfld.long 0x0 0. " U ,Unified or separate instruction TLBs" "Unified,Separate" rgroup c14:0x348--0x348 line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 12.--15. " STATE3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " STATE2 ,Java Extension Interface Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " STATE1 ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM Instruction Set Support" "Reserved,Supported,?..." rgroup c14:0x349--0x349 line.long 0x00 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Supported,?..." bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..." rgroup c14:0x34a--0x34a line.long 0x00 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,?..." bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Not supported,?..." bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Not supported,?..." rgroup c14:0x34b--0x34b line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" hexmask.long 0x00 0.--31. 1. " AF ,Auxiliary Feature" rgroup c14:0x34c--0x34c line.long 0x00 "ID_MMFR0,Processor Feature Register 0" bitfld.long 0x00 28.--31. " IT ,Instruction Type Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " ACR ,Auxiliary Control Register Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " CC_PLEA ,Cache Coherency With PLE Agent/Shared Memory Support" "Not supported,?..." bitfld.long 0x00 8.--11. " CC_CPUA ,Cache Coherency Support With CPU Agent/Shared Memory Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Supported,?..." rgroup c14:0x34d--0x34d line.long 0x00 "ID_MMFR1,Processor Feature Register 1" bitfld.long 0x00 28.--31. " BTB ,Branch Target Buffer Support" "Reserved,Reserved,Not required,?..." bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Supported,?..." textline " " bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Supported,?..." textline " " bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Harvard Architecture" "Supported,?..." rgroup c14:0x34e--0x34e line.long 0x00 "ID_MMFR2,Processor Feature Register 2" bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,?..." bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." rgroup c14:0x34f--0x34f line.long 0x00 "ID_MMFR3,Processor Feature Register 3" bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache by MVA/Clean by MVA/Invalidate and Clean by MVA/Invalidate All Support" "Reserved,Supported,?..." rgroup c14:0x350--0x350 line.long 0x00 "ID_ISAR0,ISA Feature Register 0" bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,?..." bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..." bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " AI ,Atomic Load and Store Instructions Support" "Reserved,Supported,?..." rgroup c14:0x351--0x351 line.long 0x00 "ID_ISAR1,ISA Feature Register 1" bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " INTI ,Instructions That Branch Between ARM and Thumb Code Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " EXTI ,Sign or Zero Extend Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " ENDI ,Endian Instructions Support" "Reserved,Supported,?..." rgroup c14:0x352--0x352 line.long 0x00 "ID_ISAR2,ISA Feature Register 2" bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Supported,?..." textline " " bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Reserved,Supported,?..." rgroup c14:0x353--0x353 line.long 0x00 "ID_ISAR3,ISA Feature Register 3" bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " SWII ,SWI Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Reserved,Supported,?..." rgroup c14:0x354--0x354 line.long 0x00 "ID_ISAR4,ISA Feature Register 4" bitfld.long 0x00 20.--23. " EI ,Exclusive Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " SMII ,SMI Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..." rgroup c14:0x355--0x355 line.long 0x00 "ID_ISAR5,ISA Feature Register 5" tree.end width 0xC tree "Coresight Management Registers" width 17. group c14:0x03bd++0x00 line.long 0x00 "DBGITCTRL_IOC,Integration Internal Output Control Register" bitfld.long 0x00 5. " I_DBGTRIGGER ,Internal DBGTRIGGER" "0,1" bitfld.long 0x00 4. " I_DBGRESTARTED ,Internal DBGRESTARTED" "0,1" textline " " bitfld.long 0x00 3. " I_nPMUIRQ ,Internal nPMUIRQ" "0,1" bitfld.long 0x00 2. " InternalCOMMTX ,Internal COMMTX" "0,1" textline " " bitfld.long 0x00 1. " I_COMMRX ,Internal COMMRX" "0,1" bitfld.long 0x00 0. " I_DBGACK ,Internal DBGACK" "0,1" group c14:0x03be++0x00 line.long 0x00 "DBGITCTRL_EOC,Integration External Output Control Register" bitfld.long 0x00 7. " NDMAEXTERRIQ ,External nDMAEXTERRIRQ" "0,1" bitfld.long 0x00 6. " nDMASIRQ ,External nDMASIRQ" "0,1" textline " " bitfld.long 0x00 5. " NDMAIRQ ,External nDMAIRQ" "0,1" bitfld.long 0x00 4. " nPMUIRQ ,External nPMUIRQ" "0,1" textline " " bitfld.long 0x00 3. " STANDBYWFI ,External STANDBYWFI" "0,1" bitfld.long 0x00 2. " COMMTX ,External COMMTX" "0,1" textline " " bitfld.long 0x00 1. " COMMRX ,External COMMRX" "0,1" bitfld.long 0x00 0. " DBGACK ,External DBGACK" "0,1" rgroup c14:0x03bf++0x00 line.long 0x00 "DBGITCTRL_IS,Integration Input Status Register" bitfld.long 0x00 11. " CTI_DBGRESTART ,CTI Debug Restart" "0,1" bitfld.long 0x00 10. " CTI_EDBGRQ ,CTI Debug Request" "0,1" textline " " bitfld.long 0x00 9. " CTI_PMUEXTIN[1] ,CTI PMUEXTIN[1] Signal" "0,1" bitfld.long 0x00 8. " CTI_PMUEXTIN[0] ,CTI PMUEXTIN[0] Signal" "0,1" textline " " bitfld.long 0x00 2. " nFIQ ,nFIQ Input" "0,1" bitfld.long 0x00 1. " nIRQ ,nIRQ Input" "0,1" textline " " bitfld.long 0x00 0. " EDBGRQ ,EDBGRQ Input" "0,1" group c14:0x3c0--0x3c0 line.long 0x0 "DBGITCTRL,Integration Mode Control Register" bitfld.long 0x0 0. " IME ,Integration Mode Enable" "Disabled,Enabled" group c14:0x3e8--0x3e8 line.long 0x0 "DBGCLAIMSET,Claim Tag Set Register" bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Set" bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Set" textline " " bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Set" bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Set" textline " " bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Set" bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Set" textline " " bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Set" bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Set" group c14:0x3e9--0x3e9 line.long 0x0 "DBGCLAIMCLR,Claim Tag Clear Register" bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Cleared" bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Cleared" textline " " bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Cleared" bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Cleared" textline " " bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Cleared" bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Cleared" textline " " bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Cleared" bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Cleared" wgroup c14:0x3ec--0x3ec line.long 0x0 "DBGLAR,Lock Access Register" rgroup c14:0x3ed--0x3ed line.long 0x0 "DBGLSR,Lock Status Register" bitfld.long 0x00 2. " NTT ,Not 32-bit access" "32-bit,Not 32-bit" bitfld.long 0x00 1. " SLK ,Software Lock status" "Not locked,Locked" textline " " bitfld.long 0x00 0. " SLI ,Software Lock Implemented" "Not implemented,Implemented" width 17. rgroup c14:0x3ee--0x3ee line.long 0x0 "DBGAUTHSTATUS,Debug Authentication Status Register" bitfld.long 0x00 7. " SNI ,Secure non-invasive debug features implementation" "No effect,Implemented" bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enable (DBGEN OR NIDEN) AND (SPIDEN OR SPNIDEN)" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SI ,Secure invasive debug features implementation" "No effect,Implemented" bitfld.long 0x00 4. " SE ,Secure invasive debug enable (DBGEN AND SPIDEN)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enable (DBGEN OR NIDEN)" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enable (DBGEN)" "Disabled,Enabled" width 17. hgroup c14:0x3f2--0x3f2 hide.long 0x0 "DBGDEVID,Device Identifier (RESERVED)" rgroup c14:0x3f3--0x3f3 line.long 0x0 "DBGDEVTYPE,Device Type" bitfld.long 0x00 4.--7. " T ,Sub type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " C ,Main class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup c14:0x3f8--0x3f8 line.long 0x00 "DBGPID0,Debug Peripheral ID 0" hexmask.long.byte 0x00 0.--7. 1. " PN[7:0] ,Part Number [7:0]" rgroup c14:0x3f9--0x3f9 line.long 0x00 "DBGPID1,Debug Peripheral ID 1" hexmask.long.byte 0x00 4.--7. 1. " JEPID[3:0] ,JEP Identity Code[3:0]" hexmask.long.byte 0x00 0.--3. 1. " PN[11:8] ,Part Number [11:8]" rgroup c14:0x3fa--0x3fa line.long 0x00 "DBGPID2,Debug Peripheral ID 2" hexmask.long.byte 0x00 4.--7. 1. " REV ,Revision" bitfld.long 0x00 3. " UJEPCODE ,Uses JEP Code" "Disabled,Enabled" hexmask.long.byte 0x00 0.--2. 1. " JEPID[6:4] ,JEP Identity Code[6:4]" rgroup c14:0x3fb--0x3fb line.long 0x00 "DBGPID3,Debug Peripheral ID 3" hexmask.long.byte 0x00 4.--7. 1. " REVAND ,Manufacturing revision" hexmask.long.byte 0x00 0.--3. 1. " CM ,Customer modified" rgroup c14:0x3f4--0x3f4 line.long 0x00 "DBGPID4,Debug Peripheral ID 4" hexmask.long.byte 0x00 4.--7. 1. " 4KB_COUNT ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CONT_CODE ,JEP 106 Continuation code" rgroup c14:0x3fc--0x3fc line.long 0x00 "DBGCID0,Debug Component ID 0" hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 0" rgroup c14:0x3fd--0x3fd line.long 0x00 "DBGCID1,Debug Component ID 1" hexmask.long.byte 0x00 4.--7. 1. " CC ,Component class" hexmask.long.byte 0x00 0.--3. 1. " PREAMBLE ,Preamble byte 1" rgroup c14:0x3fe--0x3fe line.long 0x00 "DBGCID2,Debug Component ID 2" hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 2" rgroup c14:0x3ff--0x3ff line.long 0x00 "DBGCID3,Debug Component ID 3" hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 3" tree.end tree.end width 7. tree "Breakpoint Registers" group c14:0x40++0x00 line.long 0x00 "BVR0,Breakpoint Value Register 0" group c14:0x50++0x00 line.long 0x00 "BCR0,Breakpoint Control Register 0" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Reserved,Reserved,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x41++0x00 line.long 0x00 "BVR1,Breakpoint Value Register 1" group c14:0x51++0x00 line.long 0x00 "BCR1,Breakpoint Control Register 1" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Reserved,Reserved,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x42++0x00 line.long 0x00 "BVR2,Breakpoint Value Register 2" group c14:0x52++0x00 line.long 0x00 "BCR2,Breakpoint Control Register 2" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Reserved,Reserved,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x43++0x00 line.long 0x00 "BVR3,Breakpoint Value Register 3" group c14:0x53++0x00 line.long 0x00 "BCR3,Breakpoint Control Register 3" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Reserved,Reserved,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x44++0x00 line.long 0x00 "BVR4,Breakpoint Value Register 4" group c14:0x54++0x00 line.long 0x00 "BCR4,Breakpoint Control Register 4" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x45++0x00 line.long 0x00 "BVR5,Breakpoint Value Register 5" group c14:0x55++0x00 line.long 0x00 "BCR5,Breakpoint Control Register 5" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" tree.end width 6. tree "Watchpoint Control Registers" group c14:0x60++0x00 line.long 0x00 "WVR0,Watchpoint Value Register 0" hexmask.long 0x00 2.--31. 0x04 " WA0 ,Watchpoint Address 0" group c14:0x70--0x70 line.long 0x0 "WCR0,Watchpoint Control Register 0" bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled" textline " " bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..." textline " " bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0 ,1" bitfld.long 0x0 10. ",Byte 5 address select" "0 ,1" bitfld.long 0x0 9. ",Byte 4 address select" "0 ,1" bitfld.long 0x0 8. ",Byte 3 address select" "0 ,1" bitfld.long 0x0 7. ",Byte 2 address select" "0 ,1" bitfld.long 0x0 6. ",Byte 1 address select" "0 ,1" bitfld.long 0x0 5. ",Byte 0 address select" "0 ,1" textline " " bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" group c14:0x61++0x00 line.long 0x00 "WVR1,Watchpoint Value Register 1" hexmask.long 0x00 2.--31. 0x04 " WA1 ,Watchpoint Address 1" group c14:0x71--0x71 line.long 0x0 "WCR1,Watchpoint Control Register 1" bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled" textline " " bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..." textline " " bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0 ,1" bitfld.long 0x0 10. ",Byte 5 address select" "0 ,1" bitfld.long 0x0 9. ",Byte 4 address select" "0 ,1" bitfld.long 0x0 8. ",Byte 3 address select" "0 ,1" bitfld.long 0x0 7. ",Byte 2 address select" "0 ,1" bitfld.long 0x0 6. ",Byte 1 address select" "0 ,1" bitfld.long 0x0 5. ",Byte 0 address select" "0 ,1" textline " " bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" group c14:0x006--0x006 line.long 0x0 "WFAR,Watchpoint Fault Address Register" hexmask.long.long 0x00 1.--31. 0x02 " WFAR ,Address of the watchpointed instruction" tree.end tree.end elif (CORENAME()=="CORTEXM3") tree.close "Core Registers (Cortex-M3)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 11. group 0x10--0x1b line.long 0x00 "SYST_CSR,SysTick Control and Status Register" bitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted" bitfld.long 0x00 2. " CLKSOURCE ,Clock Source" "External,Core" bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "Not SysTick,SysTick" textline " " bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled" ;group 0x14++0x03 line.long 0x04 "SYST_RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0" ;group 0x18++0x03 line.long 0x08 "SYST_CVR,SysTick Current Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Current Value" rgroup 0x1c++0x03 line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing" textline " " rgroup 0xd00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code" bitfld.long 0x00 20.--23. " VARIANT ,Implementation Defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " CONSTANT ,Constant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Number of Processor" bitfld.long 0x00 0.--3. " REVISION ,Implementation Defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group 0xd04--0xd17 line.long 0x00 "ICSR,Interrupt Control State Register" bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Not set,Set" bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not set,Set" bitfld.long 0x00 27. " PENDSVCLR ,Clear Pending pendSV Bit" "Not cleared,Cleared" textline " " bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not set,Set" bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "Not cleared,Cleared" bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active" textline " " bitfld.long 0x00 22. " ISRPENDING ,Interrupt Pending Flag" "Not pending,Pending" hexmask.long.word 0x00 12.--21. 1. " VECTPENDING ,Pending ISR Number Field" bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active" textline " " hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,Active ISR Number Field" ;group 0xd08++0x03 line.long 0x04 "VTOR,Vector Table Offset Register" bitfld.long 0x04 29. " TBLBASE ,Table Base" "Code,RAM" hexmask.long.tbyte 0x04 7.--28. 1. " TBLOFF ,Vector Table Base Offset Field" ;group 0xd0c++0x03 line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key" rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big" bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" textline " " bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested" bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "Not cleared,Cleared all" bitfld.long 0x08 0. " VECTRESET ,System Reset" "No reset,Reset" ;group 0xd10++0x03 line.long 0x0c "SCR,System Control Register" bitfld.long 0x0c 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x0c 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" textline " " bitfld.long 0x0c 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" ;group 0xd14++0x03 line.long 0x10 "CCR,Configuration Control Register" bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte,8-byte" bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI, Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled" textline " " bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled" bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " USERSETMPEND ,Enable User Access to the Software Trigger Exception Register" "Disabled,Enabled" bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level" group 0xd18--0xd23 line.long 0x00 "SHPR1,SSystem Handler Priority Register 1" hexmask.long.byte 0x00 24.--31. 1. " PRI_7 ,Priority of System Handler 7" hexmask.long.byte 0x00 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)" hexmask.long.byte 0x00 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)" textline " " hexmask.long.byte 0x00 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)" line.long 0x04 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x04 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)" hexmask.long.byte 0x04 16.--23. 1. " PRI_10 ,Priority of System Handler 10" hexmask.long.byte 0x04 8.--15. 1. " PRI_9 ,Priority of System Handler 9" textline " " hexmask.long.byte 0x04 0.--7. 1. " PRI_8 ,Priority of System Handler 8" line.long 0x08 "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x08 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)" hexmask.long.byte 0x08 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)" hexmask.long.byte 0x08 8.--15. 1. " PRI_13 ,Priority of System Handler 13" textline " " hexmask.long.byte 0x08 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)" group 0xd24++0x3 line.long 0x00 "SHCSR,System Handler Control and State Register" bitfld.long 0x00 18. " USGFAULTENA ,USGFAULTENA" "Disabled,Enabled" bitfld.long 0x00 17. " BUSFAULTENA ,BUSFAULTENA" "Disabled,Enabled" bitfld.long 0x00 16. " MEMFAULTENA ,MEMFAULTENA" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SVCALLPENDED ,SVCall is Pended Started" "Not replaced,Replaced" bitfld.long 0x00 14. " BUSFAULTPENDED ,BusFault is Pended Started" "Not replaced,Replaced" bitfld.long 0x00 13. " MEMFAULTPENDED ,MemManage is Pended Started" "Not replaced,Replaced" textline " " bitfld.long 0x00 11. " SYSTICKACT ,SysTick is Active" "Not active,Active" bitfld.long 0x00 10. " PENDSVACT ,PendSV is Active" "Not active,Active" bitfld.long 0x00 8. " MONITORACT ,Monitor is Active" "Not active,Active" textline " " bitfld.long 0x00 7. " SVCALLACT ,SVCall is Active" "Not active,Active" bitfld.long 0x00 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active" bitfld.long 0x00 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active" textline " " bitfld.long 0x00 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active" group 0xd28--0xd3b line.byte 0x0 "MMFSR,Memory Manage Fault Status Register" bitfld.byte 0x0 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x0 4. " MSTKERR ,Stacking Access Violations" "No error,Error" bitfld.byte 0x0 3. " MUNSTKERR ,Unstack Access Violations" "No error,Error" textline " " bitfld.byte 0x0 1. " DACCVIOL ,Data Access Violation" "No error,Error" bitfld.byte 0x0 0. " IACCVIOL ,Instruction Access Violation" "No error,Error" ;group 0xd29++0x00 line.byte 0x01 "BFSR,Bus Fault Status Register" bitfld.byte 0x01 7. " BFARVALID ,Address Valid" "Not valid,Valid" bitfld.byte 0x01 4. " STKERR ,Stacking from Exception has Caused Bus Faults" "No error,Error" bitfld.byte 0x01 3. " UNSTKERR ,Unstack from Exception Return has Caused Bus Faults" "No error,Error" textline " " bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise Data Bus Error" "No error,Error" bitfld.byte 0x01 1. " PRECISERR ,Precise Data Bus Error Return" "No error,Error" bitfld.byte 0x01 0. " IBUSERR ,Instruction Bus Error Flag" "No error,Error" ;group 0xd2a++0x01 line.word 0x02 "USAFAULT,Usage Fault Status Register" bitfld.word 0x02 9. " DIVBYZERO ,Illegal PC Load" "No error,Error" bitfld.word 0x02 8. " UNALIGNED ,Illegal Unaligned Access" "No error,Error" bitfld.word 0x02 3. " NOCP ,Attempt to use a coprocessor instruction" "No error,Error" textline " " bitfld.word 0x02 2. " INVPC ,Attempt to Load EXC_RETURN into PC Illegally" "No error,Error" bitfld.word 0x02 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error" bitfld.word 0x02 0. " UNDEFINSTR ,Illegal Processor State" "No error,Error" ;group 0xd2c++0x03 line.long 0x04 "HFSR,Hard Fault Status Register" bitfld.long 0x04 31. " DEBUGEVT ,This Bit is Set if There is a Fault Related to Debug" "No error,Error" bitfld.long 0x04 30. " FORCED ,Hard Fault Activated" "No error,Error" bitfld.long 0x04 1. " VECTTBL ,Bus Fault" "No error,Error" ;group 0xd30++0x03 line.long 0x08 "DFSR,Debug Fault Status Register" bitfld.long 0x08 4. " EXTERNAL ,External Debug Request Flag" "Not asserted,Asserted" bitfld.long 0x08 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred" bitfld.long 0x08 2. " DWTTRAP ,Data Watchpoint and Trace (DWT) Flag" "Not matched,Matched" textline " " bitfld.long 0x08 1. " BKPT ,BKPT Flag" "Not executed,Executed" bitfld.long 0x08 0. " HALTED ,Halt Request Flag" "Not requested,Requested" ;group 0xd34++0x03 line.long 0xc "MMFAR,Memory Manage Fault Address Register" ;group 0xd38++0x03 line.long 0x10 "BFAR,Bus Fault Address Register" wgroup 0xf00++0x03 line.long 0x00 "STIR,Software Trigger Interrupt Register" hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered" tree "Feature Registers" width 10. rgroup.long 0xD40++0x0B line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..." line.long 0x04 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..." line.long 0x08 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..." hgroup.long 0xD4C++0x03 hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long 0xD50++0x03 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..." bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..." textline " " bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored" bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..." hgroup.long 0xD54++0x03 hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" rgroup.long 0xD58++0x03 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..." rgroup.long 0xD60++0x13 line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0" bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..." bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..." bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..." textline " " bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..." line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1" bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..." bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..." bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..." textline " " bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..." line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..." bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..." bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..." bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..." bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..." textline " " bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..." line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..." bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..." bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..." textline " " bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..." bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..." textline " " bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..." line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..." bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..." textline " " bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..." bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..." bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..." tree.end tree "CoreSight Identification Registers" width 6. rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported" group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8 group.long 0xD9C++0x03 "Region 8" saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 8 (not implemented)" saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9 group.long 0xD9C++0x03 "Region 9" saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 9 (not implemented)" saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA group.long 0xD9C++0x03 "Region 10" saveout 0xD98 %l 0xA line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xA line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 10 (not implemented)" saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB group.long 0xD9C++0x03 "Region 11" saveout 0xD98 %l 0xB line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xB line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 11 (not implemented)" saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC group.long 0xD9C++0x03 "Region 12" saveout 0xD98 %l 0xC line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xC line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 12 (not implemented)" saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD group.long 0xD9C++0x03 "Region 13" saveout 0xD98 %l 0xD line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xD line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 13 (not implemented)" saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE group.long 0xD9C++0x03 "Region 14" saveout 0xD98 %l 0xE line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xE line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 14 (not implemented)" saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF group.long 0xD9C++0x03 "Region 15" saveout 0xD98 %l 0xF line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xF line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 15 (not implemented)" saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" textline " " textline " " endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 6. rgroup.long 0x04++0x03 line.long 0x00 "ICTR,Interrupt Controller Type Register" bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..." tree "Interrupt Enable Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x100++0x03 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x100++0x7 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x100++0x0B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x100++0x0F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x100++0x13 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x100++0x17 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x100++0x1B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x100++0x1F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x100++0x1F hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" endif tree.end tree "Interrupt Pending Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x200++0x03 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x200++0x07 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x200++0x0B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x200++0x0F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x200++0x13 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x200++0x17 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x200++0x1B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x200++0x1F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x200++0x1F hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" endif tree.end tree "Interrupt Active Bit Registers" width 9. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) rgroup.long 0x300++0x03 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) rgroup.long 0x300++0x07 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) rgroup.long 0x300++0x0B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) rgroup.long 0x300++0x0F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) rgroup.long 0x300++0x13 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) rgroup.long 0x300++0x17 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) rgroup.long 0x300++0x1B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) rgroup.long 0x300++0x1F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" line.long 0x1c "ACTIVE8,Active Bit Register 8" bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x300++0x1F hide.long 0x00 "ACTIVE1,Active Bit Register 1" hide.long 0x04 "ACTIVE2,Active Bit Register 2" hide.long 0x08 "ACTIVE3,Active Bit Register 3" hide.long 0x0c "ACTIVE4,Active Bit Register 4" hide.long 0x10 "ACTIVE5,Active Bit Register 5" hide.long 0x14 "ACTIVE6,Active Bit Register 6" hide.long 0x18 "ACTIVE7,Active Bit Register 7" hide.long 0x1c "ACTIVE8,Active Bit Register 8" endif tree.end tree "Interrupt Priority Registers" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x400++0x1F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x400++0x3F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x400++0x5F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x400++0x7F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x400++0x9F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x400++0xBF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x400++0xDF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x400++0xEF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" line.long 0xE0 "IPR56,Interrupt Priority Register" hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority" hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority" hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority" hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority" line.long 0xE4 "IPR57,Interrupt Priority Register" hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority" hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority" hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority" hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority" line.long 0xE8 "IPR58,Interrupt Priority Register" hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority" hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority" hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority" hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority" line.long 0xEC "IPR59,Interrupt Priority Register" hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority" hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority" hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority" hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority" else hgroup.long 0x400++0xEF hide.long 0x0 "IPR0,Interrupt Priority Register" hide.long 0x4 "IPR1,Interrupt Priority Register" hide.long 0x8 "IPR2,Interrupt Priority Register" hide.long 0xC "IPR3,Interrupt Priority Register" hide.long 0x10 "IPR4,Interrupt Priority Register" hide.long 0x14 "IPR5,Interrupt Priority Register" hide.long 0x18 "IPR6,Interrupt Priority Register" hide.long 0x1C "IPR7,Interrupt Priority Register" hide.long 0x20 "IPR8,Interrupt Priority Register" hide.long 0x24 "IPR9,Interrupt Priority Register" hide.long 0x28 "IPR10,Interrupt Priority Register" hide.long 0x2C "IPR11,Interrupt Priority Register" hide.long 0x30 "IPR12,Interrupt Priority Register" hide.long 0x34 "IPR13,Interrupt Priority Register" hide.long 0x38 "IPR14,Interrupt Priority Register" hide.long 0x3C "IPR15,Interrupt Priority Register" hide.long 0x40 "IPR16,Interrupt Priority Register" hide.long 0x44 "IPR17,Interrupt Priority Register" hide.long 0x48 "IPR18,Interrupt Priority Register" hide.long 0x4C "IPR19,Interrupt Priority Register" hide.long 0x50 "IPR20,Interrupt Priority Register" hide.long 0x54 "IPR21,Interrupt Priority Register" hide.long 0x58 "IPR22,Interrupt Priority Register" hide.long 0x5C "IPR23,Interrupt Priority Register" hide.long 0x60 "IPR24,Interrupt Priority Register" hide.long 0x64 "IPR25,Interrupt Priority Register" hide.long 0x68 "IPR26,Interrupt Priority Register" hide.long 0x6C "IPR27,Interrupt Priority Register" hide.long 0x70 "IPR28,Interrupt Priority Register" hide.long 0x74 "IPR29,Interrupt Priority Register" hide.long 0x78 "IPR30,Interrupt Priority Register" hide.long 0x7C "IPR31,Interrupt Priority Register" hide.long 0x80 "IPR32,Interrupt Priority Register" hide.long 0x84 "IPR33,Interrupt Priority Register" hide.long 0x88 "IPR34,Interrupt Priority Register" hide.long 0x8C "IPR35,Interrupt Priority Register" hide.long 0x90 "IPR36,Interrupt Priority Register" hide.long 0x94 "IPR37,Interrupt Priority Register" hide.long 0x98 "IPR38,Interrupt Priority Register" hide.long 0x9C "IPR39,Interrupt Priority Register" hide.long 0xA0 "IPR40,Interrupt Priority Register" hide.long 0xA4 "IPR41,Interrupt Priority Register" hide.long 0xA8 "IPR42,Interrupt Priority Register" hide.long 0xAC "IPR43,Interrupt Priority Register" hide.long 0xB0 "IPR44,Interrupt Priority Register" hide.long 0xB4 "IPR45,Interrupt Priority Register" hide.long 0xB8 "IPR46,Interrupt Priority Register" hide.long 0xBC "IPR47,Interrupt Priority Register" hide.long 0xC0 "IPR48,Interrupt Priority Register" hide.long 0xC4 "IPR49,Interrupt Priority Register" hide.long 0xC8 "IPR50,Interrupt Priority Register" hide.long 0xCC "IPR51,Interrupt Priority Register" hide.long 0xD0 "IPR52,Interrupt Priority Register" hide.long 0xD4 "IPR53,Interrupt Priority Register" hide.long 0xD8 "IPR54,Interrupt Priority Register" hide.long 0xDC "IPR55,Interrupt Priority Register" hide.long 0xE0 "IPR56,Interrupt Priority Register" hide.long 0xE4 "IPR57,Interrupt Priority Register" hide.long 0xE8 "IPR58,Interrupt Priority Register" hide.long 0xEC "IPR59,Interrupt Priority Register" endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 7. if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20000) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20001) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 5. " C_SNAPSTALL ,Halting debug to gain control of the core" "Disabled,Enabled" bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" textline " " bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step" bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x0) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x00001) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step" bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" endif wgroup 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write" bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,R13,R14,R15,xPSR/ Flags,MSP,PSP,RAZ/WI,CONTROL/FAULTMASK/BASEPRI/PRIMASK,?..." group 0xDF8++0x03 line.long 0x00 "DCRDR,Debug Core Register Data Register" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000) group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step" textline " " bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" else group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" textline " " bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" endif else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Flash Patch and Breakpoint Unit (FPB)" sif COMPonent.AVAILABLE("FPB") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1)) width 10. group 0x00--0x27 line.long 0x00 "FP_CTRL,Flash Patch Control Register" bitfld.long 0x00 8.--11. " NUM_LIT ,Number of Literal Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " NUM_CODE ,Number of Code Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " KEY ,Key Field" "Low,High" bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled" ;group 0x04++0x03 line.long 0x04 "FP_REMAP,Flash Patch Remap Register" hexmask.long.tbyte 0x04 5.--28. 1. " REMAP ,Remap Base Address Field" ;group 0x08++0x03 line.long 0x8 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x8 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x8 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x8 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0xC "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0xC 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0xC 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0xC 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x10 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x10 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x10 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x10 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x14 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x14 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x14 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x14 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x18 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x18 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x18 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x18 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x1C "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x1C 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x1C 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x1C 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x20 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x20 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x20 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x20 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x24 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x24 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x24 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x24 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" tree "Coresight Management Registers" rgroup 0xfd0--0xfff line.long 0x00 "PID4,Peripheral ID4" line.long 0x04 "PID5,Peripheral ID5" line.long 0x08 "PID6,Peripheral ID6" line.long 0x0c "PID7,Peripheral ID7" line.long 0x10 "PID0,Peripheral ID0" line.long 0x14 "PID1,Peripheral ID1" line.long 0x18 "PID2,Peripheral ID2" line.long 0x1c "PID3,Peripheral ID3" line.long 0x20 "CID0,Component ID0" line.long 0x24 "CID1,Component ID1" line.long 0x28 "CID2,Component ID2" line.long 0x2c "CID3,Component ID3" tree.end else newline textline "FPB component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 15. group 0x00--0x1B line.long 0x00 "DWT_CTRL,DWT Control Register" bitfld.long 0x00 28.--31. " NUMCOMP ,Number of Comparators Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 22. " CYCEVTENA ,Enables Cycle Count Event" "Disabled,Enabled" bitfld.long 0x00 21. " FOLDEVTENA ,Enables Folded Instruction Count Event" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " LSUEVTENA ,Enables LSU Count Event" "Disabled,Enabled" bitfld.long 0x00 19. " SLEEPEVTENA ,Enables Sleep Count Event" "Disabled,Enabled" bitfld.long 0x00 18. " EXCEVTENA ,Enables Interrupt Overhead Event" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " CPIEVTENA ,Enables CPI Count Event" "Disabled,Enabled" bitfld.long 0x00 16. " EXCTRCENA ,Enables Interrupt Event Tracing" "Disabled,Enabled" bitfld.long 0x00 12. " PCSAMPLEENA ,Enables PC Sampling Event" "Disabled,Enabled" textline " " bitfld.long 0x00 10.--11. " SYNCTAP ,Feed Synchronization Pulse to the ITM SYNCEN Control" "Disabled,24,26,28" bitfld.long 0x00 9. " CYCTAP ,Selects a Tap on the DWT_CYCCNT Register" "Bit 6,Bit 10" bitfld.long 0x00 5.--8. " POSTCNT ,Post-Scalar Counter for CYCTAP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1.--4. " POSTPRESET ,Reload Value for POSTCNT Post-Scalar Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CYCCNTENA ,Enable the DWT_CYCCNT Counter" "Disabled,Enabled" ;group 0x04++0x03 line.long 0x04 "DWT_CYCCNT,Cycle Count register" ;group 0x08++0x03 line.long 0x08 "DWT_CPICNT,DWT CPI Count Register" hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter" ;group 0x0c++0x03 line.long 0x0c "DWT_EXCCNT,DWT Exception Overhead Count Register" hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter" ;group 0x10++0x03 line.long 0x10 "DWT_SLEEPCNT,DWT Sleep Count Register" hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter" ;group 0x14++0x03 line.long 0x14 "DWT_LSUCNT,DWT LSU Count Register" hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter" ;group 0x18++0x03 line.long 0x18 "DWT_FOLDCNT,DWT Fold Count Register" hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter" group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" group.long 0x24++0x03 line.long 0x00 "DWT_MASK0,DWT Mask Registers 0" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x34++0x03 line.long 0x00 "DWT_MASK1,DWT Mask Registers 1" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x44++0x03 line.long 0x00 "DWT_MASK2,DWT Mask Registers 2" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x54++0x03 line.long 0x00 "DWT_MASK3,DWT Mask Registers 3" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x20)==0x00) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x38))&0x20)==0x00) group.long 0x38++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x38++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x48))&0x20)==0x00) group.long 0x48++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x48++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x58))&0x20)==0x00) group.long 0x58++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x58++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif tree "Coresight Management Registers" rgroup 0xfd0--0xfff line.long 0x00 "PID4,Peripheral ID4" line.long 0x04 "PID5,Peripheral ID5" line.long 0x08 "PID6,Peripheral ID6" line.long 0x0c "PID7,Peripheral ID7" line.long 0x10 "PID0,Peripheral ID1" line.long 0x14 "PID1,Peripheral ID2" line.long 0x18 "PID2,Peripheral ID3" line.long 0x1c "PID3,Peripheral ID4" line.long 0x20 "CID0,Component ID0" line.long 0x24 "CID1,Component ID1" line.long 0x28 "CID2,Component ID2" line.long 0x2c "CID3,Component ID3" tree.end else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end endif autoindent.on center tree sif (cpu()=="AM335X-ICSS0"||cpu()=="PRU") tree "CFG" base eahb:0x4a326000 rgroup.long 0x00++0x23 line.long 0x00 "REVID,The Revision Register contains the ID and revision information" line.long 0x04 "SYSCFG,The System Configuration Register defines the power IDLE and STANDBY modes" hexmask.long 0x04 6.--31. 1. "RESERVED_1," bitfld.long 0x04 5. "SUB_MWAIT,Status bit for wait state" "Ready for Transaction,Wait until 0" newline bitfld.long 0x04 4. "STANDBY_INIT," "Enable OCP master ports,Initiate standby sequence" bitfld.long 0x04 2.--3. "STANDBY_MODE," "Force standby mode,No standby mode,Smart standby mode,Reserved" newline bitfld.long 0x04 0.--1. "IDLE_MODE," "Force-idle mode,No-idle mode,Smart-idle mode,Reserved" line.long 0x08 "GPCFG0,The General Purpose Configuration 0 Register defines the GPI/O configuration for PRU0" rbitfld.long 0x08 26.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 25. "PRU0_GPO_SH_SEL,Defines which shadow register is currently getting used for GPO shifting" "gpo_sh0 is selected,gpo_sh1 is selected" newline bitfld.long 0x08 20.--24. "PRU0_GPO_DIV1,Divisor value (divide by PRU0_GPO_DIV1 + 1)" "div 1.0,div 1.5,div 2.0,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,div 16.0,reserved" bitfld.long 0x08 15.--19. "PRU0_GPO_DIV0,Divisor value (divide by PRU0_GPO_DIV0 + 1)" "div 1.0,div 1.5,div 2.0,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,div 16.0,reserved" newline bitfld.long 0x08 14. "PRU0_GPO_MODE," "Direct output mode,Serial output mode" bitfld.long 0x08 13. "PRU0_GPI_SB,Start Bit event for 28-bit shift mode" "No Effect,Will clear PRU0_GPI_SB.." newline bitfld.long 0x08 8.--12. "PRU0_GPI_DIV1,Divisor value (divide by PRU0_GPI_DIV1 + 1)" "div 1.0,div 1.5,div 2.0,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,div 16.0,reserved" bitfld.long 0x08 3.--7. "PRU0_GPI_DIV0,Divisor value (divide by PRU0_GPI_DIV0 + 1)" "div 1.0,div 1.5,div 2.0,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,div 16.0,reserved" newline bitfld.long 0x08 2. "PRU0_GPI_CLK_MODE,Parallel 16-bit capture mode clock edge" "Use the positive edge of pru0_r31_status[16],Use the negative edge of pru0_r31_status[16]" bitfld.long 0x08 0.--1. "PRU0_GPI_MODE," "Direct connection mode,16-bit parallel capture mode,28-bit shift mode,Reserved" line.long 0x0C "GPCFG1,The General Purpose Configuration 1 Register defines the GPI/O configuration for PRU1" rbitfld.long 0x0C 26.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 25. "PRU1_GPO_SH_SEL,Defines which shadow register is currently getting used for GPO shifting" "gpo_sh0 is selected,gpo_sh1 is selected" newline bitfld.long 0x0C 20.--24. "PRU1_GPO_DIV1,Divisor value (divide by PRU1_GPO_DIV1 + 1)" "div 1.0,div 1.5,div 2.0,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,div 16.0,reserved" bitfld.long 0x0C 15.--19. "PRU1_GPO_DIV0,Divisor value (divide by PRU1_GPO_DIV0 + 1)" "div 1.0,div 1.5,div 2.0,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,div 16.0,reserved" newline bitfld.long 0x0C 14. "PRU1_GPO_MODE," "Direct output mode,Serial output mode" bitfld.long 0x0C 13. "PRU1_GPI_SB,28-bit shift mode Start Bit event" "No Effect,Will clear PRU1_GPI_SB.." newline bitfld.long 0x0C 8.--12. "PRU1_GPI_DIV1,Divisor value (divide by PRU1_GPI_DIV1 + 1)" "div 1.0,div 1.5,div 2.0,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,div 16.0,reserved" bitfld.long 0x0C 3.--7. "PRU1_GPI_DIV0,Divisor value (divide by PRU1_GPI_DIV0 + 1)" "div 1.0,div 1.5,div 2.0,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,div 16.0,reserved" newline bitfld.long 0x0C 2. "PRU1_GPI_CLK_MODE,Parallel 16-bit capture mode clock edge" "Use the positive edge of pru1_r31_status[16],Use the negative edge of pru1_r31_status[16]" bitfld.long 0x0C 0.--1. "PRU1_GPI_MODE," "Direct connection mode,16-bit parallel capture mode,28-bit shift mode,Reserved" line.long 0x10 "CGR,The Clock Gating Register controls the state of Clock Management of the different modules" hexmask.long.word 0x10 18.--31. 1. "RESERVED_1," bitfld.long 0x10 17. "IEP_CLK_EN,IEP clock enable" "Disable Clock,Enable Clock" newline bitfld.long 0x10 16. "IEP_CLK_STOP_ACK,Acknowledgement that IEP clock can be stopped" "Not Ready to Gate Clock,Ready to Gate Clock" bitfld.long 0x10 15. "IEP_CLK_STOP_REQ,IEP request to stop clock" "do not request to stop Clock,request to stop Clock" newline bitfld.long 0x10 14. "ECAP_CLK_EN,ECAP clock enable" "Disable Clock,Enable Clock" bitfld.long 0x10 13. "ECAP_CLK_STOP_ACK,Acknowledgement that ECAP clock can be stopped" "Not Ready to Gate Clock,Ready to Gate Clock" newline bitfld.long 0x10 12. "ECAP_CLK_STOP_REQ,ECAP request to stop clock" "do not request to stop Clock,request to stop Clock" bitfld.long 0x10 11. "UART_CLK_EN,UART clock enable" "Disable Clock,Enable Clock" newline bitfld.long 0x10 10. "UART_CLK_STOP_ACK,Acknowledgement that UART clock can be stopped" "Not Ready to Gate Clock,Ready to Gate Clock" bitfld.long 0x10 9. "UART_CLK_STOP_REQ,UART request to stop clock" "do not request to stop Clock,request to stop Clock" newline bitfld.long 0x10 8. "INTC_CLK_EN,INTC clock enable" "Disable Clock,Enable Clock" bitfld.long 0x10 7. "INTC_CLK_STOP_ACK,Acknowledgement that INTC clock can be stopped" "Not Ready to Gate Clock,Ready to Gate Clock" newline bitfld.long 0x10 6. "INTC_CLK_STOP_REQ,INTC request to stop clock" "do not request to stop Clock,request to stop Clock" bitfld.long 0x10 5. "PRU1_CLK_EN,PRU1 clock enable" "Disable Clock,Enable Clock" newline bitfld.long 0x10 4. "PRU1_CLK_STOP_ACK,Acknowledgement that PRU1 clock can be stopped" "Not Ready to Gate Clock,Ready to Gate Clock" bitfld.long 0x10 3. "PRU1_CLK_STOP_REQ,PRU1 request to stop clock" "do not request to stop Clock,request to stop Clock" newline bitfld.long 0x10 2. "PRU0_CLK_EN,PRU0 clock enable" "Disable Clock,Enable Clock" bitfld.long 0x10 1. "PRU0_CLK_STOP_ACK,Acknowledgement that PRU0 clock can be stopped" "Not Ready to Gate Clock,Ready to Gate Clock" newline bitfld.long 0x10 0. "PRU0_CLK_STOP_REQ,PRU0 request to stop clock" "do not request to stop Clock,request to stop Clock" line.long 0x14 "ISRP,The IRQ Status Raw Parity register is a snapshot of the IRQ raw status for the PRU ICSS memory parity events" hexmask.long.word 0x14 20.--31. 1. "RESERVED_1," bitfld.long 0x14 16.--19. "RAM_PE_RAW,RAM Parity Error RAW for Byte3 Byte2 Byte1 Byte0" "No event pending,Set event (debug),?..." newline bitfld.long 0x14 12.--15. "PRU1_DMEM_PE_RAW,PRU1 DMEM Parity Error RAW for Byte3 Byte2 Byte1 Byte0" "No event pending,Set event (debug),?..." bitfld.long 0x14 8.--11. "PRU1_IMEM_PE_RAW,PRU1 IMEM Parity Error RAW for Byte3 Byte2 Byte1 Byte0" "No event pending,Set event (debug),?..." newline bitfld.long 0x14 4.--7. "PRU0_DMEM_PE_RAW,PRU0 DMEM Parity Error RAW for Byte3 Byte2 Byte1 Byte0" "No event pending,Set event (debug),?..." bitfld.long 0x14 0.--3. "PRU0_IMEM_PE_RAW,PRU0 IMEM Parity Error RAW for Byte3 Byte2 Byte1 Byte0" "No event pending,Set event (debug),?..." line.long 0x18 "ISP,The IRQ Status Parity Register is a snapshot of the IRQ status for the PRU ICSS memory parity events" hexmask.long.word 0x18 20.--31. 1. "RESERVED_1," bitfld.long 0x18 16.--19. "RAM_PE,RAM Parity Error for Byte3 Byte2 Byte1 Byte0" "No (enabled) event pending,Clear event,?..." newline bitfld.long 0x18 12.--15. "PRU1_DMEM_PE,PRU1 DMEM Parity Error for Byte3 Byte2 Byte1 Byte0" "No (enabled) event pending,Clear event,?..." bitfld.long 0x18 8.--11. "PRU1_IMEM_PE,PRU1 IMEM Parity Error for Byte3 Byte2 Byte1 Byte0" "No (enabled) event pending,Clear event,?..." newline bitfld.long 0x18 4.--7. "PRU0_DMEM_PE,PRU0 DMEM Parity Error for Byte3 Byte2 Byte1 Byte0" "No(enabled) event pending,Clear event,?..." bitfld.long 0x18 0.--3. "PRU0_IMEM_PE,PRU0 IMEM Parity Error for Byte3 Byte2 Byte1 Byte0" "No (enabled) event pending,Clear event,?..." line.long 0x1C "IESP,The IRQ Enable Set Parity Register enables the IRQ PRU ICSS memory parity events" hexmask.long.word 0x1C 20.--31. 1. "RESERVED_1," bitfld.long 0x1C 16.--19. "RAM_PE_SET,RAM Parity Error Set Enable for Byte3 Byte2 Byte1 Byte0" "Interrupt disabled (masked),Enable interrupt,?..." newline bitfld.long 0x1C 12.--15. "PRU1_DMEM_PE_SET,PRU1 DMEM Parity Error Set Enable for Byte3 Byte2 Byte1 Byte0" "Interrupt disabled (masked),Enable interrupt,?..." bitfld.long 0x1C 8.--11. "PRU1_IMEM_PE_SET,PRU1 IMEM Parity Error Set Enable for Byte3 Byte2 Byte1 Byte0" "Interrupt disabled (masked),Enable interrupt,?..." newline bitfld.long 0x1C 4.--7. "PRU0_DMEM_PE_SET,PRU0 DMEM Parity Error Set Enable for Byte3 Byte2 Byte1 Byte0" "Interrupt disabled (masked),Enable interrupt,?..." bitfld.long 0x1C 0.--3. "PRU0_IMEM_PE_SET,PRU0 IMEM Parity Error Set Enable for Byte3 Byte2 Byte1 Byte0" "Interrupt disabled (masked),Enable interrupt,?..." line.long 0x20 "IECP,The IRQ Enable Clear Parity Register disables the IRQ PRU ICSS memory parity events" hexmask.long.word 0x20 16.--31. 1. "RESERVED_1," bitfld.long 0x20 12.--15. "PRU1_DMEM_PE_CLR,PRU1 DMEM Parity Error Clear Enable for Byte3 Byte2 Byte1 Byte0" "Interrupt disabled (masked),Disable interrupt,?..." newline bitfld.long 0x20 8.--11. "PRU1_IMEM_PE_CLR,PRU1 IMEM Parity Error Clear Enable for Byte3 Byte2 Byte1 Byte0" "Interrupt disabled (masked),Disable interrupt,?..." bitfld.long 0x20 4.--7. "PRU0_DMEM_PE_CLR,PRU0 DMEM Parity Error Clear Enable for Byte3 Byte2 Byte1 Byte0" "Interrupt disabled (masked),Disable interrupt,?..." newline bitfld.long 0x20 0.--3. "PRU0_IMEM_PE_CLR,PRU0 IMEM Parity Error Clear Enable for Byte3 Byte2 Byte1 Byte0" "Interrupt disabled (masked),Disable interrupt,?..." group.long 0x28++0x03 line.long 0x00 "PMAO,The PRU Master OCP Address Offset Register enables for the PRU OCP Master Port Address to have an offset of minus 0x0008_0000" hexmask.long 0x00 2.--31. 1. "RESERVED_1," bitfld.long 0x00 1. "PMAO_PRU1,PRU1 OCP Master Port Address Offset Enable" "Disable address offset,Enable address offset of -0x0008_0000" newline bitfld.long 0x00 0. "PMAO_PRU0,PRU0 OCP Master Port Address Offset Enable" "Disable address offset,Enable address offset of -0x0008_0000" group.long 0x30++0x07 line.long 0x00 "IEPCLK,The IEP Clock Source Register defines the source of the IEP clock" hexmask.long 0x00 1.--31. 1. "RESERVED_1," bitfld.long 0x00 0. "OCP_EN," "iep_clk is the source,ocp_clk is the source" line.long 0x04 "SPP,The Scratch Pad Priority and Configuration Register defines the access priority assigned to the PRU cores and configures the scratch pad XFR shift functionality" hexmask.long 0x04 2.--31. 1. "RESERVED_1," bitfld.long 0x04 1. "XFR_SHIFT_EN,Enables XIN/XOUT shift functionality" "Disabled,Enabled" newline bitfld.long 0x04 0. "PRU1_PAD_HP_EN,Defines which PRU wins write cycle arbitration to a common scratch pad bank" "PRU0 has highest priority,PRU1 has highest priority" group.long 0x40++0x03 line.long 0x00 "PIN_MX,The Pin Mux Select Register defines the state of the PRU ICSS internal pinmuxing" hexmask.long.tbyte 0x00 8.--31. 1. "RESERVED_1," hexmask.long.byte 0x00 0.--7. 1. "PIN_MUX_SEL,Defines the state of PIN_MUX_SEL [1:0] for internal pinmuxing" tree.end tree "PRU0_CTRL" base eahb:0x4a322000 group.long 0x00++0x13 line.long 0x00 "CTRL,CONTROL REGISTER" hexmask.long.word 0x00 16.--31. 1. "PCTR_RST_VAL,Program Counter Reset Value: This field controls the address where the PRU will start executing code from after it is taken out of reset" bitfld.long 0x00 15. "RUNSTATE,Run State: This bit indicates whether the PRU is currently executing an instruction or is halted" "PRU is halted and host has access to the..,PRU is currently running and the host is locked.." newline rbitfld.long 0x00 14. "RESERVED_1,Reserved" "0,1" rbitfld.long 0x00 9.--13. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8. "SINGLE_STEP,Single Step Enable: This bit controls whether or not the PRU will only execute a single instruction when enabled" "PRU will free run when enabled,PRU will execute a single instruction and then.." rbitfld.long 0x00 4.--7. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 3. "CTR_EN,PRU Cycle Counter Enable: Enables PRU cycle counters" "Counters not enabled,Counters enabled" bitfld.long 0x00 2. "SLEEPING,PRU Sleep Indicator: This bit indicates whether or not the PRU is currently asleep" "PRU is not asleep,PRU is asleep If this bit is written to a 0 the.." newline bitfld.long 0x00 1. "EN,Processor Enable: This bit controls whether or not the PRU is allowed to fetch new instructions" "PRU is disabled,PRU is enabled" rbitfld.long 0x00 0. "SOFT_RST_N,Soft Reset: When this bit is cleared the PRU will be reset" "0,1" line.long 0x04 "STS,STATUS REGISTER" hexmask.long.word 0x04 16.--31. 1. "RESERVED_1," abitfld.long 0x04 0.--15. "PCTR,Program Counter: This field is a registered (1 cycle delayed) reflection of the PRU program counter" "0x0002=byte address of 0x8 or PC of,0x0008=byte address of 0x20)" line.long 0x08 "WAKEUP_EN,WAKEUP ENABLE REGISTER" line.long 0x0C "CYCLE,CYCLE COUNT" line.long 0x10 "STALL,STALL COUNT" group.long 0x20++0x0F line.long 0x00 "CTBIR0,CONSTANT TABLE BLOCK INDEX REGISTER 0" hexmask.long.byte 0x00 24.--31. 1. "RESERVED_1," hexmask.long.byte 0x00 16.--23. 1. "C25_BLK_IDX,PRU Constant Entry 25 Block Index: This field sets the value that will appear in bits 11:8 of entry 25 in the PRU Constant Table" newline hexmask.long.byte 0x00 8.--15. 1. "RESERVED_2," hexmask.long.byte 0x00 0.--7. 1. "C24_BLK_IDX,PRU Constant Entry 24 Block Index: This field sets the value that will appear in bits 11:8 of entry 24 in the PRU Constant Table" line.long 0x04 "CTBIR1,CONSTANT TABLE BLOCK INDEX REGISTER 1" hexmask.long.byte 0x04 24.--31. 1. "RESERVED_1," hexmask.long.byte 0x04 16.--23. 1. "C27_BLK_IDX,PRU Constant Entry 27 Block Index: This field sets the value that will appear in bits 11:8 of entry 27 in the PRU Constant Table" newline hexmask.long.byte 0x04 8.--15. 1. "RESERVED_2," hexmask.long.byte 0x04 0.--7. 1. "C26_BLK_IDX,PRU Constant Entry 26 Block Index: This field sets the value that will appear in bits 11:8 of entry 26 in the PRU Constant Table" line.long 0x08 "CTPPR0,CONSTANT TABLE PROGRAMMABLE POINTER REGISTER 0" hexmask.long.word 0x08 16.--31. 1. "C29_POINTER,PRU Constant Entry 29 Pointer: This field sets the value that will appear in bits 23:8 of entry 29 in the PRU Constant Table" hexmask.long.word 0x08 0.--15. 1. "C28_POINTER,PRU Constant Entry 28 Pointer: This field sets the value that will appear in bits 23:8 of entry 28 in the PRU Constant Table" line.long 0x0C "CTPPR1,CONSTANT TABLE PROGRAMMABLE POINTER REGISTER 1" hexmask.long.word 0x0C 16.--31. 1. "C31_POINTER,PRU Constant Entry 31 Pointer: This field sets the value that will appear in bits 23:8 of entry 31 in the PRU Constant Table" hexmask.long.word 0x0C 0.--15. 1. "C30_POINTER,PRU Constant Entry 30 Pointer: This field sets the value that will appear in bits 23:8 of entry 30 in the PRU Constant Table" tree.end tree "PRU1_CTRL" base eahb:0x4a324000 group.long 0x00++0x13 line.long 0x00 "CTRL,CONTROL REGISTER" hexmask.long.word 0x00 16.--31. 1. "PCTR_RST_VAL,Program Counter Reset Value: This field controls the address where the PRU will start executing code from after it is taken out of reset" bitfld.long 0x00 15. "RUNSTATE,Run State: This bit indicates whether the PRU is currently executing an instruction or is halted" "PRU is halted and host has access to the..,PRU is currently running and the host is locked.." newline rbitfld.long 0x00 14. "RESERVED_1,Reserved" "0,1" rbitfld.long 0x00 9.--13. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8. "SINGLE_STEP,Single Step Enable: This bit controls whether or not the PRU will only execute a single instruction when enabled" "PRU will free run when enabled,PRU will execute a single instruction and then.." rbitfld.long 0x00 4.--7. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 3. "CTR_EN,PRU Cycle Counter Enable: Enables PRU cycle counters" "Counters not enabled,Counters enabled" bitfld.long 0x00 2. "SLEEPING,PRU Sleep Indicator: This bit indicates whether or not the PRU is currently asleep" "PRU is not asleep,PRU is asleep If this bit is written to a 0 the.." newline bitfld.long 0x00 1. "EN,Processor Enable: This bit controls whether or not the PRU is allowed to fetch new instructions" "PRU is disabled,PRU is enabled" rbitfld.long 0x00 0. "SOFT_RST_N,Soft Reset: When this bit is cleared the PRU will be reset" "0,1" line.long 0x04 "STS,STATUS REGISTER" hexmask.long.word 0x04 16.--31. 1. "RESERVED_1," abitfld.long 0x04 0.--15. "PCTR,Program Counter: This field is a registered (1 cycle delayed) reflection of the PRU program counter" "0x0002=byte address of 0x8 or PC of,0x0008=byte address of 0x20)" line.long 0x08 "WAKEUP_EN,WAKEUP ENABLE REGISTER" line.long 0x0C "CYCLE,CYCLE COUNT" line.long 0x10 "STALL,STALL COUNT" group.long 0x20++0x0F line.long 0x00 "CTBIR0,CONSTANT TABLE BLOCK INDEX REGISTER 0" hexmask.long.byte 0x00 24.--31. 1. "RESERVED_1," hexmask.long.byte 0x00 16.--23. 1. "C25_BLK_IDX,PRU Constant Entry 25 Block Index: This field sets the value that will appear in bits 11:8 of entry 25 in the PRU Constant Table" newline hexmask.long.byte 0x00 8.--15. 1. "RESERVED_2," hexmask.long.byte 0x00 0.--7. 1. "C24_BLK_IDX,PRU Constant Entry 24 Block Index: This field sets the value that will appear in bits 11:8 of entry 24 in the PRU Constant Table" line.long 0x04 "CTBIR1,CONSTANT TABLE BLOCK INDEX REGISTER 1" hexmask.long.byte 0x04 24.--31. 1. "RESERVED_1," hexmask.long.byte 0x04 16.--23. 1. "C27_BLK_IDX,PRU Constant Entry 27 Block Index: This field sets the value that will appear in bits 11:8 of entry 27 in the PRU Constant Table" newline hexmask.long.byte 0x04 8.--15. 1. "RESERVED_2," hexmask.long.byte 0x04 0.--7. 1. "C26_BLK_IDX,PRU Constant Entry 26 Block Index: This field sets the value that will appear in bits 11:8 of entry 26 in the PRU Constant Table" line.long 0x08 "CTPPR0,CONSTANT TABLE PROGRAMMABLE POINTER REGISTER 0" hexmask.long.word 0x08 16.--31. 1. "C29_POINTER,PRU Constant Entry 29 Pointer: This field sets the value that will appear in bits 23:8 of entry 29 in the PRU Constant Table" hexmask.long.word 0x08 0.--15. 1. "C28_POINTER,PRU Constant Entry 28 Pointer: This field sets the value that will appear in bits 23:8 of entry 28 in the PRU Constant Table" line.long 0x0C "CTPPR1,CONSTANT TABLE PROGRAMMABLE POINTER REGISTER 1" hexmask.long.word 0x0C 16.--31. 1. "C31_POINTER,PRU Constant Entry 31 Pointer: This field sets the value that will appear in bits 23:8 of entry 31 in the PRU Constant Table" hexmask.long.word 0x0C 0.--15. 1. "C30_POINTER,PRU Constant Entry 30 Pointer: This field sets the value that will appear in bits 23:8 of entry 30 in the PRU Constant Table" tree.end tree "INTC" base eahb:0x4a320000 rgroup.long 0x00++0x07 line.long 0x00 "REVID,Revision ID Register" bitfld.long 0x00 30.--31. "REV_SCHEME,SCHEME" "0,1,2,3" bitfld.long 0x00 28.--29. "RESERVED_1," "0,1,2,3" newline hexmask.long.word 0x00 16.--27. 1. "REV_MODULE,MODULE ID" bitfld.long 0x00 11.--15. "REV_RTL,RTL REVISIONS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "REV_MAJOR,MAJOR REVISION" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "REV_CUSTOM,CUSTOM REVISION" "0,1,2,3" newline bitfld.long 0x00 0.--5. "REV_MINOR,MINOR REVISION" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "CR,The Control Register holds global control parameters and can forces a soft reset on the module" hexmask.long 0x04 5.--31. 1. "RESERVED_1," rbitfld.long 0x04 4. "RESERVED_2,Reserved" "0,1" newline bitfld.long 0x04 2.--3. "NEST_MODE,The nesting mode" "no nesting,automatic individual nesting (per host interrupt),automatic global nesting (over all host..,manual nesting" rbitfld.long 0x04 1. "RESERVED_3,Reserved" "0,1" newline rbitfld.long 0x04 0. "RESERVED_4," "0,1" group.long 0x10++0x03 line.long 0x00 "GER,The Global Host Interrupt Enable Register enables all the host interrupts" hexmask.long 0x00 1.--31. 1. "RESERVED_1," bitfld.long 0x00 0. "EN_HINT_ANY,The current global enable value when" "0,1" group.long 0x1C++0x13 line.long 0x00 "GNLR,The Global Nesting Level Register allows the checking and setting of the global nesting level across all host interrupts when automatic global nesting mode is set" bitfld.long 0x00 31. "AUTO_OVERRIDE,Always read as 0" "0,1" hexmask.long.tbyte 0x00 9.--30. 1. "RESERVED_1," newline hexmask.long.word 0x00 0.--8. 1. "GLB_NEST_LEVEL,The current global nesting level (highest channel that is nested)" line.long 0x04 "SISR,The System Interrupt Status Indexed Set Register allows setting the status of an interrupt" hexmask.long.tbyte 0x04 10.--31. 1. "RESERVED_1," hexmask.long.word 0x04 0.--9. 1. "STS_SET_IDX,Writes set the status of the interrupt given in the index value" line.long 0x08 "SICR,The System Interrupt Status Indexed Clear Register allows clearing the status of an interrupt" hexmask.long.tbyte 0x08 10.--31. 1. "RESERVED_1," hexmask.long.word 0x08 0.--9. 1. "STS_ClR_IDX,Writes clear the status of the interrupt given in the index value" line.long 0x0C "EISR,The System Interrupt Enable Indexed Set Register allows enabling an interrupt" hexmask.long.tbyte 0x0C 10.--31. 1. "RESERVED_1," hexmask.long.word 0x0C 0.--9. 1. "EN_SET_IDX,Writes set the enable of the interrupt given in the index value" line.long 0x10 "EICR,The System Interrupt Enable Indexed Clear Register allows disabling an interrupt" hexmask.long.tbyte 0x10 10.--31. 1. "RESERVED_1," hexmask.long.word 0x10 0.--9. 1. "EN_CLR_IDX,Writes clear the enable of the interrupt given in the index value" group.long 0x34++0x07 line.long 0x00 "HIEISR,The Host Interrupt Enable Indexed Set Register allows enabling a host interrupt output" hexmask.long.tbyte 0x00 10.--31. 1. "RESERVED_1," hexmask.long.word 0x00 0.--9. 1. "HINT_EN_SET_IDX,Writes set the enable of the host interrupt given in the index value" line.long 0x04 "HIDISR,The Host Interrupt Enable Indexed Clear Register allows disabling a host interrupt output" hexmask.long.tbyte 0x04 10.--31. 1. "RESERVED_1," hexmask.long.word 0x04 0.--9. 1. "HINT_EN_CLR_IDX,Writes clear the enable of the host interrupt given in the index value" rgroup.long 0x80++0x03 line.long 0x00 "GPIR,The Global Prioritized Index Register shows the interrupt number of the highest priority interrupt pending across all the host interrupts" bitfld.long 0x00 31. "GLB_NONE,No Interrupt is pending" "0,1" hexmask.long.tbyte 0x00 10.--30. 1. "RESERVED_1," newline hexmask.long.word 0x00 0.--9. 1. "GLB_PRI_INTR,The currently highest priority interrupt index pending across all the host interrupts" group.long 0x200++0x07 line.long 0x00 "SRSR0,The System Interrupt Status Raw/Set Register0 show the pending enabled status of the system interrupts 0 to 31" line.long 0x04 "SRSR1,The System Interrupt Status Raw/Set Register1 show the pending enabled status of the system interrupts 32 to 63" group.long 0x280++0x07 line.long 0x00 "SECR0,The System Interrupt Status Enabled/Clear Register0 show the pending enabled status of the system interrupts 0 to 31" line.long 0x04 "SECR1,The System Interrupt Status Enabled/Clear Register1 show the pending enabled status of the system interrupts 32 to 63" group.long 0x300++0x07 line.long 0x00 "ESR0,The System Interrupt Enable Set Register0 enables system interrupts 0 to 31 to trigger outputs" line.long 0x04 "ESR1,The System Interrupt Enable Set Register1 enables system interrupts 32 to 63 to trigger outputs" group.long 0x380++0x07 line.long 0x00 "ECR0,The System Interrupt Enable Clear Register0 disables system interrupts 0 to 31 to map to channels" line.long 0x04 "ECR1,The System Interrupt Enable Clear Register1 disables system interrupts 32 to 63 to map to channels" group.long 0x400++0x3F line.long 0x00 "CMR0,The Channel Map Register0 specify the channel for the system interrupts 0 to 3" rbitfld.long 0x00 28.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "CH_MAP_3,Sets the channel for the system interrupt 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x00 20.--23. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "CH_MAP_2,Sets the channel for the system interrupt 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x00 12.--15. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "CH_MAP_1,Sets the channel for the system interrupt 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x00 4.--7. "RESERVED_4," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CH_MAP_0,Sets the channel for the system interrupt 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "CMR1,The Channel Map Register1 specify the channel for the system interrupts 4 to 7" rbitfld.long 0x04 28.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 24.--27. "CH_MAP_7,Sets the channel for the system interrupt 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x04 20.--23. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--19. "CH_MAP_6,Sets the channel for the system interrupt 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x04 12.--15. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. "CH_MAP_5,Sets the channel for the system interrupt 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x04 4.--7. "RESERVED_4," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. "CH_MAP_4,Sets the channel for the system interrupt 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CMR2,The Channel Map Register2 specify the channel for the system interrupts 8 to 11" rbitfld.long 0x08 28.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. "CH_MAP_11,Sets the channel for the system interrupt 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x08 20.--23. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. "CH_MAP_10,Sets the channel for the system interrupt 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x08 12.--15. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. "CH_MAP_9,Sets the channel for the system interrupt 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x08 4.--7. "RESERVED_4," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. "CH_MAP_8,Sets the channel for the system interrupt 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "CMR3,The Channel Map Register3 specify the channel for the system interrupts 12 to 15" rbitfld.long 0x0C 28.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 24.--27. "CH_MAP_15,Sets the channel for the system interrupt 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x0C 20.--23. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16.--19. "CH_MAP_14,Sets the channel for the system interrupt 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x0C 12.--15. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 8.--11. "CH_MAP_13,Sets the channel for the system interrupt 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x0C 4.--7. "RESERVED_4," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. "CH_MAP_12,Sets the channel for the system interrupt 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "CMR4,The Channel Map Register4 specify the channel for the system interrupts 16 to 19" rbitfld.long 0x10 28.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 24.--27. "CH_MAP_19,Sets the channel for the system interrupt 19" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x10 20.--23. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 16.--19. "CH_MAP_18,Sets the channel for the system interrupt 18" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x10 12.--15. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 8.--11. "CH_MAP_17,Sets the channel for the system interrupt 17" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x10 4.--7. "RESERVED_4," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. "CH_MAP_16,Sets the channel for the system interrupt 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "CMR5,The Channel Map Register5 specify the channel for the system interrupts 20 to 23" rbitfld.long 0x14 28.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 24.--27. "CH_MAP_23,Sets the channel for the system interrupt 23" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x14 20.--23. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 16.--19. "CH_MAP_22,Sets the channel for the system interrupt 22" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x14 12.--15. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 8.--11. "CH_MAP_21,Sets the channel for the system interrupt 21" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x14 4.--7. "RESERVED_4," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 0.--3. "CH_MAP_20,Sets the channel for the system interrupt 20" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "CMR6,The Channel Map Register6 specify the channel for the system interrupts 24 to 27" rbitfld.long 0x18 28.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 24.--27. "CH_MAP_27,Sets the channel for the system interrupt 27" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x18 20.--23. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 16.--19. "CH_MAP_26,Sets the channel for the system interrupt 26" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x18 12.--15. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 8.--11. "CH_MAP_25,Sets the channel for the system interrupt 25" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x18 4.--7. "RESERVED_4," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 0.--3. "CH_MAP_24,Sets the channel for the system interrupt 24" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "CMR7,The Channel Map Register7 specify the channel for the system interrupts 28 to 31" rbitfld.long 0x1C 28.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 24.--27. "CH_MAP_31,Sets the channel for the system interrupt 31" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x1C 20.--23. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 16.--19. "CH_MAP_30,Sets the channel for the system interrupt 30" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x1C 12.--15. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 8.--11. "CH_MAP_29,Sets the channel for the system interrupt 29" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x1C 4.--7. "RESERVED_4," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--3. "CH_MAP_28,Sets the channel for the system interrupt 28" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x20 "CMR8,The Channel Map Register8 specify the channel for the system interrupts 32 to 35" rbitfld.long 0x20 28.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 24.--27. "CH_MAP_35,Sets the channel for the system interrupt 35" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x20 20.--23. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 16.--19. "CH_MAP_34,Sets the channel for the system interrupt 34" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x20 12.--15. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 8.--11. "CH_MAP_33,Sets the channel for the system interrupt 33" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x20 4.--7. "RESERVED_4," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 0.--3. "CH_MAP_32,Sets the channel for the system interrupt 32" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x24 "CMR9,The Channel Map Register9 specify the channel for the system interrupts 36 to 39" rbitfld.long 0x24 28.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 24.--27. "CH_MAP_39,Sets the channel for the system interrupt 39" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x24 20.--23. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 16.--19. "CH_MAP_38,Sets the channel for the system interrupt 38" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x24 12.--15. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 8.--11. "CH_MAP_37,Sets the channel for the system interrupt 37" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x24 4.--7. "RESERVED_4," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 0.--3. "CH_MAP_36,Sets the channel for the system interrupt 36" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x28 "CMR10,The Channel Map Register10 specify the channel for the system interrupts 40 to 43" rbitfld.long 0x28 28.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 24.--27. "CH_MAP_43,Sets the channel for the system interrupt 43" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x28 20.--23. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 16.--19. "CH_MAP_42,Sets the channel for the system interrupt 42" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x28 12.--15. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 8.--11. "CH_MAP_41,Sets the channel for the system interrupt 41" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x28 4.--7. "RESERVED_4," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 0.--3. "CH_MAP_40,Sets the channel for the system interrupt 40" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x2C "CMR11,The Channel Map Register11 specify the channel for the system interrupts 44 to 47" rbitfld.long 0x2C 28.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 24.--27. "CH_MAP_47,Sets the channel for the system interrupt 47" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x2C 20.--23. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 16.--19. "CH_MAP_46,Sets the channel for the system interrupt 46" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x2C 12.--15. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 8.--11. "CH_MAP_45,Sets the channel for the system interrupt 45" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x2C 4.--7. "RESERVED_4," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 0.--3. "CH_MAP_44,Sets the channel for the system interrupt 44" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x30 "CMR12,The Channel Map Register12 specify the channel for the system interrupts 48 to 51" rbitfld.long 0x30 28.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 24.--27. "CH_MAP_51,Sets the channel for the system interrupt 51" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x30 20.--23. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 16.--19. "CH_MAP_50,Sets the channel for the system interrupt 50" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x30 12.--15. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 8.--11. "CH_MAP_49,Sets the channel for the system interrupt 49" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x30 4.--7. "RESERVED_4," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 0.--3. "CH_MAP_48,Sets the channel for the system interrupt 48" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x34 "CMR13,The Channel Map Register13 specify the channel for the system interrupts 52 to 55" rbitfld.long 0x34 28.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 24.--27. "CH_MAP_55,Sets the channel for the system interrupt 55" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x34 20.--23. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 16.--19. "CH_MAP_54,Sets the channel for the system interrupt 54" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x34 12.--15. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 8.--11. "CH_MAP_53,Sets the channel for the system interrupt 53" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x34 4.--7. "RESERVED_4," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 0.--3. "CH_MAP_52,Sets the channel for the system interrupt 52" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x38 "CMR14,The Channel Map Register14 specify the channel for the system interrupts 56 to 59" rbitfld.long 0x38 28.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x38 24.--27. "CH_MAP_59,Sets the channel for the system interrupt 59" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x38 20.--23. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x38 16.--19. "CH_MAP_58,Sets the channel for the system interrupt 58" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x38 12.--15. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x38 8.--11. "CH_MAP_57,Sets the channel for the system interrupt 57" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x38 4.--7. "RESERVED_4," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x38 0.--3. "CH_MAP_56,Sets the channel for the system interrupt 56" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x3C "CMR15,The Channel Map Register15 specify the channel for the system interrupts 60 to 63" rbitfld.long 0x3C 28.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x3C 24.--27. "CH_MAP_63,Sets the channel for the system interrupt 63" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x3C 20.--23. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x3C 16.--19. "CH_MAP_62,Sets the channel for the system interrupt 62" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x3C 12.--15. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x3C 8.--11. "CH_MAP_61,Sets the channel for the system interrupt 61" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x3C 4.--7. "RESERVED_4," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x3C 0.--3. "CH_MAP_60,Sets the channel for the system interrupt 60" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x800++0x0B line.long 0x00 "HMR0,The Host Interrupt Map Register0 define the host interrupt for channels 0 to 3" rbitfld.long 0x00 28.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "HINT_MAP_3,HOST INTERRUPT MAP FOR CHANNEL 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x00 20.--23. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "HINT_MAP_2,HOST INTERRUPT MAP FOR CHANNEL 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x00 12.--15. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "HINT_MAP_1,HOST INTERRUPT MAP FOR CHANNEL 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x00 4.--7. "RESERVED_4," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "HINT_MAP_0,HOST INTERRUPT MAP FOR CHANNEL 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HMR1,The Host Interrupt Map Register1 define the host interrupt for channels 4 to 7" rbitfld.long 0x04 28.--31. "RESERVED_1," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 24.--27. "HINT_MAP_7,HOST INTERRUPT MAP FOR CHANNEL 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x04 20.--23. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--19. "HINT_MAP_6,HOST INTERRUPT MAP FOR CHANNEL 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x04 12.--15. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. "HINT_MAP_5,HOST INTERRUPT MAP FOR CHANNEL 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x04 4.--7. "RESERVED_4," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. "HINT_MAP_4,HOST INTERRUPT MAP FOR CHANNEL 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "HMR2,The Host Interrupt Map Register2 define the host interrupt for channels 8 to 9" hexmask.long.tbyte 0x08 12.--31. 1. "RESERVED_1," bitfld.long 0x08 8.--11. "HINT_MAP_9,HOST INTERRUPT MAP FOR CHANNEL 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x08 4.--7. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. "HINT_MAP_8,HOST INTERRUPT MAP FOR CHANNEL 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x900++0x27 line.long 0x00 "HIPIR0,The Host Interrupt Prioritized Index Register0 shows the highest priority current pending interrupt for the host interrupt 0" bitfld.long 0x00 31. "NONE_HINT_0,No pending interrupt" "0,1" hexmask.long.tbyte 0x00 10.--30. 1. "RESERVED_1," newline hexmask.long.word 0x00 0.--9. 1. "PRI_HINT_0,HOST INT 0 PRIORITIZED INTERRUPT" line.long 0x04 "HIPIR1,The Host Interrupt Prioritized Index Register1 shows the highest priority current pending interrupt for the host interrupt 1" bitfld.long 0x04 31. "NONE_HINT_1,No pending interrupt" "0,1" hexmask.long.tbyte 0x04 10.--30. 1. "RESERVED_1," newline hexmask.long.word 0x04 0.--9. 1. "PRI_HINT_1,HOST INT 1 PRIORITIZED INTERRUPT" line.long 0x08 "HIPIR2,The Host Interrupt Prioritized Index Register2 shows the highest priority current pending interrupt for the host interrupt 2" bitfld.long 0x08 31. "NONE_HINT_2,No pending interrupt" "0,1" hexmask.long.tbyte 0x08 10.--30. 1. "RESERVED_1," newline hexmask.long.word 0x08 0.--9. 1. "PRI_HINT_2,HOST INT 2 PRIORITIZED INTERRUPT" line.long 0x0C "HIPIR3,The Host Interrupt Prioritized Index Register3 shows the highest priority current pending interrupt for the host interrupt 3" bitfld.long 0x0C 31. "NONE_HINT_3,No pending interrupt" "0,1" hexmask.long.tbyte 0x0C 10.--30. 1. "RESERVED_1," newline hexmask.long.word 0x0C 0.--9. 1. "PRI_HINT_3,HOST INT 3 PRIORITIZED INTERRUPT" line.long 0x10 "HIPIR4,The Host Interrupt Prioritized Index Register4 shows the highest priority current pending interrupt for the host interrupt 4" bitfld.long 0x10 31. "NONE_HINT_4,No pending interrupt" "0,1" hexmask.long.tbyte 0x10 10.--30. 1. "RESERVED_1," newline hexmask.long.word 0x10 0.--9. 1. "PRI_HINT_4,HOST INT 4 PRIORITIZED INTERRUPT" line.long 0x14 "HIPIR5,The Host Interrupt Prioritized Index Register5 shows the highest priority current pending interrupt for the host interrupt 5" bitfld.long 0x14 31. "NONE_HINT_5,No pending interrupt" "0,1" hexmask.long.tbyte 0x14 10.--30. 1. "RESERVED_1," newline hexmask.long.word 0x14 0.--9. 1. "PRI_HINT_5,HOST INT 5 PRIORITIZED INTERRUPT" line.long 0x18 "HIPIR6,The Host Interrupt Prioritized Index Register6 shows the highest priority current pending interrupt for the host interrupt 6" bitfld.long 0x18 31. "NONE_HINT_6,No pending interrupt" "0,1" hexmask.long.tbyte 0x18 10.--30. 1. "RESERVED_1," newline hexmask.long.word 0x18 0.--9. 1. "PRI_HINT_6,HOST INT 6 PRIORITIZED INTERRUPT" line.long 0x1C "HIPIR7,The Host Interrupt Prioritized Index Register7 shows the highest priority current pending interrupt for the host interrupt 7" bitfld.long 0x1C 31. "NONE_HINT_7,No pending interrupt" "0,1" hexmask.long.tbyte 0x1C 10.--30. 1. "RESERVED_1," newline hexmask.long.word 0x1C 0.--9. 1. "PRI_HINT_7,HOST INT 7 PRIORITIZED INTERRUPT" line.long 0x20 "HIPIR8,The Host Interrupt Prioritized Index Register8 shows the highest priority current pending interrupt for the host interrupt 8" bitfld.long 0x20 31. "NONE_HINT_8,No pending interrupt" "0,1" hexmask.long.tbyte 0x20 10.--30. 1. "RESERVED_1," newline hexmask.long.word 0x20 0.--9. 1. "PRI_HINT_8,HOST INT 8 PRIORITIZED INTERRUPT" line.long 0x24 "HIPIR9,The Host Interrupt Prioritized Index Register9 shows the highest priority current pending interrupt for the host interrupt 9" bitfld.long 0x24 31. "NONE_HINT_9,No pending interrupt" "0,1" hexmask.long.tbyte 0x24 10.--30. 1. "RESERVED_1," newline hexmask.long.word 0x24 0.--9. 1. "PRI_HINT_9,HOST INT 9 PRIORITIZED INTERRUPT" group.long 0xD00++0x07 line.long 0x00 "SIPR0,The System Interrupt Polarity Register0 define the polarity of the system interrupts 0 to 31" line.long 0x04 "SIPR1,The System Interrupt Polarity Register1 define the polarity of the system interrupts 32 to 63" group.long 0xD80++0x07 line.long 0x00 "SITR0,The System Interrupt Type Register0 define the type of the system interrupts 0 to 31" line.long 0x04 "SITR1,The System Interrupt Type Register1 define the type of the system interrupts 32 to 63" group.long 0x1100++0x27 line.long 0x00 "HINLR0,The Host Interrupt Nesting Level Register0 display and control the nesting level for host interrupt 0" bitfld.long 0x00 31. "AUTO_OVERRIDE,Reads return 0" "0,1" hexmask.long.tbyte 0x00 9.--30. 1. "RESERVED_1," newline hexmask.long.word 0x00 0.--8. 1. "NEST_HINT_0,Reads return the current nesting level for the host interrupt" line.long 0x04 "HINLR1,The Host Interrupt Nesting Level Register1 display and control the nesting level for host interrupt 1" bitfld.long 0x04 31. "AUTO_OVERRIDE,Reads return 0" "0,1" hexmask.long.tbyte 0x04 9.--30. 1. "RESERVED_1," newline hexmask.long.word 0x04 0.--8. 1. "NEST_HINT_1,Reads return the current nesting level for the host interrupt" line.long 0x08 "HINLR2,The Host Interrupt Nesting Level Register2 display and control the nesting level for host interrupt 2" bitfld.long 0x08 31. "AUTO_OVERRIDE,Reads return 0" "0,1" hexmask.long.tbyte 0x08 9.--30. 1. "RESERVED_1," newline hexmask.long.word 0x08 0.--8. 1. "NEST_HINT_2,Reads return the current nesting level for the host interrupt" line.long 0x0C "HINLR3,The Host Interrupt Nesting Level Register3 display and control the nesting level for host interrupt 3" bitfld.long 0x0C 31. "AUTO_OVERRIDE,Reads return 0" "0,1" hexmask.long.tbyte 0x0C 9.--30. 1. "RESERVED_1," newline hexmask.long.word 0x0C 0.--8. 1. "NEST_HINT_3,Reads return the current nesting level for the host interrupt" line.long 0x10 "HINLR4,The Host Interrupt Nesting Level Register4 display and control the nesting level for host interrupt 4" bitfld.long 0x10 31. "AUTO_OVERRIDE,Reads return 0" "0,1" hexmask.long.tbyte 0x10 9.--30. 1. "RESERVED_1," newline hexmask.long.word 0x10 0.--8. 1. "NEST_HINT_4,Reads return the current nesting level for the host interrupt" line.long 0x14 "HINLR5,The Host Interrupt Nesting Level Register5 display and control the nesting level for host interrupt 5" bitfld.long 0x14 31. "AUTO_OVERRIDE,Reads return 0" "0,1" hexmask.long.tbyte 0x14 9.--30. 1. "RESERVED_1," newline hexmask.long.word 0x14 0.--8. 1. "NEST_HINT_5,Reads return the current nesting level for the host interrupt" line.long 0x18 "HINLR6,The Host Interrupt Nesting Level Register6 display and control the nesting level for host interrupt 6" bitfld.long 0x18 31. "AUTO_OVERRIDE,Reads return 0" "0,1" hexmask.long.tbyte 0x18 9.--30. 1. "RESERVED_1," newline hexmask.long.word 0x18 0.--8. 1. "NEST_HINT_6,Reads return the current nesting level for the host interrupt" line.long 0x1C "HINLR7,The Host Interrupt Nesting Level Register7 display and control the nesting level for host interrupt 7" bitfld.long 0x1C 31. "AUTO_OVERRIDE,Reads return 0" "0,1" hexmask.long.tbyte 0x1C 9.--30. 1. "RESERVED_1," newline hexmask.long.word 0x1C 0.--8. 1. "NEST_HINT_7,Reads return the current nesting level for the host interrupt" line.long 0x20 "HINLR8,The Host Interrupt Nesting Level Register8 display and control the nesting level for host interrupt 8" bitfld.long 0x20 31. "AUTO_OVERRIDE,Reads return 0" "0,1" hexmask.long.tbyte 0x20 9.--30. 1. "RESERVED_1," newline hexmask.long.word 0x20 0.--8. 1. "NEST_HINT_8,Reads return the current nesting level for the host interrupt" line.long 0x24 "HINLR9,The Host Interrupt Nesting Level Register9 display and control the nesting level for host interrupt 9" bitfld.long 0x24 31. "AUTO_OVERRIDE,Reads return 0" "0,1" hexmask.long.tbyte 0x24 9.--30. 1. "RESERVED_1," newline hexmask.long.word 0x24 0.--8. 1. "NEST_HINT_9,Reads return the current nesting level for the host interrupt" group.long 0x1500++0x03 line.long 0x00 "HIER,The Host Interrupt Enable Registers enable or disable individual host interrupts" hexmask.long.tbyte 0x00 10.--31. 1. "RESERVED_1," abitfld.long 0x00 0.--9. "EN_HINT,The enable of the host interrupts (one per bit)" "0x000=disabled,0x001=enabled" tree.end tree "MII_RT_CFG" base eahb:0x4a332000 rgroup.long 0x38++0x0F line.long 0x00 "PRS0,PORT RAW STATUS0" hexmask.long 0x00 2.--31. 1. "RESERVED_1," bitfld.long 0x00 1. "pr1_mii0_crs,Current state of pr1_mii0_crs" "0,1" newline bitfld.long 0x00 0. "pr1_mii0_col,Current state of pr1_mii0_col" "0,1" line.long 0x04 "PRS1,PORT RAW STATUS1" hexmask.long 0x04 2.--31. 1. "RESERVED_1," bitfld.long 0x04 1. "pr1_mii1_crs,Current state of pr1_mii1_crs" "0,1" newline bitfld.long 0x04 0. "pr1_mii1_col,Current state of pr1_mii1_col" "0,1" line.long 0x08 "RXFRMS0,RX FRAME SIZE0" hexmask.long.word 0x08 16.--31. 1. "RX_MAX_FRM_CNT,Defines the maximum received frame count" hexmask.long.word 0x08 0.--15. 1. "RX_MIN_FRM_CNT,Defines the minimum received frame count" line.long 0x0C "RXFRMS1,RX FRAME SIZE1" hexmask.long.word 0x0C 16.--31. 1. "RX_MAX_FRM_CNT,Defines the maximum received frame count" hexmask.long.word 0x0C 0.--15. 1. "RX_MIN_FRM_CNT,Defines the minimum received frame count" repeat 2. (list 0. 1. )(list 0x00 0x04 ) rgroup.long ($2+0x50)++0x03 line.long 0x00 "RXERR$1,RX ERROR0" hexmask.long 0x00 4.--31. 1. "RESERVED_1," bitfld.long 0x00 3. "RX_MAX_FRM_CNT_ERR,Error status of received frame is more than the value of RX_MAX_FRM_CNT" "No error occurred 0x,Error occurred" newline bitfld.long 0x00 2. "RX_MIN_FRM_CNT_ERR,Error status of received frame is less than the value of RX_MIN_FRM_CNT" "No error occurred 0x,Error occurred" bitfld.long 0x00 1. "RX_MAX_PRE_CNT_ERR,Error status of received preamble nibble is more than the value of RX_MAX_PRE_CNT" "No error occurred 0x,Error occurred" newline bitfld.long 0x00 0. "RX_MIN_PRE_CNT_ERR,Error status of received preamble nibble is less than the value of RX_MIN_PRE_CNT" "No error occurred 0x,Error occurred" repeat.end repeat 2. (list 0. 1. )(list 0x00 0x04 ) group.long ($2+0x48)++0x03 line.long 0x00 "RXPCNT$1,RX PREAMABLE COUNT0" hexmask.long.tbyte 0x00 8.--31. 1. "RESERVED_1," bitfld.long 0x00 4.--7. "RX_MAX_PRE_CNT,Defines the maximum number of nibbles until the start of frame delimiter (SFD) event occurred (i.e. matches 0x5D)" "Disabled 0x,Reserved 0x,4th nibble needs to have built 0x5D,?,?,?,?,?,?,?,?,?,?,?,16th nibble needs to have built 0x5D Note the..,?..." newline bitfld.long 0x00 0.--3. "RX_MIN_PRE_CNT,Defines the minimum number of nibbles until the start of frame delimiter (SFD) event occurred which is matched the value 0x5D" "Disabled 0x,1 0x5 before 0x5D 0x,2 0x5 before 0x5D N,?..." repeat.end repeat 2. (list 0. 1. )(list 0x00 0x04 ) group.long ($2+0x30)++0x03 line.long 0x00 "TXIPG$1,TX INTERPACKET GAP0" hexmask.long.tbyte 0x00 10.--31. 1. "RESERVED_1," hexmask.long.word 0x00 0.--9. 1. "TX_IPG,Defines the minimum of transmit Inter Packet Gap (IPG) which is the number of ocp_clk cycles between the de-assertion of TX_EN and the assertion of TX_EN" repeat.end repeat 2. (list 0. 1. )(list 0x00 0x04 ) rgroup.long ($2+0x20)++0x03 line.long 0x00 "TXCRC$1,TX CYCLIC REDUNDANCY CHECK0" repeat.end repeat 2. (list 0. 1. )(list 0x00 0x04 ) group.long ($2+0x10)++0x03 line.long 0x00 "TXCFG$1,TX CONFIG0" rbitfld.long 0x00 31. "RESERVED_1," "0,1" bitfld.long 0x00 28.--30. "TX_CLK_DELAY,To ensure the MII_RT IO timing values published in the device data manual the ocp_clk must be configured for 200 MHz and TX_CLK_DELAY must be set to 6h" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x00 26.--27. "RESERVED_2," "0,1,2,3" hexmask.long.word 0x00 16.--25. 1. "TX_START_DELAY,Defines the minimum time interval (delay) between receiving the RXDV for the current frame and the start of the transmit interface sending data to the MII interface" newline rbitfld.long 0x00 10.--15. "RESERVED_3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 9. "TX_AUTO_SEQUENCE,Enables transmit auto-sequence" "Disable 0x,Enable transmit state.." newline bitfld.long 0x00 8. "TX_MUX_SEL,Selects transmit data source" "Data from PRU0 (default for TXCFG1) 0x,Data from PRU1 (default for TXCFG0)" rbitfld.long 0x00 4.--7. "RESERVED_4," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 3. "TX_BYTE_SWAP,Defines the order of Byte0/1 placement for TX R30" "R30 [15:8] = Byte1{Nibble3 Nibble2} R30[ 7:0] =..,R30 [15:8] = Byte0{Nibble1 Nibble0} R30[ 7:0] =.." bitfld.long 0x00 2. "TX_EN_MODE,Enables transmit self clear on TX_EOF event" "Disable 0x,Enable TX_ENABLE will be.." newline bitfld.long 0x00 1. "TX_AUTO_PREAMBLE,Transmit data auto-preamble" "PRU will provide full preamble 0x,TX FIFO will insert pre-amble automatically" bitfld.long 0x00 0. "TX_ENABLE,Enables transmit traffic on TX PORT" "TX PORT is disabled/stopped immediately 0x,TX PORT is enabled and the frame will start once.." repeat.end repeat 2. (list 0. 1. )(list 0x00 0x04 ) group.long ($2+0x00)++0x03 line.long 0x00 "RXCFG$1,RX CONFIG0" hexmask.long 0x00 7.--31. 1. "RESERVED_1," bitfld.long 0x00 6. "RX_AUTOFWD_PRE,Enables auto-forward of received preamble" "Disable 0x,Enable it must disable.." newline bitfld.long 0x00 5. "RX_BYTE_SWAP,Defines the order of Byte0/1 placement for RX R31 and RX L2" "R31 [15:8]/RXL2 [15:8] = Byte1{Nibble3 Nibble2}..,R31 [15:8]/RXL2 [15:8] = Byte0{Nibble1 Nibble0}.." bitfld.long 0x00 4. "RX_L2_ENABLE,Enables RX L2 buffer" "Disable (RX L2..,Enable" newline bitfld.long 0x00 3. "RX_MUX_SEL,Selects receive data source" "MII RX Data from Port 0 (default for RXCFG0) 0x,MII RX Data from Port 1 (default for RXCFG1)" bitfld.long 0x00 2. "RX_CUT_PREAMBLE,Removes received preamble" "All data from Ethernet PHY are passed on to PRU..,MII interface suppresses preamble and sync frame.." newline rbitfld.long 0x00 1. "RESERVED_2," "0,1" bitfld.long 0x00 0. "RX_ENABLE,Enables the receive traffic currently selected by RX_MUX_SELECT" "Disable 0x,Enable" repeat.end tree.end tree "MDIO" base eahb:0x4a332400 group.long 0x0++0x3 line.long 0x0 "MDIOVER," hexmask.long.byte 0x0 0.--7. 1. "REVMIN,Management interface module minor revision value." hexmask.long.byte 0x0 8.--15. 1. "REVMAJ,Management interface module major revision value." hexmask.long.word 0x0 16.--31. 1. "MODID,Identifies type of peripheral." group.long 0x4++0x3 line.long 0x0 "MDIOCONTROL," hexmask.long.word 0x0 0.--15. 1. "CLKDIV,Clock divider. This field specifies the division ratio between CLK and the frequency of MDCLK. MDCLK is disabled when clkdiv is set to 0. MDCLK frequency = clk frequency/(clkdiv+1)." bitfld.long 0x0 16. "Reserved3," "0,1" bitfld.long 0x0 17. "INTTESTENB,Interrupt test enable. This bit can be set to 1 to enable the host to set the USERINT and LINKINT bits for test purposes." "0,1" newline bitfld.long 0x0 18. "FAULTENB,Fault detect enable. This bit has to be set to 1 to enable the physical layer fault detection." "0,1" bitfld.long 0x0 19. "FAULT,Fault indicator. This bit is set to 1 if the MDIO pins fail to read back what the device is driving onto them. This indicates a physical layer fault and the module state machine is reset. Writing a 1 to it clears this bit." "0,1" bitfld.long 0x0 20. "PREAMBLE,Preamble disable." "0,1" newline bitfld.long 0x0 21.--23. "Reserved2," "0,1,2,3,4,5,6,7" bitfld.long 0x0 24.--28. "HIGHEST_USER_CHANNEL,Highest user channel. This field specifies the highest user access channel that is available in the module and is currently set to 1. This implies that the MDIOUSERACCESS1 register is the highest available user access channel." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 29. "Reserved1," "0,1" newline bitfld.long 0x0 30. "ENABLE,Enable control. If the MDIO state machine is active at the time it is disabled, it will complete the current operation before halting and setting the idle bit. If using byte access, the enable bit has to be the last bit written in this register." "0,1" bitfld.long 0x0 31. "IDLE,MDIO state machine IDLE. Set to 1 when the state machine is in the idle state." "0,1" group.long 0x8++0x3 line.long 0x0 "MDIOALIVE," hexmask.long 0x0 0.--31. 1. "ALIVE,MDIO alive. Each of the 32 bits of this register is set if the most recent access to the PHY with address corresponding to the register bit number was acknowledged by the PHY, the bit is reset if the PHY fails to acknowledge the access" group.long 0xC++0x3 line.long 0x0 "MDIOLINK," hexmask.long 0x0 0.--31. 1. "LINK,MDIO link state. This register is updated after a read of the Generic Status Register of a PHY. The bit is set if the PHY with the corresponding address has link and the PHY acknowledges the read transaction" group.long 0x10++0x3 line.long 0x0 "MDIOLINKINTRAW," bitfld.long 0x0 0.--1. "LINKINTRAW,MDIO link change event, raw value. When asserted 1, a bit indicates that there was an MDIO link change event (that is, change in the MDIOLINK register) corresponding to the PHY address in the MDIOUSERPHYSEL register" "0,1,2,3" hexmask.long 0x0 2.--31. 1. "Reserved1," group.long 0x14++0x3 line.long 0x0 "MDIOLINKINTMASKED," bitfld.long 0x0 0.--1. "LINKINTMASKED,MDIO link change interrupt, masked value. When asserted 1, a bit indicates that there was an MDIO link change event" "0,1,2,3" hexmask.long 0x0 2.--31. 1. "Reserved1," group.long 0x20++0x3 line.long 0x0 "MDIOUSERINTRAW," bitfld.long 0x0 0.--1. "USERINTRAW,Raw value of MDIO user command complete event for the MDIOUSERACCESS1 register through the MDIOUSERACCESS0 register, respectively" "0,1,2,3" hexmask.long 0x0 2.--31. 1. "Reserved1," group.long 0x24++0x3 line.long 0x0 "MDIOUSERINTMASKED," bitfld.long 0x0 0.--1. "USERINTMASKED,Masked value of MDIO user command complete interrupt for the MDIOUSERACCESS1 register through the MDIOUSERACCESS0 register, respectively" "0,1,2,3" hexmask.long 0x0 2.--31. 1. "Reserved1," group.long 0x28++0x3 line.long 0x0 "MDIOUSERINTMASKSET," bitfld.long 0x0 0.--1. "USERINTMASKSET,MDIO user interrupt mask set for USERINTMASKED, respectively. Writing a bit to 1 will enable MDIO user command complete interrupts for that particular MDIOUSERACCESSn register" "0,1,2,3" hexmask.long 0x0 2.--31. 1. "Reserved1," group.long 0x2C++0x3 line.long 0x0 "MDIOUSERINTMASKCLR," bitfld.long 0x0 0.--1. "USERINTMASKCLEAR,MDIO user command complete interrupt mask clear for USERINTMASKED, respectively. Writing a bit to 1 will disable further user command complete interrupts for that particular MDIOUSERACCESSn register" "0,1,2,3" hexmask.long 0x0 2.--31. 1. "Reserved1," group.long 0x80++0x3 line.long 0x0 "MDIOUSERACCESS0," hexmask.long.word 0x0 0.--15. 1. "DATA,User data. The data value read from or to be written to the specified PHY register." bitfld.long 0x0 16.--20. "PHYADR,PHY address. Specifies the PHY to be accesses for this transaction." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. "REGADR,Register address. Specifies the PHY register to be accessed for this transaction." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x0 26.--28. "Reserved1," "0,1,2,3,4,5,6,7" bitfld.long 0x0 29. "ACK,Acknowledge. This bit is set if the PHY acknowledged the read transaction." "0,1" bitfld.long 0x0 30. "WRITE,Write enable. Setting this bit to a 1 causes the MDIO transaction to be a register write, otherwise it is a register read." "0,1" newline bitfld.long 0x0 31. "GO,Go. Writing a 1 to this bit causes the MDIO state machine to perform an MDIO access when it is convenient for it to do so, this is not an instantaneous process. Writing a 0 to this bit has no effect" "0,1" group.long 0x84++0x3 line.long 0x0 "MDIOUSERPHYSEL0," bitfld.long 0x0 0.--4. "PHYADDRMON,PHY address whose link status is to be monitored." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5. "Reserved2," "0,1" bitfld.long 0x0 6. "LINKINTENB,Link change interrupt enable. Set to 1 to enable link change status interrupts for PHY address specified in PHYADDRMON. Link change interrupts are disabled if this bit is set to 0." "0,1" newline bitfld.long 0x0 7. "LINKSEL,Link status determination select. Set to 1 to determine link status using the MLINK pin. Default value is 0 which implies that the link status is determined by the MDIO state machine." "0,1" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved1," group.long 0x88++0x3 line.long 0x0 "MDIOUSERACCESS1," hexmask.long.word 0x0 0.--15. 1. "DATA,User data. The data value read from or to be written to the specified PHY register." bitfld.long 0x0 16.--20. "PHYADR,PHY address; specifies the PHY to be accesses for this transaction." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. "REGADR,Register address; specifies the PHY register to be accessed for this transaction." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x0 26.--28. "Reserved1," "0,1,2,3,4,5,6,7" bitfld.long 0x0 29. "ACK,Acknowledge. This bit is set if the PHY acknowledged the read transaction." "0,1" bitfld.long 0x0 30. "WRITE,Write enable. Setting this bit to a 1 causes the MDIO transaction to be a register write, otherwise it is a register read." "0,1" newline bitfld.long 0x0 31. "GO,Writing a 1 to this bit causes the MDIO state machine to perform an MDIO access when it is convenient for it to do so, this is not an instantaneous process. Writing a 0 to this bit has no effect" "0,1" group.long 0x8C++0x3 line.long 0x0 "MDIOUSERPHYSEL1," bitfld.long 0x0 0.--4. "PHYADDRMON,PHY address whose link status is to be monitored." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5. "Reserved2," "0,1" bitfld.long 0x0 6. "LINKINTENB,Link change interrupt enable. Set to 1 to enable link change status interrupts for PHY address specified in PHYADDRMON. Link change interrupts are disabled if this bit is cleared to 0." "0,1" newline bitfld.long 0x0 7. "LINKSEL,Link status determination select. Set to 1 to determine link status using the MLINK pin. Default value is 0 which implies that the link status is determined by the MDIO state machine." "0,1" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved1," tree.end tree "IEP" base eahb:0x4a32E000 group.long 0x00++0x0F line.long 0x00 "IEP_TMR_GLB_CFG,GLOBAL CONFIGURE" hexmask.long.word 0x00 20.--31. 1. "RESERVED_1," hexmask.long.word 0x00 8.--19. 1. "CMP_INC,Defines the increment value when compensation is active" bitfld.long 0x00 4.--7. "DEFAULT_INC,Defines the default increment value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x00 1.--3. "RESERVED_2," "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "CNT_ENABLE,Counter enable" "Disables the counter,Enables the counter" line.long 0x04 "IEP_TMR_GLB_STS,GLOBAL STATUS" hexmask.long 0x04 1.--31. 1. "RESERVED_1," bitfld.long 0x04 0. "CNT_OVF,Counter overflow status" "No overflow,Overflow occurred" line.long 0x08 "IEP_TMR_COMPEN,COMPENSATION" hexmask.long.byte 0x08 24.--31. 1. "RESERVED_1," hexmask.long.tbyte 0x08 0.--23. 1. "COMPEN_CNT,Compensation counter" line.long 0x0C "IEP_TMR_CNT,COUNTER" group.long 0x40++0x27 line.long 0x00 "IEP_TMR_CMP_CFG,COMPARE CONFIGURE" hexmask.long.tbyte 0x00 9.--31. 1. "RESERVED_1," abitfld.long 0x00 1.--8. "CMP_EN,Compare registers enable where CMP_EN[0] maps to CMP[0]" "0x00=Disables event,0x01=Enables event" bitfld.long 0x00 0. "CMP0_RST_CNT_EN,Counter reset enable" "Disable,Enable the reset of.." line.long 0x04 "IEP_TMR_CMP_STS,COMPARE STATUS" hexmask.long.tbyte 0x04 8.--31. 1. "RESERVED_1," abitfld.long 0x04 0.--7. "CMP_HIT,Status bit for each of the compare registers where CMP_HIT[n] maps to CMP[n]" "0x00=Match has not occurred,0x01=Match occurred" line.long 0x08 "IEP_TMR_CMP0,COMPARE0" line.long 0x0C "IEP_TMR_CMP1,COMPARE1" line.long 0x10 "IEP_TMR_CMP2,COMPARE2" line.long 0x14 "IEP_TMR_CMP3,COMPARE3" line.long 0x18 "IEP_TMR_CMP4,COMPARE4" line.long 0x1C "IEP_TMR_CMP5,COMPARE5" line.long 0x20 "IEP_TMR_CMP6,COMPARE6" line.long 0x24 "IEP_TMR_CMP7,COMPARE7" group.long 0x300++0x03 line.long 0x00 "IEP_DIGIO_CTRL,DIGITAL INPUT OUTPUT CONTROL" hexmask.long 0x00 5.--31. 1. "RESERVED_1," bitfld.long 0x00 4. "IN_MODE,Enable pr1_edio_data_in [31:0] to be sampled by external pr1_edio_latch_in signal" "Disable,Enable" rbitfld.long 0x00 0.--3. "RESERVED_2," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x308++0x13 line.long 0x00 "IEP_DIGIO_DATA_IN,DIGITAL DATA INPUT" line.long 0x04 "IEP_DIGIO_DATA_IN_RAW,DIGITAL DATA INPUT DIRECT SAMPLE" line.long 0x08 "IEP_DIGIO_DATA_OUT,DIGITAL DATA OUTPUT" line.long 0x0C "IEP_DIGIO_DATA_OUT_EN,DIGITAL DATA OUT ENABLE" line.long 0x10 "IEP_DIGIO_EXP,DIGIO EXPIRATION CONFIGURE" hexmask.long 0x10 2.--31. 1. "RESERVED_1," bitfld.long 0x10 1. "OUTVALID_OVR_EN,Enable software to control value of pr1_edio_data_out [31:0]" "Disable,Enable" bitfld.long 0x10 0. "SW_DATA_OUT_UPDATE,Enable DIGIO_DATA_OUT to be driven out on pr1_edio_data_out" "Disable,Enable" tree.end tree "DEBUG" base eahb:0x4a322400 group.long 0x00++0xFF line.long 0x00 "GPREG0,DEBUG PRU GENERAL PURPOSE REGISTER 0" line.long 0x04 "GPREG1,DEBUG PRU GENERAL PURPOSE REGISTER 1" line.long 0x08 "GPREG2,DEBUG PRU GENERAL PURPOSE REGISTER 2" line.long 0x0C "GPREG3,DEBUG PRU GENERAL PURPOSE REGISTER 3" line.long 0x10 "GPREG4,DEBUG PRU GENERAL PURPOSE REGISTER 4" line.long 0x14 "GPREG5,DEBUG PRU GENERAL PURPOSE REGISTER 5" line.long 0x18 "GPREG6,DEBUG PRU GENERAL PURPOSE REGISTER 6" line.long 0x1C "GPREG7,DEBUG PRU GENERAL PURPOSE REGISTER 7" line.long 0x20 "GPREG8,DEBUG PRU GENERAL PURPOSE REGISTER 8" line.long 0x24 "GPREG9,DEBUG PRU GENERAL PURPOSE REGISTER 9" line.long 0x28 "GPREG10,DEBUG PRU GENERAL PURPOSE REGISTER 10" line.long 0x2C "GPREG11,DEBUG PRU GENERAL PURPOSE REGISTER 11" line.long 0x30 "GPREG12,DEBUG PRU GENERAL PURPOSE REGISTER 12" line.long 0x34 "GPREG13,DEBUG PRU GENERAL PURPOSE REGISTER 13" line.long 0x38 "GPREG14,DEBUG PRU GENERAL PURPOSE REGISTER 14" line.long 0x3C "GPREG15,DEBUG PRU GENERAL PURPOSE REGISTER 15" line.long 0x40 "GPREG16,DEBUG PRU GENERAL PURPOSE REGISTER 16" line.long 0x44 "GPREG17,DEBUG PRU GENERAL PURPOSE REGISTER 17" line.long 0x48 "GPREG18,DEBUG PRU GENERAL PURPOSE REGISTER 18" line.long 0x4C "GPREG19,DEBUG PRU GENERAL PURPOSE REGISTER 19" line.long 0x50 "GPREG20,DEBUG PRU GENERAL PURPOSE REGISTER 20" line.long 0x54 "GPREG21,DEBUG PRU GENERAL PURPOSE REGISTER 21" line.long 0x58 "GPREG22,DEBUG PRU GENERAL PURPOSE REGISTER 22" line.long 0x5C "GPREG23,DEBUG PRU GENERAL PURPOSE REGISTER 23" line.long 0x60 "GPREG24,DEBUG PRU GENERAL PURPOSE REGISTER 24" line.long 0x64 "GPREG25,DEBUG PRU GENERAL PURPOSE REGISTER 25" line.long 0x68 "GPREG26,DEBUG PRU GENERAL PURPOSE REGISTER 26" line.long 0x6C "GPREG27,DEBUG PRU GENERAL PURPOSE REGISTER 27" line.long 0x70 "GPREG28,DEBUG PRU GENERAL PURPOSE REGISTER 28" line.long 0x74 "GPREG29,DEBUG PRU GENERAL PURPOSE REGISTER 29" line.long 0x78 "GPREG30,DEBUG PRU GENERAL PURPOSE REGISTER 30" line.long 0x7C "GPREG31," line.long 0x80 "CT_REG0,DEBUG PRU CONSTANTS TABLE ENTRY 0" line.long 0x84 "CT_REG1,DEBUG PRU CONSTANTS TABLE ENTRY 1" line.long 0x88 "CT_REG2,DEBUG PRU CONSTANTS TABLE ENTRY 2" line.long 0x8C "CT_REG3,DEBUG PRU CONSTANTS TABLE ENTRY 3" line.long 0x90 "CT_REG4,DEBUG PRU CONSTANTS TABLE ENTRY 4" line.long 0x94 "CT_REG5,DEBUG PRU CONSTANTS TABLE ENTRY 5" line.long 0x98 "CT_REG6,DEBUG PRU CONSTANTS TABLE ENTRY 6" line.long 0x9C "CT_REG7,DEBUG PRU CONSTANTS TABLE ENTRY 7" line.long 0xA0 "CT_REG8,DEBUG PRU CONSTANTS TABLE ENTRY 8" line.long 0xA4 "CT_REG9,DEBUG PRU CONSTANTS TABLE ENTRY 9" line.long 0xA8 "CT_REG10,DEBUG PRU CONSTANTS TABLE ENTRY 10" line.long 0xAC "CT_REG11,DEBUG PRU CONSTANTS TABLE ENTRY 11" line.long 0xB0 "CT_REG12,DEBUG PRU CONSTANTS TABLE ENTRY 12" line.long 0xB4 "CT_REG13,DEBUG PRU CONSTANTS TABLE ENTRY 13" line.long 0xB8 "CT_REG14,DEBUG PRU CONSTANTS TABLE ENTRY 14" line.long 0xBC "CT_REG15,DEBUG PRU CONSTANTS TABLE ENTRY 15" line.long 0xC0 "CT_REG16,DEBUG PRU CONSTANTS TABLE ENTRY 16" line.long 0xC4 "CT_REG17,DEBUG PRU CONSTANTS TABLE ENTRY 17" line.long 0xC8 "CT_REG18,DEBUG PRU CONSTANTS TABLE ENTRY 18" line.long 0xCC "CT_REG19,DEBUG PRU CONSTANTS TABLE ENTRY 19" line.long 0xD0 "CT_REG20,DEBUG PRU CONSTANTS TABLE ENTRY 20" line.long 0xD4 "CT_REG21,DEBUG PRU CONSTANTS TABLE ENTRY 21" line.long 0xD8 "CT_REG22,DEBUG PRU CONSTANTS TABLE ENTRY 22" line.long 0xDC "CT_REG23,DEBUG PRU CONSTANTS TABLE ENTRY 23" line.long 0xE0 "CT_REG24,DEBUG PRU CONSTANTS TABLE ENTRY 24" line.long 0xE4 "CT_REG25,DEBUG PRU CONSTANTS TABLE ENTRY 25" line.long 0xE8 "CT_REG26,DEBUG PRU CONSTANTS TABLE ENTRY 26" line.long 0xEC "CT_REG27,DEBUG PRU CONSTANTS TABLE ENTRY 27" line.long 0xF0 "CT_REG28,DEBUG PRU CONSTANTS TABLE ENTRY 28" line.long 0xF4 "CT_REG29,DEBUG PRU CONSTANTS TABLE ENTRY 29" line.long 0xF8 "CT_REG30,DEBUG PRU CONSTANTS TABLE ENTRY 30" line.long 0xFC "CT_REG31,DEBUG PRU CONSTANTS TABLE ENTRY 31" tree.end else tree "Memory Subsystem" tree "GPMC (General purpose memory controller)" base ad:0x50000000 rgroup.long 0x00++0x03 line.long 0x00 "GPMC_REVISION,GPMC_REVISION Register" hexmask.long.byte 0x00 0.--7. 1. "REV,IP revision code" group.long 0x10++0x03 line.long 0x00 "GPMC_SYSCONFIG,GPMC_SYSCONFIG Register" bitfld.long 0x00 3.--4. "SIDLEMODE,Idle mode" "Force-idle,No-idle,Smart-idle,?..." bitfld.long 0x00 1. "SOFTRESET,Software reset" "Normal,Reset" newline bitfld.long 0x00 0. "AUTOIDLE,Internal OCP clock gating strategy" "Free running,Based on interconnect activity" rgroup.long 0x14++0x03 line.long 0x00 "GPMC_SYSSTATUS,GPMC_SYSSTATUS Register" bitfld.long 0x00 0. "RESETDONE,Internal reset monitoring" "In progress,Done" group.long 0x18++0x07 line.long 0x00 "GPMC_IRQSTATUS,GPMC_IRQSTATUS Register" bitfld.long 0x00 9. "WAIT1EDGEDETECTIONSTATUS,Status of the Wait1 Edge Detection interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. "WAIT0EDGEDETECTIONSTATUS,Status of the Wait0 Edge Detection interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "TERMINALCOUNTSTATUS,Status of the TerminalCountEvent interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. "FIFOEVENTSTATUS,Status of the FIFOEvent interrupt" "No interrupt,Interrupt" line.long 0x04 "GPMC_IRQENABLE,Internal Sources Of Interrupt Register" bitfld.long 0x04 9. "WAIT1EDGEDETECTIONENABLE,Enables the Wait1 Edge Detection interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. "WAIT0EDGEDETECTIONENABLE,Enables the Wait0 Edge Detection interrupt" "No interrupt,Interrupt" newline bitfld.long 0x04 1. "TERMINALCOUNTEVENTENABLE,Enables TerminalCountEvent interrupt issuing in pre-fetch or write TENABLE posting mode" "No interrupt,Interrupt" bitfld.long 0x04 0. "FIFOEVENTENABLE,Enables the FIFOEvent interrupt" "No interrupt,Interrupt" group.long 0x40++0x0B line.long 0x00 "GPMC_TIMEOUT_CONTROL,GPMC_TIMEOUT_CONTROL Register" hexmask.long.word 0x00 4.--12. 1. "TIMEOUTSTARTVALUE,Start value of the time-out counter" bitfld.long 0x00 0. "TIMEOUTENABLE,Enable bit of the TimeOut feature" "Disabled,Enabled" line.long 0x04 "GPMC_ERR_ADDRESS,GPMC_ERR_ADDRESS Register" hexmask.long 0x04 0.--30. 0x01 "ILLEGALADD,Address of illegal access" line.long 0x08 "GPMC_ERR_TYPE,GPMC_ERR_TYPE Register" bitfld.long 0x08 8.--10. "ILLEGALMCMD,System Command of the transaction that caused the error" "0,1,2,3,4,5,6,7" bitfld.long 0x08 4. "ERRORNOTSUPPADD,Not supported Address error" "No error,Error" newline bitfld.long 0x08 3. "ERRORNOTSUPPMCMD,Not supported Command error" "No error,Error" bitfld.long 0x08 2. "ERRORTIMEOUT,Time-out error" "No error,Error" newline eventfld.long 0x08 0. "ERRORVALID,Error validity status" "No error,Error" group.long 0x50++0x07 line.long 0x00 "GPMC_CONFIG,GPMC_CONFIG Register" bitfld.long 0x00 9. "WAIT1PINPOLARITY,Selects the polarity of input pin WAIT1" "Active low,Active high" bitfld.long 0x00 8. "WAIT0PINPOLARITY,Selects the polarity of input pin WAIT0" "Active low,Active high" newline bitfld.long 0x00 4. "WRITEPROTECT,Controls the WP output pin level" "Low,High" bitfld.long 0x00 1. "LIMITEDADDRESS,Limited Address device support" "Not limited,Limited" newline bitfld.long 0x00 0. "NANDFORCEPOSTEDWRITE,Forced Posted Write enable" "Disabled,Enable" line.long 0x04 "GPMC_STATUS,GPMC_STATUS Register" bitfld.long 0x04 9. "WAIT1STATUS,Is a copy of input pin WAIT1" "Asserted,De-asserted" bitfld.long 0x04 8. "WAIT0STATUS,Is a copy of input pin WAIT0" "Asserted,De-asserted" newline bitfld.long 0x04 0. "EMPTYWRITEBUFFERSTATUS,Stores the empty status of the write buffer" "Not empty,Empty" group.long 0x60++0x1B line.long 0x00 "GPMC_CONFIG1_0,GPMC_CONFIG1_0 Register" bitfld.long 0x00 31. "WRAPBURST,Enables the wrapping burst capability" "Disabled,Enabled" bitfld.long 0x00 30. "READMULTIPLE,Selects the read single or multiple access" "Single,Multiple" newline bitfld.long 0x00 29. "READTYPE,Selects the read mode operation" "Asynchronous,Synchronous" bitfld.long 0x00 28. "WRITEMULTIPLE,Selects the write single or multiple access" "Single,Multiple" newline bitfld.long 0x00 27. "WRITETYPE,Selects the write mode operation" "Asynchronous,Synchronous" bitfld.long 0x00 25.--26. "CLKACTIVATIONTIME,Output GPMC.CLK activation time on first rising edge of GPMC_CLK at start access time" "Not dalayed,1 CPMC_FCLK cycle delay,2 CPMC_FCLK cycle delay,?..." newline bitfld.long 0x00 23.--24. "ATTACHEDDEVICEPAGELENGTH,Specifies the attached device page (burst) length" "4 Words,8 Words,16 Words,?..." bitfld.long 0x00 22. "WAITREADMONITORING,Selects the Wait monitoring configuration for Read accesses" "Not monitored,Monitored" newline bitfld.long 0x00 21. "WAITWRITEMONITORING,Selects the Wait monitoring configuration for Write accesses" "Not monitored,Monitored" bitfld.long 0x00 18.--19. "WAITMONITORINGTIME,Selects input pin Wait monitoring time" "Valid data,1 CPMC_CKL cycle before valid data,2 CPMC_CKL cycle before valid data,?..." newline bitfld.long 0x00 16.--17. "WAITPINSELECT,Selects the input WAIT pin for this chip select" "WAIT0,WAIT1,?..." bitfld.long 0x00 12.--13. "DEVICESIZE,Selects the device size attached" "8 bit,16 bit,?..." newline bitfld.long 0x00 10.--11. "DEVICETYPE,Selects the attached device type" "NOR Flash like (A/Synchronous),,NAND Flash like (stream mode),?..." bitfld.long 0x00 8.--9. "MUXADDDATA,Enables the Address and data multiplexed protocol" "Non multiplexed,AAD multiplexed,Address and data multiplexed,?..." newline bitfld.long 0x00 4. "TIMEPARAGRANULARITY,Signals timing latencies scalar factor" "x1,x2" bitfld.long 0x00 0.--1. "GPMCFCLKDIVIDER,Divides the GPMC.FCLK clock" "/1,/2,/3,/4" line.long 0x04 "GPMC_CONFIG2_0,GPMC_CONFIG2_0 Register" bitfld.long 0x04 16.--20. "CSWROFFTIME,CS# de-assertion time from start cycle time for write accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. "CSRDOFFTIME,CS# de-assertion time from start cycle time for read accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x04 7. "CSEXTRADELAY,CS# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" bitfld.long 0x04 0.--3. "CSONTIME,CS# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "GPMC_CONFIG3_0,GPMC_CONFIG3_0 Register" bitfld.long 0x08 28.--30. "ADVAADMUXWROFFTIME,ADV# de-assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. "ADVAADMUXRDOFFTIME,ADV# assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 16.--20. "ADVWROFFTIME,ADV# de-assertion time from start cycle time for write accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 8.--12. "ADVRDOFFTIME,ADV# de-assertion time from start cycle time for read accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 7. "ADVEXTRADELAY,ADV# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" bitfld.long 0x08 4.--6. "ADVAADMUXONTIME,ADV# assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0.--3. "ADVONTIME,ADV# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "GPMC_CONFIG4_0,GPMC_CONFIG4_0 Register" bitfld.long 0x0C 24.--28. "WEOFFTIME,WE# de-assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 23. "WEEXTRADELAY,WE# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" newline bitfld.long 0x0C 16.--19. "WEONTIME,WE# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 13.--15. "OEAADMUXOFFTIME,OE# de-assertion time for the first address phase in an AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 8.--12. "OEOFFTIME,OE# de-assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 7. "OEEXTRADELAY,OE# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" newline bitfld.long 0x0C 4.--6. "OEAADMUXONTIME,OE# assertion time for the first address phase in an AAD" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--3. "OEONTIME,OE# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "GPMC_CONFIG5_0,GPMC_CONFIG5_0 Register" bitfld.long 0x10 24.--27. "PAGEBURSTACCESSTIME,Delay between successive words in a multiple access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 16.--20. "RDACCESSTIME,Delay between start cycle time and first data valid" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x10 8.--12. "WRCYCLETIME,Total write cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 0.--4. "RDCYCLETIME,Total read cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "GPMC_CONFIG6_0,GPMC_CONFIG6_0 Register" bitfld.long 0x14 24.--28. "WRACCESSTIME,Delay from StartAccessTime to the GPMC rising edge" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 16.--19. "WRDATAONADMUXBUS,Specifies on which GPMC.FCLK rising edge the first data of the synchronous burst write is driven in the ADMUXBUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x14 8.--11. "CYCLE2CYCLEDELAY,Chip select high pulse delay between two successive accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 7. "CYCLE2CYCLESAMECSEN,Add Cycle2CycleDelay between two successive accesses to the same chip-select" "Not delayed,Delayed" newline bitfld.long 0x14 6. "CYCLE2CYCLEDIFFCSEN,Add Cycle2CycleDelay between two successive accesses to a different chip-select" "Not delayed,Delayed" bitfld.long 0x14 0.--3. "BUSTURNAROUND,Bus turn around latency between two successive accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "GPMC_CONFIG7_0,GPMC_CONFIG7_0 Register" bitfld.long 0x18 8.--11. "MASKADDRESS,Chip-select mask address" "256 Mbytes,,,,,,,,128 Mbytes,,,,64 Mbytes,,32 Mbytes,16 Mbytes" bitfld.long 0x18 6. "CSVALID,Chip-select enable (reset value is 1 for CS[0] (active low) and 0 for CS[1] to CS[5] (active low))" "Disabled,Enabled" newline bitfld.long 0x18 0.--5. "BASEADDRESS,Chip-select base address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" wgroup.long (0x60+0x1C)++0x07 line.long 0x00 "GPMC_NAND_COMMAND_0,GPMC_NAND_COMMAND_0 Register" line.long 0x04 "GPMC_NAND_ADDRESS_0,GPMC_NAND_ADDRESS_0 Rregister" group.long (0x60+0x20)++0x03 line.long 0x00 "GPMC_NAND_DATA_0,GPMC_NAND_DATA_0 Register" group.long 0x90++0x1B line.long 0x00 "GPMC_CONFIG1_1,GPMC_CONFIG1_1 Register" bitfld.long 0x00 31. "WRAPBURST,Enables the wrapping burst capability" "Disabled,Enabled" bitfld.long 0x00 30. "READMULTIPLE,Selects the read single or multiple access" "Single,Multiple" newline bitfld.long 0x00 29. "READTYPE,Selects the read mode operation" "Asynchronous,Synchronous" bitfld.long 0x00 28. "WRITEMULTIPLE,Selects the write single or multiple access" "Single,Multiple" newline bitfld.long 0x00 27. "WRITETYPE,Selects the write mode operation" "Asynchronous,Synchronous" bitfld.long 0x00 25.--26. "CLKACTIVATIONTIME,Output GPMC.CLK activation time on first rising edge of GPMC_CLK at start access time" "Not dalayed,1 CPMC_FCLK cycle delay,2 CPMC_FCLK cycle delay,?..." newline bitfld.long 0x00 23.--24. "ATTACHEDDEVICEPAGELENGTH,Specifies the attached device page (burst) length" "4 Words,8 Words,16 Words,?..." bitfld.long 0x00 22. "WAITREADMONITORING,Selects the Wait monitoring configuration for Read accesses" "Not monitored,Monitored" newline bitfld.long 0x00 21. "WAITWRITEMONITORING,Selects the Wait monitoring configuration for Write accesses" "Not monitored,Monitored" bitfld.long 0x00 18.--19. "WAITMONITORINGTIME,Selects input pin Wait monitoring time" "Valid data,1 CPMC_CKL cycle before valid data,2 CPMC_CKL cycle before valid data,?..." newline bitfld.long 0x00 16.--17. "WAITPINSELECT,Selects the input WAIT pin for this chip select" "WAIT0,WAIT1,?..." bitfld.long 0x00 12.--13. "DEVICESIZE,Selects the device size attached" "8 bit,16 bit,?..." newline bitfld.long 0x00 10.--11. "DEVICETYPE,Selects the attached device type" "NOR Flash like (A/Synchronous),,NAND Flash like (stream mode),?..." bitfld.long 0x00 8.--9. "MUXADDDATA,Enables the Address and data multiplexed protocol" "Non multiplexed,AAD multiplexed,Address and data multiplexed,?..." newline bitfld.long 0x00 4. "TIMEPARAGRANULARITY,Signals timing latencies scalar factor" "x1,x2" bitfld.long 0x00 0.--1. "GPMCFCLKDIVIDER,Divides the GPMC.FCLK clock" "/1,/2,/3,/4" line.long 0x04 "GPMC_CONFIG2_1,GPMC_CONFIG2_1 Register" bitfld.long 0x04 16.--20. "CSWROFFTIME,CS# de-assertion time from start cycle time for write accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. "CSRDOFFTIME,CS# de-assertion time from start cycle time for read accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x04 7. "CSEXTRADELAY,CS# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" bitfld.long 0x04 0.--3. "CSONTIME,CS# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "GPMC_CONFIG3_1,GPMC_CONFIG3_1 Register" bitfld.long 0x08 28.--30. "ADVAADMUXWROFFTIME,ADV# de-assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. "ADVAADMUXRDOFFTIME,ADV# assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 16.--20. "ADVWROFFTIME,ADV# de-assertion time from start cycle time for write accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 8.--12. "ADVRDOFFTIME,ADV# de-assertion time from start cycle time for read accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 7. "ADVEXTRADELAY,ADV# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" bitfld.long 0x08 4.--6. "ADVAADMUXONTIME,ADV# assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0.--3. "ADVONTIME,ADV# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "GPMC_CONFIG4_1,GPMC_CONFIG4_1 Register" bitfld.long 0x0C 24.--28. "WEOFFTIME,WE# de-assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 23. "WEEXTRADELAY,WE# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" newline bitfld.long 0x0C 16.--19. "WEONTIME,WE# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 13.--15. "OEAADMUXOFFTIME,OE# de-assertion time for the first address phase in an AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 8.--12. "OEOFFTIME,OE# de-assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 7. "OEEXTRADELAY,OE# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" newline bitfld.long 0x0C 4.--6. "OEAADMUXONTIME,OE# assertion time for the first address phase in an AAD" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--3. "OEONTIME,OE# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "GPMC_CONFIG5_1,GPMC_CONFIG5_1 Register" bitfld.long 0x10 24.--27. "PAGEBURSTACCESSTIME,Delay between successive words in a multiple access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 16.--20. "RDACCESSTIME,Delay between start cycle time and first data valid" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x10 8.--12. "WRCYCLETIME,Total write cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 0.--4. "RDCYCLETIME,Total read cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "GPMC_CONFIG6_1,GPMC_CONFIG6_1 Register" bitfld.long 0x14 24.--28. "WRACCESSTIME,Delay from StartAccessTime to the GPMC rising edge" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 16.--19. "WRDATAONADMUXBUS,Specifies on which GPMC.FCLK rising edge the first data of the synchronous burst write is driven in the ADMUXBUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x14 8.--11. "CYCLE2CYCLEDELAY,Chip select high pulse delay between two successive accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 7. "CYCLE2CYCLESAMECSEN,Add Cycle2CycleDelay between two successive accesses to the same chip-select" "Not delayed,Delayed" newline bitfld.long 0x14 6. "CYCLE2CYCLEDIFFCSEN,Add Cycle2CycleDelay between two successive accesses to a different chip-select" "Not delayed,Delayed" bitfld.long 0x14 0.--3. "BUSTURNAROUND,Bus turn around latency between two successive accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "GPMC_CONFIG7_1,GPMC_CONFIG7_1 Register" bitfld.long 0x18 8.--11. "MASKADDRESS,Chip-select mask address" "256 Mbytes,,,,,,,,128 Mbytes,,,,64 Mbytes,,32 Mbytes,16 Mbytes" bitfld.long 0x18 6. "CSVALID,Chip-select enable (reset value is 1 for CS[0] (active low) and 0 for CS[1] to CS[5] (active low))" "Disabled,Enabled" newline bitfld.long 0x18 0.--5. "BASEADDRESS,Chip-select base address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" wgroup.long (0x90+0x1C)++0x07 line.long 0x00 "GPMC_NAND_COMMAND_0,GPMC_NAND_COMMAND_0 Register" line.long 0x04 "GPMC_NAND_ADDRESS_0,GPMC_NAND_ADDRESS_0 Rregister" group.long (0x90+0x20)++0x03 line.long 0x00 "GPMC_NAND_DATA_0,GPMC_NAND_DATA_0 Register" group.long 0xC0++0x1B line.long 0x00 "GPMC_CONFIG1_2,GPMC_CONFIG1_2 Register" bitfld.long 0x00 31. "WRAPBURST,Enables the wrapping burst capability" "Disabled,Enabled" bitfld.long 0x00 30. "READMULTIPLE,Selects the read single or multiple access" "Single,Multiple" newline bitfld.long 0x00 29. "READTYPE,Selects the read mode operation" "Asynchronous,Synchronous" bitfld.long 0x00 28. "WRITEMULTIPLE,Selects the write single or multiple access" "Single,Multiple" newline bitfld.long 0x00 27. "WRITETYPE,Selects the write mode operation" "Asynchronous,Synchronous" bitfld.long 0x00 25.--26. "CLKACTIVATIONTIME,Output GPMC.CLK activation time on first rising edge of GPMC_CLK at start access time" "Not dalayed,1 CPMC_FCLK cycle delay,2 CPMC_FCLK cycle delay,?..." newline bitfld.long 0x00 23.--24. "ATTACHEDDEVICEPAGELENGTH,Specifies the attached device page (burst) length" "4 Words,8 Words,16 Words,?..." bitfld.long 0x00 22. "WAITREADMONITORING,Selects the Wait monitoring configuration for Read accesses" "Not monitored,Monitored" newline bitfld.long 0x00 21. "WAITWRITEMONITORING,Selects the Wait monitoring configuration for Write accesses" "Not monitored,Monitored" bitfld.long 0x00 18.--19. "WAITMONITORINGTIME,Selects input pin Wait monitoring time" "Valid data,1 CPMC_CKL cycle before valid data,2 CPMC_CKL cycle before valid data,?..." newline bitfld.long 0x00 16.--17. "WAITPINSELECT,Selects the input WAIT pin for this chip select" "WAIT0,WAIT1,?..." bitfld.long 0x00 12.--13. "DEVICESIZE,Selects the device size attached" "8 bit,16 bit,?..." newline bitfld.long 0x00 10.--11. "DEVICETYPE,Selects the attached device type" "NOR Flash like (A/Synchronous),,NAND Flash like (stream mode),?..." bitfld.long 0x00 8.--9. "MUXADDDATA,Enables the Address and data multiplexed protocol" "Non multiplexed,AAD multiplexed,Address and data multiplexed,?..." newline bitfld.long 0x00 4. "TIMEPARAGRANULARITY,Signals timing latencies scalar factor" "x1,x2" bitfld.long 0x00 0.--1. "GPMCFCLKDIVIDER,Divides the GPMC.FCLK clock" "/1,/2,/3,/4" line.long 0x04 "GPMC_CONFIG2_2,GPMC_CONFIG2_2 Register" bitfld.long 0x04 16.--20. "CSWROFFTIME,CS# de-assertion time from start cycle time for write accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. "CSRDOFFTIME,CS# de-assertion time from start cycle time for read accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x04 7. "CSEXTRADELAY,CS# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" bitfld.long 0x04 0.--3. "CSONTIME,CS# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "GPMC_CONFIG3_2,GPMC_CONFIG3_2 Register" bitfld.long 0x08 28.--30. "ADVAADMUXWROFFTIME,ADV# de-assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. "ADVAADMUXRDOFFTIME,ADV# assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 16.--20. "ADVWROFFTIME,ADV# de-assertion time from start cycle time for write accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 8.--12. "ADVRDOFFTIME,ADV# de-assertion time from start cycle time for read accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 7. "ADVEXTRADELAY,ADV# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" bitfld.long 0x08 4.--6. "ADVAADMUXONTIME,ADV# assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0.--3. "ADVONTIME,ADV# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "GPMC_CONFIG4_2,GPMC_CONFIG4_2 Register" bitfld.long 0x0C 24.--28. "WEOFFTIME,WE# de-assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 23. "WEEXTRADELAY,WE# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" newline bitfld.long 0x0C 16.--19. "WEONTIME,WE# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 13.--15. "OEAADMUXOFFTIME,OE# de-assertion time for the first address phase in an AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 8.--12. "OEOFFTIME,OE# de-assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 7. "OEEXTRADELAY,OE# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" newline bitfld.long 0x0C 4.--6. "OEAADMUXONTIME,OE# assertion time for the first address phase in an AAD" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--3. "OEONTIME,OE# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "GPMC_CONFIG5_2,GPMC_CONFIG5_2 Register" bitfld.long 0x10 24.--27. "PAGEBURSTACCESSTIME,Delay between successive words in a multiple access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 16.--20. "RDACCESSTIME,Delay between start cycle time and first data valid" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x10 8.--12. "WRCYCLETIME,Total write cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 0.--4. "RDCYCLETIME,Total read cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "GPMC_CONFIG6_2,GPMC_CONFIG6_2 Register" bitfld.long 0x14 24.--28. "WRACCESSTIME,Delay from StartAccessTime to the GPMC rising edge" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 16.--19. "WRDATAONADMUXBUS,Specifies on which GPMC.FCLK rising edge the first data of the synchronous burst write is driven in the ADMUXBUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x14 8.--11. "CYCLE2CYCLEDELAY,Chip select high pulse delay between two successive accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 7. "CYCLE2CYCLESAMECSEN,Add Cycle2CycleDelay between two successive accesses to the same chip-select" "Not delayed,Delayed" newline bitfld.long 0x14 6. "CYCLE2CYCLEDIFFCSEN,Add Cycle2CycleDelay between two successive accesses to a different chip-select" "Not delayed,Delayed" bitfld.long 0x14 0.--3. "BUSTURNAROUND,Bus turn around latency between two successive accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "GPMC_CONFIG7_2,GPMC_CONFIG7_2 Register" bitfld.long 0x18 8.--11. "MASKADDRESS,Chip-select mask address" "256 Mbytes,,,,,,,,128 Mbytes,,,,64 Mbytes,,32 Mbytes,16 Mbytes" bitfld.long 0x18 6. "CSVALID,Chip-select enable (reset value is 1 for CS[0] (active low) and 0 for CS[1] to CS[5] (active low))" "Disabled,Enabled" newline bitfld.long 0x18 0.--5. "BASEADDRESS,Chip-select base address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" wgroup.long (0xC0+0x1C)++0x07 line.long 0x00 "GPMC_NAND_COMMAND_0,GPMC_NAND_COMMAND_0 Register" line.long 0x04 "GPMC_NAND_ADDRESS_0,GPMC_NAND_ADDRESS_0 Rregister" group.long (0xC0+0x20)++0x03 line.long 0x00 "GPMC_NAND_DATA_0,GPMC_NAND_DATA_0 Register" group.long 0xF0++0x1B line.long 0x00 "GPMC_CONFIG1_3,GPMC_CONFIG1_3 Register" bitfld.long 0x00 31. "WRAPBURST,Enables the wrapping burst capability" "Disabled,Enabled" bitfld.long 0x00 30. "READMULTIPLE,Selects the read single or multiple access" "Single,Multiple" newline bitfld.long 0x00 29. "READTYPE,Selects the read mode operation" "Asynchronous,Synchronous" bitfld.long 0x00 28. "WRITEMULTIPLE,Selects the write single or multiple access" "Single,Multiple" newline bitfld.long 0x00 27. "WRITETYPE,Selects the write mode operation" "Asynchronous,Synchronous" bitfld.long 0x00 25.--26. "CLKACTIVATIONTIME,Output GPMC.CLK activation time on first rising edge of GPMC_CLK at start access time" "Not dalayed,1 CPMC_FCLK cycle delay,2 CPMC_FCLK cycle delay,?..." newline bitfld.long 0x00 23.--24. "ATTACHEDDEVICEPAGELENGTH,Specifies the attached device page (burst) length" "4 Words,8 Words,16 Words,?..." bitfld.long 0x00 22. "WAITREADMONITORING,Selects the Wait monitoring configuration for Read accesses" "Not monitored,Monitored" newline bitfld.long 0x00 21. "WAITWRITEMONITORING,Selects the Wait monitoring configuration for Write accesses" "Not monitored,Monitored" bitfld.long 0x00 18.--19. "WAITMONITORINGTIME,Selects input pin Wait monitoring time" "Valid data,1 CPMC_CKL cycle before valid data,2 CPMC_CKL cycle before valid data,?..." newline bitfld.long 0x00 16.--17. "WAITPINSELECT,Selects the input WAIT pin for this chip select" "WAIT0,WAIT1,?..." bitfld.long 0x00 12.--13. "DEVICESIZE,Selects the device size attached" "8 bit,16 bit,?..." newline bitfld.long 0x00 10.--11. "DEVICETYPE,Selects the attached device type" "NOR Flash like (A/Synchronous),,NAND Flash like (stream mode),?..." bitfld.long 0x00 8.--9. "MUXADDDATA,Enables the Address and data multiplexed protocol" "Non multiplexed,AAD multiplexed,Address and data multiplexed,?..." newline bitfld.long 0x00 4. "TIMEPARAGRANULARITY,Signals timing latencies scalar factor" "x1,x2" bitfld.long 0x00 0.--1. "GPMCFCLKDIVIDER,Divides the GPMC.FCLK clock" "/1,/2,/3,/4" line.long 0x04 "GPMC_CONFIG2_3,GPMC_CONFIG2_3 Register" bitfld.long 0x04 16.--20. "CSWROFFTIME,CS# de-assertion time from start cycle time for write accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. "CSRDOFFTIME,CS# de-assertion time from start cycle time for read accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x04 7. "CSEXTRADELAY,CS# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" bitfld.long 0x04 0.--3. "CSONTIME,CS# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "GPMC_CONFIG3_3,GPMC_CONFIG3_3 Register" bitfld.long 0x08 28.--30. "ADVAADMUXWROFFTIME,ADV# de-assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. "ADVAADMUXRDOFFTIME,ADV# assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 16.--20. "ADVWROFFTIME,ADV# de-assertion time from start cycle time for write accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 8.--12. "ADVRDOFFTIME,ADV# de-assertion time from start cycle time for read accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 7. "ADVEXTRADELAY,ADV# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" bitfld.long 0x08 4.--6. "ADVAADMUXONTIME,ADV# assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0.--3. "ADVONTIME,ADV# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "GPMC_CONFIG4_3,GPMC_CONFIG4_3 Register" bitfld.long 0x0C 24.--28. "WEOFFTIME,WE# de-assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 23. "WEEXTRADELAY,WE# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" newline bitfld.long 0x0C 16.--19. "WEONTIME,WE# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 13.--15. "OEAADMUXOFFTIME,OE# de-assertion time for the first address phase in an AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 8.--12. "OEOFFTIME,OE# de-assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 7. "OEEXTRADELAY,OE# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" newline bitfld.long 0x0C 4.--6. "OEAADMUXONTIME,OE# assertion time for the first address phase in an AAD" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--3. "OEONTIME,OE# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "GPMC_CONFIG5_3,GPMC_CONFIG5_3 Register" bitfld.long 0x10 24.--27. "PAGEBURSTACCESSTIME,Delay between successive words in a multiple access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 16.--20. "RDACCESSTIME,Delay between start cycle time and first data valid" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x10 8.--12. "WRCYCLETIME,Total write cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 0.--4. "RDCYCLETIME,Total read cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "GPMC_CONFIG6_3,GPMC_CONFIG6_3 Register" bitfld.long 0x14 24.--28. "WRACCESSTIME,Delay from StartAccessTime to the GPMC rising edge" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 16.--19. "WRDATAONADMUXBUS,Specifies on which GPMC.FCLK rising edge the first data of the synchronous burst write is driven in the ADMUXBUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x14 8.--11. "CYCLE2CYCLEDELAY,Chip select high pulse delay between two successive accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 7. "CYCLE2CYCLESAMECSEN,Add Cycle2CycleDelay between two successive accesses to the same chip-select" "Not delayed,Delayed" newline bitfld.long 0x14 6. "CYCLE2CYCLEDIFFCSEN,Add Cycle2CycleDelay between two successive accesses to a different chip-select" "Not delayed,Delayed" bitfld.long 0x14 0.--3. "BUSTURNAROUND,Bus turn around latency between two successive accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "GPMC_CONFIG7_3,GPMC_CONFIG7_3 Register" bitfld.long 0x18 8.--11. "MASKADDRESS,Chip-select mask address" "256 Mbytes,,,,,,,,128 Mbytes,,,,64 Mbytes,,32 Mbytes,16 Mbytes" bitfld.long 0x18 6. "CSVALID,Chip-select enable (reset value is 1 for CS[0] (active low) and 0 for CS[1] to CS[5] (active low))" "Disabled,Enabled" newline bitfld.long 0x18 0.--5. "BASEADDRESS,Chip-select base address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" wgroup.long (0xF0+0x1C)++0x07 line.long 0x00 "GPMC_NAND_COMMAND_0,GPMC_NAND_COMMAND_0 Register" line.long 0x04 "GPMC_NAND_ADDRESS_0,GPMC_NAND_ADDRESS_0 Rregister" group.long (0xF0+0x20)++0x03 line.long 0x00 "GPMC_NAND_DATA_0,GPMC_NAND_DATA_0 Register" group.long 0x120++0x1B line.long 0x00 "GPMC_CONFIG1_4,GPMC_CONFIG1_4 Register" bitfld.long 0x00 31. "WRAPBURST,Enables the wrapping burst capability" "Disabled,Enabled" bitfld.long 0x00 30. "READMULTIPLE,Selects the read single or multiple access" "Single,Multiple" newline bitfld.long 0x00 29. "READTYPE,Selects the read mode operation" "Asynchronous,Synchronous" bitfld.long 0x00 28. "WRITEMULTIPLE,Selects the write single or multiple access" "Single,Multiple" newline bitfld.long 0x00 27. "WRITETYPE,Selects the write mode operation" "Asynchronous,Synchronous" bitfld.long 0x00 25.--26. "CLKACTIVATIONTIME,Output GPMC.CLK activation time on first rising edge of GPMC_CLK at start access time" "Not dalayed,1 CPMC_FCLK cycle delay,2 CPMC_FCLK cycle delay,?..." newline bitfld.long 0x00 23.--24. "ATTACHEDDEVICEPAGELENGTH,Specifies the attached device page (burst) length" "4 Words,8 Words,16 Words,?..." bitfld.long 0x00 22. "WAITREADMONITORING,Selects the Wait monitoring configuration for Read accesses" "Not monitored,Monitored" newline bitfld.long 0x00 21. "WAITWRITEMONITORING,Selects the Wait monitoring configuration for Write accesses" "Not monitored,Monitored" bitfld.long 0x00 18.--19. "WAITMONITORINGTIME,Selects input pin Wait monitoring time" "Valid data,1 CPMC_CKL cycle before valid data,2 CPMC_CKL cycle before valid data,?..." newline bitfld.long 0x00 16.--17. "WAITPINSELECT,Selects the input WAIT pin for this chip select" "WAIT0,WAIT1,?..." bitfld.long 0x00 12.--13. "DEVICESIZE,Selects the device size attached" "8 bit,16 bit,?..." newline bitfld.long 0x00 10.--11. "DEVICETYPE,Selects the attached device type" "NOR Flash like (A/Synchronous),,NAND Flash like (stream mode),?..." bitfld.long 0x00 8.--9. "MUXADDDATA,Enables the Address and data multiplexed protocol" "Non multiplexed,AAD multiplexed,Address and data multiplexed,?..." newline bitfld.long 0x00 4. "TIMEPARAGRANULARITY,Signals timing latencies scalar factor" "x1,x2" bitfld.long 0x00 0.--1. "GPMCFCLKDIVIDER,Divides the GPMC.FCLK clock" "/1,/2,/3,/4" line.long 0x04 "GPMC_CONFIG2_4,GPMC_CONFIG2_4 Register" bitfld.long 0x04 16.--20. "CSWROFFTIME,CS# de-assertion time from start cycle time for write accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. "CSRDOFFTIME,CS# de-assertion time from start cycle time for read accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x04 7. "CSEXTRADELAY,CS# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" bitfld.long 0x04 0.--3. "CSONTIME,CS# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "GPMC_CONFIG3_4,GPMC_CONFIG3_4 Register" bitfld.long 0x08 28.--30. "ADVAADMUXWROFFTIME,ADV# de-assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. "ADVAADMUXRDOFFTIME,ADV# assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 16.--20. "ADVWROFFTIME,ADV# de-assertion time from start cycle time for write accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 8.--12. "ADVRDOFFTIME,ADV# de-assertion time from start cycle time for read accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 7. "ADVEXTRADELAY,ADV# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" bitfld.long 0x08 4.--6. "ADVAADMUXONTIME,ADV# assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0.--3. "ADVONTIME,ADV# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "GPMC_CONFIG4_4,GPMC_CONFIG4_4 Register" bitfld.long 0x0C 24.--28. "WEOFFTIME,WE# de-assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 23. "WEEXTRADELAY,WE# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" newline bitfld.long 0x0C 16.--19. "WEONTIME,WE# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 13.--15. "OEAADMUXOFFTIME,OE# de-assertion time for the first address phase in an AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 8.--12. "OEOFFTIME,OE# de-assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 7. "OEEXTRADELAY,OE# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" newline bitfld.long 0x0C 4.--6. "OEAADMUXONTIME,OE# assertion time for the first address phase in an AAD" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--3. "OEONTIME,OE# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "GPMC_CONFIG5_4,GPMC_CONFIG5_4 Register" bitfld.long 0x10 24.--27. "PAGEBURSTACCESSTIME,Delay between successive words in a multiple access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 16.--20. "RDACCESSTIME,Delay between start cycle time and first data valid" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x10 8.--12. "WRCYCLETIME,Total write cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 0.--4. "RDCYCLETIME,Total read cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "GPMC_CONFIG6_4,GPMC_CONFIG6_4 Register" bitfld.long 0x14 24.--28. "WRACCESSTIME,Delay from StartAccessTime to the GPMC rising edge" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 16.--19. "WRDATAONADMUXBUS,Specifies on which GPMC.FCLK rising edge the first data of the synchronous burst write is driven in the ADMUXBUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x14 8.--11. "CYCLE2CYCLEDELAY,Chip select high pulse delay between two successive accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 7. "CYCLE2CYCLESAMECSEN,Add Cycle2CycleDelay between two successive accesses to the same chip-select" "Not delayed,Delayed" newline bitfld.long 0x14 6. "CYCLE2CYCLEDIFFCSEN,Add Cycle2CycleDelay between two successive accesses to a different chip-select" "Not delayed,Delayed" bitfld.long 0x14 0.--3. "BUSTURNAROUND,Bus turn around latency between two successive accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "GPMC_CONFIG7_4,GPMC_CONFIG7_4 Register" bitfld.long 0x18 8.--11. "MASKADDRESS,Chip-select mask address" "256 Mbytes,,,,,,,,128 Mbytes,,,,64 Mbytes,,32 Mbytes,16 Mbytes" bitfld.long 0x18 6. "CSVALID,Chip-select enable (reset value is 1 for CS[0] (active low) and 0 for CS[1] to CS[5] (active low))" "Disabled,Enabled" newline bitfld.long 0x18 0.--5. "BASEADDRESS,Chip-select base address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" wgroup.long (0x120+0x1C)++0x07 line.long 0x00 "GPMC_NAND_COMMAND_0,GPMC_NAND_COMMAND_0 Register" line.long 0x04 "GPMC_NAND_ADDRESS_0,GPMC_NAND_ADDRESS_0 Rregister" group.long (0x120+0x20)++0x03 line.long 0x00 "GPMC_NAND_DATA_0,GPMC_NAND_DATA_0 Register" group.long 0x150++0x1B line.long 0x00 "GPMC_CONFIG1_5,GPMC_CONFIG1_5 Register" bitfld.long 0x00 31. "WRAPBURST,Enables the wrapping burst capability" "Disabled,Enabled" bitfld.long 0x00 30. "READMULTIPLE,Selects the read single or multiple access" "Single,Multiple" newline bitfld.long 0x00 29. "READTYPE,Selects the read mode operation" "Asynchronous,Synchronous" bitfld.long 0x00 28. "WRITEMULTIPLE,Selects the write single or multiple access" "Single,Multiple" newline bitfld.long 0x00 27. "WRITETYPE,Selects the write mode operation" "Asynchronous,Synchronous" bitfld.long 0x00 25.--26. "CLKACTIVATIONTIME,Output GPMC.CLK activation time on first rising edge of GPMC_CLK at start access time" "Not dalayed,1 CPMC_FCLK cycle delay,2 CPMC_FCLK cycle delay,?..." newline bitfld.long 0x00 23.--24. "ATTACHEDDEVICEPAGELENGTH,Specifies the attached device page (burst) length" "4 Words,8 Words,16 Words,?..." bitfld.long 0x00 22. "WAITREADMONITORING,Selects the Wait monitoring configuration for Read accesses" "Not monitored,Monitored" newline bitfld.long 0x00 21. "WAITWRITEMONITORING,Selects the Wait monitoring configuration for Write accesses" "Not monitored,Monitored" bitfld.long 0x00 18.--19. "WAITMONITORINGTIME,Selects input pin Wait monitoring time" "Valid data,1 CPMC_CKL cycle before valid data,2 CPMC_CKL cycle before valid data,?..." newline bitfld.long 0x00 16.--17. "WAITPINSELECT,Selects the input WAIT pin for this chip select" "WAIT0,WAIT1,?..." bitfld.long 0x00 12.--13. "DEVICESIZE,Selects the device size attached" "8 bit,16 bit,?..." newline bitfld.long 0x00 10.--11. "DEVICETYPE,Selects the attached device type" "NOR Flash like (A/Synchronous),,NAND Flash like (stream mode),?..." bitfld.long 0x00 8.--9. "MUXADDDATA,Enables the Address and data multiplexed protocol" "Non multiplexed,AAD multiplexed,Address and data multiplexed,?..." newline bitfld.long 0x00 4. "TIMEPARAGRANULARITY,Signals timing latencies scalar factor" "x1,x2" bitfld.long 0x00 0.--1. "GPMCFCLKDIVIDER,Divides the GPMC.FCLK clock" "/1,/2,/3,/4" line.long 0x04 "GPMC_CONFIG2_5,GPMC_CONFIG2_5 Register" bitfld.long 0x04 16.--20. "CSWROFFTIME,CS# de-assertion time from start cycle time for write accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. "CSRDOFFTIME,CS# de-assertion time from start cycle time for read accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x04 7. "CSEXTRADELAY,CS# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" bitfld.long 0x04 0.--3. "CSONTIME,CS# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "GPMC_CONFIG3_5,GPMC_CONFIG3_5 Register" bitfld.long 0x08 28.--30. "ADVAADMUXWROFFTIME,ADV# de-assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. "ADVAADMUXRDOFFTIME,ADV# assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 16.--20. "ADVWROFFTIME,ADV# de-assertion time from start cycle time for write accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 8.--12. "ADVRDOFFTIME,ADV# de-assertion time from start cycle time for read accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 7. "ADVEXTRADELAY,ADV# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" bitfld.long 0x08 4.--6. "ADVAADMUXONTIME,ADV# assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0.--3. "ADVONTIME,ADV# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "GPMC_CONFIG4_5,GPMC_CONFIG4_5 Register" bitfld.long 0x0C 24.--28. "WEOFFTIME,WE# de-assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 23. "WEEXTRADELAY,WE# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" newline bitfld.long 0x0C 16.--19. "WEONTIME,WE# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 13.--15. "OEAADMUXOFFTIME,OE# de-assertion time for the first address phase in an AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 8.--12. "OEOFFTIME,OE# de-assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 7. "OEEXTRADELAY,OE# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" newline bitfld.long 0x0C 4.--6. "OEAADMUXONTIME,OE# assertion time for the first address phase in an AAD" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--3. "OEONTIME,OE# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "GPMC_CONFIG5_5,GPMC_CONFIG5_5 Register" bitfld.long 0x10 24.--27. "PAGEBURSTACCESSTIME,Delay between successive words in a multiple access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 16.--20. "RDACCESSTIME,Delay between start cycle time and first data valid" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x10 8.--12. "WRCYCLETIME,Total write cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 0.--4. "RDCYCLETIME,Total read cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "GPMC_CONFIG6_5,GPMC_CONFIG6_5 Register" bitfld.long 0x14 24.--28. "WRACCESSTIME,Delay from StartAccessTime to the GPMC rising edge" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 16.--19. "WRDATAONADMUXBUS,Specifies on which GPMC.FCLK rising edge the first data of the synchronous burst write is driven in the ADMUXBUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x14 8.--11. "CYCLE2CYCLEDELAY,Chip select high pulse delay between two successive accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 7. "CYCLE2CYCLESAMECSEN,Add Cycle2CycleDelay between two successive accesses to the same chip-select" "Not delayed,Delayed" newline bitfld.long 0x14 6. "CYCLE2CYCLEDIFFCSEN,Add Cycle2CycleDelay between two successive accesses to a different chip-select" "Not delayed,Delayed" bitfld.long 0x14 0.--3. "BUSTURNAROUND,Bus turn around latency between two successive accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "GPMC_CONFIG7_5,GPMC_CONFIG7_5 Register" bitfld.long 0x18 8.--11. "MASKADDRESS,Chip-select mask address" "256 Mbytes,,,,,,,,128 Mbytes,,,,64 Mbytes,,32 Mbytes,16 Mbytes" bitfld.long 0x18 6. "CSVALID,Chip-select enable (reset value is 1 for CS[0] (active low) and 0 for CS[1] to CS[5] (active low))" "Disabled,Enabled" newline bitfld.long 0x18 0.--5. "BASEADDRESS,Chip-select base address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" wgroup.long (0x150+0x1C)++0x07 line.long 0x00 "GPMC_NAND_COMMAND_0,GPMC_NAND_COMMAND_0 Register" line.long 0x04 "GPMC_NAND_ADDRESS_0,GPMC_NAND_ADDRESS_0 Rregister" group.long (0x150+0x20)++0x03 line.long 0x00 "GPMC_NAND_DATA_0,GPMC_NAND_DATA_0 Register" group.long 0x180++0x1B line.long 0x00 "GPMC_CONFIG1_6,GPMC_CONFIG1_6 Register" bitfld.long 0x00 31. "WRAPBURST,Enables the wrapping burst capability" "Disabled,Enabled" bitfld.long 0x00 30. "READMULTIPLE,Selects the read single or multiple access" "Single,Multiple" newline bitfld.long 0x00 29. "READTYPE,Selects the read mode operation" "Asynchronous,Synchronous" bitfld.long 0x00 28. "WRITEMULTIPLE,Selects the write single or multiple access" "Single,Multiple" newline bitfld.long 0x00 27. "WRITETYPE,Selects the write mode operation" "Asynchronous,Synchronous" bitfld.long 0x00 25.--26. "CLKACTIVATIONTIME,Output GPMC.CLK activation time on first rising edge of GPMC_CLK at start access time" "Not dalayed,1 CPMC_FCLK cycle delay,2 CPMC_FCLK cycle delay,?..." newline bitfld.long 0x00 23.--24. "ATTACHEDDEVICEPAGELENGTH,Specifies the attached device page (burst) length" "4 Words,8 Words,16 Words,?..." bitfld.long 0x00 22. "WAITREADMONITORING,Selects the Wait monitoring configuration for Read accesses" "Not monitored,Monitored" newline bitfld.long 0x00 21. "WAITWRITEMONITORING,Selects the Wait monitoring configuration for Write accesses" "Not monitored,Monitored" bitfld.long 0x00 18.--19. "WAITMONITORINGTIME,Selects input pin Wait monitoring time" "Valid data,1 CPMC_CKL cycle before valid data,2 CPMC_CKL cycle before valid data,?..." newline bitfld.long 0x00 16.--17. "WAITPINSELECT,Selects the input WAIT pin for this chip select" "WAIT0,WAIT1,?..." bitfld.long 0x00 12.--13. "DEVICESIZE,Selects the device size attached" "8 bit,16 bit,?..." newline bitfld.long 0x00 10.--11. "DEVICETYPE,Selects the attached device type" "NOR Flash like (A/Synchronous),,NAND Flash like (stream mode),?..." bitfld.long 0x00 8.--9. "MUXADDDATA,Enables the Address and data multiplexed protocol" "Non multiplexed,AAD multiplexed,Address and data multiplexed,?..." newline bitfld.long 0x00 4. "TIMEPARAGRANULARITY,Signals timing latencies scalar factor" "x1,x2" bitfld.long 0x00 0.--1. "GPMCFCLKDIVIDER,Divides the GPMC.FCLK clock" "/1,/2,/3,/4" line.long 0x04 "GPMC_CONFIG2_6,GPMC_CONFIG2_6 Register" bitfld.long 0x04 16.--20. "CSWROFFTIME,CS# de-assertion time from start cycle time for write accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. "CSRDOFFTIME,CS# de-assertion time from start cycle time for read accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x04 7. "CSEXTRADELAY,CS# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" bitfld.long 0x04 0.--3. "CSONTIME,CS# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "GPMC_CONFIG3_6,GPMC_CONFIG3_6 Register" bitfld.long 0x08 28.--30. "ADVAADMUXWROFFTIME,ADV# de-assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. "ADVAADMUXRDOFFTIME,ADV# assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 16.--20. "ADVWROFFTIME,ADV# de-assertion time from start cycle time for write accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 8.--12. "ADVRDOFFTIME,ADV# de-assertion time from start cycle time for read accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 7. "ADVEXTRADELAY,ADV# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" bitfld.long 0x08 4.--6. "ADVAADMUXONTIME,ADV# assertion for first address phase when using the AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0.--3. "ADVONTIME,ADV# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "GPMC_CONFIG4_6,GPMC_CONFIG4_6 Register" bitfld.long 0x0C 24.--28. "WEOFFTIME,WE# de-assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 23. "WEEXTRADELAY,WE# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" newline bitfld.long 0x0C 16.--19. "WEONTIME,WE# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 13.--15. "OEAADMUXOFFTIME,OE# de-assertion time for the first address phase in an AAD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 8.--12. "OEOFFTIME,OE# de-assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 7. "OEEXTRADELAY,OE# Add Extra Half GPMC.FCLK cycle" "Not delayed,Delayed" newline bitfld.long 0x0C 4.--6. "OEAADMUXONTIME,OE# assertion time for the first address phase in an AAD" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--3. "OEONTIME,OE# assertion time from start cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "GPMC_CONFIG5_6,GPMC_CONFIG5_6 Register" bitfld.long 0x10 24.--27. "PAGEBURSTACCESSTIME,Delay between successive words in a multiple access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 16.--20. "RDACCESSTIME,Delay between start cycle time and first data valid" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x10 8.--12. "WRCYCLETIME,Total write cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 0.--4. "RDCYCLETIME,Total read cycle time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "GPMC_CONFIG6_6,GPMC_CONFIG6_6 Register" bitfld.long 0x14 24.--28. "WRACCESSTIME,Delay from StartAccessTime to the GPMC rising edge" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 16.--19. "WRDATAONADMUXBUS,Specifies on which GPMC.FCLK rising edge the first data of the synchronous burst write is driven in the ADMUXBUS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x14 8.--11. "CYCLE2CYCLEDELAY,Chip select high pulse delay between two successive accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 7. "CYCLE2CYCLESAMECSEN,Add Cycle2CycleDelay between two successive accesses to the same chip-select" "Not delayed,Delayed" newline bitfld.long 0x14 6. "CYCLE2CYCLEDIFFCSEN,Add Cycle2CycleDelay between two successive accesses to a different chip-select" "Not delayed,Delayed" bitfld.long 0x14 0.--3. "BUSTURNAROUND,Bus turn around latency between two successive accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "GPMC_CONFIG7_6,GPMC_CONFIG7_6 Register" bitfld.long 0x18 8.--11. "MASKADDRESS,Chip-select mask address" "256 Mbytes,,,,,,,,128 Mbytes,,,,64 Mbytes,,32 Mbytes,16 Mbytes" bitfld.long 0x18 6. "CSVALID,Chip-select enable (reset value is 1 for CS[0] (active low) and 0 for CS[1] to CS[5] (active low))" "Disabled,Enabled" newline bitfld.long 0x18 0.--5. "BASEADDRESS,Chip-select base address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" wgroup.long (0x180+0x1C)++0x07 line.long 0x00 "GPMC_NAND_COMMAND_0,GPMC_NAND_COMMAND_0 Register" line.long 0x04 "GPMC_NAND_ADDRESS_0,GPMC_NAND_ADDRESS_0 Rregister" group.long (0x180+0x20)++0x03 line.long 0x00 "GPMC_NAND_DATA_0,GPMC_NAND_DATA_0 Register" group.long 0x1E0++0x07 line.long 0x00 "GPMC_PREFETCH_CONFIG1,GPMC_PREFETCH_CONFIG1 Register" bitfld.long 0x00 28.--30. "CYCLEOPTIMIZATION,Define the number of GPMC.FCLK cycles to be substracted from RdCycleTime WrCycleTime AccessTime CSRdOffTime CSWrOffTime ADVRdOffTime ADVWrOffTime OEOffTime WEOffTime" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "ENABLEOPTIMIZEDACCESS,Enables access cycle optimization" "Disabled,Enabled" newline bitfld.long 0x00 24.--26. "ENGINECSSELECTOR,Selects the CS (active low) where Prefetch Postwrite engine is active" "CS0,CS1,CS2,CS3,CS4,CS5,CS6,?..." bitfld.long 0x00 23. "PFPWENROUNDROBIN,Prefetch Postwrite engine round robin arbitration enable" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "PFPWWEIGHTEDPRIO,Set Prefetch Postwrite engine access grant" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" hexmask.long.byte 0x00 8.--14. 1. "FIFOTHRESHOLD,FIFO threshold" newline bitfld.long 0x00 7. "ENABLEENGINE,Prefetch postwrite engine enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. "WAITPINSELECTOR, WAIT pin selector" "Wait0EdgeDetection,Wait1EdgeDetection,?..." newline bitfld.long 0x00 3. "SYNCHROMODE,Engine synchronous mode enable" "Synchronous,Asynchronous" bitfld.long 0x00 2. "DMAMODE,Set DMA synchronization mode" "Interrupt,Request" newline bitfld.long 0x00 0. "ACCESSMODE,Set access mode" "Prefetch read mode,Write-posting mode" line.long 0x04 "GPMC_PREFETCH_CONFIG2,GPMC_PREFETCH_CONFIG2 Register" hexmask.long.word 0x04 0.--13. 1. "TRANSFERCOUNT,Selects the number of bytes to be read/written by the engine to the selected CS(active low)" group.long 0x1EC++0x03 line.long 0x00 "GPMC_PREFETCH_CONTROL,GPMC_PREFETCH_CONTROL Register" bitfld.long 0x00 0. "STARTENGINE,Resets the FIFO pointer and starts the engine (Read/Write)" "Stopped/Stop,Running/Start" rgroup.long 0x1F0++0x03 line.long 0x00 "GPMC_PREFETCH_STATUS,GPMC_PREFETCH_STATUS Register" hexmask.long.byte 0x00 24.--30. 1. "FIFOPOINTER,FIFOPOINTER" bitfld.long 0x00 16. "FIFOTHRESHOLDSTATUS,Set when FIFOPointer exceeds FIFOThreshold value" "Smaller or equal,Greater" newline hexmask.long.word 0x00 0.--13. 1. "COUNTVALUE,Number of remaining bytes to be read or to be written by the engine according to the TransferCount value" group.long 0x1F4++0x0B line.long 0x00 "GPMC_ECC_CONFIG,GPMC_ECC_CONFIG Register" bitfld.long 0x00 16. "ECCALGORITHM,ECC algorithm used" "Hamming code,BCH code" bitfld.long 0x00 12.--13. "ECCBCHTSEL,Error correction capability used for BCH" "Up to 4 bits,Up to 8 bits,Up to 16 bits,?..." newline bitfld.long 0x00 8.--11. "ECCWRAPMODE,Spare area organization definition for the BCH algorithm" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. "ECC16B,Selects an ECC calculated on 16 columns" "8 columns,16 columns" newline bitfld.long 0x00 4.--6. "ECCTOPSECTOR,Number of sectors to process with the BCH algorithm" "1,2,,4,,,,8" bitfld.long 0x00 1.--3. "ECCCS,Selects the Chip-select where ECC is computed" "0,1,2,3,4,5,?..." newline bitfld.long 0x00 0. "ECCENABLE,Enables the ECC feature" "Disabled,Enabled" line.long 0x04 "GPMC_ECC_CONTROL,GPMC_ECC_CONTROL Register" bitfld.long 0x04 8. "ECCCLEAR,Clear all ECC result registers" "No effect,Clear" bitfld.long 0x04 0.--3. "ECCPOINTER,Selects ECC result register" "0,1,2,3,4,5,6,7,8,9,?..." line.long 0x08 "GPMC_ECC_SIZE_CONFIG,GPMC_ECC_SIZE_CONFIG Register" hexmask.long.byte 0x08 22.--29. 1. "ECCSIZE1,Defines ECC size 1" hexmask.long.byte 0x08 12.--19. 1. "ECCSIZE0,Defines ECC size 0" newline bitfld.long 0x08 8. "ECC9RESULTSIZE,Selects ECC size for ECC 9 result register" "ECCSIZE0,ECCSIZE1" bitfld.long 0x08 7. "ECC8RESULTSIZE,Selects ECC size for ECC 8 result register" "ECCSIZE0,ECCSIZE1" newline bitfld.long 0x08 6. "ECC7RESULTSIZE,Selects ECC size for ECC 7 result register" "ECCSIZE0,ECCSIZE1" bitfld.long 0x08 5. "ECC6RESULTSIZE,Selects ECC size for ECC 6 result register" "ECCSIZE0,ECCSIZE1" newline bitfld.long 0x08 4. "ECC5RESULTSIZE,Selects ECC size for ECC 5 result register" "ECCSIZE0,ECCSIZE1" bitfld.long 0x08 3. "ECC4RESULTSIZE,Selects ECC size for ECC 4 result register" "ECCSIZE0,ECCSIZE1" newline bitfld.long 0x08 2. "ECC3RESULTSIZE,Selects ECC size for ECC 3 result register" "ECCSIZE0,ECCSIZE1" bitfld.long 0x08 1. "ECC2RESULTSIZE,Selects ECC size for ECC 2 result register" "ECCSIZE0,ECCSIZE1" newline bitfld.long 0x08 0. "ECC1RESULTSIZE,Selects ECC size for ECC 1 result register" "ECCSIZE0,ECCSIZE1" if (((d.l(ad:0x50000000+0x1FC))&0x3FC00000)==0x3FC00000)||(((d.l(ad:0x50000000+0x1FC))&0xFF000)==0xFF000) rgroup.long 0x200++0x03 line.long 0x00 "GPMC_ECC1_RESULT,GPMC_ECC1_RESULT Register" bitfld.long 0x00 27. "P2048O,Odd Row Parity bit 2048" "0,1" bitfld.long 0x00 26. "P1024O,Odd Row Parity bit 1024" "0,1" newline bitfld.long 0x00 25. "P512O,Odd Row Parity bit 512" "0,1" bitfld.long 0x00 24. "P256O,Odd Row Parity bit 256" "0,1" newline bitfld.long 0x00 23. "P128O,Odd Row Parity bit 128" "0,1" bitfld.long 0x00 22. "P64O,Odd Row Parity bit 64" "0,1" newline bitfld.long 0x00 21. "P32O,Odd Row Parity bit 32" "0,1" bitfld.long 0x00 20. "P16O,Odd Row Parity bit 16" "0,1" newline bitfld.long 0x00 19. "P8O,Odd Row Parity bit 8" "0,1" bitfld.long 0x00 18. "P4O,Odd Column Parity bit 4" "0,1" newline bitfld.long 0x00 17. "P2O,Odd Column Parity bit 2" "0,1" bitfld.long 0x00 16. "P1O,Odd Column Parity bit 1" "0,1" newline bitfld.long 0x00 11. "P2048E,Even Row Parity bit 2048" "0,1" bitfld.long 0x00 10. "P1024E,Even Row Parity bit 1024" "0,1" newline bitfld.long 0x00 9. "P512E,Even Row Parity bit 512" "0,1" bitfld.long 0x00 8. "P256E,Even Row Parity bit 256" "0,1" newline bitfld.long 0x00 7. "P128E,Even Row Parity bit 128" "0,1" bitfld.long 0x00 6. "P64E,Even Row Parity bit 64" "0,1" newline bitfld.long 0x00 5. "P32E,Even Row Parity bit 32" "0,1" bitfld.long 0x00 4. "P16E,Even Row Parity bit 16" "0,1" newline bitfld.long 0x00 3. "P8E,Even Row Parity bit 8" "0,1" bitfld.long 0x00 2. "P4E,Even Column Parity bit 4" "0,1" newline bitfld.long 0x00 1. "P2E,Even Column Parity bit 2" "0,1" bitfld.long 0x00 0. "P1E,Even Column Parity bit 1" "0,1" else rgroup.long 0x200++0x03 line.long 0x00 "GPMC_ECC1_RESULT,GPMC_ECC1_RESULT Register" bitfld.long 0x00 26. "P1024O,Odd Row Parity bit 1024" "0,1" bitfld.long 0x00 25. "P512O,Odd Row Parity bit 512" "0,1" newline bitfld.long 0x00 24. "P256O,Odd Row Parity bit 256" "0,1" bitfld.long 0x00 23. "P128O,Odd Row Parity bit 128" "0,1" newline bitfld.long 0x00 22. "P64O,Odd Row Parity bit 64" "0,1" bitfld.long 0x00 21. "P32O,Odd Row Parity bit 32" "0,1" newline bitfld.long 0x00 20. "P16O,Odd Row Parity bit 16" "0,1" bitfld.long 0x00 19. "P8O,Odd Row Parity bit 8" "0,1" newline bitfld.long 0x00 18. "P4O,Odd Column Parity bit 4" "0,1" bitfld.long 0x00 17. "P2O,Odd Column Parity bit 2" "0,1" newline bitfld.long 0x00 16. "P1O,Odd Column Parity bit 1" "0,1" bitfld.long 0x00 10. "P1024E,Even Row Parity bit 1024" "0,1" newline bitfld.long 0x00 9. "P512E,Even Row Parity bit 512" "0,1" bitfld.long 0x00 8. "P256E,Even Row Parity bit 256" "0,1" newline bitfld.long 0x00 7. "P128E,Even Row Parity bit 128" "0,1" bitfld.long 0x00 6. "P64E,Even Row Parity bit 64" "0,1" newline bitfld.long 0x00 5. "P32E,Even Row Parity bit 32" "0,1" bitfld.long 0x00 4. "P16E,Even Row Parity bit 16" "0,1" newline bitfld.long 0x00 3. "P8E,Even Row Parity bit 8" "0,1" bitfld.long 0x00 2. "P4E,Even Column Parity bit 4" "0,1" newline bitfld.long 0x00 1. "P2E,Even Column Parity bit 2" "0,1" bitfld.long 0x00 0. "P1E,Even Column Parity bit 1" "0,1" endif if (((d.l(ad:0x50000000+0x1FC))&0x3FC00000)==0x3FC00000)||(((d.l(ad:0x50000000+0x1FC))&0xFF000)==0xFF000) rgroup.long 0x204++0x03 line.long 0x00 "GPMC_ECC2_RESULT,GPMC_ECC2_RESULT Register" bitfld.long 0x00 27. "P2048O,Odd Row Parity bit 2048" "0,1" bitfld.long 0x00 26. "P1024O,Odd Row Parity bit 1024" "0,1" newline bitfld.long 0x00 25. "P512O,Odd Row Parity bit 512" "0,1" bitfld.long 0x00 24. "P256O,Odd Row Parity bit 256" "0,1" newline bitfld.long 0x00 23. "P128O,Odd Row Parity bit 128" "0,1" bitfld.long 0x00 22. "P64O,Odd Row Parity bit 64" "0,1" newline bitfld.long 0x00 21. "P32O,Odd Row Parity bit 32" "0,1" bitfld.long 0x00 20. "P16O,Odd Row Parity bit 16" "0,1" newline bitfld.long 0x00 19. "P8O,Odd Row Parity bit 8" "0,1" bitfld.long 0x00 18. "P4O,Odd Column Parity bit 4" "0,1" newline bitfld.long 0x00 17. "P2O,Odd Column Parity bit 2" "0,1" bitfld.long 0x00 16. "P1O,Odd Column Parity bit 1" "0,1" newline bitfld.long 0x00 11. "P2048E,Even Row Parity bit 2048" "0,1" bitfld.long 0x00 10. "P1024E,Even Row Parity bit 1024" "0,1" newline bitfld.long 0x00 9. "P512E,Even Row Parity bit 512" "0,1" bitfld.long 0x00 8. "P256E,Even Row Parity bit 256" "0,1" newline bitfld.long 0x00 7. "P128E,Even Row Parity bit 128" "0,1" bitfld.long 0x00 6. "P64E,Even Row Parity bit 64" "0,1" newline bitfld.long 0x00 5. "P32E,Even Row Parity bit 32" "0,1" bitfld.long 0x00 4. "P16E,Even Row Parity bit 16" "0,1" newline bitfld.long 0x00 3. "P8E,Even Row Parity bit 8" "0,1" bitfld.long 0x00 2. "P4E,Even Column Parity bit 4" "0,1" newline bitfld.long 0x00 1. "P2E,Even Column Parity bit 2" "0,1" bitfld.long 0x00 0. "P1E,Even Column Parity bit 1" "0,1" else rgroup.long 0x204++0x03 line.long 0x00 "GPMC_ECC2_RESULT,GPMC_ECC2_RESULT Register" bitfld.long 0x00 26. "P1024O,Odd Row Parity bit 1024" "0,1" bitfld.long 0x00 25. "P512O,Odd Row Parity bit 512" "0,1" newline bitfld.long 0x00 24. "P256O,Odd Row Parity bit 256" "0,1" bitfld.long 0x00 23. "P128O,Odd Row Parity bit 128" "0,1" newline bitfld.long 0x00 22. "P64O,Odd Row Parity bit 64" "0,1" bitfld.long 0x00 21. "P32O,Odd Row Parity bit 32" "0,1" newline bitfld.long 0x00 20. "P16O,Odd Row Parity bit 16" "0,1" bitfld.long 0x00 19. "P8O,Odd Row Parity bit 8" "0,1" newline bitfld.long 0x00 18. "P4O,Odd Column Parity bit 4" "0,1" bitfld.long 0x00 17. "P2O,Odd Column Parity bit 2" "0,1" newline bitfld.long 0x00 16. "P1O,Odd Column Parity bit 1" "0,1" bitfld.long 0x00 10. "P1024E,Even Row Parity bit 1024" "0,1" newline bitfld.long 0x00 9. "P512E,Even Row Parity bit 512" "0,1" bitfld.long 0x00 8. "P256E,Even Row Parity bit 256" "0,1" newline bitfld.long 0x00 7. "P128E,Even Row Parity bit 128" "0,1" bitfld.long 0x00 6. "P64E,Even Row Parity bit 64" "0,1" newline bitfld.long 0x00 5. "P32E,Even Row Parity bit 32" "0,1" bitfld.long 0x00 4. "P16E,Even Row Parity bit 16" "0,1" newline bitfld.long 0x00 3. "P8E,Even Row Parity bit 8" "0,1" bitfld.long 0x00 2. "P4E,Even Column Parity bit 4" "0,1" newline bitfld.long 0x00 1. "P2E,Even Column Parity bit 2" "0,1" bitfld.long 0x00 0. "P1E,Even Column Parity bit 1" "0,1" endif if (((d.l(ad:0x50000000+0x1FC))&0x3FC00000)==0x3FC00000)||(((d.l(ad:0x50000000+0x1FC))&0xFF000)==0xFF000) rgroup.long 0x208++0x03 line.long 0x00 "GPMC_ECC3_RESULT,GPMC_ECC3_RESULT Register" bitfld.long 0x00 27. "P2048O,Odd Row Parity bit 2048" "0,1" bitfld.long 0x00 26. "P1024O,Odd Row Parity bit 1024" "0,1" newline bitfld.long 0x00 25. "P512O,Odd Row Parity bit 512" "0,1" bitfld.long 0x00 24. "P256O,Odd Row Parity bit 256" "0,1" newline bitfld.long 0x00 23. "P128O,Odd Row Parity bit 128" "0,1" bitfld.long 0x00 22. "P64O,Odd Row Parity bit 64" "0,1" newline bitfld.long 0x00 21. "P32O,Odd Row Parity bit 32" "0,1" bitfld.long 0x00 20. "P16O,Odd Row Parity bit 16" "0,1" newline bitfld.long 0x00 19. "P8O,Odd Row Parity bit 8" "0,1" bitfld.long 0x00 18. "P4O,Odd Column Parity bit 4" "0,1" newline bitfld.long 0x00 17. "P2O,Odd Column Parity bit 2" "0,1" bitfld.long 0x00 16. "P1O,Odd Column Parity bit 1" "0,1" newline bitfld.long 0x00 11. "P2048E,Even Row Parity bit 2048" "0,1" bitfld.long 0x00 10. "P1024E,Even Row Parity bit 1024" "0,1" newline bitfld.long 0x00 9. "P512E,Even Row Parity bit 512" "0,1" bitfld.long 0x00 8. "P256E,Even Row Parity bit 256" "0,1" newline bitfld.long 0x00 7. "P128E,Even Row Parity bit 128" "0,1" bitfld.long 0x00 6. "P64E,Even Row Parity bit 64" "0,1" newline bitfld.long 0x00 5. "P32E,Even Row Parity bit 32" "0,1" bitfld.long 0x00 4. "P16E,Even Row Parity bit 16" "0,1" newline bitfld.long 0x00 3. "P8E,Even Row Parity bit 8" "0,1" bitfld.long 0x00 2. "P4E,Even Column Parity bit 4" "0,1" newline bitfld.long 0x00 1. "P2E,Even Column Parity bit 2" "0,1" bitfld.long 0x00 0. "P1E,Even Column Parity bit 1" "0,1" else rgroup.long 0x208++0x03 line.long 0x00 "GPMC_ECC3_RESULT,GPMC_ECC3_RESULT Register" bitfld.long 0x00 26. "P1024O,Odd Row Parity bit 1024" "0,1" bitfld.long 0x00 25. "P512O,Odd Row Parity bit 512" "0,1" newline bitfld.long 0x00 24. "P256O,Odd Row Parity bit 256" "0,1" bitfld.long 0x00 23. "P128O,Odd Row Parity bit 128" "0,1" newline bitfld.long 0x00 22. "P64O,Odd Row Parity bit 64" "0,1" bitfld.long 0x00 21. "P32O,Odd Row Parity bit 32" "0,1" newline bitfld.long 0x00 20. "P16O,Odd Row Parity bit 16" "0,1" bitfld.long 0x00 19. "P8O,Odd Row Parity bit 8" "0,1" newline bitfld.long 0x00 18. "P4O,Odd Column Parity bit 4" "0,1" bitfld.long 0x00 17. "P2O,Odd Column Parity bit 2" "0,1" newline bitfld.long 0x00 16. "P1O,Odd Column Parity bit 1" "0,1" bitfld.long 0x00 10. "P1024E,Even Row Parity bit 1024" "0,1" newline bitfld.long 0x00 9. "P512E,Even Row Parity bit 512" "0,1" bitfld.long 0x00 8. "P256E,Even Row Parity bit 256" "0,1" newline bitfld.long 0x00 7. "P128E,Even Row Parity bit 128" "0,1" bitfld.long 0x00 6. "P64E,Even Row Parity bit 64" "0,1" newline bitfld.long 0x00 5. "P32E,Even Row Parity bit 32" "0,1" bitfld.long 0x00 4. "P16E,Even Row Parity bit 16" "0,1" newline bitfld.long 0x00 3. "P8E,Even Row Parity bit 8" "0,1" bitfld.long 0x00 2. "P4E,Even Column Parity bit 4" "0,1" newline bitfld.long 0x00 1. "P2E,Even Column Parity bit 2" "0,1" bitfld.long 0x00 0. "P1E,Even Column Parity bit 1" "0,1" endif if (((d.l(ad:0x50000000+0x1FC))&0x3FC00000)==0x3FC00000)||(((d.l(ad:0x50000000+0x1FC))&0xFF000)==0xFF000) rgroup.long 0x20C++0x03 line.long 0x00 "GPMC_ECC4_RESULT,GPMC_ECC4_RESULT Register" bitfld.long 0x00 27. "P2048O,Odd Row Parity bit 2048" "0,1" bitfld.long 0x00 26. "P1024O,Odd Row Parity bit 1024" "0,1" newline bitfld.long 0x00 25. "P512O,Odd Row Parity bit 512" "0,1" bitfld.long 0x00 24. "P256O,Odd Row Parity bit 256" "0,1" newline bitfld.long 0x00 23. "P128O,Odd Row Parity bit 128" "0,1" bitfld.long 0x00 22. "P64O,Odd Row Parity bit 64" "0,1" newline bitfld.long 0x00 21. "P32O,Odd Row Parity bit 32" "0,1" bitfld.long 0x00 20. "P16O,Odd Row Parity bit 16" "0,1" newline bitfld.long 0x00 19. "P8O,Odd Row Parity bit 8" "0,1" bitfld.long 0x00 18. "P4O,Odd Column Parity bit 4" "0,1" newline bitfld.long 0x00 17. "P2O,Odd Column Parity bit 2" "0,1" bitfld.long 0x00 16. "P1O,Odd Column Parity bit 1" "0,1" newline bitfld.long 0x00 11. "P2048E,Even Row Parity bit 2048" "0,1" bitfld.long 0x00 10. "P1024E,Even Row Parity bit 1024" "0,1" newline bitfld.long 0x00 9. "P512E,Even Row Parity bit 512" "0,1" bitfld.long 0x00 8. "P256E,Even Row Parity bit 256" "0,1" newline bitfld.long 0x00 7. "P128E,Even Row Parity bit 128" "0,1" bitfld.long 0x00 6. "P64E,Even Row Parity bit 64" "0,1" newline bitfld.long 0x00 5. "P32E,Even Row Parity bit 32" "0,1" bitfld.long 0x00 4. "P16E,Even Row Parity bit 16" "0,1" newline bitfld.long 0x00 3. "P8E,Even Row Parity bit 8" "0,1" bitfld.long 0x00 2. "P4E,Even Column Parity bit 4" "0,1" newline bitfld.long 0x00 1. "P2E,Even Column Parity bit 2" "0,1" bitfld.long 0x00 0. "P1E,Even Column Parity bit 1" "0,1" else rgroup.long 0x20C++0x03 line.long 0x00 "GPMC_ECC4_RESULT,GPMC_ECC4_RESULT Register" bitfld.long 0x00 26. "P1024O,Odd Row Parity bit 1024" "0,1" bitfld.long 0x00 25. "P512O,Odd Row Parity bit 512" "0,1" newline bitfld.long 0x00 24. "P256O,Odd Row Parity bit 256" "0,1" bitfld.long 0x00 23. "P128O,Odd Row Parity bit 128" "0,1" newline bitfld.long 0x00 22. "P64O,Odd Row Parity bit 64" "0,1" bitfld.long 0x00 21. "P32O,Odd Row Parity bit 32" "0,1" newline bitfld.long 0x00 20. "P16O,Odd Row Parity bit 16" "0,1" bitfld.long 0x00 19. "P8O,Odd Row Parity bit 8" "0,1" newline bitfld.long 0x00 18. "P4O,Odd Column Parity bit 4" "0,1" bitfld.long 0x00 17. "P2O,Odd Column Parity bit 2" "0,1" newline bitfld.long 0x00 16. "P1O,Odd Column Parity bit 1" "0,1" bitfld.long 0x00 10. "P1024E,Even Row Parity bit 1024" "0,1" newline bitfld.long 0x00 9. "P512E,Even Row Parity bit 512" "0,1" bitfld.long 0x00 8. "P256E,Even Row Parity bit 256" "0,1" newline bitfld.long 0x00 7. "P128E,Even Row Parity bit 128" "0,1" bitfld.long 0x00 6. "P64E,Even Row Parity bit 64" "0,1" newline bitfld.long 0x00 5. "P32E,Even Row Parity bit 32" "0,1" bitfld.long 0x00 4. "P16E,Even Row Parity bit 16" "0,1" newline bitfld.long 0x00 3. "P8E,Even Row Parity bit 8" "0,1" bitfld.long 0x00 2. "P4E,Even Column Parity bit 4" "0,1" newline bitfld.long 0x00 1. "P2E,Even Column Parity bit 2" "0,1" bitfld.long 0x00 0. "P1E,Even Column Parity bit 1" "0,1" endif if (((d.l(ad:0x50000000+0x1FC))&0x3FC00000)==0x3FC00000)||(((d.l(ad:0x50000000+0x1FC))&0xFF000)==0xFF000) rgroup.long 0x210++0x03 line.long 0x00 "GPMC_ECC5_RESULT,GPMC_ECC5_RESULT Register" bitfld.long 0x00 27. "P2048O,Odd Row Parity bit 2048" "0,1" bitfld.long 0x00 26. "P1024O,Odd Row Parity bit 1024" "0,1" newline bitfld.long 0x00 25. "P512O,Odd Row Parity bit 512" "0,1" bitfld.long 0x00 24. "P256O,Odd Row Parity bit 256" "0,1" newline bitfld.long 0x00 23. "P128O,Odd Row Parity bit 128" "0,1" bitfld.long 0x00 22. "P64O,Odd Row Parity bit 64" "0,1" newline bitfld.long 0x00 21. "P32O,Odd Row Parity bit 32" "0,1" bitfld.long 0x00 20. "P16O,Odd Row Parity bit 16" "0,1" newline bitfld.long 0x00 19. "P8O,Odd Row Parity bit 8" "0,1" bitfld.long 0x00 18. "P4O,Odd Column Parity bit 4" "0,1" newline bitfld.long 0x00 17. "P2O,Odd Column Parity bit 2" "0,1" bitfld.long 0x00 16. "P1O,Odd Column Parity bit 1" "0,1" newline bitfld.long 0x00 11. "P2048E,Even Row Parity bit 2048" "0,1" bitfld.long 0x00 10. "P1024E,Even Row Parity bit 1024" "0,1" newline bitfld.long 0x00 9. "P512E,Even Row Parity bit 512" "0,1" bitfld.long 0x00 8. "P256E,Even Row Parity bit 256" "0,1" newline bitfld.long 0x00 7. "P128E,Even Row Parity bit 128" "0,1" bitfld.long 0x00 6. "P64E,Even Row Parity bit 64" "0,1" newline bitfld.long 0x00 5. "P32E,Even Row Parity bit 32" "0,1" bitfld.long 0x00 4. "P16E,Even Row Parity bit 16" "0,1" newline bitfld.long 0x00 3. "P8E,Even Row Parity bit 8" "0,1" bitfld.long 0x00 2. "P4E,Even Column Parity bit 4" "0,1" newline bitfld.long 0x00 1. "P2E,Even Column Parity bit 2" "0,1" bitfld.long 0x00 0. "P1E,Even Column Parity bit 1" "0,1" else rgroup.long 0x210++0x03 line.long 0x00 "GPMC_ECC5_RESULT,GPMC_ECC5_RESULT Register" bitfld.long 0x00 26. "P1024O,Odd Row Parity bit 1024" "0,1" bitfld.long 0x00 25. "P512O,Odd Row Parity bit 512" "0,1" newline bitfld.long 0x00 24. "P256O,Odd Row Parity bit 256" "0,1" bitfld.long 0x00 23. "P128O,Odd Row Parity bit 128" "0,1" newline bitfld.long 0x00 22. "P64O,Odd Row Parity bit 64" "0,1" bitfld.long 0x00 21. "P32O,Odd Row Parity bit 32" "0,1" newline bitfld.long 0x00 20. "P16O,Odd Row Parity bit 16" "0,1" bitfld.long 0x00 19. "P8O,Odd Row Parity bit 8" "0,1" newline bitfld.long 0x00 18. "P4O,Odd Column Parity bit 4" "0,1" bitfld.long 0x00 17. "P2O,Odd Column Parity bit 2" "0,1" newline bitfld.long 0x00 16. "P1O,Odd Column Parity bit 1" "0,1" bitfld.long 0x00 10. "P1024E,Even Row Parity bit 1024" "0,1" newline bitfld.long 0x00 9. "P512E,Even Row Parity bit 512" "0,1" bitfld.long 0x00 8. "P256E,Even Row Parity bit 256" "0,1" newline bitfld.long 0x00 7. "P128E,Even Row Parity bit 128" "0,1" bitfld.long 0x00 6. "P64E,Even Row Parity bit 64" "0,1" newline bitfld.long 0x00 5. "P32E,Even Row Parity bit 32" "0,1" bitfld.long 0x00 4. "P16E,Even Row Parity bit 16" "0,1" newline bitfld.long 0x00 3. "P8E,Even Row Parity bit 8" "0,1" bitfld.long 0x00 2. "P4E,Even Column Parity bit 4" "0,1" newline bitfld.long 0x00 1. "P2E,Even Column Parity bit 2" "0,1" bitfld.long 0x00 0. "P1E,Even Column Parity bit 1" "0,1" endif if (((d.l(ad:0x50000000+0x1FC))&0x3FC00000)==0x3FC00000)||(((d.l(ad:0x50000000+0x1FC))&0xFF000)==0xFF000) rgroup.long 0x214++0x03 line.long 0x00 "GPMC_ECC6_RESULT,GPMC_ECC6_RESULT Register" bitfld.long 0x00 27. "P2048O,Odd Row Parity bit 2048" "0,1" bitfld.long 0x00 26. "P1024O,Odd Row Parity bit 1024" "0,1" newline bitfld.long 0x00 25. "P512O,Odd Row Parity bit 512" "0,1" bitfld.long 0x00 24. "P256O,Odd Row Parity bit 256" "0,1" newline bitfld.long 0x00 23. "P128O,Odd Row Parity bit 128" "0,1" bitfld.long 0x00 22. "P64O,Odd Row Parity bit 64" "0,1" newline bitfld.long 0x00 21. "P32O,Odd Row Parity bit 32" "0,1" bitfld.long 0x00 20. "P16O,Odd Row Parity bit 16" "0,1" newline bitfld.long 0x00 19. "P8O,Odd Row Parity bit 8" "0,1" bitfld.long 0x00 18. "P4O,Odd Column Parity bit 4" "0,1" newline bitfld.long 0x00 17. "P2O,Odd Column Parity bit 2" "0,1" bitfld.long 0x00 16. "P1O,Odd Column Parity bit 1" "0,1" newline bitfld.long 0x00 11. "P2048E,Even Row Parity bit 2048" "0,1" bitfld.long 0x00 10. "P1024E,Even Row Parity bit 1024" "0,1" newline bitfld.long 0x00 9. "P512E,Even Row Parity bit 512" "0,1" bitfld.long 0x00 8. "P256E,Even Row Parity bit 256" "0,1" newline bitfld.long 0x00 7. "P128E,Even Row Parity bit 128" "0,1" bitfld.long 0x00 6. "P64E,Even Row Parity bit 64" "0,1" newline bitfld.long 0x00 5. "P32E,Even Row Parity bit 32" "0,1" bitfld.long 0x00 4. "P16E,Even Row Parity bit 16" "0,1" newline bitfld.long 0x00 3. "P8E,Even Row Parity bit 8" "0,1" bitfld.long 0x00 2. "P4E,Even Column Parity bit 4" "0,1" newline bitfld.long 0x00 1. "P2E,Even Column Parity bit 2" "0,1" bitfld.long 0x00 0. "P1E,Even Column Parity bit 1" "0,1" else rgroup.long 0x214++0x03 line.long 0x00 "GPMC_ECC6_RESULT,GPMC_ECC6_RESULT Register" bitfld.long 0x00 26. "P1024O,Odd Row Parity bit 1024" "0,1" bitfld.long 0x00 25. "P512O,Odd Row Parity bit 512" "0,1" newline bitfld.long 0x00 24. "P256O,Odd Row Parity bit 256" "0,1" bitfld.long 0x00 23. "P128O,Odd Row Parity bit 128" "0,1" newline bitfld.long 0x00 22. "P64O,Odd Row Parity bit 64" "0,1" bitfld.long 0x00 21. "P32O,Odd Row Parity bit 32" "0,1" newline bitfld.long 0x00 20. "P16O,Odd Row Parity bit 16" "0,1" bitfld.long 0x00 19. "P8O,Odd Row Parity bit 8" "0,1" newline bitfld.long 0x00 18. "P4O,Odd Column Parity bit 4" "0,1" bitfld.long 0x00 17. "P2O,Odd Column Parity bit 2" "0,1" newline bitfld.long 0x00 16. "P1O,Odd Column Parity bit 1" "0,1" bitfld.long 0x00 10. "P1024E,Even Row Parity bit 1024" "0,1" newline bitfld.long 0x00 9. "P512E,Even Row Parity bit 512" "0,1" bitfld.long 0x00 8. "P256E,Even Row Parity bit 256" "0,1" newline bitfld.long 0x00 7. "P128E,Even Row Parity bit 128" "0,1" bitfld.long 0x00 6. "P64E,Even Row Parity bit 64" "0,1" newline bitfld.long 0x00 5. "P32E,Even Row Parity bit 32" "0,1" bitfld.long 0x00 4. "P16E,Even Row Parity bit 16" "0,1" newline bitfld.long 0x00 3. "P8E,Even Row Parity bit 8" "0,1" bitfld.long 0x00 2. "P4E,Even Column Parity bit 4" "0,1" newline bitfld.long 0x00 1. "P2E,Even Column Parity bit 2" "0,1" bitfld.long 0x00 0. "P1E,Even Column Parity bit 1" "0,1" endif if (((d.l(ad:0x50000000+0x1FC))&0x3FC00000)==0x3FC00000)||(((d.l(ad:0x50000000+0x1FC))&0xFF000)==0xFF000) rgroup.long 0x218++0x03 line.long 0x00 "GPMC_ECC7_RESULT,GPMC_ECC7_RESULT Register" bitfld.long 0x00 27. "P2048O,Odd Row Parity bit 2048" "0,1" bitfld.long 0x00 26. "P1024O,Odd Row Parity bit 1024" "0,1" newline bitfld.long 0x00 25. "P512O,Odd Row Parity bit 512" "0,1" bitfld.long 0x00 24. "P256O,Odd Row Parity bit 256" "0,1" newline bitfld.long 0x00 23. "P128O,Odd Row Parity bit 128" "0,1" bitfld.long 0x00 22. "P64O,Odd Row Parity bit 64" "0,1" newline bitfld.long 0x00 21. "P32O,Odd Row Parity bit 32" "0,1" bitfld.long 0x00 20. "P16O,Odd Row Parity bit 16" "0,1" newline bitfld.long 0x00 19. "P8O,Odd Row Parity bit 8" "0,1" bitfld.long 0x00 18. "P4O,Odd Column Parity bit 4" "0,1" newline bitfld.long 0x00 17. "P2O,Odd Column Parity bit 2" "0,1" bitfld.long 0x00 16. "P1O,Odd Column Parity bit 1" "0,1" newline bitfld.long 0x00 11. "P2048E,Even Row Parity bit 2048" "0,1" bitfld.long 0x00 10. "P1024E,Even Row Parity bit 1024" "0,1" newline bitfld.long 0x00 9. "P512E,Even Row Parity bit 512" "0,1" bitfld.long 0x00 8. "P256E,Even Row Parity bit 256" "0,1" newline bitfld.long 0x00 7. "P128E,Even Row Parity bit 128" "0,1" bitfld.long 0x00 6. "P64E,Even Row Parity bit 64" "0,1" newline bitfld.long 0x00 5. "P32E,Even Row Parity bit 32" "0,1" bitfld.long 0x00 4. "P16E,Even Row Parity bit 16" "0,1" newline bitfld.long 0x00 3. "P8E,Even Row Parity bit 8" "0,1" bitfld.long 0x00 2. "P4E,Even Column Parity bit 4" "0,1" newline bitfld.long 0x00 1. "P2E,Even Column Parity bit 2" "0,1" bitfld.long 0x00 0. "P1E,Even Column Parity bit 1" "0,1" else rgroup.long 0x218++0x03 line.long 0x00 "GPMC_ECC7_RESULT,GPMC_ECC7_RESULT Register" bitfld.long 0x00 26. "P1024O,Odd Row Parity bit 1024" "0,1" bitfld.long 0x00 25. "P512O,Odd Row Parity bit 512" "0,1" newline bitfld.long 0x00 24. "P256O,Odd Row Parity bit 256" "0,1" bitfld.long 0x00 23. "P128O,Odd Row Parity bit 128" "0,1" newline bitfld.long 0x00 22. "P64O,Odd Row Parity bit 64" "0,1" bitfld.long 0x00 21. "P32O,Odd Row Parity bit 32" "0,1" newline bitfld.long 0x00 20. "P16O,Odd Row Parity bit 16" "0,1" bitfld.long 0x00 19. "P8O,Odd Row Parity bit 8" "0,1" newline bitfld.long 0x00 18. "P4O,Odd Column Parity bit 4" "0,1" bitfld.long 0x00 17. "P2O,Odd Column Parity bit 2" "0,1" newline bitfld.long 0x00 16. "P1O,Odd Column Parity bit 1" "0,1" bitfld.long 0x00 10. "P1024E,Even Row Parity bit 1024" "0,1" newline bitfld.long 0x00 9. "P512E,Even Row Parity bit 512" "0,1" bitfld.long 0x00 8. "P256E,Even Row Parity bit 256" "0,1" newline bitfld.long 0x00 7. "P128E,Even Row Parity bit 128" "0,1" bitfld.long 0x00 6. "P64E,Even Row Parity bit 64" "0,1" newline bitfld.long 0x00 5. "P32E,Even Row Parity bit 32" "0,1" bitfld.long 0x00 4. "P16E,Even Row Parity bit 16" "0,1" newline bitfld.long 0x00 3. "P8E,Even Row Parity bit 8" "0,1" bitfld.long 0x00 2. "P4E,Even Column Parity bit 4" "0,1" newline bitfld.long 0x00 1. "P2E,Even Column Parity bit 2" "0,1" bitfld.long 0x00 0. "P1E,Even Column Parity bit 1" "0,1" endif if (((d.l(ad:0x50000000+0x1FC))&0x3FC00000)==0x3FC00000)||(((d.l(ad:0x50000000+0x1FC))&0xFF000)==0xFF000) rgroup.long 0x21C++0x03 line.long 0x00 "GPMC_ECC8_RESULT,GPMC_ECC8_RESULT Register" bitfld.long 0x00 27. "P2048O,Odd Row Parity bit 2048" "0,1" bitfld.long 0x00 26. "P1024O,Odd Row Parity bit 1024" "0,1" newline bitfld.long 0x00 25. "P512O,Odd Row Parity bit 512" "0,1" bitfld.long 0x00 24. "P256O,Odd Row Parity bit 256" "0,1" newline bitfld.long 0x00 23. "P128O,Odd Row Parity bit 128" "0,1" bitfld.long 0x00 22. "P64O,Odd Row Parity bit 64" "0,1" newline bitfld.long 0x00 21. "P32O,Odd Row Parity bit 32" "0,1" bitfld.long 0x00 20. "P16O,Odd Row Parity bit 16" "0,1" newline bitfld.long 0x00 19. "P8O,Odd Row Parity bit 8" "0,1" bitfld.long 0x00 18. "P4O,Odd Column Parity bit 4" "0,1" newline bitfld.long 0x00 17. "P2O,Odd Column Parity bit 2" "0,1" bitfld.long 0x00 16. "P1O,Odd Column Parity bit 1" "0,1" newline bitfld.long 0x00 11. "P2048E,Even Row Parity bit 2048" "0,1" bitfld.long 0x00 10. "P1024E,Even Row Parity bit 1024" "0,1" newline bitfld.long 0x00 9. "P512E,Even Row Parity bit 512" "0,1" bitfld.long 0x00 8. "P256E,Even Row Parity bit 256" "0,1" newline bitfld.long 0x00 7. "P128E,Even Row Parity bit 128" "0,1" bitfld.long 0x00 6. "P64E,Even Row Parity bit 64" "0,1" newline bitfld.long 0x00 5. "P32E,Even Row Parity bit 32" "0,1" bitfld.long 0x00 4. "P16E,Even Row Parity bit 16" "0,1" newline bitfld.long 0x00 3. "P8E,Even Row Parity bit 8" "0,1" bitfld.long 0x00 2. "P4E,Even Column Parity bit 4" "0,1" newline bitfld.long 0x00 1. "P2E,Even Column Parity bit 2" "0,1" bitfld.long 0x00 0. "P1E,Even Column Parity bit 1" "0,1" else rgroup.long 0x21C++0x03 line.long 0x00 "GPMC_ECC8_RESULT,GPMC_ECC8_RESULT Register" bitfld.long 0x00 26. "P1024O,Odd Row Parity bit 1024" "0,1" bitfld.long 0x00 25. "P512O,Odd Row Parity bit 512" "0,1" newline bitfld.long 0x00 24. "P256O,Odd Row Parity bit 256" "0,1" bitfld.long 0x00 23. "P128O,Odd Row Parity bit 128" "0,1" newline bitfld.long 0x00 22. "P64O,Odd Row Parity bit 64" "0,1" bitfld.long 0x00 21. "P32O,Odd Row Parity bit 32" "0,1" newline bitfld.long 0x00 20. "P16O,Odd Row Parity bit 16" "0,1" bitfld.long 0x00 19. "P8O,Odd Row Parity bit 8" "0,1" newline bitfld.long 0x00 18. "P4O,Odd Column Parity bit 4" "0,1" bitfld.long 0x00 17. "P2O,Odd Column Parity bit 2" "0,1" newline bitfld.long 0x00 16. "P1O,Odd Column Parity bit 1" "0,1" bitfld.long 0x00 10. "P1024E,Even Row Parity bit 1024" "0,1" newline bitfld.long 0x00 9. "P512E,Even Row Parity bit 512" "0,1" bitfld.long 0x00 8. "P256E,Even Row Parity bit 256" "0,1" newline bitfld.long 0x00 7. "P128E,Even Row Parity bit 128" "0,1" bitfld.long 0x00 6. "P64E,Even Row Parity bit 64" "0,1" newline bitfld.long 0x00 5. "P32E,Even Row Parity bit 32" "0,1" bitfld.long 0x00 4. "P16E,Even Row Parity bit 16" "0,1" newline bitfld.long 0x00 3. "P8E,Even Row Parity bit 8" "0,1" bitfld.long 0x00 2. "P4E,Even Column Parity bit 4" "0,1" newline bitfld.long 0x00 1. "P2E,Even Column Parity bit 2" "0,1" bitfld.long 0x00 0. "P1E,Even Column Parity bit 1" "0,1" endif if (((d.l(ad:0x50000000+0x1FC))&0x3FC00000)==0x3FC00000)||(((d.l(ad:0x50000000+0x1FC))&0xFF000)==0xFF000) rgroup.long 0x220++0x03 line.long 0x00 "GPMC_ECC9_RESULT,GPMC_ECC9_RESULT Register" bitfld.long 0x00 27. "P2048O,Odd Row Parity bit 2048" "0,1" bitfld.long 0x00 26. "P1024O,Odd Row Parity bit 1024" "0,1" newline bitfld.long 0x00 25. "P512O,Odd Row Parity bit 512" "0,1" bitfld.long 0x00 24. "P256O,Odd Row Parity bit 256" "0,1" newline bitfld.long 0x00 23. "P128O,Odd Row Parity bit 128" "0,1" bitfld.long 0x00 22. "P64O,Odd Row Parity bit 64" "0,1" newline bitfld.long 0x00 21. "P32O,Odd Row Parity bit 32" "0,1" bitfld.long 0x00 20. "P16O,Odd Row Parity bit 16" "0,1" newline bitfld.long 0x00 19. "P8O,Odd Row Parity bit 8" "0,1" bitfld.long 0x00 18. "P4O,Odd Column Parity bit 4" "0,1" newline bitfld.long 0x00 17. "P2O,Odd Column Parity bit 2" "0,1" bitfld.long 0x00 16. "P1O,Odd Column Parity bit 1" "0,1" newline bitfld.long 0x00 11. "P2048E,Even Row Parity bit 2048" "0,1" bitfld.long 0x00 10. "P1024E,Even Row Parity bit 1024" "0,1" newline bitfld.long 0x00 9. "P512E,Even Row Parity bit 512" "0,1" bitfld.long 0x00 8. "P256E,Even Row Parity bit 256" "0,1" newline bitfld.long 0x00 7. "P128E,Even Row Parity bit 128" "0,1" bitfld.long 0x00 6. "P64E,Even Row Parity bit 64" "0,1" newline bitfld.long 0x00 5. "P32E,Even Row Parity bit 32" "0,1" bitfld.long 0x00 4. "P16E,Even Row Parity bit 16" "0,1" newline bitfld.long 0x00 3. "P8E,Even Row Parity bit 8" "0,1" bitfld.long 0x00 2. "P4E,Even Column Parity bit 4" "0,1" newline bitfld.long 0x00 1. "P2E,Even Column Parity bit 2" "0,1" bitfld.long 0x00 0. "P1E,Even Column Parity bit 1" "0,1" else rgroup.long 0x220++0x03 line.long 0x00 "GPMC_ECC9_RESULT,GPMC_ECC9_RESULT Register" bitfld.long 0x00 26. "P1024O,Odd Row Parity bit 1024" "0,1" bitfld.long 0x00 25. "P512O,Odd Row Parity bit 512" "0,1" newline bitfld.long 0x00 24. "P256O,Odd Row Parity bit 256" "0,1" bitfld.long 0x00 23. "P128O,Odd Row Parity bit 128" "0,1" newline bitfld.long 0x00 22. "P64O,Odd Row Parity bit 64" "0,1" bitfld.long 0x00 21. "P32O,Odd Row Parity bit 32" "0,1" newline bitfld.long 0x00 20. "P16O,Odd Row Parity bit 16" "0,1" bitfld.long 0x00 19. "P8O,Odd Row Parity bit 8" "0,1" newline bitfld.long 0x00 18. "P4O,Odd Column Parity bit 4" "0,1" bitfld.long 0x00 17. "P2O,Odd Column Parity bit 2" "0,1" newline bitfld.long 0x00 16. "P1O,Odd Column Parity bit 1" "0,1" bitfld.long 0x00 10. "P1024E,Even Row Parity bit 1024" "0,1" newline bitfld.long 0x00 9. "P512E,Even Row Parity bit 512" "0,1" bitfld.long 0x00 8. "P256E,Even Row Parity bit 256" "0,1" newline bitfld.long 0x00 7. "P128E,Even Row Parity bit 128" "0,1" bitfld.long 0x00 6. "P64E,Even Row Parity bit 64" "0,1" newline bitfld.long 0x00 5. "P32E,Even Row Parity bit 32" "0,1" bitfld.long 0x00 4. "P16E,Even Row Parity bit 16" "0,1" newline bitfld.long 0x00 3. "P8E,Even Row Parity bit 8" "0,1" bitfld.long 0x00 2. "P4E,Even Column Parity bit 4" "0,1" newline bitfld.long 0x00 1. "P2E,Even Column Parity bit 2" "0,1" bitfld.long 0x00 0. "P1E,Even Column Parity bit 1" "0,1" endif group.long 0x240++0x0F line.long 0x00 "GPMC_BCH_RESULT0_0,GPMC_BCH_RESULT0_0 Register" line.long 0x04 "GPMC_BCH_RESULT1_0,GPMC_BCH_RESULT1_0 Register" line.long 0x08 "GPMC_BCH_RESULT2_0,GPMC_BCH_RESULT2_0 Register" line.long 0x0C "GPMC_BCH_RESULT3_0,GPMC_BCH_RESULT3_0 Register" group.long 0x250++0x0F line.long 0x00 "GPMC_BCH_RESULT0_1,GPMC_BCH_RESULT0_1 Register" line.long 0x04 "GPMC_BCH_RESULT1_1,GPMC_BCH_RESULT1_1 Register" line.long 0x08 "GPMC_BCH_RESULT2_1,GPMC_BCH_RESULT2_1 Register" line.long 0x0C "GPMC_BCH_RESULT3_1,GPMC_BCH_RESULT3_1 Register" group.long 0x260++0x0F line.long 0x00 "GPMC_BCH_RESULT0_2,GPMC_BCH_RESULT0_2 Register" line.long 0x04 "GPMC_BCH_RESULT1_2,GPMC_BCH_RESULT1_2 Register" line.long 0x08 "GPMC_BCH_RESULT2_2,GPMC_BCH_RESULT2_2 Register" line.long 0x0C "GPMC_BCH_RESULT3_2,GPMC_BCH_RESULT3_2 Register" group.long 0x270++0x0F line.long 0x00 "GPMC_BCH_RESULT0_3,GPMC_BCH_RESULT0_3 Register" line.long 0x04 "GPMC_BCH_RESULT1_3,GPMC_BCH_RESULT1_3 Register" line.long 0x08 "GPMC_BCH_RESULT2_3,GPMC_BCH_RESULT2_3 Register" line.long 0x0C "GPMC_BCH_RESULT3_3,GPMC_BCH_RESULT3_3 Register" group.long 0x280++0x0F line.long 0x00 "GPMC_BCH_RESULT0_4,GPMC_BCH_RESULT0_4 Register" line.long 0x04 "GPMC_BCH_RESULT1_4,GPMC_BCH_RESULT1_4 Register" line.long 0x08 "GPMC_BCH_RESULT2_4,GPMC_BCH_RESULT2_4 Register" line.long 0x0C "GPMC_BCH_RESULT3_4,GPMC_BCH_RESULT3_4 Register" group.long 0x290++0x0F line.long 0x00 "GPMC_BCH_RESULT0_5,GPMC_BCH_RESULT0_5 Register" line.long 0x04 "GPMC_BCH_RESULT1_5,GPMC_BCH_RESULT1_5 Register" line.long 0x08 "GPMC_BCH_RESULT2_5,GPMC_BCH_RESULT2_5 Register" line.long 0x0C "GPMC_BCH_RESULT3_5,GPMC_BCH_RESULT3_5 Register" group.long 0x2A0++0x0F line.long 0x00 "GPMC_BCH_RESULT0_6,GPMC_BCH_RESULT0_6 Register" line.long 0x04 "GPMC_BCH_RESULT1_6,GPMC_BCH_RESULT1_6 Register" line.long 0x08 "GPMC_BCH_RESULT2_6,GPMC_BCH_RESULT2_6 Register" line.long 0x0C "GPMC_BCH_RESULT3_6,GPMC_BCH_RESULT3_6 Register" if (((d.l(ad:0x50000000+0x1F4))&0x80)==0x00) group.long 0x2D0++0x03 line.long 0x00 "GPMC_BCH_SWDATA,GPMC_BCH_SWDATA Register" hexmask.long.byte 0x00 0.--7. 1. "BCH_DATA,Data to be included in the BCH calculation" else group.long 0x2D0++0x03 line.long 0x00 "GPMC_BCH_SWDATA,GPMC_BCH_SWDATA Register" hexmask.long.word 0x00 0.--15. 1. "BCH_DATA,Data to be included in the BCH calculation" endif group.long 0x300++0x0B line.long 0x00 "GPMC_BCH_RESULT4_0,GPMC_BCH_RESULT4_0 Register" line.long 0x04 "GPMC_BCH_RESULT5_0,GPMC_BCH_RESULT5_0 Register" line.long 0x08 "GPMC_BCH_RESULT6_0,GPMC_BCH_RESULT6_0 Register" group.long 0x310++0x0B line.long 0x00 "GPMC_BCH_RESULT4_1,GPMC_BCH_RESULT4_1 Register" line.long 0x04 "GPMC_BCH_RESULT5_1,GPMC_BCH_RESULT5_1 Register" line.long 0x08 "GPMC_BCH_RESULT6_1,GPMC_BCH_RESULT6_1 Register" group.long 0x320++0x0B line.long 0x00 "GPMC_BCH_RESULT4_2,GPMC_BCH_RESULT4_2 Register" line.long 0x04 "GPMC_BCH_RESULT5_2,GPMC_BCH_RESULT5_2 Register" line.long 0x08 "GPMC_BCH_RESULT6_2,GPMC_BCH_RESULT6_2 Register" group.long 0x330++0x0B line.long 0x00 "GPMC_BCH_RESULT4_3,GPMC_BCH_RESULT4_3 Register" line.long 0x04 "GPMC_BCH_RESULT5_3,GPMC_BCH_RESULT5_3 Register" line.long 0x08 "GPMC_BCH_RESULT6_3,GPMC_BCH_RESULT6_3 Register" group.long 0x340++0x0B line.long 0x00 "GPMC_BCH_RESULT4_4,GPMC_BCH_RESULT4_4 Register" line.long 0x04 "GPMC_BCH_RESULT5_4,GPMC_BCH_RESULT5_4 Register" line.long 0x08 "GPMC_BCH_RESULT6_4,GPMC_BCH_RESULT6_4 Register" group.long 0x350++0x0B line.long 0x00 "GPMC_BCH_RESULT4_5,GPMC_BCH_RESULT4_5 Register" line.long 0x04 "GPMC_BCH_RESULT5_5,GPMC_BCH_RESULT5_5 Register" line.long 0x08 "GPMC_BCH_RESULT6_5,GPMC_BCH_RESULT6_5 Register" group.long 0x360++0x0B line.long 0x00 "GPMC_BCH_RESULT4_6,GPMC_BCH_RESULT4_6 Register" line.long 0x04 "GPMC_BCH_RESULT5_6,GPMC_BCH_RESULT5_6 Register" line.long 0x08 "GPMC_BCH_RESULT6_6,GPMC_BCH_RESULT6_6 Register" tree.end tree "EMIF (External Memory Interface)" tree "EMIF4D" base ad:0x4C000000 rgroup.long 0x00++0x07 line.long 0x00 "EMIF_MOD_ID_REV,EMIF_MOD_ID_REV Register" bitfld.long 0x00 30.--31. "REG_SCHEME,Used to distinguish between old and current schemes" "O,1,2,3" hexmask.long.word 0x00 16.--27. 1. "REG_MODULE_ID,EMIF module ID" newline bitfld.long 0x00 11.--15. "REG_RTL_VERSION,RTL Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. "REG_MAJOR_REVISION,Major Revision" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 0.--5. "REG_MINOR_REVISION,Minor Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "STATUS,STATUS Register" bitfld.long 0x04 31. "REG_BE,Big Endian" "Little endian,Big endian" bitfld.long 0x04 30. "REG_DUAL_CKL_MODE,Dual Clock mode" "ocp_clk=m_clk,Asynchronous" newline bitfld.long 0x04 29. "REG_FAST_INIT,Fast Init" "Disabled,Enabled" bitfld.long 0x04 2. "REG_PHY_DLL_READY,DDR PHY Ready" "Not ready,Ready" if (((d.l(ad:0x4C000000+0x08))&0x18000000)!=0)||(((d.l(ad:0x4C000000+0x0C))&0x08000000)==0x08000000) if (((d.l(ad:0x4C000000+0x08))&0xE0000000)==0x60000000) group.long 0x08++0x03 line.long 0x00 "SDRAM_CONFIG,SDRAM_CONFIG Register" bitfld.long 0x00 29.--31. "REG_SDRAM_TYPE,SDRAM Type selection" "DDR1,LPDDR1,DDR2,DDR3,?..." bitfld.long 0x00 27.--28. "REG_IBANK_POS,Internal bank position" "0,1,2,3" newline bitfld.long 0x00 24.--26. "REG_DDR_TERM,DDR3 termination resistor value" "Disabled,RZQ/4,RZQ/2,RZQ/6,RZQ/12,RZQ/8,?..." bitfld.long 0x00 21.--22. "REG_DYN,DDR3 Dynamic ODT" "Disabled,RZQ/4,RZQ/2,?..." newline bitfld.long 0x00 20. "REG_DDR_DISABLE_DLL,Disable DLL select" "No,Yes" bitfld.long 0x00 18.--19. "REG_SDRAM_DRIVE,SDRAM drive strength for DDR3" "RZQ/6,RZQ/7,?..." newline bitfld.long 0x00 16.--17. "REG_CWL,DDR3 CAS Write latency" "0,1,2,3" bitfld.long 0x00 14.--15. "REG_NARROW_MODE,SDRAM data bus width" "32 bit,16 bit,?..." newline bitfld.long 0x00 10.--13. "REG_CL,CAS Latency" ",,5,,6,,7,,8,,9,,10,,11,?..." bitfld.long 0x00 7.--9. "REG_ROWSIZE,Defines the number of row address bits of connected SDRAM devices" "9 row bits,10 row bits,11 row bits,12 row bits,13 row bits,14 row bits,15 row bits,16 row bits" newline bitfld.long 0x00 4.--6. "REG_IBANK,Internal Bank setup" "1 bank,2 banks,4 banks,8 banks,?..." newline bitfld.long 0x00 3. "REG_EBANK,External chip select setup" "pad_cs_o_n[0],?..." newline bitfld.long 0x00 0.--2. "REG_PAGESIZE,Page Size" "256-word (8 column bits),512-word (9 column bits),1024-word (10 column bits),2048-word (11 column bit),?..." elif (((d.l(ad:0x4C000000+0x08))&0xE0000000)==0x20000000) group.long 0x08++0x03 line.long 0x00 "SDRAM_CONFIG,SDRAM_CONFIG Register" bitfld.long 0x00 29.--31. "REG_SDRAM_TYPE,SDRAM Type selection" "DDR1,LPDDR1,DDR2,DDR3,?..." bitfld.long 0x00 27.--28. "REG_IBANK_POS,Internal bank position" "0,1,2,3" newline bitfld.long 0x00 20. "REG_DDR_DISABLE_DLL,Disable DLL select" "No,Yes" bitfld.long 0x00 18.--19. "REG_SDRAM_DRIVE,SDRAM drive strength for LPDDR1 " "Full,1/2,1/4,1/8" newline bitfld.long 0x00 14.--15. "REG_NARROW_MODE,SDRAM data bus width" "32 bit,16 bit,?..." bitfld.long 0x00 10.--13. "REG_CL,CAS Latency" ",,2,3,?..." newline bitfld.long 0x00 7.--9. "REG_ROWSIZE,Defines the number of row address bits of connected SDRAM devices" "9 row bits,10 row bits,11 row bits,12 row bits,13 row bits,14 row bits,15 row bits,16 row bits" bitfld.long 0x00 4.--6. "REG_IBANK,Internal Bank setup" "1 bank,2 banks,4 banks,8 banks,?..." newline bitfld.long 0x00 3. "REG_EBANK,External chip select setup" "pad_cs_o_n[0],?..." newline bitfld.long 0x00 0.--2. "REG_PAGESIZE,Page Size" "256-word (8 column bits),512-word (9 column bits),1024-word (10 column bits),2048-word (11 column bit),?..." elif (((d.l(ad:0x4C000000+0x08))&0xE0000000)==0x40000000) group.long 0x08++0x03 line.long 0x00 "SDRAM_CONFIG,SDRAM_CONFIG Register" bitfld.long 0x00 29.--31. "REG_SDRAM_TYPE,SDRAM Type selection" "DDR1,LPDDR1,DDR2,DDR3,?..." bitfld.long 0x00 27.--28. "REG_IBANK_POS,Internal bank position" "0,1,2,3" newline bitfld.long 0x00 24.--26. "REG_DDR_TERM,DDR2 termination resistor value" "Disabled,75 ohm,150 ohm,50 ohm,?..." bitfld.long 0x00 23. "REG_DDR2_DDQS,DDR2 differential DQS enable" "Disabled,Enabled" newline bitfld.long 0x00 20. "REG_DDR_DISABLE_DLL,Disable DLL select" "No,Yes" bitfld.long 0x00 18.--19. "REG_SDRAM_DRIVE,SDRAM drive strength for DDR2" "Normal,Weak,?..." newline bitfld.long 0x00 14.--15. "REG_NARROW_MODE,SDRAM data bus width" "32 bit,16 bit,?..." bitfld.long 0x00 10.--13. "REG_CL,CAS Latency" ",,2,3,4,5,?..." newline bitfld.long 0x00 7.--9. "REG_ROWSIZE,Defines the number of row address bits of connected SDRAM devices" "9 row bits,10 row bits,11 row bits,12 row bits,13 row bits,14 row bits,15 row bits,16 row bits" bitfld.long 0x00 4.--6. "REG_IBANK,Internal Bank setup" "1 bank,2 banks,4 banks,8 banks,?..." newline bitfld.long 0x00 3. "REG_EBANK,External chip select setup" "pad_cs_o_n[0],?..." newline bitfld.long 0x00 0.--2. "REG_PAGESIZE,Page Size" "256-word (8 column bits),512-word (9 column bits),1024-word (10 column bits),2048-word (11 column bit),?..." else group.long 0x08++0x03 line.long 0x00 "SDRAM_CONFIG,SDRAM_CONFIG Register" bitfld.long 0x00 29.--31. "REG_SDRAM_TYPE,SDRAM Type selection" "DDR1,LPDDR1,DDR2,DDR3,?..." bitfld.long 0x00 27.--28. "REG_IBANK_POS,Internal bank position" "0,1,2,3" newline bitfld.long 0x00 20. "REG_DDR_DISABLE_DLL,Disable DLL select" "No,Yes" bitfld.long 0x00 18.--19. "REG_SDRAM_DRIVE,SDRAM drive strength for DDR1" "Normal,Weak,?..." newline bitfld.long 0x00 14.--15. "REG_NARROW_MODE,SDRAM data bus width" "32 bit,16 bit,?..." bitfld.long 0x00 10.--13. "REG_CL,CAS Latency" ",,2,3,,1.5,2.6,?..." newline bitfld.long 0x00 7.--9. "REG_ROWSIZE,Defines the number of row address bits of connected SDRAM devices" "9 row bits,10 row bits,11 row bits,12 row bits,13 row bits,14 row bits,15 row bits,16 row bits" bitfld.long 0x00 4.--6. "REG_IBANK,Internal Bank setup" "1 bank,2 banks,4 banks,8 banks,?..." newline bitfld.long 0x00 3. "REG_EBANK,External chip select setup" "pad_cs_o_n[0],?..." newline bitfld.long 0x00 0.--2. "REG_PAGESIZE,Page Size" "256-word (8 column bits),512-word (9 column bits),1024-word (10 column bits),2048-word (11 column bit),?..." endif else if (((d.l(ad:0x4C000000+0x08))&0xE0000000)==0x60000000) group.long 0x08++0x03 line.long 0x00 "SDRAM_CONFIG,SDRAM_CONFIG Register" bitfld.long 0x00 29.--31. "REG_SDRAM_TYPE,SDRAM Type selection" "DDR1,LPDDR1,DDR2,DDR3,?..." bitfld.long 0x00 27.--28. "REG_IBANK_POS,Internal bank position" "0,1,2,3" newline bitfld.long 0x00 24.--26. "REG_DDR_TERM,DDR3 termination resistor value" "Disabled,RZQ/4,RZQ/2,RZQ/6,RZQ/12,RZQ/8,?..." bitfld.long 0x00 21.--22. "REG_DYN,DDR3 Dynamic ODT" "Disabled,RZQ/4,RZQ/2,?..." newline bitfld.long 0x00 20. "REG_DDR_DISABLE_DLL,Disable DLL select" "No,Yes" bitfld.long 0x00 18.--19. "REG_SDRAM_DRIVE,SDRAM drive strength for DDR3" "RZQ/6,RZQ/7,?..." newline bitfld.long 0x00 16.--17. "REG_CWL,DDR3 CAS Write latency" "0,1,2,3" bitfld.long 0x00 14.--15. "REG_NARROW_MODE,SDRAM data bus width" "32 bit,16 bit,?..." newline bitfld.long 0x00 10.--13. "REG_CL,CAS Latency" ",,5,,6,,7,,8,,9,,10,,11,?..." newline bitfld.long 0x00 4.--6. "REG_IBANK,Internal Bank setup" "1 bank,2 banks,4 banks,8 banks,?..." newline bitfld.long 0x00 3. "REG_EBANK,External chip select setup" "pad_cs_o_n[0],?..." newline bitfld.long 0x00 0.--2. "REG_PAGESIZE,Page Size" "256-word (8 column bits),512-word (9 column bits),1024-word (10 column bits),2048-word (11 column bit),?..." elif (((d.l(ad:0x4C000000+0x08))&0xE0000000)==0x20000000) group.long 0x08++0x03 line.long 0x00 "SDRAM_CONFIG,SDRAM_CONFIG Register" bitfld.long 0x00 29.--31. "REG_SDRAM_TYPE,SDRAM Type selection" "DDR1,LPDDR1,DDR2,DDR3,?..." bitfld.long 0x00 27.--28. "REG_IBANK_POS,Internal bank position" "0,1,2,3" newline bitfld.long 0x00 20. "REG_DDR_DISABLE_DLL,Disable DLL select" "No,Yes" bitfld.long 0x00 18.--19. "REG_SDRAM_DRIVE,SDRAM drive strength for LPDDR1 " "Full,1/2,1/4,1/8" newline bitfld.long 0x00 14.--15. "REG_NARROW_MODE,SDRAM data bus width" "32 bit,16 bit,?..." bitfld.long 0x00 10.--13. "REG_CL,CAS Latency" ",,2,3,?..." newline bitfld.long 0x00 4.--6. "REG_IBANK,Internal Bank setup" "1 bank,2 banks,4 banks,8 banks,?..." newline bitfld.long 0x00 3. "REG_EBANK,External chip select setup" "pad_cs_o_n[0],?..." newline bitfld.long 0x00 0.--2. "REG_PAGESIZE,Page Size" "256-word (8 column bits),512-word (9 column bits),1024-word (10 column bits),2048-word (11 column bit),?..." elif (((d.l(ad:0x4C000000+0x08))&0xE0000000)==0x40000000) group.long 0x08++0x03 line.long 0x00 "SDRAM_CONFIG,SDRAM_CONFIG Register" bitfld.long 0x00 29.--31. "REG_SDRAM_TYPE,SDRAM Type selection" "DDR1,LPDDR1,DDR2,DDR3,?..." bitfld.long 0x00 27.--28. "REG_IBANK_POS,Internal bank position" "0,1,2,3" newline bitfld.long 0x00 24.--26. "REG_DDR_TERM,DDR2 termination resistor value" "Disabled,75 ohm,150 ohm,50 ohm,?..." bitfld.long 0x00 23. "REG_DDR2_DDQS,DDR2 differential DQS enable" "Disabled,Enabled" newline bitfld.long 0x00 20. "REG_DDR_DISABLE_DLL,Disable DLL select" "No,Yes" bitfld.long 0x00 18.--19. "REG_SDRAM_DRIVE,SDRAM drive strength for DDR2" "Normal,Weak,?..." newline bitfld.long 0x00 14.--15. "REG_NARROW_MODE,SDRAM data bus width" "32 bit,16 bit,?..." bitfld.long 0x00 10.--13. "REG_CL,CAS Latency" ",,2,3,4,5,?..." newline bitfld.long 0x00 4.--6. "REG_IBANK,Internal Bank setup" "1 bank,2 banks,4 banks,8 banks,?..." newline bitfld.long 0x00 3. "REG_EBANK,External chip select setup" "pad_cs_o_n[0],?..." newline bitfld.long 0x00 0.--2. "REG_PAGESIZE,Page Size" "256-word (8 column bits),512-word (9 column bits),1024-word (10 column bits),2048-word (11 column bit),?..." else group.long 0x08++0x03 line.long 0x00 "SDRAM_CONFIG,SDRAM_CONFIG Register" bitfld.long 0x00 29.--31. "REG_SDRAM_TYPE,SDRAM Type selection" "DDR1,LPDDR1,DDR2,DDR3,?..." bitfld.long 0x00 27.--28. "REG_IBANK_POS,Internal bank position" "0,1,2,3" newline bitfld.long 0x00 20. "REG_DDR_DISABLE_DLL,Disable DLL select" "No,Yes" bitfld.long 0x00 18.--19. "REG_SDRAM_DRIVE,SDRAM drive strength for DDR1" "Normal,Weak,?..." newline bitfld.long 0x00 14.--15. "REG_NARROW_MODE,SDRAM data bus width" "32 bit,16 bit,?..." bitfld.long 0x00 10.--13. "REG_CL,CAS Latency" ",,2,3,,1.5,2.6,?..." newline bitfld.long 0x00 4.--6. "REG_IBANK,Internal Bank setup" "1 bank,2 banks,4 banks,8 banks,?..." newline bitfld.long 0x00 3. "REG_EBANK,External chip select setup" "pad_cs_o_n[0],?..." newline bitfld.long 0x00 0.--2. "REG_PAGESIZE,Page Size" "256-word (8 column bits),512-word (9 column bits),1024-word (10 column bits),2048-word (11 column bit),?..." endif endif group.long 0x0C++0x03 line.long 0x00 "SDRAM_CONFIG_2,SDRAM_CONFIG_2 Register" bitfld.long 0x00 27. "REG_EBANK_POS,External bank position" "Lower,Higher" if (((d.l(ad:0x4C000000+0x08))&0xE0000000)==0x60000000) group.long 0x10++0x03 line.long 0x00 "SDRAM_REF_CTRL,SDRAM_REF_CTRL Register" bitfld.long 0x00 31. "REG_INITREF_DIS,Initialization and Refresh disable" "No,Yes" bitfld.long 0x00 29. "REG_SRT,DDR2 and DDR3 self-refresh temperature range" "Normal,Extended" newline bitfld.long 0x00 28. "REG_ASR,DDR3 Auto Self Refresh enable" "Disabled,Enabled" bitfld.long 0x00 24.--26. "REG_PASR,Partial Array Self Refresh for DDR3" "Full,1/2,1/4,1/8,3/4,1/2,1/4,1/8" newline hexmask.long.word 0x00 0.--15. 1. "REG_REFRESH_RATE,Refresh rate" elif (((d.l(ad:0x4C000000+0x08))&0xE0000000)==0x20000000) group.long 0x10++0x03 line.long 0x00 "SDRAM_REF_CTRL,SDRAM_REF_CTRL Register" bitfld.long 0x00 31. "REG_INITREF_DIS,Initialization and Refresh disable" "No,Yes" bitfld.long 0x00 24.--26. "REG_PASR,Partial Array Self Refresh for LPDDR1" "Full,1/2,1/4,,,1/8,1/16,?..." newline hexmask.long.word 0x00 0.--15. 1. "REG_REFRESH_RATE,Refresh rate" elif (((d.l(ad:0x4C000000+0x08))&0xE0000000)==0x40000000) group.long 0x10++0x03 line.long 0x00 "SDRAM_REF_CTRL,SDRAM_REF_CTRL Register" bitfld.long 0x00 31. "REG_INITREF_DIS,Initialization and Refresh disable" "No,Yes" bitfld.long 0x00 29. "REG_SRT,DDR2 and DDR3 self-refresh temperature range" "Normal,Extended" newline hexmask.long.word 0x00 0.--15. 1. "REG_REFRESH_RATE,Refresh rate" else group.long 0x10++0x03 line.long 0x00 "SDRAM_REF_CTRL,SDRAM_REF_CTRL Register" bitfld.long 0x00 31. "REG_INITREF_DIS,Initialization and Refresh disable" "No,Yes" hexmask.long.word 0x00 0.--15. 1. "REG_REFRESH_RATE,Refresh rate" endif group.long 0x14++0x1B line.long 0x00 "SDRAM_REF_CTRL_SHDW,SDRAM_REF_CTRL_SHDW Register" hexmask.long.word 0x00 0.--15. 1. "REG_REFRESH_RATE_SHDW,Shadow field for reg_refresh_rate" line.long 0x04 "SDRAM_TIM_1,SDRAM_TIM_1 Register" bitfld.long 0x04 25.--28. "REG_T_RP,Minimum number of DDR clock cycles from Precharge to Activate or Refresh minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 21.--24. "REG_T_RCD,Minimum number of DDR clock cycles from Activate to Read or Write minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 17.--20. "REG_T_WR,Minimum number of DDR clock cycles from last Write transfer to Pre-charge minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 12.--16. "REG_T_RAS,Minimum number of DDR clock cycles from Activate to Pre-charge minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x04 6.--11. "REG_T_RC,Minimum number of DDR clock cycles from Activate to Activate minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 3.--5. "REG_T_RRD,Minimum number of DDR clock cycles from Activate to Activate for a different bank minus one" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0.--2. "REG_T_WTR,Minimum number of DDR clock cycles from last Write to Read minus one" "0,1,2,3,4,5,6,7" line.long 0x08 "SDRAM_TIM_1_SHDW,SDRAM_TIM_1_SHDW Register" bitfld.long 0x08 25.--28. "REG_T_RP_SHDW,Shadow field for REG_T_RP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 21.--24. "REG_T_RCD_SHDW,Shadow field for REG_T_RCD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x08 17.--20. "REG_T_WR_SHDW,Shadow field for REG_T_WR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 12.--16. "REG_T_RAS_SHDW,Shadow field for REG_T_RAS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 6.--11. "REG_T_RC_SHDW,Shadow field for REG_T_RC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 3.--5. "REG_T_RRD_SHDW,Shadow field for REG_T_RRD" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0.--2. "REG_T_WTR_SHDW,Shadow field for REG_T_WTR" "0,1,2,3,4,5,6,7" line.long 0x0C "SDRAM_TIM_2,SDRAM_TIM_2 Register" bitfld.long 0x0C 28.--30. "REG_T_XP,Minimum number of DDR clock cycles from Powerdown exit to any command other than a Read command minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 25.--27. "REG_T_ODT,Minimum number of DDR clock cycles from ODT enable to write data driven for DDR2 and DDR3" "0,1,2,3,4,5,6,7" newline hexmask.long.word 0x0C 16.--24. 1. "REG_T_XSNR,Minimum number of DDR clock cycles from Self-Refresh exit to any command other than a Read command minus one" hexmask.long.word 0x0C 6.--15. 1. "REG_T_XSRD,Minimum number of DDR clock cycles from Self-Refresh exit to a Read command minus one" newline bitfld.long 0x0C 3.--5. "REG-T_RTP,Minimum number of DDR clock cycles from the last Read command to a Pre-charge command for DDR2 and DDR3 minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--2. "REG_T_CKE,Minimum number of DDR clock cycles between pad_cke_o changes minus one" "0,1,2,3,4,5,6,7" line.long 0x10 "SDRAM_TIM_2_SHDW,SDRAM_TIM_2_SHDW Register" bitfld.long 0x10 28.--30. "REG_T_XP_SHDW,Shadow field for REG_T_XP" "0,1,2,3,4,5,6,7" bitfld.long 0x10 25.--27. "REG_T_ODT_SHDW,Shadow field for REG_T_ODT" "0,1,2,3,4,5,6,7" newline hexmask.long.word 0x10 16.--24. 1. "REG_XSNR_SHDW,Shadow field for REG_XSNR" hexmask.long.word 0x10 6.--15. 1. "REG_T_RTP_SHDW,Shadow field for REG_T_RTP" newline bitfld.long 0x10 0.--2. "REG_T_CKE_SHDW,Shadow field for REG_T_CKE" "0,1,2,3,4,5,6,7" line.long 0x14 "SDRAM_TIM_3,SDRAM_TIM_3 Register" bitfld.long 0x14 28.--31. "REG-T_PDLL_UL,Minimum number of DDR clock cycles for PHY DLL to unlock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 15.--20. "REG_ZQ_ZQCS,Number of DDR clock clock cycles for a ZQCS command minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline hexmask.long.word 0x14 4.--12. 1. "REG_T_RFC,Minimum number of DDR clock cycles from Refresh or Load Mode to Refresh or Activate minus one" bitfld.long 0x14 0.--3. "REG_T_RAS_MAX,Maximum number of reg_refresh_rate intervals from Activate to Precharge command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "SDRAM_TIM_3_SHDW,SDRAM_TIM_3_SHDW Register" bitfld.long 0x18 28.--31. "REG_T_PDLL_UL_SHDW,Shadow field for REG_T_PDLL_UL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 15.--20. "REG_ZQ_ZQCS_SHDW,Shadow field for REG_ZQ_ZQCS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline hexmask.long.word 0x18 4.--12. 1. "REG_T_RFC_SHDW,Shadow field for REG_T_RFC" bitfld.long 0x18 0.--3. "REG_T_RAS_MAX_SHDW,Shadow field for REG_T_RAS_MAX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x38++0x07 line.long 0x00 "PWR_MGMT_CTRL,PWR_MGMT_CTRL Register" bitfld.long 0x00 12.--15. "REG_PD_TIM,Power Mangement timer for Power-Down" "Power-Down,16 clocks,32 clocks,64 clocks,128 clocks,256 clocks,512 clocks,1024 clocks,2048 clocks,4096 clocks,8192 clocks,16384 clocks,32768 clocks,65536 clocks,131072 clocks,262144 clocks" bitfld.long 0x00 11. "REG_DPD_EN,Deep Power Down enable" "Disabled,Enabled" newline bitfld.long 0x00 8.--10. "REG_LP_MODE,Automatic Power Management enable" "Disabled,Clock stop,Self refresh,Disabled,Power Down,Disabled,Disabled,Disabled" bitfld.long 0x00 4.--7. "REG_SR_TIM,Power Management timer for Self Refresh" "Self Refresh,16 clocks,32 clocks,64 clocks,128 clocks,256 clocks,512 clocks,1024 clocks,2048 clocks,4096 clocks,8192 clocks,16384 clocks,32768 clocks,65536 clocks,131072 clocks,262144 clocks" newline bitfld.long 0x00 0.--3. "REG_CS_TIM,Power Mangement timer for Clock Stop" "Clock Stop,16 clocks,32 clocks,64 clocks,128 clocks,256 clocks,512 clocks,1024 clocks,2048 clocks,4096 clocks,8192 clocks,16384 clocks,32768 clocks,65536 clocks,131072 clocks,262144 clocks" line.long 0x04 "PWR_MGMT_CTRL_SHDW,PWR_MGMT_CTRL_SHDW Register" bitfld.long 0x04 8.--11. "REG_PD_TIM_SHDW,Shadow field for REG_PD_TIM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. "REG_SR_TIM_SHDW,Shadow field for REG_SR_TIM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 0.--3. "REG_CS_TIM_SHDW,Shadow field for REG_CS_TIM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x54++0x03 line.long 0x00 "INT_CONFIG,INT_CONFIG Register" hexmask.long.byte 0x00 16.--23. 1. "REG_COS_COUNT_1,Priority Raise Counter for class of service 1" hexmask.long.byte 0x00 8.--15. 1. "REG_COS_COUNT_2,Priority Raise Counter for class of service 2" newline hexmask.long.byte 0x00 0.--7. 1. "REG_PR_OLD_COUNT,Priority Raise Old Counter" rgroup.long 0x58++0x07 line.long 0x00 "INT_CFG_VAL_1,INT_CFG_VAL_1 Register" bitfld.long 0x00 30.--31. "REG_SYS_BUS_WIDTH,L3 OCP data bus width for a particular configuration" "32 bit wide,64 bit wide,128 bit wide,256 bit wide" hexmask.long.byte 0x00 8.--15. 1. "REG_WR_FIFO_DEPTH,Write Data FIFO depth for a particular configuration" newline hexmask.long.byte 0x00 0.--7. 1. "REG_CMD_FIFO_DEPTH,Command FIFO depth for a particular configuration" line.long 0x04 "INT_CFG_VAL_2,INT_CFG_VAL_2 Register" hexmask.long.byte 0x04 16.--23. 1. "REG_RREG_FIFO_DEPTH,Register Read Data FIFO depth for a particular configuration" hexmask.long.byte 0x04 8.--15. 1. "REG_RSD_FIFO_DEPTH,SDRAM Read Data FIFO depth for a particular configuration" newline hexmask.long.byte 0x04 0.--7. 1. "REG_RCMD_FIFO_DEPTH,Read Command FIFO depth for a particular configuration" rgroup.long 0x80++0x07 line.long 0x00 "PERF_CNT_1,PERF_CNT_1 Register" line.long 0x04 "PERF_CNT_2,PERF_CNT_2 Register" group.long 0x88++0x07 line.long 0x00 "PERF_CNT_CFG,PERF_CNT_CFG Register" bitfld.long 0x00 31. "REG_CNTR3_MCONNID_EN,MConnID filter enable for Performance Counter 2 register" "Disabled,Enabled" bitfld.long 0x00 30. "REG_ENTR2_REGION_EN,Chip Select filter enable for Performance Counter 2 register" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "REG_CNTR2_CFG,Filter configuration for Performance Counter 2" "total SDRAM accesses,total SDRAM activations,total reads,total writes,DDR clock cycles OCP command FIFO is full,DDR clock cycles OCP Write Data FIFO is full,DDR clock cycles OCP Read Data FIFO is full,DDR clock cycles OCP Return Command FIFO is full,priority elevations,DDR clock cycles that a command was pending,DDR clock cycles when memory data bus was transferring,?..." bitfld.long 0x00 15. "REG_SNTR1_MCONNID_EN,MConnID filter enable for Performance Counter 1 register" "Disabled,Enabled" newline bitfld.long 0x00 14. "REG_CNTR1_REGION_EN,Chip Select filter enable for Performance Counter 1 register" "Disabled,Enabled" newline bitfld.long 0x00 0.--3. "REG_CNTR1_CFG,Filter configuration for Performance Counter 1" "total SDRAM accesses,total SDRAM activations,total reads,total writes,DDR clock cycles OCP command FIFO is full,DDR clock cycles OCP Write Data FIFO is full,DDR clock cycles OCP Read Data FIFO is full,DDR clock cycles OCP Return Command FIFO is full,priority elevations,DDR clock cycles that a command was pending,DDR clock cycles when memory data bus was transferring,?..." line.long 0x04 "PERF_CNT_SEL,PERF_CNT_SEL Register" hexmask.long.byte 0x04 24.--31. 1. "REG_MCONNID2,MConnID for Performance Counter 2 register" bitfld.long 0x04 16.--17. "REG_REGION_SEL2,MAddrSpace for Performance Counter 2 register" "0,1,2,3" newline hexmask.long.byte 0x04 8.--15. 1. "REG_MCONNID1,MConnID for Performance Counter 1 register" bitfld.long 0x04 0.--1. "REG_REGION_SEL1,MAddrSpace for Performance Counter 1 register" "0,1,2,3" rgroup.long 0x90++0x03 line.long 0x00 "PERF_CNT_TIM,PERF_CNT_TIM Register" group.long 0x98++0x07 line.long 0x00 "READ_IDLE_CTRL,READ_IDLE_CTRL Register" bitfld.long 0x00 16.--19. "REG_READ_IDLE_LEN,Read Idle Length field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--8. 1. "REG_READ_IDLE_INTERVAL,The Read Idle Interval" line.long 0x04 "READ_IDLE_CTRL_SHDW,READ_IDLE_CTRL_SHDW Register" bitfld.long 0x04 16.--19. "REG_READ_ILDE_LEN-SHDW,Shadow field for reg_read_idle_len" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--8. 1. "REG_READ_IDLE_INTERVAL_SHDW,Shadow field for reg_read_idle_interval" group.long 0xA4++0x03 line.long 0x00 "IRQSTATUS_RAW_SYS,IRQSTATUS_RAW_SYS Register" bitfld.long 0x00 1. "REG_TA_SYS,Raw status of system OCP interrupt" "No effect,Raw status" bitfld.long 0x00 0. "REG_ERR_SYS,Raw status of system OCP interrupt" "No effect,Raw status" group.long 0xAC++0x03 line.long 0x00 "IRQSTATUS_SYS_SET/CLR,IRQSTATUS_SYS Register" setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "REG_TA_SYS,Enabled status of system OCP interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "REG_ERR_SYS,Enabled status of system OCP interrupt" "No interrupt,Interrupt" group.long 0xC8++0x03 line.long 0x00 "ZQ_CONFIG,ZQ_CONFIG Register" bitfld.long 0x00 31. "REG_ZQ_SC1EN,ZQ calibration for CS1 enable" "Disabled,Enabled" bitfld.long 0x00 30. "REG_ZQ_CS0EN,ZQ calibration for CS0 enable" "Disabled,Enabled" newline bitfld.long 0x00 29. "REG_ZQ_DUALCALEN,ZQ Dual Calibration enable" "Disabled,Enabled" bitfld.long 0x00 28. "REG_ZQ_SFEXITEN,ZQCL on Self Refresh, Active Power-Down, and Precharge Power-Down exit enable" "Disabled,Enabled" newline bitfld.long 0x00 18.--19. "REG_ZQ_ZQINIT_MULT,Indicates the number of ZQCL intervals that make up a ZQINIT interval, minus one" "0,1,2,3" bitfld.long 0x00 16.--17. "REG_ZQ_ZQCL_MULT,Indicates the number of ZQCL intervals that make up a ZQINIT interval, minus one" "0,1,2,3" newline hexmask.long.word 0x00 0.--15. 1. "REG_ZQ_REFINTERVAL,Number of refresh periods between ZQCS commans" rgroup.long 0xD4++0x03 line.long 0x00 "RDWR_LVL_RMP_WIN,RDWR_LVL_RMP_WIN Register" hexmask.long.word 0x00 0.--12. 1. "REG_RDWRLVLINC_RMP_WIN,Incremental leveling ramp window in number of refresh periods" group.long 0xD8++0x07 line.long 0x00 "RDWR_LVL_RMP_CTRL,RDWR_LVL_RMP_CTRL Register" bitfld.long 0x00 31. "REG_RDWRLVL_EN,Read-Write Leveling enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. "REG_RDWRLVLINC_RMP_PRE,Incremental leveling pre-scalar in number of refresh periods during ramp window" newline hexmask.long.byte 0x00 16.--23. 1. "REG_RDLVLINC_RMP_INT,Incremental read data eye training interval during ramp window" hexmask.long.byte 0x00 8.--15. 1. "REG_RDLVLGATEINC_RMP_INT,Incremental read DQS gate training interval during ramp window" newline hexmask.long.byte 0x00 0.--7. 1. "REG_WRLVLINC_RMP_INT,Incremental write leveling interval during ramp window" line.long 0x04 "RDWR_LVL_CTRL,RDWR_LVL_CTRL Register" eventfld.long 0x04 31. "REG_RDWRLVLFULL_START,Full leveling trigger" "Not triggered,Triggered" hexmask.long.byte 0x04 24.--30. 1. "REG_RDWRLVLINC_PRE,Incremental leveling pre-scalar in number of refresh periods" newline hexmask.long.byte 0x04 16.--23. 1. "REG_RDLVLGATEINC_INT,Incremental read DQS gate training interval" hexmask.long.byte 0x04 8.--15. 1. "REG_RDLVLGATEINC_INT,Incremental read DQS gate training interval" newline hexmask.long.byte 0x04 0.--7. 1. "REG_WRLVLINC_INT,Incremental write leveling interval" group.long 0xE4++0x07 line.long 0x00 "DDR_PHY_CTRL_1,DDR_PHY_CTRL_1 Register" bitfld.long 0x00 20. "REG_PHY_ENABLE_DYNAMIC_PWRDN,Dynamically enables powering down the IO receiver when not performing a read" "Always powered up,Powering up during read" bitfld.long 0x00 15. "REG_PHY_RST_N,PHY reset" "No reset,Reset" newline bitfld.long 0x00 12.--13. "REG_PHY_IDLE_LOCAL_ODT,2-bit local On-Die Termination" "0,1,2,3" bitfld.long 0x00 10.--11. "REG_PHY_WR_LOCAL_ODT,This bit controls the value assigned to the reg_phy_wr_local_odt input on the data macros" "0,1,2,3" newline bitfld.long 0x00 8.--9. "REG_PHY_RD_LOCAL_ODT,2-bit local On-Die Termination" "ODT off,ODT off,Full thevenin load,Half thevenin load" bitfld.long 0x00 0.--4. "REG_READ_LATENCY,This field defines the latency for read data from DDR SDRAM in number of DDR clock cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "DDR_PHY_CTRL_1_SHDW,DDR_PHY_CTRL_1_SHDW Register" bitfld.long 0x04 20. "REG_PHY_ENAGLE_DYNAMIC_PWRDN,Dynamically enables powering down the IO receiver when not performing a read" "Always powered up,Powering up during read" bitfld.long 0x04 15. "REG_PHY_RST_N,PHY reset" "No reset,Reset" newline bitfld.long 0x04 12.--13. "REG_PHY_IDLE_LOCAL_ODT,2-bit local On-Die Termination" "0,1,2,3" bitfld.long 0x04 10.--11. "REG_PHY_WR_LOCAL_ODT,This bit controls the value assigned to the reg_phy_wr_local_odt input on the data macros" "0,1,2,3" newline bitfld.long 0x04 8.--9. "REG_PHY_RD_LOCAL_ODT,2-bit local On-Die Termination" "ODT off,ODT off,Full thevenin load,Half thevenin load" bitfld.long 0x04 0.--4. "REG_READ_LATENCY,This field defines the latency for read data from DDR SDRAM in number of DDR clock cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x100++0x0B line.long 0x00 "PRI_COS_MAP,PRI_COS_MAP Register" bitfld.long 0x00 31. "REG_PRI_COS_MAP_EN,Priority to class of service mapping enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. "REG_PRI_7_COS,Class of service for commands with priority of 7" ",1,2," newline bitfld.long 0x00 12.--13. "REG_PRI_6_COS,Class of service for commands with priority of 6" ",1,2," bitfld.long 0x00 10.--11. "REG_PRI_5_COS,Class of service for commands with priority of 5" ",1,2," newline bitfld.long 0x00 8.--9. "REG_PRI_4_COS,Class of service for commands with priority of 4" ",1,2," bitfld.long 0x00 6.--7. "REG_PRI_3_COS,Class of service for commands with priority of 3" ",1,2," newline bitfld.long 0x00 4.--5. "REG_PRI_2_COS,Class of service for commands with priority of 2" ",1,2," bitfld.long 0x00 2.--3. "REG_PRI_1_COS,Class of service for commands with priority of 1" ",1,2," newline bitfld.long 0x00 0.--1. "REG_PRI_0_COS,Class of service for commands with priority of 0" ",1,2," line.long 0x04 "CONNID_COS_1_MAP,CONNID_COS_1_MAP Register" bitfld.long 0x04 31. "REG_CONNID_COS_1_MAP_EN,Connection ID to class of service 1 mapping enable" "Disabled,Enabled" hexmask.long.byte 0x04 23.--30. 1. "REG_CONNID_1_COS_1,Connection ID value 1 for class of service 1" newline bitfld.long 0x04 20.--22. "REG_MSK_1_COS_1,Mask for connection ID value 1 for class of service 1" "Disabled,0,[1:0],[2:0],[3:0],[4:0],[5:0],[6:0]" hexmask.long.byte 0x04 12.--19. 1. "REG_CONNID_2_COS_1,Connection ID value 2 for class of service 1" newline bitfld.long 0x04 10.--11. "REG_MSK_2_COS_1,Mask for connection ID value 2 for class of service 1" "Disabled,0,[1:0],[2:0]" hexmask.long.byte 0x04 2.--9. 1. "REG_CONNID_3_COS_1,Connection ID value 3 for class of service 1" newline bitfld.long 0x04 0.--1. "REG_MSK_3_COS_1,Mask for connection ID Value 3 for class of service 1" "Disabled,0,[1:0],[2:0]" line.long 0x08 "CONNID_COS_2_MAP,CONNID_COS_2_MAP Register" bitfld.long 0x08 31. "REG_CONNID_COS_2_MAP_EN,Connection ID to class of service 2 mapping enable" "Disabled,Enabled" hexmask.long.byte 0x08 23.--30. 1. "REG_CONNID_1_COS_2,Connection ID value 1 for class of service 2" newline bitfld.long 0x08 20.--22. "REG_MSK_1_COS_2,Mask for connection ID value 1 for class of service 2" "Disabled,0,[1:0],[2:0],[3:0],[4:0],[5:0],[6:0]" hexmask.long.byte 0x08 12.--19. 1. "REG_CONNID_2_COS_2,Connection ID value 2 for class of service 2" newline bitfld.long 0x08 10.--11. "REG_MSK_2_COS_2,Mask for connection ID value 2 for class of service 2" "Disabled,0,[1:0],[2:0]" hexmask.long.byte 0x08 2.--9. 1. "REG_CONNID_3_COS_2,Connection ID value 3 for class of service 2" newline bitfld.long 0x08 0.--1. "REG_MSK_3_COS_2,Mask for connection ID Value 3 for class of service 2" "Disabled,0,[1:0],[2:0]" group.long 0x120++0x03 line.long 0x00 "RD_WR_EXEC_THRSH,RD_WR_EXEC_THRSH Register" bitfld.long 0x00 8.--12. "REG_WR_THRSH,Write Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. "REG_RD_THRSH,Read Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end tree "DDR2/3/mDDR" base ad:0x44E12000 wgroup.long 0x1C++0x03 line.long 0x00 "CMD0_REG_PHY_CTRL_SLAVE_RATIO_0,DDR PHY Command 0 Address/command Slave Ratio Register" hexmask.long.word 0x00 0.--9. 1. "CMD_SLAVE_RATIO,Ratio value for address/command launch timing in DDR PHY macro" wgroup.long (0x1C+0x0C)++0x03 line.long 0x00 "CMD0_REG_PHY_DLL_LOCK_DIFF_0,DDR PHY Command 0 Address/command DLL Lock Difference Register" bitfld.long 0x00 0.--3. "DLL_LOCK_DIFF,The max number of delay line taps variation allowed while maintaining the master DLL lock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long (0x1C+0x10)++0x03 line.long 0x00 "CMD0_REG_PHY_INVERT_CLKOUT_0,DDR PHY Command 0 Invert Clockout Selection Register" bitfld.long 0x00 0. "INVERT_CLK_SEL,Inverts the polarity of DRAM clock" "Not inverted,Inverted" wgroup.long 0x50++0x03 line.long 0x00 "CMD1_REG_PHY_CTRL_SLAVE_RATIO_0,DDR PHY Command 1 Address/command Slave Ratio Register" hexmask.long.word 0x00 0.--9. 1. "CMD_SLAVE_RATIO,Ratio value for address/command launch timing in DDR PHY macro" wgroup.long (0x50+0x0C)++0x03 line.long 0x00 "CMD1_REG_PHY_DLL_LOCK_DIFF_0,DDR PHY Command 1 Address/command DLL Lock Difference Register" bitfld.long 0x00 0.--3. "DLL_LOCK_DIFF,The max number of delay line taps variation allowed while maintaining the master DLL lock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long (0x50+0x10)++0x03 line.long 0x00 "CMD1_REG_PHY_INVERT_CLKOUT_0,DDR PHY Command 1 Invert Clockout Selection Register" bitfld.long 0x00 0. "INVERT_CLK_SEL,Inverts the polarity of DRAM clock" "Not inverted,Inverted" wgroup.long 0x84++0x03 line.long 0x00 "CMD2_REG_PHY_CTRL_SLAVE_RATIO_0,DDR PHY Command 2 Address/command Slave Ratio Register" hexmask.long.word 0x00 0.--9. 1. "CMD_SLAVE_RATIO,Ratio value for address/command launch timing in DDR PHY macro" wgroup.long (0x84+0x0C)++0x03 line.long 0x00 "CMD2_REG_PHY_DLL_LOCK_DIFF_0,DDR PHY Command 2 Address/command DLL Lock Difference Register" bitfld.long 0x00 0.--3. "DLL_LOCK_DIFF,The max number of delay line taps variation allowed while maintaining the master DLL lock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long (0x84+0x10)++0x03 line.long 0x00 "CMD2_REG_PHY_INVERT_CLKOUT_0,DDR PHY Command 2 Invert Clockout Selection Register" bitfld.long 0x00 0. "INVERT_CLK_SEL,Inverts the polarity of DRAM clock" "Not inverted,Inverted" wgroup.long 0xC8++0x03 line.long 0x00 "DATA0_REG_PHY_RD_DQS_SLAVE_RATIO_0,DDR PHY Data Macro 0 Read DQS Slave Ratio Register" hexmask.long.word 0x00 0.--9. 1. "RD_DQS_SLAVE_RATIO_CS0,Ratio value for Read DQS slave DLL for CS0" wgroup.long (0xC8+0x14)++0x03 line.long 0x00 "DATA0_REG_PHY_WR_DQS_SLAVE_RATIO_0,DDR PHY Data Macro 0 Write DQS Slave Ratio Register" hexmask.long.word 0x00 0.--9. 1. "WR_DQS_SLAVE_RATIO_CS0,Ratio value for Write DQS slave DLL for CS0" wgroup.long (0xC8+0x28)++0x03 line.long 0x00 "DATA0_REG_PHY_WRLVL_INIT_RATIO_0,DDR PHY Data Macro 0 Write DQS Slave Ratio Register" hexmask.long.word 0x00 0.--9. 1. "WRLVL_INIT_RATIO_CS0,The user programmable init ratio used by Write Leveling FSM when DATA0/1_REG_PHY_WRLVL_INIT_MODE_0 register is set to 1" wgroup.long (0xC8+0x30)++0x03 line.long 0x00 "DATA0_REG_PHY_WRLVL_INIT_MODE_0,DDR PHY Data Macro 0 Write Leveling Init Mode Ratio Selection Register" bitfld.long 0x00 0. "WRLVL_INIT_MODE_SEL,The user programmable init ratio selection mode for Write Leveling FSM" "Previous data slice,DATA0/1_REG_PHY_WRLVL_INIT_RATIO_0" wgroup.long (0xC8+0x34)++0x03 line.long 0x00 "DATA0_REG_PHY_GATELVL_INIT_RATIO_0,DDR PHY Data Macro 0 DQS Gate Training Init Ratio Register" hexmask.long.word 0x00 0.--9. 1. "GATELVL_INIT_RATIO_CS0,The user programmable init ratio used by DQS Gate Training FSM when DATA0/1/_REG_PHY_GATELVL_INIT_MODE_0 register is set to 1" wgroup.long (0xC8+0x3C)++0x03 line.long 0x00 "DATA0_REG_PHY_GATELVL_INIT_MODE_0,DDR PHY Data Macro 0 DQS Gate Training Init Mode Ratio Selection Register" bitfld.long 0x00 0. ",User programmable init ratio selection mode for DQS Gate Training FSM" "Previous data slice,DATA0/1_REG_PHY_GATELVL_INIT_RATIO_0" wgroup.long (0xC8+0x40)++0x03 line.long 0x00 "DATA0_REG_PHY_FIFO_WE_SLAVE_RATIO_0,DDR PHY Data Macro 0 DQS Gate Slave Ratio Register" hexmask.long.word 0x00 0.--9. 1. "FIFO_WE_SLAVE_RATIO_CS0,Ratio value for fifo we for CS0" wgroup.long (0xC8+0x54)++0x03 line.long 0x00 "DATA0_REG_PHY_DQ_OFFSET_0,Offset value from DQS to DQ for Data Macro 0" wgroup.long (0xC8+0x58)++0x03 line.long 0x00 "DATA0_REG_PHY_WR_DATA_SLAVE_RATIO_0,DDR PHY Data Macro 0 Write Data Slave Ratio Register" hexmask.long.word 0x00 0.--9. 1. "WR_DATA_SLAVE_RATIO_CS0,Ratio value for write data slave DLL for CS0" wgroup.long (0xC8+0x6C)++0x03 line.long 0x00 "DATA0_REG_PHY_USE_RANK0_DELAYS,DDR PHY Data Macro 0 Delay Selection Register" bitfld.long 0x00 0. "PHY_USE_RANK0_DELAYS_0,Delay Selection" "Own dealy,Rank 0" wgroup.long (0xC8+0x70)++0x03 line.long 0x00 "DATA0_REG_PHY_DLL_LOCK_DIFF_0,DDR PHY Data Macro 0 DLL Lock Difference Register" bitfld.long 0x00 0.--3. "DLL_LOCK_DIFF,The max number of delay line taps variation allowed while maintaining the master DLL lock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long 0x16C++0x03 line.long 0x00 "DATA1_REG_PHY_RD_DQS_SLAVE_RATIO_0,DDR PHY Data Macro 1 Read DQS Slave Ratio Register" hexmask.long.word 0x00 0.--9. 1. "RD_DQS_SLAVE_RATIO_CS0,Ratio value for Read DQS slave DLL for CS0" wgroup.long (0x16C+0x14)++0x03 line.long 0x00 "DATA1_REG_PHY_WR_DQS_SLAVE_RATIO_0,DDR PHY Data Macro 1 Write DQS Slave Ratio Register" hexmask.long.word 0x00 0.--9. 1. "WR_DQS_SLAVE_RATIO_CS0,Ratio value for Write DQS slave DLL for CS0" wgroup.long (0x16C+0x28)++0x03 line.long 0x00 "DATA1_REG_PHY_WRLVL_INIT_RATIO_0,DDR PHY Data Macro 1 Write DQS Slave Ratio Register" hexmask.long.word 0x00 0.--9. 1. "WRLVL_INIT_RATIO_CS0,The user programmable init ratio used by Write Leveling FSM when DATA0/1_REG_PHY_WRLVL_INIT_MODE_0 register is set to 1" wgroup.long (0x16C+0x30)++0x03 line.long 0x00 "DATA1_REG_PHY_WRLVL_INIT_MODE_0,DDR PHY Data Macro 1 Write Leveling Init Mode Ratio Selection Register" bitfld.long 0x00 0. "WRLVL_INIT_MODE_SEL,The user programmable init ratio selection mode for Write Leveling FSM" "Previous data slice,DATA0/1_REG_PHY_WRLVL_INIT_RATIO_0" wgroup.long (0x16C+0x34)++0x03 line.long 0x00 "DATA1_REG_PHY_GATELVL_INIT_RATIO_0,DDR PHY Data Macro 1 DQS Gate Training Init Ratio Register" hexmask.long.word 0x00 0.--9. 1. "GATELVL_INIT_RATIO_CS0,The user programmable init ratio used by DQS Gate Training FSM when DATA0/1/_REG_PHY_GATELVL_INIT_MODE_0 register is set to 1" wgroup.long (0x16C+0x3C)++0x03 line.long 0x00 "DATA1_REG_PHY_GATELVL_INIT_MODE_0,DDR PHY Data Macro 1 DQS Gate Training Init Mode Ratio Selection Register" bitfld.long 0x00 0. ",User programmable init ratio selection mode for DQS Gate Training FSM" "Previous data slice,DATA0/1_REG_PHY_GATELVL_INIT_RATIO_0" wgroup.long (0x16C+0x40)++0x03 line.long 0x00 "DATA1_REG_PHY_FIFO_WE_SLAVE_RATIO_0,DDR PHY Data Macro 1 DQS Gate Slave Ratio Register" hexmask.long.word 0x00 0.--9. 1. "FIFO_WE_SLAVE_RATIO_CS0,Ratio value for fifo we for CS0" wgroup.long (0x16C+0x54)++0x03 line.long 0x00 "DATA1_REG_PHY_DQ_OFFSET_0,Offset value from DQS to DQ for Data Macro 1" wgroup.long (0x16C+0x58)++0x03 line.long 0x00 "DATA1_REG_PHY_WR_DATA_SLAVE_RATIO_0,DDR PHY Data Macro 1 Write Data Slave Ratio Register" hexmask.long.word 0x00 0.--9. 1. "WR_DATA_SLAVE_RATIO_CS0,Ratio value for write data slave DLL for CS0" wgroup.long (0x16C+0x6C)++0x03 line.long 0x00 "DATA1_REG_PHY_USE_RANK0_DELAYS,DDR PHY Data Macro 1 Delay Selection Register" bitfld.long 0x00 0. "PHY_USE_RANK0_DELAYS_0,Delay Selection" "Own dealy,Rank 0" wgroup.long (0x16C+0x70)++0x03 line.long 0x00 "DATA1_REG_PHY_DLL_LOCK_DIFF_0,DDR PHY Data Macro 1 DLL Lock Difference Register" bitfld.long 0x00 0.--3. "DLL_LOCK_DIFF,The max number of delay line taps variation allowed while maintaining the master DLL lock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end tree.end tree "ELM (Error Location Module)" base ad:0x48080000 rgroup.long 0x00++0x03 line.long 0x00 "ELM_REVISION,ELM Revision Register" group.long 0x10++0x03 line.long 0x00 "ELM_SYSCONFIG,ELM System Configuration Register" bitfld.long 0x00 8. "CLOCKACTIVITYOCPZ,OCP Clock activity when module is in IDLE mode (during wake up mode period)" "Not active,Active" bitfld.long 0x00 3.--4. "SIDLEMODE,Slave interface power management (IDLE req/ack control)" "Force-idle,No-idle,Smart-idle,?..." newline bitfld.long 0x00 1. "SOFTRESET,Module software reset" "Normal,Soft reset" bitfld.long 0x00 0. "AUTOGATING,Internal OCP clock gating strategy" "Free-running,Automatic" rgroup.long 0x14++0x03 line.long 0x00 "ELM_SYSSTATUS,ELM System Status Register" bitfld.long 0x00 0. "RESETDONE,Internal reset monitoring (OCP domain)" "In progress,Done" group.long 0x18++0x03 line.long 0x00 "ELM_IRQSTATUS,ELM Interrupt Status Register" bitfld.long 0x00 8. "PAGE_VALID,Error-location status for a full page, based on the mask definition (Read/Write)" "Error locations invalid/No effect,Error locations valid/Clear" bitfld.long 0x00 7. "LOC_VALID_7,Error-location status for syndrome polynomial 7 (Read/Write)" "Idle||In progress/No effect,Completed/Clear" newline bitfld.long 0x00 6. "LOC_VALID_6,Error-location status for syndrome polynomial 6 (Read/Write)" "Idle||In progress/No effect,Completed/Clear" bitfld.long 0x00 5. "LOC_VALID_5,Error-location status for syndrome polynomial 5 (Read/Write)" "Idle||In progress/No effect,Completed/Clear" newline bitfld.long 0x00 4. "LOC_VALID_4,Error-location status for syndrome polynomial 4 (Read/Write)" "Idle||In progress/No effect,Completed/Clear" bitfld.long 0x00 3. "LOC_VALID_3,Error-location status for syndrome polynomial 3 (Read/Write)" "Idle||In progress/No effect,Completed/Clear" newline bitfld.long 0x00 2. "LOC_VALID_2,Error-location status for syndrome polynomial 2 (Read/Write)" "Idle||In progress/No effect,Completed/Clear" bitfld.long 0x00 1. "LOC_VALID_1,Error-location status for syndrome polynomial 1 (Read/Write)" "Idle||In progress/No effect,Completed/Clear" newline bitfld.long 0x00 0. "LOC_VALID_0,Error-location status for syndrome polynomial 0 (Read/Write)" "Idle||In progress/No effect,Completed/Clear" group.long 0x1C++0x03 line.long 0x00 "ELM_IRQENABLE,ELM Interrupt Enable Register" bitfld.long 0x00 8. "PAGE_MASK,Page interrupt mask bit" "Disabled,Enabled" bitfld.long 0x00 7. "LOCATION_MASK_7,Error-location interrupt mask bit for syndrome polynomial 7" "Disabled,Enabled" newline bitfld.long 0x00 6. "LOCATION_MASK_6,Error-location interrupt mask bit for syndrome polynomial 6" "Disabled,Enabled" bitfld.long 0x00 5. "LOCATION_MASK_5,Error-location interrupt mask bit for syndrome polynomial 5" "Disabled,Enabled" newline bitfld.long 0x00 4. "LOCATION_MASK_4,Error-location interrupt mask bit for syndrome polynomial 4" "Disabled,Enabled" bitfld.long 0x00 3. "LOCATION_MASK_3,Error-location interrupt mask bit for syndrome polynomial 3" "Disabled,Enabled" newline bitfld.long 0x00 2. "LOCATION_MASK_2,Error-location interrupt mask bit for syndrome polynomial 2" "Disabled,Enabled" bitfld.long 0x00 1. "LOCATION_MASK_1,Error-location interrupt mask bit for syndrome polynomial 1" "Disabled,Enabled" newline bitfld.long 0x00 0. "LOCATION_MASK_0,Error-location interrupt mask bit for syndrome polynomial 0" "Disabled,Enabled" group.long 0x20++0x03 line.long 0x00 "ELM_LOCATION_CONFIG,ELM Location Configuration Register" hexmask.long.word 0x00 16.--26. 1. "ECC_SIZE,Maximum size of the buffers for which the error-location engine is used in number of nibbles" bitfld.long 0x00 0.--1. "ECC_BCH_LEVEL,Error correction level" "4 bits,8 bits,16 bits,?..." group.long 0x80++0x03 line.long 0x00 "ELM_PAGE_CTRL,ELM Page Definition Register" bitfld.long 0x00 7. "SECTOR_7,Set to 1 if syndrome polynomial 7 is part of the page in page mode" "Continuous mode,Page mode" bitfld.long 0x00 6. "SECTOR_6,Set to 1 if syndrome polynomial 6 is part of the page in page mode" "Continuous mode,Page mode" newline bitfld.long 0x00 5. "SECTOR_5,Set to 1 if syndrome polynomial 5 is part of the page in page mode" "Continuous mode,Page mode" bitfld.long 0x00 4. "SECTOR_4,Set to 1 if syndrome polynomial 4 is part of the page in page mode" "Continuous mode,Page mode" newline bitfld.long 0x00 3. "SECTOR_3,Set to 1 if syndrome polynomial 3 is part of the page in page mode" "Continuous mode,Page mode" bitfld.long 0x00 2. "SECTOR_2,Set to 1 if syndrome polynomial 2 is part of the page in page mode" "Continuous mode,Page mode" newline bitfld.long 0x00 1. "SECTOR_1,Set to 1 if syndrome polynomial 1 is part of the page in page mode" "Continuous mode,Page mode" bitfld.long 0x00 0. "SECTOR_0,Set to 1 if syndrome polynomial 0 is part of the page in page mode" "Continuous mode,Page mode" group.long 0x400++0x1B line.long 0x00 "ELM_SYNDROME_FRAGMENT_0_0,ELM_SYNDROME_FRAGMENT_0_0 Register" line.long 0x04 "ELM_SYNDROME_FRAGMENT_1_0,ELM_SYNDROME_FRAGMENT_1_0 Register" line.long 0x08 "ELM_SYNDROME_FRAGMENT_2_0,ELM_SYNDROME_FRAGMENT_2_0 Register" line.long 0x0C "ELM_SYNDROME_FRAGMENT_3_0,ELM_SYNDROME_FRAGMENT_3_0 Register" line.long 0x10 "ELM_SYNDROME_FRAGMENT_4_0,ELM_SYNDROME_FRAGMENT_4_0 Register" line.long 0x14 "ELM_SYNDROME_FRAGMENT_5_0,ELM_SYNDROME_FRAGMENT_5_0 Register" line.long 0x18 "ELM_SYNDROME_FRAGMENT_6_0,ELM_SYNDROME_FRAGMENT_6_0 Register" bitfld.long 0x18 16. "SYNDROME_VALID,Syndrome valid bit" "Not valid,Valid" hexmask.long.word 0x18 0.--15. 1. "SYNDROME_6,Syndrome bits 192 to 207" group.long 0x440++0x1B line.long 0x00 "ELM_SYNDROME_FRAGMENT_0_1,ELM_SYNDROME_FRAGMENT_0_1 Register" line.long 0x04 "ELM_SYNDROME_FRAGMENT_1_1,ELM_SYNDROME_FRAGMENT_1_1 Register" line.long 0x08 "ELM_SYNDROME_FRAGMENT_2_1,ELM_SYNDROME_FRAGMENT_2_1 Register" line.long 0x0C "ELM_SYNDROME_FRAGMENT_3_1,ELM_SYNDROME_FRAGMENT_3_1 Register" line.long 0x10 "ELM_SYNDROME_FRAGMENT_4_1,ELM_SYNDROME_FRAGMENT_4_1 Register" line.long 0x14 "ELM_SYNDROME_FRAGMENT_5_1,ELM_SYNDROME_FRAGMENT_5_1 Register" line.long 0x18 "ELM_SYNDROME_FRAGMENT_6_1,ELM_SYNDROME_FRAGMENT_6_1 Register" bitfld.long 0x18 16. "SYNDROME_VALID,Syndrome valid bit" "Not valid,Valid" hexmask.long.word 0x18 0.--15. 1. "SYNDROME_6,Syndrome bits 192 to 207" group.long 0x480++0x1B line.long 0x00 "ELM_SYNDROME_FRAGMENT_0_2,ELM_SYNDROME_FRAGMENT_0_2 Register" line.long 0x04 "ELM_SYNDROME_FRAGMENT_1_2,ELM_SYNDROME_FRAGMENT_1_2 Register" line.long 0x08 "ELM_SYNDROME_FRAGMENT_2_2,ELM_SYNDROME_FRAGMENT_2_2 Register" line.long 0x0C "ELM_SYNDROME_FRAGMENT_3_2,ELM_SYNDROME_FRAGMENT_3_2 Register" line.long 0x10 "ELM_SYNDROME_FRAGMENT_4_2,ELM_SYNDROME_FRAGMENT_4_2 Register" line.long 0x14 "ELM_SYNDROME_FRAGMENT_5_2,ELM_SYNDROME_FRAGMENT_5_2 Register" line.long 0x18 "ELM_SYNDROME_FRAGMENT_6_2,ELM_SYNDROME_FRAGMENT_6_2 Register" bitfld.long 0x18 16. "SYNDROME_VALID,Syndrome valid bit" "Not valid,Valid" hexmask.long.word 0x18 0.--15. 1. "SYNDROME_6,Syndrome bits 192 to 207" group.long 0x4C0++0x1B line.long 0x00 "ELM_SYNDROME_FRAGMENT_0_3,ELM_SYNDROME_FRAGMENT_0_3 Register" line.long 0x04 "ELM_SYNDROME_FRAGMENT_1_3,ELM_SYNDROME_FRAGMENT_1_3 Register" line.long 0x08 "ELM_SYNDROME_FRAGMENT_2_3,ELM_SYNDROME_FRAGMENT_2_3 Register" line.long 0x0C "ELM_SYNDROME_FRAGMENT_3_3,ELM_SYNDROME_FRAGMENT_3_3 Register" line.long 0x10 "ELM_SYNDROME_FRAGMENT_4_3,ELM_SYNDROME_FRAGMENT_4_3 Register" line.long 0x14 "ELM_SYNDROME_FRAGMENT_5_3,ELM_SYNDROME_FRAGMENT_5_3 Register" line.long 0x18 "ELM_SYNDROME_FRAGMENT_6_3,ELM_SYNDROME_FRAGMENT_6_3 Register" bitfld.long 0x18 16. "SYNDROME_VALID,Syndrome valid bit" "Not valid,Valid" hexmask.long.word 0x18 0.--15. 1. "SYNDROME_6,Syndrome bits 192 to 207" group.long 0x500++0x1B line.long 0x00 "ELM_SYNDROME_FRAGMENT_0_4,ELM_SYNDROME_FRAGMENT_0_4 Register" line.long 0x04 "ELM_SYNDROME_FRAGMENT_1_4,ELM_SYNDROME_FRAGMENT_1_4 Register" line.long 0x08 "ELM_SYNDROME_FRAGMENT_2_4,ELM_SYNDROME_FRAGMENT_2_4 Register" line.long 0x0C "ELM_SYNDROME_FRAGMENT_3_4,ELM_SYNDROME_FRAGMENT_3_4 Register" line.long 0x10 "ELM_SYNDROME_FRAGMENT_4_4,ELM_SYNDROME_FRAGMENT_4_4 Register" line.long 0x14 "ELM_SYNDROME_FRAGMENT_5_4,ELM_SYNDROME_FRAGMENT_5_4 Register" line.long 0x18 "ELM_SYNDROME_FRAGMENT_6_4,ELM_SYNDROME_FRAGMENT_6_4 Register" bitfld.long 0x18 16. "SYNDROME_VALID,Syndrome valid bit" "Not valid,Valid" hexmask.long.word 0x18 0.--15. 1. "SYNDROME_6,Syndrome bits 192 to 207" group.long 0x540++0x1B line.long 0x00 "ELM_SYNDROME_FRAGMENT_0_5,ELM_SYNDROME_FRAGMENT_0_5 Register" line.long 0x04 "ELM_SYNDROME_FRAGMENT_1_5,ELM_SYNDROME_FRAGMENT_1_5 Register" line.long 0x08 "ELM_SYNDROME_FRAGMENT_2_5,ELM_SYNDROME_FRAGMENT_2_5 Register" line.long 0x0C "ELM_SYNDROME_FRAGMENT_3_5,ELM_SYNDROME_FRAGMENT_3_5 Register" line.long 0x10 "ELM_SYNDROME_FRAGMENT_4_5,ELM_SYNDROME_FRAGMENT_4_5 Register" line.long 0x14 "ELM_SYNDROME_FRAGMENT_5_5,ELM_SYNDROME_FRAGMENT_5_5 Register" line.long 0x18 "ELM_SYNDROME_FRAGMENT_6_5,ELM_SYNDROME_FRAGMENT_6_5 Register" bitfld.long 0x18 16. "SYNDROME_VALID,Syndrome valid bit" "Not valid,Valid" hexmask.long.word 0x18 0.--15. 1. "SYNDROME_6,Syndrome bits 192 to 207" group.long 0x580++0x1B line.long 0x00 "ELM_SYNDROME_FRAGMENT_0_6,ELM_SYNDROME_FRAGMENT_0_6 Register" line.long 0x04 "ELM_SYNDROME_FRAGMENT_1_6,ELM_SYNDROME_FRAGMENT_1_6 Register" line.long 0x08 "ELM_SYNDROME_FRAGMENT_2_6,ELM_SYNDROME_FRAGMENT_2_6 Register" line.long 0x0C "ELM_SYNDROME_FRAGMENT_3_6,ELM_SYNDROME_FRAGMENT_3_6 Register" line.long 0x10 "ELM_SYNDROME_FRAGMENT_4_6,ELM_SYNDROME_FRAGMENT_4_6 Register" line.long 0x14 "ELM_SYNDROME_FRAGMENT_5_6,ELM_SYNDROME_FRAGMENT_5_6 Register" line.long 0x18 "ELM_SYNDROME_FRAGMENT_6_6,ELM_SYNDROME_FRAGMENT_6_6 Register" bitfld.long 0x18 16. "SYNDROME_VALID,Syndrome valid bit" "Not valid,Valid" hexmask.long.word 0x18 0.--15. 1. "SYNDROME_6,Syndrome bits 192 to 207" group.long 0x5C0++0x1B line.long 0x00 "ELM_SYNDROME_FRAGMENT_0_7,ELM_SYNDROME_FRAGMENT_0_7 Register" line.long 0x04 "ELM_SYNDROME_FRAGMENT_1_7,ELM_SYNDROME_FRAGMENT_1_7 Register" line.long 0x08 "ELM_SYNDROME_FRAGMENT_2_7,ELM_SYNDROME_FRAGMENT_2_7 Register" line.long 0x0C "ELM_SYNDROME_FRAGMENT_3_7,ELM_SYNDROME_FRAGMENT_3_7 Register" line.long 0x10 "ELM_SYNDROME_FRAGMENT_4_7,ELM_SYNDROME_FRAGMENT_4_7 Register" line.long 0x14 "ELM_SYNDROME_FRAGMENT_5_7,ELM_SYNDROME_FRAGMENT_5_7 Register" line.long 0x18 "ELM_SYNDROME_FRAGMENT_6_7,ELM_SYNDROME_FRAGMENT_6_7 Register" bitfld.long 0x18 16. "SYNDROME_VALID,Syndrome valid bit" "Not valid,Valid" hexmask.long.word 0x18 0.--15. 1. "SYNDROME_6,Syndrome bits 192 to 207" group.long 0x800++0x03 line.long 0x00 "ELM_LOCATION_STATUS_0,ELM_LOCATION_STATUS_0 Register" bitfld.long 0x00 8. "ECC_CORRECTABL,Error-location process exit status" "Failed,Succeed" bitfld.long 0x00 0.--4. "ECC_NB_ERRORS,Number of errors detected and located" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x880++0x03 line.long 0x00 "ELM_ERROR_LOCATION_0_0,ELM_ERROR_LOCATION_0_0 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x884++0x03 line.long 0x00 "ELM_ERROR_LOCATION_0_1,ELM_ERROR_LOCATION_0_1 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x888++0x03 line.long 0x00 "ELM_ERROR_LOCATION_0_2,ELM_ERROR_LOCATION_0_2 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x88C++0x03 line.long 0x00 "ELM_ERROR_LOCATION_0_3,ELM_ERROR_LOCATION_0_3 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x890++0x03 line.long 0x00 "ELM_ERROR_LOCATION_0_4,ELM_ERROR_LOCATION_0_4 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x894++0x03 line.long 0x00 "ELM_ERROR_LOCATION_0_5,ELM_ERROR_LOCATION_0_5 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x898++0x03 line.long 0x00 "ELM_ERROR_LOCATION_0_6,ELM_ERROR_LOCATION_0_6 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x89C++0x03 line.long 0x00 "ELM_ERROR_LOCATION_0_7,ELM_ERROR_LOCATION_0_7 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x8A0++0x03 line.long 0x00 "ELM_ERROR_LOCATION_0_8,ELM_ERROR_LOCATION_0_8 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x8A4++0x03 line.long 0x00 "ELM_ERROR_LOCATION_0_9,ELM_ERROR_LOCATION_0_9 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x8A8++0x03 line.long 0x00 "ELM_ERROR_LOCATION_0_10,ELM_ERROR_LOCATION_0_10 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x8AC++0x03 line.long 0x00 "ELM_ERROR_LOCATION_0_11,ELM_ERROR_LOCATION_0_11 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x8B0++0x03 line.long 0x00 "ELM_ERROR_LOCATION_0_12,ELM_ERROR_LOCATION_0_12 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x8B4++0x03 line.long 0x00 "ELM_ERROR_LOCATION_0_13,ELM_ERROR_LOCATION_0_13 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x8B8++0x03 line.long 0x00 "ELM_ERROR_LOCATION_0_14,ELM_ERROR_LOCATION_0_14 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x900++0x03 line.long 0x00 "ELM_LOCATION_STATUS_1,ELM_LOCATION_STATUS_1 Register" bitfld.long 0x00 8. "ECC_CORRECTABL,Error-location process exit status" "Failed,Succeed" bitfld.long 0x00 0.--4. "ECC_NB_ERRORS,Number of errors detected and located" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x980++0x03 line.long 0x00 "ELM_ERROR_LOCATION_1_0,ELM_ERROR_LOCATION_1_0 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x984++0x03 line.long 0x00 "ELM_ERROR_LOCATION_1_1,ELM_ERROR_LOCATION_1_1 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x988++0x03 line.long 0x00 "ELM_ERROR_LOCATION_1_2,ELM_ERROR_LOCATION_1_2 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x98C++0x03 line.long 0x00 "ELM_ERROR_LOCATION_1_3,ELM_ERROR_LOCATION_1_3 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x990++0x03 line.long 0x00 "ELM_ERROR_LOCATION_1_4,ELM_ERROR_LOCATION_1_4 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x994++0x03 line.long 0x00 "ELM_ERROR_LOCATION_1_5,ELM_ERROR_LOCATION_1_5 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x998++0x03 line.long 0x00 "ELM_ERROR_LOCATION_1_6,ELM_ERROR_LOCATION_1_6 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x99C++0x03 line.long 0x00 "ELM_ERROR_LOCATION_1_7,ELM_ERROR_LOCATION_1_7 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x9A0++0x03 line.long 0x00 "ELM_ERROR_LOCATION_1_8,ELM_ERROR_LOCATION_1_8 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x9A4++0x03 line.long 0x00 "ELM_ERROR_LOCATION_1_9,ELM_ERROR_LOCATION_1_9 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x9A8++0x03 line.long 0x00 "ELM_ERROR_LOCATION_1_10,ELM_ERROR_LOCATION_1_10 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x9AC++0x03 line.long 0x00 "ELM_ERROR_LOCATION_1_11,ELM_ERROR_LOCATION_1_11 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x9B0++0x03 line.long 0x00 "ELM_ERROR_LOCATION_1_12,ELM_ERROR_LOCATION_1_12 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x9B4++0x03 line.long 0x00 "ELM_ERROR_LOCATION_1_13,ELM_ERROR_LOCATION_1_13 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0x9B8++0x03 line.long 0x00 "ELM_ERROR_LOCATION_1_14,ELM_ERROR_LOCATION_1_14 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xA00++0x03 line.long 0x00 "ELM_LOCATION_STATUS_2,ELM_LOCATION_STATUS_2 Register" bitfld.long 0x00 8. "ECC_CORRECTABL,Error-location process exit status" "Failed,Succeed" bitfld.long 0x00 0.--4. "ECC_NB_ERRORS,Number of errors detected and located" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0xA80++0x03 line.long 0x00 "ELM_ERROR_LOCATION_2_0,ELM_ERROR_LOCATION_2_0 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xA84++0x03 line.long 0x00 "ELM_ERROR_LOCATION_2_1,ELM_ERROR_LOCATION_2_1 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xA88++0x03 line.long 0x00 "ELM_ERROR_LOCATION_2_2,ELM_ERROR_LOCATION_2_2 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xA8C++0x03 line.long 0x00 "ELM_ERROR_LOCATION_2_3,ELM_ERROR_LOCATION_2_3 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xA90++0x03 line.long 0x00 "ELM_ERROR_LOCATION_2_4,ELM_ERROR_LOCATION_2_4 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xA94++0x03 line.long 0x00 "ELM_ERROR_LOCATION_2_5,ELM_ERROR_LOCATION_2_5 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xA98++0x03 line.long 0x00 "ELM_ERROR_LOCATION_2_6,ELM_ERROR_LOCATION_2_6 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xA9C++0x03 line.long 0x00 "ELM_ERROR_LOCATION_2_7,ELM_ERROR_LOCATION_2_7 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xAA0++0x03 line.long 0x00 "ELM_ERROR_LOCATION_2_8,ELM_ERROR_LOCATION_2_8 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xAA4++0x03 line.long 0x00 "ELM_ERROR_LOCATION_2_9,ELM_ERROR_LOCATION_2_9 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xAA8++0x03 line.long 0x00 "ELM_ERROR_LOCATION_2_10,ELM_ERROR_LOCATION_2_10 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xAAC++0x03 line.long 0x00 "ELM_ERROR_LOCATION_2_11,ELM_ERROR_LOCATION_2_11 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xAB0++0x03 line.long 0x00 "ELM_ERROR_LOCATION_2_12,ELM_ERROR_LOCATION_2_12 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xAB4++0x03 line.long 0x00 "ELM_ERROR_LOCATION_2_13,ELM_ERROR_LOCATION_2_13 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xAB8++0x03 line.long 0x00 "ELM_ERROR_LOCATION_2_14,ELM_ERROR_LOCATION_2_14 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xB80++0x03 line.long 0x00 "ELM_ERROR_LOCATION_3_0,ELM_ERROR_LOCATION_3_0 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xB84++0x03 line.long 0x00 "ELM_ERROR_LOCATION_3_1,ELM_ERROR_LOCATION_3_1 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xB88++0x03 line.long 0x00 "ELM_ERROR_LOCATION_3_2,ELM_ERROR_LOCATION_3_2 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xB8C++0x03 line.long 0x00 "ELM_ERROR_LOCATION_3_3,ELM_ERROR_LOCATION_3_3 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xB90++0x03 line.long 0x00 "ELM_ERROR_LOCATION_3_4,ELM_ERROR_LOCATION_3_4 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xB94++0x03 line.long 0x00 "ELM_ERROR_LOCATION_3_5,ELM_ERROR_LOCATION_3_5 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xB98++0x03 line.long 0x00 "ELM_ERROR_LOCATION_3_6,ELM_ERROR_LOCATION_3_6 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xB9C++0x03 line.long 0x00 "ELM_ERROR_LOCATION_3_7,ELM_ERROR_LOCATION_3_7 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xBA0++0x03 line.long 0x00 "ELM_ERROR_LOCATION_3_8,ELM_ERROR_LOCATION_3_8 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xBA4++0x03 line.long 0x00 "ELM_ERROR_LOCATION_3_9,ELM_ERROR_LOCATION_3_9 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xBA8++0x03 line.long 0x00 "ELM_ERROR_LOCATION_3_10,ELM_ERROR_LOCATION_3_10 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xBAC++0x03 line.long 0x00 "ELM_ERROR_LOCATION_3_11,ELM_ERROR_LOCATION_3_11 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xBB0++0x03 line.long 0x00 "ELM_ERROR_LOCATION_3_12,ELM_ERROR_LOCATION_3_12 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xBB4++0x03 line.long 0x00 "ELM_ERROR_LOCATION_3_13,ELM_ERROR_LOCATION_3_13 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xBB8++0x03 line.long 0x00 "ELM_ERROR_LOCATION_3_14,ELM_ERROR_LOCATION_3_14 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xB00++0x03 line.long 0x00 "ELM_LOCATION_STATUS_3,ELM_LOCATION_STATUS_3 Register" bitfld.long 0x00 8. "ECC_CORRECTABL,Error-location process exit status" "Failed,Succeed" bitfld.long 0x00 0.--4. "ECC_NB_ERRORS,Number of errors detected and located" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0xC80++0x03 line.long 0x00 "ELM_ERROR_LOCATION_4_0,ELM_ERROR_LOCATION_4_0 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xC84++0x03 line.long 0x00 "ELM_ERROR_LOCATION_4_1,ELM_ERROR_LOCATION_4_1 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xC88++0x03 line.long 0x00 "ELM_ERROR_LOCATION_4_2,ELM_ERROR_LOCATION_4_2 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xC8C++0x03 line.long 0x00 "ELM_ERROR_LOCATION_4_3,ELM_ERROR_LOCATION_4_3 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xC90++0x03 line.long 0x00 "ELM_ERROR_LOCATION_4_4,ELM_ERROR_LOCATION_4_4 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xC94++0x03 line.long 0x00 "ELM_ERROR_LOCATION_4_5,ELM_ERROR_LOCATION_4_5 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xC98++0x03 line.long 0x00 "ELM_ERROR_LOCATION_4_6,ELM_ERROR_LOCATION_4_6 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xC9C++0x03 line.long 0x00 "ELM_ERROR_LOCATION_4_7,ELM_ERROR_LOCATION_4_7 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xCA0++0x03 line.long 0x00 "ELM_ERROR_LOCATION_4_8,ELM_ERROR_LOCATION_4_8 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xCA4++0x03 line.long 0x00 "ELM_ERROR_LOCATION_4_9,ELM_ERROR_LOCATION_4_9 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xCA8++0x03 line.long 0x00 "ELM_ERROR_LOCATION_4_10,ELM_ERROR_LOCATION_4_10 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xCAC++0x03 line.long 0x00 "ELM_ERROR_LOCATION_4_11,ELM_ERROR_LOCATION_4_11 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xCB0++0x03 line.long 0x00 "ELM_ERROR_LOCATION_4_12,ELM_ERROR_LOCATION_4_12 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xCB4++0x03 line.long 0x00 "ELM_ERROR_LOCATION_4_13,ELM_ERROR_LOCATION_4_13 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xCB8++0x03 line.long 0x00 "ELM_ERROR_LOCATION_4_14,ELM_ERROR_LOCATION_4_14 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xD80++0x03 line.long 0x00 "ELM_ERROR_LOCATION_5_0,ELM_ERROR_LOCATION_5_0 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xD84++0x03 line.long 0x00 "ELM_ERROR_LOCATION_5_1,ELM_ERROR_LOCATION_5_1 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xD88++0x03 line.long 0x00 "ELM_ERROR_LOCATION_5_2,ELM_ERROR_LOCATION_5_2 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xD8C++0x03 line.long 0x00 "ELM_ERROR_LOCATION_5_3,ELM_ERROR_LOCATION_5_3 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xD90++0x03 line.long 0x00 "ELM_ERROR_LOCATION_5_4,ELM_ERROR_LOCATION_5_4 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xD94++0x03 line.long 0x00 "ELM_ERROR_LOCATION_5_5,ELM_ERROR_LOCATION_5_5 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xD98++0x03 line.long 0x00 "ELM_ERROR_LOCATION_5_6,ELM_ERROR_LOCATION_5_6 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xD9C++0x03 line.long 0x00 "ELM_ERROR_LOCATION_5_7,ELM_ERROR_LOCATION_5_7 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xDA0++0x03 line.long 0x00 "ELM_ERROR_LOCATION_5_8,ELM_ERROR_LOCATION_5_8 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xDA4++0x03 line.long 0x00 "ELM_ERROR_LOCATION_5_9,ELM_ERROR_LOCATION_5_9 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xDA8++0x03 line.long 0x00 "ELM_ERROR_LOCATION_5_10,ELM_ERROR_LOCATION_5_10 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xDAC++0x03 line.long 0x00 "ELM_ERROR_LOCATION_5_11,ELM_ERROR_LOCATION_5_11 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xDB0++0x03 line.long 0x00 "ELM_ERROR_LOCATION_5_12,ELM_ERROR_LOCATION_5_12 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xDB4++0x03 line.long 0x00 "ELM_ERROR_LOCATION_5_13,ELM_ERROR_LOCATION_5_13 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xDB8++0x03 line.long 0x00 "ELM_ERROR_LOCATION_5_14,ELM_ERROR_LOCATION_5_14 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xC00++0x03 line.long 0x00 "ELM_LOCATION_STATUS_4,ELM_LOCATION_STATUS_4 Register" bitfld.long 0x00 8. "ECC_CORRECTABL,Error-location process exit status" "Failed,Succeed" bitfld.long 0x00 0.--4. "ECC_NB_ERRORS,Number of errors detected and located" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0xE80++0x03 line.long 0x00 "ELM_ERROR_LOCATION_6_0,ELM_ERROR_LOCATION_6_0 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xE84++0x03 line.long 0x00 "ELM_ERROR_LOCATION_6_1,ELM_ERROR_LOCATION_6_1 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xE88++0x03 line.long 0x00 "ELM_ERROR_LOCATION_6_2,ELM_ERROR_LOCATION_6_2 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xE8C++0x03 line.long 0x00 "ELM_ERROR_LOCATION_6_3,ELM_ERROR_LOCATION_6_3 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xE90++0x03 line.long 0x00 "ELM_ERROR_LOCATION_6_4,ELM_ERROR_LOCATION_6_4 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xE94++0x03 line.long 0x00 "ELM_ERROR_LOCATION_6_5,ELM_ERROR_LOCATION_6_5 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xE98++0x03 line.long 0x00 "ELM_ERROR_LOCATION_6_6,ELM_ERROR_LOCATION_6_6 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xE9C++0x03 line.long 0x00 "ELM_ERROR_LOCATION_6_7,ELM_ERROR_LOCATION_6_7 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xEA0++0x03 line.long 0x00 "ELM_ERROR_LOCATION_6_8,ELM_ERROR_LOCATION_6_8 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xEA4++0x03 line.long 0x00 "ELM_ERROR_LOCATION_6_9,ELM_ERROR_LOCATION_6_9 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xEA8++0x03 line.long 0x00 "ELM_ERROR_LOCATION_6_10,ELM_ERROR_LOCATION_6_10 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xEAC++0x03 line.long 0x00 "ELM_ERROR_LOCATION_6_11,ELM_ERROR_LOCATION_6_11 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xEB0++0x03 line.long 0x00 "ELM_ERROR_LOCATION_6_12,ELM_ERROR_LOCATION_6_12 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xEB4++0x03 line.long 0x00 "ELM_ERROR_LOCATION_6_13,ELM_ERROR_LOCATION_6_13 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xEB8++0x03 line.long 0x00 "ELM_ERROR_LOCATION_6_14,ELM_ERROR_LOCATION_6_14 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xF80++0x03 line.long 0x00 "ELM_ERROR_LOCATION_7_0,ELM_ERROR_LOCATION_7_0 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xF84++0x03 line.long 0x00 "ELM_ERROR_LOCATION_7_1,ELM_ERROR_LOCATION_7_1 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xF88++0x03 line.long 0x00 "ELM_ERROR_LOCATION_7_2,ELM_ERROR_LOCATION_7_2 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xF8C++0x03 line.long 0x00 "ELM_ERROR_LOCATION_7_3,ELM_ERROR_LOCATION_7_3 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xF90++0x03 line.long 0x00 "ELM_ERROR_LOCATION_7_4,ELM_ERROR_LOCATION_7_4 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xF94++0x03 line.long 0x00 "ELM_ERROR_LOCATION_7_5,ELM_ERROR_LOCATION_7_5 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xF98++0x03 line.long 0x00 "ELM_ERROR_LOCATION_7_6,ELM_ERROR_LOCATION_7_6 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xF9C++0x03 line.long 0x00 "ELM_ERROR_LOCATION_7_7,ELM_ERROR_LOCATION_7_7 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xFA0++0x03 line.long 0x00 "ELM_ERROR_LOCATION_7_8,ELM_ERROR_LOCATION_7_8 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xFA4++0x03 line.long 0x00 "ELM_ERROR_LOCATION_7_9,ELM_ERROR_LOCATION_7_9 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xFA8++0x03 line.long 0x00 "ELM_ERROR_LOCATION_7_10,ELM_ERROR_LOCATION_7_10 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xFAC++0x03 line.long 0x00 "ELM_ERROR_LOCATION_7_11,ELM_ERROR_LOCATION_7_11 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xFB0++0x03 line.long 0x00 "ELM_ERROR_LOCATION_7_12,ELM_ERROR_LOCATION_7_12 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xFB4++0x03 line.long 0x00 "ELM_ERROR_LOCATION_7_13,ELM_ERROR_LOCATION_7_13 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xFB8++0x03 line.long 0x00 "ELM_ERROR_LOCATION_7_14,ELM_ERROR_LOCATION_7_14 Register" hexmask.long.word 0x00 0.--12. 0x01 "ECC_ERROR_LOCATION,Error-location bit address" group.long 0xD00++0x03 line.long 0x00 "ELM_LOCATION_STATUS_5,ELM_LOCATION_STATUS_5 Register" bitfld.long 0x00 8. "ECC_CORRECTABL,Error-location process exit status" "Failed,Succeed" bitfld.long 0x00 0.--4. "ECC_NB_ERRORS,Number of errors detected and located" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0xE00++0x03 line.long 0x00 "ELM_LOCATION_STATUS_6,ELM_LOCATION_STATUS_6 Register" bitfld.long 0x00 8. "ECC_CORRECTABL,Error-location process exit status" "Failed,Succeed" bitfld.long 0x00 0.--4. "ECC_NB_ERRORS,Number of errors detected and located" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0xF00++0x03 line.long 0x00 "ELM_LOCATION_STATUS_7,ELM_LOCATION_STATUS_7 Register" bitfld.long 0x00 8. "ECC_CORRECTABL,Error-location process exit status" "Failed,Succeed" bitfld.long 0x00 0.--4. "ECC_NB_ERRORS,Number of errors detected and located" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end tree.end tree "PRCM (Power/Reset/Clock Managenent)" tree "CM (Clock Module Registers)" tree "CM_PER" base ad:0x44E00000 group.long 0x00++0x03 line.long 0x00 "CM_PER_L4LS_CLKSTCTRL,CM_PER_L4LS_CLKSTCTRL Register" rbitfld.long 0x00 28. "CLKACTIVITY_TIMER6_GCLK,This field indicates the state of the TIMER6 CLKTIMER clock in the domain" "Not active,Active" rbitfld.long 0x00 27. "CLKACTIVITY_TIMER5_GCLK,This field indicates the state of the TIMER5 CLKTIMER clock in the domain" "Not active,Active" newline rbitfld.long 0x00 25. "CLKACTIVITY_SPI_GCLK,This field indicates the state of the SPI_GCLK clock in the domain" "Not active,Active" rbitfld.long 0x00 24. "CLKACTIVITY_I2C_FCLK,This field indicates the state of the I2C _FCLK clock in the domain" "Not active,Active" newline rbitfld.long 0x00 21. "CLKACTIVITY_GPIO_3_GDBCLK,This field indicates the state of the GPIO3_GDBCLK clock in the domain" "Not active,Active" rbitfld.long 0x00 20. "CLKACTIVITY_GPIO_2_GDBCLK,This field indicates the state of the GPIO2_GDBCLK clock in the domain" "Not active,Active" newline rbitfld.long 0x00 19. "CLKACTIVITY_GPIO_1_GDBCLK,This field indicates the state of the GPIO1_GDBCLK clock in the domain" "Not active,Active" rbitfld.long 0x00 17. "CLKACTIVITY_LCDC_GCLK,This field indicates the state of the LCD clock in the domain" "Not active,Active" newline rbitfld.long 0x00 16. "CLKACTIVITY_TIMER4_GCLK,This field indicates the state of the TIMER4 CLKTIMER clock in the domain" "Not active,Active" rbitfld.long 0x00 15. "CLKACTIVITY_TIMER3_GCLK,This field indicates the state of the TIMER3 CLKTIMER clock in the domain" "Not active,Active" newline rbitfld.long 0x00 14. "CLKACTIVITY_TIMER2_GCLK,This field indicates the state of the TIMER2 CLKTIMER clock in the domain" "Not active,Active" rbitfld.long 0x00 13. "CLKACTIVITY_TIMER7_GCLK,This field indicates the state of the TIMER7 CLKTIMER clock in the domain" "Not active,Active" newline rbitfld.long 0x00 11. "CLKACTIVITY_CAN_CLK,This field indicates the state of the CAN_CLK clock in the domain" "Not active,Active" rbitfld.long 0x00 10. "CLKACTIVITY_UART_GFCLK,This field indicates the state of the UART_GFCLK clock in the domain" "Not active,Active" newline rbitfld.long 0x00 8. "CLKACTIVITY_L4LS_GCLK,This field indicates the state of the L4LS_GCLK clock in the domain" "Not active,Active" bitfld.long 0x00 0.--1. "CLKTRCTRL,Controls the clock state transition of the L4 SLOW clock domain in PER power domain" "NO_SLEEK,SW_SLEEP,SW_WKUP,?..." group.long 0x04++0x03 line.long 0x00 "CM_PER_L3S_CLKSTCTRL,CM_PER_L3S_CLKSTCTRL Register" rbitfld.long 0x00 3. "CLKACTIVITY_L3S_GCLK,This field indicates the state of the L3S_GCLK clock in the domain" "Not active,Active" bitfld.long 0x00 0.--1. "CLKTRCTRL,Controls the clock state transition of the L3 SLOW clock domain in PER power domain" "NO_SLEEK,SW_SLEEP,SW_WKUP,?..." group.long 0x0C++0x03 line.long 0x00 "CM_PER_L3_CLKSTCTRL,CM_PER_L3_CLKSTCTRL Register" rbitfld.long 0x00 7. "CLKACTIVITY_MCASP_GCLK,This field indicates the state of the MCASP_GCLK clock in the domain" "Not active,Active" rbitfld.long 0x00 6. "CLKACTIVITY_CPTS_RFT_GCLK,This field indicates the state of the CLKACTIVITY_CPTS_RFT_GCLK clock in the domain" "Not active,Active" newline rbitfld.long 0x00 4. "CLKACTIVITY_L3_GCLK,This field indicates the state of the L3_GCLK clock in the domain" "Not active,Active" rbitfld.long 0x00 3. "CLKACTIVITY_MMC_FCLK,This field indicates the state of the MMC_GCLK clock in the domain" "Not active,Active" newline rbitfld.long 0x00 2. "CLKACTIVITY_EMIF_GCLK,This field indicates the state of the EMIF_GCLK clock in the domain" "Not active,Active" bitfld.long 0x00 0.--1. "CLKTRCTRL,Controls the clock state transition of the L3 clock domain" "NO_SLEEK,SW_SLEEP,SW_WKUP,?..." group.long 0x14++0x03 line.long 0x00 "CM_PER_CPGMAC0_CLKCTRL,CM_PER_CPGMAC0_CLKCTRL Register" rbitfld.long 0x00 18. "STBYST,Module standby status" "Functional,Standby" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" newline bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x18++0x03 line.long 0x00 "CM_PER_LCDC_CLKCTRL,CM_PER_LCDC_CLKCTRL Register" rbitfld.long 0x00 18. "STBYST,Module standby status" "Functional,Standby" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" newline bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x1C++0x03 line.long 0x00 "CM_PER_USB0_CLKCTRL,CM_PER_USB0_CLKCTRL Register" rbitfld.long 0x00 18. "STBYST,Module standby status" "Functional,Standby" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" newline bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x24++0x03 line.long 0x00 "CM_PER_TPTC0_CLKCTRL,CM_PER_TPTC0_CLKCTRL Register" rbitfld.long 0x00 18. "STBYST,Module standby status" "Disabled,Enabled" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" newline bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x28++0x03 line.long 0x00 "CM_PER_EMIF_CLKCTRL,CM_PER_EMIF_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x2C++0x03 line.long 0x00 "CM_PER_OCMCRAM_CLKCTRL,CM_PER_OCMCRAM_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x30++0x03 line.long 0x00 "CM_PER_GPMC_CLKCTRL,CM_PER_GPMC_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x34++0x03 line.long 0x00 "CM_PER_MCASP0_CLKCTRL,CM_PER_MCASP0_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x38++0x03 line.long 0x00 "CM_PER_UART5_CLKCTRL,CM_PER_UART5_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x3C++0x03 line.long 0x00 "CM_PER_MMC0_CLKCTRL,CM_PER_MMC0_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x40++0x03 line.long 0x00 "CM_PER_ELM_CLKCTRL,CM_PER_ELM_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x44++0x03 line.long 0x00 "CM_PER_I2C2_CLKCTRL,CM_PER_I2C2_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x48++0x03 line.long 0x00 "CM_PER_I2C1_CLKCTRL,CM_PER_I2C1_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x4C++0x03 line.long 0x00 "CM_PER_SPI0_CLKCTRL,CM_PER_SPI0_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x50++0x03 line.long 0x00 "CM_PER_SPI1_CLKCTRL,CM_PER_SPI1_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x60++0x03 line.long 0x00 "CM_PER_L4LS_CLKCTRL,CM_PER_L4LS_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x68++0x03 line.long 0x00 "CM_PER_MCASP1_CLKCTRL,CM_PER_MCASP1_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x6C++0x03 line.long 0x00 "CM_PER_UART1_CLKCTRL,CM_PER_UART1_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x70++0x03 line.long 0x00 "CM_PER_UART2_CLKCTRL,CM_PER_UART2_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x74++0x03 line.long 0x00 "CM_PER_UART3_CLKCTRL,CM_PER_UART3_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x78++0x03 line.long 0x00 "CM_PER_UART4_CLKCTRL,CM_PER_UART4_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x7C++0x03 line.long 0x00 "CM_PER_TIMER7_CLKCTRL,CM_PER_TIMER7_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x80++0x03 line.long 0x00 "CM_PER_TIMER2_CLKCTRL,CM_PER_TIMER2_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x84++0x03 line.long 0x00 "CM_PER_TIMER3_CLKCTRL,CM_PER_TIMER3_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x88++0x03 line.long 0x00 "CM_PER_TIMER4_CLKCTRL,CM_PER_TIMER4_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0xAC++0x03 line.long 0x00 "CM_PER_GPIO1_CLKCTRL,CM_PER_GPIO1_CLKCTRL Register" bitfld.long 0x00 18. "OPTFCLKEN_GPIO_1_GDBCLK,Optional functional clock control" "Disabled,Enabled" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" newline bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0xB0++0x03 line.long 0x00 "CM_PER_GPIO2_CLKCTRL,CM_PER_GPIO2_CLKCTRL Register" bitfld.long 0x00 18. "OPTFCLKEN_GPIO_2_GDBCLK,Optional functional clock control" "Disabled,Enabled" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" newline bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0xB4++0x03 line.long 0x00 "CM_PER_GPIO3_CLKCTRL,CM_PER_GPIO3_CLKCTRL Register" bitfld.long 0x00 18. "OPTFCLKEN_GPIO_3_GDBCLK,Optional functional clock control" "Disabled,Enabled" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" newline bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0xBC++0x03 line.long 0x00 "CM_PER_TPCC_CLKCTRL,CM_PER_TPCC_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0xC0++0x03 line.long 0x00 "CM_PER_DCAN0_CLKCTRL,CM_PER_DCAN0_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0xC4++0x03 line.long 0x00 "CM_PER_DCAN1_CLKCTRL,CM_PER_DCAN1_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0xCC++0x03 line.long 0x00 "CM_PER_EPWMSS1_CLKCTRL,CM_PER_EPWMSS1_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0xD4++0x03 line.long 0x00 "CM_PER_EPWMSS0_CLKCTRL,CM_PER_EPWMSS0_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0xD8++0x03 line.long 0x00 "CM_PER_EPWMSS2_CLKCTRL,CM_PER_EPWMSS2_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0xDC++0x03 line.long 0x00 "CM_PER_L3_INSTR_CLKCTRL,CM_PER_L3_INSTR_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0xE0++0x03 line.long 0x00 "CM_PER_L3_CLKCTRL,CM_PER_L3_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0xE4++0x07 line.long 0x00 "CM_PER_IEEE5000_CLKCTRL,CM_PER_IEEE5000_CLKCTRL Register" rbitfld.long 0x00 18. "STBYST,Module standby status" "Disabled,Enabled" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" newline bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." line.long 0x04 "CM_PER_PRU_ICSS_CLKCTRL,CM_PER_PRU_ICSS_CLKCTRL Register" rbitfld.long 0x04 18. "STBYST,Module standby status" "Disabled,Enabled" rbitfld.long 0x04 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" newline bitfld.long 0x04 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0xEC++0x03 line.long 0x00 "CM_PER_TIMER5_CLKCTRL,CM_PER_TIMER5_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0xF0++0x03 line.long 0x00 "CM_PER_TIMER6_CLKCTRL,CM_PER_TIMER6_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0xF4++0x03 line.long 0x00 "CM_PER_MMC1_CLKCTRL,CM_PER_MMC1_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0xF8++0x03 line.long 0x00 "CM_PER_MMC2_CLKCTRL,CM_PER_MMC2_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0xFC++0x07 line.long 0x00 "CM_PER_TPTC1_CLKCTRL,CM_PER_TPTC1_CLKCTRL Register" rbitfld.long 0x00 18. "STBYST,Module standby status" "Disabled,Enabled" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" newline bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." line.long 0x04 "CM_PER_TPTC2_CLKCTRL,CM_PER_TPTC2_CLKCTRL Register" rbitfld.long 0x04 18. "STBYST,Module standby status" "Disabled,Enabled" rbitfld.long 0x04 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" newline bitfld.long 0x04 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x10C++0x07 line.long 0x00 "CM_PER_SPINLOCK_CLKCTRL,CM_PER_SPINLOCK_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." line.long 0x04 "CM_PER_MAILBOX0_CLKCTRL,CM_PER_MAILBOX0_CLKCTRL Register" rbitfld.long 0x04 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x04 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x11C++0x03 line.long 0x00 "CM_PER_L4HS_CLKSTCTRL,CM_PER_L4HS_CLKSTCTRL Register" rbitfld.long 0x00 6. "CLKACTIVITY_CPSW_5MHZ_GCLK,This field indicates the state of the CPSW_5MHZ_GCLK clock in the domain" "Not active,Active" rbitfld.long 0x00 5. "CLKACTIVITY_CPSW_50MHZ_GCLK,This field indicates the state of the CPSW_50MHZ_GCLK clock in the domain" "Not active,Active" newline rbitfld.long 0x00 4. "CLKACTIVITY_CPSW_25MHZ_GCLK,This field indicates the state of the CPSW_25MHZ_GCLK clock in the domain" "Not active,Active" rbitfld.long 0x00 3. "CLKACTIVITY_CPSW_L4HS_GCLK,This field indicates the state of the CPSW_L4HS_GCLK clock in the domain" "Not active,Active" newline bitfld.long 0x00 0.--1. "CLKTRCTRL,Controls the clock state transition of the L4 Fast clock domain" "NO_SLEEK,SW_SLEEP,SW_WKUP,?..." group.long 0x120++0x03 line.long 0x00 "CM_PER_L4HS_CLKCTRL,CM_PER_L4HS_CLKCTRL Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x12C++0x03 line.long 0x00 "CM_PER_OCPWP_L3_CLKSTCTRL,CM_PER_OCPWP_L3_CLKSTCTRL Register" rbitfld.long 0x00 5. "CLKACTIVITY_OCPWP_L3_GCLK,This field indicates the state of the OCPWP L4 clock in the domain" "Not active,Active" rbitfld.long 0x00 4. "CLKACTIVITY_OCPWP_L3_GCLK,This field indicates the state of the OCPWP L3 clock in the domain" "Not active,Active" newline bitfld.long 0x00 0.--1. "CLKTRCTRL,Controls the clock state transition of the OCPWP clock domain" "NO_SLEEK,SW_SLEEP,SW_WKUP,?..." group.long 0x130++0x03 line.long 0x00 "CM_PER_OCPWP_CLKCTRL,CM_PER_OCPWP_CLKCTRL Register" rbitfld.long 0x00 18. "STBYST,Module standby status" "Disabled,Enabled" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" newline bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x140++0x13 line.long 0x00 "CM_PER_PRU_ICSS_CLKSTCTRL,CM_PER_PRU_ICSS_CLKSTCTRL Register" rbitfld.long 0x00 6. "CLKACTIVITY_PRU_ICSS_UART_GCLK,This field indicates the state of thePRU-ICSS UART clock in the domain" "Not active,Active" rbitfld.long 0x00 5. "CLKACTIVITY_PRU_ICSS_IEP_GCLK,This field indicates the state of the PRU-ICSS IEP clock in the domain" "Not active,Active" newline rbitfld.long 0x00 4. "CLKACTIVITY_PRU_ICSS_OCP_GCLK,This field indicates the state of the PRU-ICSS OCP clock in the domain" "Not active,Active" bitfld.long 0x00 0.--1. "CLKTRCTRL,Controls the clock state transition of the PRU-ICSS OCP clock domain" "NO_SLEEK,SW_SLEEP,SW_WKUP,?..." line.long 0x04 "CM_PER_CPSW_CLKSTCTRL,CM_PER_CPSW_CLKSTCTRL Register" rbitfld.long 0x04 4. "CLKACTIVITY_CPSW_125MHZ_GCLK,This field indicates the state of the CPSW 125 MHz OCP clock in the domain" "Not active,Active" bitfld.long 0x04 0.--1. "CLKTRCTRL,Controls the clock state transition of the CPSW OCP clock domain" "NO_SLEEK,SW_SLEEP,SW_WKUP,?..." line.long 0x08 "CM_PER_LCDC_CLKSTCTRL,CM_PER_LCDC_CLKSTCTRL Register" rbitfld.long 0x08 5. "CLKACTIVITY_LCDC_L4_OCP_GCLK,This field indicates the state of the LCDC L4 OCP clock in the domain" "Not active,Active" rbitfld.long 0x08 4. "CLKACTIVITY_LCDC_L3_OCP_GCLK,This field indicates the state of the LCDC L3 OCP clock in the domain" "Not active,Active" newline bitfld.long 0x08 0.--1. "CLKTRCTRL,Controls the clock state transition of the CPSW OCP clock domain" "NO_SLEEK,SW_SLEEP,SW_WKUP,?..." line.long 0x0C "CM_PER_CLKDIV32K_CLKCTRL,CM_PER_CLKDIV32K_CLKCTRL Register" rbitfld.long 0x0C 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x0C 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." line.long 0x10 "CM_PER_CLK_24MHZ_CLKSTCTRL,CM_PER_CLK_24MHZ_CLKSTCTRL Register" rbitfld.long 0x10 4. "CLKACTIVITY_CLK_24MHZ_GCLK,This field indicates the state of the 24MHz clock in the domain" "Not active,Active" bitfld.long 0x10 0.--1. "CLKTRCTRL,Controls the clock state transition of the 24MHz clock domain" "NO_SLEEK,SW_SLEEP,SW_WKUP,?..." tree.end tree "CM_WKUP" base ad:0x44E00400 group.long 0x00++0x0B line.long 0x00 "CM_WKUP_CLKSTCTRL,Domain Power State Transition Register" rbitfld.long 0x00 14. "CLKACTIVITY_ADC_FCLK,This field indicates the state of the ADC clock in the domain" "Not active,Active" rbitfld.long 0x00 13. "CLKACTIVITY_TIMER1_GCLK,This field indicates the state of the TIMER1 clock in the domain" "Not active,Active" newline rbitfld.long 0x00 12. "CLKACTIVITY_UART0_GCLK,This field indicates the state of the UART0 clock in the domain" "Not active,Active" rbitfld.long 0x00 11. "CLKACTIVITY_I2C0_GCLK,This field indicates the state of the I2C0 clock in the domain" "Not active,Active" newline rbitfld.long 0x00 10. "CLKACTIVITY_TIMER0_GCLK,This field indicates the state of the WKUPTIMER_GCLK clock in the domain" "Not active,Active" rbitfld.long 0x00 8. "CLKACTIVITY_GPIO0_GDBCLK,This field indicates the state of the WKUPGPIO_DBGICLK clock in the domain" "Not active,Active" newline rbitfld.long 0x00 4. "CLKACTIVITY_WDT1_GCLK,This field indicates the state of the WDT1_GCLK clock in the domain" "Not active,Active" rbitfld.long 0x00 3. "CLKACTIVITY_SR_SYSCLK,This field indicates the state of the SMARTREFGLEX SYSCLK clock in the domain" "Not active,Active" newline rbitfld.long 0x00 2. "CLKACTIVITY_L4_WKUP_GCLK,This field indicates the state of the L4_WKUP clock in the domain" "Not active,Active" bitfld.long 0x00 0.--1. "CLKTRCTRL,Controls the clock state transition of the always on clock domain" "NO_SLEEP,SW_SLEEP,SW_WKUP,?..." line.long 0x04 "CM_WKUP_CONTROL_CLKCTRL,Control Module Clocks Register" rbitfld.long 0x04 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x04 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." line.long 0x08 "CM_WKUP_GPIO0_CLKCTRL,GPIO0 Clocks Register" bitfld.long 0x08 18. "OPTFCLKEN_GPIO0_GDBCLK,Optional functional clock control" "Disabled,Enabled" rbitfld.long 0x08 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" newline bitfld.long 0x08 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." rgroup.long 0x0C++0x03 line.long 0x00 "CM_WKUP_L4WKUP_CLKCTRL,L4WKUP Clocks Register" bitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0x10++0x0B line.long 0x00 "CM_WKUP_TIMER0_CLKCTRL,TIMER0 Clocks Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." line.long 0x04 "CM_WKUP_DEBUGSS_CLKCTRL,DEBUGSS Clocks Register" bitfld.long 0x04 30. "OPTCLK_DEBUG_CLKA,Optional functional clock control" "Disabled,Enabled" bitfld.long 0x04 27.--29. "STM_PMD_CLKDIVSEL,TPIU trace clock divider control" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 24.--26. "TRC_PMD_CLKDIVSEL,TPIU trace clock divider control" "0,1,2,3,4,5,6,7" bitfld.long 0x04 22.--23. "STM_PMD_CLKSEL,DEBUGSS STM trace clock select" "0,1,2,3" newline bitfld.long 0x04 20.--21. "TRC_PMD_CLKSEL,DEBUGSS TPIU trace clock select" "0,1,2,3" bitfld.long 0x04 19. "OPTFCLKEN_DBGSYSCLK,Optional functional clock control" "Disabled,Enabled" newline rbitfld.long 0x04 18. "STBYST,Module standby status" "Functional,Standby" rbitfld.long 0x04 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" newline bitfld.long 0x04 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." line.long 0x08 "CM_L3_AON_CLKSTCTRL,Domain Power State Transition Register" rbitfld.long 0x08 4. "CLKACTIVITY_DEBUG_CLKA,This field indicates the state of the debugss CLKA clock in the domain" "Not active,Active" rbitfld.long 0x08 3. "CLKACTIVITY_L3_AON_GCLK,This field indicates the state of the L3_AON clock in the domain" "Not active,Active" newline rbitfld.long 0x08 2. "CLKACTIVITY_DBGSYSCLK,This field indicates the state of the debugss sysclk clock in the domain" "Not active,Active" bitfld.long 0x08 0.--1. "CLKTRCTRL,Controls the clock state transition of the L3 AON clock domain" "NO_SLEEP,SW_SLEEP,SW_WKUP,?..." group.long 0x1C++0x03 line.long 0x00 "CM_AUTOIDLE_DPLL_MPU,Control Over The DPLL Activity Register" bitfld.long 0x00 0.--2. "AUTO_DPLL_MODE,Automatic control over the DPLL activity" "0,1,2,3,4,5,6,7" rgroup.long (0x1C+0x04)++0x03 line.long 0x00 "CM_IDLEST_DPLL_MPU,Master Clock Activity Register" bitfld.long 0x00 8. "ST_MN_BYPASS,DPLL MN_BYPASS status" "NO_MNBYPASS,MN_BYPASS" bitfld.long 0x00 0. "ST_DPLL_CLK,DPLL clock activity" "DPLL_UNLOCKED,DPLL_LOCKED" group.long (0x1C+0x08)++0x0B line.long 0x00 "CM_SSC_DELTAMSTEP_DPLL_MPU,Deltamstep Parameter For Spread Spectrum Locking Technique Deltamstep Register" bitfld.long 0x00 18.--19. "DELTAMSTEP_INTEGER,Integer part for deltam coefficient" "0,1,2,3" hexmask.long.tbyte 0x00 0.--17. 1. "DELTAMSTEP_FRACTION,Fractional part for deltam coefficient" line.long 0x04 "CM_SSC_MODFREQDIV_DPLL_MPU,The Modulation Frequency Control Register" bitfld.long 0x04 8.--10. "MODFREQDIV_EXPONENT,Set the exponent component of MODFREQDIV factor" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x04 0.--6. 1. "MODFREQDIV_MANTISSA,Set the mantissa component of MODFREQDIV factor" line.long 0x08 "CM_CLKSEL_DPLL_MPU,DPLL Control Register" bitfld.long 0x08 23. "DPLL_BYP_CLKSEL,Selects CLKINP or CLKINPULOW as bypass clock" "CLKINP,CLKINPULOW" hexmask.long.word 0x08 8.--18. 1. "DPLL_MULT,DPLL multiplier factor (2 to 2047)" hexmask.long.byte 0x08 0.--6. 1. "DPLL_DIV,DPLL divider factor (0 to 127) (Equal to input N of dpllactual division factor is N+1)" group.long 0x30++0x03 line.long 0x00 "CM_AUTOIDLE_DPLL_DDR,Control Over The DPLL Activity Register" bitfld.long 0x00 0.--2. "AUTO_DPLL_MODE,Automatic control over the DPLL activity" "0,1,2,3,4,5,6,7" rgroup.long (0x30+0x04)++0x03 line.long 0x00 "CM_IDLEST_DPLL_DDR,Master Clock Activity Register" bitfld.long 0x00 8. "ST_MN_BYPASS,DPLL MN_BYPASS status" "NO_MNBYPASS,MN_BYPASS" bitfld.long 0x00 0. "ST_DPLL_CLK,DPLL clock activity" "DPLL_UNLOCKED,DPLL_LOCKED" group.long (0x30+0x08)++0x0B line.long 0x00 "CM_SSC_DELTAMSTEP_DPLL_DDR,Deltamstep Parameter For Spread Spectrum Locking Technique Deltamstep Register" bitfld.long 0x00 18.--19. "DELTAMSTEP_INTEGER,Integer part for deltam coefficient" "0,1,2,3" hexmask.long.tbyte 0x00 0.--17. 1. "DELTAMSTEP_FRACTION,Fractional part for deltam coefficient" line.long 0x04 "CM_SSC_MODFREQDIV_DPLL_DDR,The Modulation Frequency Control Register" bitfld.long 0x04 8.--10. "MODFREQDIV_EXPONENT,Set the exponent component of MODFREQDIV factor" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x04 0.--6. 1. "MODFREQDIV_MANTISSA,Set the mantissa component of MODFREQDIV factor" line.long 0x08 "CM_CLKSEL_DPLL_DDR,DPLL Control Register" bitfld.long 0x08 23. "DPLL_BYP_CLKSEL,Selects CLKINP or CLKINPULOW as bypass clock" "CLKINP,CLKINPULOW" hexmask.long.word 0x08 8.--18. 1. "DPLL_MULT,DPLL multiplier factor (2 to 2047)" hexmask.long.byte 0x08 0.--6. 1. "DPLL_DIV,DPLL divider factor (0 to 127) (Equal to input N of dpllactual division factor is N+1)" group.long 0x44++0x03 line.long 0x00 "CM_AUTOIDLE_DPLL_DISP,Control Over The DPLL Activity Register" bitfld.long 0x00 0.--2. "AUTO_DPLL_MODE,Automatic control over the DPLL activity" "0,1,2,3,4,5,6,7" rgroup.long (0x44+0x04)++0x03 line.long 0x00 "CM_IDLEST_DPLL_DISP,Master Clock Activity Register" bitfld.long 0x00 8. "ST_MN_BYPASS,DPLL MN_BYPASS status" "NO_MNBYPASS,MN_BYPASS" bitfld.long 0x00 0. "ST_DPLL_CLK,DPLL clock activity" "DPLL_UNLOCKED,DPLL_LOCKED" group.long (0x44+0x08)++0x0B line.long 0x00 "CM_SSC_DELTAMSTEP_DPLL_DISP,Deltamstep Parameter For Spread Spectrum Locking Technique Deltamstep Register" bitfld.long 0x00 18.--19. "DELTAMSTEP_INTEGER,Integer part for deltam coefficient" "0,1,2,3" hexmask.long.tbyte 0x00 0.--17. 1. "DELTAMSTEP_FRACTION,Fractional part for deltam coefficient" line.long 0x04 "CM_SSC_MODFREQDIV_DPLL_DISP,The Modulation Frequency Control Register" bitfld.long 0x04 8.--10. "MODFREQDIV_EXPONENT,Set the exponent component of MODFREQDIV factor" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x04 0.--6. 1. "MODFREQDIV_MANTISSA,Set the mantissa component of MODFREQDIV factor" line.long 0x08 "CM_CLKSEL_DPLL_DISP,DPLL Control Register" bitfld.long 0x08 23. "DPLL_BYP_CLKSEL,Selects CLKINP or CLKINPULOW as bypass clock" "CLKINP,CLKINPULOW" hexmask.long.word 0x08 8.--18. 1. "DPLL_MULT,DPLL multiplier factor (2 to 2047)" hexmask.long.byte 0x08 0.--6. 1. "DPLL_DIV,DPLL divider factor (0 to 127) (Equal to input N of dpllactual division factor is N+1)" group.long 0x58++0x03 line.long 0x00 "CM_AUTOIDLE_DPLL_CORE,Control Over The DPLL Activity Register" bitfld.long 0x00 0.--2. "AUTO_DPLL_MODE,Automatic control over the DPLL activity" "0,1,2,3,4,5,6,7" rgroup.long (0x58+0x04)++0x03 line.long 0x00 "CM_IDLEST_DPLL_CORE,Master Clock Activity Register" bitfld.long 0x00 8. "ST_MN_BYPASS,DPLL MN_BYPASS status" "NO_MNBYPASS,MN_BYPASS" bitfld.long 0x00 0. "ST_DPLL_CLK,DPLL clock activity" "DPLL_UNLOCKED,DPLL_LOCKED" group.long (0x58+0x08)++0x0B line.long 0x00 "CM_SSC_DELTAMSTEP_DPLL_CORE,Deltamstep Parameter For Spread Spectrum Locking Technique Deltamstep Register" bitfld.long 0x00 18.--19. "DELTAMSTEP_INTEGER,Integer part for deltam coefficient" "0,1,2,3" hexmask.long.tbyte 0x00 0.--17. 1. "DELTAMSTEP_FRACTION,Fractional part for deltam coefficient" line.long 0x04 "CM_SSC_MODFREQDIV_DPLL_CORE,The Modulation Frequency Control Register" bitfld.long 0x04 8.--10. "MODFREQDIV_EXPONENT,Set the exponent component of MODFREQDIV factor" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x04 0.--6. 1. "MODFREQDIV_MANTISSA,Set the mantissa component of MODFREQDIV factor" line.long 0x08 "CM_CLKSEL_DPLL_CORE,DPLL Control Register" hexmask.long.word 0x08 8.--18. 1. "DPLL_MULT,DPLL multiplier factor (2 to 2047)" hexmask.long.byte 0x08 0.--6. 1. "DPLL_DIV,DPLL divider factor (0 to 127) (Equal to input N of dpllactual division factor is N+1)" group.long 0x74++0x1B line.long 0x00 "CM_SSC_DELTAMSTEP_DPLL_PER,Deltamstep Parameter For Spread Spectrum Clocking Register" bitfld.long 0x00 18.--19. "DELTAMSTEP_INTEGER,Integer part for deltam coefficient" "0,1,2,3" hexmask.long.tbyte 0x00 0.--17. 1. "DELTAMSTEP_FRACTION,Fractional part for deltam coefficient" line.long 0x04 "CM_SSC_MODFREQDIV_DPLL_PER,Modulation Frequency Control Register" bitfld.long 0x04 8.--10. "MODFREQDIV_EXPONENT,Set the exponent component of MODFREQDIV factor" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x04 0.--6. 1. "MODFREQDIV_MANTISSA,Set the mantissa component of MODFREQDIV factor" line.long 0x08 "CM_CLKDCOLDO_DPLL_PER,Digitally Controlled Oscillator Output Control Register" bitfld.long 0x08 12. "DPLL_CLKDCOLDO_PWDN,Automatic power down for CLKDCOLDO o/p when it is gated" "ALWAYS_ACTIVE,AUTO_PWDN" rbitfld.long 0x08 9. "ST_DPLL_CLKDCOLDO,DPLL CLKDCOLDO status" "CLK_ENABLED,CLK_GATED" newline bitfld.long 0x08 8. "DPLL_CLKDCOLDO_GATE_CTRL,Control gating of DPLL CLKDCOLDO" "CLK_AUTOGATE,CLK_ENABLE" line.long 0x0C "CM_DIV_M4_DPLL_CORE,CLKOUT1 O/p Of The HSDIVIDER Control Register" bitfld.long 0x0C 12. "HSDIVIDER_CLKOUT1_PWDN,Automatic power down for HSDIVIDER M4 divider and hence CLKOUT1 output when the o/p clock is gated" "ALWAYS_ACTIVE,AUTO_PWDN" rbitfld.long 0x0C 9. "ST_HSDIVIDER_CLKOUT1,HSDIVIDER CLKOUT1 status" "Gated,Enabled" newline bitfld.long 0x0C 8. "HSDIVIDER_CLKOUT1_GATE_CTRL,Control gating of HSDIVIDER CLKOUT1" "Gated,Enabled" rbitfld.long 0x0C 5. "HSDIVIDER_CLKOUT1_DIVCHACK,Toggle on this status bit after changing HSDIVIDER_CLKOUT1_DIV indicates that the change in divider value has taken effect" "0,1" newline bitfld.long 0x0C 0.--4. "HSDIVIDER_CLKOUT1_DIV,DPLL post-divider factor, M4, for internal clock generation" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x10 "CM_DIV_M5_DPLL_CORE,CLKOUT2 O/p Of The HSDIVIDE Control Register" bitfld.long 0x10 12. "HSDIVIDER_CLKOUT2_PWDN,Automatic power down for HSDIVIDER M5 divider and hence CLKOUT2 output when the o/p clock is gated" "ALWAYS_ACTIVE,AUTO_PWDN" rbitfld.long 0x10 9. "ST_HSDIVIDER_CLKOUT2,HSDIVIDER CLKOUT2 status" "CLK_ENABLED,CLK_GATED" newline bitfld.long 0x10 8. "HSDIVIDER_CLKOUT2_GATE_CTRL,Control gating of HSDIVIDER CLKOUT2" "CLK_AUTOGATE,CLK_ENABLE" rbitfld.long 0x10 5. "HSDIVIDER_CLKOUT2_DIVCHACK,Toggle on this status bit after changing HSDIVIDER_CLKOUT2_DIV indicates that the change in divider value has taken effect" "0,1" newline bitfld.long 0x10 0.--4. "HSDIVIDER_CLKOUT2_DIV,DPLL post-divider factor, M5, for internal clock generation" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "CM_CLKMODE_DPLL_MPU,DPLL Modes Control Register" bitfld.long 0x14 15. "DPLL_SSC_TYPE,Select triangular spread spectrum clocking" "Selected,?..." bitfld.long 0x14 14. "DPLL_SSC_DOWNSPREAD,Control if only low frequency spread is required" "FULL_SPREAD,LOW_SPREAD" newline rbitfld.long 0x14 13. "DPLL_SSC_ACK,Acknowledgement from the DPLL regarding start and stop of spread spectrum clocking feature" "Disabled,Enabled" bitfld.long 0x14 12. "DPLL_SSC_EN,Enable or disable spread spectrum clocking" "Disabled,Enabled" newline bitfld.long 0x14 11. "DPLL_REGM4XEN,Enable the REGM4XEN mode of the DPLL" "Disabled,Enabled" bitfld.long 0x14 10. "DPLL_LPMODE_EN,Set the DPLL in low power mode" "Disabled,Enabled" newline bitfld.long 0x14 9. "DPLL_RELOCK_RAMP_EN,Enale DPLL relock ramp" "Disabled,Enabled" bitfld.long 0x14 8. "DPLL_DRIFTGUARD_EN,This bit allows to enable or disable the automatic recalibration feature of the DPLL" "Disabled,Enabled" newline bitfld.long 0x14 5.--7. "DPLL_RAMP_RATE,Selects the time in terms of DPLL refclks spent at each stage of the clock ramping process" "Refclkx2,Refclkx4,Refclkx8,Refclkx16,Refclkx32,Refclkx64,Refclkx128,Refclkx512" bitfld.long 0x14 3.--4. "DPLL_RAMP_LEVEL,The DPLL provides an output clock frequency ramping feature when switching from bypass clock to normal clock during lock and re-lock" "Disabled,RAMP_ALGO1,RAMP_ALGO2,?..." newline bitfld.long 0x14 0.--2. "DPLL_EN,DPLL control" ",,,,DPLL_MN_BYP_MODE,DPLL_LP_BYP_MODE,DPLL_FR_BYP_MODE,DPLL_LOCK_MODE" line.long 0x18 "CM_CLKMODE_DPLL_PER,DPLL Modes Control Register" bitfld.long 0x18 15. "DPLL_SSC_TYPE,Select triangular spread spectrum clocking" "Selected,?..." bitfld.long 0x18 14. "DPLL_SSC_DOWNSPREAD,Control if only low frequency spread is required" "FULL_SPREAD,LOW_SPREAD" newline rbitfld.long 0x18 13. "DPLL_SSC_ACK,Acknowledgement from the DPLL regarding start and stop of spread spectrum clocking feature" "Disabled,Enabled" bitfld.long 0x18 12. "DPLL_EN,Enable or disable spread spectrum clocking" "Disabled,Enabled" newline bitfld.long 0x18 0.--2. "DPLL_EN,DPLL control" ",DPLL_LP_STP_MODE,,,DPLL_MN_BYP_MODE,DPLL_LP_BYP_MODE,,DPLL_LOCK_MODE" group.long 0x90++0x03 line.long 0x00 "CM_CLKMODE_DPLL_CORE,DPLL Modes Control Register" bitfld.long 0x00 15. "DPLL_SSC_TYPE,Select triangular spread spectrum clocking" "Selected,?..." bitfld.long 0x00 14. "DPLL_SSC_DOWNSPREAD,Control if only low frequency spread is required" "FULL_SPREAD,LOW_SPREAD" newline rbitfld.long 0x00 13. "DPLL_SSC_ACK,Acknowledgement from the DPLL regarding start and stop of spread spectrum clocking feature" "Disabled,Enabled" bitfld.long 0x00 12. "DPLL_SSC_EN,Enable or disable spread spectrum clocking" "Disabled,Enabled" newline bitfld.long 0x00 11. "DPLL_REGM4XEN,Enable the REGM4XEN mode of the DPLL" "Disabled,Enabled" bitfld.long 0x00 10. "DPLL_LPMODE_EN,Set the DPLL in low power mode" "Disabled,Enabled" newline bitfld.long 0x00 9. "DPLL_RELOCK_RAMP_EN,Enale DPLL relock ramp" "Disabled,Enabled" bitfld.long 0x00 8. "DPLL_DRIFTGUARD_EN,This bit allows to enable or disable the automatic recalibration feature of the DPLL" "Disabled,Enabled" newline bitfld.long 0x00 5.--7. "DPLL_RAMP_RATE,Selects the time in terms of DPLL refclks spent at each stage of the clock ramping process" "Refclkx2,Refclkx4,Refclkx8,Refclkx16,Refclkx32,Refclkx64,Refclkx128,Refclkx512" bitfld.long 0x00 3.--4. "DPLL_RAMP_LEVEL,The DPLL provides an output clock frequency ramping feature when switching from bypass clock to normal clock during lock and re-lock" "Disabled,RAMP_ALGO1,RAMP_ALGO2,?..." newline bitfld.long 0x00 0.--2. "DPLL_EN,DPLL control" ",,,,DPLL_MN_BYP_MODE,DPLL_LP_BYP_MODE,DPLL_FR_BYP_MODE,DPLL_LOCK_MODE" group.long 0x94++0x03 line.long 0x00 "CM_CLKMODE_DPLL_DDR,DPLL Modes Control Register" bitfld.long 0x00 15. "DPLL_SSC_TYPE,Select triangular spread spectrum clocking" "Selected,?..." bitfld.long 0x00 14. "DPLL_SSC_DOWNSPREAD,Control if only low frequency spread is required" "FULL_SPREAD,LOW_SPREAD" newline rbitfld.long 0x00 13. "DPLL_SSC_ACK,Acknowledgement from the DPLL regarding start and stop of spread spectrum clocking feature" "Disabled,Enabled" bitfld.long 0x00 12. "DPLL_SSC_EN,Enable or disable spread spectrum clocking" "Disabled,Enabled" newline bitfld.long 0x00 11. "DPLL_REGM4XEN,Enable the REGM4XEN mode of the DPLL" "Disabled,Enabled" bitfld.long 0x00 10. "DPLL_LPMODE_EN,Set the DPLL in low power mode" "Disabled,Enabled" newline bitfld.long 0x00 9. "DPLL_RELOCK_RAMP_EN,Enale DPLL relock ramp" "Disabled,Enabled" bitfld.long 0x00 8. "DPLL_DRIFTGUARD_EN,This bit allows to enable or disable the automatic recalibration feature of the DPLL" "Disabled,Enabled" newline bitfld.long 0x00 5.--7. "DPLL_RAMP_RATE,Selects the time in terms of DPLL refclks spent at each stage of the clock ramping process" "Refclkx2,Refclkx4,Refclkx8,Refclkx16,Refclkx32,Refclkx64,Refclkx128,Refclkx512" bitfld.long 0x00 3.--4. "DPLL_RAMP_LEVEL,The DPLL provides an output clock frequency ramping feature when switching from bypass clock to normal clock during lock and re-lock" "Disabled,RAMP_ALGO1,RAMP_ALGO2,?..." newline bitfld.long 0x00 0.--2. "DPLL_EN,DPLL control" ",,,,DPLL_MN_BYP_MODE,DPLL_LP_BYP_MODE,DPLL_FR_BYP_MODE,DPLL_LOCK_MODE" group.long 0x98++0x03 line.long 0x00 "CM_CLKMODE_DPLL_DISP,DPLL Modes Control Register" bitfld.long 0x00 15. "DPLL_SSC_TYPE,Select triangular spread spectrum clocking" "Selected,?..." bitfld.long 0x00 14. "DPLL_SSC_DOWNSPREAD,Control if only low frequency spread is required" "FULL_SPREAD,LOW_SPREAD" newline rbitfld.long 0x00 13. "DPLL_SSC_ACK,Acknowledgement from the DPLL regarding start and stop of spread spectrum clocking feature" "Disabled,Enabled" bitfld.long 0x00 12. "DPLL_SSC_EN,Enable or disable spread spectrum clocking" "Disabled,Enabled" newline bitfld.long 0x00 11. "DPLL_REGM4XEN,Enable the REGM4XEN mode of the DPLL" "Disabled,Enabled" bitfld.long 0x00 10. "DPLL_LPMODE_EN,Set the DPLL in low power mode" "Disabled,Enabled" newline bitfld.long 0x00 9. "DPLL_RELOCK_RAMP_EN,Enale DPLL relock ramp" "Disabled,Enabled" bitfld.long 0x00 8. "DPLL_DRIFTGUARD_EN,This bit allows to enable or disable the automatic recalibration feature of the DPLL" "Disabled,Enabled" newline bitfld.long 0x00 5.--7. "DPLL_RAMP_RATE,Selects the time in terms of DPLL refclks spent at each stage of the clock ramping process" "Refclkx2,Refclkx4,Refclkx8,Refclkx16,Refclkx32,Refclkx64,Refclkx128,Refclkx512" bitfld.long 0x00 3.--4. "DPLL_RAMP_LEVEL,The DPLL provides an output clock frequency ramping feature when switching from bypass clock to normal clock during lock and re-lock" "Disabled,RAMP_ALGO1,RAMP_ALGO2,?..." newline bitfld.long 0x00 0.--2. "DPLL_EN,DPLL control" ",,,,DPLL_MN_BYP_MODE,DPLL_LP_BYP_MODE,DPLL_FR_BYP_MODE,DPLL_LOCK_MODE" group.long 0x9C++0x03 line.long 0x00 "CM_CLKSEL_DPLL_PERIPH,DPLL Control Register" hexmask.long.byte 0x00 24.--31. 1. "DPLL_SD_DIV,Sigma-Delta divider select (2-255)" hexmask.long.word 0x00 8.--19. 1. "DPLL_MULT,DPLL multiplier factor (2 to 4095)" newline hexmask.long.byte 0x00 0.--7. 1. "DPLL_DIV,DPLL divider factor (0 to 255) (Equal to input N of DPLL actual division factor is N+1)" group.long 0xA0++0x03 line.long 0x00 "CM_DIV_M2_DPLL_DDR,M2 Divider Of The DPLL Control Register" rbitfld.long 0x00 9. "ST_DPLL_CLKOUT,DPLL CLKOUT status" "CLK_GATED,CLK_ENABLED" bitfld.long 0x00 8. "DPLL_CLKOUT_GATE_CTRL,Control gating of DPLL CLKOUT" "CLK_AUTOGATE,CLK_ENABLE" rbitfld.long 0x00 5. "DPLL_CLKOUT_DIVCHACK,Toggle on this status bit after changing DPLL_CLKOUT_DIV indicates that the change in divider value has taken effect" "0,1" newline bitfld.long 0x00 0.--4. "DPLL_CLKOUT_DIV,DPLL M2 post-divider factor (1 to 31)" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0xA4++0x03 line.long 0x00 "CM_DIV_M2_DPLL_DISP,M2 Divider Of The DPLL Control Register" rbitfld.long 0x00 9. "ST_DPLL_CLKOUT,DPLL CLKOUT status" "CLK_GATED,CLK_ENABLED" bitfld.long 0x00 8. "DPLL_CLKOUT_GATE_CTRL,Control gating of DPLL CLKOUT" "CLK_AUTOGATE,CLK_ENABLE" rbitfld.long 0x00 5. "DPLL_CLKOUT_DIVCHACK,Toggle on this status bit after changing DPLL_CLKOUT_DIV indicates that the change in divider value has taken effect" "0,1" newline bitfld.long 0x00 0.--4. "DPLL_CLKOUT_DIV,DPLL M2 post-divider factor (1 to 31)" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0xA8++0x03 line.long 0x00 "CM_DIV_M2_DPLL_MPU,M2 Divider Of The DPLL Control Register" rbitfld.long 0x00 9. "ST_DPLL_CLKOUT,DPLL CLKOUT status" "CLK_GATED,CLK_ENABLED" bitfld.long 0x00 8. "DPLL_CLKOUT_GATE_CTRL,Control gating of DPLL CLKOUT" "CLK_AUTOGATE,CLK_ENABLE" rbitfld.long 0x00 5. "DPLL_CLKOUT_DIVCHACK,Toggle on this status bit after changing DPLL_CLKOUT_DIV indicates that the change in divider value has taken effect" "0,1" newline bitfld.long 0x00 0.--4. "DPLL_CLKOUT_DIV,DPLL M2 post-divider factor (1 to 31)" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0xAC++0x03 line.long 0x00 "CM_DIV_M2_DPLL_PER,M2 Divider Of The DPLL Control Register" rbitfld.long 0x00 9. "ST_DPLL_CLKOUT,DPLL CLKOUT status" "CLK_GATED,CLK_ENABLED" bitfld.long 0x00 8. "DPLL_CLKOUT_GATE_CTRL,Control gating of DPLL CLKOUT" "CLK_AUTOGATE,CLK_ENABLE" rbitfld.long 0x00 5. "DPLL_CLKOUT_DIVCHACK,Toggle on this status bit after changing DPLL_CLKOUT_DIV indicates that the change in divider value has taken effect" "0,1" newline bitfld.long 0x00 0.--4. "DPLL_CLKOUT_DIV,DPLL M2 post-divider factor (1 to 31)" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0xB0++0x03 line.long 0x00 "CM_WKUP_WKUP_M3_CLKCTRL,WKUP M3 Clocks Register" bitfld.long 0x00 18. "STBYST,Module standby status" "Functional,Standby" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "0,1,2,3" group.long 0xB4++0x03 line.long 0x00 "CM_WKUP_UART0_CLKCTRL,UART0 Clocks Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" ",Disabled,,Enabled" group.long 0xB8++0x03 line.long 0x00 "CM_WKUP_I2C0_CLKCTRL,I2C0 Clocks Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" ",Disabled,,Enabled" group.long 0xBC++0x03 line.long 0x00 "CM_WKUP_ADC_TSC_CLKCTRL,ADC_TSC Clocks Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" ",Disabled,,Enabled" group.long 0xC0++0x03 line.long 0x00 "CM_WKUP_SMARTREFLEX0_CLKCTRL,SMARTREFLEX0 Clocks Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" ",Disabled,,Enabled" group.long 0xC4++0x03 line.long 0x00 "CM_WKUP_TIMER1_CLKCTRL,TIMER1 Clocks Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" ",Disabled,,Enabled" group.long 0xC8++0x03 line.long 0x00 "CM_WKUP_SMARTREFLEX1_CLKCTRL,SMARTREFLEX1 Clocks Register" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" ",Disabled,,Enabled" rgroup.long 0xCC++0x03 line.long 0x00 "CM_L4_WKUP_AON_CLKSTCTRL,This Register Enables The Domain Power State Transition" bitfld.long 0x00 2. "CLKACTIVITY_L4_WKUP_AON_GCLK,This field indicates the state of the L4_WKUP clock in the domain" "Not active,Active" bitfld.long 0x00 0.--1. "CLKTRCTRL,Controls the clock state transition of the always on L4 clock domain" "NO_SLEEP,SW_SLEEP,SW_WKUP,?..." group.long 0xD4++0x07 line.long 0x00 "CM_WKUP_WDT1_CLKCTRL,This Register Manages The WDT1 Clocks" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" ",Disabled,,Enabled" line.long 0x04 "CM_DIV_M6_DPLL_CORE,This Register Provides Controls Over The CLKOUT3 O/p Of The HSDIVIDER" bitfld.long 0x04 12. "HSDIVIDER_CLKOUT3_PWDN,Automatic power down for HSDIVIDER M6 divider and henceclkout3 output when the o/p clock is gated" "ALWAYS_ACTIVE,AUTO_PWDN" rbitfld.long 0x04 9. "ST_HSDIVIDER_CLKOUT3,HSDIVIDER CLKOUT3 status" "CLK_ENABLED,CLK_GATED" newline bitfld.long 0x04 8. "HSDIVIDER_CLKOUT3_GATE_CTRL,Control gating of HSDIVIDER CLKOUT3" "CLK_AUTOGATE,CLK_ENABLE" rbitfld.long 0x04 5. "HSDIVIDER_CLKOUT3_DIVCHACK,Toggle on this status bit after changing HSDIVIDER_CLKOUT3_DIV indicates that the change in divider value has taken effect" "0,1" newline bitfld.long 0x04 0.--4. "HSDIVIDER_CLKOUT3_DIV,DPLL post-divider factor, M6, for internal clock generation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end tree "CM_DPLL" base ad:0x44E00500 group.long 0x4++0x03 line.long 0x00 "CLKSEL_TIMER7_CLK,Selects the Mux select line for TIMER7 clock" bitfld.long 0x00 0.--1. "CLKSEL,Selects the Mux select line for TIMER7 clock" "TCLKIN,CLK_M_OSC,CLK_32KHZ,?..." group.long 0x8++0x03 line.long 0x00 "CLKSEL_TIMER2_CLK,Selects the Mux select line for TIMER2 clock" bitfld.long 0x00 0.--1. "CLKSEL,Selects the Mux select line for TIMER2 clock" "TCLKIN,CLK_M_OSC,CLK_32KHZ,?..." group.long 0xC++0x03 line.long 0x00 "CLKSEL_TIMER3_CLK,Selects the Mux select line for TIMER3 clock" bitfld.long 0x00 0.--1. "CLKSEL,Selects the Mux select line for TIMER3 clock" "TCLKIN,CLK_M_OSC,CLK_32KHZ,?..." group.long 0x10++0x03 line.long 0x00 "CLKSEL_TIMER4_CLK,Selects the Mux select line for TIMER4 clock" bitfld.long 0x00 0.--1. "CLKSEL,Selects the Mux select line for TIMER4 clock" "TCLKIN,CLK_M_OSC,CLK_32KHZ,?..." group.long 0x14++0x0F line.long 0x00 "CM_MAC_CLKSEL,Selects the clock divide ration for MII clock" bitfld.long 0x00 2. "MII_CLK_SEL,MII Clock Divider Selection" "/2,/5" line.long 0x04 "CLKSEL_TIMER5_CLK,Selects the Mux select line for TIMER5 clock" bitfld.long 0x04 0.--1. "CLKSEL,Selects the Mux select line for TIMER5 clock" "TCLKIN,CLK_M_OSC,CLK_32KHZ,?..." line.long 0x08 "CLKSEL_TIMER6_CLK,Selects the Mux select line for TIMER6 clock" bitfld.long 0x08 0.--1. "CLKSEL,Selects the Mux select line for TIMER6 clock" "TCLKIN,CLK_M_OSC,CLK_32KHZ,?..." line.long 0x0C "CM_CPTS_RFT_CLKSEL,Selects the Mux select line for CPTS RFT clock" bitfld.long 0x0C 0. "CLKSEL,Selects the Mux select line for cpgmac rft clock" "CORE_CLKOUTM5,CORE_CLKOUTM4" group.long 0x28++0x17 line.long 0x00 "CLKSEL_TIMER1MS_CLK,Selects the Mux select line for TIMER1 clock" bitfld.long 0x00 0.--2. "CLKSEL,Selects the Mux select line for DMTIMER_1MS clock" "CLK_M_OSC,CLK_32KHZ,TCLKIN,CLK_RC32K,CLK_32768 from 32KHz Crystal Osc,?..." line.long 0x04 "CLKSEL_GFX_FCLK,Selects the divider value for GFX clock" bitfld.long 0x04 1. "CLKSEL_GFX_FCLK,Selects the clock on gfx fclk" "CORE PLL,PER PLL" bitfld.long 0x04 0. "CLKDIV_SEL_GFX_FCLK,Selects the divider value on gfx fclk" "L3 Clock or 192MHz ,L3 clock/2 or 192Mhz/2" line.long 0x08 "CLKSEL_PRU_ICSS_OCP_CLK,Controls the Mux select line for PRU-ICSS OCP clock" bitfld.long 0x08 0. "CLKSEL,Controls Mux Select of PRU-ICSS OCP clock mux" "L3F,DISP DPLL" line.long 0x0C "CLKSEL_LCDC_PIXEL_CLK,Controls the Mux select line for LCDC PIXEL clock" bitfld.long 0x0C 0.--1. "CLKSEL,Controls the Mux Select of LCDC PIXEL clock" "DISP PLL CLKOUTM2,CORE PLL CLKOUTM5,PER PLL CLKOUTM2,?..." line.long 0x10 "CLKSEL_WDT1_CLK,Selects the Mux select line for Watchdog1 clock" bitfld.long 0x10 0. "CLKSEL,Selects the 32KHZ Mux select line for WDT1 clock" "RC Oscillator,32K Clock divider" line.long 0x14 "CLKSEL_GPIO0_DBCLK,Selects the Mux select line for GPIO0 debounce clock" bitfld.long 0x14 0.--1. "CLKSEL,Selects the 32KHZ Mux select line for GPIO0 debounce clock" "RC Oscillator,32K Crystal Oscillator,Clock Divider,?..." tree.end tree "CM_MPU" base ad:0x44E00600 group.long 0x00++0x07 line.long 0x00 "CM_MPU_CLKSTCTRL,This register enables the domain power state transition" rbitfld.long 0x00 2. "CLKACTIVITY_MPU_CLK,This field indicates the state of the MPU Clock" "Not active,Active" bitfld.long 0x00 0.--1. "CLKTRCTRL,Controls the clock state transition of the MPU clock domains" "NO_SLEEP,SW_SLEEP,SW_WKUP,?..." line.long 0x04 "CM_MPU_MPU_CLKCTRL,This register manages the MPU clocks" rbitfld.long 0x04 18. "STBYST,Module standby status" "Functional,Standby" rbitfld.long 0x04 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x04 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." tree.end tree "CM_DEVICE" base ad:0x44E00700 group.long 0x00++0x03 line.long 0x00 "CM_CLKOUT_CTRL,This register provides the control over CLKOUT2 output" bitfld.long 0x00 7. "CLKOUT2EN,This bit controls the external clock activity" "Disabled,Enabled" bitfld.long 0x00 3.--5. "CLKOUT2DIV,This field controls the external clock divison factor" "/1,/2,/3,/4,/5,/6,/7,?..." bitfld.long 0x00 0.--2. "CLKOUT2SOURCE,This field selects the external output clock source" "32KHz Oscillator O/P,L3 Clock,DDR PHY Clock,PER PLL 192Mhz clock,LCD Pixel Clock,?..." tree.end tree "CM_RTC" base ad:0x44E00800 group.long 0x00++0x07 line.long 0x00 "CM_RTC_RTC_CLKCTRL,This register manages the RTC clocks" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." line.long 0x04 "CM_RTC_CLKSTCTRL,This register enables the domain power state transition" rbitfld.long 0x04 9. "CLKACTIVITY_RTC_32KCLK,This field indicates the state of the 32K RTC clock in the domain" "Not active,Active" rbitfld.long 0x04 8. "CLKACTIVITY_L4_RTC_GCLK,This field indicates the state of the L4 RTC clock in the domain" "Not active,Active" bitfld.long 0x04 0.--1. "CLKTRCTRL,Controls the clock state transition of the RTC clock domains" "NO_SLEEP,SW_SLEEP,SW_WKUP,?..." tree.end tree "CM_GFX" base ad:0x44E00900 group.long 0x00++0x07 line.long 0x00 "CM_GFX_L3_CLKSTCTRL,This register enables the domain power state transition" rbitfld.long 0x00 9. "CLKACTIVITY_GFX_FCLK,This field indicates the state of the GFX_GCLK clock in the domain" "Not active,Active" rbitfld.long 0x00 8. "CLKACTIVITY_GFX_L3_GCLK,This field indicates the state of the GFX_L3_GCLK clock in the domain" "Not active,Active" bitfld.long 0x00 0.--1. "CLKTRCTRL,Controls the clock state transition of the GFX clock domain in GFX power domain" "NO_SLEEP,SW_SLEEP,SW_WKUP,?..." line.long 0x04 "CM_GFX_GFX_CLKCTRL,This register manages the GFX clocks" rbitfld.long 0x04 18. "STBYST,Module standby status" "Functional,Standby" rbitfld.long 0x04 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x04 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." group.long 0xC0++0x0B line.long 0x00 "CM_GFX_L4LS_GFX_CLKSTCTRL,This register enables the domain power state transition" rbitfld.long 0x00 8. "CLKACTIVITY_L4LS_GFX_GCLK,This field indicates the state of the L4_LS clock in the domain" "Not active,Active" bitfld.long 0x00 0.--1. "CLKTRCTRL,Controls the clock state transition of the L4LS clock domain in GFX power domain" "NO_SLEEP,SW_SLEEP,SW_WKUP,?..." line.long 0x04 "CM_GFX_MMUCFG_CLKCTRL,This register manages the MMU CFG clocks" rbitfld.long 0x04 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x04 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." line.long 0x08 "CM_GFX_MMUDATA_CLKCTRL,This register manages the MMU clocks" rbitfld.long 0x08 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x08 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." tree.end tree "CM_CEFUSE" base ad:0x44E00A00 group.long 0x00++0x03 line.long 0x00 "CM_CEFUSE_CLKSTCTRL,This register enables the domain power state transition" rbitfld.long 0x00 9. "CLKACTIVITY_CUST_EFUSE_SYS_CLK,This field indicates the state of the GFX_GCLK clock in the domain" "Not active,Active" rbitfld.long 0x00 8. "CLKACTIVITY_L4_CEFUSE_GICLK,This field indicates the state of the L4_CEFUSE_GCLK clock input of the domain" "Not active,Active" bitfld.long 0x00 0.--1. "CLKTRCTRL,Controls the clock state transition of the clock domain in customer efuse power domain" "NO_SLEEP,SW_SLEEP,SW_WKUP,?..." group.long 0x20++0x03 line.long 0x00 "CM_CEFUSE_CEFUSE_CLKCTRL,This register manages the CEFUSE clocks" rbitfld.long 0x00 16.--17. "IDLEST,Module idle status" "Fully functional,Transition,Idle,Disabled" bitfld.long 0x00 0.--1. "MODULEMODE,Control the way mandatory clocks are managed" "Disabled,,Enabled,?..." tree.end tree.end tree "PRM (Port Management Registers)" tree "PRM_IRQ" base ad:0x44E00B00 rgroup.long 0x00++0x03 line.long 0x00 "REVISION_PRM,This Contains The IP Revision Code For The PRCM Register" hexmask.long.byte 0x00 0.--7. 1. "REV,IP revision" group.long 0x04++0x03 line.long 0x00 "PRM_IRQSTATUS_MPU_SET/CLR,MPU Interrupt Events Status Register" setclrfld.long 0x00 15. 0x04 15. 0x04 15. "DPLL_PER_RECAL_ST,Interrupt status for usb dpll recaliberation" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x04 14. "DPLL_DRR_RECAL_ST,Interrupt status for ddr dpll recaliberation" "Disabled,Enabled" setclrfld.long 0x00 13. 0x04 13. 0x04 13. "DPLL_DISP_RECAL_ST,Interrupt status for disp dpll recaliberation" "Disabled,Enabled" newline setclrfld.long 0x00 12. 0x04 12. 0x04 12. "DPLL_CORE_RECAL_ST,Interrupt status for core dpll recaliberation" "Disabled,Enabled" setclrfld.long 0x00 11. 0x04 11. 0x04 11. "DPLL_MPU_RECAL_ST,Interrupt status for mpu dpll recaliberation" "Disabled,Enabled" setclrfld.long 0x00 10. 0x04 10. 0x04 10. "FORCEWKUP_ST,Software supervised wakeup completed event interrupt status" "No interrupt,Interrupt" newline setclrfld.long 0x00 8. 0x04 8. 0x04 8. "TRANSITION_ST,Software supervised transition completed event interrupt status" "No interrupt,Interrupt" group.long 0x0C++0x03 line.long 0x00 "PRM_IRQSTATUS_M3_SET/CLR,MPU Interrupt Events Status Register" setclrfld.long 0x00 15. 0x04 15. 0x04 15. "DPLL_PER_RECAL_ST,Interrupt status for usb dpll recaliberation" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x04 14. "DPLL_DDR_RECAL_ST,Interrupt status for ddr dpll recaliberation" "Disabled,Enabled" setclrfld.long 0x00 13. 0x04 13. 0x04 13. "DPLL_DISP_RECAL_ST,Interrupt status for disp dpll recaliberationn" "Disabled,Enabled" newline setclrfld.long 0x00 12. 0x04 12. 0x04 12. "DPLL_CORE_RECAL_ST,Interrupt status for core dpll recaliberation" "Disabled,Enabled" setclrfld.long 0x00 11. 0x04 11. 0x04 11. "DPLL_MPU_RECAL_ST,Interrupt status for mpu dpll recaliberation" "Disabled,Enabled" setclrfld.long 0x00 10. 0x04 10. 0x04 10. "FORCEWKUP_ST,Software supervised wakeup completed event interrupt status" "No interrupt,Interrupt" newline setclrfld.long 0x00 8. 0x04 8. 0x04 8. "TRANSITION_ST,Software supervised transition completed event interrupt status" "No interrupt,Interrupt" tree.end tree "PRM_PER" base ad:0x44E00C00 group.long 0x00++0x03 line.long 0x00 "RM_PER_RSTCTRL,Release Of The PER Domain Resets Control Register" bitfld.long 0x00 1. "PRU_ICSS_LRST,PER domain PRU-ICSS local reset control" "No reset,Reset" rgroup.long 0x08++0x03 line.long 0x00 "PM_PER_PWRSTST,Status On The Current PER Power Domain State Register" bitfld.long 0x00 23.--24. "PRU_ICSS_MEM_STATEST,PRU-ICSS memory state status" "Off,Retension,,On" bitfld.long 0x00 21.--22. "RAM_MEM_STATEST,OCMC RAM memory state status" "Off,Retension,,On" bitfld.long 0x00 20. "INTRANSITION,Domain transition status" "Idle,In progress" newline bitfld.long 0x00 17.--18. "PER_MEM_STATEST,PER domain memory state status" "Off,Retension,,On" bitfld.long 0x00 2. "LOGICSTATEST,Logic state status" "On,Off" bitfld.long 0x00 0.--1. "POWERSTATEST,Current power state status" "Off,,,On" group.long 0x0C++0x03 line.long 0x00 "PM_PER_PWRSTCTRL,Power State Of PER Power Domain Control Register" bitfld.long 0x00 30.--31. "RAM_MEM_ONSTATE,OCMC RAM memory on state" "Off,Retention,,On" bitfld.long 0x00 29. "PER_MEM_RETSTATE,Other memories in PER domain RET state" "Off,Retention" bitfld.long 0x00 27. "RAM_MEM_RETSTATE,OCMC RAM memory RET state" "Off,Retention" newline bitfld.long 0x00 25.--26. "PER_MEM_ONSTATE,Other memories in PER domain ON state" ",,,On" bitfld.long 0x00 7. "PRU_ICSS_MEM_RETSTATE,PRU-ICSS memory RET state" "Off,Retention" bitfld.long 0x00 5.--6. "PRU_ICSS_MEM_ONSTATE,PRU-ICSS memory ON state" ",,,On" newline bitfld.long 0x00 4. "LOWPOWERSTATECHANGE,Power state change request when domain has already performed a sleep transition" "Disabled,Enabled" bitfld.long 0x00 3. "LOGICRETSTATE,Logic state when power domain is RETENTION" "Off,Retension" bitfld.long 0x00 0.--1. "POWERSTATE,PER domain power state control" "Off,Retention,,On" tree.end tree "PRM_WKUP" base ad:0x44E00D00 group.long 0x00++0x07 line.long 0x00 "RM_WKUP_RSTCTRL,Release Of The ALWAYS ON Domain Resets Control Register" bitfld.long 0x00 3. "WKUP_M3_LRST,Assert reset to WKUP_M3" "No reset,Reset" line.long 0x04 "PM_WKUP_PWRSTCTRL,Controls Power State Of WKUP Power Domain" bitfld.long 0x04 4. "LOWPOWERSTATECHANGE,Power state change request when domain has already performed a sleep transition" "Disabled,Enabled" bitfld.long 0x04 3. "LOGICRETSTATE,Logic state when power domain is RETENTION" "Off,Retention" rgroup.long 0x08++0x03 line.long 0x00 "PM_WKUP_PWRSTST,Status On The Current WKUP Power Domain State Register" bitfld.long 0x00 20. "INTRANSITION,Domain transition status" "Idle,In progress" bitfld.long 0x00 17.--18. "DEBUGSS_MEM_STATEST,WKUP domain memory state status" "Off,,,On" bitfld.long 0x00 2. "LOGICSTATEST,Logic state status" "Off,On" group.long 0x0C++0x03 line.long 0x00 "RM_WKUP_RSTST,Different Reset Sources Of The ALWON Domain Log Register" bitfld.long 0x00 7. "ICECRUSHER_M3_RST,M3 processor has been reset due to M3 ICECRUSHER1 reset event" "No reset,Reset" bitfld.long 0x00 6. "EMULATION_M3_RST,M3 processor has been reset due to emulation reset source" "No reset,Reset" bitfld.long 0x00 5. "WKUP_M3_LRST,M3 processor has been reset" "No reset,Reset" tree.end tree "PRM_MPU" base ad:0x44E00E00 group.long 0x00++0x03 line.long 0x00 "PM_MPU_PWRSTCTRL,MPU Power State To Reach Upon Mpu Domain Sleep Transition Control Register" bitfld.long 0x00 24. "MPU_RAM_RETSTATE,Default power domain Memory(Ram) retention state when power domain is in retention" "Low,High" bitfld.long 0x00 23. "MPU_L2_RETSTATE,Default power domain Memory(L2) retention state when power domain is in retention" "Low,High" bitfld.long 0x00 22. "MPU_L1_RETSTATE,Default power domain Memory(L1) retention state when power domain is in retention" "Low,High" newline rbitfld.long 0x00 20.--21. "MPU_L2_ONSTATE,Default power domain memory state when domain is ON" "0,1,2,3" rbitfld.long 0x00 18.--19. "MPU_L1_ONSTATE,Default power domain memory state when domain is ON" "0,1,2,3" bitfld.long 0x00 16.--17. "MPU_RAM_ONSTATE,Default power domain memory state when domain is ON" "Off,,,On" newline bitfld.long 0x00 4. "LOWPOWERSTATECHANGE,Power state change request when domain has already performed a sleep transition" "Disabled,Enabled" bitfld.long 0x00 2. "LOGICRETSTATE,Logic state when power domain is RETENTION" "Off,Retention" bitfld.long 0x00 0.--1. "POWERSTATE,Power state control" "Off,Retention,,On" rgroup.long 0x04++0x03 line.long 0x00 "PM_MPU_PWRSTST,Status On The Current MPU Power Domain State 0 Register" bitfld.long 0x00 20. "INTRANSITION,Domain transition status" "Done,In progress" bitfld.long 0x00 8.--9. "MPU_L2_STATEST,MPU L2 memory state status" "Off,,,On" bitfld.long 0x00 6.--7. "MPU_L1_STATEST,MPU L1 memory state status" "Off,,,On" newline bitfld.long 0x00 4.--5. "MPU_RAM_STATEST,MPU_RAM memory state status" "Off,,,On" bitfld.long 0x00 2. "LOGICSTATEST,Logic state status" "Off,On" bitfld.long 0x00 0.--1. "POWERSTATEST,Current power state status" "Off,Retention,,On" group.long 0x08++0x03 line.long 0x00 "RM_MPU_RSTST,Different Reset Sources Of The ALWON Domain Log Register" bitfld.long 0x00 6. "ICECRUSHER_MPU_RST,MPU processor has been reset due to MPU ICECRUSHER1 reset event" "No reset,Reset" bitfld.long 0x00 5. "EMULATION_MPU_RST,MPU processor has been reset due to emulation reset source" "No reset,Reset" tree.end tree "PRM_DEVICE" base ad:0x44E00F00 group.long 0x00++0x0F line.long 0x00 "PRM_RSTCTRL,Global Software Cold And Warm Reset Control Register" bitfld.long 0x00 1. "RST_GLOBAL_COLD_SW,Global COLD software reset control" "No reset,Reset" bitfld.long 0x00 0. "RST_GLOBAL_WARM_S,Global WARM software reset control" "No reset,Reset" line.long 0x04 "PRM_RSTTIME,Reset Duration Control Register" bitfld.long 0x04 8.--12. "RSTTIME2,(Power domain) reset duration 2 (Number of CLK_M_OSC clock cyces)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x04 0.--7. 1. "RSTTIME1,(Global) reset duration 1 (Number of CLK_M_OSC clock cyces)" line.long 0x08 "PRM_RSTST,The Global Reset Sources Logs Register" bitfld.long 0x08 9. "ICEPICK_RST,Icepick reset event" "Not occured,Occured" bitfld.long 0x08 5. "EXTERNAL_WARM_RST,External warm reset event" "Not occured,Occured" bitfld.long 0x08 4. "WDT1_RST,Watchdog1 timer reset event" "Not occured,Occured" newline bitfld.long 0x08 1. "GLOBAL_WARM_SW_RST,Global warm software reset event" "Not occured,Occured" bitfld.long 0x08 0. "GLOBAL_COLD_RST,Power-on (Cold) reset event" "Not occured,Occured" line.long 0x0C "PRM_SRAM_COUNT,Common Setup For SRAM LDO Transition Counters Register" hexmask.long.byte 0x0C 24.--31. 1. "STARTUP_COUNT,Determines the start-up duration of SRAM and ABB LDO" hexmask.long.byte 0x0C 16.--23. 1. "SLPCNT_VALUE,Delay between retention/off assertion of last SRAM bank and SRAMALLRET signal to LDO is driven high" hexmask.long.byte 0x0C 8.--15. 1. "VSETUPCNT_VALUE,SRAM LDO rampup time from retention to active mode" newline bitfld.long 0x0C 0.--5. "PCHARGECNT_VALUE,Delay between de-assertion of STANDBY_RTA_RET_ON and STANDBY_RTA_RET_GOOD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x10++0x07 line.long 0x00 "PRM_LDO_SRAM_CORE_SETUP,Setup Of The SRAM LDO For CORE Voltage Domain Register" bitfld.long 0x00 8. "AIPOFF,Override on AIPOFF input of SRAM LDO" "No override,Override" bitfld.long 0x00 7. "ENFUNC5,ENFUNC5 input of SRAM LDO" "One_step,Two_step" bitfld.long 0x00 6. "ENFUNC4,ENFUNC4 input of SRAM LDO" "Ext_clock,No_ext_clock" newline bitfld.long 0x00 5. "ENFUNC3_EXPORT,ENFUNC3 input of SRAM LDO" "Sub_regul_disabled,Sub_regul_enabled" bitfld.long 0x00 4. "ENFUNC2_EXPORT,ENFUNC2 input of SRAM LDO" "Ext_cap,No_ext_cap" bitfld.long 0x00 3. "ENFUNC1_EXPORT,ENFUNC1 input of SRAM LDO" "Short_prot_disabled,Short_prot_enabled" newline bitfld.long 0x00 2. "ABBOFF_SLEEP_EXPORT,Determines whether SRAMNWA is supplied by VDDS or VDDAR during deep-sleep" "SRAMNW_SLP_VDDS,SRAMNW_SLP_VDDASRAMNWA" bitfld.long 0x00 1. "ABBOFF_ACT_EXPORT,Determines whether SRAMNWA is supplied by VDDS or VDDAR during active mode" "SRAMNW_ACT_VDDS,SRAMNW_ACT_VDDASRAMNWA" bitfld.long 0x00 0. "DISABLE_RTA_EXPORT,Control for HD memory RTA feature" "RTA_ENABLED,RTA_DISABLED" line.long 0x04 "PRM_LDO_SRAM_CORE_CTRL,Control And Status Of The SRAM LDO For CORE Voltage Domain Register" rbitfld.long 0x04 9. "SRAM_IN_TRANSITION,Status indicating SRAM LDO state machine state" "Idle,In transition" rbitfld.long 0x04 8. "SRAMLDO_STATUS,SRAMLDO status" "Active,Retention" bitfld.long 0x04 0. "RETMODE_ENABLE,Control if the SRAM LDO retention mode is used or not" "Disabled,Enabled" group.long 0x18++0x07 line.long 0x00 "PRM_LDO_SRAM_CORE_SETUP,Setup Of The SRAM LDO For MPU Voltage Domain Register" bitfld.long 0x00 8. "AIPOFF,Override on AIPOFF input of SRAM LDO" "No override,Override" bitfld.long 0x00 7. "ENFUNC5,ENFUNC5 input of SRAM LDO" "One_step,Two_step" bitfld.long 0x00 6. "ENFUNC4,ENFUNC4 input of SRAM LDO" "Ext_clock,No_ext_clock" newline bitfld.long 0x00 5. "ENFUNC3_EXPORT,ENFUNC3 input of SRAM LDO" "Sub_regul_disabled,Sub_regul_enabled" bitfld.long 0x00 4. "ENFUNC2_EXPORT,ENFUNC2 input of SRAM LDO" "Ext_cap,No_ext_cap" bitfld.long 0x00 3. "ENFUNC1_EXPORT,ENFUNC1 input of SRAM LDO" "Short_prot_disabled,Short_prot_enabled" newline bitfld.long 0x00 2. "ABBOFF_SLEEP_EXPORT,Determines whether SRAMNWA is supplied by VDDS or VDDAR during deep-sleep" "SRAMNW_SLP_VDDS,SRAMNW_SLP_VDDASRAMNWA" bitfld.long 0x00 1. "ABBOFF_ACT_EXPORT,Determines whether SRAMNWA is supplied by VDDS or VDDAR during active mode" "SRAMNW_ACT_VDDS,SRAMNW_ACT_VDDASRAMNWA" bitfld.long 0x00 0. "DISABLE_RTA_EXPORT,Control for HD memory RTA feature" "RTA_ENABLED,RTA_DISABLED" line.long 0x04 "PRM_LDO_SRAM_CORE_CTRL,Control And Status Of The SRAM LDO For MPU Voltage Domain Register" rbitfld.long 0x04 9. "SRAM_IN_TRANSITION,Status indicating SRAM LDO state machine state" "Idle,In transition" rbitfld.long 0x04 8. "SRAMLDO_STATUS,SRAMLDO status" "Active,Retention" bitfld.long 0x04 0. "RETMODE_ENABLE,Control if the SRAM LDO retention mode is used or not" "Disabled,Enabled" tree.end tree "PRM_RTC" base ad:0x44E01000 group.long 0x00++0x03 line.long 0x00 "PM_RTC_PWRSTCTRL,RTC Power State To Reach Upon Mpu Domain Sleep Transition Control Register" bitfld.long 0x00 4. "LOWPOWERSTATECHANGE,Power state change request when domain has already performed a sleep transition" "Disabled,Enabled" bitfld.long 0x00 2. "LOGICRETSTATE,Logic state when power domain is RETENTION" "Off,Retention" rgroup.long 0x04++0x03 line.long 0x00 "PM_RTC_PWRSTST,Status On The Current RTC Power Doamin State 0 Register" bitfld.long 0x00 20. "INTRANSITION,Domain transition status" "Idle,In progress" bitfld.long 0x00 2. "LOGICSTATEST,Logic state status" "Off,On" tree.end tree "PRM_GFX" base ad:0x44E01100 group.long 0x00++0x07 line.long 0x00 "PM_GFX_PWRSTCTRL,GFX Power State To Reach Upon A Domain Sleep Transition Control Register" rbitfld.long 0x00 17.--18. "GFX_MEM_ONSTATE,GFX memory state when domain is ON" "0,1,2,3" bitfld.long 0x00 6. "GFX_MEM_RETSTATE,Power state change request when domain has already performed a sleep transition" "0,1" bitfld.long 0x00 4. "LOWPOWERSTATECHANGE,Power state change request when domain has already performed a sleep transition" "Disabled,Enabled" newline bitfld.long 0x00 2. "LOGICRETSTATE,Logic state when power domain is RETENTION" "Off,Retention" bitfld.long 0x00 0.--1. "POWERSTATE,Power state control" "Off,Retention,,On" line.long 0x04 "RM_GFX_RSTCTRL,This Register Controls The Release Of The GFX Domain Resets Register" bitfld.long 0x04 0. "GFX_RST,GFX domain local reset control" "No reset,Reset" rgroup.long 0x10++0x03 line.long 0x00 "PM_GFX_PWRSTST,Status On The Current GFX Power Domain State Register" bitfld.long 0x00 20. "INTRANSITION,GFX domain local reset control" "Idle,In progress" bitfld.long 0x00 4.--5. "GFX_MEM_STATEST,GFX domain local reset control" "Off,,,On" bitfld.long 0x00 2. "LOGICSTATEST,GFX domain local reset control" "Off,On" newline bitfld.long 0x00 0.--1. "POWERSTATEST,Current power state status" "Off,Retention,,On" group.long 0x14++0x03 line.long 0x00 "RM_GFX_RSTST,Different Reset Sources Of The GFX Domain Logs Register" bitfld.long 0x00 0. "GFX_RST,GFX domain logic reset" "Not occured,Occured" tree.end tree "PRM_CEFUSE" base ad:0x44E01200 group.long 0x00++0x07 line.long 0x00 "PM_CEFUSE_PWRSTCTRL,CEFUSE Power State To Reach Upon A Domain Sleep Transition Register" bitfld.long 0x00 4. "LOWPOWERSTATECHANGE,Power state change request when domain has already performed a sleep transition" "Disabled,Enabled" bitfld.long 0x00 0.--1. "POWERSTATE,Power state control" "Off,,Inactive,On" line.long 0x04 "PM_CEFUSE_PWRSTST,Status On The Current CEFUSE Power Domain State Register" bitfld.long 0x04 24.--25. "LASTPOWERSTATEENTERED,Last low power state entered" "Off,On,?..." rbitfld.long 0x04 20. "INTRANSITION,Domain transition status" "Idle,In progress" rbitfld.long 0x04 2. "LOGICSTATEST,Logic state status" "Off,On" newline rbitfld.long 0x04 0.--1. "POWERSTATEST,Current power state status" "Off,Retention,Inactive,On" tree.end tree.end tree.end tree "Control Module" base ad:0x44E10000 rgroup.long 0x00++0x07 line.long 0x00 "CONTROL_REVISION,CONTROL_REVISION Register" bitfld.long 0x00 30.--31. "IP_REV_SCHEME,IP_REV_SCHEME" "0,New scheme,2,3" hexmask.long.word 0x00 16.--27. 1. "IP_REV_FUNC,Function indicates a software compatible module family" newline bitfld.long 0x00 11.--15. "IP_REV_RTL,RTL version (R)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. "IP_REV_MAJOR,Major revision (X)" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. "IP_REV_CUSTOM,Indicates a special version for a particular device" "Standard revision,1,2,3" bitfld.long 0x00 0.--5. "IP_REV_MINOR,Minor revision (Y)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "CONTROL_HWINFO,CONTROL_HWINFO Register" group.long 0x10++0x03 line.long 0x00 "CONTROL_SYSCONFIG,CONTROL_SYSCONFIG Register" rbitfld.long 0x00 4.--5. "STANDBY,Configure local initiator state management" "Force standby,No standby mode,Smart standby,Smart standby wakeup capable" bitfld.long 0x00 2.--3. "IDLEMODE,Configure local target state management" "Force-idle,No-idle,Smart-idle,Smart-idle wakeup capable" newline rbitfld.long 0x00 1. "FREEEMU,Sensitivity to emulation suspend input" "Sensitive,Not sensitive" rgroup.long 0x40++0x03 line.long 0x00 "CONTROL_STATUS,CONTROL_STATUS Register" bitfld.long 0x00 22.--23. "SYSBOOT1,Used to select crystal clock frequency" "19.2 mhz,24 mhz,25 mhz,26 mhz" bitfld.long 0x00 20.--21. "TESTMD,TESTMD" "0,?..." newline bitfld.long 0x00 18.--19. "ADMUX,GPMC CS0 default address muxing" "No addr/data muxing,Addr/addr/data muxing,Addr/data muxing,?..." bitfld.long 0x00 17. "WAITEN,GPMC CS0 default wait enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "BW,GPMC CS0 default bus width" "8 bit,16 bit" bitfld.long 0x00 8.--10. "DEVTYPE,Device type" ",,,General purpose device,?..." newline hexmask.long.byte 0x00 0.--7. 1. "SYSBOOT0,Selected boot mode" if (((d.l(ad:0x44E10000+0x110))&0xE0000000)==0x20000000)&&(((d.l(ad:0x44E10000+0x110))&0x18000000)>0x00) group.long 0x110++0x03 line.long 0x00 "CONTROL_EMIF_SDRAM_CONFIG,CONTROL_EMIF_SDRAM_CONFIG Register" bitfld.long 0x00 29.--31. "SDRAM_TYPE,SDRAM type selection" ",LPDDR1,DDR2,DDR3,?..." bitfld.long 0x00 27.--28. "IBANK_POS,Internal bank position" "Above column address,[1:0]above column/[2]above row,[0]above column/[2:1]above row,Above row address" newline bitfld.long 0x00 21.--22. "DYN_ODT,DDR3 dynamic ODT" "Disabled,Enabled,?..." bitfld.long 0x00 18.--19. "SDRAM_DRIVE,SDRAM drive strength" "Full,1/2,1/4,1/8" newline bitfld.long 0x00 14.--15. "NARROW_MODE,SDRAM data bus width" "32 bit,16 bit,?..." bitfld.long 0x00 7.--9. "ROWSIZE,Row size" "9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" newline bitfld.long 0x00 4.--6. "IBANK,Internal bank setup" "1 bank,2 banks,4 banks,8 banks,?..." bitfld.long 0x00 3. "EBANK,External chip select setup" "Pad_cs_o_n[0],Pad_cs_o_n[1:0]" newline bitfld.long 0x00 0.--2. "PAGESIZE,Page size" "256-word (8 column bits),512-word (9 column bits),1024-word (10 column bits),2048-word (11 column bit),?..." elif (((d.l(ad:0x44E10000+0x110))&0xE0000000)==0x20000000)&&(((d.l(ad:0x44E10000+0x110))&0x18000000)==0x00) group.long 0x110++0x03 line.long 0x00 "CONTROL_EMIF_SDRAM_CONFIG,CONTROL_EMIF_SDRAM_CONFIG Register" bitfld.long 0x00 29.--31. "SDRAM_TYPE,SDRAM type selection" ",LPDDR1,DDR2,DDR3,?..." bitfld.long 0x00 27.--28. "IBANK_POS,Internal bank position" "Above column address,[1:0]above column/[2]above row,[0]above column/[2:1]above row,Above row address" newline bitfld.long 0x00 21.--22. "DYN_ODT,DDR3 dynamic ODT" "Disabled,Enabled,?..." bitfld.long 0x00 18.--19. "SDRAM_DRIVE,SDRAM drive strength" "Full,1/2,1/4,1/8" newline bitfld.long 0x00 14.--15. "NARROW_MODE,SDRAM data bus width" "32 bit,16 bit,?..." bitfld.long 0x00 7.--9. "ROWSIZE,Row size" "9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" newline bitfld.long 0x00 3. "EBANK,External chip select setup" "Pad_cs_o_n[0],Pad_cs_o_n[1:0]" bitfld.long 0x00 0.--2. "PAGESIZE,Page size" "256-word (8 column bits),512-word (9 column bits),1024-word (10 column bits),2048-word (11 column bit),?..." elif (((d.l(ad:0x44E10000+0x110))&0xE0000000)==0x40000000)&&(((d.l(ad:0x44E10000+0x110))&0x18000000)>0x00) group.long 0x110++0x03 line.long 0x00 "CONTROL_EMIF_SDRAM_CONFIG,CONTROL_EMIF_SDRAM_CONFIG Register" bitfld.long 0x00 29.--31. "SDRAM_TYPE,SDRAM type selection" ",LPDDR1,DDR2,DDR3,?..." bitfld.long 0x00 27.--28. "IBANK_POS,Internal bank position" "Above column address,[1:0]above column/[2]above row,[0]above column/[2:1]above row,Above row address" newline bitfld.long 0x00 24.--26. "DDR_TERM,DDR2 termination resistor value." "Disabled,75 ohm,150 ohm,50 ohm,?..." bitfld.long 0x00 18.--19. "SDRAM_DRIVE,SDRAM drive strength" "Normal,Weak,?..." newline bitfld.long 0x00 14.--15. "NARROW_MODE,SDRAM data bus width" "32 bit,16 bit,?..." bitfld.long 0x00 10.--13. "CL,CAS latency" ",,2,3,4,5,?..." newline bitfld.long 0x00 7.--9. "ROWSIZE,Row size" "9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.long 0x00 4.--6. "IBANK,Internal bank setup" "1 bank,2 banks,4 banks,8 banks,?..." newline bitfld.long 0x00 3. "EBANK,External chip select setup" "Pad_cs_o_n[0],Pad_cs_o_n[1:0]" bitfld.long 0x00 0.--2. "PAGESIZE,Page size" "256-word (8 column bits),512-word (9 column bits),1024-word (10 column bits),2048-word (11 column bit),?..." elif (((d.l(ad:0x44E10000+0x110))&0xE0000000)==0x40000000)&&(((d.l(ad:0x44E10000+0x110))&0x18000000)==0x00) group.long 0x110++0x03 line.long 0x00 "CONTROL_EMIF_SDRAM_CONFIG,CONTROL_EMIF_SDRAM_CONFIG Register" bitfld.long 0x00 29.--31. "SDRAM_TYPE,SDRAM type selection" ",LPDDR1,DDR2,DDR3,?..." bitfld.long 0x00 27.--28. "IBANK_POS,Internal bank position" "Above column address,[1:0]above column/[2]above row,[0]above column/[2:1]above row,Above row address" newline bitfld.long 0x00 24.--26. "DDR_TERM,DDR2 termination resistor value." "Disabled,75 ohm,150 ohm,50 ohm,?..." bitfld.long 0x00 18.--19. "SDRAM_DRIVE,SDRAM drive strength" "Normal,Weak,?..." newline bitfld.long 0x00 14.--15. "NARROW_MODE,SDRAM data bus width" "32 bit,16 bit,?..." bitfld.long 0x00 10.--13. "CL,CAS latency" ",,2,3,4,5,?..." newline bitfld.long 0x00 4.--6. "IBANK,Internal bank setup" "1 bank,2 banks,4 banks,8 banks,?..." bitfld.long 0x00 3. "EBANK,External chip select setup" "Pad_cs_o_n[0],Pad_cs_o_n[1:0]" newline bitfld.long 0x00 0.--2. "PAGESIZE,Page size" "256-word (8 column bits),512-word (9 column bits),1024-word (10 column bits),2048-word (11 column bit),?..." elif (((d.l(ad:0x44E10000+0x110))&0xE0000000)==0x60000000)&&(((d.l(ad:0x44E10000+0x110))&0x18000000)>0x00) group.long 0x110++0x03 line.long 0x00 "CONTROL_EMIF_SDRAM_CONFIG,CONTROL_EMIF_SDRAM_CONFIG Register" bitfld.long 0x00 29.--31. "SDRAM_TYPE,SDRAM type selection" ",LPDDR1,DDR2,DDR3,?..." bitfld.long 0x00 27.--28. "IBANK_POS,Internal bank position" "Above column address,[1:0]above column/[2]above row,[0]above column/[2:1]above row,Above row address" newline bitfld.long 0x00 24.--26. "DDR_TERM,DDR3 termination resistor value." "Disabled,RZQ/4,RZQ/2,RZQ/6,RZQ/12,RZQ/8,?..." bitfld.long 0x00 21.--22. "DYN_ODT,DDR3 dynamic ODT" "Disabled,Enabled,?..." newline bitfld.long 0x00 18.--19. "SDRAM_DRIVE,SDRAM drive strength" "RZQ/6,RZQ/7,?..." bitfld.long 0x00 16.--17. "CWL,DDR3 CAS write latency" "5,6,7,8" newline bitfld.long 0x00 14.--15. "NARROW_MODE,SDRAM data bus width" "32 bit,16 bit,?..." bitfld.long 0x00 10.--13. "CL,CAS latency" ",,5,,6,,7,,8,,9,,10,,11,?..." newline bitfld.long 0x00 7.--9. "ROWSIZE,Row size" "9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.long 0x00 4.--6. "IBANK,Internal bank setup" "1 bank,2 banks,4 banks,8 banks,?..." newline bitfld.long 0x00 3. "EBANK,External chip select setup" "Pad_cs_o_n[0],Pad_cs_o_n[1:0]" bitfld.long 0x00 0.--2. "PAGESIZE,Page size" "256-word (8 column bits),512-word (9 column bits),1024-word (10 column bits),2048-word (11 column bit),?..." else group.long 0x110++0x03 line.long 0x00 "CONTROL_EMIF_SDRAM_CONFIG,CONTROL_EMIF_SDRAM_CONFIG Register" bitfld.long 0x00 29.--31. "SDRAM_TYPE,SDRAM type selection" ",LPDDR1,DDR2,DDR3,?..." bitfld.long 0x00 27.--28. "IBANK_POS,Internal bank position" "Above column address,[1:0]above column/[2]above row,[0]above column/[2:1]above row,Above row address" newline bitfld.long 0x00 24.--26. "DDR_TERM,DDR3 termination resistor value." "Disabled,RZQ/4,RZQ/2,RZQ/6,RZQ/12,RZQ/8,?..." bitfld.long 0x00 21.--22. "DYN_ODT,DDR3 dynamic ODT" "Disabled,Enabled,?..." newline bitfld.long 0x00 18.--19. "SDRAM_DRIVE,SDRAM drive strength" "RZQ/6,RZQ/7,?..." bitfld.long 0x00 16.--17. "CWL,DDR3 CAS write latency" "5,6,7,8" newline bitfld.long 0x00 14.--15. "NARROW_MODE,SDRAM data bus width" "32 bit,16 bit,?..." bitfld.long 0x00 10.--13. "CL,CAS latency" ",,5,,6,,7,,8,,9,,10,,11,?..." newline bitfld.long 0x00 7.--9. "ROWSIZE,Row size" "9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.long 0x00 3. "EBANK,External chip select setup" "Pad_cs_o_n[0],Pad_cs_o_n[1:0]" newline bitfld.long 0x00 0.--2. "PAGESIZE,Page size" "256-word (8 column bits),512-word (9 column bits),1024-word (10 column bits),2048-word (11 column bit),?..." endif group.long 0x428++0x07 line.long 0x00 "CORE_SLDO_CTRL,CORE_SLDO_CTRL Register" hexmask.long.word 0x00 16.--25. 1. "VSET,Trims VDDAR" line.long 0x04 "MPU_SLDO_CTRL,MPU_SLDO_CTRL Register" hexmask.long.word 0x04 16.--25. 1. "VSET,Trims VDDAR" group.long 0x444++0x0B line.long 0x00 "CLK32KDIVRATIO_CTRL,CLK32KDIVRATIO_CTRL Register" bitfld.long 0x00 0. "CLKDIVOPP50_EN,Clock div OPP50 enable" "OPP100,OPP50" line.long 0x04 "BANDGAP_CTRL,BANDGAP_CTRL Register" hexmask.long.byte 0x04 8.--15. 1. "DTEMP,Temperature data from ADC" bitfld.long 0x04 7. "CBIASSEL,Cbiassel" "Bandgap voltage,Resistor divider" newline bitfld.long 0x04 6. "BGROFF,Bgroff" "On,Off" bitfld.long 0x04 5. "TMPSOFF,Temperature sensor off" "On,Off" newline bitfld.long 0x04 4. "SOC,ADC start of conversion" "Not started,Started" bitfld.long 0x04 3. "CLRZ,Digital outputs reset" "Reset,?..." newline bitfld.long 0x04 2. "CONTCONV,ADC convertion mode select" "Single,Continuous" rbitfld.long 0x04 1. "ECOZ,ADC end of conversion" "Done,In progress" newline rbitfld.long 0x04 0. "TSHUT,Termal shutdown event" "Not occured,Occured" line.long 0x08 "BANDGAP_TRIM,BANDGAP_TRIM Register" hexmask.long.byte 0x08 24.--31. 1. "DTRBGAPC,Trim the output voltage of bandgap" hexmask.long.byte 0x08 16.--23. 1. "DTRBGAPV,Trim the output voltage of bandgap" newline hexmask.long.byte 0x08 8.--15. 1. "DTRTEMPS,Trim the temperature sensor" hexmask.long.byte 0x08 0.--7. 1. "DTRTEMPSC,Trim the temperature sensor" group.long 0x458++0x03 line.long 0x00 "PLL_CLKINPULOW_CTRL,PLL_CLKINPULOW_CTRL Register" bitfld.long 0x00 2. "DDR_PLL_CLKINPULOW_SEL,Ddr_pll_clkinpulow_sel" "CORE_CLKOUT_M6,PER_CLKOUT_M2" bitfld.long 0x00 1. "DISP_PLL_CLKINPULOW_SEL,Disp_pll_clkinpulow_sel" "CORE_CLKOUT_M6,PER_CLKOUT_M2" newline bitfld.long 0x00 0. "MPU_DPLL_CLKINPULOW_SEL,Mpu_dpll_clkinpulow_sel" "CORE_CLKOUT_M6,PER_CLKOUT_M2" group.long 0x468++0x03 line.long 0x00 "MOSC_CTRL,MOSC_CTRL Register" bitfld.long 0x00 0. "RESSELECT,1M ohm internal resistor disable" "No,Yes" group.long 0x470++0x03 line.long 0x00 "DEEPSLEEP_CTRL,DEEPSLEEP_CTRL Register" bitfld.long 0x00 17. "DSENABLE,Deep sleep enable" "Disabled,Enabled" hexmask.long.word 0x00 0.--15. 1. "DSCOUNT,Programmable count of how many CLK_M_OSC clocks needs to be seen before exiting deep sleep mode" rgroup.long 0x50C++0x03 line.long 0x00 "DPLL_PWR_SW_STATUS,DPLL_PWR_SW_STATUS Register" bitfld.long 0x00 25. "PGOODOUT_DDR,Power good status for DDR DPLL" "Fault,Good" bitfld.long 0x00 24. "PONOUT_DDR,Power enable status for DDR DPLL" "Disabled,Enabled" newline bitfld.long 0x00 17. "PGOODOUT_DISP,Power good status for DISP DPLL" "Fault,Good" bitfld.long 0x00 16. "PONOUT_DISP,Power enable status for DISP DPLL" "Disabled,Enabled" newline bitfld.long 0x00 9. "PGOODOUT_PER,Power good status for PER DPLL" "Fault,Good" bitfld.long 0x00 8. "PONOUT_PER,Power enable status for PER DPLL" "Disabled,Enabled" rgroup.long 0x600++0x07 line.long 0x00 "DEVICE_ID,DEVICE_ID Register" bitfld.long 0x00 28.--31. "DEVREV,Device revision" "1.0,2.0,2.1,?..." hexmask.long.word 0x00 16.--27. 1. "PARTNUM,Device part number (Unique JTAG ID)" newline hexmask.long.word 0x00 1.--11. 1. "MFGR,Manufacturer's JTAG ID" line.long 0x04 "DEV_FEATURE,DEV_FEATURE Register" bitfld.long 0x04 29. "SGX,3D graphic module (Sgx) enable" "Disabled,Enabled" bitfld.long 0x04 17. "PRU_ICSS_FEA[1],TX_AUTO_SEQUENCE enable" "Disabled,Enabled" newline bitfld.long 0x04 16. "PRU_ICSS_FEA[0],Ethercat functionality and ODD_NIBBLE enable" "Disabled,Enabled" bitfld.long 0x04 7. "DCAN,DCAN0 DCAN1 ips enaable" "Disabled,Enabled" newline bitfld.long 0x04 1. "CPSW,CP switch IP (Ethernet) enable" "Disabled,Enabled" bitfld.long 0x04 0. "PRU_ICSS,PRU-ICSS enable" "Disabled,Enabled" group.long 0x608++0x07 line.long 0x00 "INIT_PRIORITY_0,INIT_PRIORITY_0 Register" bitfld.long 0x00 28.--31. "TCWR2,TPTC 2 write port initiator priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 26.--27. "TCRD2,TPTC 2 read port initiator priority" "0,1,2,3" newline bitfld.long 0x00 22.--23. "TCWR1,TPTC 1 write port initiator priority" "0,1,2,3" bitfld.long 0x00 20.--21. "TCRD1,TPTC 1 read port initiator priority" "0,1,2,3" newline bitfld.long 0x00 18.--19. "TCWR0,TPTC 0 write port initiator priority" "0,1,2,3" bitfld.long 0x00 16.--17. "TCRD0,TPTC 0 read port initiator priority" "0,1,2,3" newline bitfld.long 0x00 14.--15. "P1500,P1500 port initiator priority" "0,1,2,3" bitfld.long 0x00 6.--7. "MMU,System MMU initiator priority" "0,1,2,3" newline bitfld.long 0x00 4.--5. "PRU_ICSS,PRU-ICSS initiator priority" "0,1,2,3" bitfld.long 0x00 0.--1. "HOST_ARM,Host cortex A8 initiator priority" "0,1,2,3" line.long 0x04 "INIT_PRIORITY_1,INIT_PRIORITY_1 Register" bitfld.long 0x04 24.--25. "DEBUG,Debug subsystem initiator priority" "0,1,2,3" bitfld.long 0x04 22.--23. "LCD,SGX initiator priority" "0,1,2,3" newline bitfld.long 0x04 20.--21. "SGX,SGX initiator priority" "0,1,2,3" bitfld.long 0x04 6.--7. "USB_QMGR,USB queue manager initiator priority" "0,1,2,3" newline bitfld.long 0x04 4.--5. "USB_DMA,USB DMA port initiator priority" "0,1,2,3" bitfld.long 0x04 0.--1. "CPSW,CPSW initiator priority" "0,1,2,3" group.long 0x614++0x03 line.long 0x00 "TPTC_CFG,TPTC_CFG Register" bitfld.long 0x00 4.--5. "TC2DBS,TPTC2 default burst size" "16 byte,32 byte,64 byte,128 byte" bitfld.long 0x00 2.--3. "TC1DBS,TPTC1 default burst size" "16 byte,32 byte,64 byte,128 byte" newline bitfld.long 0x00 0.--1. "TC0DBS,TPTC0 default burst size" "16 byte,32 byte,64 byte,128 byte" group.long 0x620++0x03 line.long 0x00 "USB_CTRL0,USB Control0 Register" bitfld.long 0x00 23. "DATAPOLARITY_INV,Data polarity invert" "DP/DM,DM/DP" bitfld.long 0x00 20. "OTGSESSENDEN,Session end detect enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "OTGVDET_EN,VBUS detect enable" "Disabled,Enabled" bitfld.long 0x00 18. "DMGPIO_PD,Pulldown on DM in GPIO mode disable" "No,Yes" newline bitfld.long 0x00 17. "DPGPIO_PD,Pulldown on DP in GPIO mode disable" "No,Yes" bitfld.long 0x00 14. "GPIO_SIG_CROSS,UART signal cross" "TX->DM,RX->DP" newline bitfld.long 0x00 13. "GPIO_SIG_INV,Gpio_sig_inv" "TX->Invert->DM,RX->Invert->DM" bitfld.long 0x00 12. "GPIOMODE,GPIO mode" "USB mode,UART mode" newline bitfld.long 0x00 10. "CDET_EXTCTL,Bypass the charger detection state machine" "On,Bypassed" bitfld.long 0x00 9. "DPPULLUP,Pullup on DP line" "No effect,Enabled" newline bitfld.long 0x00 8. "DMPULLUP,Pullup on DM line" "No effect,Enabled" bitfld.long 0x00 7. "CHGVSRC_EN,Enable VSRC on DP line (Host charger case)" "Disabled,Enabled" newline bitfld.long 0x00 6. "CHGISINK_EN,Enable ISINK on DM line (Host charger case)" "Disabled,Enabled" bitfld.long 0x00 5. "SINKONDP,Sink on DP" "DM,DP" newline bitfld.long 0x00 4. "SRCONDM,Source on DM" "DP,DM" bitfld.long 0x00 3. "CHGDET_RSTRT,Restart charger detect" "No restart,Restart" newline bitfld.long 0x00 2. "CHGDET_DIS,Charger detect disable" "Enabled,Disabled" bitfld.long 0x00 1. "OTG_PWRDN,Power down the USB OTG PHY" "Normal mode,Powered down" newline bitfld.long 0x00 0. "CM_PWRDN,Power down the USB CM PHY" "Normal mode,Powered down" rgroup.long (0x620+0x04)++0x03 line.long 0x00 "USB_STS0,USB_STS0 Register" bitfld.long 0x00 5.--7. "CHGDETSTS,Charge detection status" "Wait state,No contact,PS/2,Unknown error,Dedicated charger,HOST charger,PC,Interrupt" bitfld.long 0x00 4. "CDET_DMDET,DM comparator output" "Low,High" newline bitfld.long 0x00 3. "CDET_DPDET,DP comparator output" "Low,High" bitfld.long 0x00 2. "CDET_DATADET,Charger comparator output" "Low,High" newline bitfld.long 0x00 1. "CHGDETECT,Charger detection status" "Not detected,Detected" bitfld.long 0x00 0. "CHGDETDONE,Charger detection protocol done" "In progress,Done" group.long 0x628++0x03 line.long 0x00 "USB_CTRL1,USB Control1 Register" bitfld.long 0x00 23. "DATAPOLARITY_INV,Data polarity invert" "DP/DM,DM/DP" bitfld.long 0x00 20. "OTGSESSENDEN,Session end detect enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "OTGVDET_EN,VBUS detect enable" "Disabled,Enabled" bitfld.long 0x00 18. "DMGPIO_PD,Pulldown on DM in GPIO mode disable" "No,Yes" newline bitfld.long 0x00 17. "DPGPIO_PD,Pulldown on DP in GPIO mode disable" "No,Yes" bitfld.long 0x00 14. "GPIO_SIG_CROSS,UART signal cross" "TX->DM,RX->DP" newline bitfld.long 0x00 13. "GPIO_SIG_INV,Gpio_sig_inv" "TX->Invert->DM,RX->Invert->DM" bitfld.long 0x00 12. "GPIOMODE,GPIO mode" "USB mode,UART mode" newline bitfld.long 0x00 10. "CDET_EXTCTL,Bypass the charger detection state machine" "On,Bypassed" bitfld.long 0x00 9. "DPPULLUP,Pullup on DP line" "No effect,Enabled" newline bitfld.long 0x00 8. "DMPULLUP,Pullup on DM line" "No effect,Enabled" bitfld.long 0x00 7. "CHGVSRC_EN,Enable VSRC on DP line (Host charger case)" "Disabled,Enabled" newline bitfld.long 0x00 6. "CHGISINK_EN,Enable ISINK on DM line (Host charger case)" "Disabled,Enabled" bitfld.long 0x00 5. "SINKONDP,Sink on DP" "DM,DP" newline bitfld.long 0x00 4. "SRCONDM,Source on DM" "DP,DM" bitfld.long 0x00 3. "CHGDET_RSTRT,Restart charger detect" "No restart,Restart" newline bitfld.long 0x00 2. "CHGDET_DIS,Charger detect disable" "Enabled,Disabled" bitfld.long 0x00 1. "OTG_PWRDN,Power down the USB OTG PHY" "Normal mode,Powered down" newline bitfld.long 0x00 0. "CM_PWRDN,Power down the USB CM PHY" "Normal mode,Powered down" rgroup.long (0x628+0x04)++0x03 line.long 0x00 "USB_STS1,USB_STS1 Register" bitfld.long 0x00 5.--7. "CHGDETSTS,Charge detection status" "Wait state,No contact,PS/2,Unknown error,Dedicated charger,HOST charger,PC,Interrupt" bitfld.long 0x00 4. "CDET_DMDET,DM comparator output" "Low,High" newline bitfld.long 0x00 3. "CDET_DPDET,DP comparator output" "Low,High" bitfld.long 0x00 2. "CDET_DATADET,Charger comparator output" "Low,High" newline bitfld.long 0x00 1. "CHGDETECT,Charger detection status" "Not detected,Detected" bitfld.long 0x00 0. "CHGDETDONE,Charger detection protocol done" "In progress,Done" rgroup.long 0x630++0x07 line.long 0x00 "MAC_ID0_LO,MAC_ID0_LO Register" hexmask.long.byte 0x00 8.--15. 1. "MACADDR_47_40,MAC0 address - byte 5" hexmask.long.byte 0x00 0.--7. 1. "MACADDR_39_32,MAC0 address - byte 4" line.long 0x04 "MAC_ID0_HI,MAC_ID0_HI Register" hexmask.long.byte 0x04 24.--31. 1. "MACADDR_31_24,MAC0 address - byte 3" hexmask.long.byte 0x04 16.--23. 1. "MACADDR_32_16,MAC0 address - byte 3" newline hexmask.long.byte 0x04 8.--15. 1. "MACADDR_15_8,MAC0 address - byte 2" hexmask.long.byte 0x04 0.--7. 1. "MACADDR_7_0,MAC0 address - byte 1" rgroup.long 0x638++0x07 line.long 0x00 "MAC_ID1_LO,MAC_ID1_LO Register" hexmask.long.byte 0x00 8.--15. 1. "MACADDR_47_40,MAC1 address - byte 5" hexmask.long.byte 0x00 0.--7. 1. "MACADDR_39_32,MAC1 address - byte 4" line.long 0x04 "MAC_ID1_HI,MAC_ID1_HI Register" hexmask.long.byte 0x04 24.--31. 1. "MACADDR_31_24,MAC1 address - byte 3" hexmask.long.byte 0x04 16.--23. 1. "MACADDR_32_16,MAC1 address - byte 3" newline hexmask.long.byte 0x04 8.--15. 1. "MACADDR_15_8,MAC1 address - byte 2" hexmask.long.byte 0x04 0.--7. 1. "MACADDR_7_0,MAC1 address - byte 1" group.long 0x644++0x07 line.long 0x00 "DCAN_RAMINIT,DCAN_RAMINIT Register" eventfld.long 0x00 9. "DCAN1_RAMINIT_DONE,DCAN1 RAM initialization complete status" "Not completed,Completed" eventfld.long 0x00 8. "DCAN0_RAMINIT_DONE,DCAN0 RAM initialization complete status" "Not completed,Completed" newline bitfld.long 0x00 1. "DCAN1_RAMINIT_START,Dcan1_raminit_start" "Not started,Started" bitfld.long 0x00 0. "DCAN0_RAMINIT_START,Dcan1_raminit_start" "Not started,Started" line.long 0x04 "USB_WKUP_CTRL,USB_WKUP_CTRL Register" bitfld.long 0x04 8. "PHY1_WUEN,PHY1 wakeup enable" "Disabled,Enabled" bitfld.long 0x04 0. "PHY0_WUEN,PHY0 wakeup enable" "Disabled,Enabled" group.long 0x650++0x03 line.long 0x00 "GMII_SEL,GMII_SEL Register" bitfld.long 0x00 7. "RMII2_IO_CLK_EN,RMII reference clock I/O source select" "PLL,Chip pin" bitfld.long 0x00 6. "RMII1_IO_CLK_EN,RMII reference clock I/O source select" "PLL,Chip pin" newline bitfld.long 0x00 5. "RGMII2_IDMODE,RGMII2 internal delay mode" ",No internal delay" bitfld.long 0x00 4. "RGMII1_IDMODE,RGMII1 internal delay mode" ",No internal delay" newline bitfld.long 0x00 2.--3. "GMII2_SEL,Gmii2_sel" "GMII/MII,RMII,RGMII,?..." bitfld.long 0x00 0.--1. "GMII1_SEL,Gmii1_sel" "GMII/MII,RMII,RGMII,?..." group.long 0x664++0x03 line.long 0x00 "PWMSS_CTRL,PWMSS_CTRL Register" bitfld.long 0x00 2. "PWMSS2_TBCLKEN,Timebase clock enable for PWMSS2" "Disabled,Enabled" bitfld.long 0x00 1. "PWMSS1_TBCLKEN,Timebase clock enable for PWMSS1" "Disabled,Enabled" newline bitfld.long 0x00 0. "PWMSS0_TBCLKEN,Timebase clock enable for PWMSS0" "Disabled,Enabled" group.long 0x670++0x07 line.long 0x00 "MREQPRIO_0,MREQPRIO_0 Register" bitfld.long 0x00 28.--30. "SGX,Mreqpriority for SGX initiator OCP interface" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. "USB1,Mreqpriority for USB1 initiator OCP interface" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 20.--22. "USB0,Mreqpriority for USB0 initiator OCP interface" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. "CPSW,Mreqpriority for CPSW initiator OCP interface" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 8.--10. "PRU_ICSS_PRU0,Mreqpriority for PRU-ICSS PRU0 initiator OCP interface" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "SAB_INIT1,Mreqpriority for MPU initiator 1 OCP interface" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 0.--2. "SAB_INIT0,Mreqpriority for MPU initiator 0 OCP interface" "0,1,2,3,4,5,6,7" line.long 0x04 "MREQPRIO_1,MREQPRIO_1 Register" bitfld.long 0x04 0.--2. "EXP,Mreqpriority for expansion initiator OCP interface" "0,1,2,3,4,5,6,7" group.long 0x690++0x17 line.long 0x00 "HW_EVENT_SEL_GRP0,HW_EVENT_SEL_GRP0 Register" hexmask.long.byte 0x00 24.--31. 1. "EVENT4,Select 4th trace event from group 0" hexmask.long.byte 0x00 16.--23. 1. "EVENT3,Select 3th trace event from group 0" newline hexmask.long.byte 0x00 8.--15. 1. "EVENT2,Select 2th trace event from group 0" hexmask.long.byte 0x00 0.--7. 1. "EVENT1,Select 1th trace event from group 0" line.long 0x04 "HW_EVENT_SEL_GRP1,HW_EVENT_SEL_GRP1 Register" hexmask.long.byte 0x04 24.--31. 1. "EVENT8,Select 8th trace event from group 1" hexmask.long.byte 0x04 16.--23. 1. "EVENT7,Select 7th trace event from group 1" newline hexmask.long.byte 0x04 8.--15. 1. "EVENT6,Select 6th trace event from group 1" hexmask.long.byte 0x04 0.--7. 1. "EVENT5,Select 5th trace event from group 1" line.long 0x08 "HW_EVENT_SEL_GRP2,HW_EVENT_SEL_GRP2 Register" hexmask.long.byte 0x08 24.--31. 1. "EVENT12,Select 12th trace event from group 2" hexmask.long.byte 0x08 16.--23. 1. "EVENT11,Select 11th trace event from group 2" newline hexmask.long.byte 0x08 8.--15. 1. "EVENT10,Select 10th trace event from group 2" hexmask.long.byte 0x08 0.--7. 1. "EVENT9,Select 9th trace event from group 2" line.long 0x0C "HW_EVENT_SEL_GRP3,HW_EVENT_SEL_GRP3 Register" hexmask.long.byte 0x0C 24.--31. 1. "EVENT16,Select 16th trace event from group 3" hexmask.long.byte 0x0C 16.--23. 1. "EVENT15,Select 15th trace event from group 3" newline hexmask.long.byte 0x0C 8.--15. 1. "EVENT14,Select 14th trace event from group 3" hexmask.long.byte 0x0C 0.--7. 1. "EVENT13,Select 13th trace event from group 3" line.long 0x10 "SMRT_CTRL,SMRT_CTRL Register" bitfld.long 0x10 1. "SR1_SLEEP,SPSLEEP sensor enable" "Disabled,Enabled" bitfld.long 0x10 0. "SR0_SLEEP,SPSLEEP sensor enable" "Disabled,Enabled" line.long 0x14 "MPUSS_HW_DEBUG_SEL,MPUSS_HW_DEBUG_SEL Register" bitfld.long 0x14 9. "HW_DBG_GATE_EN,HW_DBG_GATE_EN" "Gated off,Not gated off" bitfld.long 0x14 0.--3. "HW_DBG_SEL,Selects which group of signals are sent out to the MODENA_HW_DBG_INFO register" "Group 0,Group 1,Group 2,Group 3,Group 4,Group 5,Group 6,Group 7,?..." rgroup.long 0x6A8++0x03 line.long 0x00 "MPUSS_HW_DBG_INFO,MPUSS_HW_DBG_INFO Register" rgroup.long 0x770++0x03 line.long 0x00 "VDD_MPU_OPP_050,VDD_MPU_OPP_050 Register" hexmask.long.tbyte 0x00 0.--23. 1. "NTARGET,Ntarget value for MPU voltage domain 050" rgroup.long 0x774++0x03 line.long 0x00 "VDD_MPU_OPP_100,VDD_MPU_OPP_100 Register" hexmask.long.tbyte 0x00 0.--23. 1. "NTARGET,Ntarget value for MPU voltage domain 100" rgroup.long 0x778++0x03 line.long 0x00 "VDD_MPU_OPP_120,VDD_MPU_OPP_120 Register" hexmask.long.tbyte 0x00 0.--23. 1. "NTARGET,Ntarget value for MPU voltage domain 120" rgroup.long 0x77C++0x03 line.long 0x00 "VDD_MPU_OPP_TURBO,VDD_MPU_OPP_TURBO Register" hexmask.long.tbyte 0x00 0.--23. 1. "NTARGET,Ntarget value for MPU voltage domain TURBO" rgroup.long 0x7B8++0x03 line.long 0x00 "VDD_CORE_OPP_050,VDD_CORE_OPP_050 Register" hexmask.long.tbyte 0x00 0.--23. 1. "NTARGET,Ntarget value for CORE voltage domain 050" rgroup.long 0x7BC++0x03 line.long 0x00 "VDD_CORE_OPP_100,VDD_CORE_OPP_100 Register" hexmask.long.tbyte 0x00 0.--23. 1. "NTARGET,Ntarget value for CORE voltage domain 100" rgroup.long 0x7D0++0x03 line.long 0x00 "BB_SCALE,BB_SCALE Register" bitfld.long 0x00 8.--11. "SCALE,Dynamic core voltage scaling for class 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--1. "BBIAS,BBIAS value from efuse" "0,1,2,3" rgroup.long 0x7F4++0x03 line.long 0x00 "USB_VID_PID,USB_VID_PID Register" hexmask.long.word 0x00 16.--31. 1. "USB_VID,USB vendor ID" hexmask.long.word 0x00 0.--15. 1. "USB_PID,USB product ID" rgroup.long 0x7FC++0x03 line.long 0x00 "EFUSE_SMA,EFUSE_SMA Register" bitfld.long 0x00 16.--17. "PACKAGE_TYPE,Designates the package type of the device (Pg2.x only)" "Undefined,ZCZ,ZCE,?..." hexmask.long.word 0x00 0.--12. 1. "ARM_MPU_MAX_FREQ,Designates the ARM MPU maximum frequency supported by the device (Pg2.x only)" group.long 0x800++0x03 line.long 0x00 "CONF_GPMC_AD0,CONF_GPMC_AD0 Register" bitfld.long 0x00 6. "CONF_GMPC_AD0_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_AD0_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_AD0_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_AD0_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_AD0_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x804++0x03 line.long 0x00 "CONF_GPMC_AD1,CONF_GPMC_AD1 Register" bitfld.long 0x00 6. "CONF_GMPC_AD1_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_AD1_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_AD1_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_AD1_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_AD1_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x808++0x03 line.long 0x00 "CONF_GPMC_AD2,CONF_GPMC_AD2 Register" bitfld.long 0x00 6. "CONF_GMPC_AD2_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_AD2_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_AD2_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_AD2_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_AD2_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x80C++0x03 line.long 0x00 "CONF_GPMC_AD3,CONF_GPMC_AD3 Register" bitfld.long 0x00 6. "CONF_GMPC_AD3_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_AD3_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_AD3_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_AD3_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_AD3_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x810++0x03 line.long 0x00 "CONF_GPMC_AD4,CONF_GPMC_AD4 Register" bitfld.long 0x00 6. "CONF_GMPC_AD4_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_AD4_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_AD4_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_AD4_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_AD4_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x814++0x03 line.long 0x00 "CONF_GPMC_AD5,CONF_GPMC_AD5 Register" bitfld.long 0x00 6. "CONF_GMPC_AD5_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_AD5_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_AD5_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_AD5_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_AD5_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x818++0x03 line.long 0x00 "CONF_GPMC_AD6,CONF_GPMC_AD6 Register" bitfld.long 0x00 6. "CONF_GMPC_AD6_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_AD6_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_AD6_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_AD6_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_AD6_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x81C++0x03 line.long 0x00 "CONF_GPMC_AD7,CONF_GPMC_AD7 Register" bitfld.long 0x00 6. "CONF_GMPC_AD7_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_AD7_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_AD7_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_AD7_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_AD7_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x820++0x03 line.long 0x00 "CONF_GPMC_AD8,CONF_GPMC_AD8 Register" bitfld.long 0x00 6. "CONF_GMPC_AD8_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_AD8_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_AD8_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_AD8_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_AD8_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x824++0x03 line.long 0x00 "CONF_GPMC_AD9,CONF_GPMC_AD9 Register" bitfld.long 0x00 6. "CONF_GMPC_AD9_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_AD9_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_AD9_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_AD9_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_AD9_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x828++0x03 line.long 0x00 "CONF_GPMC_AD10,CONF_GPMC_AD10 Register" bitfld.long 0x00 6. "CONF_GMPC_AD10_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_AD10_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_AD10_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_AD10_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_AD10_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x82C++0x03 line.long 0x00 "CONF_GPMC_AD11,CONF_GPMC_AD11 Register" bitfld.long 0x00 6. "CONF_GMPC_AD11_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_AD11_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_AD11_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_AD11_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_AD11_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x830++0x03 line.long 0x00 "CONF_GPMC_AD12,CONF_GPMC_AD12 Register" bitfld.long 0x00 6. "CONF_GMPC_AD12_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_AD12_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_AD12_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_AD12_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_AD12_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x834++0x03 line.long 0x00 "CONF_GPMC_AD13,CONF_GPMC_AD13 Register" bitfld.long 0x00 6. "CONF_GMPC_AD13_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_AD13_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_AD13_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_AD13_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_AD13_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x838++0x03 line.long 0x00 "CONF_GPMC_AD14,CONF_GPMC_AD14 Register" bitfld.long 0x00 6. "CONF_GMPC_AD14_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_AD14_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_AD14_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_AD14_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_AD14_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x840++0x03 line.long 0x00 "CONF_GPMC_A0,CONF_GPMC_A0 Register" bitfld.long 0x00 6. "CONF_GMPC_A0_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_A0_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_A0_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_A0_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_A0_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x844++0x03 line.long 0x00 "CONF_GPMC_A1,CONF_GPMC_A1 Register" bitfld.long 0x00 6. "CONF_GMPC_A1_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_A1_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_A1_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_A1_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_A1_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x848++0x03 line.long 0x00 "CONF_GPMC_A2,CONF_GPMC_A2 Register" bitfld.long 0x00 6. "CONF_GMPC_A2_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_A2_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_A2_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_A2_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_A2_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x84C++0x03 line.long 0x00 "CONF_GPMC_A3,CONF_GPMC_A3 Register" bitfld.long 0x00 6. "CONF_GMPC_A3_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_A3_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_A3_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_A3_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_A3_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x850++0x03 line.long 0x00 "CONF_GPMC_A4,CONF_GPMC_A4 Register" bitfld.long 0x00 6. "CONF_GMPC_A4_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_A4_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_A4_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_A4_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_A4_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x854++0x03 line.long 0x00 "CONF_GPMC_A5,CONF_GPMC_A5 Register" bitfld.long 0x00 6. "CONF_GMPC_A5_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_A5_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_A5_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_A5_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_A5_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x858++0x03 line.long 0x00 "CONF_GPMC_A6,CONF_GPMC_A6 Register" bitfld.long 0x00 6. "CONF_GMPC_A6_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_A6_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_A6_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_A6_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_A6_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x85C++0x03 line.long 0x00 "CONF_GPMC_A7,CONF_GPMC_A7 Register" bitfld.long 0x00 6. "CONF_GMPC_A7_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_A7_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_A7_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_A7_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_A7_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x860++0x03 line.long 0x00 "CONF_GPMC_A8,CONF_GPMC_A8 Register" bitfld.long 0x00 6. "CONF_GMPC_A8_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_A8_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_A8_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_A8_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_A8_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x864++0x03 line.long 0x00 "CONF_GPMC_A9,CONF_GPMC_A9 Register" bitfld.long 0x00 6. "CONF_GMPC_A9_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_A9_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_A9_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_A9_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_A9_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x864++0x03 line.long 0x00 "CONF_GPMC_A10,CONF_GPMC_A10 Register" bitfld.long 0x00 6. "CONF_GMPC_A10_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_A10_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_A10_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_A10_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_A10_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x868++0x03 line.long 0x00 "CONF_GPMC_A11,CONF_GPMC_A11 Register" bitfld.long 0x00 6. "CONF_GMPC_A11_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_A11_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_A11_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_A11_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_A11_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x870++0x07 line.long 0x00 "CONF_GPMC_WAIT0,CONF_GPMC_WAIT0 Register" bitfld.long 0x00 6. "CONF_GMPC_WAIT0_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_WAIT0_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_WAIT0_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_WAIT0_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_AWAIT0_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x04 "CONF_GPMC_WPN,CONF_GPMC_WPN Register" bitfld.long 0x04 6. "CONF_GMPC_WPN_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x04 5. "CONF_GMPC_WPN_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x04 4. "CONF_GMPC_WPN_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x04 3. "CONF_GMPC_WPN_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x04 0.--2. "CONF_GMPC_AWPN_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x878++0x03 line.long 0x00 "CONF_GPMC_BEN1,CONF_GPMC_BEN1 Register" bitfld.long 0x00 6. "CONF_GMPC_BEN1_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_BEN1_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_BEN1_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_BEN1_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_ABEN1_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x87C++0x03 line.long 0x00 "CONF_GPMC_CSN0,CONF_GPMC_CSN0 Register" bitfld.long 0x00 6. "CONF_GMPC_CSN0_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_CSN0_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_CSN0_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_CSN0_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_ACSN0_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x880++0x03 line.long 0x00 "CONF_GPMC_CSN1,CONF_GPMC_CSN1 Register" bitfld.long 0x00 6. "CONF_GMPC_CSN1_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_CSN1_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_CSN1_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_CSN1_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_ACSN1_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x884++0x03 line.long 0x00 "CONF_GPMC_CSN1,CONF_GPMC_CSN1 Register" bitfld.long 0x00 6. "CONF_GMPC_CSN1_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_CSN1_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_CSN1_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_CSN1_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_ACSN1_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x888++0x03 line.long 0x00 "CONF_GPMC_CSN3,CONF_GPMC_CSN3 Register" bitfld.long 0x00 6. "CONF_GMPC_CSN3_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_CSN3_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_CSN3_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_CSN3_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_ACSN3_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x88C++0x13 line.long 0x00 "CONF_GPMC_CLK,CONF_GPMC_CLK Register" bitfld.long 0x00 6. "CONF_GMPC_CLK_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_GMPC_CLK_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_GMPC_CLK_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_GMPC_CLK_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_GMPC_ACLK_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x04 "CONF_GPMC_ADVN_ALE,CONF_GPMC_ADVN_ALE Register" bitfld.long 0x04 6. "CONF_GMPC_ADVN_ALE_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x04 5. "CONF_GMPC_ADVN_ALE_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x04 4. "CONF_GMPC_ADVN_ALE_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x04 3. "CONF_GMPC_ADVN_ALE_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x04 0.--2. "CONF_GMPC_AADVN_ALE_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x08 "CONF_GPMC_OEN_REN,CONF_GPMC_OEN_REN Register" bitfld.long 0x08 6. "CONF_GMPC_OEN_REN_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x08 5. "CONF_GMPC_OEN_REN_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x08 4. "CONF_GMPC_OEN_REN_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x08 3. "CONF_GMPC_OEN_REN_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x08 0.--2. "CONF_GMPC_AOEN_REN_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x0C "CONF_GPMC_WEN,CONF_GPMC_WEN Register" bitfld.long 0x0C 6. "CONF_GMPC_WEN_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x0C 5. "CONF_GMPC_WEN_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x0C 4. "CONF_GMPC_WEN_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x0C 3. "CONF_GMPC_WEN_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x0C 0.--2. "CONF_GMPC_AWEN_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x10 "CONF_GPMC_BEN0_CLE,CONF_GPMC_BEN0_CLE Register" bitfld.long 0x10 6. "CONF_GMPC_BEN0_CLE_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x10 5. "CONF_GMPC_BEN0_CLE_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x10 4. "CONF_GMPC_BEN0_CLE_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x10 3. "CONF_GMPC_BEN0_CLE_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x10 0.--2. "CONF_GMPC_ABEN0_CLE_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8A0++0x03 line.long 0x00 "CONF_LCD_DATA1,CONF_LCD_DATA1 Register" bitfld.long 0x00 6. "CONF_LCD_DATA1_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_LCD_DATA1_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_LCD_DATA1_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_LCD_DATA1_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_LCD_DATA1_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8A4++0x03 line.long 0x00 "CONF_LCD_DATA2,CONF_LCD_DATA2 Register" bitfld.long 0x00 6. "CONF_LCD_DATA2_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_LCD_DATA2_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_LCD_DATA2_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_LCD_DATA2_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_LCD_DATA2_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8A8++0x03 line.long 0x00 "CONF_LCD_DATA3,CONF_LCD_DATA3 Register" bitfld.long 0x00 6. "CONF_LCD_DATA3_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_LCD_DATA3_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_LCD_DATA3_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_LCD_DATA3_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_LCD_DATA3_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8AC++0x03 line.long 0x00 "CONF_LCD_DATA4,CONF_LCD_DATA4 Register" bitfld.long 0x00 6. "CONF_LCD_DATA4_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_LCD_DATA4_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_LCD_DATA4_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_LCD_DATA4_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_LCD_DATA4_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8B0++0x03 line.long 0x00 "CONF_LCD_DATA5,CONF_LCD_DATA5 Register" bitfld.long 0x00 6. "CONF_LCD_DATA5_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_LCD_DATA5_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_LCD_DATA5_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_LCD_DATA5_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_LCD_DATA5_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8B4++0x03 line.long 0x00 "CONF_LCD_DATA6,CONF_LCD_DATA6 Register" bitfld.long 0x00 6. "CONF_LCD_DATA6_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_LCD_DATA6_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_LCD_DATA6_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_LCD_DATA6_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_LCD_DATA6_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8B8++0x03 line.long 0x00 "CONF_LCD_DATA7,CONF_LCD_DATA7 Register" bitfld.long 0x00 6. "CONF_LCD_DATA7_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_LCD_DATA7_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_LCD_DATA7_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_LCD_DATA7_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_LCD_DATA7_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8BC++0x03 line.long 0x00 "CONF_LCD_DATA8,CONF_LCD_DATA8 Register" bitfld.long 0x00 6. "CONF_LCD_DATA8_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_LCD_DATA8_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_LCD_DATA8_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_LCD_DATA8_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_LCD_DATA8_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8C0++0x03 line.long 0x00 "CONF_LCD_DATA9,CONF_LCD_DATA9 Register" bitfld.long 0x00 6. "CONF_LCD_DATA9_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_LCD_DATA9_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_LCD_DATA9_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_LCD_DATA9_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_LCD_DATA9_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8C4++0x03 line.long 0x00 "CONF_LCD_DATA10,CONF_LCD_DATA10 Register" bitfld.long 0x00 6. "CONF_LCD_DATA10_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_LCD_DATA10_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_LCD_DATA10_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_LCD_DATA10_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_LCD_DATA10_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8C8++0x03 line.long 0x00 "CONF_LCD_DATA11,CONF_LCD_DATA11 Register" bitfld.long 0x00 6. "CONF_LCD_DATA11_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_LCD_DATA11_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_LCD_DATA11_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_LCD_DATA11_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_LCD_DATA11_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8CC++0x03 line.long 0x00 "CONF_LCD_DATA12,CONF_LCD_DATA12 Register" bitfld.long 0x00 6. "CONF_LCD_DATA12_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_LCD_DATA12_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_LCD_DATA12_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_LCD_DATA12_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_LCD_DATA12_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8D0++0x03 line.long 0x00 "CONF_LCD_DATA13,CONF_LCD_DATA13 Register" bitfld.long 0x00 6. "CONF_LCD_DATA13_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_LCD_DATA13_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_LCD_DATA13_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_LCD_DATA13_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_LCD_DATA13_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8D4++0x03 line.long 0x00 "CONF_LCD_DATA14,CONF_LCD_DATA14 Register" bitfld.long 0x00 6. "CONF_LCD_DATA14_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_LCD_DATA14_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_LCD_DATA14_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_LCD_DATA14_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_LCD_DATA14_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8E0++0x03 line.long 0x00 "CONF_LCD_VSYNC,CONF_LCD_VSYNC Register" bitfld.long 0x00 6. "CONF_LCD_VSYNC_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_LCD_VSYNC_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_LCD_VSYNC_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_LCD_VSYNC_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_LCD_VSYNC_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8E4++0x03 line.long 0x00 "CONF_LCD_HSYNC,CONF_LCD_HSYNC Register" bitfld.long 0x00 6. "CONF_LCD_HSYNC_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_LCD_HSYNC_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_LCD_HSYNC_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_LCD_HSYNC_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_LCD_HSYNC_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8E8++0x07 line.long 0x00 "CONF_LCD_PCLK,CONF_LCD_PCLK Register" bitfld.long 0x00 6. "CONF_LCD_PCLK_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_LCD_PCLK_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_LCD_PCLK_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_LCD_PCLK_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_LCD_PCLK_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x04 "CONF_LCD_AC_BIAS_EN,CONF_LCD_AC_BIAS_EN Register" bitfld.long 0x04 6. "CONF_LCD_AC_BIAS_EN_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x04 5. "CONF_LCD_AC_BIAS_EN_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x04 4. "CONF_LCD_AC_BIAS_EN_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x04 3. "CONF_LCD_AC_BIAS_EN_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x04 0.--2. "CONF_LCD_AC_BIAS_EN_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8F0++0x03 line.long 0x00 "CONF_MMC0_DAT3,CONF_MMC0_DAT3 Register" bitfld.long 0x00 6. "CONF_MMC0_DAT3_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MMC0_DAT3_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MMC0_DAT3_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MMC0_DAT3_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MMC0_DAT3_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8F4++0x03 line.long 0x00 "CONF_MMC0_DAT2,CONF_MMC0_DAT2 Register" bitfld.long 0x00 6. "CONF_MMC0_DAT2_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MMC0_DAT2_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MMC0_DAT2_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MMC0_DAT2_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MMC0_DAT2_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8F8++0x03 line.long 0x00 "CONF_MMC0_DAT1,CONF_MMC0_DAT1 Register" bitfld.long 0x00 6. "CONF_MMC0_DAT1_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MMC0_DAT1_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MMC0_DAT1_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MMC0_DAT1_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MMC0_DAT1_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8F8++0x03 line.long 0x00 "CONF_MMC_DAT0,CONF_MMC_DAT0 Register" bitfld.long 0x00 6. "CONF_MMC_DAT0_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MMC_DAT0_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MMC_DAT0_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MMC_DAT0_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MMC_DAT0_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x8FC++0x03 line.long 0x00 "CONF_MMC0_CLK,CONF_MMC0_CLK Register" bitfld.long 0x00 6. "CONF_MMC0_CLK_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MMC0_CLK_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MMC0_CLK_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MMC0_CLK_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MMC0_CLK_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x904++0x03 line.long 0x00 "CONF_MMC_CMD,CONF_MMC_CMD Register" bitfld.long 0x00 6. "CONF_MMC_CMD_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MMC_CMD_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MMC_CMD_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MMC_CMD_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MMC_CMD_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x908++0x03 line.long 0x00 "CONF_MII1_COL,CONF_MII1_COL Register" bitfld.long 0x00 6. "CONF_MII1_COL_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MII1_COL_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MII1_COL_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MII1_COL_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MII1_COL_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x90C++0x03 line.long 0x00 "CONF_MII1_CRS,CONF_MII1_CRS Register" bitfld.long 0x00 6. "CONF_MII1_CRS_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MII1_CRS_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MII1_CRS_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MII1_CRS_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MII1_CRS_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x910++0x03 line.long 0x00 "CONF_MII1_RX_ER,CONF_MII1_RX_ER Register" bitfld.long 0x00 6. "CONF_MII1_RX_ER_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MII1_RX_ER_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MII1_RX_ER_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MII1_RX_ER_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MII1_RX_ER_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x914++0x03 line.long 0x00 "CONF_MII1_TX_EN,CONF_MII1_TX_EN Register" bitfld.long 0x00 6. "CONF_MII1_TX_EN_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MII1_TX_EN_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MII1_TX_EN_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MII1_TX_EN_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MII1_TX_EN_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x918++0x03 line.long 0x00 "CONF_MII1_RX_DV,CONF_MII1_RX_DV Register" bitfld.long 0x00 6. "CONF_MII1_RX_DV_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MII1_RX_DV_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MII1_RX_DV_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MII1_RX_DV_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MII1_RX_DV_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x91C++0x03 line.long 0x00 "CONF_MII1_TXD3,CONF_MII1_TXD3 Register" bitfld.long 0x00 6. "CONF_MII1_TXD3_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MII1_TXD3_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MII1_TXD3_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MII1_TXD3_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MII1_TXD3_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x920++0x03 line.long 0x00 "CONF_MII1_TXD2,CONF_MII1_TXD2 Register" bitfld.long 0x00 6. "CONF_MII1_TXD2_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MII1_TXD2_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MII1_TXD2_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MII1_TXD2_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MII1_TXD2_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x924++0x03 line.long 0x00 "CONF_MII1_TXD1,CONF_MII1_TXD1 Register" bitfld.long 0x00 6. "CONF_MII1_TXD1_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MII1_TXD1_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MII1_TXD1_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MII1_TXD1_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MII1_TXD1_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x928++0x03 line.long 0x00 "CONF_MII1_TXD0,CONF_MII1_TXD0 Register" bitfld.long 0x00 6. "CONF_MII1_TXD0_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MII1_TXD0_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MII1_TXD0_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MII1_TXD0_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MII1_TXD0_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x92C++0x03 line.long 0x00 "CONF_MII1_TX_CLK,CONF_MII1_TX_CLK Register" bitfld.long 0x00 6. "CONF_MII1_TX_CLK_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MII1_TX_CLK_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MII1_TX_CLK_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MII1_TX_CLK_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MII1_TX_CLK_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x930++0x03 line.long 0x00 "CONF_MII1_RX_CLK,CONF_MII1_RX_CLK Register" bitfld.long 0x00 6. "CONF_MII1_RX_CLK_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MII1_RX_CLK_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MII1_RX_CLK_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MII1_RX_CLK_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MII1_RX_CLK_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x934++0x03 line.long 0x00 "CONF_MII1_RXD3,CONF_MII1_RXD3 Register" bitfld.long 0x00 6. "CONF_MII1_RXD3_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MII1_RXD3_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MII1_RXD3_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MII1_RXD3_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MII1_RXD3_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x938++0x03 line.long 0x00 "CONF_MII1_RXD2,CONF_MII1_RXD2 Register" bitfld.long 0x00 6. "CONF_MII1_RXD2_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MII1_RXD2_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MII1_RXD2_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MII1_RXD2_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MII1_RXD2_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x93C++0x03 line.long 0x00 "CONF_MII1_RXD1,CONF_MII1_RXD1 Register" bitfld.long 0x00 6. "CONF_MII1_RXD1_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MII1_RXD1_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MII1_RXD1_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MII1_RXD1_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MII1_RXD1_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x940++0x03 line.long 0x00 "CONF_MII1_RXD0,CONF_MII1_RXD0 Register" bitfld.long 0x00 6. "CONF_MII1_RXD0_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_MII1_RXD0_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_MII1_RXD0_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_MII1_RXD0_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_MII1_RXD0_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x944++0x1F line.long 0x00 "CONF_RMII1_REF_CLK,CONF_RMII1_REF_CLK Register" bitfld.long 0x00 6. "CONF_RMII1_REF_CLK_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_RMII1_REF_CLK_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_RMII1_REF_CLK_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_RMII1_REF_CLK_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_RMII1_REF_CLK_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x04 "CONF_MDIO,CONF_MDIO Register" bitfld.long 0x04 6. "CONF_MDIO_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x04 5. "CONF_MDIO_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x04 4. "CONF_MDIO_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x04 3. "CONF_MDIOPUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x04 0.--2. "CONF_MDIO_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x08 "CONF_MDC,CONF_MDC Register" bitfld.long 0x08 6. "CONF_MDC_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x08 5. "CONF_MDC_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x08 4. "CONF_MDC_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x08 3. "CONF_MDC_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x08 0.--2. "CONF_MDC_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x0C "CONF_SPI0_SCLK,CONF_SPI0_SCLK Register" bitfld.long 0x0C 6. "CONF_SPI0_SCLK_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x0C 5. "CONF_SPI0_SCLK_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x0C 4. "CONF_SPI0_SCLK_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x0C 3. "CONF_SPI0_SCLK_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x0C 0.--2. "CONF_SPI0_SCLK_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x10 "CONF_SPI0_D0,CONF_SPI0_D0 Register" bitfld.long 0x10 6. "CONF_SPI0_D0_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x10 5. "CONF_SPI0_D0_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x10 4. "CONF_SPI0_D0_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x10 3. "CONF_SPI0_D0_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x10 0.--2. "CONF_SPI0_D1_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x14 "CONF_SPI0_D1,CONF_SPI0_D1 Register" bitfld.long 0x14 6. "CONF_SPI0_D1_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x14 5. "CONF_SPI0_D1_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x14 4. "CONF_SPI0_D1_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x14 3. "CONF_SPI0_D1_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x14 0.--2. "CONF_SPI0_D1_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x18 "CONF_SPI0_CS0,CONF_SPI0_CS0 Register" bitfld.long 0x18 6. "CONF_SPI0_CS0_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x18 5. "CONF_SPI0_CS0_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x18 4. "CONF_SPI0_CS0_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x18 3. "CONF_SPI0_CS0_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x18 0.--2. "CONF_SPI0_CS0_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x1C "CONF_SPI0_CS1,CONF_SPI0_CS1 Register" bitfld.long 0x1C 6. "CONF_SPI0_CS1_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x1C 5. "CONF_SPI0_CS1_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x1C 4. "CONF_SPI0_CS1_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x1C 3. "CONF_SPI0_CS1_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x1C 0.--2. "CONF_SPI0_CS1_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x964++0x03 line.long 0x00 "CONF_ECAP0_IN_PWM0_OUT,CONF_ECAP0_IN_PWM0_OUT Register" bitfld.long 0x00 6. "CONF_ECAP0_IN_PWM0_OUT_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_ECAP0_IN_PWM0_OUT_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_ECAP0_IN_PWM0_OUT_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_ECAP0_IN_PWM0_OUT_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_ECAP0_IN_PWM0_OUT_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x968++0x03 line.long 0x00 "CONF_USB0_CTSN,CONF_USB0_CTSN Register" bitfld.long 0x00 6. "CONF_USB0_CTSN_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_USB0_CTSN_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_USB0_CTSN_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_USB0_CTSN_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_USB0_CTSN_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x96C++0x03 line.long 0x00 "CONF_USB0_RTSN,CONF_USB0_RTSN Register" bitfld.long 0x00 6. "CONF_USB0_RTSN_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_USB0_RTSN_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_USB0_RTSN_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_USB0_RTSN_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_USB0_RTSN_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x970++0x03 line.long 0x00 "CONF_USB0_RXD,CONF_USB0_RXD Register" bitfld.long 0x00 6. "CONF_USB0_RXD_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_USB0_RXD_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_USB0_RXD_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_USB0_RXD_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_USB0_RXD_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x974++0x03 line.long 0x00 "CONF_USB0_TXD,CONF_USB0_TXD Register" bitfld.long 0x00 6. "CONF_USB0_TXD_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_USB0_TXD_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_USB0_TXD_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_USB0_TXD_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_USB0_TXD_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x978++0x03 line.long 0x00 "CONF_USB1_CTSN,CONF_USB1_CTSN Register" bitfld.long 0x00 6. "CONF_USB1_CTSN_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_USB1_CTSN_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_USB1_CTSN_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_USB1_CTSN_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_USB1_CTSN_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x97C++0x03 line.long 0x00 "CONF_USB1_RTSN,CONF_USB1_RTSN Register" bitfld.long 0x00 6. "CONF_USB1_RTSN_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_USB1_RTSN_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_USB1_RTSN_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_USB1_RTSN_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_USB1_RTSN_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x980++0x03 line.long 0x00 "CONF_USB1_RXD,CONF_USB1_RXD Register" bitfld.long 0x00 6. "CONF_USB1_RXD_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_USB1_RXD_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_USB1_RXD_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_USB1_RXD_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_USB1_RXD_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x984++0x03 line.long 0x00 "CONF_USB1_TXD,CONF_USB1_TXD Register" bitfld.long 0x00 6. "CONF_USB1_TXD_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_USB1_TXD_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_USB1_TXD_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_USB1_TXD_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_USB1_TXD_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x988++0x03 line.long 0x00 "CONF_I2C0_SDA,CONF_I2C0_SDA Register" bitfld.long 0x00 6. "CONF_I2C0_SDA_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_I2C0_SDA_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_I2C0_SDA_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_I2C0_SDA_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_I2C0_SDA_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x98C++0x03 line.long 0x00 "CONF_I2C0_SCL,CONF_I2C0_SCL Register" bitfld.long 0x00 6. "CONF_I2C0_SCL_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_I2C0_SCL_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_I2C0_SCL_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_I2C0_SCL_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_I2C0_SCL_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x990++0x1F line.long 0x00 "CONF_I2C0_ACLKX,CONF_I2C0_ACLKX Register" bitfld.long 0x00 6. "CONF_I2C0_ACLKX_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_I2C0_ACLKX_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_I2C0_ACLKX_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_I2C0_ACLKX_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_I2C0_ACLKX_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x04 "CONF_I2C0_FSX,CONF_I2C0_FSX Register" bitfld.long 0x04 6. "CONF_I2C0_FSX_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x04 5. "CONF_I2C0_FSX_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x04 4. "CONF_I2C0_FSX_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x04 3. "CONF_I2C0_FSX_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x04 0.--2. "CONF_I2C0_FSX_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x08 "CONF_I2C0_AXR0,CONF_I2C0_AXR0 Register" bitfld.long 0x08 6. "CONF_I2C0_AXR0_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x08 5. "CONF_I2C0_AXR0_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x08 4. "CONF_I2C0_AXR0_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x08 3. "CONF_I2C0_AXR0_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x08 0.--2. "CONF_I2C0_AXR0_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x0C "CONF_I2C0_AHCLKR,CONF_I2C0_AHCLKR Register" bitfld.long 0x0C 6. "CONF_I2C0_AHCLKR_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x0C 5. "CONF_I2C0_AHCLKR_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x0C 4. "CONF_I2C0_AHCLKR_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x0C 3. "CONF_I2C0_AHCLKR_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x0C 0.--2. "CONF_I2C0_AHCLKR_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x10 "CONF_I2C0_ACLKR,CONF_I2C0_ACLKR Register" bitfld.long 0x10 6. "CONF_I2C0_ACLKR_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x10 5. "CONF_I2C0_ACLKR_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x10 4. "CONF_I2C0_ACLKR_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x10 3. "CONF_I2C0_ACLKR_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x10 0.--2. "CONF_I2C0_ACLKR_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x14 "CONF_I2C0_FSR,CONF_I2C0_FSR Register" bitfld.long 0x14 6. "CONF_I2C0_FSR_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x14 5. "CONF_I2C0_FSR_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x14 4. "CONF_I2C0_FSR_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x14 3. "CONF_I2C0_FSR_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x14 0.--2. "CONF_I2C0_FSR_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x18 "CONF_I2C0_AXR1,CONF_I2C0_AXR1 Register" bitfld.long 0x18 6. "CONF_I2C0_AXR1_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x18 5. "CONF_I2C0_AXR1_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x18 4. "CONF_I2C0_AXR1_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x18 3. "CONF_I2C0_AXR1_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x18 0.--2. "CONF_I2C0_AXR1_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x1C "CONF_I2C0_AHCLKX,CONF_I2C0_AHCLKX Register" bitfld.long 0x1C 6. "CONF_I2C0_AHCLKX_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x1C 5. "CONF_I2C0_AHCLKX_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x1C 4. "CONF_I2C0_AHCLKX_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x1C 3. "CONF_I2C0_AHCLKX_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x1C 0.--2. "CONF_I2C0_AHCLKX_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x9B0++0x03 line.long 0x00 "CONF_XDMA_EVENT_INTR0,CONF_XDMA_EVENT_INTR0 Register" bitfld.long 0x00 6. "CONF_XDMA_EVENT_INTR0_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_XDMA_EVENT_INTR0_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_XDMA_EVENT_INTR0_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_XDMA_EVENT_INTR0_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_XDMA_EVENT_INTR0_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x9B4++0x03 line.long 0x00 "CONF_XDMA_EVENT_INTR1,CONF_XDMA_EVENT_INTR1 Register" bitfld.long 0x00 6. "CONF_XDMA_EVENT_INTR1_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_XDMA_EVENT_INTR1_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_XDMA_EVENT_INTR1_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_XDMA_EVENT_INTR1_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_XDMA_EVENT_INTR1_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x9B8++0x07 line.long 0x00 "CONF_WARMRSTN,CONF_WARMRSTN Register" bitfld.long 0x00 6. "CONF_WARMRSTN_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_WARMRSTN_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_WARMRSTN_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_WARMRSTN_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_WARMRSTN_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x04 "CONF_NNMI,CONF_NNMI Register" bitfld.long 0x04 6. "CONF_NNMI_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x04 5. "CONF_NNMI_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x04 4. "CONF_NNMI_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x04 3. "CONF_NNMI_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x04 0.--2. "CONF_NNMI_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x9C0++0x03 line.long 0x00 "CONF_TMS,CONF_TMS Register" bitfld.long 0x00 6. "CONF_TMS_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_TMS_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_TMS_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_TMS_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_TMS_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x9C4++0x03 line.long 0x00 "CONF_TDI,CONF_TDI Register" bitfld.long 0x00 6. "CONF_TDI_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_TDI_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_TDI_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_TDI_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_TDI_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x9C8++0x03 line.long 0x00 "CONF_TDO,CONF_TDO Register" bitfld.long 0x00 6. "CONF_TDO_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_TDO_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_TDO_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_TDO_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_TDO_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x9CC++0x03 line.long 0x00 "CONF_TCK,CONF_TCK Register" bitfld.long 0x00 6. "CONF_TCK_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_TCK_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_TCK_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_TCK_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_TCK_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x9D0++0x0B line.long 0x00 "CONF_TRSTN,CONF_TRSTN Register" bitfld.long 0x00 6. "CONF_TRSTN_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_TRSTN_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_TRSTN_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_TRSTN_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_TRSTN_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x04 "CONF_EMU0,CONF_EMU0 Register" bitfld.long 0x04 6. "CONF_EMU0_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x04 5. "CONF_EMU0_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x04 4. "CONF_EMU0_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x04 3. "CONF_EMU0_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x04 0.--2. "CONF_EMU0_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x08 "CONF_EMU1,CONF_EMU1 Register" bitfld.long 0x08 6. "CONF_EMU1_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x08 5. "CONF_EMU1_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x08 4. "CONF_EMU1_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x08 3. "CONF_EMU1_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x08 0.--2. "CONF_EMU1_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x9F8++0x03 line.long 0x00 "CONF_RTC_PWRONRSTN,CONF_RTC_PWRONRSTN Register" bitfld.long 0x00 6. "CONF_RTC_PWRONRSTN_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_RTC_PWRONRSTN_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_RTC_PWRONRSTN_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_RTC_PWRONRSTN_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_RTC_PWRONRSTN_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0x9FC++0x03 line.long 0x00 "CONF_PMIC_POWER_EN,CONF_PMIC_POWER_EN Register" bitfld.long 0x00 6. "CONF_PMIC_POWER_EN_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_PMIC_POWER_EN_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_PMIC_POWER_EN_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_PMIC_POWER_EN_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_PMIC_POWER_EN_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0xA00++0x07 line.long 0x00 "CONF_EXT_WAKEUP,CONF_EXT_WAKEUP Register" bitfld.long 0x00 6. "CONF_EXT_WAKEUP_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_EXT_WAKEUP_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_EXT_WAKEUP_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_EXT_WAKEUP_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_EXT_WAKEUP_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" line.long 0x04 "CONF_RTC_KALDO_ENN,CONF_RTC_KALDO_ENN Register" bitfld.long 0x04 6. "CONF_RTC_KALDO_ENN_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x04 5. "CONF_RTC_KALDO_ENN_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x04 4. "CONF_RTC_KALDO_ENN_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x04 3. "CONF_RTC_KALDO_ENN_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x04 0.--2. "CONF_RTC_KALDO_ENN_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0xA1C++0x03 line.long 0x00 "CONF_USB0_DRVVBUS,CONF_USB0_DRVVBUS Register" bitfld.long 0x00 6. "CONF_USB0_DRVVBUS_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_USB0_DRVVBUS_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_USB0_DRVVBUS_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_USB0_DRVVBUS_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_USB0_DRVVBUS_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" group.long 0xA34++0x03 line.long 0x00 "CONF_USB1_DRVVBUS,CONF_USB1_DRVVBUS Register" bitfld.long 0x00 6. "CONF_USB1_DRVVBUS_SLEWCTRL,Select between faster or slower slew rate" "Fast,Slow" bitfld.long 0x00 5. "CONF_USB1_DRVVBUS_RXACTIVE,Input enable value for the PAD" "Disabled,Enabled" newline bitfld.long 0x00 4. "CONF_USB1_DRVVBUS_PUTYPSEL,Pad pullup/pulldown type selection" "Pulldown,Pullup" bitfld.long 0x00 3. "CONF_USB1_DRVVBUS_PUDEN,Pad pullup/pulldown disable" "No,Yes" newline bitfld.long 0x00 0.--2. "CONF_USB1_DRVVBUS_MMODE,Pad functional signal mux select" "0,1,2,3,4,5,6,7" rgroup.long 0xE00++0x03 line.long 0x00 "CQDETECT_STATUS,CQDETECT_STATUS Register" bitfld.long 0x00 13. "CQERR_GENERAL,Cqdetect mode error status" "No error,Error" bitfld.long 0x00 12. "CQERR_GEMAC_B,Cqdetect mode error status" "No error,Error" newline bitfld.long 0x00 11. "CQERR_GEMAC_A,Cqdetect mode error status" "No error,Error" bitfld.long 0x00 10. "CQERR_MMCSD_B,Cqdetect mode error status" "No error,Error" newline bitfld.long 0x00 9. "CQERR_MMCSD_A,Cqdetect mode error status" "No error,Error" bitfld.long 0x00 8. "CQERR_GPMC,Cqdetect mode error status" "No error,Error" newline bitfld.long 0x00 5. "CQSTAT_GENERAL,IO mode select" "3.3 V,1.8 V" bitfld.long 0x00 4. "CQSTAT_GEMAC_B,IO mode select" "3.3 V,1.8 V" newline bitfld.long 0x00 3. "CQSTAT_GEMAC_A,IO mode select" "3.3 V,1.8 V" bitfld.long 0x00 2. "CQSTAT_MMCSD_B,IO mode select" "3.3 V,1.8 V" newline bitfld.long 0x00 1. "CQSTAT_MMCSD_A,IO mode select" "3.3 V,1.8 V" bitfld.long 0x00 0. "CQSTAT_GPMC,IO mode select" "3.3 V,1.8 V" group.long 0xE04++0x03 line.long 0x00 "DDR_IO_CTRL,DDR_IO_CTRL Register" bitfld.long 0x00 31. "DDR3_RST_DEF_VAL,DDR3 reset default value" "0,1" bitfld.long 0x00 30. "DDR_WUCLK_DISABLE,WUCLKIN and ISOCLKIN disable" "Free-running,Synchronously gated" newline bitfld.long 0x00 28. "MDDR_SEL,MDDR select" "DDR2/DDR3,Mddr" group.long 0xE0C++0x03 line.long 0x00 "VTP_CTRL,VTP_CTRL Register" hexmask.long.byte 0x00 16.--22. 1. "PCIN,Default/reset values of 'P' for the VTP controller" hexmask.long.byte 0x00 8.--14. 1. "NCIN,Default/reset values of 'N' for the VTP controller" newline bitfld.long 0x00 6. "ENABLE,VTP mode" "Disabled,Enabled" rbitfld.long 0x00 5. "READY,Ready" "Not ready,Ready" newline bitfld.long 0x00 4. "LOCK,Lock" "Not locked,Locked" bitfld.long 0x00 1.--3. "FILTER,Digital filter" "Off,2,3,4,5,6,7,8" newline bitfld.long 0x00 0. "CLRZ,Clears flops" "No action,Clear" group.long 0xE14++0x03 line.long 0x00 "VREF_CTRL,VREF_CTRL Register" bitfld.long 0x00 3.--4. "DDR_VREF_CCAP,Select for coupling cap for DDR" "Disabled,BIAS2/VSS,BIAS2/VDDS,BIAS2/VSS and BIAS2/VDDS" bitfld.long 0x00 1.--2. "DDR_VREF_TAP,Select for int ref for DDR" "2ua,4ua,6ua,8ua" newline bitfld.long 0x00 0. "DDR_VREF_EN,Active high internal reference enable for DDR" "Disabled,Enabled" group.long 0xF90++0x0B line.long 0x00 "TPCC_EVT_MUX_0_3,TPCC_EVT_MUX_0_3 Register" bitfld.long 0x00 24.--29. "EVT_MUX_3,Selects 1 of 64 inputs for DMA event 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. "EVT_MUX_2,Selects 1 of 64 inputs for DMA event 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--13. "EVT_MUX_1,Selects 1 of 64 inputs for DMA event 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. "EVT_MUX_0,Selects 1 of 64 inputs for DMA event 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "TPCC_EVT_MUX_4_7,TPCC_EVT_MUX_4_7 Register" bitfld.long 0x04 24.--29. "EVT_MUX_7,Selects 1 of 64 inputs for DMA event 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. "EVT_MUX_6,Selects 1 of 64 inputs for DMA event 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x04 8.--13. "EVT_MUX_5,Selects 1 of 64 inputs for DMA event 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. "EVT_MUX_4,Selects 1 of 64 inputs for DMA event 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "TPCC_EVT_MUX_8_11,TPCC_EVT_MUX_8_11 Register" bitfld.long 0x08 24.--29. "EVT_MUX_11,Selects 1 of 64 inputs for DMA event 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 16.--21. "EVT_MUX_10,Selects 1 of 64 inputs for DMA event 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x08 8.--13. "EVT_MUX_9,Selects 1 of 64 inputs for DMA event 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--5. "EVT_MUX_8,Selects 1 of 64 inputs for DMA event 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xF9C++0x03 line.long 0x00 "TPCC_EVT_MUX_12_15,TPCC_EVT_MUX_12_15 Register" bitfld.long 0x00 24.--29. "EVT_MUX_15,Selects 1 of 64 inputs for DMA event 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. "EVT_MUX_14,Selects 1 of 64 inputs for DMA event 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--13. "EVT_MUX_13,Selects 1 of 64 inputs for DMA event 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. "EVT_MUX_12,Selects 1 of 64 inputs for DMA event 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xFA0++0x03 line.long 0x00 "TPCC_EVT_MUX_16_19,TPCC_EVT_MUX_16_19 Register" bitfld.long 0x00 24.--29. "EVT_MUX_19,Selects 1 of 64 inputs for DMA event 19" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. "EVT_MUX_18,Selects 1 of 64 inputs for DMA event 18" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--13. "EVT_MUX_17,Selects 1 of 64 inputs for DMA event 17" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. "EVT_MUX_16,Selects 1 of 64 inputs for DMA event 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xFA4++0x03 line.long 0x00 "TPCC_EVT_MUX_20_23,TPCC_EVT_MUX_20_23 Register" bitfld.long 0x00 24.--29. "EVT_MUX_23,Selects 1 of 64 inputs for DMA event 23" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. "EVT_MUX_22,Selects 1 of 64 inputs for DMA event 22" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--13. "EVT_MUX_21,Selects 1 of 64 inputs for DMA event 21" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. "EVT_MUX_20,Selects 1 of 64 inputs for DMA event 20" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xFA8++0x03 line.long 0x00 "TPCC_EVT_MUX_24_27,TPCC_EVT_MUX_24_27 Register" bitfld.long 0x00 24.--29. "EVT_MUX_27,Selects 1 of 64 inputs for DMA event 27" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. "EVT_MUX_26,Selects 1 of 64 inputs for DMA event 26" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--13. "EVT_MUX_25,Selects 1 of 64 inputs for DMA event 25" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. "EVT_MUX_24,Selects 1 of 64 inputs for DMA event 24" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xFAC++0x03 line.long 0x00 "TPCC_EVT_MUX_28_31,TPCC_EVT_MUX_28_31 Register" bitfld.long 0x00 24.--29. "EVT_MUX_31,Selects 1 of 64 inputs for DMA event 31" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. "EVT_MUX_30,Selects 1 of 64 inputs for DMA event 30" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--13. "EVT_MUX_29,Selects 1 of 64 inputs for DMA event 29" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. "EVT_MUX_28,Selects 1 of 64 inputs for DMA event 28" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xFB0++0x03 line.long 0x00 "TPCC_EVT_MUX_32_35,TPCC_EVT_MUX_32_35 Register" bitfld.long 0x00 24.--29. "EVT_MUX_35,Selects 1 of 64 inputs for DMA event 35" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. "EVT_MUX_34,Selects 1 of 64 inputs for DMA event 34" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--13. "EVT_MUX_33,Selects 1 of 64 inputs for DMA event 33" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. "EVT_MUX_32,Selects 1 of 64 inputs for DMA event 32" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xFB4++0x03 line.long 0x00 "TPCC_EVT_MUX_36_39,TPCC_EVT_MUX_36_39 Register" bitfld.long 0x00 24.--29. "EVT_MUX_39,Selects 1 of 64 inputs for DMA event 39" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. "EVT_MUX_38,Selects 1 of 64 inputs for DMA event 38" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--13. "EVT_MUX_37,Selects 1 of 64 inputs for DMA event 37" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. "EVT_MUX_36,Selects 1 of 64 inputs for DMA event 36" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xFB8++0x03 line.long 0x00 "TPCC_EVT_MUX_40_43,TPCC_EVT_MUX_40_43 Register" bitfld.long 0x00 24.--29. "EVT_MUX_43,Selects 1 of 64 inputs for DMA event 43" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. "EVT_MUX_42,Selects 1 of 64 inputs for DMA event 42" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--13. "EVT_MUX_41,Selects 1 of 64 inputs for DMA event 41" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. "EVT_MUX_40,Selects 1 of 64 inputs for DMA event 40" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xFBC++0x03 line.long 0x00 "TPCC_EVT_MUX_44_47,TPCC_EVT_MUX_44_47 Register" bitfld.long 0x00 24.--29. "EVT_MUX_47,Selects 1 of 64 inputs for DMA event 47" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. "EVT_MUX_46,Selects 1 of 64 inputs for DMA event 46" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--13. "EVT_MUX_45,Selects 1 of 64 inputs for DMA event 45" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. "EVT_MUX_44,Selects 1 of 64 inputs for DMA event 44" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xFC0++0x03 line.long 0x00 "TPCC_EVT_MUX_48_51,TPCC_EVT_MUX_48_51 Register" bitfld.long 0x00 24.--29. "EVT_MUX_51,Selects 1 of 64 inputs for DMA event 51" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. "EVT_MUX_50,Selects 1 of 64 inputs for DMA event 50" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--13. "EVT_MUX_49,Selects 1 of 64 inputs for DMA event 49" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. "EVT_MUX_48,Selects 1 of 64 inputs for DMA event 48" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xFC4++0x03 line.long 0x00 "TPCC_EVT_MUX_52_55,TPCC_EVT_MUX_52_55 Register" bitfld.long 0x00 24.--29. "EVT_MUX_55,Selects 1 of 64 inputs for DMA event 55" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. "EVT_MUX_54,Selects 1 of 64 inputs for DMA event 54" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--13. "EVT_MUX_53,Selects 1 of 64 inputs for DMA event 53" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. "EVT_MUX_52,Selects 1 of 64 inputs for DMA event 52" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xFC8++0x03 line.long 0x00 "TPCC_EVT_MUX_56_59,TPCC_EVT_MUX_56_59 Register" bitfld.long 0x00 24.--29. "EVT_MUX_59,Selects 1 of 64 inputs for DMA event 59" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. "EVT_MUX_58,Selects 1 of 64 inputs for DMA event 58" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--13. "EVT_MUX_57,Selects 1 of 64 inputs for DMA event 57" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. "EVT_MUX_56,Selects 1 of 64 inputs for DMA event 56" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xFCC++0x03 line.long 0x00 "TPCC_EVT_MUX_60_63,TPCC_EVT_MUX_60_63 Register" bitfld.long 0x00 24.--29. "EVT_MUX_63,Selects 1 of 64 inputs for DMA event 63" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. "EVT_MUX_62,Selects 1 of 64 inputs for DMA event 62" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--13. "EVT_MUX_61,Selects 1 of 64 inputs for DMA event 61" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. "EVT_MUX_60,Selects 1 of 64 inputs for DMA event 60" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xFD0++0x0B line.long 0x00 "TIMER_EVT_CAPT,TIMER_EVT_CAPT Register" bitfld.long 0x00 16.--20. "TIMER7_EVTCAPT,Timer 7 event capture mux" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. "TIMER6_EVTCAPT,Timer 7 event capture mux" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 0.--4. "TIMER5_EVTCAPT,Timer 7 event capture mux" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "ECAP_EVT_CAPT,ECAP_EVT_CAPT Register" bitfld.long 0x04 16.--20. "ECAP2_EVTCAPT,ECAP2 event capture mux" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. "ECAP1_EVTCAPT,ECAP1 event capture mux" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x04 0.--4. "ECAP0_EVTCAPT,ECAP0 event capture mux" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "ADC_EVT_CAPT,ADC_EVT_CAPT Register" bitfld.long 0x08 0.--4. "ADC_EVTCAPT,ADC event capture mux" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x1000++0x03 line.long 0x00 "RESET_ISO,RESET_ISO Register" bitfld.long 0x00 0. "ISO_CONTROL,Ethernet switch isolation enable" "Not isolated,Isolated" if (((d.l(ad:0x44E10000+0x1318))&0x80808000)==0x00) group.long 0x1318++0x03 line.long 0x00 "DPLL_PWR_SW_CTRL,DPLL_PWR_SW_CTRL Register" bitfld.long 0x00 31. "SW_CTRL_DDR_PLL,Enable software control over DDR DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" rbitfld.long 0x00 29. "ISOSCAN_DDR,Drives ISOSCAN of DDR PLL" "Low,High" newline rbitfld.long 0x00 28. "RET_DDR,Drives RET signal of DDR PLL" "Low,High" rbitfld.long 0x00 27. "RESET_DDR,Drives RESET of DDR DPLL" "Low,High" newline rbitfld.long 0x00 26. "ISO_DDR,Drives ISO of DDR DPLL" "Low,High" rbitfld.long 0x00 25. "PGOODIN_DDR,Drives PGOODIN of DDR DPLL" "Low,High" newline rbitfld.long 0x00 24. "PONIN_DDR,Drives PONIN of DDR DPLL" "Low,High" bitfld.long 0x00 23. "SW_CTRL_DISP_PLL,Enable software control over DISP DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" newline rbitfld.long 0x00 21. "ISOSCAN_DISP,Drives ISOSCAN of DISP PLL" "Low,High" rbitfld.long 0x00 20. "RET_DISP,Drives RET signal of DISP PLL" "Low,High" newline rbitfld.long 0x00 19. "RESET_DISP,Drives RESET of DISP DPLL" "Low,High" rbitfld.long 0x00 18. "ISO_DISP,Drives ISO of DISP DPLL" "Low,High" newline rbitfld.long 0x00 17. "PGOODIN_DISP,Drives PGOODIN of DISP DPLL" "Low,High" rbitfld.long 0x00 16. "PONIN_DISP,Drives PONIN of DISP DPLL" "Low,High" newline bitfld.long 0x00 15. "SW_CTRL_PER_PLL,Enable software control over DISP DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" rbitfld.long 0x00 13. "ISOSCAN_PER,Drives ISOSCAN of PER PLL" "Low,High" newline rbitfld.long 0x00 12. "RET_PER,Drives RET signal of PER PLL" "Low,High" rbitfld.long 0x00 11. "RESET_PER,Drives RESET of PER DPLL" "Low,High" newline rbitfld.long 0x00 10. "ISO_PER,Drives ISO of PER DPLL" "Low,High" rbitfld.long 0x00 9. "PGOODIN_PER,Drives PGOODIN of PER DPLL" "Low,High" newline rbitfld.long 0x00 8. "PONIN_PER,Drives PONIN of PER DPLL" "Low,High" elif (((d.l(ad:0x44E10000+0x1318))&0x80808000)==0x8000) group.long 0x1318++0x03 line.long 0x00 "DPLL_PWR_SW_CTRL,DPLL_PWR_SW_CTRL Register" bitfld.long 0x00 31. "SW_CTRL_DDR_PLL,Enable software control over DDR DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" rbitfld.long 0x00 29. "ISOSCAN_DDR,Drives ISOSCAN of DDR PLL" "Low,High" newline rbitfld.long 0x00 28. "RET_DDR,Drives RET signal of DDR PLL" "Low,High" rbitfld.long 0x00 27. "RESET_DDR,Drives RESET of DDR DPLL" "Low,High" newline rbitfld.long 0x00 26. "ISO_DDR,Drives ISO of DDR DPLL" "Low,High" rbitfld.long 0x00 25. "PGOODIN_DDR,Drives PGOODIN of DDR DPLL" "Low,High" newline rbitfld.long 0x00 24. "PONIN_DDR,Drives PONIN of DDR DPLL" "Low,High" bitfld.long 0x00 23. "SW_CTRL_DISP_PLL,Enable software control over DISP DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" newline rbitfld.long 0x00 21. "ISOSCAN_DISP,Drives ISOSCAN of DISP PLL" "Low,High" rbitfld.long 0x00 20. "RET_DISP,Drives RET signal of DISP PLL" "Low,High" newline rbitfld.long 0x00 19. "RESET_DISP,Drives RESET of DISP DPLL" "Low,High" rbitfld.long 0x00 18. "ISO_DISP,Drives ISO of DISP DPLL" "Low,High" newline rbitfld.long 0x00 17. "PGOODIN_DISP,Drives PGOODIN of DISP DPLL" "Low,High" rbitfld.long 0x00 16. "PONIN_DISP,Drives PONIN of DISP DPLL" "Low,High" newline bitfld.long 0x00 15. "SW_CTRL_PER_PLL,Enable software control over DISP DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" bitfld.long 0x00 13. "ISOSCAN_PER,Drives ISOSCAN of PER PLL" "Low,High" newline bitfld.long 0x00 12. "RET_PER,Drives RET signal of PER PLL" "Low,High" bitfld.long 0x00 11. "RESET_PER,Drives RESET of PER DPLL" "Low,High" newline bitfld.long 0x00 10. "ISO_PER,Drives ISO of PER DPLL" "Low,High" bitfld.long 0x00 9. "PGOODIN_PER,Drives PGOODIN of PER DPLL" "Low,High" newline bitfld.long 0x00 8. "PONIN_PER,Drives PONIN of PER DPLL" "Low,High" elif (((d.l(ad:0x44E10000+0x1318))&0x80808000)==0x800000) group.long 0x1318++0x03 line.long 0x00 "DPLL_PWR_SW_CTRL,DPLL_PWR_SW_CTRL Register" bitfld.long 0x00 31. "SW_CTRL_DDR_PLL,Enable software control over DDR DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" rbitfld.long 0x00 29. "ISOSCAN_DDR,Drives ISOSCAN of DDR PLL" "Low,High" newline rbitfld.long 0x00 28. "RET_DDR,Drives RET signal of DDR PLL" "Low,High" rbitfld.long 0x00 27. "RESET_DDR,Drives RESET of DDR DPLL" "Low,High" newline rbitfld.long 0x00 26. "ISO_DDR,Drives ISO of DDR DPLL" "Low,High" rbitfld.long 0x00 25. "PGOODIN_DDR,Drives PGOODIN of DDR DPLL" "Low,High" newline rbitfld.long 0x00 24. "PONIN_DDR,Drives PONIN of DDR DPLL" "Low,High" bitfld.long 0x00 23. "SW_CTRL_DISP_PLL,Enable software control over DISP DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" newline bitfld.long 0x00 21. "ISOSCAN_DISP,Drives ISOSCAN of DISP PLL" "Low,High" bitfld.long 0x00 20. "RET_DISP,Drives RET signal of DISP PLL" "Low,High" newline bitfld.long 0x00 19. "RESET_DISP,Drives RESET of DISP DPLL" "Low,High" bitfld.long 0x00 18. "ISO_DISP,Drives ISO of DISP DPLL" "Low,High" newline bitfld.long 0x00 17. "PGOODIN_DISP,Drives PGOODIN of DISP DPLL" "Low,High" bitfld.long 0x00 16. "PONIN_DISP,Drives PONIN of DISP DPLL" "Low,High" newline bitfld.long 0x00 15. "SW_CTRL_PER_PLL,Enable software control over DISP DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" rbitfld.long 0x00 13. "ISOSCAN_PER,Drives ISOSCAN of PER PLL" "Low,High" newline rbitfld.long 0x00 12. "RET_PER,Drives RET signal of PER PLL" "Low,High" rbitfld.long 0x00 11. "RESET_PER,Drives RESET of PER DPLL" "Low,High" newline rbitfld.long 0x00 10. "ISO_PER,Drives ISO of PER DPLL" "Low,High" rbitfld.long 0x00 9. "PGOODIN_PER,Drives PGOODIN of PER DPLL" "Low,High" newline rbitfld.long 0x00 8. "PONIN_PER,Drives PONIN of PER DPLL" "Low,High" elif (((d.l(ad:0x44E10000+0x1318))&0x80808000)==0x808000) group.long 0x1318++0x03 line.long 0x00 "DPLL_PWR_SW_CTRL,DPLL_PWR_SW_CTRL Register" bitfld.long 0x00 31. "SW_CTRL_DDR_PLL,Enable software control over DDR DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" rbitfld.long 0x00 29. "ISOSCAN_DDR,Drives ISOSCAN of DDR PLL" "Low,High" newline rbitfld.long 0x00 28. "RET_DDR,Drives RET signal of DDR PLL" "Low,High" rbitfld.long 0x00 27. "RESET_DDR,Drives RESET of DDR DPLL" "Low,High" newline rbitfld.long 0x00 26. "ISO_DDR,Drives ISO of DDR DPLL" "Low,High" rbitfld.long 0x00 25. "PGOODIN_DDR,Drives PGOODIN of DDR DPLL" "Low,High" newline rbitfld.long 0x00 24. "PONIN_DDR,Drives PONIN of DDR DPLL" "Low,High" bitfld.long 0x00 23. "SW_CTRL_DISP_PLL,Enable software control over DISP DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" newline bitfld.long 0x00 21. "ISOSCAN_DISP,Drives ISOSCAN of DISP PLL" "Low,High" bitfld.long 0x00 20. "RET_DISP,Drives RET signal of DISP PLL" "Low,High" newline bitfld.long 0x00 19. "RESET_DISP,Drives RESET of DISP DPLL" "Low,High" bitfld.long 0x00 18. "ISO_DISP,Drives ISO of DISP DPLL" "Low,High" newline bitfld.long 0x00 17. "PGOODIN_DISP,Drives PGOODIN of DISP DPLL" "Low,High" bitfld.long 0x00 16. "PONIN_DISP,Drives PONIN of DISP DPLL" "Low,High" newline bitfld.long 0x00 15. "SW_CTRL_PER_PLL,Enable software control over DISP DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" bitfld.long 0x00 13. "ISOSCAN_PER,Drives ISOSCAN of PER PLL" "Low,High" newline bitfld.long 0x00 12. "RET_PER,Drives RET signal of PER PLL" "Low,High" bitfld.long 0x00 11. "RESET_PER,Drives RESET of PER DPLL" "Low,High" newline bitfld.long 0x00 10. "ISO_PER,Drives ISO of PER DPLL" "Low,High" bitfld.long 0x00 9. "PGOODIN_PER,Drives PGOODIN of PER DPLL" "Low,High" newline bitfld.long 0x00 8. "PONIN_PER,Drives PONIN of PER DPLL" "Low,High" elif (((d.l(ad:0x44E10000+0x1318))&0x80808000)==0x80000000) group.long 0x1318++0x03 line.long 0x00 "DPLL_PWR_SW_CTRL,DPLL_PWR_SW_CTRL Register" bitfld.long 0x00 31. "SW_CTRL_DDR_PLL,Enable software control over DDR DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" bitfld.long 0x00 29. "ISOSCAN_DDR,Drives ISOSCAN of DDR PLL" "Low,High" newline bitfld.long 0x00 28. "RET_DDR,Drives RET signal of DDR PLL" "Low,High" bitfld.long 0x00 27. "RESET_DDR,Drives RESET of DDR DPLL" "Low,High" newline bitfld.long 0x00 26. "ISO_DDR,Drives ISO of DDR DPLL" "Low,High" bitfld.long 0x00 25. "PGOODIN_DDR,Drives PGOODIN of DDR DPLL" "Low,High" newline bitfld.long 0x00 24. "PONIN_DDR,Drives PONIN of DDR DPLL" "Low,High" bitfld.long 0x00 23. "SW_CTRL_DISP_PLL,Enable software control over DISP DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" newline rbitfld.long 0x00 21. "ISOSCAN_DISP,Drives ISOSCAN of DISP PLL" "Low,High" rbitfld.long 0x00 20. "RET_DISP,Drives RET signal of DISP PLL" "Low,High" newline rbitfld.long 0x00 19. "RESET_DISP,Drives RESET of DISP DPLL" "Low,High" rbitfld.long 0x00 18. "ISO_DISP,Drives ISO of DISP DPLL" "Low,High" newline rbitfld.long 0x00 17. "PGOODIN_DISP,Drives PGOODIN of DISP DPLL" "Low,High" rbitfld.long 0x00 16. "PONIN_DISP,Drives PONIN of DISP DPLL" "Low,High" newline bitfld.long 0x00 15. "SW_CTRL_PER_PLL,Enable software control over DISP DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" rbitfld.long 0x00 13. "ISOSCAN_PER,Drives ISOSCAN of PER PLL" "Low,High" newline rbitfld.long 0x00 12. "RET_PER,Drives RET signal of PER PLL" "Low,High" rbitfld.long 0x00 11. "RESET_PER,Drives RESET of PER DPLL" "Low,High" newline rbitfld.long 0x00 10. "ISO_PER,Drives ISO of PER DPLL" "Low,High" rbitfld.long 0x00 9. "PGOODIN_PER,Drives PGOODIN of PER DPLL" "Low,High" newline rbitfld.long 0x00 8. "PONIN_PER,Drives PONIN of PER DPLL" "Low,High" elif (((d.l(ad:0x44E10000+0x1318))&0x80808000)==0x80008000) group.long 0x1318++0x03 line.long 0x00 "DPLL_PWR_SW_CTRL,DPLL_PWR_SW_CTRL Register" bitfld.long 0x00 31. "SW_CTRL_DDR_PLL,Enable software control over DDR DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" bitfld.long 0x00 29. "ISOSCAN_DDR,Drives ISOSCAN of DDR PLL" "Low,High" newline bitfld.long 0x00 28. "RET_DDR,Drives RET signal of DDR PLL" "Low,High" bitfld.long 0x00 27. "RESET_DDR,Drives RESET of DDR DPLL" "Low,High" newline bitfld.long 0x00 26. "ISO_DDR,Drives ISO of DDR DPLL" "Low,High" bitfld.long 0x00 25. "PGOODIN_DDR,Drives PGOODIN of DDR DPLL" "Low,High" newline bitfld.long 0x00 24. "PONIN_DDR,Drives PONIN of DDR DPLL" "Low,High" bitfld.long 0x00 23. "SW_CTRL_DISP_PLL,Enable software control over DISP DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" newline rbitfld.long 0x00 21. "ISOSCAN_DISP,Drives ISOSCAN of DISP PLL" "Low,High" rbitfld.long 0x00 20. "RET_DISP,Drives RET signal of DISP PLL" "Low,High" newline rbitfld.long 0x00 19. "RESET_DISP,Drives RESET of DISP DPLL" "Low,High" rbitfld.long 0x00 18. "ISO_DISP,Drives ISO of DISP DPLL" "Low,High" newline rbitfld.long 0x00 17. "PGOODIN_DISP,Drives PGOODIN of DISP DPLL" "Low,High" rbitfld.long 0x00 16. "PONIN_DISP,Drives PONIN of DISP DPLL" "Low,High" newline bitfld.long 0x00 15. "SW_CTRL_PER_PLL,Enable software control over DISP DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" bitfld.long 0x00 13. "ISOSCAN_PER,Drives ISOSCAN of PER PLL" "Low,High" newline bitfld.long 0x00 12. "RET_PER,Drives RET signal of PER PLL" "Low,High" bitfld.long 0x00 11. "RESET_PER,Drives RESET of PER DPLL" "Low,High" newline bitfld.long 0x00 10. "ISO_PER,Drives ISO of PER DPLL" "Low,High" bitfld.long 0x00 9. "PGOODIN_PER,Drives PGOODIN of PER DPLL" "Low,High" newline bitfld.long 0x00 8. "PONIN_PER,Drives PONIN of PER DPLL" "Low,High" elif (((d.l(ad:0x44E10000+0x1318))&0x80808000)==0x80800000) group.long 0x1318++0x03 line.long 0x00 "DPLL_PWR_SW_CTRL,DPLL_PWR_SW_CTRL Register" bitfld.long 0x00 31. "SW_CTRL_DDR_PLL,Enable software control over DDR DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" bitfld.long 0x00 29. "ISOSCAN_DDR,Drives ISOSCAN of DDR PLL" "Low,High" newline bitfld.long 0x00 28. "RET_DDR,Drives RET signal of DDR PLL" "Low,High" bitfld.long 0x00 27. "RESET_DDR,Drives RESET of DDR DPLL" "Low,High" newline bitfld.long 0x00 26. "ISO_DDR,Drives ISO of DDR DPLL" "Low,High" bitfld.long 0x00 25. "PGOODIN_DDR,Drives PGOODIN of DDR DPLL" "Low,High" newline bitfld.long 0x00 24. "PONIN_DDR,Drives PONIN of DDR DPLL" "Low,High" bitfld.long 0x00 23. "SW_CTRL_DISP_PLL,Enable software control over DISP DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" newline bitfld.long 0x00 21. "ISOSCAN_DISP,Drives ISOSCAN of DISP PLL" "Low,High" bitfld.long 0x00 20. "RET_DISP,Drives RET signal of DISP PLL" "Low,High" newline bitfld.long 0x00 19. "RESET_DISP,Drives RESET of DISP DPLL" "Low,High" bitfld.long 0x00 18. "ISO_DISP,Drives ISO of DISP DPLL" "Low,High" newline bitfld.long 0x00 17. "PGOODIN_DISP,Drives PGOODIN of DISP DPLL" "Low,High" bitfld.long 0x00 16. "PONIN_DISP,Drives PONIN of DISP DPLL" "Low,High" newline bitfld.long 0x00 15. "SW_CTRL_PER_PLL,Enable software control over DISP DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" rbitfld.long 0x00 13. "ISOSCAN_PER,Drives ISOSCAN of PER PLL" "Low,High" newline rbitfld.long 0x00 12. "RET_PER,Drives RET signal of PER PLL" "Low,High" rbitfld.long 0x00 11. "RESET_PER,Drives RESET of PER DPLL" "Low,High" newline rbitfld.long 0x00 10. "ISO_PER,Drives ISO of PER DPLL" "Low,High" rbitfld.long 0x00 9. "PGOODIN_PER,Drives PGOODIN of PER DPLL" "Low,High" newline rbitfld.long 0x00 8. "PONIN_PER,Drives PONIN of PER DPLL" "Low,High" elif (((d.l(ad:0x44E10000+0x1318))&0x80808000)==0x80808000) group.long 0x1318++0x03 line.long 0x00 "DPLL_PWR_SW_CTRL,DPLL_PWR_SW_CTRL Register" bitfld.long 0x00 31. "SW_CTRL_DDR_PLL,Enable software control over DDR DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" bitfld.long 0x00 29. "ISOSCAN_DDR,Drives ISOSCAN of DDR PLL" "Low,High" newline bitfld.long 0x00 28. "RET_DDR,Drives RET signal of DDR PLL" "Low,High" bitfld.long 0x00 27. "RESET_DDR,Drives RESET of DDR DPLL" "Low,High" newline bitfld.long 0x00 26. "ISO_DDR,Drives ISO of DDR DPLL" "Low,High" bitfld.long 0x00 25. "PGOODIN_DDR,Drives PGOODIN of DDR DPLL" "Low,High" newline bitfld.long 0x00 24. "PONIN_DDR,Drives PONIN of DDR DPLL" "Low,High" bitfld.long 0x00 23. "SW_CTRL_DISP_PLL,Enable software control over DISP DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" newline bitfld.long 0x00 21. "ISOSCAN_DISP,Drives ISOSCAN of DISP PLL" "Low,High" bitfld.long 0x00 20. "RET_DISP,Drives RET signal of DISP PLL" "Low,High" newline bitfld.long 0x00 19. "RESET_DISP,Drives RESET of DISP DPLL" "Low,High" bitfld.long 0x00 18. "ISO_DISP,Drives ISO of DISP DPLL" "Low,High" newline bitfld.long 0x00 17. "PGOODIN_DISP,Drives PGOODIN of DISP DPLL" "Low,High" bitfld.long 0x00 16. "PONIN_DISP,Drives PONIN of DISP DPLL" "Low,High" newline bitfld.long 0x00 15. "SW_CTRL_PER_PLL,Enable software control over DISP DPLL RET RESET ISO PGOODIN PONIN for power savings" "Disabled,Enabled" bitfld.long 0x00 13. "ISOSCAN_PER,Drives ISOSCAN of PER PLL" "Low,High" newline bitfld.long 0x00 12. "RET_PER,Drives RET signal of PER PLL" "Low,High" bitfld.long 0x00 11. "RESET_PER,Drives RESET of PER DPLL" "Low,High" newline bitfld.long 0x00 10. "ISO_PER,Drives ISO of PER DPLL" "Low,High" bitfld.long 0x00 9. "PGOODIN_PER,Drives PGOODIN of PER DPLL" "Low,High" newline bitfld.long 0x00 8. "PONIN_PER,Drives PONIN of PER DPLL" "Low,High" endif group.long 0x131C++0x0B line.long 0x00 "DDR_CKE_CTRL,DDR_CKE_CTRL Register" bitfld.long 0x00 0. "DDR_CKE_CTRL,CKE from EMIF/DDRPHY is anded with this bit" "External DRAM,EMIF/DDR PHY" line.long 0x04 "SMA2,SMA2 Register" bitfld.long 0x04 1. "VSLDO_CORE_AUTO_RAMP_EN,VSLDO control select" "PRCM,Hardware" bitfld.long 0x04 0. "RMII2_CRS_DV_MODE_SEL,Rmii2_crs_dv_mode_sel" "MMC2_DAT7,RMII2_CRS_DV" line.long 0x08 "M3_TXEV_EOI,TX Event Form M3 Processor Register" bitfld.long 0x08 0. "M3_TXEV_EOI,TX event" "Not occured,Occured" group.long 0x1328++0x03 line.long 0x00 "IPC_MSG_REG0,Inter Processor Messaging Register" group.long 0x132C++0x03 line.long 0x00 "IPC_MSG_REG1,Inter Processor Messaging Register" group.long 0x1330++0x03 line.long 0x00 "IPC_MSG_REG2,Inter Processor Messaging Register" group.long 0x1334++0x03 line.long 0x00 "IPC_MSG_REG3,Inter Processor Messaging Register" group.long 0x1338++0x03 line.long 0x00 "IPC_MSG_REG4,Inter Processor Messaging Register" group.long 0x133C++0x03 line.long 0x00 "IPC_MSG_REG5,Inter Processor Messaging Register" group.long 0x1340++0x03 line.long 0x00 "IPC_MSG_REG6,Inter Processor Messaging Register" group.long 0x1344++0x03 line.long 0x00 "IPC_MSG_REG7,Inter Processor Messaging Register" group.long 0x1404++0x03 line.long 0x00 "DDR_CMD0_IOCTRL,DDR_CMD0_IOCTRL" hexmask.long.word 0x00 21.--31. 1. "IO_CONFIG_GP_WD1,Mapping WD1 bit" hexmask.long.word 0x00 10.--20. 1. "IO_CONFIG_GP_WD0,Mapping WD0 bit" newline bitfld.long 0x00 8.--9. "IO_CONFIG_SR_CLK,2 bit to program clock IO pads (Ddr_ck/ddr_ckn) output slew rate" "Fastest,Fast,Slow,Slowest" bitfld.long 0x00 5.--7. "IO_CONFIG_I_CLK,3-bit configuration input to program clock IO pads (Ddr_ck/ddr_ckn) output impedance." "1.6*rext,1.33*rext,1.14*rext,Rext,0.88*rext,0.8*rext,0.73*rext,0.67*rext" newline bitfld.long 0x00 3.--4. "IO_CONFIG_SR,2 bit to program addr/cmd IO pads output slew rate" "Fastest,Fast,Slow,Slowest" bitfld.long 0x00 0.--2. "IO_CONFIG_I,3-bit configuration input to program addr/cmd IO output impedance" "1.6*rext,1.33*rext,1.14*rext,Rext,0.88*rext,0.8*rext,0.73*rext,0.67*rext" group.long 0x1408++0x03 line.long 0x00 "DDR_CMD1_IOCTRL,DDR_CMD1_IOCTRL" hexmask.long.word 0x00 21.--31. 1. "IO_CONFIG_GP_WD1,Mapping WD1 bit" hexmask.long.word 0x00 10.--20. 1. "IO_CONFIG_GP_WD0,Mapping WD0 bit" newline bitfld.long 0x00 8.--9. "IO_CONFIG_SR_CLK,2 bit to program clock IO pads (Ddr_ck/ddr_ckn) output slew rate" "Fastest,Fast,Slow,Slowest" bitfld.long 0x00 5.--7. "IO_CONFIG_I_CLK,3-bit configuration input to program clock IO pads (Ddr_ck/ddr_ckn) output impedance." "1.6*rext,1.33*rext,1.14*rext,Rext,0.88*rext,0.8*rext,0.73*rext,0.67*rext" newline bitfld.long 0x00 3.--4. "IO_CONFIG_SR,2 bit to program addr/cmd IO pads output slew rate" "Fastest,Fast,Slow,Slowest" bitfld.long 0x00 0.--2. "IO_CONFIG_I,3-bit configuration input to program addr/cmd IO output impedance" "1.6*rext,1.33*rext,1.14*rext,Rext,0.88*rext,0.8*rext,0.73*rext,0.67*rext" group.long 0x140C++0x03 line.long 0x00 "DDR_CMD2_IOCTRL,DDR_CMD2_IOCTRL" hexmask.long.word 0x00 21.--31. 1. "IO_CONFIG_GP_WD1,Mapping WD1 bit" hexmask.long.word 0x00 10.--20. 1. "IO_CONFIG_GP_WD0,Mapping WD0 bit" newline bitfld.long 0x00 8.--9. "IO_CONFIG_SR_CLK,2 bit to program clock IO pads (Ddr_ck/ddr_ckn) output slew rate" "Fastest,Fast,Slow,Slowest" bitfld.long 0x00 5.--7. "IO_CONFIG_I_CLK,3-bit configuration input to program clock IO pads (Ddr_ck/ddr_ckn) output impedance." "1.6*rext,1.33*rext,1.14*rext,Rext,0.88*rext,0.8*rext,0.73*rext,0.67*rext" newline bitfld.long 0x00 3.--4. "IO_CONFIG_SR,2 bit to program addr/cmd IO pads output slew rate" "Fastest,Fast,Slow,Slowest" bitfld.long 0x00 0.--2. "IO_CONFIG_I,3-bit configuration input to program addr/cmd IO output impedance" "1.6*rext,1.33*rext,1.14*rext,Rext,0.88*rext,0.8*rext,0.73*rext,0.67*rext" group.long 0x1440++0x03 line.long 0x00 "DDR_DATA0_IOCTRL,DDR_DATA0_IOCTRL" bitfld.long 0x00 19. 29. "IO_CONFIG_WD[1:0]_DQS,Input that selects pullup or pulldown for DDR_DQS0 and ddr_dqsn0 respectively" "Pullup/Pulldown disabled,Weak pullup enabled,Weak pulldown enabled,Weak keeper enabled" bitfld.long 0x00 18. 28. "IO_CONFIG_WD[1:0]_DM,Input that selects pullup or pulldown for DM" "Pullup/Pulldown disabled,Weak pullup enabled,Weak pulldown enabled,Weak keeper enabled" newline hexmask.long.byte 0x00 20.--27. 1. "IO_CONFIG_WD1_DQ,Input that selects pullup or pulldown for DQ" hexmask.long.byte 0x00 10.--17. 1. "IO_CONFIG_WD0_DQ,Input that selects pullup or pulldown for DQ" newline bitfld.long 0x00 8.--9. "IO_CONFIG_SR_CLK,2 bit to program clock IO pads (Ddr_dqs/ddr_dqsn) output slew rate" "Fastest,Fast,Slow,Slowest" bitfld.long 0x00 5.--7. "IO_CONFIG_I_CLK,3-bit configuration input to program clock IO pads (Ddr_dqs/ddr_dqsn) output impedance" "1.6*rext,1.33*rext,1.14*rext,Rext,0.88*rext,0.8*rext,0.73*rext,0.67*rext" newline bitfld.long 0x00 3.--4. "IO_CONFIG_SR,2 bit to program data IO pads output slew rate" "Fastest,Fast,Slow,Slowest" bitfld.long 0x00 0.--2. "IO_CONFIG_I,3-bit configuration input to program data IO output impedance" "1.6*rext,1.33*rext,1.14*rext,Rext,0.88*rext,0.8*rext,0.73*rext,0.67*rext" group.long 0x1444++0x03 line.long 0x00 "DDR_DATA1_IOCTRL,DDR_DATA1_IOCTRL" bitfld.long 0x00 19. 29. "IO_CONFIG_WD[1:0]_DQS,Input that selects pullup or pulldown for DDR_DQS0 and ddr_dqsn0 respectively" "Pullup/Pulldown disabled,Weak pullup enabled,Weak pulldown enabled,Weak keeper enabled" bitfld.long 0x00 18. 28. "IO_CONFIG_WD[1:0]_DM,Input that selects pullup or pulldown for DM" "Pullup/Pulldown disabled,Weak pullup enabled,Weak pulldown enabled,Weak keeper enabled" newline hexmask.long.byte 0x00 20.--27. 1. "IO_CONFIG_WD1_DQ,Input that selects pullup or pulldown for DQ" hexmask.long.byte 0x00 10.--17. 1. "IO_CONFIG_WD0_DQ,Input that selects pullup or pulldown for DQ" newline bitfld.long 0x00 8.--9. "IO_CONFIG_SR_CLK,2 bit to program clock IO pads (Ddr_dqs/ddr_dqsn) output slew rate" "Fastest,Fast,Slow,Slowest" bitfld.long 0x00 5.--7. "IO_CONFIG_I_CLK,3-bit configuration input to program clock IO pads (Ddr_dqs/ddr_dqsn) output impedance" "1.6*rext,1.33*rext,1.14*rext,Rext,0.88*rext,0.8*rext,0.73*rext,0.67*rext" newline bitfld.long 0x00 3.--4. "IO_CONFIG_SR,2 bit to program data IO pads output slew rate" "Fastest,Fast,Slow,Slowest" bitfld.long 0x00 0.--2. "IO_CONFIG_I,3-bit configuration input to program data IO output impedance" "1.6*rext,1.33*rext,1.14*rext,Rext,0.88*rext,0.8*rext,0.73*rext,0.67*rext" tree.end tree "EDMA (Enhanced Direct Memory Access)" tree "EDMA3CC" base ad:0x49000000 rgroup.long 0x00++0x07 line.long 0x00 "PID,Peripheral Identification Register" line.long 0x04 "CCCFG,EDMA3CC Configuration Register" bitfld.long 0x04 25. "MP_EXIST,Memory protection existence" ",Enabled" bitfld.long 0x04 24. "CHMAP_EXIST,Channel mapping existence" ",Enabled" newline bitfld.long 0x04 20.--21. "NUM_REGN,Number of MP and shadow regions" ",,4 regions,?..." bitfld.long 0x04 16.--18. "NUM_EVQUE,Number of queues/number of tcs" ",,3 edma3tcs/event queues,?..." newline bitfld.long 0x04 12.--14. "NUM_PAENTRY,Number of param sets" ",,,,256 param sets,?..." bitfld.long 0x04 8.--10. "NUM_INTCH,Number of interrupt channels" ",,,,64 interrupt channels,?..." newline bitfld.long 0x04 4.--6. "NUM_QDMACH,Number of QDMA channels" ",,,,8 QDMA channels,?..." bitfld.long 0x04 0.--2. "NUM_DMACH,Number of DMA channels" ",,,,,64 DMA channels,?..." group.long 0x10++0x03 line.long 0x00 "SYSCONFIG,SYSCONFIG Register" bitfld.long 0x00 2.--3. "IDLEMODE,Configuration of the local target state management mode" "Force-idle,No-idle,Smart-idle,Smart-idle wakeup-capable" tree "DMA Channel Mapping Registers" group.long 0x100++0x03 line.long 0x00 "DCHMAP0,DMA Channel Mapping Register 0" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 0" group.long 0x104++0x03 line.long 0x00 "DCHMAP1,DMA Channel Mapping Register 1" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 1" group.long 0x108++0x03 line.long 0x00 "DCHMAP2,DMA Channel Mapping Register 2" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 2" group.long 0x10C++0x03 line.long 0x00 "DCHMAP3,DMA Channel Mapping Register 3" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 3" group.long 0x110++0x03 line.long 0x00 "DCHMAP4,DMA Channel Mapping Register 4" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 4" group.long 0x114++0x03 line.long 0x00 "DCHMAP5,DMA Channel Mapping Register 5" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 5" group.long 0x118++0x03 line.long 0x00 "DCHMAP6,DMA Channel Mapping Register 6" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 6" group.long 0x11C++0x03 line.long 0x00 "DCHMAP7,DMA Channel Mapping Register 7" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 7" group.long 0x120++0x03 line.long 0x00 "DCHMAP8,DMA Channel Mapping Register 8" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 8" group.long 0x124++0x03 line.long 0x00 "DCHMAP9,DMA Channel Mapping Register 9" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 9" group.long 0x128++0x03 line.long 0x00 "DCHMAP10,DMA Channel Mapping Register 10" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 10" group.long 0x12C++0x03 line.long 0x00 "DCHMAP11,DMA Channel Mapping Register 11" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 11" group.long 0x130++0x03 line.long 0x00 "DCHMAP12,DMA Channel Mapping Register 12" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 12" group.long 0x134++0x03 line.long 0x00 "DCHMAP13,DMA Channel Mapping Register 13" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 13" group.long 0x138++0x03 line.long 0x00 "DCHMAP14,DMA Channel Mapping Register 14" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 14" group.long 0x13C++0x03 line.long 0x00 "DCHMAP15,DMA Channel Mapping Register 15" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 15" group.long 0x140++0x03 line.long 0x00 "DCHMAP16,DMA Channel Mapping Register 16" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 16" group.long 0x144++0x03 line.long 0x00 "DCHMAP17,DMA Channel Mapping Register 17" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 17" group.long 0x148++0x03 line.long 0x00 "DCHMAP18,DMA Channel Mapping Register 18" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 18" group.long 0x14C++0x03 line.long 0x00 "DCHMAP19,DMA Channel Mapping Register 19" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 19" group.long 0x150++0x03 line.long 0x00 "DCHMAP20,DMA Channel Mapping Register 20" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 20" group.long 0x154++0x03 line.long 0x00 "DCHMAP21,DMA Channel Mapping Register 21" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 21" group.long 0x158++0x03 line.long 0x00 "DCHMAP22,DMA Channel Mapping Register 22" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 22" group.long 0x15C++0x03 line.long 0x00 "DCHMAP23,DMA Channel Mapping Register 23" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 23" group.long 0x160++0x03 line.long 0x00 "DCHMAP24,DMA Channel Mapping Register 24" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 24" group.long 0x164++0x03 line.long 0x00 "DCHMAP25,DMA Channel Mapping Register 25" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 25" group.long 0x168++0x03 line.long 0x00 "DCHMAP26,DMA Channel Mapping Register 26" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 26" group.long 0x16C++0x03 line.long 0x00 "DCHMAP27,DMA Channel Mapping Register 27" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 27" group.long 0x170++0x03 line.long 0x00 "DCHMAP28,DMA Channel Mapping Register 28" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 28" group.long 0x174++0x03 line.long 0x00 "DCHMAP29,DMA Channel Mapping Register 29" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 29" group.long 0x178++0x03 line.long 0x00 "DCHMAP30,DMA Channel Mapping Register 30" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 30" group.long 0x17C++0x03 line.long 0x00 "DCHMAP31,DMA Channel Mapping Register 31" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 31" group.long 0x180++0x03 line.long 0x00 "DCHMAP32,DMA Channel Mapping Register 32" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 32" group.long 0x184++0x03 line.long 0x00 "DCHMAP33,DMA Channel Mapping Register 33" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 33" group.long 0x188++0x03 line.long 0x00 "DCHMAP34,DMA Channel Mapping Register 34" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 34" group.long 0x18C++0x03 line.long 0x00 "DCHMAP35,DMA Channel Mapping Register 35" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 35" group.long 0x190++0x03 line.long 0x00 "DCHMAP36,DMA Channel Mapping Register 36" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 36" group.long 0x194++0x03 line.long 0x00 "DCHMAP37,DMA Channel Mapping Register 37" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 37" group.long 0x198++0x03 line.long 0x00 "DCHMAP38,DMA Channel Mapping Register 38" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 38" group.long 0x19C++0x03 line.long 0x00 "DCHMAP39,DMA Channel Mapping Register 39" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 39" group.long 0x1A0++0x03 line.long 0x00 "DCHMAP40,DMA Channel Mapping Register 40" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 40" group.long 0x1A4++0x03 line.long 0x00 "DCHMAP41,DMA Channel Mapping Register 41" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 41" group.long 0x1A8++0x03 line.long 0x00 "DCHMAP42,DMA Channel Mapping Register 42" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 42" group.long 0x1AC++0x03 line.long 0x00 "DCHMAP43,DMA Channel Mapping Register 43" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 43" group.long 0x1B0++0x03 line.long 0x00 "DCHMAP44,DMA Channel Mapping Register 44" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 44" group.long 0x1B4++0x03 line.long 0x00 "DCHMAP45,DMA Channel Mapping Register 45" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 45" group.long 0x1B8++0x03 line.long 0x00 "DCHMAP46,DMA Channel Mapping Register 46" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 46" group.long 0x1BC++0x03 line.long 0x00 "DCHMAP47,DMA Channel Mapping Register 47" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 47" group.long 0x1C0++0x03 line.long 0x00 "DCHMAP48,DMA Channel Mapping Register 48" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 48" group.long 0x1C4++0x03 line.long 0x00 "DCHMAP49,DMA Channel Mapping Register 49" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 49" group.long 0x1C8++0x03 line.long 0x00 "DCHMAP50,DMA Channel Mapping Register 50" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 50" group.long 0x1CC++0x03 line.long 0x00 "DCHMAP51,DMA Channel Mapping Register 51" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 51" group.long 0x1D0++0x03 line.long 0x00 "DCHMAP52,DMA Channel Mapping Register 52" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 52" group.long 0x1D4++0x03 line.long 0x00 "DCHMAP53,DMA Channel Mapping Register 53" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 53" group.long 0x1D8++0x03 line.long 0x00 "DCHMAP54,DMA Channel Mapping Register 54" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 54" group.long 0x1DC++0x03 line.long 0x00 "DCHMAP55,DMA Channel Mapping Register 55" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 55" group.long 0x1E0++0x03 line.long 0x00 "DCHMAP56,DMA Channel Mapping Register 56" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 56" group.long 0x1E4++0x03 line.long 0x00 "DCHMAP57,DMA Channel Mapping Register 57" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 57" group.long 0x1E8++0x03 line.long 0x00 "DCHMAP58,DMA Channel Mapping Register 58" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 58" group.long 0x1EC++0x03 line.long 0x00 "DCHMAP59,DMA Channel Mapping Register 59" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 59" group.long 0x1F0++0x03 line.long 0x00 "DCHMAP60,DMA Channel Mapping Register 60" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 60" group.long 0x1F4++0x03 line.long 0x00 "DCHMAP61,DMA Channel Mapping Register 61" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 61" group.long 0x1F8++0x03 line.long 0x00 "DCHMAP62,DMA Channel Mapping Register 62" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 62" group.long 0x1FC++0x03 line.long 0x00 "DCHMAP63,DMA Channel Mapping Register 63" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,Points to the param set number for DMA channel 63" tree.end group.long 0x200++0x03 line.long 0x00 "QCHMAP0,QDMA Channel Mapping Register 0" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,PAENTRY points to the param set number for QDMA channel" bitfld.long 0x00 2.--4. "TRWORD,Points to the specific trigger word of the param set defined by PAENTRY" "0,1,2,3,4,5,6,7" group.long 0x204++0x03 line.long 0x00 "QCHMAP1,QDMA Channel Mapping Register 1" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,PAENTRY points to the param set number for QDMA channel" bitfld.long 0x00 2.--4. "TRWORD,Points to the specific trigger word of the param set defined by PAENTRY" "0,1,2,3,4,5,6,7" group.long 0x208++0x03 line.long 0x00 "QCHMAP2,QDMA Channel Mapping Register 2" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,PAENTRY points to the param set number for QDMA channel" bitfld.long 0x00 2.--4. "TRWORD,Points to the specific trigger word of the param set defined by PAENTRY" "0,1,2,3,4,5,6,7" group.long 0x20C++0x03 line.long 0x00 "QCHMAP3,QDMA Channel Mapping Register 3" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,PAENTRY points to the param set number for QDMA channel" bitfld.long 0x00 2.--4. "TRWORD,Points to the specific trigger word of the param set defined by PAENTRY" "0,1,2,3,4,5,6,7" group.long 0x210++0x03 line.long 0x00 "QCHMAP4,QDMA Channel Mapping Register 4" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,PAENTRY points to the param set number for QDMA channel" bitfld.long 0x00 2.--4. "TRWORD,Points to the specific trigger word of the param set defined by PAENTRY" "0,1,2,3,4,5,6,7" group.long 0x214++0x03 line.long 0x00 "QCHMAP5,QDMA Channel Mapping Register 5" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,PAENTRY points to the param set number for QDMA channel" bitfld.long 0x00 2.--4. "TRWORD,Points to the specific trigger word of the param set defined by PAENTRY" "0,1,2,3,4,5,6,7" group.long 0x218++0x03 line.long 0x00 "QCHMAP6,QDMA Channel Mapping Register 6" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,PAENTRY points to the param set number for QDMA channel" bitfld.long 0x00 2.--4. "TRWORD,Points to the specific trigger word of the param set defined by PAENTRY" "0,1,2,3,4,5,6,7" group.long 0x21C++0x03 line.long 0x00 "QCHMAP7,QDMA Channel Mapping Register 7" hexmask.long.word 0x00 5.--13. 1. "PAENTRY,PAENTRY points to the param set number for QDMA channel" bitfld.long 0x00 2.--4. "TRWORD,Points to the specific trigger word of the param set defined by PAENTRY" "0,1,2,3,4,5,6,7" group.long 0x240++0x1F line.long 0x00 "DMAQNUM0,DMA Queue Number Register 0" bitfld.long 0x00 28.--30. "E7,DMA queue number" "0,1,2,?..." bitfld.long 0x00 24.--26. "E6,DMA queue number" "0,1,2,?..." newline bitfld.long 0x00 20.--22. "E5,DMA queue number" "0,1,2,?..." bitfld.long 0x00 16.--18. "E4,DMA queue number" "0,1,2,?..." newline bitfld.long 0x00 12.--14. "E3,DMA queue number" "0,1,2,?..." bitfld.long 0x00 8.--10. "E2,DMA queue number" "0,1,2,?..." newline bitfld.long 0x00 4.--6. "E1,DMA queue number" "0,1,2,?..." bitfld.long 0x00 0.--2. "E0,DMA queue number" "0,1,2,?..." line.long 0x04 "DMAQNUM1,DMA Queue Number Register 1" bitfld.long 0x04 28.--30. "E15,DMA queue number" "0,1,2,?..." bitfld.long 0x04 24.--26. "E14,DMA queue number" "0,1,2,?..." newline bitfld.long 0x04 20.--22. "E13,DMA queue number" "0,1,2,?..." bitfld.long 0x04 16.--18. "E12,DMA queue number" "0,1,2,?..." newline bitfld.long 0x04 12.--14. "E11,DMA queue number" "0,1,2,?..." bitfld.long 0x04 8.--10. "E10,DMA queue number" "0,1,2,?..." newline bitfld.long 0x04 4.--6. "E9,DMA queue number" "0,1,2,?..." bitfld.long 0x04 0.--2. "E8,DMA queue number" "0,1,2,?..." line.long 0x08 "DMAQNUM2,DMA Queue Number Register 2" bitfld.long 0x08 28.--30. "E23,DMA queue number" "0,1,2,?..." bitfld.long 0x08 24.--26. "E22,DMA queue number" "0,1,2,?..." newline bitfld.long 0x08 20.--22. "E21,DMA queue number" "0,1,2,?..." bitfld.long 0x08 16.--18. "E20,DMA queue number" "0,1,2,?..." newline bitfld.long 0x08 12.--14. "E19,DMA queue number" "0,1,2,?..." bitfld.long 0x08 8.--10. "E18,DMA queue number" "0,1,2,?..." newline bitfld.long 0x08 4.--6. "E17,DMA queue number" "0,1,2,?..." bitfld.long 0x08 0.--2. "E16,DMA queue number" "0,1,2,?..." line.long 0x0C "DMAQNUM3,DMA Queue Number Register 3" bitfld.long 0x0C 28.--30. "E31,DMA queue number" "0,1,2,?..." bitfld.long 0x0C 24.--26. "E30,DMA queue number" "0,1,2,?..." newline bitfld.long 0x0C 20.--22. "E29,DMA queue number" "0,1,2,?..." bitfld.long 0x0C 16.--18. "E28,DMA queue number" "0,1,2,?..." newline bitfld.long 0x0C 12.--14. "E27,DMA queue number" "0,1,2,?..." bitfld.long 0x0C 8.--10. "E26,DMA queue number" "0,1,2,?..." newline bitfld.long 0x0C 4.--6. "E25,DMA queue number" "0,1,2,?..." bitfld.long 0x0C 0.--2. "E24,DMA queue number" "0,1,2,?..." line.long 0x10 "DMAQNUM4,DMA Queue Number Register 4" bitfld.long 0x10 28.--30. "E39,DMA queue number" "0,1,2,?..." bitfld.long 0x10 24.--26. "E38,DMA queue number" "0,1,2,?..." newline bitfld.long 0x10 20.--22. "E37,DMA queue number" "0,1,2,?..." bitfld.long 0x10 16.--18. "E36,DMA queue number" "0,1,2,?..." newline bitfld.long 0x10 12.--14. "E35,DMA queue number" "0,1,2,?..." bitfld.long 0x10 8.--10. "E34,DMA queue number" "0,1,2,?..." newline bitfld.long 0x10 4.--6. "E33,DMA queue number" "0,1,2,?..." bitfld.long 0x10 0.--2. "E32,DMA queue number" "0,1,2,?..." line.long 0x14 "DMAQNUM5,DMA Queue Number Register 5" bitfld.long 0x14 28.--30. "E47,DMA queue number" "0,1,2,?..." bitfld.long 0x14 24.--26. "E46,DMA queue number" "0,1,2,?..." newline bitfld.long 0x14 20.--22. "E45,DMA queue number" "0,1,2,?..." bitfld.long 0x14 16.--18. "E44,DMA queue number" "0,1,2,?..." newline bitfld.long 0x14 12.--14. "E43,DMA queue number" "0,1,2,?..." bitfld.long 0x14 8.--10. "E42,DMA queue number" "0,1,2,?..." newline bitfld.long 0x14 4.--6. "E41,DMA queue number" "0,1,2,?..." bitfld.long 0x14 0.--2. "E40,DMA queue number" "0,1,2,?..." line.long 0x18 "DMAQNUM6,DMA Queue Number Register 6" bitfld.long 0x18 28.--30. "E55,DMA queue number" "0,1,2,?..." bitfld.long 0x18 24.--26. "E54,DMA queue number" "0,1,2,?..." newline bitfld.long 0x18 20.--22. "E53,DMA queue number" "0,1,2,?..." bitfld.long 0x18 16.--18. "E52,DMA queue number" "0,1,2,?..." newline bitfld.long 0x18 12.--14. "E51,DMA queue number" "0,1,2,?..." bitfld.long 0x18 8.--10. "E50,DMA queue number" "0,1,2,?..." newline bitfld.long 0x18 4.--6. "E49,DMA queue number" "0,1,2,?..." bitfld.long 0x18 0.--2. "E48,DMA queue number" "0,1,2,?..." line.long 0x1C "DMAQNUM7,DMA Queue Number Register 7" bitfld.long 0x1C 28.--30. "E63,DMA queue number" "0,1,2,?..." bitfld.long 0x1C 24.--26. "E62,DMA queue number" "0,1,2,?..." newline bitfld.long 0x1C 20.--22. "E61,DMA queue number" "0,1,2,?..." bitfld.long 0x1C 16.--18. "E60,DMA queue number" "0,1,2,?..." newline bitfld.long 0x1C 12.--14. "E59,DMA queue number" "0,1,2,?..." bitfld.long 0x1C 8.--10. "E58,DMA queue number" "0,1,2,?..." newline bitfld.long 0x1C 4.--6. "E57,DMA queue number" "0,1,2,?..." bitfld.long 0x1C 0.--2. "E56,DMA queue number" "0,1,2,?..." group.long 0x260++0x03 line.long 0x00 "QDMAQNUM,QDMA Queue Number Register" bitfld.long 0x00 28.--30. "E7,DMA queue number" "0,1,2,?..." bitfld.long 0x00 24.--26. "E6,DMA queue number" "0,1,2,?..." newline bitfld.long 0x00 20.--22. "E5,DMA queue number" "0,1,2,?..." bitfld.long 0x00 16.--18. "E4,DMA queue number" "0,1,2,?..." newline bitfld.long 0x00 12.--14. "E3,DMA queue number" "0,1,2,?..." bitfld.long 0x00 8.--10. "E2,DMA queue number" "0,1,2,?..." newline bitfld.long 0x00 4.--6. "E1,DMA queue number" "0,1,2,?..." bitfld.long 0x00 0.--2. "E0,DMA queue number" "0,1,2,?..." group.long 0x284++0x03 line.long 0x00 "QUEPRI,Queue Priority Register" bitfld.long 0x00 8.--10. "PRIQ2,Priority level for queue 2" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 4.--6. "PRIQ1,Priority level for queue 1" "Highest,1,2,3,4,5,6,Lowest" newline bitfld.long 0x00 0.--2. "PRIQ0,Priority level for queue 0" "Highest,1,2,3,4,5,6,Lowest" group.long 0x300++0x07 line.long 0x00 "EMR_SET/CLR,Event Missed Register" setclrfld.long 0x00 31. 0x00 31. 0x08 31. "E[31],Channel 31 event missed" "Not missed,Missed" setclrfld.long 0x00 30. 0x00 30. 0x08 30. "E[30],Channel 30 event missed" "Not missed,Missed" newline setclrfld.long 0x00 29. 0x00 29. 0x08 29. "E[29],Channel 29 event missed" "Not missed,Missed" setclrfld.long 0x00 28. 0x00 28. 0x08 28. "E[28],Channel 28 event missed" "Not missed,Missed" newline setclrfld.long 0x00 27. 0x00 27. 0x08 27. "E[27],Channel 27 event missed" "Not missed,Missed" setclrfld.long 0x00 26. 0x00 26. 0x08 26. "E[26],Channel 26 event missed" "Not missed,Missed" newline setclrfld.long 0x00 25. 0x00 25. 0x08 25. "E[25],Channel 25 event missed" "Not missed,Missed" setclrfld.long 0x00 24. 0x00 24. 0x08 24. "E[24],Channel 24 event missed" "Not missed,Missed" newline setclrfld.long 0x00 23. 0x00 23. 0x08 23. "E[23],Channel 23 event missed" "Not missed,Missed" setclrfld.long 0x00 22. 0x00 22. 0x08 22. "E[22],Channel 22 event missed" "Not missed,Missed" newline setclrfld.long 0x00 21. 0x00 21. 0x08 21. "E[21],Channel 21 event missed" "Not missed,Missed" setclrfld.long 0x00 20. 0x00 20. 0x08 20. "E[20],Channel 20 event missed" "Not missed,Missed" newline setclrfld.long 0x00 19. 0x00 19. 0x08 19. "E[19],Channel 19 event missed" "Not missed,Missed" setclrfld.long 0x00 18. 0x00 18. 0x08 18. "E[18],Channel 18 event missed" "Not missed,Missed" newline setclrfld.long 0x00 17. 0x00 17. 0x08 17. "E[17],Channel 17 event missed" "Not missed,Missed" setclrfld.long 0x00 16. 0x00 16. 0x08 16. "E[16],Channel 16 event missed" "Not missed,Missed" newline setclrfld.long 0x00 15. 0x00 15. 0x08 15. "E[15],Channel 15 event missed" "Not missed,Missed" setclrfld.long 0x00 14. 0x00 14. 0x08 14. "E[14],Channel 14 event missed" "Not missed,Missed" newline setclrfld.long 0x00 13. 0x00 13. 0x08 13. "E[13],Channel 13 event missed" "Not missed,Missed" setclrfld.long 0x00 12. 0x00 12. 0x08 12. "E[12],Channel 12 event missed" "Not missed,Missed" newline setclrfld.long 0x00 11. 0x00 11. 0x08 11. "E[11],Channel 11 event missed" "Not missed,Missed" setclrfld.long 0x00 10. 0x00 10. 0x08 10. "E[10],Channel 10 event missed" "Not missed,Missed" newline setclrfld.long 0x00 9. 0x00 9. 0x08 9. "E[9],Channel 9 event missed" "Not missed,Missed" setclrfld.long 0x00 8. 0x00 8. 0x08 8. "E[8],Channel 8 event missed" "Not missed,Missed" newline setclrfld.long 0x00 7. 0x00 7. 0x08 7. "E[7],Channel 7 event missed" "Not missed,Missed" setclrfld.long 0x00 6. 0x00 6. 0x08 6. "E[6],Channel 6 event missed" "Not missed,Missed" newline setclrfld.long 0x00 5. 0x00 5. 0x08 5. "E[5],Channel 5 event missed" "Not missed,Missed" setclrfld.long 0x00 4. 0x00 4. 0x08 4. "E[4],Channel 4 event missed" "Not missed,Missed" newline setclrfld.long 0x00 3. 0x00 3. 0x08 3. "E[3],Channel 3 event missed" "Not missed,Missed" setclrfld.long 0x00 2. 0x00 2. 0x08 2. "E[2],Channel 2 event missed" "Not missed,Missed" newline setclrfld.long 0x00 1. 0x00 1. 0x08 1. "E[1],Channel 1 event missed" "Not missed,Missed" setclrfld.long 0x00 0. 0x00 0. 0x08 0. "E[0],Channel 0 event missed" "Not missed,Missed" line.long 0x04 "EMRH_SET/CLR,Event Missed Register High" setclrfld.long 0x04 31. 0x04 31. 0x0C 31. "E[63],Channel 63 event missed" "Not missed,Missed" setclrfld.long 0x04 30. 0x04 30. 0x0C 30. "E[62],Channel 62 event missed" "Not missed,Missed" newline setclrfld.long 0x04 29. 0x04 29. 0x0C 29. "E[61],Channel 61 event missed" "Not missed,Missed" setclrfld.long 0x04 28. 0x04 28. 0x0C 28. "E[60],Channel 60 event missed" "Not missed,Missed" newline setclrfld.long 0x04 27. 0x04 27. 0x0C 27. "E[59],Channel 59 event missed" "Not missed,Missed" setclrfld.long 0x04 26. 0x04 26. 0x0C 26. "E[58],Channel 58 event missed" "Not missed,Missed" newline setclrfld.long 0x04 25. 0x04 25. 0x0C 25. "E[57],Channel 57 event missed" "Not missed,Missed" setclrfld.long 0x04 24. 0x04 24. 0x0C 24. "E[56],Channel 56 event missed" "Not missed,Missed" newline setclrfld.long 0x04 23. 0x04 23. 0x0C 23. "E[55],Channel 55 event missed" "Not missed,Missed" setclrfld.long 0x04 22. 0x04 22. 0x0C 22. "E[54],Channel 54 event missed" "Not missed,Missed" newline setclrfld.long 0x04 21. 0x04 21. 0x0C 21. "E[53],Channel 53 event missed" "Not missed,Missed" setclrfld.long 0x04 20. 0x04 20. 0x0C 20. "E[52],Channel 52 event missed" "Not missed,Missed" newline setclrfld.long 0x04 19. 0x04 19. 0x0C 19. "E[51],Channel 51 event missed" "Not missed,Missed" setclrfld.long 0x04 18. 0x04 18. 0x0C 18. "E[50],Channel 50 event missed" "Not missed,Missed" newline setclrfld.long 0x04 17. 0x04 17. 0x0C 17. "E[49],Channel 49 event missed" "Not missed,Missed" setclrfld.long 0x04 16. 0x04 16. 0x0C 16. "E[48],Channel 48 event missed" "Not missed,Missed" newline setclrfld.long 0x04 15. 0x04 15. 0x0C 15. "E[47],Channel 47 event missed" "Not missed,Missed" setclrfld.long 0x04 14. 0x04 14. 0x0C 14. "E[46],Channel 46 event missed" "Not missed,Missed" newline setclrfld.long 0x04 13. 0x04 13. 0x0C 13. "E[45],Channel 45 event missed" "Not missed,Missed" setclrfld.long 0x04 12. 0x04 12. 0x0C 12. "E[44],Channel 44 event missed" "Not missed,Missed" newline setclrfld.long 0x04 11. 0x04 11. 0x0C 11. "E[43],Channel 43 event missed" "Not missed,Missed" setclrfld.long 0x04 10. 0x04 10. 0x0C 10. "E[42],Channel 42 event missed" "Not missed,Missed" newline setclrfld.long 0x04 9. 0x04 9. 0x0C 9. "E[41],Channel 41 event missed" "Not missed,Missed" setclrfld.long 0x04 8. 0x04 8. 0x0C 8. "E[40],Channel 40 event missed" "Not missed,Missed" newline setclrfld.long 0x04 7. 0x04 7. 0x0C 7. "E[39],Channel 39 event missed" "Not missed,Missed" setclrfld.long 0x04 6. 0x04 6. 0x0C 6. "E[38],Channel 38 event missed" "Not missed,Missed" newline setclrfld.long 0x04 5. 0x04 5. 0x0C 5. "E[37],Channel 37 event missed" "Not missed,Missed" setclrfld.long 0x04 4. 0x04 4. 0x0C 4. "E[36],Channel 36 event missed" "Not missed,Missed" newline setclrfld.long 0x04 3. 0x04 3. 0x0C 3. "E[35],Channel 35 event missed" "Not missed,Missed" setclrfld.long 0x04 2. 0x04 2. 0x0C 2. "E[34],Channel 34 event missed" "Not missed,Missed" newline setclrfld.long 0x04 1. 0x04 1. 0x0C 1. "E[33],Channel 33 event missed" "Not missed,Missed" setclrfld.long 0x04 0. 0x04 0. 0x0C 0. "E[32],Channel 32 event missed" "Not missed,Missed" group.long 0x310++0x03 line.long 0x00 "QEMR_SET/CLR,QDMA Event Missed Register" setclrfld.long 0x00 7. 0x00 7. 0x04 7. "E[7],Channel 7 QDMA event missed" "Not missed,Missed" setclrfld.long 0x00 6. 0x00 6. 0x04 6. "E[6],Channel 6 QDMA event missed" "Not missed,Missed" newline setclrfld.long 0x00 5. 0x00 5. 0x04 5. "E[5],Channel 5 QDMA event missed" "Not missed,Missed" setclrfld.long 0x00 4. 0x00 4. 0x04 4. "E[4],Channel 4 QDMA event missed" "Not missed,Missed" newline setclrfld.long 0x00 3. 0x00 3. 0x04 3. "E[3],Channel 3 QDMA event missed" "Not missed,Missed" setclrfld.long 0x00 2. 0x00 2. 0x04 2. "E[2],Channel 2 QDMA event missed" "Not missed,Missed" newline setclrfld.long 0x00 1. 0x00 1. 0x04 1. "E[1],Channel 1 QDMA event missed" "Not missed,Missed" setclrfld.long 0x00 0. 0x00 0. 0x04 0. "E[0],Channel 0 QDMA event missed" "Not missed,Missed" group.long 0x318++0x03 line.long 0x00 "CCERR_SET/CLR,EDMA3CC Error Register" setclrfld.long 0x00 16. 0x00 16. 0x04 16. "TCCERR,Transfer completion code error" "No error,Error" setclrfld.long 0x00 2. 0x00 2. 0x04 2. "QTHRXCD2,Queue threshold error for queue 2" "No error,Error" newline setclrfld.long 0x00 1. 0x00 1. 0x04 1. "QTHRXCD1,Queue threshold error for queue 1" "No error,Error" setclrfld.long 0x00 0. 0x00 0. 0x04 0. "QTHRXCD0,Queue threshold error for queue 0" "No error,Error" wgroup.long 0x320++0x03 line.long 0x00 "EEVAL,Error Evaluate Register" bitfld.long 0x00 0. "EVAL,Error interrupt evaluate" "No effect,Clear" group.long 0x340++0x07 line.long 0x00 "DRAE0,DMA Region Access Enable Register For Region 0" bitfld.long 0x00 31. "E[31],DMA region access enable for bit 31 in region 0" "Disabled,Enabled" bitfld.long 0x00 30. "E[30],DMA region access enable for bit 30 in region 0" "Disabled,Enabled" newline bitfld.long 0x00 29. "E[29],DMA region access enable for bit 29 in region 0" "Disabled,Enabled" bitfld.long 0x00 28. "E[28],DMA region access enable for bit 28 in region 0" "Disabled,Enabled" newline bitfld.long 0x00 27. "E[27],DMA region access enable for bit 27 in region 0" "Disabled,Enabled" bitfld.long 0x00 26. "E[26],DMA region access enable for bit 26 in region 0" "Disabled,Enabled" newline bitfld.long 0x00 25. "E[25],DMA region access enable for bit 25 in region 0" "Disabled,Enabled" bitfld.long 0x00 24. "E[24],DMA region access enable for bit 24 in region 0" "Disabled,Enabled" newline bitfld.long 0x00 23. "E[23],DMA region access enable for bit 23 in region 0" "Disabled,Enabled" bitfld.long 0x00 22. "E[22],DMA region access enable for bit 22 in region 0" "Disabled,Enabled" newline bitfld.long 0x00 21. "E[21],DMA region access enable for bit 21 in region 0" "Disabled,Enabled" bitfld.long 0x00 20. "E[20],DMA region access enable for bit 20 in region 0" "Disabled,Enabled" newline bitfld.long 0x00 19. "E[19],DMA region access enable for bit 19 in region 0" "Disabled,Enabled" bitfld.long 0x00 18. "E[18],DMA region access enable for bit 18 in region 0" "Disabled,Enabled" newline bitfld.long 0x00 17. "E[17],DMA region access enable for bit 17 in region 0" "Disabled,Enabled" bitfld.long 0x00 16. "E[16],DMA region access enable for bit 16 in region 0" "Disabled,Enabled" newline bitfld.long 0x00 15. "E[15],DMA region access enable for bit 15 in region 0" "Disabled,Enabled" bitfld.long 0x00 14. "E[14],DMA region access enable for bit 14 in region 0" "Disabled,Enabled" newline bitfld.long 0x00 13. "E[13],DMA region access enable for bit 13 in region 0" "Disabled,Enabled" bitfld.long 0x00 12. "E[12],DMA region access enable for bit 12 in region 0" "Disabled,Enabled" newline bitfld.long 0x00 11. "E[11],DMA region access enable for bit 11 in region 0" "Disabled,Enabled" bitfld.long 0x00 10. "E[10],DMA region access enable for bit 10 in region 0" "Disabled,Enabled" newline bitfld.long 0x00 9. "E[9],DMA region access enable for bit 9 in region 0" "Disabled,Enabled" bitfld.long 0x00 8. "E[8],DMA region access enable for bit 8 in region 0" "Disabled,Enabled" newline bitfld.long 0x00 7. "E[7],DMA region access enable for bit 7 in region 0" "Disabled,Enabled" bitfld.long 0x00 6. "E[6],DMA region access enable for bit 6 in region 0" "Disabled,Enabled" newline bitfld.long 0x00 5. "E[5],DMA region access enable for bit 5 in region 0" "Disabled,Enabled" bitfld.long 0x00 4. "E[4],DMA region access enable for bit 4 in region 0" "Disabled,Enabled" newline bitfld.long 0x00 3. "E[3],DMA region access enable for bit 3 in region 0" "Disabled,Enabled" bitfld.long 0x00 2. "E[2],DMA region access enable for bit 2 in region 0" "Disabled,Enabled" newline bitfld.long 0x00 1. "E[1],DMA region access enable for bit 1 in region 0" "Disabled,Enabled" bitfld.long 0x00 0. "E[0],DMA region access enable for bit 0 in region 0" "Disabled,Enabled" line.long 0x04 "DRAEH0,DMA Region Access Enable Register High For Region 0" bitfld.long 0x04 31. "E[63],DMA region access enable for bit 63 in region 0" "Disabled,Enabled" bitfld.long 0x04 30. "E[62],DMA region access enable for bit 62 in region 0" "Disabled,Enabled" newline bitfld.long 0x04 29. "E[61],DMA region access enable for bit 61 in region 0" "Disabled,Enabled" bitfld.long 0x04 28. "E[60],DMA region access enable for bit 60 in region 0" "Disabled,Enabled" newline bitfld.long 0x04 27. "E[59],DMA region access enable for bit 59 in region 0" "Disabled,Enabled" bitfld.long 0x04 26. "E[58],DMA region access enable for bit 58 in region 0" "Disabled,Enabled" newline bitfld.long 0x04 25. "E[57],DMA region access enable for bit 57 in region 0" "Disabled,Enabled" bitfld.long 0x04 24. "E[56],DMA region access enable for bit 56 in region 0" "Disabled,Enabled" newline bitfld.long 0x04 23. "E[55],DMA region access enable for bit 55 in region 0" "Disabled,Enabled" bitfld.long 0x04 22. "E[54],DMA region access enable for bit 54 in region 0" "Disabled,Enabled" newline bitfld.long 0x04 21. "E[53],DMA region access enable for bit 53 in region 0" "Disabled,Enabled" bitfld.long 0x04 20. "E[52],DMA region access enable for bit 52 in region 0" "Disabled,Enabled" newline bitfld.long 0x04 19. "E[51],DMA region access enable for bit 51 in region 0" "Disabled,Enabled" bitfld.long 0x04 18. "E[50],DMA region access enable for bit 50 in region 0" "Disabled,Enabled" newline bitfld.long 0x04 17. "E[49],DMA region access enable for bit 49 in region 0" "Disabled,Enabled" bitfld.long 0x04 16. "E[48],DMA region access enable for bit 48 in region 0" "Disabled,Enabled" newline bitfld.long 0x04 15. "E[47],DMA region access enable for bit 47 in region 0" "Disabled,Enabled" bitfld.long 0x04 14. "E[46],DMA region access enable for bit 46 in region 0" "Disabled,Enabled" newline bitfld.long 0x04 13. "E[45],DMA region access enable for bit 45 in region 0" "Disabled,Enabled" bitfld.long 0x04 12. "E[44],DMA region access enable for bit 44 in region 0" "Disabled,Enabled" newline bitfld.long 0x04 11. "E[43],DMA region access enable for bit 43 in region 0" "Disabled,Enabled" bitfld.long 0x04 10. "E[42],DMA region access enable for bit 42 in region 0" "Disabled,Enabled" newline bitfld.long 0x04 9. "E[41],DMA region access enable for bit 41 in region 0" "Disabled,Enabled" bitfld.long 0x04 8. "E[40],DMA region access enable for bit 40 in region 0" "Disabled,Enabled" newline bitfld.long 0x04 7. "E[39],DMA region access enable for bit 39 in region 0" "Disabled,Enabled" bitfld.long 0x04 6. "E[38],DMA region access enable for bit 38 in region 0" "Disabled,Enabled" newline bitfld.long 0x04 5. "E[37],DMA region access enable for bit 37 in region 0" "Disabled,Enabled" bitfld.long 0x04 4. "E[36],DMA region access enable for bit 36 in region 0" "Disabled,Enabled" newline bitfld.long 0x04 3. "E[35],DMA region access enable for bit 35 in region 0" "Disabled,Enabled" bitfld.long 0x04 2. "E[34],DMA region access enable for bit 34 in region 0" "Disabled,Enabled" newline bitfld.long 0x04 1. "E[33],DMA region access enable for bit 33 in region 0" "Disabled,Enabled" bitfld.long 0x04 0. "E[32],DMA region access enable for bit 32 in region 0" "Disabled,Enabled" group.long 0x348++0x07 line.long 0x00 "DRAE1,DMA Region Access Enable Register For Region 1" bitfld.long 0x00 31. "E[31],DMA region access enable for bit 31 in region 1" "Disabled,Enabled" bitfld.long 0x00 30. "E[30],DMA region access enable for bit 30 in region 1" "Disabled,Enabled" newline bitfld.long 0x00 29. "E[29],DMA region access enable for bit 29 in region 1" "Disabled,Enabled" bitfld.long 0x00 28. "E[28],DMA region access enable for bit 28 in region 1" "Disabled,Enabled" newline bitfld.long 0x00 27. "E[27],DMA region access enable for bit 27 in region 1" "Disabled,Enabled" bitfld.long 0x00 26. "E[26],DMA region access enable for bit 26 in region 1" "Disabled,Enabled" newline bitfld.long 0x00 25. "E[25],DMA region access enable for bit 25 in region 1" "Disabled,Enabled" bitfld.long 0x00 24. "E[24],DMA region access enable for bit 24 in region 1" "Disabled,Enabled" newline bitfld.long 0x00 23. "E[23],DMA region access enable for bit 23 in region 1" "Disabled,Enabled" bitfld.long 0x00 22. "E[22],DMA region access enable for bit 22 in region 1" "Disabled,Enabled" newline bitfld.long 0x00 21. "E[21],DMA region access enable for bit 21 in region 1" "Disabled,Enabled" bitfld.long 0x00 20. "E[20],DMA region access enable for bit 20 in region 1" "Disabled,Enabled" newline bitfld.long 0x00 19. "E[19],DMA region access enable for bit 19 in region 1" "Disabled,Enabled" bitfld.long 0x00 18. "E[18],DMA region access enable for bit 18 in region 1" "Disabled,Enabled" newline bitfld.long 0x00 17. "E[17],DMA region access enable for bit 17 in region 1" "Disabled,Enabled" bitfld.long 0x00 16. "E[16],DMA region access enable for bit 16 in region 1" "Disabled,Enabled" newline bitfld.long 0x00 15. "E[15],DMA region access enable for bit 15 in region 1" "Disabled,Enabled" bitfld.long 0x00 14. "E[14],DMA region access enable for bit 14 in region 1" "Disabled,Enabled" newline bitfld.long 0x00 13. "E[13],DMA region access enable for bit 13 in region 1" "Disabled,Enabled" bitfld.long 0x00 12. "E[12],DMA region access enable for bit 12 in region 1" "Disabled,Enabled" newline bitfld.long 0x00 11. "E[11],DMA region access enable for bit 11 in region 1" "Disabled,Enabled" bitfld.long 0x00 10. "E[10],DMA region access enable for bit 10 in region 1" "Disabled,Enabled" newline bitfld.long 0x00 9. "E[9],DMA region access enable for bit 9 in region 1" "Disabled,Enabled" bitfld.long 0x00 8. "E[8],DMA region access enable for bit 8 in region 1" "Disabled,Enabled" newline bitfld.long 0x00 7. "E[7],DMA region access enable for bit 7 in region 1" "Disabled,Enabled" bitfld.long 0x00 6. "E[6],DMA region access enable for bit 6 in region 1" "Disabled,Enabled" newline bitfld.long 0x00 5. "E[5],DMA region access enable for bit 5 in region 1" "Disabled,Enabled" bitfld.long 0x00 4. "E[4],DMA region access enable for bit 4 in region 1" "Disabled,Enabled" newline bitfld.long 0x00 3. "E[3],DMA region access enable for bit 3 in region 1" "Disabled,Enabled" bitfld.long 0x00 2. "E[2],DMA region access enable for bit 2 in region 1" "Disabled,Enabled" newline bitfld.long 0x00 1. "E[1],DMA region access enable for bit 1 in region 1" "Disabled,Enabled" bitfld.long 0x00 0. "E[0],DMA region access enable for bit 0 in region 1" "Disabled,Enabled" line.long 0x04 "DRAEH1,DMA Region Access Enable Register High For Region 1" bitfld.long 0x04 31. "E[63],DMA region access enable for bit 63 in region 1" "Disabled,Enabled" bitfld.long 0x04 30. "E[62],DMA region access enable for bit 62 in region 1" "Disabled,Enabled" newline bitfld.long 0x04 29. "E[61],DMA region access enable for bit 61 in region 1" "Disabled,Enabled" bitfld.long 0x04 28. "E[60],DMA region access enable for bit 60 in region 1" "Disabled,Enabled" newline bitfld.long 0x04 27. "E[59],DMA region access enable for bit 59 in region 1" "Disabled,Enabled" bitfld.long 0x04 26. "E[58],DMA region access enable for bit 58 in region 1" "Disabled,Enabled" newline bitfld.long 0x04 25. "E[57],DMA region access enable for bit 57 in region 1" "Disabled,Enabled" bitfld.long 0x04 24. "E[56],DMA region access enable for bit 56 in region 1" "Disabled,Enabled" newline bitfld.long 0x04 23. "E[55],DMA region access enable for bit 55 in region 1" "Disabled,Enabled" bitfld.long 0x04 22. "E[54],DMA region access enable for bit 54 in region 1" "Disabled,Enabled" newline bitfld.long 0x04 21. "E[53],DMA region access enable for bit 53 in region 1" "Disabled,Enabled" bitfld.long 0x04 20. "E[52],DMA region access enable for bit 52 in region 1" "Disabled,Enabled" newline bitfld.long 0x04 19. "E[51],DMA region access enable for bit 51 in region 1" "Disabled,Enabled" bitfld.long 0x04 18. "E[50],DMA region access enable for bit 50 in region 1" "Disabled,Enabled" newline bitfld.long 0x04 17. "E[49],DMA region access enable for bit 49 in region 1" "Disabled,Enabled" bitfld.long 0x04 16. "E[48],DMA region access enable for bit 48 in region 1" "Disabled,Enabled" newline bitfld.long 0x04 15. "E[47],DMA region access enable for bit 47 in region 1" "Disabled,Enabled" bitfld.long 0x04 14. "E[46],DMA region access enable for bit 46 in region 1" "Disabled,Enabled" newline bitfld.long 0x04 13. "E[45],DMA region access enable for bit 45 in region 1" "Disabled,Enabled" bitfld.long 0x04 12. "E[44],DMA region access enable for bit 44 in region 1" "Disabled,Enabled" newline bitfld.long 0x04 11. "E[43],DMA region access enable for bit 43 in region 1" "Disabled,Enabled" bitfld.long 0x04 10. "E[42],DMA region access enable for bit 42 in region 1" "Disabled,Enabled" newline bitfld.long 0x04 9. "E[41],DMA region access enable for bit 41 in region 1" "Disabled,Enabled" bitfld.long 0x04 8. "E[40],DMA region access enable for bit 40 in region 1" "Disabled,Enabled" newline bitfld.long 0x04 7. "E[39],DMA region access enable for bit 39 in region 1" "Disabled,Enabled" bitfld.long 0x04 6. "E[38],DMA region access enable for bit 38 in region 1" "Disabled,Enabled" newline bitfld.long 0x04 5. "E[37],DMA region access enable for bit 37 in region 1" "Disabled,Enabled" bitfld.long 0x04 4. "E[36],DMA region access enable for bit 36 in region 1" "Disabled,Enabled" newline bitfld.long 0x04 3. "E[35],DMA region access enable for bit 35 in region 1" "Disabled,Enabled" bitfld.long 0x04 2. "E[34],DMA region access enable for bit 34 in region 1" "Disabled,Enabled" newline bitfld.long 0x04 1. "E[33],DMA region access enable for bit 33 in region 1" "Disabled,Enabled" bitfld.long 0x04 0. "E[32],DMA region access enable for bit 32 in region 1" "Disabled,Enabled" group.long 0x350++0x07 line.long 0x00 "DRAE2,DMA Region Access Enable Register For Region 2" bitfld.long 0x00 31. "E[31],DMA region access enable for bit 31 in region 2" "Disabled,Enabled" bitfld.long 0x00 30. "E[30],DMA region access enable for bit 30 in region 2" "Disabled,Enabled" newline bitfld.long 0x00 29. "E[29],DMA region access enable for bit 29 in region 2" "Disabled,Enabled" bitfld.long 0x00 28. "E[28],DMA region access enable for bit 28 in region 2" "Disabled,Enabled" newline bitfld.long 0x00 27. "E[27],DMA region access enable for bit 27 in region 2" "Disabled,Enabled" bitfld.long 0x00 26. "E[26],DMA region access enable for bit 26 in region 2" "Disabled,Enabled" newline bitfld.long 0x00 25. "E[25],DMA region access enable for bit 25 in region 2" "Disabled,Enabled" bitfld.long 0x00 24. "E[24],DMA region access enable for bit 24 in region 2" "Disabled,Enabled" newline bitfld.long 0x00 23. "E[23],DMA region access enable for bit 23 in region 2" "Disabled,Enabled" bitfld.long 0x00 22. "E[22],DMA region access enable for bit 22 in region 2" "Disabled,Enabled" newline bitfld.long 0x00 21. "E[21],DMA region access enable for bit 21 in region 2" "Disabled,Enabled" bitfld.long 0x00 20. "E[20],DMA region access enable for bit 20 in region 2" "Disabled,Enabled" newline bitfld.long 0x00 19. "E[19],DMA region access enable for bit 19 in region 2" "Disabled,Enabled" bitfld.long 0x00 18. "E[18],DMA region access enable for bit 18 in region 2" "Disabled,Enabled" newline bitfld.long 0x00 17. "E[17],DMA region access enable for bit 17 in region 2" "Disabled,Enabled" bitfld.long 0x00 16. "E[16],DMA region access enable for bit 16 in region 2" "Disabled,Enabled" newline bitfld.long 0x00 15. "E[15],DMA region access enable for bit 15 in region 2" "Disabled,Enabled" bitfld.long 0x00 14. "E[14],DMA region access enable for bit 14 in region 2" "Disabled,Enabled" newline bitfld.long 0x00 13. "E[13],DMA region access enable for bit 13 in region 2" "Disabled,Enabled" bitfld.long 0x00 12. "E[12],DMA region access enable for bit 12 in region 2" "Disabled,Enabled" newline bitfld.long 0x00 11. "E[11],DMA region access enable for bit 11 in region 2" "Disabled,Enabled" bitfld.long 0x00 10. "E[10],DMA region access enable for bit 10 in region 2" "Disabled,Enabled" newline bitfld.long 0x00 9. "E[9],DMA region access enable for bit 9 in region 2" "Disabled,Enabled" bitfld.long 0x00 8. "E[8],DMA region access enable for bit 8 in region 2" "Disabled,Enabled" newline bitfld.long 0x00 7. "E[7],DMA region access enable for bit 7 in region 2" "Disabled,Enabled" bitfld.long 0x00 6. "E[6],DMA region access enable for bit 6 in region 2" "Disabled,Enabled" newline bitfld.long 0x00 5. "E[5],DMA region access enable for bit 5 in region 2" "Disabled,Enabled" bitfld.long 0x00 4. "E[4],DMA region access enable for bit 4 in region 2" "Disabled,Enabled" newline bitfld.long 0x00 3. "E[3],DMA region access enable for bit 3 in region 2" "Disabled,Enabled" bitfld.long 0x00 2. "E[2],DMA region access enable for bit 2 in region 2" "Disabled,Enabled" newline bitfld.long 0x00 1. "E[1],DMA region access enable for bit 1 in region 2" "Disabled,Enabled" bitfld.long 0x00 0. "E[0],DMA region access enable for bit 0 in region 2" "Disabled,Enabled" line.long 0x04 "DRAEH2,DMA Region Access Enable Register High For Region 2" bitfld.long 0x04 31. "E[63],DMA region access enable for bit 63 in region 2" "Disabled,Enabled" bitfld.long 0x04 30. "E[62],DMA region access enable for bit 62 in region 2" "Disabled,Enabled" newline bitfld.long 0x04 29. "E[61],DMA region access enable for bit 61 in region 2" "Disabled,Enabled" bitfld.long 0x04 28. "E[60],DMA region access enable for bit 60 in region 2" "Disabled,Enabled" newline bitfld.long 0x04 27. "E[59],DMA region access enable for bit 59 in region 2" "Disabled,Enabled" bitfld.long 0x04 26. "E[58],DMA region access enable for bit 58 in region 2" "Disabled,Enabled" newline bitfld.long 0x04 25. "E[57],DMA region access enable for bit 57 in region 2" "Disabled,Enabled" bitfld.long 0x04 24. "E[56],DMA region access enable for bit 56 in region 2" "Disabled,Enabled" newline bitfld.long 0x04 23. "E[55],DMA region access enable for bit 55 in region 2" "Disabled,Enabled" bitfld.long 0x04 22. "E[54],DMA region access enable for bit 54 in region 2" "Disabled,Enabled" newline bitfld.long 0x04 21. "E[53],DMA region access enable for bit 53 in region 2" "Disabled,Enabled" bitfld.long 0x04 20. "E[52],DMA region access enable for bit 52 in region 2" "Disabled,Enabled" newline bitfld.long 0x04 19. "E[51],DMA region access enable for bit 51 in region 2" "Disabled,Enabled" bitfld.long 0x04 18. "E[50],DMA region access enable for bit 50 in region 2" "Disabled,Enabled" newline bitfld.long 0x04 17. "E[49],DMA region access enable for bit 49 in region 2" "Disabled,Enabled" bitfld.long 0x04 16. "E[48],DMA region access enable for bit 48 in region 2" "Disabled,Enabled" newline bitfld.long 0x04 15. "E[47],DMA region access enable for bit 47 in region 2" "Disabled,Enabled" bitfld.long 0x04 14. "E[46],DMA region access enable for bit 46 in region 2" "Disabled,Enabled" newline bitfld.long 0x04 13. "E[45],DMA region access enable for bit 45 in region 2" "Disabled,Enabled" bitfld.long 0x04 12. "E[44],DMA region access enable for bit 44 in region 2" "Disabled,Enabled" newline bitfld.long 0x04 11. "E[43],DMA region access enable for bit 43 in region 2" "Disabled,Enabled" bitfld.long 0x04 10. "E[42],DMA region access enable for bit 42 in region 2" "Disabled,Enabled" newline bitfld.long 0x04 9. "E[41],DMA region access enable for bit 41 in region 2" "Disabled,Enabled" bitfld.long 0x04 8. "E[40],DMA region access enable for bit 40 in region 2" "Disabled,Enabled" newline bitfld.long 0x04 7. "E[39],DMA region access enable for bit 39 in region 2" "Disabled,Enabled" bitfld.long 0x04 6. "E[38],DMA region access enable for bit 38 in region 2" "Disabled,Enabled" newline bitfld.long 0x04 5. "E[37],DMA region access enable for bit 37 in region 2" "Disabled,Enabled" bitfld.long 0x04 4. "E[36],DMA region access enable for bit 36 in region 2" "Disabled,Enabled" newline bitfld.long 0x04 3. "E[35],DMA region access enable for bit 35 in region 2" "Disabled,Enabled" bitfld.long 0x04 2. "E[34],DMA region access enable for bit 34 in region 2" "Disabled,Enabled" newline bitfld.long 0x04 1. "E[33],DMA region access enable for bit 33 in region 2" "Disabled,Enabled" bitfld.long 0x04 0. "E[32],DMA region access enable for bit 32 in region 2" "Disabled,Enabled" group.long 0x358++0x07 line.long 0x00 "DRAE3,DMA Region Access Enable Register For Region 3" bitfld.long 0x00 31. "E[31],DMA region access enable for bit 31 in region 3" "Disabled,Enabled" bitfld.long 0x00 30. "E[30],DMA region access enable for bit 30 in region 3" "Disabled,Enabled" newline bitfld.long 0x00 29. "E[29],DMA region access enable for bit 29 in region 3" "Disabled,Enabled" bitfld.long 0x00 28. "E[28],DMA region access enable for bit 28 in region 3" "Disabled,Enabled" newline bitfld.long 0x00 27. "E[27],DMA region access enable for bit 27 in region 3" "Disabled,Enabled" bitfld.long 0x00 26. "E[26],DMA region access enable for bit 26 in region 3" "Disabled,Enabled" newline bitfld.long 0x00 25. "E[25],DMA region access enable for bit 25 in region 3" "Disabled,Enabled" bitfld.long 0x00 24. "E[24],DMA region access enable for bit 24 in region 3" "Disabled,Enabled" newline bitfld.long 0x00 23. "E[23],DMA region access enable for bit 23 in region 3" "Disabled,Enabled" bitfld.long 0x00 22. "E[22],DMA region access enable for bit 22 in region 3" "Disabled,Enabled" newline bitfld.long 0x00 21. "E[21],DMA region access enable for bit 21 in region 3" "Disabled,Enabled" bitfld.long 0x00 20. "E[20],DMA region access enable for bit 20 in region 3" "Disabled,Enabled" newline bitfld.long 0x00 19. "E[19],DMA region access enable for bit 19 in region 3" "Disabled,Enabled" bitfld.long 0x00 18. "E[18],DMA region access enable for bit 18 in region 3" "Disabled,Enabled" newline bitfld.long 0x00 17. "E[17],DMA region access enable for bit 17 in region 3" "Disabled,Enabled" bitfld.long 0x00 16. "E[16],DMA region access enable for bit 16 in region 3" "Disabled,Enabled" newline bitfld.long 0x00 15. "E[15],DMA region access enable for bit 15 in region 3" "Disabled,Enabled" bitfld.long 0x00 14. "E[14],DMA region access enable for bit 14 in region 3" "Disabled,Enabled" newline bitfld.long 0x00 13. "E[13],DMA region access enable for bit 13 in region 3" "Disabled,Enabled" bitfld.long 0x00 12. "E[12],DMA region access enable for bit 12 in region 3" "Disabled,Enabled" newline bitfld.long 0x00 11. "E[11],DMA region access enable for bit 11 in region 3" "Disabled,Enabled" bitfld.long 0x00 10. "E[10],DMA region access enable for bit 10 in region 3" "Disabled,Enabled" newline bitfld.long 0x00 9. "E[9],DMA region access enable for bit 9 in region 3" "Disabled,Enabled" bitfld.long 0x00 8. "E[8],DMA region access enable for bit 8 in region 3" "Disabled,Enabled" newline bitfld.long 0x00 7. "E[7],DMA region access enable for bit 7 in region 3" "Disabled,Enabled" bitfld.long 0x00 6. "E[6],DMA region access enable for bit 6 in region 3" "Disabled,Enabled" newline bitfld.long 0x00 5. "E[5],DMA region access enable for bit 5 in region 3" "Disabled,Enabled" bitfld.long 0x00 4. "E[4],DMA region access enable for bit 4 in region 3" "Disabled,Enabled" newline bitfld.long 0x00 3. "E[3],DMA region access enable for bit 3 in region 3" "Disabled,Enabled" bitfld.long 0x00 2. "E[2],DMA region access enable for bit 2 in region 3" "Disabled,Enabled" newline bitfld.long 0x00 1. "E[1],DMA region access enable for bit 1 in region 3" "Disabled,Enabled" bitfld.long 0x00 0. "E[0],DMA region access enable for bit 0 in region 3" "Disabled,Enabled" line.long 0x04 "DRAEH3,DMA Region Access Enable Register High For Region 3" bitfld.long 0x04 31. "E[63],DMA region access enable for bit 63 in region 3" "Disabled,Enabled" bitfld.long 0x04 30. "E[62],DMA region access enable for bit 62 in region 3" "Disabled,Enabled" newline bitfld.long 0x04 29. "E[61],DMA region access enable for bit 61 in region 3" "Disabled,Enabled" bitfld.long 0x04 28. "E[60],DMA region access enable for bit 60 in region 3" "Disabled,Enabled" newline bitfld.long 0x04 27. "E[59],DMA region access enable for bit 59 in region 3" "Disabled,Enabled" bitfld.long 0x04 26. "E[58],DMA region access enable for bit 58 in region 3" "Disabled,Enabled" newline bitfld.long 0x04 25. "E[57],DMA region access enable for bit 57 in region 3" "Disabled,Enabled" bitfld.long 0x04 24. "E[56],DMA region access enable for bit 56 in region 3" "Disabled,Enabled" newline bitfld.long 0x04 23. "E[55],DMA region access enable for bit 55 in region 3" "Disabled,Enabled" bitfld.long 0x04 22. "E[54],DMA region access enable for bit 54 in region 3" "Disabled,Enabled" newline bitfld.long 0x04 21. "E[53],DMA region access enable for bit 53 in region 3" "Disabled,Enabled" bitfld.long 0x04 20. "E[52],DMA region access enable for bit 52 in region 3" "Disabled,Enabled" newline bitfld.long 0x04 19. "E[51],DMA region access enable for bit 51 in region 3" "Disabled,Enabled" bitfld.long 0x04 18. "E[50],DMA region access enable for bit 50 in region 3" "Disabled,Enabled" newline bitfld.long 0x04 17. "E[49],DMA region access enable for bit 49 in region 3" "Disabled,Enabled" bitfld.long 0x04 16. "E[48],DMA region access enable for bit 48 in region 3" "Disabled,Enabled" newline bitfld.long 0x04 15. "E[47],DMA region access enable for bit 47 in region 3" "Disabled,Enabled" bitfld.long 0x04 14. "E[46],DMA region access enable for bit 46 in region 3" "Disabled,Enabled" newline bitfld.long 0x04 13. "E[45],DMA region access enable for bit 45 in region 3" "Disabled,Enabled" bitfld.long 0x04 12. "E[44],DMA region access enable for bit 44 in region 3" "Disabled,Enabled" newline bitfld.long 0x04 11. "E[43],DMA region access enable for bit 43 in region 3" "Disabled,Enabled" bitfld.long 0x04 10. "E[42],DMA region access enable for bit 42 in region 3" "Disabled,Enabled" newline bitfld.long 0x04 9. "E[41],DMA region access enable for bit 41 in region 3" "Disabled,Enabled" bitfld.long 0x04 8. "E[40],DMA region access enable for bit 40 in region 3" "Disabled,Enabled" newline bitfld.long 0x04 7. "E[39],DMA region access enable for bit 39 in region 3" "Disabled,Enabled" bitfld.long 0x04 6. "E[38],DMA region access enable for bit 38 in region 3" "Disabled,Enabled" newline bitfld.long 0x04 5. "E[37],DMA region access enable for bit 37 in region 3" "Disabled,Enabled" bitfld.long 0x04 4. "E[36],DMA region access enable for bit 36 in region 3" "Disabled,Enabled" newline bitfld.long 0x04 3. "E[35],DMA region access enable for bit 35 in region 3" "Disabled,Enabled" bitfld.long 0x04 2. "E[34],DMA region access enable for bit 34 in region 3" "Disabled,Enabled" newline bitfld.long 0x04 1. "E[33],DMA region access enable for bit 33 in region 3" "Disabled,Enabled" bitfld.long 0x04 0. "E[32],DMA region access enable for bit 32 in region 3" "Disabled,Enabled" group.long 0x360++0x07 line.long 0x00 "DRAE4,DMA Region Access Enable Register For Region 4" bitfld.long 0x00 31. "E[31],DMA region access enable for bit 31 in region 4" "Disabled,Enabled" bitfld.long 0x00 30. "E[30],DMA region access enable for bit 30 in region 4" "Disabled,Enabled" newline bitfld.long 0x00 29. "E[29],DMA region access enable for bit 29 in region 4" "Disabled,Enabled" bitfld.long 0x00 28. "E[28],DMA region access enable for bit 28 in region 4" "Disabled,Enabled" newline bitfld.long 0x00 27. "E[27],DMA region access enable for bit 27 in region 4" "Disabled,Enabled" bitfld.long 0x00 26. "E[26],DMA region access enable for bit 26 in region 4" "Disabled,Enabled" newline bitfld.long 0x00 25. "E[25],DMA region access enable for bit 25 in region 4" "Disabled,Enabled" bitfld.long 0x00 24. "E[24],DMA region access enable for bit 24 in region 4" "Disabled,Enabled" newline bitfld.long 0x00 23. "E[23],DMA region access enable for bit 23 in region 4" "Disabled,Enabled" bitfld.long 0x00 22. "E[22],DMA region access enable for bit 22 in region 4" "Disabled,Enabled" newline bitfld.long 0x00 21. "E[21],DMA region access enable for bit 21 in region 4" "Disabled,Enabled" bitfld.long 0x00 20. "E[20],DMA region access enable for bit 20 in region 4" "Disabled,Enabled" newline bitfld.long 0x00 19. "E[19],DMA region access enable for bit 19 in region 4" "Disabled,Enabled" bitfld.long 0x00 18. "E[18],DMA region access enable for bit 18 in region 4" "Disabled,Enabled" newline bitfld.long 0x00 17. "E[17],DMA region access enable for bit 17 in region 4" "Disabled,Enabled" bitfld.long 0x00 16. "E[16],DMA region access enable for bit 16 in region 4" "Disabled,Enabled" newline bitfld.long 0x00 15. "E[15],DMA region access enable for bit 15 in region 4" "Disabled,Enabled" bitfld.long 0x00 14. "E[14],DMA region access enable for bit 14 in region 4" "Disabled,Enabled" newline bitfld.long 0x00 13. "E[13],DMA region access enable for bit 13 in region 4" "Disabled,Enabled" bitfld.long 0x00 12. "E[12],DMA region access enable for bit 12 in region 4" "Disabled,Enabled" newline bitfld.long 0x00 11. "E[11],DMA region access enable for bit 11 in region 4" "Disabled,Enabled" bitfld.long 0x00 10. "E[10],DMA region access enable for bit 10 in region 4" "Disabled,Enabled" newline bitfld.long 0x00 9. "E[9],DMA region access enable for bit 9 in region 4" "Disabled,Enabled" bitfld.long 0x00 8. "E[8],DMA region access enable for bit 8 in region 4" "Disabled,Enabled" newline bitfld.long 0x00 7. "E[7],DMA region access enable for bit 7 in region 4" "Disabled,Enabled" bitfld.long 0x00 6. "E[6],DMA region access enable for bit 6 in region 4" "Disabled,Enabled" newline bitfld.long 0x00 5. "E[5],DMA region access enable for bit 5 in region 4" "Disabled,Enabled" bitfld.long 0x00 4. "E[4],DMA region access enable for bit 4 in region 4" "Disabled,Enabled" newline bitfld.long 0x00 3. "E[3],DMA region access enable for bit 3 in region 4" "Disabled,Enabled" bitfld.long 0x00 2. "E[2],DMA region access enable for bit 2 in region 4" "Disabled,Enabled" newline bitfld.long 0x00 1. "E[1],DMA region access enable for bit 1 in region 4" "Disabled,Enabled" bitfld.long 0x00 0. "E[0],DMA region access enable for bit 0 in region 4" "Disabled,Enabled" line.long 0x04 "DRAEH4,DMA Region Access Enable Register High For Region 4" bitfld.long 0x04 31. "E[63],DMA region access enable for bit 63 in region 4" "Disabled,Enabled" bitfld.long 0x04 30. "E[62],DMA region access enable for bit 62 in region 4" "Disabled,Enabled" newline bitfld.long 0x04 29. "E[61],DMA region access enable for bit 61 in region 4" "Disabled,Enabled" bitfld.long 0x04 28. "E[60],DMA region access enable for bit 60 in region 4" "Disabled,Enabled" newline bitfld.long 0x04 27. "E[59],DMA region access enable for bit 59 in region 4" "Disabled,Enabled" bitfld.long 0x04 26. "E[58],DMA region access enable for bit 58 in region 4" "Disabled,Enabled" newline bitfld.long 0x04 25. "E[57],DMA region access enable for bit 57 in region 4" "Disabled,Enabled" bitfld.long 0x04 24. "E[56],DMA region access enable for bit 56 in region 4" "Disabled,Enabled" newline bitfld.long 0x04 23. "E[55],DMA region access enable for bit 55 in region 4" "Disabled,Enabled" bitfld.long 0x04 22. "E[54],DMA region access enable for bit 54 in region 4" "Disabled,Enabled" newline bitfld.long 0x04 21. "E[53],DMA region access enable for bit 53 in region 4" "Disabled,Enabled" bitfld.long 0x04 20. "E[52],DMA region access enable for bit 52 in region 4" "Disabled,Enabled" newline bitfld.long 0x04 19. "E[51],DMA region access enable for bit 51 in region 4" "Disabled,Enabled" bitfld.long 0x04 18. "E[50],DMA region access enable for bit 50 in region 4" "Disabled,Enabled" newline bitfld.long 0x04 17. "E[49],DMA region access enable for bit 49 in region 4" "Disabled,Enabled" bitfld.long 0x04 16. "E[48],DMA region access enable for bit 48 in region 4" "Disabled,Enabled" newline bitfld.long 0x04 15. "E[47],DMA region access enable for bit 47 in region 4" "Disabled,Enabled" bitfld.long 0x04 14. "E[46],DMA region access enable for bit 46 in region 4" "Disabled,Enabled" newline bitfld.long 0x04 13. "E[45],DMA region access enable for bit 45 in region 4" "Disabled,Enabled" bitfld.long 0x04 12. "E[44],DMA region access enable for bit 44 in region 4" "Disabled,Enabled" newline bitfld.long 0x04 11. "E[43],DMA region access enable for bit 43 in region 4" "Disabled,Enabled" bitfld.long 0x04 10. "E[42],DMA region access enable for bit 42 in region 4" "Disabled,Enabled" newline bitfld.long 0x04 9. "E[41],DMA region access enable for bit 41 in region 4" "Disabled,Enabled" bitfld.long 0x04 8. "E[40],DMA region access enable for bit 40 in region 4" "Disabled,Enabled" newline bitfld.long 0x04 7. "E[39],DMA region access enable for bit 39 in region 4" "Disabled,Enabled" bitfld.long 0x04 6. "E[38],DMA region access enable for bit 38 in region 4" "Disabled,Enabled" newline bitfld.long 0x04 5. "E[37],DMA region access enable for bit 37 in region 4" "Disabled,Enabled" bitfld.long 0x04 4. "E[36],DMA region access enable for bit 36 in region 4" "Disabled,Enabled" newline bitfld.long 0x04 3. "E[35],DMA region access enable for bit 35 in region 4" "Disabled,Enabled" bitfld.long 0x04 2. "E[34],DMA region access enable for bit 34 in region 4" "Disabled,Enabled" newline bitfld.long 0x04 1. "E[33],DMA region access enable for bit 33 in region 4" "Disabled,Enabled" bitfld.long 0x04 0. "E[32],DMA region access enable for bit 32 in region 4" "Disabled,Enabled" group.long 0x368++0x07 line.long 0x00 "DRAE5,DMA Region Access Enable Register For Region 5" bitfld.long 0x00 31. "E[31],DMA region access enable for bit 31 in region 5" "Disabled,Enabled" bitfld.long 0x00 30. "E[30],DMA region access enable for bit 30 in region 5" "Disabled,Enabled" newline bitfld.long 0x00 29. "E[29],DMA region access enable for bit 29 in region 5" "Disabled,Enabled" bitfld.long 0x00 28. "E[28],DMA region access enable for bit 28 in region 5" "Disabled,Enabled" newline bitfld.long 0x00 27. "E[27],DMA region access enable for bit 27 in region 5" "Disabled,Enabled" bitfld.long 0x00 26. "E[26],DMA region access enable for bit 26 in region 5" "Disabled,Enabled" newline bitfld.long 0x00 25. "E[25],DMA region access enable for bit 25 in region 5" "Disabled,Enabled" bitfld.long 0x00 24. "E[24],DMA region access enable for bit 24 in region 5" "Disabled,Enabled" newline bitfld.long 0x00 23. "E[23],DMA region access enable for bit 23 in region 5" "Disabled,Enabled" bitfld.long 0x00 22. "E[22],DMA region access enable for bit 22 in region 5" "Disabled,Enabled" newline bitfld.long 0x00 21. "E[21],DMA region access enable for bit 21 in region 5" "Disabled,Enabled" bitfld.long 0x00 20. "E[20],DMA region access enable for bit 20 in region 5" "Disabled,Enabled" newline bitfld.long 0x00 19. "E[19],DMA region access enable for bit 19 in region 5" "Disabled,Enabled" bitfld.long 0x00 18. "E[18],DMA region access enable for bit 18 in region 5" "Disabled,Enabled" newline bitfld.long 0x00 17. "E[17],DMA region access enable for bit 17 in region 5" "Disabled,Enabled" bitfld.long 0x00 16. "E[16],DMA region access enable for bit 16 in region 5" "Disabled,Enabled" newline bitfld.long 0x00 15. "E[15],DMA region access enable for bit 15 in region 5" "Disabled,Enabled" bitfld.long 0x00 14. "E[14],DMA region access enable for bit 14 in region 5" "Disabled,Enabled" newline bitfld.long 0x00 13. "E[13],DMA region access enable for bit 13 in region 5" "Disabled,Enabled" bitfld.long 0x00 12. "E[12],DMA region access enable for bit 12 in region 5" "Disabled,Enabled" newline bitfld.long 0x00 11. "E[11],DMA region access enable for bit 11 in region 5" "Disabled,Enabled" bitfld.long 0x00 10. "E[10],DMA region access enable for bit 10 in region 5" "Disabled,Enabled" newline bitfld.long 0x00 9. "E[9],DMA region access enable for bit 9 in region 5" "Disabled,Enabled" bitfld.long 0x00 8. "E[8],DMA region access enable for bit 8 in region 5" "Disabled,Enabled" newline bitfld.long 0x00 7. "E[7],DMA region access enable for bit 7 in region 5" "Disabled,Enabled" bitfld.long 0x00 6. "E[6],DMA region access enable for bit 6 in region 5" "Disabled,Enabled" newline bitfld.long 0x00 5. "E[5],DMA region access enable for bit 5 in region 5" "Disabled,Enabled" bitfld.long 0x00 4. "E[4],DMA region access enable for bit 4 in region 5" "Disabled,Enabled" newline bitfld.long 0x00 3. "E[3],DMA region access enable for bit 3 in region 5" "Disabled,Enabled" bitfld.long 0x00 2. "E[2],DMA region access enable for bit 2 in region 5" "Disabled,Enabled" newline bitfld.long 0x00 1. "E[1],DMA region access enable for bit 1 in region 5" "Disabled,Enabled" bitfld.long 0x00 0. "E[0],DMA region access enable for bit 0 in region 5" "Disabled,Enabled" line.long 0x04 "DRAEH5,DMA Region Access Enable Register High For Region 5" bitfld.long 0x04 31. "E[63],DMA region access enable for bit 63 in region 5" "Disabled,Enabled" bitfld.long 0x04 30. "E[62],DMA region access enable for bit 62 in region 5" "Disabled,Enabled" newline bitfld.long 0x04 29. "E[61],DMA region access enable for bit 61 in region 5" "Disabled,Enabled" bitfld.long 0x04 28. "E[60],DMA region access enable for bit 60 in region 5" "Disabled,Enabled" newline bitfld.long 0x04 27. "E[59],DMA region access enable for bit 59 in region 5" "Disabled,Enabled" bitfld.long 0x04 26. "E[58],DMA region access enable for bit 58 in region 5" "Disabled,Enabled" newline bitfld.long 0x04 25. "E[57],DMA region access enable for bit 57 in region 5" "Disabled,Enabled" bitfld.long 0x04 24. "E[56],DMA region access enable for bit 56 in region 5" "Disabled,Enabled" newline bitfld.long 0x04 23. "E[55],DMA region access enable for bit 55 in region 5" "Disabled,Enabled" bitfld.long 0x04 22. "E[54],DMA region access enable for bit 54 in region 5" "Disabled,Enabled" newline bitfld.long 0x04 21. "E[53],DMA region access enable for bit 53 in region 5" "Disabled,Enabled" bitfld.long 0x04 20. "E[52],DMA region access enable for bit 52 in region 5" "Disabled,Enabled" newline bitfld.long 0x04 19. "E[51],DMA region access enable for bit 51 in region 5" "Disabled,Enabled" bitfld.long 0x04 18. "E[50],DMA region access enable for bit 50 in region 5" "Disabled,Enabled" newline bitfld.long 0x04 17. "E[49],DMA region access enable for bit 49 in region 5" "Disabled,Enabled" bitfld.long 0x04 16. "E[48],DMA region access enable for bit 48 in region 5" "Disabled,Enabled" newline bitfld.long 0x04 15. "E[47],DMA region access enable for bit 47 in region 5" "Disabled,Enabled" bitfld.long 0x04 14. "E[46],DMA region access enable for bit 46 in region 5" "Disabled,Enabled" newline bitfld.long 0x04 13. "E[45],DMA region access enable for bit 45 in region 5" "Disabled,Enabled" bitfld.long 0x04 12. "E[44],DMA region access enable for bit 44 in region 5" "Disabled,Enabled" newline bitfld.long 0x04 11. "E[43],DMA region access enable for bit 43 in region 5" "Disabled,Enabled" bitfld.long 0x04 10. "E[42],DMA region access enable for bit 42 in region 5" "Disabled,Enabled" newline bitfld.long 0x04 9. "E[41],DMA region access enable for bit 41 in region 5" "Disabled,Enabled" bitfld.long 0x04 8. "E[40],DMA region access enable for bit 40 in region 5" "Disabled,Enabled" newline bitfld.long 0x04 7. "E[39],DMA region access enable for bit 39 in region 5" "Disabled,Enabled" bitfld.long 0x04 6. "E[38],DMA region access enable for bit 38 in region 5" "Disabled,Enabled" newline bitfld.long 0x04 5. "E[37],DMA region access enable for bit 37 in region 5" "Disabled,Enabled" bitfld.long 0x04 4. "E[36],DMA region access enable for bit 36 in region 5" "Disabled,Enabled" newline bitfld.long 0x04 3. "E[35],DMA region access enable for bit 35 in region 5" "Disabled,Enabled" bitfld.long 0x04 2. "E[34],DMA region access enable for bit 34 in region 5" "Disabled,Enabled" newline bitfld.long 0x04 1. "E[33],DMA region access enable for bit 33 in region 5" "Disabled,Enabled" bitfld.long 0x04 0. "E[32],DMA region access enable for bit 32 in region 5" "Disabled,Enabled" group.long 0x370++0x07 line.long 0x00 "DRAE6,DMA Region Access Enable Register For Region 6" bitfld.long 0x00 31. "E[31],DMA region access enable for bit 31 in region 6" "Disabled,Enabled" bitfld.long 0x00 30. "E[30],DMA region access enable for bit 30 in region 6" "Disabled,Enabled" newline bitfld.long 0x00 29. "E[29],DMA region access enable for bit 29 in region 6" "Disabled,Enabled" bitfld.long 0x00 28. "E[28],DMA region access enable for bit 28 in region 6" "Disabled,Enabled" newline bitfld.long 0x00 27. "E[27],DMA region access enable for bit 27 in region 6" "Disabled,Enabled" bitfld.long 0x00 26. "E[26],DMA region access enable for bit 26 in region 6" "Disabled,Enabled" newline bitfld.long 0x00 25. "E[25],DMA region access enable for bit 25 in region 6" "Disabled,Enabled" bitfld.long 0x00 24. "E[24],DMA region access enable for bit 24 in region 6" "Disabled,Enabled" newline bitfld.long 0x00 23. "E[23],DMA region access enable for bit 23 in region 6" "Disabled,Enabled" bitfld.long 0x00 22. "E[22],DMA region access enable for bit 22 in region 6" "Disabled,Enabled" newline bitfld.long 0x00 21. "E[21],DMA region access enable for bit 21 in region 6" "Disabled,Enabled" bitfld.long 0x00 20. "E[20],DMA region access enable for bit 20 in region 6" "Disabled,Enabled" newline bitfld.long 0x00 19. "E[19],DMA region access enable for bit 19 in region 6" "Disabled,Enabled" bitfld.long 0x00 18. "E[18],DMA region access enable for bit 18 in region 6" "Disabled,Enabled" newline bitfld.long 0x00 17. "E[17],DMA region access enable for bit 17 in region 6" "Disabled,Enabled" bitfld.long 0x00 16. "E[16],DMA region access enable for bit 16 in region 6" "Disabled,Enabled" newline bitfld.long 0x00 15. "E[15],DMA region access enable for bit 15 in region 6" "Disabled,Enabled" bitfld.long 0x00 14. "E[14],DMA region access enable for bit 14 in region 6" "Disabled,Enabled" newline bitfld.long 0x00 13. "E[13],DMA region access enable for bit 13 in region 6" "Disabled,Enabled" bitfld.long 0x00 12. "E[12],DMA region access enable for bit 12 in region 6" "Disabled,Enabled" newline bitfld.long 0x00 11. "E[11],DMA region access enable for bit 11 in region 6" "Disabled,Enabled" bitfld.long 0x00 10. "E[10],DMA region access enable for bit 10 in region 6" "Disabled,Enabled" newline bitfld.long 0x00 9. "E[9],DMA region access enable for bit 9 in region 6" "Disabled,Enabled" bitfld.long 0x00 8. "E[8],DMA region access enable for bit 8 in region 6" "Disabled,Enabled" newline bitfld.long 0x00 7. "E[7],DMA region access enable for bit 7 in region 6" "Disabled,Enabled" bitfld.long 0x00 6. "E[6],DMA region access enable for bit 6 in region 6" "Disabled,Enabled" newline bitfld.long 0x00 5. "E[5],DMA region access enable for bit 5 in region 6" "Disabled,Enabled" bitfld.long 0x00 4. "E[4],DMA region access enable for bit 4 in region 6" "Disabled,Enabled" newline bitfld.long 0x00 3. "E[3],DMA region access enable for bit 3 in region 6" "Disabled,Enabled" bitfld.long 0x00 2. "E[2],DMA region access enable for bit 2 in region 6" "Disabled,Enabled" newline bitfld.long 0x00 1. "E[1],DMA region access enable for bit 1 in region 6" "Disabled,Enabled" bitfld.long 0x00 0. "E[0],DMA region access enable for bit 0 in region 6" "Disabled,Enabled" line.long 0x04 "DRAEH6,DMA Region Access Enable Register High For Region 6" bitfld.long 0x04 31. "E[63],DMA region access enable for bit 63 in region 6" "Disabled,Enabled" bitfld.long 0x04 30. "E[62],DMA region access enable for bit 62 in region 6" "Disabled,Enabled" newline bitfld.long 0x04 29. "E[61],DMA region access enable for bit 61 in region 6" "Disabled,Enabled" bitfld.long 0x04 28. "E[60],DMA region access enable for bit 60 in region 6" "Disabled,Enabled" newline bitfld.long 0x04 27. "E[59],DMA region access enable for bit 59 in region 6" "Disabled,Enabled" bitfld.long 0x04 26. "E[58],DMA region access enable for bit 58 in region 6" "Disabled,Enabled" newline bitfld.long 0x04 25. "E[57],DMA region access enable for bit 57 in region 6" "Disabled,Enabled" bitfld.long 0x04 24. "E[56],DMA region access enable for bit 56 in region 6" "Disabled,Enabled" newline bitfld.long 0x04 23. "E[55],DMA region access enable for bit 55 in region 6" "Disabled,Enabled" bitfld.long 0x04 22. "E[54],DMA region access enable for bit 54 in region 6" "Disabled,Enabled" newline bitfld.long 0x04 21. "E[53],DMA region access enable for bit 53 in region 6" "Disabled,Enabled" bitfld.long 0x04 20. "E[52],DMA region access enable for bit 52 in region 6" "Disabled,Enabled" newline bitfld.long 0x04 19. "E[51],DMA region access enable for bit 51 in region 6" "Disabled,Enabled" bitfld.long 0x04 18. "E[50],DMA region access enable for bit 50 in region 6" "Disabled,Enabled" newline bitfld.long 0x04 17. "E[49],DMA region access enable for bit 49 in region 6" "Disabled,Enabled" bitfld.long 0x04 16. "E[48],DMA region access enable for bit 48 in region 6" "Disabled,Enabled" newline bitfld.long 0x04 15. "E[47],DMA region access enable for bit 47 in region 6" "Disabled,Enabled" bitfld.long 0x04 14. "E[46],DMA region access enable for bit 46 in region 6" "Disabled,Enabled" newline bitfld.long 0x04 13. "E[45],DMA region access enable for bit 45 in region 6" "Disabled,Enabled" bitfld.long 0x04 12. "E[44],DMA region access enable for bit 44 in region 6" "Disabled,Enabled" newline bitfld.long 0x04 11. "E[43],DMA region access enable for bit 43 in region 6" "Disabled,Enabled" bitfld.long 0x04 10. "E[42],DMA region access enable for bit 42 in region 6" "Disabled,Enabled" newline bitfld.long 0x04 9. "E[41],DMA region access enable for bit 41 in region 6" "Disabled,Enabled" bitfld.long 0x04 8. "E[40],DMA region access enable for bit 40 in region 6" "Disabled,Enabled" newline bitfld.long 0x04 7. "E[39],DMA region access enable for bit 39 in region 6" "Disabled,Enabled" bitfld.long 0x04 6. "E[38],DMA region access enable for bit 38 in region 6" "Disabled,Enabled" newline bitfld.long 0x04 5. "E[37],DMA region access enable for bit 37 in region 6" "Disabled,Enabled" bitfld.long 0x04 4. "E[36],DMA region access enable for bit 36 in region 6" "Disabled,Enabled" newline bitfld.long 0x04 3. "E[35],DMA region access enable for bit 35 in region 6" "Disabled,Enabled" bitfld.long 0x04 2. "E[34],DMA region access enable for bit 34 in region 6" "Disabled,Enabled" newline bitfld.long 0x04 1. "E[33],DMA region access enable for bit 33 in region 6" "Disabled,Enabled" bitfld.long 0x04 0. "E[32],DMA region access enable for bit 32 in region 6" "Disabled,Enabled" group.long 0x378++0x07 line.long 0x00 "DRAE7,DMA Region Access Enable Register For Region 7" bitfld.long 0x00 31. "E[31],DMA region access enable for bit 31 in region 7" "Disabled,Enabled" bitfld.long 0x00 30. "E[30],DMA region access enable for bit 30 in region 7" "Disabled,Enabled" newline bitfld.long 0x00 29. "E[29],DMA region access enable for bit 29 in region 7" "Disabled,Enabled" bitfld.long 0x00 28. "E[28],DMA region access enable for bit 28 in region 7" "Disabled,Enabled" newline bitfld.long 0x00 27. "E[27],DMA region access enable for bit 27 in region 7" "Disabled,Enabled" bitfld.long 0x00 26. "E[26],DMA region access enable for bit 26 in region 7" "Disabled,Enabled" newline bitfld.long 0x00 25. "E[25],DMA region access enable for bit 25 in region 7" "Disabled,Enabled" bitfld.long 0x00 24. "E[24],DMA region access enable for bit 24 in region 7" "Disabled,Enabled" newline bitfld.long 0x00 23. "E[23],DMA region access enable for bit 23 in region 7" "Disabled,Enabled" bitfld.long 0x00 22. "E[22],DMA region access enable for bit 22 in region 7" "Disabled,Enabled" newline bitfld.long 0x00 21. "E[21],DMA region access enable for bit 21 in region 7" "Disabled,Enabled" bitfld.long 0x00 20. "E[20],DMA region access enable for bit 20 in region 7" "Disabled,Enabled" newline bitfld.long 0x00 19. "E[19],DMA region access enable for bit 19 in region 7" "Disabled,Enabled" bitfld.long 0x00 18. "E[18],DMA region access enable for bit 18 in region 7" "Disabled,Enabled" newline bitfld.long 0x00 17. "E[17],DMA region access enable for bit 17 in region 7" "Disabled,Enabled" bitfld.long 0x00 16. "E[16],DMA region access enable for bit 16 in region 7" "Disabled,Enabled" newline bitfld.long 0x00 15. "E[15],DMA region access enable for bit 15 in region 7" "Disabled,Enabled" bitfld.long 0x00 14. "E[14],DMA region access enable for bit 14 in region 7" "Disabled,Enabled" newline bitfld.long 0x00 13. "E[13],DMA region access enable for bit 13 in region 7" "Disabled,Enabled" bitfld.long 0x00 12. "E[12],DMA region access enable for bit 12 in region 7" "Disabled,Enabled" newline bitfld.long 0x00 11. "E[11],DMA region access enable for bit 11 in region 7" "Disabled,Enabled" bitfld.long 0x00 10. "E[10],DMA region access enable for bit 10 in region 7" "Disabled,Enabled" newline bitfld.long 0x00 9. "E[9],DMA region access enable for bit 9 in region 7" "Disabled,Enabled" bitfld.long 0x00 8. "E[8],DMA region access enable for bit 8 in region 7" "Disabled,Enabled" newline bitfld.long 0x00 7. "E[7],DMA region access enable for bit 7 in region 7" "Disabled,Enabled" bitfld.long 0x00 6. "E[6],DMA region access enable for bit 6 in region 7" "Disabled,Enabled" newline bitfld.long 0x00 5. "E[5],DMA region access enable for bit 5 in region 7" "Disabled,Enabled" bitfld.long 0x00 4. "E[4],DMA region access enable for bit 4 in region 7" "Disabled,Enabled" newline bitfld.long 0x00 3. "E[3],DMA region access enable for bit 3 in region 7" "Disabled,Enabled" bitfld.long 0x00 2. "E[2],DMA region access enable for bit 2 in region 7" "Disabled,Enabled" newline bitfld.long 0x00 1. "E[1],DMA region access enable for bit 1 in region 7" "Disabled,Enabled" bitfld.long 0x00 0. "E[0],DMA region access enable for bit 0 in region 7" "Disabled,Enabled" line.long 0x04 "DRAEH7,DMA Region Access Enable Register High For Region 7" bitfld.long 0x04 31. "E[63],DMA region access enable for bit 63 in region 7" "Disabled,Enabled" bitfld.long 0x04 30. "E[62],DMA region access enable for bit 62 in region 7" "Disabled,Enabled" newline bitfld.long 0x04 29. "E[61],DMA region access enable for bit 61 in region 7" "Disabled,Enabled" bitfld.long 0x04 28. "E[60],DMA region access enable for bit 60 in region 7" "Disabled,Enabled" newline bitfld.long 0x04 27. "E[59],DMA region access enable for bit 59 in region 7" "Disabled,Enabled" bitfld.long 0x04 26. "E[58],DMA region access enable for bit 58 in region 7" "Disabled,Enabled" newline bitfld.long 0x04 25. "E[57],DMA region access enable for bit 57 in region 7" "Disabled,Enabled" bitfld.long 0x04 24. "E[56],DMA region access enable for bit 56 in region 7" "Disabled,Enabled" newline bitfld.long 0x04 23. "E[55],DMA region access enable for bit 55 in region 7" "Disabled,Enabled" bitfld.long 0x04 22. "E[54],DMA region access enable for bit 54 in region 7" "Disabled,Enabled" newline bitfld.long 0x04 21. "E[53],DMA region access enable for bit 53 in region 7" "Disabled,Enabled" bitfld.long 0x04 20. "E[52],DMA region access enable for bit 52 in region 7" "Disabled,Enabled" newline bitfld.long 0x04 19. "E[51],DMA region access enable for bit 51 in region 7" "Disabled,Enabled" bitfld.long 0x04 18. "E[50],DMA region access enable for bit 50 in region 7" "Disabled,Enabled" newline bitfld.long 0x04 17. "E[49],DMA region access enable for bit 49 in region 7" "Disabled,Enabled" bitfld.long 0x04 16. "E[48],DMA region access enable for bit 48 in region 7" "Disabled,Enabled" newline bitfld.long 0x04 15. "E[47],DMA region access enable for bit 47 in region 7" "Disabled,Enabled" bitfld.long 0x04 14. "E[46],DMA region access enable for bit 46 in region 7" "Disabled,Enabled" newline bitfld.long 0x04 13. "E[45],DMA region access enable for bit 45 in region 7" "Disabled,Enabled" bitfld.long 0x04 12. "E[44],DMA region access enable for bit 44 in region 7" "Disabled,Enabled" newline bitfld.long 0x04 11. "E[43],DMA region access enable for bit 43 in region 7" "Disabled,Enabled" bitfld.long 0x04 10. "E[42],DMA region access enable for bit 42 in region 7" "Disabled,Enabled" newline bitfld.long 0x04 9. "E[41],DMA region access enable for bit 41 in region 7" "Disabled,Enabled" bitfld.long 0x04 8. "E[40],DMA region access enable for bit 40 in region 7" "Disabled,Enabled" newline bitfld.long 0x04 7. "E[39],DMA region access enable for bit 39 in region 7" "Disabled,Enabled" bitfld.long 0x04 6. "E[38],DMA region access enable for bit 38 in region 7" "Disabled,Enabled" newline bitfld.long 0x04 5. "E[37],DMA region access enable for bit 37 in region 7" "Disabled,Enabled" bitfld.long 0x04 4. "E[36],DMA region access enable for bit 36 in region 7" "Disabled,Enabled" newline bitfld.long 0x04 3. "E[35],DMA region access enable for bit 35 in region 7" "Disabled,Enabled" bitfld.long 0x04 2. "E[34],DMA region access enable for bit 34 in region 7" "Disabled,Enabled" newline bitfld.long 0x04 1. "E[33],DMA region access enable for bit 33 in region 7" "Disabled,Enabled" bitfld.long 0x04 0. "E[32],DMA region access enable for bit 32 in region 7" "Disabled,Enabled" group.long 0x380++0x03 line.long 0x00 "QRAE0,QDMA Region Access Enable Registers For Region 0" bitfld.long 0x00 7. "E[7],QDMA region access enable for bit 7/QDMA channel 7 in region 0" "Disabled,Enabled" bitfld.long 0x00 6. "E[6],QDMA region access enable for bit 6/QDMA channel 6 in region 0" "Disabled,Enabled" newline bitfld.long 0x00 5. "E[5],QDMA region access enable for bit 5/QDMA channel 5 in region 0" "Disabled,Enabled" bitfld.long 0x00 4. "E[4],QDMA region access enable for bit 4/QDMA channel 4 in region 0" "Disabled,Enabled" newline bitfld.long 0x00 3. "E[3],QDMA region access enable for bit 3/QDMA channel 3 in region 0" "Disabled,Enabled" bitfld.long 0x00 2. "E[2],QDMA region access enable for bit 2/QDMA channel 2 in region 0" "Disabled,Enabled" newline bitfld.long 0x00 1. "E[1],QDMA region access enable for bit 1/QDMA channel 1 in region 0" "Disabled,Enabled" bitfld.long 0x00 0. "E[0],QDMA region access enable for bit 0/QDMA channel 0 in region 0" "Disabled,Enabled" group.long 0x384++0x03 line.long 0x00 "QRAE1,QDMA Region Access Enable Registers For Region 1" bitfld.long 0x00 7. "E[7],QDMA region access enable for bit 7/QDMA channel 7 in region 1" "Disabled,Enabled" bitfld.long 0x00 6. "E[6],QDMA region access enable for bit 6/QDMA channel 6 in region 1" "Disabled,Enabled" newline bitfld.long 0x00 5. "E[5],QDMA region access enable for bit 5/QDMA channel 5 in region 1" "Disabled,Enabled" bitfld.long 0x00 4. "E[4],QDMA region access enable for bit 4/QDMA channel 4 in region 1" "Disabled,Enabled" newline bitfld.long 0x00 3. "E[3],QDMA region access enable for bit 3/QDMA channel 3 in region 1" "Disabled,Enabled" bitfld.long 0x00 2. "E[2],QDMA region access enable for bit 2/QDMA channel 2 in region 1" "Disabled,Enabled" newline bitfld.long 0x00 1. "E[1],QDMA region access enable for bit 1/QDMA channel 1 in region 1" "Disabled,Enabled" bitfld.long 0x00 0. "E[0],QDMA region access enable for bit 0/QDMA channel 0 in region 1" "Disabled,Enabled" group.long 0x388++0x03 line.long 0x00 "QRAE2,QDMA Region Access Enable Registers For Region 2" bitfld.long 0x00 7. "E[7],QDMA region access enable for bit 7/QDMA channel 7 in region 2" "Disabled,Enabled" bitfld.long 0x00 6. "E[6],QDMA region access enable for bit 6/QDMA channel 6 in region 2" "Disabled,Enabled" newline bitfld.long 0x00 5. "E[5],QDMA region access enable for bit 5/QDMA channel 5 in region 2" "Disabled,Enabled" bitfld.long 0x00 4. "E[4],QDMA region access enable for bit 4/QDMA channel 4 in region 2" "Disabled,Enabled" newline bitfld.long 0x00 3. "E[3],QDMA region access enable for bit 3/QDMA channel 3 in region 2" "Disabled,Enabled" bitfld.long 0x00 2. "E[2],QDMA region access enable for bit 2/QDMA channel 2 in region 2" "Disabled,Enabled" newline bitfld.long 0x00 1. "E[1],QDMA region access enable for bit 1/QDMA channel 1 in region 2" "Disabled,Enabled" bitfld.long 0x00 0. "E[0],QDMA region access enable for bit 0/QDMA channel 0 in region 2" "Disabled,Enabled" group.long 0x38C++0x03 line.long 0x00 "QRAE3,QDMA Region Access Enable Registers For Region 3" bitfld.long 0x00 7. "E[7],QDMA region access enable for bit 7/QDMA channel 7 in region 3" "Disabled,Enabled" bitfld.long 0x00 6. "E[6],QDMA region access enable for bit 6/QDMA channel 6 in region 3" "Disabled,Enabled" newline bitfld.long 0x00 5. "E[5],QDMA region access enable for bit 5/QDMA channel 5 in region 3" "Disabled,Enabled" bitfld.long 0x00 4. "E[4],QDMA region access enable for bit 4/QDMA channel 4 in region 3" "Disabled,Enabled" newline bitfld.long 0x00 3. "E[3],QDMA region access enable for bit 3/QDMA channel 3 in region 3" "Disabled,Enabled" bitfld.long 0x00 2. "E[2],QDMA region access enable for bit 2/QDMA channel 2 in region 3" "Disabled,Enabled" newline bitfld.long 0x00 1. "E[1],QDMA region access enable for bit 1/QDMA channel 1 in region 3" "Disabled,Enabled" bitfld.long 0x00 0. "E[0],QDMA region access enable for bit 0/QDMA channel 0 in region 3" "Disabled,Enabled" group.long 0x390++0x03 line.long 0x00 "QRAE4,QDMA Region Access Enable Registers For Region 4" bitfld.long 0x00 7. "E[7],QDMA region access enable for bit 7/QDMA channel 7 in region 4" "Disabled,Enabled" bitfld.long 0x00 6. "E[6],QDMA region access enable for bit 6/QDMA channel 6 in region 4" "Disabled,Enabled" newline bitfld.long 0x00 5. "E[5],QDMA region access enable for bit 5/QDMA channel 5 in region 4" "Disabled,Enabled" bitfld.long 0x00 4. "E[4],QDMA region access enable for bit 4/QDMA channel 4 in region 4" "Disabled,Enabled" newline bitfld.long 0x00 3. "E[3],QDMA region access enable for bit 3/QDMA channel 3 in region 4" "Disabled,Enabled" bitfld.long 0x00 2. "E[2],QDMA region access enable for bit 2/QDMA channel 2 in region 4" "Disabled,Enabled" newline bitfld.long 0x00 1. "E[1],QDMA region access enable for bit 1/QDMA channel 1 in region 4" "Disabled,Enabled" bitfld.long 0x00 0. "E[0],QDMA region access enable for bit 0/QDMA channel 0 in region 4" "Disabled,Enabled" group.long 0x394++0x03 line.long 0x00 "QRAE5,QDMA Region Access Enable Registers For Region 5" bitfld.long 0x00 7. "E[7],QDMA region access enable for bit 7/QDMA channel 7 in region 5" "Disabled,Enabled" bitfld.long 0x00 6. "E[6],QDMA region access enable for bit 6/QDMA channel 6 in region 5" "Disabled,Enabled" newline bitfld.long 0x00 5. "E[5],QDMA region access enable for bit 5/QDMA channel 5 in region 5" "Disabled,Enabled" bitfld.long 0x00 4. "E[4],QDMA region access enable for bit 4/QDMA channel 4 in region 5" "Disabled,Enabled" newline bitfld.long 0x00 3. "E[3],QDMA region access enable for bit 3/QDMA channel 3 in region 5" "Disabled,Enabled" bitfld.long 0x00 2. "E[2],QDMA region access enable for bit 2/QDMA channel 2 in region 5" "Disabled,Enabled" newline bitfld.long 0x00 1. "E[1],QDMA region access enable for bit 1/QDMA channel 1 in region 5" "Disabled,Enabled" bitfld.long 0x00 0. "E[0],QDMA region access enable for bit 0/QDMA channel 0 in region 5" "Disabled,Enabled" group.long 0x398++0x03 line.long 0x00 "QRAE6,QDMA Region Access Enable Registers For Region 6" bitfld.long 0x00 7. "E[7],QDMA region access enable for bit 7/QDMA channel 7 in region 6" "Disabled,Enabled" bitfld.long 0x00 6. "E[6],QDMA region access enable for bit 6/QDMA channel 6 in region 6" "Disabled,Enabled" newline bitfld.long 0x00 5. "E[5],QDMA region access enable for bit 5/QDMA channel 5 in region 6" "Disabled,Enabled" bitfld.long 0x00 4. "E[4],QDMA region access enable for bit 4/QDMA channel 4 in region 6" "Disabled,Enabled" newline bitfld.long 0x00 3. "E[3],QDMA region access enable for bit 3/QDMA channel 3 in region 6" "Disabled,Enabled" bitfld.long 0x00 2. "E[2],QDMA region access enable for bit 2/QDMA channel 2 in region 6" "Disabled,Enabled" newline bitfld.long 0x00 1. "E[1],QDMA region access enable for bit 1/QDMA channel 1 in region 6" "Disabled,Enabled" bitfld.long 0x00 0. "E[0],QDMA region access enable for bit 0/QDMA channel 0 in region 6" "Disabled,Enabled" group.long 0x39C++0x03 line.long 0x00 "QRAE7,QDMA Region Access Enable Registers For Region 7" bitfld.long 0x00 7. "E[7],QDMA region access enable for bit 7/QDMA channel 7 in region 7" "Disabled,Enabled" bitfld.long 0x00 6. "E[6],QDMA region access enable for bit 6/QDMA channel 6 in region 7" "Disabled,Enabled" newline bitfld.long 0x00 5. "E[5],QDMA region access enable for bit 5/QDMA channel 5 in region 7" "Disabled,Enabled" bitfld.long 0x00 4. "E[4],QDMA region access enable for bit 4/QDMA channel 4 in region 7" "Disabled,Enabled" newline bitfld.long 0x00 3. "E[3],QDMA region access enable for bit 3/QDMA channel 3 in region 7" "Disabled,Enabled" bitfld.long 0x00 2. "E[2],QDMA region access enable for bit 2/QDMA channel 2 in region 7" "Disabled,Enabled" newline bitfld.long 0x00 1. "E[1],QDMA region access enable for bit 1/QDMA channel 1 in region 7" "Disabled,Enabled" bitfld.long 0x00 0. "E[0],QDMA region access enable for bit 0/QDMA channel 0 in region 7" "Disabled,Enabled" group.long 0x400++0x03 line.long 0x00 "Q0E0,Event Queue 0 Entry 0 Register 0" bitfld.long 0x00 6.--7. "ETYPE,Event entry 0 in queue 0" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 0 in queue 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x404++0x03 line.long 0x00 "Q0E1,Event Queue 0 Entry 1 Register 1" bitfld.long 0x00 6.--7. "ETYPE,Event entry 1 in queue 0" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 1 in queue 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x408++0x03 line.long 0x00 "Q0E2,Event Queue 0 Entry 2 Register 2" bitfld.long 0x00 6.--7. "ETYPE,Event entry 2 in queue 0" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 2 in queue 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x40C++0x03 line.long 0x00 "Q0E3,Event Queue 0 Entry 3 Register 3" bitfld.long 0x00 6.--7. "ETYPE,Event entry 3 in queue 0" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 3 in queue 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x410++0x03 line.long 0x00 "Q0E4,Event Queue 0 Entry 4 Register 4" bitfld.long 0x00 6.--7. "ETYPE,Event entry 4 in queue 0" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 4 in queue 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x414++0x03 line.long 0x00 "Q0E5,Event Queue 0 Entry 5 Register 5" bitfld.long 0x00 6.--7. "ETYPE,Event entry 5 in queue 0" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 5 in queue 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x418++0x03 line.long 0x00 "Q0E6,Event Queue 0 Entry 6 Register 6" bitfld.long 0x00 6.--7. "ETYPE,Event entry 6 in queue 0" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 6 in queue 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x41C++0x03 line.long 0x00 "Q0E7,Event Queue 0 Entry 7 Register 7" bitfld.long 0x00 6.--7. "ETYPE,Event entry 7 in queue 0" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 7 in queue 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x420++0x03 line.long 0x00 "Q0E8,Event Queue 0 Entry 8 Register 8" bitfld.long 0x00 6.--7. "ETYPE,Event entry 8 in queue 0" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 8 in queue 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x424++0x03 line.long 0x00 "Q0E9,Event Queue 0 Entry 9 Register 9" bitfld.long 0x00 6.--7. "ETYPE,Event entry 9 in queue 0" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 9 in queue 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x428++0x03 line.long 0x00 "Q0E10,Event Queue 0 Entry 10 Register 10" bitfld.long 0x00 6.--7. "ETYPE,Event entry 10 in queue 0" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 10 in queue 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x42C++0x03 line.long 0x00 "Q0E11,Event Queue 0 Entry 11 Register 11" bitfld.long 0x00 6.--7. "ETYPE,Event entry 11 in queue 0" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 11 in queue 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x430++0x03 line.long 0x00 "Q0E12,Event Queue 0 Entry 12 Register 12" bitfld.long 0x00 6.--7. "ETYPE,Event entry 12 in queue 0" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 12 in queue 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x434++0x03 line.long 0x00 "Q0E13,Event Queue 0 Entry 13 Register 13" bitfld.long 0x00 6.--7. "ETYPE,Event entry 13 in queue 0" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 13 in queue 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x438++0x03 line.long 0x00 "Q0E14,Event Queue 0 Entry 14 Register 14" bitfld.long 0x00 6.--7. "ETYPE,Event entry 14 in queue 0" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 14 in queue 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x43C++0x03 line.long 0x00 "Q0E15,Event Queue 0 Entry 15 Register 15" bitfld.long 0x00 6.--7. "ETYPE,Event entry 15 in queue 0" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 15 in queue 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x440++0x03 line.long 0x00 "Q1E0,Event Queue 1 Entry 0 Register 0" bitfld.long 0x00 6.--7. "ETYPE,Event entry 0 in queue 1" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 0 in queue 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x444++0x03 line.long 0x00 "Q1E1,Event Queue 1 Entry 1 Register 1" bitfld.long 0x00 6.--7. "ETYPE,Event entry 1 in queue 1" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 1 in queue 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x448++0x03 line.long 0x00 "Q1E2,Event Queue 1 Entry 2 Register 2" bitfld.long 0x00 6.--7. "ETYPE,Event entry 2 in queue 1" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 2 in queue 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x44C++0x03 line.long 0x00 "Q1E3,Event Queue 1 Entry 3 Register 3" bitfld.long 0x00 6.--7. "ETYPE,Event entry 3 in queue 1" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 3 in queue 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x450++0x03 line.long 0x00 "Q1E4,Event Queue 1 Entry 4 Register 4" bitfld.long 0x00 6.--7. "ETYPE,Event entry 4 in queue 1" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 4 in queue 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x454++0x03 line.long 0x00 "Q1E5,Event Queue 1 Entry 5 Register 5" bitfld.long 0x00 6.--7. "ETYPE,Event entry 5 in queue 1" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 5 in queue 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x458++0x03 line.long 0x00 "Q1E6,Event Queue 1 Entry 6 Register 6" bitfld.long 0x00 6.--7. "ETYPE,Event entry 6 in queue 1" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 6 in queue 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x45C++0x03 line.long 0x00 "Q1E7,Event Queue 1 Entry 7 Register 7" bitfld.long 0x00 6.--7. "ETYPE,Event entry 7 in queue 1" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 7 in queue 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x460++0x03 line.long 0x00 "Q1E8,Event Queue 1 Entry 8 Register 8" bitfld.long 0x00 6.--7. "ETYPE,Event entry 8 in queue 1" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 8 in queue 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x464++0x03 line.long 0x00 "Q1E9,Event Queue 1 Entry 9 Register 9" bitfld.long 0x00 6.--7. "ETYPE,Event entry 9 in queue 1" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 9 in queue 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x468++0x03 line.long 0x00 "Q1E10,Event Queue 1 Entry 10 Register 10" bitfld.long 0x00 6.--7. "ETYPE,Event entry 10 in queue 1" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 10 in queue 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x46C++0x03 line.long 0x00 "Q1E11,Event Queue 1 Entry 11 Register 11" bitfld.long 0x00 6.--7. "ETYPE,Event entry 11 in queue 1" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 11 in queue 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x470++0x03 line.long 0x00 "Q1E12,Event Queue 1 Entry 12 Register 12" bitfld.long 0x00 6.--7. "ETYPE,Event entry 12 in queue 1" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 12 in queue 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x474++0x03 line.long 0x00 "Q1E13,Event Queue 1 Entry 13 Register 13" bitfld.long 0x00 6.--7. "ETYPE,Event entry 13 in queue 1" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 13 in queue 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x478++0x03 line.long 0x00 "Q1E14,Event Queue 1 Entry 14 Register 14" bitfld.long 0x00 6.--7. "ETYPE,Event entry 14 in queue 1" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 14 in queue 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x47C++0x03 line.long 0x00 "Q1E15,Event Queue 1 Entry 15 Register 15" bitfld.long 0x00 6.--7. "ETYPE,Event entry 15 in queue 1" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 15 in queue 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x480++0x03 line.long 0x00 "Q2E0,Event Queue 2 Entry 0 Register 0" bitfld.long 0x00 6.--7. "ETYPE,Event entry 0 in queue 2" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 0 in queue 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x484++0x03 line.long 0x00 "Q2E1,Event Queue 2 Entry 1 Register 1" bitfld.long 0x00 6.--7. "ETYPE,Event entry 1 in queue 2" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 1 in queue 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x488++0x03 line.long 0x00 "Q2E2,Event Queue 2 Entry 2 Register 2" bitfld.long 0x00 6.--7. "ETYPE,Event entry 2 in queue 2" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 2 in queue 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x48C++0x03 line.long 0x00 "Q2E3,Event Queue 2 Entry 3 Register 3" bitfld.long 0x00 6.--7. "ETYPE,Event entry 3 in queue 2" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 3 in queue 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x490++0x03 line.long 0x00 "Q2E4,Event Queue 2 Entry 4 Register 4" bitfld.long 0x00 6.--7. "ETYPE,Event entry 4 in queue 2" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 4 in queue 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x494++0x03 line.long 0x00 "Q2E5,Event Queue 2 Entry 5 Register 5" bitfld.long 0x00 6.--7. "ETYPE,Event entry 5 in queue 2" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 5 in queue 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x498++0x03 line.long 0x00 "Q2E6,Event Queue 2 Entry 6 Register 6" bitfld.long 0x00 6.--7. "ETYPE,Event entry 6 in queue 2" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 6 in queue 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x49C++0x03 line.long 0x00 "Q2E7,Event Queue 2 Entry 7 Register 7" bitfld.long 0x00 6.--7. "ETYPE,Event entry 7 in queue 2" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 7 in queue 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4A0++0x03 line.long 0x00 "Q2E8,Event Queue 2 Entry 8 Register 8" bitfld.long 0x00 6.--7. "ETYPE,Event entry 8 in queue 2" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 8 in queue 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4A4++0x03 line.long 0x00 "Q2E9,Event Queue 2 Entry 9 Register 9" bitfld.long 0x00 6.--7. "ETYPE,Event entry 9 in queue 2" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 9 in queue 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4A8++0x03 line.long 0x00 "Q2E10,Event Queue 2 Entry 10 Register 10" bitfld.long 0x00 6.--7. "ETYPE,Event entry 10 in queue 2" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 10 in queue 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4AC++0x03 line.long 0x00 "Q2E11,Event Queue 2 Entry 11 Register 11" bitfld.long 0x00 6.--7. "ETYPE,Event entry 11 in queue 2" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 11 in queue 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4B0++0x03 line.long 0x00 "Q2E12,Event Queue 2 Entry 12 Register 12" bitfld.long 0x00 6.--7. "ETYPE,Event entry 12 in queue 2" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 12 in queue 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4B4++0x03 line.long 0x00 "Q2E13,Event Queue 2 Entry 13 Register 13" bitfld.long 0x00 6.--7. "ETYPE,Event entry 13 in queue 2" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 13 in queue 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4B8++0x03 line.long 0x00 "Q2E14,Event Queue 2 Entry 14 Register 14" bitfld.long 0x00 6.--7. "ETYPE,Event entry 14 in queue 2" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 14 in queue 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4BC++0x03 line.long 0x00 "Q2E15,Event Queue 2 Entry 15 Register 15" bitfld.long 0x00 6.--7. "ETYPE,Event entry 15 in queue 2" "ER,QER,?..." bitfld.long 0x00 0.--5. "ENUM,Event entry 15 in queue 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0x600++0x03 line.long 0x00 "QSTAT0,Queue Status Registers 0" bitfld.long 0x00 24. "THRXCD,Threshold exceeded" "Not exceed,Exceed" bitfld.long 0x00 16.--20. "WM,Watermark for maximum queue usage" "0,1,2,3,4,5,6,7,8,9,10,?..." newline bitfld.long 0x00 8.--12. "NUMVAL,Number of valid entries in queue 0" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x00 0.--3. "STRTPTR,Start pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x604++0x03 line.long 0x00 "QSTAT1,Queue Status Registers 1" bitfld.long 0x00 24. "THRXCD,Threshold exceeded" "Not exceed,Exceed" bitfld.long 0x00 16.--20. "WM,Watermark for maximum queue usage" "0,1,2,3,4,5,6,7,8,9,10,?..." newline bitfld.long 0x00 8.--12. "NUMVAL,Number of valid entries in queue 1" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x00 0.--3. "STRTPTR,Start pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x608++0x03 line.long 0x00 "QSTAT2,Queue Status Registers 2" bitfld.long 0x00 24. "THRXCD,Threshold exceeded" "Not exceed,Exceed" bitfld.long 0x00 16.--20. "WM,Watermark for maximum queue usage" "0,1,2,3,4,5,6,7,8,9,10,?..." newline bitfld.long 0x00 8.--12. "NUMVAL,Number of valid entries in queue 2" "0,1,2,3,4,5,6,7,8,9,10,?..." bitfld.long 0x00 0.--3. "STRTPTR,Start pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x620++0x03 line.long 0x00 "QWMTHRA,Queue Watermark Threshold A Register" bitfld.long 0x00 16.--20. "Q2,Queue threshold for queue 2 value" "0,1,2,3,4,5,6,7,8,9,10,Threshold errors disabled,?..." bitfld.long 0x00 8.--12. "Q1,Queue threshold for queue 1 value" "0,1,2,3,4,5,6,7,8,9,10,Threshold errors disabled,?..." newline bitfld.long 0x00 0.--4. "Q0,Queue threshold for queue 0 value" "0,1,2,3,4,5,6,7,8,9,10,Threshold errors disabled,?..." rgroup.long 0x640++0x03 line.long 0x00 "CCSTAT,EDMA3CC Status Register" bitfld.long 0x00 18. "QUEACTV2,Queue 2 active" "Not active,Active" bitfld.long 0x00 17. "QUEACTV1,Queue 1 active" "Not active,Active" newline bitfld.long 0x00 16. "QUEACTV0,Queue 0 active" "Not active,Active" bitfld.long 0x00 8.--13. "COMPACTV,Completion request active" "Not active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active,Active" newline bitfld.long 0x00 4. "ACTV,Channel controller active" "Idle,Busy" bitfld.long 0x00 2. "TRACTV,Transfer request active" "Not active,Active" newline bitfld.long 0x00 1. "QEVTACTV,QDMA event active" "Not active,Active" bitfld.long 0x00 0. "EVTACTV,DMA event active" "Not active,Active" rgroup.long 0x800++0x07 line.long 0x00 "MPFAR,Memory Protection Fault Address Register" line.long 0x04 "MPFSR,Memory Protection Fault Status Register" bitfld.long 0x04 9.--12. "FID,Faulted identification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 5. "SRE,Supervisor read error" "No error,Error" newline bitfld.long 0x04 4. "SWE,Supervisor write error" "No error,Error" bitfld.long 0x04 3. "SXE,Supervisor execute error" "No error,Error" newline bitfld.long 0x04 2. "URE,User read error" "No error,Error" bitfld.long 0x04 1. "UWE,User write error" "No error,Error" newline bitfld.long 0x04 0. "UXE,User execute error" "No error,Error" wgroup.long 0x808++0x03 line.long 0x00 "MPFCR,Memory Protection Fault Command Register" bitfld.long 0x00 0. "MPFCLR,Fault clear register" "No effect,Clear" group.long 0x80C++0x03 line.long 0x00 "MPPAG,Memory Protection Page Attribute Register" bitfld.long 0x00 10.--15. "AIDM,Allowed ID 'N'" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 9. "EXT,External allowed ID" "Not allowed,Allowed" newline bitfld.long 0x00 5. "SR,Supervisor read permission" "Not allowed,Allowed" bitfld.long 0x00 4. "SW,Supervisor write permission" "Not allowed,Allowed" newline bitfld.long 0x00 3. "SX,Supervisor execute permission" "Not allowed,Allowed" bitfld.long 0x00 2. "UR,User read permission" "Not allowed,Allowed" newline bitfld.long 0x00 1. "UW,User write permission" "Not allowed,Allowed" bitfld.long 0x00 0. "UX,User execute permission" "Not allowed,Allowed" group.long 0x810++0x03 line.long 0x00 "MPPA_0,Memory Protection Page Attribute Register" bitfld.long 0x00 10.--15. "AIDM,Allowed ID 'N'" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 9. "EXT,External allowed ID" "Not allowed,Allowed" newline bitfld.long 0x00 5. "SR,Supervisor read permission" "Not allowed,Allowed" bitfld.long 0x00 4. "SW,Supervisor write permission" "Not allowed,Allowed" newline bitfld.long 0x00 3. "SX,Supervisor execute permission" "Not allowed,Allowed" bitfld.long 0x00 2. "UR,User read permission" "Not allowed,Allowed" newline bitfld.long 0x00 1. "UW,User write permission" "Not allowed,Allowed" bitfld.long 0x00 0. "UX,User execute permission" "Not allowed,Allowed" group.long 0x814++0x03 line.long 0x00 "MPPA_1,Memory Protection Page Attribute Register" bitfld.long 0x00 10.--15. "AIDM,Allowed ID 'N'" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 9. "EXT,External allowed ID" "Not allowed,Allowed" newline bitfld.long 0x00 5. "SR,Supervisor read permission" "Not allowed,Allowed" bitfld.long 0x00 4. "SW,Supervisor write permission" "Not allowed,Allowed" newline bitfld.long 0x00 3. "SX,Supervisor execute permission" "Not allowed,Allowed" bitfld.long 0x00 2. "UR,User read permission" "Not allowed,Allowed" newline bitfld.long 0x00 1. "UW,User write permission" "Not allowed,Allowed" bitfld.long 0x00 0. "UX,User execute permission" "Not allowed,Allowed" group.long 0x818++0x03 line.long 0x00 "MPPA_2,Memory Protection Page Attribute Register" bitfld.long 0x00 10.--15. "AIDM,Allowed ID 'N'" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 9. "EXT,External allowed ID" "Not allowed,Allowed" newline bitfld.long 0x00 5. "SR,Supervisor read permission" "Not allowed,Allowed" bitfld.long 0x00 4. "SW,Supervisor write permission" "Not allowed,Allowed" newline bitfld.long 0x00 3. "SX,Supervisor execute permission" "Not allowed,Allowed" bitfld.long 0x00 2. "UR,User read permission" "Not allowed,Allowed" newline bitfld.long 0x00 1. "UW,User write permission" "Not allowed,Allowed" bitfld.long 0x00 0. "UX,User execute permission" "Not allowed,Allowed" group.long 0x81C++0x03 line.long 0x00 "MPPA_3,Memory Protection Page Attribute Register" bitfld.long 0x00 10.--15. "AIDM,Allowed ID 'N'" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 9. "EXT,External allowed ID" "Not allowed,Allowed" newline bitfld.long 0x00 5. "SR,Supervisor read permission" "Not allowed,Allowed" bitfld.long 0x00 4. "SW,Supervisor write permission" "Not allowed,Allowed" newline bitfld.long 0x00 3. "SX,Supervisor execute permission" "Not allowed,Allowed" bitfld.long 0x00 2. "UR,User read permission" "Not allowed,Allowed" newline bitfld.long 0x00 1. "UW,User write permission" "Not allowed,Allowed" bitfld.long 0x00 0. "UX,User execute permission" "Not allowed,Allowed" group.long 0x820++0x03 line.long 0x00 "MPPA_4,Memory Protection Page Attribute Register" bitfld.long 0x00 10.--15. "AIDM,Allowed ID 'N'" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 9. "EXT,External allowed ID" "Not allowed,Allowed" newline bitfld.long 0x00 5. "SR,Supervisor read permission" "Not allowed,Allowed" bitfld.long 0x00 4. "SW,Supervisor write permission" "Not allowed,Allowed" newline bitfld.long 0x00 3. "SX,Supervisor execute permission" "Not allowed,Allowed" bitfld.long 0x00 2. "UR,User read permission" "Not allowed,Allowed" newline bitfld.long 0x00 1. "UW,User write permission" "Not allowed,Allowed" bitfld.long 0x00 0. "UX,User execute permission" "Not allowed,Allowed" group.long 0x824++0x03 line.long 0x00 "MPPA_5,Memory Protection Page Attribute Register" bitfld.long 0x00 10.--15. "AIDM,Allowed ID 'N'" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 9. "EXT,External allowed ID" "Not allowed,Allowed" newline bitfld.long 0x00 5. "SR,Supervisor read permission" "Not allowed,Allowed" bitfld.long 0x00 4. "SW,Supervisor write permission" "Not allowed,Allowed" newline bitfld.long 0x00 3. "SX,Supervisor execute permission" "Not allowed,Allowed" bitfld.long 0x00 2. "UR,User read permission" "Not allowed,Allowed" newline bitfld.long 0x00 1. "UW,User write permission" "Not allowed,Allowed" bitfld.long 0x00 0. "UX,User execute permission" "Not allowed,Allowed" group.long 0x828++0x03 line.long 0x00 "MPPA_6,Memory Protection Page Attribute Register" bitfld.long 0x00 10.--15. "AIDM,Allowed ID 'N'" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 9. "EXT,External allowed ID" "Not allowed,Allowed" newline bitfld.long 0x00 5. "SR,Supervisor read permission" "Not allowed,Allowed" bitfld.long 0x00 4. "SW,Supervisor write permission" "Not allowed,Allowed" newline bitfld.long 0x00 3. "SX,Supervisor execute permission" "Not allowed,Allowed" bitfld.long 0x00 2. "UR,User read permission" "Not allowed,Allowed" newline bitfld.long 0x00 1. "UW,User write permission" "Not allowed,Allowed" bitfld.long 0x00 0. "UX,User execute permission" "Not allowed,Allowed" group.long 0x82C++0x03 line.long 0x00 "MPPA_7,Memory Protection Page Attribute Register" bitfld.long 0x00 10.--15. "AIDM,Allowed ID 'N'" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 9. "EXT,External allowed ID" "Not allowed,Allowed" newline bitfld.long 0x00 5. "SR,Supervisor read permission" "Not allowed,Allowed" bitfld.long 0x00 4. "SW,Supervisor write permission" "Not allowed,Allowed" newline bitfld.long 0x00 3. "SX,Supervisor execute permission" "Not allowed,Allowed" bitfld.long 0x00 2. "UR,User read permission" "Not allowed,Allowed" newline bitfld.long 0x00 1. "UW,User write permission" "Not allowed,Allowed" bitfld.long 0x00 0. "UX,User execute permission" "Not allowed,Allowed" rgroup.long 0x1000++0x07 line.long 0x00 "ER_SET/CLR,Event Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. "E[31],Event 31" "Not asserted,Asserted" setclrfld.long 0x00 30. 0x10 30. 0x08 30. "E[30],Event 30" "Not asserted,Asserted" newline setclrfld.long 0x00 29. 0x10 29. 0x08 29. "E[29],Event 29" "Not asserted,Asserted" setclrfld.long 0x00 28. 0x10 28. 0x08 28. "E[28],Event 28" "Not asserted,Asserted" newline setclrfld.long 0x00 27. 0x10 27. 0x08 27. "E[27],Event 27" "Not asserted,Asserted" setclrfld.long 0x00 26. 0x10 26. 0x08 26. "E[26],Event 26" "Not asserted,Asserted" newline setclrfld.long 0x00 25. 0x10 25. 0x08 25. "E[25],Event 25" "Not asserted,Asserted" setclrfld.long 0x00 24. 0x10 24. 0x08 24. "E[24],Event 24" "Not asserted,Asserted" newline setclrfld.long 0x00 23. 0x10 23. 0x08 23. "E[23],Event 23" "Not asserted,Asserted" setclrfld.long 0x00 22. 0x10 22. 0x08 22. "E[22],Event 22" "Not asserted,Asserted" newline setclrfld.long 0x00 21. 0x10 21. 0x08 21. "E[21],Event 21" "Not asserted,Asserted" setclrfld.long 0x00 20. 0x10 20. 0x08 20. "E[20],Event 20" "Not asserted,Asserted" newline setclrfld.long 0x00 19. 0x10 19. 0x08 19. "E[19],Event 19" "Not asserted,Asserted" setclrfld.long 0x00 18. 0x10 18. 0x08 18. "E[18],Event 18" "Not asserted,Asserted" newline setclrfld.long 0x00 17. 0x10 17. 0x08 17. "E[17],Event 17" "Not asserted,Asserted" setclrfld.long 0x00 16. 0x10 16. 0x08 16. "E[16],Event 16" "Not asserted,Asserted" newline setclrfld.long 0x00 15. 0x10 15. 0x08 15. "E[15],Event 15" "Not asserted,Asserted" setclrfld.long 0x00 14. 0x10 14. 0x08 14. "E[14],Event 14" "Not asserted,Asserted" newline setclrfld.long 0x00 13. 0x10 13. 0x08 13. "E[13],Event 13" "Not asserted,Asserted" setclrfld.long 0x00 12. 0x10 12. 0x08 12. "E[12],Event 12" "Not asserted,Asserted" newline setclrfld.long 0x00 11. 0x10 11. 0x08 11. "E[11],Event 11" "Not asserted,Asserted" setclrfld.long 0x00 10. 0x10 10. 0x08 10. "E[10],Event 10" "Not asserted,Asserted" newline setclrfld.long 0x00 9. 0x10 9. 0x08 9. "E[9],Event 9" "Not asserted,Asserted" setclrfld.long 0x00 8. 0x10 8. 0x08 8. "E[8],Event 8" "Not asserted,Asserted" newline setclrfld.long 0x00 7. 0x10 7. 0x08 7. "E[7],Event 7" "Not asserted,Asserted" setclrfld.long 0x00 6. 0x10 6. 0x08 6. "E[6],Event 6" "Not asserted,Asserted" newline setclrfld.long 0x00 5. 0x10 5. 0x08 5. "E[5],Event 5" "Not asserted,Asserted" setclrfld.long 0x00 4. 0x10 4. 0x08 4. "E[4],Event 4" "Not asserted,Asserted" newline setclrfld.long 0x00 3. 0x10 3. 0x08 3. "E[3],Event 3" "Not asserted,Asserted" setclrfld.long 0x00 2. 0x10 2. 0x08 2. "E[2],Event 2" "Not asserted,Asserted" newline setclrfld.long 0x00 1. 0x10 1. 0x08 1. "E[1],Event 1" "Not asserted,Asserted" setclrfld.long 0x00 0. 0x10 0. 0x08 0. "E[0],Event 0" "Not asserted,Asserted" line.long 0x04 "ERH_SET/CLR,Event Register High" setclrfld.long 0x04 31. 0x14 31. 0x0C 31. "E[63],Event 63" "Not asserted,Asserted" setclrfld.long 0x04 30. 0x14 30. 0x0C 30. "E[62],Event 62" "Not asserted,Asserted" newline setclrfld.long 0x04 29. 0x14 29. 0x0C 29. "E[61],Event 61" "Not asserted,Asserted" setclrfld.long 0x04 28. 0x14 28. 0x0C 28. "E[60],Event 60" "Not asserted,Asserted" newline setclrfld.long 0x04 27. 0x14 27. 0x0C 27. "E[59],Event 59" "Not asserted,Asserted" setclrfld.long 0x04 26. 0x14 26. 0x0C 26. "E[58],Event 58" "Not asserted,Asserted" newline setclrfld.long 0x04 25. 0x14 25. 0x0C 25. "E[57],Event 57" "Not asserted,Asserted" setclrfld.long 0x04 24. 0x14 24. 0x0C 24. "E[56],Event 56" "Not asserted,Asserted" newline setclrfld.long 0x04 23. 0x14 23. 0x0C 23. "E[55],Event 55" "Not asserted,Asserted" setclrfld.long 0x04 22. 0x14 22. 0x0C 22. "E[54],Event 54" "Not asserted,Asserted" newline setclrfld.long 0x04 21. 0x14 21. 0x0C 21. "E[53],Event 53" "Not asserted,Asserted" setclrfld.long 0x04 20. 0x14 20. 0x0C 20. "E[52],Event 52" "Not asserted,Asserted" newline setclrfld.long 0x04 19. 0x14 19. 0x0C 19. "E[51],Event 51" "Not asserted,Asserted" setclrfld.long 0x04 18. 0x14 18. 0x0C 18. "E[50],Event 50" "Not asserted,Asserted" newline setclrfld.long 0x04 17. 0x14 17. 0x0C 17. "E[49],Event 49" "Not asserted,Asserted" setclrfld.long 0x04 16. 0x14 16. 0x0C 16. "E[48],Event 48" "Not asserted,Asserted" newline setclrfld.long 0x04 15. 0x14 15. 0x0C 15. "E[47],Event 47" "Not asserted,Asserted" setclrfld.long 0x04 14. 0x14 14. 0x0C 14. "E[46],Event 46" "Not asserted,Asserted" newline setclrfld.long 0x04 13. 0x14 13. 0x0C 13. "E[45],Event 45" "Not asserted,Asserted" setclrfld.long 0x04 12. 0x14 12. 0x0C 12. "E[44],Event 44" "Not asserted,Asserted" newline setclrfld.long 0x04 11. 0x14 11. 0x0C 11. "E[43],Event 43" "Not asserted,Asserted" setclrfld.long 0x04 10. 0x14 10. 0x0C 10. "E[42],Event 42" "Not asserted,Asserted" newline setclrfld.long 0x04 9. 0x14 9. 0x0C 9. "E[41],Event 41" "Not asserted,Asserted" setclrfld.long 0x04 8. 0x14 8. 0x0C 8. "E[40],Event 40" "Not asserted,Asserted" newline setclrfld.long 0x04 7. 0x14 7. 0x0C 7. "E[39],Event 39" "Not asserted,Asserted" setclrfld.long 0x04 6. 0x14 6. 0x0C 6. "E[38],Event 38" "Not asserted,Asserted" newline setclrfld.long 0x04 5. 0x14 5. 0x0C 5. "E[37],Event 37" "Not asserted,Asserted" setclrfld.long 0x04 4. 0x14 4. 0x0C 4. "E[36],Event 36" "Not asserted,Asserted" newline setclrfld.long 0x04 3. 0x14 3. 0x0C 3. "E[35],Event 35" "Not asserted,Asserted" setclrfld.long 0x04 2. 0x14 2. 0x0C 2. "E[34],Event 34" "Not asserted,Asserted" newline setclrfld.long 0x04 1. 0x14 1. 0x0C 1. "E[33],Event 33" "Not asserted,Asserted" setclrfld.long 0x04 0. 0x14 0. 0x0C 0. "E[32],Event 32" "Not asserted,Asserted" rgroup.long 0x1018++0x07 line.long 0x00 "CER,Chained Event Register" bitfld.long 0x00 31. "E[31],Chained event for event 31" "No effect,Chained" bitfld.long 0x00 30. "E[30],Chained event for event 30" "No effect,Chained" newline bitfld.long 0x00 29. "E[29],Chained event for event 29" "No effect,Chained" bitfld.long 0x00 28. "E[28],Chained event for event 28" "No effect,Chained" newline bitfld.long 0x00 27. "E[27],Chained event for event 27" "No effect,Chained" bitfld.long 0x00 26. "E[26],Chained event for event 26" "No effect,Chained" newline bitfld.long 0x00 25. "E[25],Chained event for event 25" "No effect,Chained" bitfld.long 0x00 24. "E[24],Chained event for event 24" "No effect,Chained" newline bitfld.long 0x00 23. "E[23],Chained event for event 23" "No effect,Chained" bitfld.long 0x00 22. "E[22],Chained event for event 22" "No effect,Chained" newline bitfld.long 0x00 21. "E[21],Chained event for event 21" "No effect,Chained" bitfld.long 0x00 20. "E[20],Chained event for event 20" "No effect,Chained" newline bitfld.long 0x00 19. "E[19],Chained event for event 19" "No effect,Chained" bitfld.long 0x00 18. "E[18],Chained event for event 18" "No effect,Chained" newline bitfld.long 0x00 17. "E[17],Chained event for event 17" "No effect,Chained" bitfld.long 0x00 16. "E[16],Chained event for event 16" "No effect,Chained" newline bitfld.long 0x00 15. "E[15],Chained event for event 15" "No effect,Chained" bitfld.long 0x00 14. "E[14],Chained event for event 14" "No effect,Chained" newline bitfld.long 0x00 13. "E[13],Chained event for event 13" "No effect,Chained" bitfld.long 0x00 12. "E[12],Chained event for event 12" "No effect,Chained" newline bitfld.long 0x00 11. "E[11],Chained event for event 11" "No effect,Chained" bitfld.long 0x00 10. "E[10],Chained event for event 10" "No effect,Chained" newline bitfld.long 0x00 9. "E[9],Chained event for event 9" "No effect,Chained" bitfld.long 0x00 8. "E[8],Chained event for event 8" "No effect,Chained" newline bitfld.long 0x00 7. "E[7],Chained event for event 7" "No effect,Chained" bitfld.long 0x00 6. "E[6],Chained event for event 6" "No effect,Chained" newline bitfld.long 0x00 5. "E[5],Chained event for event 5" "No effect,Chained" bitfld.long 0x00 4. "E[4],Chained event for event 4" "No effect,Chained" newline bitfld.long 0x00 3. "E[3],Chained event for event 3" "No effect,Chained" bitfld.long 0x00 2. "E[2],Chained event for event 2" "No effect,Chained" newline bitfld.long 0x00 1. "E[1],Chained event for event 1" "No effect,Chained" bitfld.long 0x00 0. "E[0],Chained event for event 0" "No effect,Chained" line.long 0x04 "CERH,Chained Event Register High" bitfld.long 0x04 31. "E[63],Chained event for event 63" "No effect,Chained" bitfld.long 0x04 30. "E[62],Chained event for event 62" "No effect,Chained" newline bitfld.long 0x04 29. "E[61],Chained event for event 61" "No effect,Chained" bitfld.long 0x04 28. "E[60],Chained event for event 60" "No effect,Chained" newline bitfld.long 0x04 27. "E[59],Chained event for event 59" "No effect,Chained" bitfld.long 0x04 26. "E[58],Chained event for event 58" "No effect,Chained" newline bitfld.long 0x04 25. "E[57],Chained event for event 57" "No effect,Chained" bitfld.long 0x04 24. "E[56],Chained event for event 56" "No effect,Chained" newline bitfld.long 0x04 23. "E[55],Chained event for event 55" "No effect,Chained" bitfld.long 0x04 22. "E[54],Chained event for event 54" "No effect,Chained" newline bitfld.long 0x04 21. "E[53],Chained event for event 53" "No effect,Chained" bitfld.long 0x04 20. "E[52],Chained event for event 52" "No effect,Chained" newline bitfld.long 0x04 19. "E[51],Chained event for event 51" "No effect,Chained" bitfld.long 0x04 18. "E[50],Chained event for event 50" "No effect,Chained" newline bitfld.long 0x04 17. "E[49],Chained event for event 49" "No effect,Chained" bitfld.long 0x04 16. "E[48],Chained event for event 48" "No effect,Chained" newline bitfld.long 0x04 15. "E[47],Chained event for event 47" "No effect,Chained" bitfld.long 0x04 14. "E[46],Chained event for event 46" "No effect,Chained" newline bitfld.long 0x04 13. "E[45],Chained event for event 45" "No effect,Chained" bitfld.long 0x04 12. "E[44],Chained event for event 44" "No effect,Chained" newline bitfld.long 0x04 11. "E[43],Chained event for event 43" "No effect,Chained" bitfld.long 0x04 10. "E[42],Chained event for event 42" "No effect,Chained" newline bitfld.long 0x04 9. "E[41],Chained event for event 41" "No effect,Chained" bitfld.long 0x04 8. "E[40],Chained event for event 40" "No effect,Chained" newline bitfld.long 0x04 7. "E[39],Chained event for event 39" "No effect,Chained" bitfld.long 0x04 6. "E[38],Chained event for event 38" "No effect,Chained" newline bitfld.long 0x04 5. "E[37],Chained event for event 37" "No effect,Chained" bitfld.long 0x04 4. "E[36],Chained event for event 36" "No effect,Chained" newline bitfld.long 0x04 3. "E[35],Chained event for event 35" "No effect,Chained" bitfld.long 0x04 2. "E[34],Chained event for event 34" "No effect,Chained" newline bitfld.long 0x04 1. "E[33],Chained event for event 33" "No effect,Chained" bitfld.long 0x04 0. "E[32],Chained event for event 32" "No effect,Chained" group.long 0x1020++0x7 line.long 0x00 "EER_SET/CLR,Event Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. "E[31],Event 31 enable" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. "E[30],Event 30 enable" "Disabled,Enabled" newline setclrfld.long 0x00 29. 0x10 29. 0x08 29. "E[29],Event 29 enable" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. "E[28],Event 28 enable" "Disabled,Enabled" newline setclrfld.long 0x00 27. 0x10 27. 0x08 27. "E[27],Event 27 enable" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. "E[26],Event 26 enable" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x10 25. 0x08 25. "E[25],Event 25 enable" "Disabled,Enabled" setclrfld.long 0x00 24. 0x10 24. 0x08 24. "E[24],Event 24 enable" "Disabled,Enabled" newline setclrfld.long 0x00 23. 0x10 23. 0x08 23. "E[23],Event 23 enable" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. "E[22],Event 22 enable" "Disabled,Enabled" newline setclrfld.long 0x00 21. 0x10 21. 0x08 21. "E[21],Event 21 enable" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. "E[20],Event 20 enable" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x10 19. 0x08 19. "E[19],Event 19 enable" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. "E[18],Event 18 enable" "Disabled,Enabled" newline setclrfld.long 0x00 17. 0x10 17. 0x08 17. "E[17],Event 17 enable" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. "E[16],Event 16 enable" "Disabled,Enabled" newline setclrfld.long 0x00 15. 0x10 15. 0x08 15. "E[15],Event 15 enable" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. "E[14],Event 14 enable" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x10 13. 0x08 13. "E[13],Event 13 enable" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. "E[12],Event 12 enable" "Disabled,Enabled" newline setclrfld.long 0x00 11. 0x10 11. 0x08 11. "E[11],Event 11 enable" "Disabled,Enabled" setclrfld.long 0x00 10. 0x10 10. 0x08 10. "E[10],Event 10 enable" "Disabled,Enabled" newline setclrfld.long 0x00 9. 0x10 9. 0x08 9. "E[9],Event 9 enable" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. "E[8],Event 8 enable" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x10 7. 0x08 7. "E[7],Event 7 enable" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. "E[6],Event 6 enable" "Disabled,Enabled" newline setclrfld.long 0x00 5. 0x10 5. 0x08 5. "E[5],Event 5 enable" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. "E[4],Event 4 enable" "Disabled,Enabled" newline setclrfld.long 0x00 3. 0x10 3. 0x08 3. "E[3],Event 3 enable" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. "E[2],Event 2 enable" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x10 1. 0x08 1. "E[1],Event 1 enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. "E[0],Event 0 enable" "Disabled,Enabled" line.long 0x04 "EERH_SET/CLR,Event Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0C 31. "E[63],Event 63 enable" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0C 30. "E[62],Event 62 enable" "Disabled,Enabled" newline setclrfld.long 0x04 29. 0x14 29. 0x0C 29. "E[61],Event 61 enable" "Disabled,Enabled" setclrfld.long 0x04 28. 0x14 28. 0x0C 28. "E[60],Event 60 enable" "Disabled,Enabled" newline setclrfld.long 0x04 27. 0x14 27. 0x0C 27. "E[59],Event 59 enable" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0C 26. "E[58],Event 58 enable" "Disabled,Enabled" newline setclrfld.long 0x04 25. 0x14 25. 0x0C 25. "E[57],Event 57 enable" "Disabled,Enabled" setclrfld.long 0x04 24. 0x14 24. 0x0C 24. "E[56],Event 56 enable" "Disabled,Enabled" newline setclrfld.long 0x04 23. 0x14 23. 0x0C 23. "E[55],Event 55 enable" "Disabled,Enabled" setclrfld.long 0x04 22. 0x14 22. 0x0C 22. "E[54],Event 54 enable" "Disabled,Enabled" newline setclrfld.long 0x04 21. 0x14 21. 0x0C 21. "E[53],Event 53 enable" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0C 20. "E[52],Event 52 enable" "Disabled,Enabled" newline setclrfld.long 0x04 19. 0x14 19. 0x0C 19. "E[51],Event 51 enable" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0C 18. "E[50],Event 50 enable" "Disabled,Enabled" newline setclrfld.long 0x04 17. 0x14 17. 0x0C 17. "E[49],Event 49 enable" "Disabled,Enabled" setclrfld.long 0x04 16. 0x14 16. 0x0C 16. "E[48],Event 48 enable" "Disabled,Enabled" newline setclrfld.long 0x04 15. 0x14 15. 0x0C 15. "E[47],Event 47 enable" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0C 14. "E[46],Event 46 enable" "Disabled,Enabled" newline setclrfld.long 0x04 13. 0x14 13. 0x0C 13. "E[45],Event 45 enable" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0C 12. "E[44],Event 44 enable" "Disabled,Enabled" newline setclrfld.long 0x04 11. 0x14 11. 0x0C 11. "E[43],Event 43 enable" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0C 10. "E[42],Event 42 enable" "Disabled,Enabled" newline setclrfld.long 0x04 9. 0x14 9. 0x0C 9. "E[41],Event 41 enable" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0C 8. "E[40],Event 40 enable" "Disabled,Enabled" newline setclrfld.long 0x04 7. 0x14 7. 0x0C 7. "E[39],Event 39 enable" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0C 6. "E[38],Event 38 enable" "Disabled,Enabled" newline setclrfld.long 0x04 5. 0x14 5. 0x0C 5. "E[37],Event 37 enable" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0C 4. "E[36],Event 36 enable" "Disabled,Enabled" newline setclrfld.long 0x04 3. 0x14 3. 0x0C 3. "E[35],Event 35 enable" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0C 2. "E[34],Event 34 enable" "Disabled,Enabled" newline setclrfld.long 0x04 1. 0x14 1. 0x0C 1. "E[33],Event 33 enable" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0C 0. "E[32],Event 32 enable" "Disabled,Enabled" group.long 0x1038++0x07 line.long 0x00 "SER_SET/CLR,Secondary Event Register" setclrfld.long 0x00 31. 0x00 31. 0x08 31. "E[31],Event 31 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 30. 0x00 30. 0x08 30. "E[30],Event 30 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x00 29. 0x00 29. 0x08 29. "E[29],Event 29 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 28. 0x00 28. 0x08 28. "E[28],Event 28 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x00 27. 0x00 27. 0x08 27. "E[27],Event 27 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 26. 0x00 26. 0x08 26. "E[26],Event 26 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x00 25. 0x00 25. 0x08 25. "E[25],Event 25 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 24. 0x00 24. 0x08 24. "E[24],Event 24 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x00 23. 0x00 23. 0x08 23. "E[23],Event 23 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 22. 0x00 22. 0x08 22. "E[22],Event 22 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x00 21. 0x00 21. 0x08 21. "E[21],Event 21 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 20. 0x00 20. 0x08 20. "E[20],Event 20 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x00 19. 0x00 19. 0x08 19. "E[19],Event 19 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 18. 0x00 18. 0x08 18. "E[18],Event 18 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x00 17. 0x00 17. 0x08 17. "E[17],Event 17 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 16. 0x00 16. 0x08 16. "E[16],Event 16 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x00 15. 0x00 15. 0x08 15. "E[15],Event 15 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 14. 0x00 14. 0x08 14. "E[14],Event 14 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x00 13. 0x00 13. 0x08 13. "E[13],Event 13 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 12. 0x00 12. 0x08 12. "E[12],Event 12 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x00 11. 0x00 11. 0x08 11. "E[11],Event 11 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 10. 0x00 10. 0x08 10. "E[10],Event 10 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x00 9. 0x00 9. 0x08 9. "E[9],Event 9 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 8. 0x00 8. 0x08 8. "E[8],Event 8 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x00 7. 0x00 7. 0x08 7. "E[7],Event 7 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 6. 0x00 6. 0x08 6. "E[6],Event 6 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x00 5. 0x00 5. 0x08 5. "E[5],Event 5 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 4. 0x00 4. 0x08 4. "E[4],Event 4 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x00 3. 0x00 3. 0x08 3. "E[3],Event 3 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 2. 0x00 2. 0x08 2. "E[2],Event 2 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x00 1. 0x00 1. 0x08 1. "E[1],Event 1 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 0. 0x00 0. 0x08 0. "E[0],Event 0 stored in event queue" "Not stored,Stored" line.long 0x04 "SERH_SET/CLR,Secondary Event Register High" setclrfld.long 0x04 31. 0x04 31. 0x0C 31. "E[63],Event 63 stored in event queue" "Not stored,Stored" setclrfld.long 0x04 30. 0x04 30. 0x0C 30. "E[62],Event 62 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x04 29. 0x04 29. 0x0C 29. "E[61],Event 61 stored in event queue" "Not stored,Stored" setclrfld.long 0x04 28. 0x04 28. 0x0C 28. "E[60],Event 60 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x04 27. 0x04 27. 0x0C 27. "E[59],Event 59 stored in event queue" "Not stored,Stored" setclrfld.long 0x04 26. 0x04 26. 0x0C 26. "E[58],Event 58 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x04 25. 0x04 25. 0x0C 25. "E[57],Event 57 stored in event queue" "Not stored,Stored" setclrfld.long 0x04 24. 0x04 24. 0x0C 24. "E[56],Event 56 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x04 23. 0x04 23. 0x0C 23. "E[55],Event 55 stored in event queue" "Not stored,Stored" setclrfld.long 0x04 22. 0x04 22. 0x0C 22. "E[54],Event 54 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x04 21. 0x04 21. 0x0C 21. "E[53],Event 53 stored in event queue" "Not stored,Stored" setclrfld.long 0x04 20. 0x04 20. 0x0C 20. "E[52],Event 52 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x04 19. 0x04 19. 0x0C 19. "E[51],Event 51 stored in event queue" "Not stored,Stored" setclrfld.long 0x04 18. 0x04 18. 0x0C 18. "E[50],Event 50 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x04 17. 0x04 17. 0x0C 17. "E[49],Event 49 stored in event queue" "Not stored,Stored" setclrfld.long 0x04 16. 0x04 16. 0x0C 16. "E[48],Event 48 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x04 15. 0x04 15. 0x0C 15. "E[47],Event 47 stored in event queue" "Not stored,Stored" setclrfld.long 0x04 14. 0x04 14. 0x0C 14. "E[46],Event 46 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x04 13. 0x04 13. 0x0C 13. "E[45],Event 45 stored in event queue" "Not stored,Stored" setclrfld.long 0x04 12. 0x04 12. 0x0C 12. "E[44],Event 44 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x04 11. 0x04 11. 0x0C 11. "E[43],Event 43 stored in event queue" "Not stored,Stored" setclrfld.long 0x04 10. 0x04 10. 0x0C 10. "E[42],Event 42 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x04 9. 0x04 9. 0x0C 9. "E[41],Event 41 stored in event queue" "Not stored,Stored" setclrfld.long 0x04 8. 0x04 8. 0x0C 8. "E[40],Event 40 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x04 7. 0x04 7. 0x0C 7. "E[39],Event 39 stored in event queue" "Not stored,Stored" setclrfld.long 0x04 6. 0x04 6. 0x0C 6. "E[38],Event 38 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x04 5. 0x04 5. 0x0C 5. "E[37],Event 37 stored in event queue" "Not stored,Stored" setclrfld.long 0x04 4. 0x04 4. 0x0C 4. "E[36],Event 36 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x04 3. 0x04 3. 0x0C 3. "E[35],Event 35 stored in event queue" "Not stored,Stored" setclrfld.long 0x04 2. 0x04 2. 0x0C 2. "E[34],Event 34 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x04 1. 0x04 1. 0x0C 1. "E[33],Event 33 stored in event queue" "Not stored,Stored" setclrfld.long 0x04 0. 0x04 0. 0x0C 0. "E[32],Event 32 stored in event queue" "Not stored,Stored" group.long 0x1050++0x07 line.long 0x00 "IER_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. "I[31],Interrupt 31 enable" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. "I[30],Interrupt 30 enable" "Disabled,Enabled" newline setclrfld.long 0x00 29. 0x10 29. 0x08 29. "I[29],Interrupt 29 enable" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. "I[28],Interrupt 28 enable" "Disabled,Enabled" newline setclrfld.long 0x00 27. 0x10 27. 0x08 27. "I[27],Interrupt 27 enable" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. "I[26],Interrupt 26 enable" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x10 25. 0x08 25. "I[25],Interrupt 25 enable" "Disabled,Enabled" setclrfld.long 0x00 24. 0x10 24. 0x08 24. "I[24],Interrupt 24 enable" "Disabled,Enabled" newline setclrfld.long 0x00 23. 0x10 23. 0x08 23. "I[23],Interrupt 23 enable" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. "I[22],Interrupt 22 enable" "Disabled,Enabled" newline setclrfld.long 0x00 21. 0x10 21. 0x08 21. "I[21],Interrupt 21 enable" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. "I[20],Interrupt 20 enable" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x10 19. 0x08 19. "I[19],Interrupt 19 enable" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. "I[18],Interrupt 18 enable" "Disabled,Enabled" newline setclrfld.long 0x00 17. 0x10 17. 0x08 17. "I[17],Interrupt 17 enable" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. "I[16],Interrupt 16 enable" "Disabled,Enabled" newline setclrfld.long 0x00 15. 0x10 15. 0x08 15. "I[15],Interrupt 15 enable" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. "I[14],Interrupt 14 enable" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x10 13. 0x08 13. "I[13],Interrupt 13 enable" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. "I[12],Interrupt 12 enable" "Disabled,Enabled" newline setclrfld.long 0x00 11. 0x10 11. 0x08 11. "I[11],Interrupt 11 enable" "Disabled,Enabled" setclrfld.long 0x00 10. 0x10 10. 0x08 10. "I[10],Interrupt 10 enable" "Disabled,Enabled" newline setclrfld.long 0x00 9. 0x10 9. 0x08 9. "I[9],Interrupt 9 enable" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. "I[8],Interrupt 8 enable" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x10 7. 0x08 7. "I[7],Interrupt 7 enable" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. "I[6],Interrupt 6 enable" "Disabled,Enabled" newline setclrfld.long 0x00 5. 0x10 5. 0x08 5. "I[5],Interrupt 5 enable" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. "I[4],Interrupt 4 enable" "Disabled,Enabled" newline setclrfld.long 0x00 3. 0x10 3. 0x08 3. "I[3],Interrupt 3 enable" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. "I[2],Interrupt 2 enable" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x10 1. 0x08 1. "I[1],Interrupt 1 enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. "I[0],Interrupt 0 enable" "Disabled,Enabled" line.long 0x04 "IERH_SET/CLR,Interrupt Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0C 31. "I[63],Interrupt 63 enable" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0C 30. "I[62],Interrupt 62 enable" "Disabled,Enabled" newline setclrfld.long 0x04 29. 0x14 29. 0x0C 29. "I[61],Interrupt 61 enable" "Disabled,Enabled" setclrfld.long 0x04 28. 0x14 28. 0x0C 28. "I[60],Interrupt 60 enable" "Disabled,Enabled" newline setclrfld.long 0x04 27. 0x14 27. 0x0C 27. "I[59],Interrupt 59 enable" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0C 26. "I[58],Interrupt 58 enable" "Disabled,Enabled" newline setclrfld.long 0x04 25. 0x14 25. 0x0C 25. "I[57],Interrupt 57 enable" "Disabled,Enabled" setclrfld.long 0x04 24. 0x14 24. 0x0C 24. "I[56],Interrupt 56 enable" "Disabled,Enabled" newline setclrfld.long 0x04 23. 0x14 23. 0x0C 23. "I[55],Interrupt 55 enable" "Disabled,Enabled" setclrfld.long 0x04 22. 0x14 22. 0x0C 22. "I[54],Interrupt 54 enable" "Disabled,Enabled" newline setclrfld.long 0x04 21. 0x14 21. 0x0C 21. "I[53],Interrupt 53 enable" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0C 20. "I[52],Interrupt 52 enable" "Disabled,Enabled" newline setclrfld.long 0x04 19. 0x14 19. 0x0C 19. "I[51],Interrupt 51 enable" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0C 18. "I[50],Interrupt 50 enable" "Disabled,Enabled" newline setclrfld.long 0x04 17. 0x14 17. 0x0C 17. "I[49],Interrupt 49 enable" "Disabled,Enabled" setclrfld.long 0x04 16. 0x14 16. 0x0C 16. "I[48],Interrupt 48 enable" "Disabled,Enabled" newline setclrfld.long 0x04 15. 0x14 15. 0x0C 15. "I[47],Interrupt 47 enable" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0C 14. "I[46],Interrupt 46 enable" "Disabled,Enabled" newline setclrfld.long 0x04 13. 0x14 13. 0x0C 13. "I[45],Interrupt 45 enable" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0C 12. "I[44],Interrupt 44 enable" "Disabled,Enabled" newline setclrfld.long 0x04 11. 0x14 11. 0x0C 11. "I[43],Interrupt 43 enable" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0C 10. "I[42],Interrupt 42 enable" "Disabled,Enabled" newline setclrfld.long 0x04 9. 0x14 9. 0x0C 9. "I[41],Interrupt 41 enable" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0C 8. "I[40],Interrupt 40 enable" "Disabled,Enabled" newline setclrfld.long 0x04 7. 0x14 7. 0x0C 7. "I[39],Interrupt 39 enable" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0C 6. "I[38],Interrupt 38 enable" "Disabled,Enabled" newline setclrfld.long 0x04 5. 0x14 5. 0x0C 5. "I[37],Interrupt 37 enable" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0C 4. "I[36],Interrupt 36 enable" "Disabled,Enabled" newline setclrfld.long 0x04 3. 0x14 3. 0x0C 3. "I[35],Interrupt 35 enable" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0C 2. "I[34],Interrupt 34 enable" "Disabled,Enabled" newline setclrfld.long 0x04 1. 0x14 1. 0x0C 1. "I[33],Interrupt 33 enable" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0C 0. "I[32],Interrupt 32 enable" "Disabled,Enabled" group.long 0x1068++0x07 line.long 0x00 "IPR_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x08 31. "I[31],Interrupt pending for TCC = 31" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x08 30. "I[30],Interrupt pending for TCC = 30" "Not pending,Pending" newline setclrfld.long 0x00 29. 0x00 29. 0x08 29. "I[29],Interrupt pending for TCC = 29" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x08 28. "I[28],Interrupt pending for TCC = 28" "Not pending,Pending" newline setclrfld.long 0x00 27. 0x00 27. 0x08 27. "I[27],Interrupt pending for TCC = 27" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x08 26. "I[26],Interrupt pending for TCC = 26" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x08 25. "I[25],Interrupt pending for TCC = 25" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x08 24. "I[24],Interrupt pending for TCC = 24" "Not pending,Pending" newline setclrfld.long 0x00 23. 0x00 23. 0x08 23. "I[23],Interrupt pending for TCC = 23" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x08 22. "I[22],Interrupt pending for TCC = 22" "Not pending,Pending" newline setclrfld.long 0x00 21. 0x00 21. 0x08 21. "I[21],Interrupt pending for TCC = 21" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x08 20. "I[20],Interrupt pending for TCC = 20" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x08 19. "I[19],Interrupt pending for TCC = 19" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x08 18. "I[18],Interrupt pending for TCC = 18" "Not pending,Pending" newline setclrfld.long 0x00 17. 0x00 17. 0x08 17. "I[17],Interrupt pending for TCC = 17" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x08 16. "I[16],Interrupt pending for TCC = 16" "Not pending,Pending" newline setclrfld.long 0x00 15. 0x00 15. 0x08 15. "I[15],Interrupt pending for TCC = 15" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x08 14. "I[14],Interrupt pending for TCC = 14" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x08 13. "I[13],Interrupt pending for TCC = 13" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x08 12. "I[12],Interrupt pending for TCC = 12" "Not pending,Pending" newline setclrfld.long 0x00 11. 0x00 11. 0x08 11. "I[11],Interrupt pending for TCC = 11" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x08 10. "I[10],Interrupt pending for TCC = 10" "Not pending,Pending" newline setclrfld.long 0x00 9. 0x00 9. 0x08 9. "I[9],Interrupt pending for TCC = 9" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x08 8. "I[8],Interrupt pending for TCC = 8" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x08 7. "I[7],Interrupt pending for TCC = 7" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x08 6. "I[6],Interrupt pending for TCC = 6" "Not pending,Pending" newline setclrfld.long 0x00 5. 0x00 5. 0x08 5. "I[5],Interrupt pending for TCC = 5" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x08 4. "I[4],Interrupt pending for TCC = 4" "Not pending,Pending" newline setclrfld.long 0x00 3. 0x00 3. 0x08 3. "I[3],Interrupt pending for TCC = 3" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x08 2. "I[2],Interrupt pending for TCC = 2" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x08 1. "I[1],Interrupt pending for TCC = 1" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x08 0. "I[0],Interrupt pending for TCC = 0" "Not pending,Pending" line.long 0x04 "IPRH_SET/CLR,Interrupt Pending Register High" setclrfld.long 0x04 31. 0x04 31. 0x0C 31. "I[63],Interrupt pending for TCC = 63" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x0C 30. "I[62],Interrupt pending for TCC = 62" "Not pending,Pending" newline setclrfld.long 0x04 29. 0x04 29. 0x0C 29. "I[61],Interrupt pending for TCC = 61" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x0C 28. "I[60],Interrupt pending for TCC = 60" "Not pending,Pending" newline setclrfld.long 0x04 27. 0x04 27. 0x0C 27. "I[59],Interrupt pending for TCC = 59" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x0C 26. "I[58],Interrupt pending for TCC = 58" "Not pending,Pending" newline setclrfld.long 0x04 25. 0x04 25. 0x0C 25. "I[57],Interrupt pending for TCC = 57" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x0C 24. "I[56],Interrupt pending for TCC = 56" "Not pending,Pending" newline setclrfld.long 0x04 23. 0x04 23. 0x0C 23. "I[55],Interrupt pending for TCC = 55" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x0C 22. "I[54],Interrupt pending for TCC = 54" "Not pending,Pending" newline setclrfld.long 0x04 21. 0x04 21. 0x0C 21. "I[53],Interrupt pending for TCC = 53" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x0C 20. "I[52],Interrupt pending for TCC = 52" "Not pending,Pending" newline setclrfld.long 0x04 19. 0x04 19. 0x0C 19. "I[51],Interrupt pending for TCC = 51" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x0C 18. "I[50],Interrupt pending for TCC = 50" "Not pending,Pending" newline setclrfld.long 0x04 17. 0x04 17. 0x0C 17. "I[49],Interrupt pending for TCC = 49" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x0C 16. "I[48],Interrupt pending for TCC = 48" "Not pending,Pending" newline setclrfld.long 0x04 15. 0x04 15. 0x0C 15. "I[47],Interrupt pending for TCC = 47" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x0C 14. "I[46],Interrupt pending for TCC = 46" "Not pending,Pending" newline setclrfld.long 0x04 13. 0x04 13. 0x0C 13. "I[45],Interrupt pending for TCC = 45" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x0C 12. "I[44],Interrupt pending for TCC = 44" "Not pending,Pending" newline setclrfld.long 0x04 11. 0x04 11. 0x0C 11. "I[43],Interrupt pending for TCC = 43" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x0C 10. "I[42],Interrupt pending for TCC = 42" "Not pending,Pending" newline setclrfld.long 0x04 9. 0x04 9. 0x0C 9. "I[41],Interrupt pending for TCC = 41" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x0C 8. "I[40],Interrupt pending for TCC = 40" "Not pending,Pending" newline setclrfld.long 0x04 7. 0x04 7. 0x0C 7. "I[39],Interrupt pending for TCC = 39" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x0C 6. "I[38],Interrupt pending for TCC = 38" "Not pending,Pending" newline setclrfld.long 0x04 5. 0x04 5. 0x0C 5. "I[37],Interrupt pending for TCC = 37" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x0C 4. "I[36],Interrupt pending for TCC = 36" "Not pending,Pending" newline setclrfld.long 0x04 3. 0x04 3. 0x0C 3. "I[35],Interrupt pending for TCC = 35" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x0C 2. "I[34],Interrupt pending for TCC = 34" "Not pending,Pending" newline setclrfld.long 0x04 1. 0x04 1. 0x0C 1. "I[33],Interrupt pending for TCC = 33" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x0C 0. "I[32],Interrupt pending for TCC = 32" "Not pending,Pending" wgroup.long 0x1078++0x03 line.long 0x00 "IEVAL,Interrupt Evaluate Register" bitfld.long 0x00 0. "EVAL,Interrupt evaluate" "No effect,Enable" rgroup.long 0x1080++0x03 line.long 0x00 "QER,QDMA Event Register" bitfld.long 0x00 7. "E[7],QDMA event for channel 7" "No effect,Prioritized" bitfld.long 0x00 6. "E[6],QDMA event for channel 6" "No effect,Prioritized" newline bitfld.long 0x00 5. "E[5],QDMA event for channel 5" "No effect,Prioritized" bitfld.long 0x00 4. "E[4],QDMA event for channel 4" "No effect,Prioritized" newline bitfld.long 0x00 3. "E[3],QDMA event for channel 3" "No effect,Prioritized" bitfld.long 0x00 2. "E[2],QDMA event for channel 2" "No effect,Prioritized" newline bitfld.long 0x00 1. "E[1],QDMA event for channel 1" "No effect,Prioritized" bitfld.long 0x00 0. "E[0],QDMA event for channel 0" "No effect,Prioritized" group.long 0x1084++0x03 line.long 0x00 "QEER_SET/CLR,QDMA Event Enable Register" setclrfld.long 0x00 7. 0x08 7. 0x04 7. "E[7],QDMA event enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x08 6. 0x04 6. "E[6],QDMA event enable for channel 6" "Disabled,Enabled" newline setclrfld.long 0x00 5. 0x08 5. 0x04 5. "E[5],QDMA event enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x08 4. 0x04 4. "E[4],QDMA event enable for channel 4" "Disabled,Enabled" newline setclrfld.long 0x00 3. 0x08 3. 0x04 3. "E[3],QDMA event enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x08 2. 0x04 2. "E[2],QDMA event enable for channel 2" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x08 1. 0x04 1. "E[1],QDMA event enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x08 0. 0x04 0. "E[0],QDMA event enable for channel 0" "Disabled,Enabled" group.long 0x1090++0x03 line.long 0x00 "QSER_SET/CLR,QDMA Secondary Event Register" setclrfld.long 0x00 7. 0x00 7. 0x04 7. "E[7],QDMA secondary event register for channel 7 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 6. 0x00 6. 0x04 6. "E[6],QDMA secondary event register for channel 6 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x00 5. 0x00 5. 0x04 5. "E[5],QDMA secondary event register for channel 5 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 4. 0x00 4. 0x04 4. "E[4],QDMA secondary event register for channel 4 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x00 3. 0x00 3. 0x04 3. "E[3],QDMA secondary event register for channel 3 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 2. 0x00 2. 0x04 2. "E[2],QDMA secondary event register for channel 2 stored in event queue" "Not stored,Stored" newline setclrfld.long 0x00 1. 0x00 1. 0x04 1. "E[1],QDMA secondary event register for channel 1 stored in event queue" "Not stored,Stored" setclrfld.long 0x00 0. 0x00 0. 0x04 0. "E[0],QDMA secondary event register for channel 0 stored in event queue" "Not stored,Stored" tree.end tree "EDMA3TCC" tree "EDMA3TC0" base ad:0x49800000 rgroup.long 0x00++0x07 line.long 0x00 "PID,Peripheral Identification Register" hexmask.long.word 0x00 0.--15. 1. "PID,Peripheral identifier" line.long 0x04 "TCCFG,EDMA3TC Configuration Register" bitfld.long 0x04 8.--9. "DREGDEPTH,Destination register FIFO depth parameterization" ",,4 entry,?..." bitfld.long 0x04 4.--5. "BUSWIDTH,Bus width parameterization" ",,128 bit,?..." bitfld.long 0x04 0.--2. "FIFOSIZE,FIFO size" ",,,,512 FIFO,?..." group.long 0x10++0x03 line.long 0x00 "SYSCONFIG,EDMA3TC System Configuration Register" bitfld.long 0x00 4.--5. "STANDBYMODE,Configuration of the local initiator state management mode" "Force-standby,No-standby,Smart-standby,?..." bitfld.long 0x00 2.--3. "IDLEMODE,Configuration of the local target state management mode" "Force-idle,No-idle,Smart-idle,?..." rgroup.long 0x100++0x03 line.long 0x00 "TCSTAT,EDMA3TC Channel Status Register" bitfld.long 0x00 12.--13. "DFSTRTPTR,Destination FIFO start pointer" "0,1,2,3" bitfld.long 0x00 4.--6. "DSTACTV,Destination active state" "Empty,1 TR,2 TRs,2 TRs,3 TRs,4 TRs,?..." bitfld.long 0x00 2. "WSACTV,Write status active" "Not pending,Pending" newline bitfld.long 0x00 1. "SRCACTV,Source active state" "Idle,Busy" bitfld.long 0x00 0. "PROGBUSY,Program register set busy" "Idle,Busy" group.long 0x120++0x03 line.long 0x00 "ERRSTAT_SET/CLR,Error Register" setclrfld.long 0x00 3. 0x04 3. 0x08 3. "MMRAERR,MMR address error" "No error,Error" setclrfld.long 0x00 2. 0x04 2. 0x08 2. "TRERR,Transfer request (Tr) error event" "No error,Error" setclrfld.long 0x00 0. 0x04 0. 0x08 0. "BUSERR,Bus error event" "No error,Error" group.long 0x12C++0x03 line.long 0x00 "ERRDET,Error Details Register" bitfld.long 0x00 17. "TCCHEN,Transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 16. "TCINTEN,Transfer complete interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8.--13. "TCC,Transfer complete code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 0.--3. "STAT,Transaction status" "No error,Read error,Read error,Read error,Read error,Read error,Read error,Read error,Write error,Write error,Write error,Write error,Write error,Write error,Write error,Write error" wgroup.long 0x130++0x03 line.long 0x00 "ERRCMD,Error Interrupt Command Register" bitfld.long 0x00 0. "EVAL,Error evaluate" "No effect,Set" group.long 0x140++0x03 line.long 0x00 "RDRATE,Read Rate Register" bitfld.long 0x00 0.--2. "RDRATE,Read rate controls the number of cycles between read commands" "Fastest,4 cycles,8 cycles,16 cycles,32 cycled,?..." rgroup.long 0x240++0x0B line.long 0x00 "SAOPT,Source Active Options Register" bitfld.long 0x00 22. "TCCHEN,Transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. "TCINTEN,Transfer complete interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12.--17. "TCC,Transfer complete code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 4.--6. "PRI,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. "DAM,Destination address mode within an array" "Increment,Constant" newline bitfld.long 0x00 0. "SAM,Source address mode within an array" "Increment,Constant" line.long 0x04 "SASRC,Source Active Source Address Register" line.long 0x08 "SACNT,Source Active Count Register" hexmask.long.word 0x08 16.--31. 1. "BCNT,B dimension count remaining for the source active register set" hexmask.long.word 0x08 0.--15. 1. "ACNT,A dimension count remaining for the source active register set" hgroup.long 0x24C++0x03 hide.long 0x00 "SADST,Source Active Destination Address Register" rgroup.long 0x250++0x0F line.long 0x00 "SABIDX,Source Active Source B-Index Register" hexmask.long.word 0x00 16.--31. 1. "DBIDX,B-Index offset between destination arrays" hexmask.long.word 0x00 0.--15. 1. "SBIDX,B-Index offset between source arrays" line.long 0x04 "SABIDX,Source Active Source B-Index Register" bitfld.long 0x04 8. "PRIV,Privilege level" "User,Supervisor" bitfld.long 0x04 0.--3. "PRIVID,Privilege ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "SACNTRLD,Source Active Count Reload Register" hexmask.long.word 0x08 0.--15. 1. "ACNTRLD,A-count reload value" line.long 0x0C "SASRCBREF,Source Active Source Address B-Reference Register" hgroup.long 0x250++0x03 hide.long 0x00 "SADSTBREF,Source Active Destination Address B-Reference Register" rgroup.long 0x280++0x03 line.long 0x00 "DFCNTRLD,Destination FIFO Set Count Reload" hexmask.long.word 0x00 0.--15. 1. "ACNTRLD,A-count reload value for the destination FIFO register set" hgroup.long 0x284++0x03 hide.long 0x00 "DFSRCBREF,Destination FIFO Set Destination Address B Reference Register" hide.long 0x04 "DFDSTBREF,Destination FIFO Set Destination Address B Reference Register" rgroup.long 0x300++0x03 line.long 0x00 "DFOPT0,Destination FIFO Options Register 0" bitfld.long 0x00 22. "TCCHEN,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. "TCINTEN,Transfer complete interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12.--17. "TCC,Transfer complete code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 4.--6. "PRI,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" newline bitfld.long 0x00 1. "DAM,Destination address mode within an array" "Increment,Constant" bitfld.long 0x00 0. "SAM,Source address mode within an array" "Increment,Constant" hgroup.long (0x300+0x04)++0x03 hide.long 0x04 "DFSRC0,Destination FIFO Source Address Register 0" rgroup.long (0x300+0x08)++0x0F line.long 0x00 "DFCNT0,Destination FIFO Count Register 0" hexmask.long.word 0x00 16.--31. 1. "BCNT,B-dimension count remaining for destination register set" hexmask.long.word 0x00 0.--15. 1. "ACNT,A-dimension count remaining for destination register set" line.long 0x04 "DFDST0,Destination FIFO Destination Address Register 0" line.long 0x08 "DFBIDX0,Destination FIFO BIDX Register 0" hexmask.long.word 0x08 16.--31. 1. "DBIDX,A-Index offset between source arrays for the destination FIFO register set" hexmask.long.word 0x08 0.--15. 1. "SBIDX,B-Index offset between source arrays for the destination FIFO register set" line.long 0x0C "DFMPPRXY0,Destination FIFO Memory Protection Proxy Register 0" bitfld.long 0x0C 8. "PRIV,Privilege level" "User,Supervisor" bitfld.long 0x0C 0.--3. "PRIVID,Privilege ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x340++0x03 line.long 0x00 "DFOPT1,Destination FIFO Options Register 1" bitfld.long 0x00 22. "TCCHEN,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. "TCINTEN,Transfer complete interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12.--17. "TCC,Transfer complete code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 4.--6. "PRI,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" newline bitfld.long 0x00 1. "DAM,Destination address mode within an array" "Increment,Constant" bitfld.long 0x00 0. "SAM,Source address mode within an array" "Increment,Constant" hgroup.long (0x340+0x04)++0x03 hide.long 0x04 "DFSRC1,Destination FIFO Source Address Register 1" rgroup.long (0x340+0x08)++0x0F line.long 0x00 "DFCNT1,Destination FIFO Count Register 1" hexmask.long.word 0x00 16.--31. 1. "BCNT,B-dimension count remaining for destination register set" hexmask.long.word 0x00 0.--15. 1. "ACNT,A-dimension count remaining for destination register set" line.long 0x04 "DFDST1,Destination FIFO Destination Address Register 1" line.long 0x08 "DFBIDX1,Destination FIFO BIDX Register 1" hexmask.long.word 0x08 16.--31. 1. "DBIDX,A-Index offset between source arrays for the destination FIFO register set" hexmask.long.word 0x08 0.--15. 1. "SBIDX,B-Index offset between source arrays for the destination FIFO register set" line.long 0x0C "DFMPPRXY1,Destination FIFO Memory Protection Proxy Register 1" bitfld.long 0x0C 8. "PRIV,Privilege level" "User,Supervisor" bitfld.long 0x0C 0.--3. "PRIVID,Privilege ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x380++0x03 line.long 0x00 "DFOPT2,Destination FIFO Options Register 2" bitfld.long 0x00 22. "TCCHEN,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. "TCINTEN,Transfer complete interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12.--17. "TCC,Transfer complete code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 4.--6. "PRI,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" newline bitfld.long 0x00 1. "DAM,Destination address mode within an array" "Increment,Constant" bitfld.long 0x00 0. "SAM,Source address mode within an array" "Increment,Constant" hgroup.long (0x380+0x04)++0x03 hide.long 0x04 "DFSRC2,Destination FIFO Source Address Register 2" rgroup.long (0x380+0x08)++0x0F line.long 0x00 "DFCNT2,Destination FIFO Count Register 2" hexmask.long.word 0x00 16.--31. 1. "BCNT,B-dimension count remaining for destination register set" hexmask.long.word 0x00 0.--15. 1. "ACNT,A-dimension count remaining for destination register set" line.long 0x04 "DFDST2,Destination FIFO Destination Address Register 2" line.long 0x08 "DFBIDX2,Destination FIFO BIDX Register 2" hexmask.long.word 0x08 16.--31. 1. "DBIDX,A-Index offset between source arrays for the destination FIFO register set" hexmask.long.word 0x08 0.--15. 1. "SBIDX,B-Index offset between source arrays for the destination FIFO register set" line.long 0x0C "DFMPPRXY2,Destination FIFO Memory Protection Proxy Register 2" bitfld.long 0x0C 8. "PRIV,Privilege level" "User,Supervisor" bitfld.long 0x0C 0.--3. "PRIVID,Privilege ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x3C0++0x03 line.long 0x00 "DFOPT3,Destination FIFO Options Register 3" bitfld.long 0x00 22. "TCCHEN,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. "TCINTEN,Transfer complete interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12.--17. "TCC,Transfer complete code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 4.--6. "PRI,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" newline bitfld.long 0x00 1. "DAM,Destination address mode within an array" "Increment,Constant" bitfld.long 0x00 0. "SAM,Source address mode within an array" "Increment,Constant" hgroup.long (0x3C0+0x04)++0x03 hide.long 0x04 "DFSRC3,Destination FIFO Source Address Register 3" rgroup.long (0x3C0+0x08)++0x0F line.long 0x00 "DFCNT3,Destination FIFO Count Register 3" hexmask.long.word 0x00 16.--31. 1. "BCNT,B-dimension count remaining for destination register set" hexmask.long.word 0x00 0.--15. 1. "ACNT,A-dimension count remaining for destination register set" line.long 0x04 "DFDST3,Destination FIFO Destination Address Register 3" line.long 0x08 "DFBIDX3,Destination FIFO BIDX Register 3" hexmask.long.word 0x08 16.--31. 1. "DBIDX,A-Index offset between source arrays for the destination FIFO register set" hexmask.long.word 0x08 0.--15. 1. "SBIDX,B-Index offset between source arrays for the destination FIFO register set" line.long 0x0C "DFMPPRXY3,Destination FIFO Memory Protection Proxy Register 3" bitfld.long 0x0C 8. "PRIV,Privilege level" "User,Supervisor" bitfld.long 0x0C 0.--3. "PRIVID,Privilege ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end tree "EDMA3TC1" base ad:0x49900000 rgroup.long 0x00++0x07 line.long 0x00 "PID,Peripheral Identification Register" hexmask.long.word 0x00 0.--15. 1. "PID,Peripheral identifier" line.long 0x04 "TCCFG,EDMA3TC Configuration Register" bitfld.long 0x04 8.--9. "DREGDEPTH,Destination register FIFO depth parameterization" ",,4 entry,?..." bitfld.long 0x04 4.--5. "BUSWIDTH,Bus width parameterization" ",,128 bit,?..." bitfld.long 0x04 0.--2. "FIFOSIZE,FIFO size" ",,,,512 FIFO,?..." group.long 0x10++0x03 line.long 0x00 "SYSCONFIG,EDMA3TC System Configuration Register" bitfld.long 0x00 4.--5. "STANDBYMODE,Configuration of the local initiator state management mode" "Force-standby,No-standby,Smart-standby,?..." bitfld.long 0x00 2.--3. "IDLEMODE,Configuration of the local target state management mode" "Force-idle,No-idle,Smart-idle,?..." rgroup.long 0x100++0x03 line.long 0x00 "TCSTAT,EDMA3TC Channel Status Register" bitfld.long 0x00 12.--13. "DFSTRTPTR,Destination FIFO start pointer" "0,1,2,3" bitfld.long 0x00 4.--6. "DSTACTV,Destination active state" "Empty,1 TR,2 TRs,2 TRs,3 TRs,4 TRs,?..." bitfld.long 0x00 2. "WSACTV,Write status active" "Not pending,Pending" newline bitfld.long 0x00 1. "SRCACTV,Source active state" "Idle,Busy" bitfld.long 0x00 0. "PROGBUSY,Program register set busy" "Idle,Busy" group.long 0x120++0x03 line.long 0x00 "ERRSTAT_SET/CLR,Error Register" setclrfld.long 0x00 3. 0x04 3. 0x08 3. "MMRAERR,MMR address error" "No error,Error" setclrfld.long 0x00 2. 0x04 2. 0x08 2. "TRERR,Transfer request (Tr) error event" "No error,Error" setclrfld.long 0x00 0. 0x04 0. 0x08 0. "BUSERR,Bus error event" "No error,Error" group.long 0x12C++0x03 line.long 0x00 "ERRDET,Error Details Register" bitfld.long 0x00 17. "TCCHEN,Transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 16. "TCINTEN,Transfer complete interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8.--13. "TCC,Transfer complete code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 0.--3. "STAT,Transaction status" "No error,Read error,Read error,Read error,Read error,Read error,Read error,Read error,Write error,Write error,Write error,Write error,Write error,Write error,Write error,Write error" wgroup.long 0x130++0x03 line.long 0x00 "ERRCMD,Error Interrupt Command Register" bitfld.long 0x00 0. "EVAL,Error evaluate" "No effect,Set" group.long 0x140++0x03 line.long 0x00 "RDRATE,Read Rate Register" bitfld.long 0x00 0.--2. "RDRATE,Read rate controls the number of cycles between read commands" "Fastest,4 cycles,8 cycles,16 cycles,32 cycled,?..." rgroup.long 0x240++0x0B line.long 0x00 "SAOPT,Source Active Options Register" bitfld.long 0x00 22. "TCCHEN,Transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. "TCINTEN,Transfer complete interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12.--17. "TCC,Transfer complete code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 4.--6. "PRI,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. "DAM,Destination address mode within an array" "Increment,Constant" newline bitfld.long 0x00 0. "SAM,Source address mode within an array" "Increment,Constant" line.long 0x04 "SASRC,Source Active Source Address Register" line.long 0x08 "SACNT,Source Active Count Register" hexmask.long.word 0x08 16.--31. 1. "BCNT,B dimension count remaining for the source active register set" hexmask.long.word 0x08 0.--15. 1. "ACNT,A dimension count remaining for the source active register set" hgroup.long 0x24C++0x03 hide.long 0x00 "SADST,Source Active Destination Address Register" rgroup.long 0x250++0x0F line.long 0x00 "SABIDX,Source Active Source B-Index Register" hexmask.long.word 0x00 16.--31. 1. "DBIDX,B-Index offset between destination arrays" hexmask.long.word 0x00 0.--15. 1. "SBIDX,B-Index offset between source arrays" line.long 0x04 "SABIDX,Source Active Source B-Index Register" bitfld.long 0x04 8. "PRIV,Privilege level" "User,Supervisor" bitfld.long 0x04 0.--3. "PRIVID,Privilege ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "SACNTRLD,Source Active Count Reload Register" hexmask.long.word 0x08 0.--15. 1. "ACNTRLD,A-count reload value" line.long 0x0C "SASRCBREF,Source Active Source Address B-Reference Register" hgroup.long 0x250++0x03 hide.long 0x00 "SADSTBREF,Source Active Destination Address B-Reference Register" rgroup.long 0x280++0x03 line.long 0x00 "DFCNTRLD,Destination FIFO Set Count Reload" hexmask.long.word 0x00 0.--15. 1. "ACNTRLD,A-count reload value for the destination FIFO register set" hgroup.long 0x284++0x03 hide.long 0x00 "DFSRCBREF,Destination FIFO Set Destination Address B Reference Register" hide.long 0x04 "DFDSTBREF,Destination FIFO Set Destination Address B Reference Register" rgroup.long 0x300++0x03 line.long 0x00 "DFOPT0,Destination FIFO Options Register 0" bitfld.long 0x00 22. "TCCHEN,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. "TCINTEN,Transfer complete interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12.--17. "TCC,Transfer complete code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 4.--6. "PRI,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" newline bitfld.long 0x00 1. "DAM,Destination address mode within an array" "Increment,Constant" bitfld.long 0x00 0. "SAM,Source address mode within an array" "Increment,Constant" hgroup.long (0x300+0x04)++0x03 hide.long 0x04 "DFSRC0,Destination FIFO Source Address Register 0" rgroup.long (0x300+0x08)++0x0F line.long 0x00 "DFCNT0,Destination FIFO Count Register 0" hexmask.long.word 0x00 16.--31. 1. "BCNT,B-dimension count remaining for destination register set" hexmask.long.word 0x00 0.--15. 1. "ACNT,A-dimension count remaining for destination register set" line.long 0x04 "DFDST0,Destination FIFO Destination Address Register 0" line.long 0x08 "DFBIDX0,Destination FIFO BIDX Register 0" hexmask.long.word 0x08 16.--31. 1. "DBIDX,A-Index offset between source arrays for the destination FIFO register set" hexmask.long.word 0x08 0.--15. 1. "SBIDX,B-Index offset between source arrays for the destination FIFO register set" line.long 0x0C "DFMPPRXY0,Destination FIFO Memory Protection Proxy Register 0" bitfld.long 0x0C 8. "PRIV,Privilege level" "User,Supervisor" bitfld.long 0x0C 0.--3. "PRIVID,Privilege ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x340++0x03 line.long 0x00 "DFOPT1,Destination FIFO Options Register 1" bitfld.long 0x00 22. "TCCHEN,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. "TCINTEN,Transfer complete interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12.--17. "TCC,Transfer complete code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 4.--6. "PRI,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" newline bitfld.long 0x00 1. "DAM,Destination address mode within an array" "Increment,Constant" bitfld.long 0x00 0. "SAM,Source address mode within an array" "Increment,Constant" hgroup.long (0x340+0x04)++0x03 hide.long 0x04 "DFSRC1,Destination FIFO Source Address Register 1" rgroup.long (0x340+0x08)++0x0F line.long 0x00 "DFCNT1,Destination FIFO Count Register 1" hexmask.long.word 0x00 16.--31. 1. "BCNT,B-dimension count remaining for destination register set" hexmask.long.word 0x00 0.--15. 1. "ACNT,A-dimension count remaining for destination register set" line.long 0x04 "DFDST1,Destination FIFO Destination Address Register 1" line.long 0x08 "DFBIDX1,Destination FIFO BIDX Register 1" hexmask.long.word 0x08 16.--31. 1. "DBIDX,A-Index offset between source arrays for the destination FIFO register set" hexmask.long.word 0x08 0.--15. 1. "SBIDX,B-Index offset between source arrays for the destination FIFO register set" line.long 0x0C "DFMPPRXY1,Destination FIFO Memory Protection Proxy Register 1" bitfld.long 0x0C 8. "PRIV,Privilege level" "User,Supervisor" bitfld.long 0x0C 0.--3. "PRIVID,Privilege ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x380++0x03 line.long 0x00 "DFOPT2,Destination FIFO Options Register 2" bitfld.long 0x00 22. "TCCHEN,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. "TCINTEN,Transfer complete interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12.--17. "TCC,Transfer complete code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 4.--6. "PRI,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" newline bitfld.long 0x00 1. "DAM,Destination address mode within an array" "Increment,Constant" bitfld.long 0x00 0. "SAM,Source address mode within an array" "Increment,Constant" hgroup.long (0x380+0x04)++0x03 hide.long 0x04 "DFSRC2,Destination FIFO Source Address Register 2" rgroup.long (0x380+0x08)++0x0F line.long 0x00 "DFCNT2,Destination FIFO Count Register 2" hexmask.long.word 0x00 16.--31. 1. "BCNT,B-dimension count remaining for destination register set" hexmask.long.word 0x00 0.--15. 1. "ACNT,A-dimension count remaining for destination register set" line.long 0x04 "DFDST2,Destination FIFO Destination Address Register 2" line.long 0x08 "DFBIDX2,Destination FIFO BIDX Register 2" hexmask.long.word 0x08 16.--31. 1. "DBIDX,A-Index offset between source arrays for the destination FIFO register set" hexmask.long.word 0x08 0.--15. 1. "SBIDX,B-Index offset between source arrays for the destination FIFO register set" line.long 0x0C "DFMPPRXY2,Destination FIFO Memory Protection Proxy Register 2" bitfld.long 0x0C 8. "PRIV,Privilege level" "User,Supervisor" bitfld.long 0x0C 0.--3. "PRIVID,Privilege ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x3C0++0x03 line.long 0x00 "DFOPT3,Destination FIFO Options Register 3" bitfld.long 0x00 22. "TCCHEN,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. "TCINTEN,Transfer complete interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12.--17. "TCC,Transfer complete code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 4.--6. "PRI,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" newline bitfld.long 0x00 1. "DAM,Destination address mode within an array" "Increment,Constant" bitfld.long 0x00 0. "SAM,Source address mode within an array" "Increment,Constant" hgroup.long (0x3C0+0x04)++0x03 hide.long 0x04 "DFSRC3,Destination FIFO Source Address Register 3" rgroup.long (0x3C0+0x08)++0x0F line.long 0x00 "DFCNT3,Destination FIFO Count Register 3" hexmask.long.word 0x00 16.--31. 1. "BCNT,B-dimension count remaining for destination register set" hexmask.long.word 0x00 0.--15. 1. "ACNT,A-dimension count remaining for destination register set" line.long 0x04 "DFDST3,Destination FIFO Destination Address Register 3" line.long 0x08 "DFBIDX3,Destination FIFO BIDX Register 3" hexmask.long.word 0x08 16.--31. 1. "DBIDX,A-Index offset between source arrays for the destination FIFO register set" hexmask.long.word 0x08 0.--15. 1. "SBIDX,B-Index offset between source arrays for the destination FIFO register set" line.long 0x0C "DFMPPRXY3,Destination FIFO Memory Protection Proxy Register 3" bitfld.long 0x0C 8. "PRIV,Privilege level" "User,Supervisor" bitfld.long 0x0C 0.--3. "PRIVID,Privilege ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end tree "EDMA3TC2" base ad:0x49A00000 rgroup.long 0x00++0x07 line.long 0x00 "PID,Peripheral Identification Register" hexmask.long.word 0x00 0.--15. 1. "PID,Peripheral identifier" line.long 0x04 "TCCFG,EDMA3TC Configuration Register" bitfld.long 0x04 8.--9. "DREGDEPTH,Destination register FIFO depth parameterization" ",,4 entry,?..." bitfld.long 0x04 4.--5. "BUSWIDTH,Bus width parameterization" ",,128 bit,?..." bitfld.long 0x04 0.--2. "FIFOSIZE,FIFO size" ",,,,512 FIFO,?..." group.long 0x10++0x03 line.long 0x00 "SYSCONFIG,EDMA3TC System Configuration Register" bitfld.long 0x00 4.--5. "STANDBYMODE,Configuration of the local initiator state management mode" "Force-standby,No-standby,Smart-standby,?..." bitfld.long 0x00 2.--3. "IDLEMODE,Configuration of the local target state management mode" "Force-idle,No-idle,Smart-idle,?..." rgroup.long 0x100++0x03 line.long 0x00 "TCSTAT,EDMA3TC Channel Status Register" bitfld.long 0x00 12.--13. "DFSTRTPTR,Destination FIFO start pointer" "0,1,2,3" bitfld.long 0x00 4.--6. "DSTACTV,Destination active state" "Empty,1 TR,2 TRs,2 TRs,3 TRs,4 TRs,?..." bitfld.long 0x00 2. "WSACTV,Write status active" "Not pending,Pending" newline bitfld.long 0x00 1. "SRCACTV,Source active state" "Idle,Busy" bitfld.long 0x00 0. "PROGBUSY,Program register set busy" "Idle,Busy" group.long 0x120++0x03 line.long 0x00 "ERRSTAT_SET/CLR,Error Register" setclrfld.long 0x00 3. 0x04 3. 0x08 3. "MMRAERR,MMR address error" "No error,Error" setclrfld.long 0x00 2. 0x04 2. 0x08 2. "TRERR,Transfer request (Tr) error event" "No error,Error" setclrfld.long 0x00 0. 0x04 0. 0x08 0. "BUSERR,Bus error event" "No error,Error" group.long 0x12C++0x03 line.long 0x00 "ERRDET,Error Details Register" bitfld.long 0x00 17. "TCCHEN,Transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 16. "TCINTEN,Transfer complete interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8.--13. "TCC,Transfer complete code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 0.--3. "STAT,Transaction status" "No error,Read error,Read error,Read error,Read error,Read error,Read error,Read error,Write error,Write error,Write error,Write error,Write error,Write error,Write error,Write error" wgroup.long 0x130++0x03 line.long 0x00 "ERRCMD,Error Interrupt Command Register" bitfld.long 0x00 0. "EVAL,Error evaluate" "No effect,Set" group.long 0x140++0x03 line.long 0x00 "RDRATE,Read Rate Register" bitfld.long 0x00 0.--2. "RDRATE,Read rate controls the number of cycles between read commands" "Fastest,4 cycles,8 cycles,16 cycles,32 cycled,?..." rgroup.long 0x240++0x0B line.long 0x00 "SAOPT,Source Active Options Register" bitfld.long 0x00 22. "TCCHEN,Transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. "TCINTEN,Transfer complete interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12.--17. "TCC,Transfer complete code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 4.--6. "PRI,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. "DAM,Destination address mode within an array" "Increment,Constant" newline bitfld.long 0x00 0. "SAM,Source address mode within an array" "Increment,Constant" line.long 0x04 "SASRC,Source Active Source Address Register" line.long 0x08 "SACNT,Source Active Count Register" hexmask.long.word 0x08 16.--31. 1. "BCNT,B dimension count remaining for the source active register set" hexmask.long.word 0x08 0.--15. 1. "ACNT,A dimension count remaining for the source active register set" hgroup.long 0x24C++0x03 hide.long 0x00 "SADST,Source Active Destination Address Register" rgroup.long 0x250++0x0F line.long 0x00 "SABIDX,Source Active Source B-Index Register" hexmask.long.word 0x00 16.--31. 1. "DBIDX,B-Index offset between destination arrays" hexmask.long.word 0x00 0.--15. 1. "SBIDX,B-Index offset between source arrays" line.long 0x04 "SABIDX,Source Active Source B-Index Register" bitfld.long 0x04 8. "PRIV,Privilege level" "User,Supervisor" bitfld.long 0x04 0.--3. "PRIVID,Privilege ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "SACNTRLD,Source Active Count Reload Register" hexmask.long.word 0x08 0.--15. 1. "ACNTRLD,A-count reload value" line.long 0x0C "SASRCBREF,Source Active Source Address B-Reference Register" hgroup.long 0x250++0x03 hide.long 0x00 "SADSTBREF,Source Active Destination Address B-Reference Register" rgroup.long 0x280++0x03 line.long 0x00 "DFCNTRLD,Destination FIFO Set Count Reload" hexmask.long.word 0x00 0.--15. 1. "ACNTRLD,A-count reload value for the destination FIFO register set" hgroup.long 0x284++0x03 hide.long 0x00 "DFSRCBREF,Destination FIFO Set Destination Address B Reference Register" hide.long 0x04 "DFDSTBREF,Destination FIFO Set Destination Address B Reference Register" rgroup.long 0x300++0x03 line.long 0x00 "DFOPT0,Destination FIFO Options Register 0" bitfld.long 0x00 22. "TCCHEN,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. "TCINTEN,Transfer complete interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12.--17. "TCC,Transfer complete code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 4.--6. "PRI,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" newline bitfld.long 0x00 1. "DAM,Destination address mode within an array" "Increment,Constant" bitfld.long 0x00 0. "SAM,Source address mode within an array" "Increment,Constant" hgroup.long (0x300+0x04)++0x03 hide.long 0x04 "DFSRC0,Destination FIFO Source Address Register 0" rgroup.long (0x300+0x08)++0x0F line.long 0x00 "DFCNT0,Destination FIFO Count Register 0" hexmask.long.word 0x00 16.--31. 1. "BCNT,B-dimension count remaining for destination register set" hexmask.long.word 0x00 0.--15. 1. "ACNT,A-dimension count remaining for destination register set" line.long 0x04 "DFDST0,Destination FIFO Destination Address Register 0" line.long 0x08 "DFBIDX0,Destination FIFO BIDX Register 0" hexmask.long.word 0x08 16.--31. 1. "DBIDX,A-Index offset between source arrays for the destination FIFO register set" hexmask.long.word 0x08 0.--15. 1. "SBIDX,B-Index offset between source arrays for the destination FIFO register set" line.long 0x0C "DFMPPRXY0,Destination FIFO Memory Protection Proxy Register 0" bitfld.long 0x0C 8. "PRIV,Privilege level" "User,Supervisor" bitfld.long 0x0C 0.--3. "PRIVID,Privilege ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x340++0x03 line.long 0x00 "DFOPT1,Destination FIFO Options Register 1" bitfld.long 0x00 22. "TCCHEN,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. "TCINTEN,Transfer complete interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12.--17. "TCC,Transfer complete code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 4.--6. "PRI,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" newline bitfld.long 0x00 1. "DAM,Destination address mode within an array" "Increment,Constant" bitfld.long 0x00 0. "SAM,Source address mode within an array" "Increment,Constant" hgroup.long (0x340+0x04)++0x03 hide.long 0x04 "DFSRC1,Destination FIFO Source Address Register 1" rgroup.long (0x340+0x08)++0x0F line.long 0x00 "DFCNT1,Destination FIFO Count Register 1" hexmask.long.word 0x00 16.--31. 1. "BCNT,B-dimension count remaining for destination register set" hexmask.long.word 0x00 0.--15. 1. "ACNT,A-dimension count remaining for destination register set" line.long 0x04 "DFDST1,Destination FIFO Destination Address Register 1" line.long 0x08 "DFBIDX1,Destination FIFO BIDX Register 1" hexmask.long.word 0x08 16.--31. 1. "DBIDX,A-Index offset between source arrays for the destination FIFO register set" hexmask.long.word 0x08 0.--15. 1. "SBIDX,B-Index offset between source arrays for the destination FIFO register set" line.long 0x0C "DFMPPRXY1,Destination FIFO Memory Protection Proxy Register 1" bitfld.long 0x0C 8. "PRIV,Privilege level" "User,Supervisor" bitfld.long 0x0C 0.--3. "PRIVID,Privilege ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x380++0x03 line.long 0x00 "DFOPT2,Destination FIFO Options Register 2" bitfld.long 0x00 22. "TCCHEN,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. "TCINTEN,Transfer complete interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12.--17. "TCC,Transfer complete code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 4.--6. "PRI,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" newline bitfld.long 0x00 1. "DAM,Destination address mode within an array" "Increment,Constant" bitfld.long 0x00 0. "SAM,Source address mode within an array" "Increment,Constant" hgroup.long (0x380+0x04)++0x03 hide.long 0x04 "DFSRC2,Destination FIFO Source Address Register 2" rgroup.long (0x380+0x08)++0x0F line.long 0x00 "DFCNT2,Destination FIFO Count Register 2" hexmask.long.word 0x00 16.--31. 1. "BCNT,B-dimension count remaining for destination register set" hexmask.long.word 0x00 0.--15. 1. "ACNT,A-dimension count remaining for destination register set" line.long 0x04 "DFDST2,Destination FIFO Destination Address Register 2" line.long 0x08 "DFBIDX2,Destination FIFO BIDX Register 2" hexmask.long.word 0x08 16.--31. 1. "DBIDX,A-Index offset between source arrays for the destination FIFO register set" hexmask.long.word 0x08 0.--15. 1. "SBIDX,B-Index offset between source arrays for the destination FIFO register set" line.long 0x0C "DFMPPRXY2,Destination FIFO Memory Protection Proxy Register 2" bitfld.long 0x0C 8. "PRIV,Privilege level" "User,Supervisor" bitfld.long 0x0C 0.--3. "PRIVID,Privilege ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x3C0++0x03 line.long 0x00 "DFOPT3,Destination FIFO Options Register 3" bitfld.long 0x00 22. "TCCHEN,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. "TCINTEN,Transfer complete interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12.--17. "TCC,Transfer complete code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 8.--10. "FWID,FIFO width" "8 bit,16 bit,32 bit,64 bit,128 bit,256 bit,?..." bitfld.long 0x00 4.--6. "PRI,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" newline bitfld.long 0x00 1. "DAM,Destination address mode within an array" "Increment,Constant" bitfld.long 0x00 0. "SAM,Source address mode within an array" "Increment,Constant" hgroup.long (0x3C0+0x04)++0x03 hide.long 0x04 "DFSRC3,Destination FIFO Source Address Register 3" rgroup.long (0x3C0+0x08)++0x0F line.long 0x00 "DFCNT3,Destination FIFO Count Register 3" hexmask.long.word 0x00 16.--31. 1. "BCNT,B-dimension count remaining for destination register set" hexmask.long.word 0x00 0.--15. 1. "ACNT,A-dimension count remaining for destination register set" line.long 0x04 "DFDST3,Destination FIFO Destination Address Register 3" line.long 0x08 "DFBIDX3,Destination FIFO BIDX Register 3" hexmask.long.word 0x08 16.--31. 1. "DBIDX,A-Index offset between source arrays for the destination FIFO register set" hexmask.long.word 0x08 0.--15. 1. "SBIDX,B-Index offset between source arrays for the destination FIFO register set" line.long 0x0C "DFMPPRXY3,Destination FIFO Memory Protection Proxy Register 3" bitfld.long 0x0C 8. "PRIV,Privilege level" "User,Supervisor" bitfld.long 0x0C 0.--3. "PRIVID,Privilege ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end tree.end tree.end tree "TSC (Touchscreen Controller)" base ad:0x44E0D000 rgroup.long 0x00++0x03 line.long 0x00 "REVISION,Revision Register" bitfld.long 0x00 30.--31. "SCHEME,HL 0.8 scheme" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "FUNC,Functional number" newline bitfld.long 0x00 11.--15. "R_RTL,RTL revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. "X_MAJOR,Major revision" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. "CUSTOM,Custom revision" "0,1,2,3" bitfld.long 0x00 0.--5. "Y_MINOR,Minor revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x10++0x03 line.long 0x00 "SYSCONFIG,Sysconfig Register" bitfld.long 0x00 2.--3. "IDLEMODE,Idlemode" "Force-idle,No idle,Smart-idle,Smart-Idle with wakeup" group.long 0x24++0x0B line.long 0x00 "IRQSTATUS_RAW,IRQ Status (Unmasked) (Read/Write)" bitfld.long 0x00 10. "PEN_IRQ_SYNCHRONIZED,PEN IRQ synchronized" "Not pending/No effect,Pending/Set event" bitfld.long 0x00 9. "PEN_UP_EVENT,Pen up event" "Not pending/No effect,Pending/Set event" newline bitfld.long 0x00 8. "OUT_OF_RANGE,Out of range" "Not pending/No effect,Pending/Set event" bitfld.long 0x00 7. "FIFO1_UNDERFLOW,FIFO1 underflow" "Not pending/No effect,Pending/Set event" newline bitfld.long 0x00 6. "FIFO1_OVERRUN,FIFO1 overrun" "Not pending/No effect,Pending/Set event" bitfld.long 0x00 5. "FIFO1_THRESHOLD,FIFO1 threshold" "Not pending/No effect,Pending/Set event" newline bitfld.long 0x00 4. "FIFO0_UNDERFLOW,FIFO0 underflow" "Not pending/No effect,Pending/Set event" bitfld.long 0x00 3. "FIFO0_OVERRUN,FIFO0 overrun" "Not pending/No effect,Pending/Set event" newline bitfld.long 0x00 2. "FIFO0_THRESHOLD,FIFO0 threshold" "Not pending/No effect,Pending/Set event" bitfld.long 0x00 1. "END_OF_SEQUENCE,End od sequence" "Not pending/No effect,Pending/Set event" newline bitfld.long 0x00 0. "HW_PEN_EVENT_ASYNCHRONOUS,HW pen event asynchronous" "Not pending/No effect,Pending/Set event" line.long 0x04 "IRQSTATUS,IRQ Status (Masked)" bitfld.long 0x04 10. "HW_PEN_EVENT_SYNCHRONOUS,Hardware Pending Event Synchronous" "Not pending/No effect,Pending/Clear" bitfld.long 0x04 9. "PEN_UP_EVENT,Pen up event" "Not pending/No effect,Pending/Clear" newline bitfld.long 0x04 8. "OUT_OF_RANGE,Out of range" "Not pending/No effect,Pending/Clear" bitfld.long 0x04 7. "FIFO1_UNDERFLOW,FIFO1 underflow" "Not pending/No effect,Pending/Clear" newline bitfld.long 0x04 6. "FIFO1_OVERRUN,FIFO1 overrun" "Not pending/No effect,Pending/Clear" bitfld.long 0x04 5. "FIFO1_THRESHOLD,FIFO1 threshold" "Not pending/No effect,Pending/Clear" newline bitfld.long 0x04 4. "FIFO0_UNDERFLOW,FIFO0 underflow" "Not pending/No effect,Pending/Clear" bitfld.long 0x04 3. "FIFO0_OVERRUN,FIFO0 overrun" "Not pending/No effect,Pending/Clear" newline bitfld.long 0x04 2. "FIFO0_THRESHOLD,FIFO0 threshold" "Not pending/No effect,Pending/Clear" bitfld.long 0x04 1. "END_OF_SEQUENCE,End od sequence" "Not pending/No effect,Pending/Clear" newline bitfld.long 0x04 0. "HW_PEN_EVENT_ASYNCHRONOUS,HW pen event asynchronous" "Not pending,Pending" line.long 0x08 "IRQENABLE_SET/CLR,IRQ Enable Set Bits" setclrfld.long 0x08 10. 0x08 10. 0x0C 10. "PEN_IRQ_SYNCHRONIZED,PEN IRQ synchronized" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x0C 9. "PEN_UP_EVENT,Pen up event" "Disabled,Enabled" newline setclrfld.long 0x08 8. 0x08 8. 0x0C 8. "OUT_OF_RANGE,Out of range" "Disabled,Enabled" setclrfld.long 0x08 7. 0x08 7. 0x0C 7. "FIFO1_UNDERFLOW,FIFO1 underflow" "Disabled,Enabled" newline setclrfld.long 0x08 6. 0x08 6. 0x0C 6. "FIFO1_OVERRUN,FIFO1 overrun" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x0C 5. "FIFO1_THRESHOLD,FIFO1 threshold" "Disabled,Enabled" newline setclrfld.long 0x08 4. 0x08 4. 0x0C 4. "FIFO0_UNDERFLOW,FIFO0 underflow" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x0C 3. "FIFO0_OVERRUN,FIFO0 overrun" "Disabled,Enabled" newline setclrfld.long 0x08 2. 0x08 2. 0x0C 2. "FIFO0_THRESHOLD,FIFO0 threshold" "Disabled,Enabled" setclrfld.long 0x08 1. 0x08 1. 0x0C 1. "END_OF_SEQUENCE,End od sequence" "Disabled,Enabled" newline setclrfld.long 0x08 0. 0x08 0. 0x0C 0. "HW_PEN_EVENT_ASYNCHRONOUS,HW pen event asynchronous" "Disabled,Enabled" group.long 0x34++0x07 line.long 0x00 "IRQWAKEUP,IRQ Wakeup Enable" bitfld.long 0x00 0. "WAKEEN0,Wakeup generation for HW pen event" "Disabled,Enabled" line.long 0x04 "DMAENABLE_SET/CLR,Per-Line DMA Set" setclrfld.long 0x04 1. 0x04 1. 0x08 1. "ENABLE_1,Enable DMA request FIFO 1" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x08 0. "ENABLE_0,Enable DMA request FIFO 0" "Disabled,Enabled" group.long 0x40++0x03 line.long 0x00 "CTRL,TSC_ADC_SS Control Register" bitfld.long 0x00 9. "HW_PREEMPT,Pre-empted by HW events" "Disabled,Enabled" bitfld.long 0x00 8. "HW_EVENT_MAPPING,Map HW event mapping" "Pen touch irq,HW event input" newline bitfld.long 0x00 7. "TOUCH_SCREEN_ENABLE,Touchscreen transistors enable" "Disabled,Enabled" bitfld.long 0x00 5.--6. "AFE_PEN_CTRL,AFE pen ctrl" "0,1,2,3" newline bitfld.long 0x00 4. "POWER_DOWN,ADC power down control" "Power up,Power down" bitfld.long 0x00 3. "ADC_BIAS_SELECT,Select bias to AFE" "Internal,?..." newline bitfld.long 0x00 2. "STEPCONFIG_WRITEPROTECT_N_ACTIVE_LOW,Step configuration registers protection disable" "No,Yes" bitfld.long 0x00 1. "STEP_ID_TAG,Store the step ID number with the captured ADC data in the FIFO" "Write zeros,Store channel ID tag" newline bitfld.long 0x00 0. "ENABLE,TSC_ADC_SS module enable bit" "Disabled,Enabled" rgroup.long 0x44++0x03 line.long 0x00 "ADCSTAT,General Status Bits Tsc_adc_ss_sequencer_status Register" bitfld.long 0x00 7. "PEN_IRQ1,PEN_IRQ[1] status" "0,1" bitfld.long 0x00 6. "PEN_IRQ0,PEN_IRQ[0] status" "0,1" newline bitfld.long 0x00 5. "FSM_BUSY,Status of OCP FSM and ADC FSM" "Idle,Busy" bitfld.long 0x00 0.--4. "FSM_BUSY,Encoded values" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,Idle,Charge,?..." group.long 0x48++0x1B line.long 0x00 "ADCRANGE,High And Low Range Threshold Tsc_adc_ss_range_check Register" hexmask.long.word 0x00 16.--27. 1. "HIGH_RANGE_DATA,Sampled ADC data is compared to this value" hexmask.long.word 0x00 0.--11. 1. "LOW_RANGE_DATA,Sampled ADC data is compared to this value" line.long 0x04 "ADC_CLKDIV,ADC Clock Divider Registe Tsc_adc_ss_clock_divider Register" hexmask.long.word 0x04 0.--15. 1. "ADC_CLKDIV,The input ADC clock will be divided by this value and sent to the AFE" line.long 0x08 "ADC_MISC,AFE Misc Debug TSC_ADC_SS_MISC Register" rbitfld.long 0x08 4.--7. "AFE_SPARE_OUTPUT,Connected to AFE spare output pins" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. "AFE_SPARE_INPUT,Connected to AFE spare input pins" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "STEPENABLE,Step Enable" bitfld.long 0x0C 16. "STEP16,Enable step 16" "Disabled,Enabled" bitfld.long 0x0C 15. "STEP16,Enable step 15" "Disabled,Enabled" newline bitfld.long 0x0C 14. "STEP16,Enable step 14" "Disabled,Enabled" bitfld.long 0x0C 13. "STEP16,Enable step 13" "Disabled,Enabled" newline bitfld.long 0x0C 12. "STEP16,Enable step 12" "Disabled,Enabled" bitfld.long 0x0C 11. "STEP16,Enable step 11" "Disabled,Enabled" newline bitfld.long 0x0C 10. "STEP16,Enable step 10" "Disabled,Enabled" bitfld.long 0x0C 9. "STEP16,Enable step 9" "Disabled,Enabled" newline bitfld.long 0x0C 8. "STEP16,Enable step 8" "Disabled,Enabled" bitfld.long 0x0C 7. "STEP16,Enable step 7" "Disabled,Enabled" newline bitfld.long 0x0C 6. "STEP16,Enable step 6" "Disabled,Enabled" bitfld.long 0x0C 5. "STEP16,Enable step 5" "Disabled,Enabled" newline bitfld.long 0x0C 4. "STEP16,Enable step 4" "Disabled,Enabled" bitfld.long 0x0C 3. "STEP16,Enable step 3" "Disabled,Enabled" newline bitfld.long 0x0C 2. "STEP16,Enable step 2" "Disabled,Enabled" bitfld.long 0x0C 1. "STEP16,Enable step 1" "Disabled,Enabled" newline bitfld.long 0x0C 0. "TS_CHARGE,Enable TS charge step" "Disabled,Enabled" line.long 0x10 "IDLECONFIG,Idle Step Configuration Tsc_adc_ss_idle_stepconfig Register" bitfld.long 0x10 25. "DIFF_CNTRL,Differential Control Pin" "Single ended,Differential pair" bitfld.long 0x10 23.--24. "SEL_RFM_SWC_1_0,SEL_RFM pins SW configuration" "VSSA_ADC,XNUR,YNLR,VREFN" newline bitfld.long 0x10 19.--22. "SEL_INP_SWC_3_0,SEL_INP pins SW configuration" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" bitfld.long 0x10 15.--18. "SEL_INM_SWM_3_0,SEL_INM pins for neg differential" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" newline bitfld.long 0x10 12.--14. "SEL_RFP_SWC_2_0,SEL_RFP pins SW configuration" "VDDA_ADC,XPUL,YPLL,VREFP,?..." bitfld.long 0x10 11. "WPNSW_SWC,WPNSW pin SW configuration" "Low,High" newline bitfld.long 0x10 10. "YPNSW_SWC,YPNSW pin SW configuration" "Low,High" bitfld.long 0x10 9. "XNPSW_SWC,XNPSW pin SW configuration" "Low,High" newline bitfld.long 0x10 8. "YNNSW_SWC,YNNSW pin SW configuration" "Low,High" bitfld.long 0x10 7. "YPPSW__SWC,YPPSW pin SW configuration" "Low,High" newline bitfld.long 0x10 6. "XNNSW__SWC,XNNSW pin SW configuration" "Low,High" bitfld.long 0x10 5. "XPPSW_SWC,XPPSW pin SW configuration" "Low,High" line.long 0x14 "TS_CHARGE_STEPCONFIG,TS Charge Stepconfiguration Tsc_adc_ss_ts_charge_stepconfig Register" bitfld.long 0x14 25. "DIFF_CNTRL,Differential Control Pin" "Single ended,Differential pair" bitfld.long 0x14 23.--24. "SEL_RFM_SWC_1_0,SEL_RFM pins SW configuration" "VSSA_ADC,XNUR,YNLR,VREFN" newline bitfld.long 0x14 19.--22. "SEL_INP_SWC_3_0,SEL_INP pins SW configuration" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" bitfld.long 0x14 15.--18. "SEL_INM_SWM_3_0,SEL_INM pins for neg differential" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" newline bitfld.long 0x14 12.--14. "SEL_RFP_SWC_2_0,SEL_RFP pins SW configuration" "VDDA_ADC,XPUL,YPLL,VREFP,?..." bitfld.long 0x14 11. "WPNSW_SWC,WPNSW pin SW configuration" "Low,High" newline bitfld.long 0x14 10. "YPNSW_SWC,YPNSW pin SW configuration" "Low,High" bitfld.long 0x14 9. "XNPSW_SWC,XNPSW pin SW configuration" "Low,High" newline bitfld.long 0x14 8. "YNNSW_SWC,YNNSW pin SW configuration" "Low,High" bitfld.long 0x14 7. "YPPSW__SWC,YPPSW pin SW configuration" "Low,High" newline bitfld.long 0x14 6. "XNNSW__SWC,XNNSW pin SW configuration" "Low,High" bitfld.long 0x14 5. "XPPSW_SWC,XPPSW pin SW configuration" "Low,High" line.long 0x18 "TS_CHARGE_DELAY,TS Charge Delay Register Tsc_adc_ss_ts_charge_stepdelay Register" hexmask.long.tbyte 0x18 0.--17. 1. "OPENDELAY,Opendelay" group.long 0x64++0x07 line.long 0x00 "STEPCONFIG1,Step Configuration 1" bitfld.long 0x00 27. "RANGE_CHECK,Range check enable" "Disabled,Enabled" bitfld.long 0x00 26. "FIFO_SELECT,Sampled data will be stored in FIFO" "FIFO,FIFO 1" newline bitfld.long 0x00 25. "DIFF_CNTRL,Differential Control Pin" "Single ended,Differential pair" bitfld.long 0x00 23.--24. "SEL_RFM_SWC_1_0,SEL_RFM pins SW configuration" "VSSA_ADC,XNUR,YNLR,VREFN" newline bitfld.long 0x00 19.--22. "SEL_INP_SWC_3_0,SEL_INP pins SW configuration" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" bitfld.long 0x00 15.--18. "SEL_INM_SWM_3_0,SEL_INM pins for neg differential" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" newline bitfld.long 0x00 12.--14. "SEL_RFP_SWC_2_0,SEL_RFP pins SW configuration" "VDDA_ADC,XPUL,YPLL,VREFP,?..." bitfld.long 0x00 11. "WPNSW_SWC,WPNSW pin SW configuration" "Low,High" newline bitfld.long 0x00 10. "YPNSW_SWC,YPNSW pin SW configuration" "Low,High" bitfld.long 0x00 9. "XNPSW_SWC,XNPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 8. "YNNSW_SWC,YNNSW pin SW configuration" "Low,High" bitfld.long 0x00 7. "YPPSW__SWC,YPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 6. "XNNSW__SWC,XNNSW pin SW configuration" "Low,High" bitfld.long 0x00 5. "XPPSW_SWC,XPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 2.--4. "AVERAGING,Number of samplings to average" "No average,2,3,4,16,?..." bitfld.long 0x00 0.--1. "MODE,Mode" "SW enabled one-shot,SW enabled continuous,HW synchronized one-shot,HW synchronized continuous" line.long 0x04 "STEPDELAY1,Step Delay Register 1" hexmask.long.byte 0x04 24.--31. 1. "SAMPLEDELAY,Number of ADC clock cycles to sample" hexmask.long.tbyte 0x04 0.--17. 1. "OPENDELAY,Opendelay" group.long 0x6C++0x07 line.long 0x00 "STEPCONFIG2,Step Configuration 2" bitfld.long 0x00 27. "RANGE_CHECK,Range check enable" "Disabled,Enabled" bitfld.long 0x00 26. "FIFO_SELECT,Sampled data will be stored in FIFO" "FIFO,FIFO 1" newline bitfld.long 0x00 25. "DIFF_CNTRL,Differential Control Pin" "Single ended,Differential pair" bitfld.long 0x00 23.--24. "SEL_RFM_SWC_1_0,SEL_RFM pins SW configuration" "VSSA_ADC,XNUR,YNLR,VREFN" newline bitfld.long 0x00 19.--22. "SEL_INP_SWC_3_0,SEL_INP pins SW configuration" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" bitfld.long 0x00 15.--18. "SEL_INM_SWM_3_0,SEL_INM pins for neg differential" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" newline bitfld.long 0x00 12.--14. "SEL_RFP_SWC_2_0,SEL_RFP pins SW configuration" "VDDA_ADC,XPUL,YPLL,VREFP,?..." bitfld.long 0x00 11. "WPNSW_SWC,WPNSW pin SW configuration" "Low,High" newline bitfld.long 0x00 10. "YPNSW_SWC,YPNSW pin SW configuration" "Low,High" bitfld.long 0x00 9. "XNPSW_SWC,XNPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 8. "YNNSW_SWC,YNNSW pin SW configuration" "Low,High" bitfld.long 0x00 7. "YPPSW__SWC,YPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 6. "XNNSW__SWC,XNNSW pin SW configuration" "Low,High" bitfld.long 0x00 5. "XPPSW_SWC,XPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 2.--4. "AVERAGING,Number of samplings to average" "No average,2,3,4,16,?..." bitfld.long 0x00 0.--1. "MODE,Mode" "SW enabled one-shot,SW enabled continuous,HW synchronized one-shot,HW synchronized continuous" line.long 0x04 "STEPDELAY2,Step Delay Register 2" hexmask.long.byte 0x04 24.--31. 1. "SAMPLEDELAY,Number of ADC clock cycles to sample" hexmask.long.tbyte 0x04 0.--17. 1. "OPENDELAY,Opendelay" group.long 0x74++0x07 line.long 0x00 "STEPCONFIG3,Step Configuration 3" bitfld.long 0x00 27. "RANGE_CHECK,Range check enable" "Disabled,Enabled" bitfld.long 0x00 26. "FIFO_SELECT,Sampled data will be stored in FIFO" "FIFO,FIFO 1" newline bitfld.long 0x00 25. "DIFF_CNTRL,Differential Control Pin" "Single ended,Differential pair" bitfld.long 0x00 23.--24. "SEL_RFM_SWC_1_0,SEL_RFM pins SW configuration" "VSSA_ADC,XNUR,YNLR,VREFN" newline bitfld.long 0x00 19.--22. "SEL_INP_SWC_3_0,SEL_INP pins SW configuration" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" bitfld.long 0x00 15.--18. "SEL_INM_SWM_3_0,SEL_INM pins for neg differential" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" newline bitfld.long 0x00 12.--14. "SEL_RFP_SWC_2_0,SEL_RFP pins SW configuration" "VDDA_ADC,XPUL,YPLL,VREFP,?..." bitfld.long 0x00 11. "WPNSW_SWC,WPNSW pin SW configuration" "Low,High" newline bitfld.long 0x00 10. "YPNSW_SWC,YPNSW pin SW configuration" "Low,High" bitfld.long 0x00 9. "XNPSW_SWC,XNPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 8. "YNNSW_SWC,YNNSW pin SW configuration" "Low,High" bitfld.long 0x00 7. "YPPSW__SWC,YPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 6. "XNNSW__SWC,XNNSW pin SW configuration" "Low,High" bitfld.long 0x00 5. "XPPSW_SWC,XPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 2.--4. "AVERAGING,Number of samplings to average" "No average,2,3,4,16,?..." bitfld.long 0x00 0.--1. "MODE,Mode" "SW enabled one-shot,SW enabled continuous,HW synchronized one-shot,HW synchronized continuous" line.long 0x04 "STEPDELAY3,Step Delay Register 3" hexmask.long.byte 0x04 24.--31. 1. "SAMPLEDELAY,Number of ADC clock cycles to sample" hexmask.long.tbyte 0x04 0.--17. 1. "OPENDELAY,Opendelay" group.long 0x7C++0x07 line.long 0x00 "STEPCONFIG4,Step Configuration 4" bitfld.long 0x00 27. "RANGE_CHECK,Range check enable" "Disabled,Enabled" bitfld.long 0x00 26. "FIFO_SELECT,Sampled data will be stored in FIFO" "FIFO,FIFO 1" newline bitfld.long 0x00 25. "DIFF_CNTRL,Differential Control Pin" "Single ended,Differential pair" bitfld.long 0x00 23.--24. "SEL_RFM_SWC_1_0,SEL_RFM pins SW configuration" "VSSA_ADC,XNUR,YNLR,VREFN" newline bitfld.long 0x00 19.--22. "SEL_INP_SWC_3_0,SEL_INP pins SW configuration" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" bitfld.long 0x00 15.--18. "SEL_INM_SWM_3_0,SEL_INM pins for neg differential" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" newline bitfld.long 0x00 12.--14. "SEL_RFP_SWC_2_0,SEL_RFP pins SW configuration" "VDDA_ADC,XPUL,YPLL,VREFP,?..." bitfld.long 0x00 11. "WPNSW_SWC,WPNSW pin SW configuration" "Low,High" newline bitfld.long 0x00 10. "YPNSW_SWC,YPNSW pin SW configuration" "Low,High" bitfld.long 0x00 9. "XNPSW_SWC,XNPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 8. "YNNSW_SWC,YNNSW pin SW configuration" "Low,High" bitfld.long 0x00 7. "YPPSW__SWC,YPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 6. "XNNSW__SWC,XNNSW pin SW configuration" "Low,High" bitfld.long 0x00 5. "XPPSW_SWC,XPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 2.--4. "AVERAGING,Number of samplings to average" "No average,2,3,4,16,?..." bitfld.long 0x00 0.--1. "MODE,Mode" "SW enabled one-shot,SW enabled continuous,HW synchronized one-shot,HW synchronized continuous" line.long 0x04 "STEPDELAY4,Step Delay Register 4" hexmask.long.byte 0x04 24.--31. 1. "SAMPLEDELAY,Number of ADC clock cycles to sample" hexmask.long.tbyte 0x04 0.--17. 1. "OPENDELAY,Opendelay" group.long 0x84++0x07 line.long 0x00 "STEPCONFIG5,Step Configuration 5" bitfld.long 0x00 27. "RANGE_CHECK,Range check enable" "Disabled,Enabled" bitfld.long 0x00 26. "FIFO_SELECT,Sampled data will be stored in FIFO" "FIFO,FIFO 1" newline bitfld.long 0x00 25. "DIFF_CNTRL,Differential Control Pin" "Single ended,Differential pair" bitfld.long 0x00 23.--24. "SEL_RFM_SWC_1_0,SEL_RFM pins SW configuration" "VSSA_ADC,XNUR,YNLR,VREFN" newline bitfld.long 0x00 19.--22. "SEL_INP_SWC_3_0,SEL_INP pins SW configuration" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" bitfld.long 0x00 15.--18. "SEL_INM_SWM_3_0,SEL_INM pins for neg differential" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" newline bitfld.long 0x00 12.--14. "SEL_RFP_SWC_2_0,SEL_RFP pins SW configuration" "VDDA_ADC,XPUL,YPLL,VREFP,?..." bitfld.long 0x00 11. "WPNSW_SWC,WPNSW pin SW configuration" "Low,High" newline bitfld.long 0x00 10. "YPNSW_SWC,YPNSW pin SW configuration" "Low,High" bitfld.long 0x00 9. "XNPSW_SWC,XNPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 8. "YNNSW_SWC,YNNSW pin SW configuration" "Low,High" bitfld.long 0x00 7. "YPPSW__SWC,YPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 6. "XNNSW__SWC,XNNSW pin SW configuration" "Low,High" bitfld.long 0x00 5. "XPPSW_SWC,XPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 2.--4. "AVERAGING,Number of samplings to average" "No average,2,3,4,16,?..." bitfld.long 0x00 0.--1. "MODE,Mode" "SW enabled one-shot,SW enabled continuous,HW synchronized one-shot,HW synchronized continuous" line.long 0x04 "STEPDELAY5,Step Delay Register 5" hexmask.long.byte 0x04 24.--31. 1. "SAMPLEDELAY,Number of ADC clock cycles to sample" hexmask.long.tbyte 0x04 0.--17. 1. "OPENDELAY,Opendelay" group.long 0x8C++0x07 line.long 0x00 "STEPCONFIG6,Step Configuration 6" bitfld.long 0x00 27. "RANGE_CHECK,Range check enable" "Disabled,Enabled" bitfld.long 0x00 26. "FIFO_SELECT,Sampled data will be stored in FIFO" "FIFO,FIFO 1" newline bitfld.long 0x00 25. "DIFF_CNTRL,Differential Control Pin" "Single ended,Differential pair" bitfld.long 0x00 23.--24. "SEL_RFM_SWC_1_0,SEL_RFM pins SW configuration" "VSSA_ADC,XNUR,YNLR,VREFN" newline bitfld.long 0x00 19.--22. "SEL_INP_SWC_3_0,SEL_INP pins SW configuration" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" bitfld.long 0x00 15.--18. "SEL_INM_SWM_3_0,SEL_INM pins for neg differential" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" newline bitfld.long 0x00 12.--14. "SEL_RFP_SWC_2_0,SEL_RFP pins SW configuration" "VDDA_ADC,XPUL,YPLL,VREFP,?..." bitfld.long 0x00 11. "WPNSW_SWC,WPNSW pin SW configuration" "Low,High" newline bitfld.long 0x00 10. "YPNSW_SWC,YPNSW pin SW configuration" "Low,High" bitfld.long 0x00 9. "XNPSW_SWC,XNPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 8. "YNNSW_SWC,YNNSW pin SW configuration" "Low,High" bitfld.long 0x00 7. "YPPSW__SWC,YPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 6. "XNNSW__SWC,XNNSW pin SW configuration" "Low,High" bitfld.long 0x00 5. "XPPSW_SWC,XPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 2.--4. "AVERAGING,Number of samplings to average" "No average,2,3,4,16,?..." bitfld.long 0x00 0.--1. "MODE,Mode" "SW enabled one-shot,SW enabled continuous,HW synchronized one-shot,HW synchronized continuous" line.long 0x04 "STEPDELAY6,Step Delay Register 6" hexmask.long.byte 0x04 24.--31. 1. "SAMPLEDELAY,Number of ADC clock cycles to sample" hexmask.long.tbyte 0x04 0.--17. 1. "OPENDELAY,Opendelay" group.long 0x94++0x07 line.long 0x00 "STEPCONFIG7,Step Configuration 7" bitfld.long 0x00 27. "RANGE_CHECK,Range check enable" "Disabled,Enabled" bitfld.long 0x00 26. "FIFO_SELECT,Sampled data will be stored in FIFO" "FIFO,FIFO 1" newline bitfld.long 0x00 25. "DIFF_CNTRL,Differential Control Pin" "Single ended,Differential pair" bitfld.long 0x00 23.--24. "SEL_RFM_SWC_1_0,SEL_RFM pins SW configuration" "VSSA_ADC,XNUR,YNLR,VREFN" newline bitfld.long 0x00 19.--22. "SEL_INP_SWC_3_0,SEL_INP pins SW configuration" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" bitfld.long 0x00 15.--18. "SEL_INM_SWM_3_0,SEL_INM pins for neg differential" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" newline bitfld.long 0x00 12.--14. "SEL_RFP_SWC_2_0,SEL_RFP pins SW configuration" "VDDA_ADC,XPUL,YPLL,VREFP,?..." bitfld.long 0x00 11. "WPNSW_SWC,WPNSW pin SW configuration" "Low,High" newline bitfld.long 0x00 10. "YPNSW_SWC,YPNSW pin SW configuration" "Low,High" bitfld.long 0x00 9. "XNPSW_SWC,XNPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 8. "YNNSW_SWC,YNNSW pin SW configuration" "Low,High" bitfld.long 0x00 7. "YPPSW__SWC,YPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 6. "XNNSW__SWC,XNNSW pin SW configuration" "Low,High" bitfld.long 0x00 5. "XPPSW_SWC,XPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 2.--4. "AVERAGING,Number of samplings to average" "No average,2,3,4,16,?..." bitfld.long 0x00 0.--1. "MODE,Mode" "SW enabled one-shot,SW enabled continuous,HW synchronized one-shot,HW synchronized continuous" line.long 0x04 "STEPDELAY7,Step Delay Register 7" hexmask.long.byte 0x04 24.--31. 1. "SAMPLEDELAY,Number of ADC clock cycles to sample" hexmask.long.tbyte 0x04 0.--17. 1. "OPENDELAY,Opendelay" group.long 0x9C++0x07 line.long 0x00 "STEPCONFIG8,Step Configuration 8" bitfld.long 0x00 27. "RANGE_CHECK,Range check enable" "Disabled,Enabled" bitfld.long 0x00 26. "FIFO_SELECT,Sampled data will be stored in FIFO" "FIFO,FIFO 1" newline bitfld.long 0x00 25. "DIFF_CNTRL,Differential Control Pin" "Single ended,Differential pair" bitfld.long 0x00 23.--24. "SEL_RFM_SWC_1_0,SEL_RFM pins SW configuration" "VSSA_ADC,XNUR,YNLR,VREFN" newline bitfld.long 0x00 19.--22. "SEL_INP_SWC_3_0,SEL_INP pins SW configuration" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" bitfld.long 0x00 15.--18. "SEL_INM_SWM_3_0,SEL_INM pins for neg differential" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" newline bitfld.long 0x00 12.--14. "SEL_RFP_SWC_2_0,SEL_RFP pins SW configuration" "VDDA_ADC,XPUL,YPLL,VREFP,?..." bitfld.long 0x00 11. "WPNSW_SWC,WPNSW pin SW configuration" "Low,High" newline bitfld.long 0x00 10. "YPNSW_SWC,YPNSW pin SW configuration" "Low,High" bitfld.long 0x00 9. "XNPSW_SWC,XNPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 8. "YNNSW_SWC,YNNSW pin SW configuration" "Low,High" bitfld.long 0x00 7. "YPPSW__SWC,YPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 6. "XNNSW__SWC,XNNSW pin SW configuration" "Low,High" bitfld.long 0x00 5. "XPPSW_SWC,XPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 2.--4. "AVERAGING,Number of samplings to average" "No average,2,3,4,16,?..." bitfld.long 0x00 0.--1. "MODE,Mode" "SW enabled one-shot,SW enabled continuous,HW synchronized one-shot,HW synchronized continuous" line.long 0x04 "STEPDELAY8,Step Delay Register 8" hexmask.long.byte 0x04 24.--31. 1. "SAMPLEDELAY,Number of ADC clock cycles to sample" hexmask.long.tbyte 0x04 0.--17. 1. "OPENDELAY,Opendelay" group.long 0xA4++0x07 line.long 0x00 "STEPCONFIG9,Step Configuration 9" bitfld.long 0x00 27. "RANGE_CHECK,Range check enable" "Disabled,Enabled" bitfld.long 0x00 26. "FIFO_SELECT,Sampled data will be stored in FIFO" "FIFO,FIFO 1" newline bitfld.long 0x00 25. "DIFF_CNTRL,Differential Control Pin" "Single ended,Differential pair" bitfld.long 0x00 23.--24. "SEL_RFM_SWC_1_0,SEL_RFM pins SW configuration" "VSSA_ADC,XNUR,YNLR,VREFN" newline bitfld.long 0x00 19.--22. "SEL_INP_SWC_3_0,SEL_INP pins SW configuration" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" bitfld.long 0x00 15.--18. "SEL_INM_SWM_3_0,SEL_INM pins for neg differential" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" newline bitfld.long 0x00 12.--14. "SEL_RFP_SWC_2_0,SEL_RFP pins SW configuration" "VDDA_ADC,XPUL,YPLL,VREFP,?..." bitfld.long 0x00 11. "WPNSW_SWC,WPNSW pin SW configuration" "Low,High" newline bitfld.long 0x00 10. "YPNSW_SWC,YPNSW pin SW configuration" "Low,High" bitfld.long 0x00 9. "XNPSW_SWC,XNPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 8. "YNNSW_SWC,YNNSW pin SW configuration" "Low,High" bitfld.long 0x00 7. "YPPSW__SWC,YPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 6. "XNNSW__SWC,XNNSW pin SW configuration" "Low,High" bitfld.long 0x00 5. "XPPSW_SWC,XPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 2.--4. "AVERAGING,Number of samplings to average" "No average,2,3,4,16,?..." bitfld.long 0x00 0.--1. "MODE,Mode" "SW enabled one-shot,SW enabled continuous,HW synchronized one-shot,HW synchronized continuous" line.long 0x04 "STEPDELAY9,Step Delay Register 9" hexmask.long.byte 0x04 24.--31. 1. "SAMPLEDELAY,Number of ADC clock cycles to sample" hexmask.long.tbyte 0x04 0.--17. 1. "OPENDELAY,Opendelay" group.long 0xAC++0x07 line.long 0x00 "STEPCONFIG10,Step Configuration 10" bitfld.long 0x00 27. "RANGE_CHECK,Range check enable" "Disabled,Enabled" bitfld.long 0x00 26. "FIFO_SELECT,Sampled data will be stored in FIFO" "FIFO,FIFO 1" newline bitfld.long 0x00 25. "DIFF_CNTRL,Differential Control Pin" "Single ended,Differential pair" bitfld.long 0x00 23.--24. "SEL_RFM_SWC_1_0,SEL_RFM pins SW configuration" "VSSA_ADC,XNUR,YNLR,VREFN" newline bitfld.long 0x00 19.--22. "SEL_INP_SWC_3_0,SEL_INP pins SW configuration" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" bitfld.long 0x00 15.--18. "SEL_INM_SWM_3_0,SEL_INM pins for neg differential" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" newline bitfld.long 0x00 12.--14. "SEL_RFP_SWC_2_0,SEL_RFP pins SW configuration" "VDDA_ADC,XPUL,YPLL,VREFP,?..." bitfld.long 0x00 11. "WPNSW_SWC,WPNSW pin SW configuration" "Low,High" newline bitfld.long 0x00 10. "YPNSW_SWC,YPNSW pin SW configuration" "Low,High" bitfld.long 0x00 9. "XNPSW_SWC,XNPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 8. "YNNSW_SWC,YNNSW pin SW configuration" "Low,High" bitfld.long 0x00 7. "YPPSW__SWC,YPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 6. "XNNSW__SWC,XNNSW pin SW configuration" "Low,High" bitfld.long 0x00 5. "XPPSW_SWC,XPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 2.--4. "AVERAGING,Number of samplings to average" "No average,2,3,4,16,?..." bitfld.long 0x00 0.--1. "MODE,Mode" "SW enabled one-shot,SW enabled continuous,HW synchronized one-shot,HW synchronized continuous" line.long 0x04 "STEPDELAY10,Step Delay Register 10" hexmask.long.byte 0x04 24.--31. 1. "SAMPLEDELAY,Number of ADC clock cycles to sample" hexmask.long.tbyte 0x04 0.--17. 1. "OPENDELAY,Opendelay" group.long 0xB4++0x07 line.long 0x00 "STEPCONFIG11,Step Configuration 11" bitfld.long 0x00 27. "RANGE_CHECK,Range check enable" "Disabled,Enabled" bitfld.long 0x00 26. "FIFO_SELECT,Sampled data will be stored in FIFO" "FIFO,FIFO 1" newline bitfld.long 0x00 25. "DIFF_CNTRL,Differential Control Pin" "Single ended,Differential pair" bitfld.long 0x00 23.--24. "SEL_RFM_SWC_1_0,SEL_RFM pins SW configuration" "VSSA_ADC,XNUR,YNLR,VREFN" newline bitfld.long 0x00 19.--22. "SEL_INP_SWC_3_0,SEL_INP pins SW configuration" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" bitfld.long 0x00 15.--18. "SEL_INM_SWM_3_0,SEL_INM pins for neg differential" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" newline bitfld.long 0x00 12.--14. "SEL_RFP_SWC_2_0,SEL_RFP pins SW configuration" "VDDA_ADC,XPUL,YPLL,VREFP,?..." bitfld.long 0x00 11. "WPNSW_SWC,WPNSW pin SW configuration" "Low,High" newline bitfld.long 0x00 10. "YPNSW_SWC,YPNSW pin SW configuration" "Low,High" bitfld.long 0x00 9. "XNPSW_SWC,XNPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 8. "YNNSW_SWC,YNNSW pin SW configuration" "Low,High" bitfld.long 0x00 7. "YPPSW__SWC,YPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 6. "XNNSW__SWC,XNNSW pin SW configuration" "Low,High" bitfld.long 0x00 5. "XPPSW_SWC,XPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 2.--4. "AVERAGING,Number of samplings to average" "No average,2,3,4,16,?..." bitfld.long 0x00 0.--1. "MODE,Mode" "SW enabled one-shot,SW enabled continuous,HW synchronized one-shot,HW synchronized continuous" line.long 0x04 "STEPDELAY11,Step Delay Register 11" hexmask.long.byte 0x04 24.--31. 1. "SAMPLEDELAY,Number of ADC clock cycles to sample" hexmask.long.tbyte 0x04 0.--17. 1. "OPENDELAY,Opendelay" group.long 0xBC++0x07 line.long 0x00 "STEPCONFIG12,Step Configuration 12" bitfld.long 0x00 27. "RANGE_CHECK,Range check enable" "Disabled,Enabled" bitfld.long 0x00 26. "FIFO_SELECT,Sampled data will be stored in FIFO" "FIFO,FIFO 1" newline bitfld.long 0x00 25. "DIFF_CNTRL,Differential Control Pin" "Single ended,Differential pair" bitfld.long 0x00 23.--24. "SEL_RFM_SWC_1_0,SEL_RFM pins SW configuration" "VSSA_ADC,XNUR,YNLR,VREFN" newline bitfld.long 0x00 19.--22. "SEL_INP_SWC_3_0,SEL_INP pins SW configuration" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" bitfld.long 0x00 15.--18. "SEL_INM_SWM_3_0,SEL_INM pins for neg differential" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" newline bitfld.long 0x00 12.--14. "SEL_RFP_SWC_2_0,SEL_RFP pins SW configuration" "VDDA_ADC,XPUL,YPLL,VREFP,?..." bitfld.long 0x00 11. "WPNSW_SWC,WPNSW pin SW configuration" "Low,High" newline bitfld.long 0x00 10. "YPNSW_SWC,YPNSW pin SW configuration" "Low,High" bitfld.long 0x00 9. "XNPSW_SWC,XNPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 8. "YNNSW_SWC,YNNSW pin SW configuration" "Low,High" bitfld.long 0x00 7. "YPPSW__SWC,YPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 6. "XNNSW__SWC,XNNSW pin SW configuration" "Low,High" bitfld.long 0x00 5. "XPPSW_SWC,XPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 2.--4. "AVERAGING,Number of samplings to average" "No average,2,3,4,16,?..." bitfld.long 0x00 0.--1. "MODE,Mode" "SW enabled one-shot,SW enabled continuous,HW synchronized one-shot,HW synchronized continuous" line.long 0x04 "STEPDELAY12,Step Delay Register 12" hexmask.long.byte 0x04 24.--31. 1. "SAMPLEDELAY,Number of ADC clock cycles to sample" hexmask.long.tbyte 0x04 0.--17. 1. "OPENDELAY,Opendelay" group.long 0xC4++0x07 line.long 0x00 "STEPCONFIG13,Step Configuration 13" bitfld.long 0x00 27. "RANGE_CHECK,Range check enable" "Disabled,Enabled" bitfld.long 0x00 26. "FIFO_SELECT,Sampled data will be stored in FIFO" "FIFO,FIFO 1" newline bitfld.long 0x00 25. "DIFF_CNTRL,Differential Control Pin" "Single ended,Differential pair" bitfld.long 0x00 23.--24. "SEL_RFM_SWC_1_0,SEL_RFM pins SW configuration" "VSSA_ADC,XNUR,YNLR,VREFN" newline bitfld.long 0x00 19.--22. "SEL_INP_SWC_3_0,SEL_INP pins SW configuration" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" bitfld.long 0x00 15.--18. "SEL_INM_SWM_3_0,SEL_INM pins for neg differential" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" newline bitfld.long 0x00 12.--14. "SEL_RFP_SWC_2_0,SEL_RFP pins SW configuration" "VDDA_ADC,XPUL,YPLL,VREFP,?..." bitfld.long 0x00 11. "WPNSW_SWC,WPNSW pin SW configuration" "Low,High" newline bitfld.long 0x00 10. "YPNSW_SWC,YPNSW pin SW configuration" "Low,High" bitfld.long 0x00 9. "XNPSW_SWC,XNPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 8. "YNNSW_SWC,YNNSW pin SW configuration" "Low,High" bitfld.long 0x00 7. "YPPSW__SWC,YPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 6. "XNNSW__SWC,XNNSW pin SW configuration" "Low,High" bitfld.long 0x00 5. "XPPSW_SWC,XPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 2.--4. "AVERAGING,Number of samplings to average" "No average,2,3,4,16,?..." bitfld.long 0x00 0.--1. "MODE,Mode" "SW enabled one-shot,SW enabled continuous,HW synchronized one-shot,HW synchronized continuous" line.long 0x04 "STEPDELAY13,Step Delay Register 13" hexmask.long.byte 0x04 24.--31. 1. "SAMPLEDELAY,Number of ADC clock cycles to sample" hexmask.long.tbyte 0x04 0.--17. 1. "OPENDELAY,Opendelay" group.long 0xCC++0x07 line.long 0x00 "STEPCONFIG14,Step Configuration 14" bitfld.long 0x00 27. "RANGE_CHECK,Range check enable" "Disabled,Enabled" bitfld.long 0x00 26. "FIFO_SELECT,Sampled data will be stored in FIFO" "FIFO,FIFO 1" newline bitfld.long 0x00 25. "DIFF_CNTRL,Differential Control Pin" "Single ended,Differential pair" bitfld.long 0x00 23.--24. "SEL_RFM_SWC_1_0,SEL_RFM pins SW configuration" "VSSA_ADC,XNUR,YNLR,VREFN" newline bitfld.long 0x00 19.--22. "SEL_INP_SWC_3_0,SEL_INP pins SW configuration" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" bitfld.long 0x00 15.--18. "SEL_INM_SWM_3_0,SEL_INM pins for neg differential" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" newline bitfld.long 0x00 12.--14. "SEL_RFP_SWC_2_0,SEL_RFP pins SW configuration" "VDDA_ADC,XPUL,YPLL,VREFP,?..." bitfld.long 0x00 11. "WPNSW_SWC,WPNSW pin SW configuration" "Low,High" newline bitfld.long 0x00 10. "YPNSW_SWC,YPNSW pin SW configuration" "Low,High" bitfld.long 0x00 9. "XNPSW_SWC,XNPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 8. "YNNSW_SWC,YNNSW pin SW configuration" "Low,High" bitfld.long 0x00 7. "YPPSW__SWC,YPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 6. "XNNSW__SWC,XNNSW pin SW configuration" "Low,High" bitfld.long 0x00 5. "XPPSW_SWC,XPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 2.--4. "AVERAGING,Number of samplings to average" "No average,2,3,4,16,?..." bitfld.long 0x00 0.--1. "MODE,Mode" "SW enabled one-shot,SW enabled continuous,HW synchronized one-shot,HW synchronized continuous" line.long 0x04 "STEPDELAY14,Step Delay Register 14" hexmask.long.byte 0x04 24.--31. 1. "SAMPLEDELAY,Number of ADC clock cycles to sample" hexmask.long.tbyte 0x04 0.--17. 1. "OPENDELAY,Opendelay" group.long 0xD4++0x07 line.long 0x00 "STEPCONFIG15,Step Configuration 15" bitfld.long 0x00 27. "RANGE_CHECK,Range check enable" "Disabled,Enabled" bitfld.long 0x00 26. "FIFO_SELECT,Sampled data will be stored in FIFO" "FIFO,FIFO 1" newline bitfld.long 0x00 25. "DIFF_CNTRL,Differential Control Pin" "Single ended,Differential pair" bitfld.long 0x00 23.--24. "SEL_RFM_SWC_1_0,SEL_RFM pins SW configuration" "VSSA_ADC,XNUR,YNLR,VREFN" newline bitfld.long 0x00 19.--22. "SEL_INP_SWC_3_0,SEL_INP pins SW configuration" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" bitfld.long 0x00 15.--18. "SEL_INM_SWM_3_0,SEL_INM pins for neg differential" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" newline bitfld.long 0x00 12.--14. "SEL_RFP_SWC_2_0,SEL_RFP pins SW configuration" "VDDA_ADC,XPUL,YPLL,VREFP,?..." bitfld.long 0x00 11. "WPNSW_SWC,WPNSW pin SW configuration" "Low,High" newline bitfld.long 0x00 10. "YPNSW_SWC,YPNSW pin SW configuration" "Low,High" bitfld.long 0x00 9. "XNPSW_SWC,XNPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 8. "YNNSW_SWC,YNNSW pin SW configuration" "Low,High" bitfld.long 0x00 7. "YPPSW__SWC,YPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 6. "XNNSW__SWC,XNNSW pin SW configuration" "Low,High" bitfld.long 0x00 5. "XPPSW_SWC,XPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 2.--4. "AVERAGING,Number of samplings to average" "No average,2,3,4,16,?..." bitfld.long 0x00 0.--1. "MODE,Mode" "SW enabled one-shot,SW enabled continuous,HW synchronized one-shot,HW synchronized continuous" line.long 0x04 "STEPDELAY15,Step Delay Register 15" hexmask.long.byte 0x04 24.--31. 1. "SAMPLEDELAY,Number of ADC clock cycles to sample" hexmask.long.tbyte 0x04 0.--17. 1. "OPENDELAY,Opendelay" group.long 0xDC++0x07 line.long 0x00 "STEPCONFIG16,Step Configuration 16" bitfld.long 0x00 27. "RANGE_CHECK,Range check enable" "Disabled,Enabled" bitfld.long 0x00 26. "FIFO_SELECT,Sampled data will be stored in FIFO" "FIFO,FIFO 1" newline bitfld.long 0x00 25. "DIFF_CNTRL,Differential Control Pin" "Single ended,Differential pair" bitfld.long 0x00 23.--24. "SEL_RFM_SWC_1_0,SEL_RFM pins SW configuration" "VSSA_ADC,XNUR,YNLR,VREFN" newline bitfld.long 0x00 19.--22. "SEL_INP_SWC_3_0,SEL_INP pins SW configuration" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" bitfld.long 0x00 15.--18. "SEL_INM_SWM_3_0,SEL_INM pins for neg differential" "Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN,VREFN" newline bitfld.long 0x00 12.--14. "SEL_RFP_SWC_2_0,SEL_RFP pins SW configuration" "VDDA_ADC,XPUL,YPLL,VREFP,?..." bitfld.long 0x00 11. "WPNSW_SWC,WPNSW pin SW configuration" "Low,High" newline bitfld.long 0x00 10. "YPNSW_SWC,YPNSW pin SW configuration" "Low,High" bitfld.long 0x00 9. "XNPSW_SWC,XNPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 8. "YNNSW_SWC,YNNSW pin SW configuration" "Low,High" bitfld.long 0x00 7. "YPPSW__SWC,YPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 6. "XNNSW__SWC,XNNSW pin SW configuration" "Low,High" bitfld.long 0x00 5. "XPPSW_SWC,XPPSW pin SW configuration" "Low,High" newline bitfld.long 0x00 2.--4. "AVERAGING,Number of samplings to average" "No average,2,3,4,16,?..." bitfld.long 0x00 0.--1. "MODE,Mode" "SW enabled one-shot,SW enabled continuous,HW synchronized one-shot,HW synchronized continuous" line.long 0x04 "STEPDELAY16,Step Delay Register 16" hexmask.long.byte 0x04 24.--31. 1. "SAMPLEDELAY,Number of ADC clock cycles to sample" hexmask.long.tbyte 0x04 0.--17. 1. "OPENDELAY,Opendelay" rgroup.long 0xE4++0x03 line.long 0x00 "FIFO0COUNT,FIFO0 Word Count TSC_ADC_SS_FIFO0 Word Count Register" hexmask.long.byte 0x00 0.--6. 1. "WORDS_IN_FIFO0,Number of words currently in the FIFO0" group.long (0xE4+0x04)++0x07 line.long 0x00 "FIFO0THRESHOLD,FIFO0 Threshold Trigger TSC_ADC_SS_FIFO0 Threshold Level Register" bitfld.long 0x00 0.--5. "FIFO0_THRESHOLD_LEVEL,Fifo0_threshold_level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DMA0REQ,FIFO0 DMA Req0 Trigger TSC_ADC_SS_FIFO0 DMA REQUEST Register" bitfld.long 0x04 0.--5. "DMA_REQUEST_LEVEL,Dma_request_level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0xF0++0x03 line.long 0x00 "FIFO1COUNT,FIFO1 Word Count TSC_ADC_SS_FIFO1 Word Count Register" hexmask.long.byte 0x00 0.--6. 1. "WORDS_IN_FIFO1,Number of words currently in the FIFO1" group.long (0xF0+0x04)++0x07 line.long 0x00 "FIFO1THRESHOLD,FIFO1 Threshold Trigger TSC_ADC_SS_FIFO1 Threshold Level Register" bitfld.long 0x00 0.--5. "FIFO1_THRESHOLD_LEVEL,Fifo1_threshold_level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "DMA1REQ,FIFO1 DMA Req1 Trigger TSC_ADC_SS_FIFO1 DMA REQUEST Register" bitfld.long 0x04 0.--5. "DMA_REQUEST_LEVEL,Dma_request_level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0x100++0x03 line.long 0x00 "FIFO0DATA,ADC_ FIFO0 _READ Data TSC_ADC_SS_FIFO0 READ Register" bitfld.long 0x00 16.--19. "ADCCHNLID,Optional ID tag of channel that captured the data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. "ADCDATA,12 bit sampled ADC converted data value stored in FIFO 0" rgroup.long 0x104++0x03 line.long 0x00 "FIFO1DATA,ADC_ FIFO1 _READ Data TSC_ADC_SS_FIFO1 READ Register" bitfld.long 0x00 16.--19. "ADCCHNLID,Optional ID tag of channel that captured the data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. "ADCDATA,12 bit sampled ADC converted data value stored in FIFO 1" tree.end tree "LCD Controller" base ad:0x4830E000 rgroup.long 0x00++0x03 line.long 0x00 "PID,PID Register" bitfld.long 0x00 30.--31. "SCHEME,The scheme of the register used" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "FUNC,The function of the module being used" newline bitfld.long 0x00 11.--15. "RTL,The release number for this IP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. "MAJOR,Major release number" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. "CUSTOM,Custom IP" "0,1,2,3" bitfld.long 0x00 0.--5. "MINOR,Minor release number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x04++0x03 line.long 0x00 "CTRL,CTRL Register" hexmask.long.byte 0x00 8.--15. 1. "CLKDIV,Clock divisor" bitfld.long 0x00 1. "AUTO_UFLOW_RESTART,Reset on an underflow" "Software,Hardware" newline bitfld.long 0x00 0. "MODESEL,LCD mode select" "LIDD,Raster" group.long 0x0C++0x03 line.long 0x00 "LIDD_CTRL,LIDD_CTRL Register" bitfld.long 0x00 9. "DMA_CS0_CS1,CS0/CS1 select for LIDD DMA writes" "LIDD CS0,LIDD CS1" bitfld.long 0x00 8. "LIDD_DMA_EN,LIDD DMA enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "CS1_E1_POL,Chip select 1/enable 1 (Secondary) polarity control" "Not inverted,Inverted" bitfld.long 0x00 6. "CS0_E0_POL,Chip select 0/enable 0 (Secondary) polarity control" "Not inverted,Inverted" newline bitfld.long 0x00 5. "WS_DIR_POL,Write strobe/direction polarity control" "Not inverted,Inverted" bitfld.long 0x00 4. "RS_EN_POL,Read strobe/direction polarity control" "Not inverted,Inverted" newline bitfld.long 0x00 3. "ALEPOL,Address latch enable (Ale) polarity control" "Not inverted,Inverted" bitfld.long 0x00 0.--2. "LIDD_MODE_SEL,LIDD mode select" "Sync MPU68,Async MPU68,Sync MPU80,Async MPU80,Hitachi (Async),?..." group.long 0x10++0x03 line.long 0x00 "LIDD_CS0_CONF,LIDD_CS0_CONF Register" bitfld.long 0x00 27.--31. "W_SU,Write strobe Set-Up cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--26. "W_STROBE,Write strobe duration cycles" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 17.--20. "W_HOLD,Write strobe hold cycles" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--16. "R_SU,Read strobe Set-Up cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 6.--11. "R_STROBE,Read strobe duration cycles" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 2.--5. "R_HOLD,Read strobe hold cycles" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0.--1. "TA,Field value defines the number of memclk between accesses" "0,1,2,3" if (((d.l(ad:0x4830E000+0x0C))&0x100)==0x100) rgroup.long (0x10+0x04)++0x07 line.long 0x00 "LIDD_CS0_ADDR,LIDD_CS0_ADDR Register" hexmask.long.word 0x00 0.--15. 0x01 "ADR_INDX,16-bit address or command instruction area of the panel" line.long 0x04 "LIDD_CS0_DATA,LIDD_CS0_DATA Register" hexmask.long.word 0x04 0.--15. 0x01 "DATA,16-bit address or command instruction area of the panel" else group.long (0x10+0x04)++0x07 line.long 0x00 "LIDD_CS0_ADDR,LIDD_CS0_ADDR Register" hexmask.long.word 0x00 0.--15. 0x01 "ADR_INDX,16-bit address or command instruction area of the panel" line.long 0x04 "LIDD_CS0_DATA,LIDD_CS0_DATA Register" hexmask.long.word 0x04 0.--15. 0x01 "DATA,16-bit address or command instruction area of the panel" endif group.long 0x1C++0x03 line.long 0x00 "LIDD_CS1_CONF,LIDD_CS1_CONF Register" bitfld.long 0x00 27.--31. "W_SU,Write strobe Set-Up cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--26. "W_STROBE,Write strobe duration cycles" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 17.--20. "W_HOLD,Write strobe hold cycles" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--16. "R_SU,Read strobe Set-Up cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 6.--11. "R_STROBE,Read strobe duration cycles" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 2.--5. "R_HOLD,Read strobe hold cycles" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0.--1. "TA,Field value defines the number of memclk between accesses" "0,1,2,3" if (((d.l(ad:0x4830E000+0x0C))&0x100)==0x100) rgroup.long (0x1C+0x04)++0x07 line.long 0x00 "LIDD_CS1_ADDR,LIDD_CS1_ADDR Register" hexmask.long.word 0x00 0.--15. 0x01 "ADR_INDX,16-bit address or command instruction area of the panel" line.long 0x04 "LIDD_CS1_DATA,LIDD_CS1_DATA Register" hexmask.long.word 0x04 0.--15. 0x01 "DATA,16-bit address or command instruction area of the panel" else group.long (0x1C+0x04)++0x07 line.long 0x00 "LIDD_CS1_ADDR,LIDD_CS1_ADDR Register" hexmask.long.word 0x00 0.--15. 0x01 "ADR_INDX,16-bit address or command instruction area of the panel" line.long 0x04 "LIDD_CS1_DATA,LIDD_CS1_DATA Register" hexmask.long.word 0x04 0.--15. 0x01 "DATA,16-bit address or command instruction area of the panel" endif if (((d.l(ad:0x4830E000+0x28))&0x2000080)==0x2000080) group.long 0x28++0x03 line.long 0x00 "RASTER_CTRL,RASTER_CTRL Register" bitfld.long 0x00 26. "TFT24UNPACKED,24 bit mode packing" "Packed,Unpacked" bitfld.long 0x00 25. "TFT24,24 bit mode" "Off,On" newline bitfld.long 0x00 23. "TFTMAP,TFT mode alternate signal mapping for palettized framebuffer" "Right align,565 convertion" bitfld.long 0x00 22. "NIBMODE,Nibble mode" "Disabled,Enabled" newline bitfld.long 0x00 20.--21. "PALMODE,Palette loading mode" "Pallete and data loading,Pallete loading only,Only raw data (12/16/24 bpp),?..." hexmask.long.byte 0x00 12.--19. 1. "REQDLY,Palette loading delay" newline bitfld.long 0x00 9. "NONO8B,Mono 8 bit" "LCD_PIXEL_O[3:0],LCD_PIXEL_O[7:0]" bitfld.long 0x00 8. "RDORDER,Raster data order select" "From bit 0 to 31,From bit 31 to 0" newline bitfld.long 0x00 7. "LCDTFT,LCD" "Passive,Active" bitfld.long 0x00 1. "LCDBW,Only applies for passive matrix panels LCD monochrome" "Disabled,Enabled" newline bitfld.long 0x00 0. "LCDEN,LCD controller enable" "Disabled,Enabled" elif (((d.l(ad:0x4830E000+0x28))&0x2000080)==0x2000000) group.long 0x28++0x03 line.long 0x00 "RASTER_CTRL,RASTER_CTRL Register" rbitfld.long 0x00 26. "TFT24UNPACKED,24 bit mode packing" "Packed,Unpacked" bitfld.long 0x00 25. "TFT24,24 bit mode" "Off,On" newline bitfld.long 0x00 24. "STN565,Passive matrix mode" "12 bpp,16 bpp 565" bitfld.long 0x00 22. "NIBMODE,Nibble mode" "Disabled,Enabled" newline bitfld.long 0x00 20.--21. "PALMODE,Palette loading mode" "Pallete and data loading,Pallete loading only,Only raw data (12/16/24 bpp),?..." hexmask.long.byte 0x00 12.--19. 1. "REQDLY,Palette loading delay" newline bitfld.long 0x00 9. "NONO8B,Mono 8 bit" "LCD_PIXEL_O[3:0],LCD_PIXEL_O[7:0]" bitfld.long 0x00 8. "RDORDER,Raster data order select" "From bit 0 to 31,From bit 31 to 0" newline bitfld.long 0x00 7. "LCDTFT,LCD" "Passive,Active" bitfld.long 0x00 1. "LCDBW,Only applies for passive matrix panels LCD monochrome" "Disabled,Enabled" newline bitfld.long 0x00 0. "LCDEN,LCD controller enable" "Disabled,Enabled" elif (((d.l(ad:0x4830E000+0x28))&0x2000080)==0x80) group.long 0x28++0x03 line.long 0x00 "RASTER_CTRL,RASTER_CTRL Register" rbitfld.long 0x00 26. "TFT24UNPACKED,24 bit mode packing" "Packed,Unpacked" bitfld.long 0x00 25. "TFT24,24 bit mode" "Off,On" newline bitfld.long 0x00 23. "TFTMAP,TFT mode alternate signal mapping for palettized framebuffer" "Right align,565 convertion" bitfld.long 0x00 22. "NIBMODE,Nibble mode" "Disabled,Enabled" newline bitfld.long 0x00 20.--21. "PALMODE,Palette loading mode" "Pallete and data loading,Pallete loading only,Only raw data (12/16/24 bpp),?..." hexmask.long.byte 0x00 12.--19. 1. "REQDLY,Palette loading delay" newline bitfld.long 0x00 9. "NONO8B,Mono 8 bit" "LCD_PIXEL_O[3:0],LCD_PIXEL_O[7:0]" bitfld.long 0x00 8. "RDORDER,Raster data order select" "From bit 0 to 31,From bit 31 to 0" newline bitfld.long 0x00 7. "LCDTFT,LCD" "Passive,Active" bitfld.long 0x00 1. "LCDBW,Only applies for passive matrix panels LCD monochrome" "Disabled,Enabled" newline bitfld.long 0x00 0. "LCDEN,LCD controller enable" "Disabled,Enabled" else group.long 0x28++0x03 line.long 0x00 "RASTER_CTRL,RASTER_CTRL Register" rbitfld.long 0x00 26. "TFT24UNPACKED,24 bit mode packing" "Packed,Unpacked" bitfld.long 0x00 25. "TFT24,24 bit mode" "Off,On" newline bitfld.long 0x00 24. "STN565,Passive matrix mode" "12 bpp,16 bpp 565" bitfld.long 0x00 22. "NIBMODE,Nibble mode" "Disabled,Enabled" newline bitfld.long 0x00 20.--21. "PALMODE,Palette loading mode" "Pallete and data loading,Pallete loading only,Only raw data (12/16/24 bpp),?..." hexmask.long.byte 0x00 12.--19. 1. "REQDLY,Palette loading delay" newline bitfld.long 0x00 9. "NONO8B,Mono 8 bit" "LCD_PIXEL_O[3:0],LCD_PIXEL_O[7:0]" bitfld.long 0x00 8. "RDORDER,Raster data order select" "From bit 0 to 31,From bit 31 to 0" newline bitfld.long 0x00 7. "LCDTFT,LCD" "Passive,Active" bitfld.long 0x00 1. "LCDBW,Only applies for passive matrix panels LCD monochrome" "Disabled,Enabled" newline bitfld.long 0x00 0. "LCDEN,LCD controller enable" "Disabled,Enabled" endif group.long 0x2C++0x07 line.long 0x00 "RASTER_TIMING_0,RASTER_TIMING_0 Register" hexmask.long.byte 0x00 24.--31. 1. "HBP,Horizontal back porch lowbits bits 7:0 of the horizontal back porch field" hexmask.long.byte 0x00 16.--23. 1. "HFP,Horizontal front porch lowbits" newline bitfld.long 0x00 10.--15. "HSW,Horizontal sync pulse width lowbits bits 5:0 of the horizontal sync pulse width field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--9. "PPLLSB,Pixels-per-line LSB[9:4]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 3. "PPLMSB,Pixels-per-line MSB[10]" "0,1" line.long 0x04 "RASTER_TIMING_1,RASTER_TIMING_1 Register" hexmask.long.byte 0x04 24.--31. 1. "VBP,Vertical back porch value" hexmask.long.byte 0x04 16.--23. 1. "VFP,Vertical front porch value" newline bitfld.long 0x04 10.--15. "VSW,Vertical sync width pulse" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64" hexmask.long.word 0x04 0.--9. 1. "LPP,Lines per panel encoded value" if (((d.l(ad:0x4830E000+0x34))&0x2000000)==0x2000000) group.long 0x34++0x03 line.long 0x00 "RASTER_TIMING_2,RASTER_TIMING_2 Register" bitfld.long 0x00 27.--30. "HSW_HIGHBITS,Bits 9:6 of the horizontal sync width field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 26. "LPP_B10,Lines per panel bit 10" "0,1" newline bitfld.long 0x00 25. "PHSVS_ON_OFF,Hsync/vsync pixel clock control on/off" "Opposite edges,PHSVS_RF" bitfld.long 0x00 24. "PHSVS_RF,Program HSYNC/VSYNC rise or fall" "Rising edge,Falling edge" newline bitfld.long 0x00 23. "IEO,Invert output enable" "Active high,Active low" bitfld.long 0x00 22. "IPC,Invert pixel clock" "Rising edge,Falling edge" newline bitfld.long 0x00 21. "IHS,Invert hsync" "Active high,Active low" bitfld.long 0x00 20. "IVS,Invert vsync" "Active high,Active low" newline bitfld.long 0x00 16.--19. "ACBI,AC bias pins transitions per interrupt value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--15. 1. "ACB,AC bias pin frequency value" newline bitfld.long 0x00 4.--5. "HBP_HIGHBITS,Bits 9:8 of the horizontal back porch field" "0,1,2,3" bitfld.long 0x00 0.--1. "HFP_HIGHBITS,Bits 9:8 of the horizontal front porch field" "0,1,2,3" else group.long 0x34++0x03 line.long 0x00 "RASTER_TIMING_2,RASTER_TIMING_2 Register" bitfld.long 0x00 27.--30. "HSW_HIGHBITS,Bits 9:6 of the horizontal sync width field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 26. "LPP_B10,Lines per panel bit 10 bit 10 of the lpp field in RASTER_TIMING_1" "0,1" newline bitfld.long 0x00 25. "PHSVS_ON_OFF,Hsync/vsync pixel clock control on/off" "Opposite edges,PHSVS_RF" bitfld.long 0x00 23. "IEO,Invert output enable" "Active high,Active low" newline bitfld.long 0x00 22. "IPC,Invert pixel clock" "Rising edge,Falling edge" bitfld.long 0x00 21. "IHS,Invert hsync" "Active high,Active low" newline bitfld.long 0x00 20. "IVS,Invert vsync" "Active high,Active low" bitfld.long 0x00 16.--19. "ACBI,AC bias pins transitions per interrupt value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.byte 0x00 8.--15. 1. "ACB,AC bias pin frequency value" bitfld.long 0x00 4.--5. "HBP_HIGHBITS,Bits 9:8 of the horizontal back porch field" "0,1,2,3" newline bitfld.long 0x00 0.--1. "HFP_HIGHBITS,Bits 9:8 of the horizontal front porch field" "0,1,2,3" endif group.long 0x38++0x07 line.long 0x00 "RASTER_SUBPANEL,RASTER_SUBPANEL Register" bitfld.long 0x00 31. "SPEN,Sub panel enable" "Disabled,Enabled" bitfld.long 0x00 29. "HOLS,High or low signal" "Top/bottom,Bottom/top" newline hexmask.long.word 0x00 16.--25. 1. "LPPT,Line per panel threshold" hexmask.long.word 0x00 0.--15. 1. "DPDLSB,Default pixel data LSB[15:0]" line.long 0x04 "RASTER_SUBPANEL2,RASTER_SUBPANEL2 Register" bitfld.long 0x04 8. "LPPT_B10,Lines per panel threshold bit 10" "0,1" hexmask.long.byte 0x04 0.--7. 1. "DPDMSB,Default pixel data MSB [23:16]" if (((d.l(ad:0x4830E000+0x0C))&0x100)==0x100)&&(((d.l(ad:0x4830E000+0x40))&0x02)==0x02) group.long 0x40++0x03 line.long 0x00 "LCDDMA_CTRL,LCDDMA_CTRL Register" bitfld.long 0x00 16.--18. "DMA_MASTER_PRIO,Priority for the L3 OCP master bus" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 8.--10. "TH_FIFO_READY,DMA FIFO threshold" "8,16,32,64,128,256,512,?..." newline rbitfld.long 0x00 4.--6. "BURST_SIZE,Burst size setting for DMA transfers" "1,2,4,8,16,?..." bitfld.long 0x00 3. "BYTE_SWAP,Byte swap" "0,1" newline bitfld.long 0x00 1. "BIGENDIAN,Big endian enable" "Disabled,Enabled" bitfld.long 0x00 0. "FRAME_MODE,Frame mode" "One buffer,Two buffers" elif (((d.l(ad:0x4830E000+0x0C))&0x100)==0x100)&&(((d.l(ad:0x4830E000+0x40))&0x02)==0x00) group.long 0x40++0x03 line.long 0x00 "LCDDMA_CTRL,LCDDMA_CTRL Register" bitfld.long 0x00 16.--18. "DMA_MASTER_PRIO,Priority for the L3 OCP master bus" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 8.--10. "TH_FIFO_READY,DMA FIFO threshold" "8,16,32,64,128,256,512,?..." newline rbitfld.long 0x00 4.--6. "BURST_SIZE,Burst size setting for DMA transfers" "1,2,4,8,16,?..." rbitfld.long 0x00 3. "BYTE_SWAP,Byte swap" "0,1" newline bitfld.long 0x00 1. "BIGENDIAN,Big endian enable" "Disabled,Enabled" bitfld.long 0x00 0. "FRAME_MODE,Frame mode" "One buffer,Two buffers" elif (((d.l(ad:0x4830E000+0x0C))&0x100)==0x00)&&(((d.l(ad:0x4830E000+0x40))&0x02)==0x02) group.long 0x40++0x03 line.long 0x00 "LCDDMA_CTRL,LCDDMA_CTRL Register" bitfld.long 0x00 16.--18. "DMA_MASTER_PRIO,Priority for the L3 OCP master bus" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 8.--10. "TH_FIFO_READY,DMA FIFO threshold" "0,16,32,64,128,256,512,?..." newline bitfld.long 0x00 4.--6. "BURST_SIZE,Burst size setting for DMA transfers" "1,2,4,8,16,?..." bitfld.long 0x00 3. "BYTE_SWAP,Byte swap" "0,1" newline bitfld.long 0x00 1. "BIGENDIAN,Big endian enable" "Disabled,Enabled" bitfld.long 0x00 0. "FRAME_MODE,Frame mode" "One buffer,Two buffers" else group.long 0x40++0x03 line.long 0x00 "LCDDMA_CTRL,LCDDMA_CTRL Register" bitfld.long 0x00 16.--18. "DMA_MASTER_PRIO,Priority for the L3 OCP master bus" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 8.--10. "TH_FIFO_READY,DMA FIFO threshold" "0,16,32,64,128,256,512,?..." newline bitfld.long 0x00 4.--6. "BURST_SIZE,Burst size setting for DMA transfers" "1,2,4,8,16,?..." rbitfld.long 0x00 3. "BYTE_SWAP,Byte swap" "0,1" newline bitfld.long 0x00 1. "BIGENDIAN,Big endian enable" "Disabled,Enabled" bitfld.long 0x00 0. "FRAME_MODE,Frame mode" "One buffer,Two buffers" endif group.long 0x44++0x07 line.long 0x00 "LCDDMA_FB1_BASE,LCDDMA_FB1_BASE Register" hexmask.long 0x00 2.--31. 0x04 "FB1_BASE,Frame buffer 1 base address pointer" line.long 0x04 "LCDDMA_FB1_CEILING,LCDDMA_FB1_CEILING Register" hexmask.long 0x04 2.--31. 0x04 "FB1_CEIL,Frame buffer 1 ceiling address pointer" if (((d.l(ad:0x4830E000+0x40))&0x01)==0x01) group.long 0x4C++0x07 line.long 0x00 "LCDDMA_FB1_BASE,LCDDMA_FB1_BASE Register" hexmask.long 0x00 2.--31. 0x04 "FB1_BASE,Frame buffer 1 base address pointer" line.long 0x04 "LCDDMA_FB1_CEILING,LCDDMA_FB1_CEILING Register" hexmask.long 0x04 2.--31. 0x04 "FB1_CEIL,Frame buffer 1 ceiling address pointer" endif group.long 0x54++0x03 line.long 0x00 "SYSCONFIG,SYSCONFIG Register" bitfld.long 0x00 4.--5. "STANDBYMODE,Configuration of the local initiator state management mode" "Force-standby,No-standby,Smart-standby,?..." bitfld.long 0x00 2.--3. "IDLEMODE,Configuration of the local target state management mode" "Force-idle,No-idle,Smart-idle,?..." if (((d.l(ad:0x4830E000+0x28))&0x80)==0x00) group.long 0x58++0x07 line.long 0x00 "IRQSTATUS_RAW,IRQSTATUS_RAW Register" bitfld.long 0x00 9. "EOF1_RAW_SET,DMA End-of-Frame 1 raw interrupt status and set" "Inactive,Active" bitfld.long 0x00 8. "EOF0_RAW_SET,DMA End-of-Frame 0 raw interrupt status and set" "Inactive,Active" newline bitfld.long 0x00 6. "PL_RAW_SET,DMA palette loaded raw interrupt status and set" "Inactive,Active" bitfld.long 0x00 5. "FUF_RAW_SET,DMA FIFO underflow raw interrupt status and set" "Inactive,Active" newline bitfld.long 0x00 3. "ACB_RAW_SET,AC bias count raw interrupt status and set" "Inactive,Active" bitfld.long 0x00 2. "SYNC_RAW_SET,Frame synchronization lost raw interrupt status and set" "Inactive,Active" newline bitfld.long 0x00 1. "RECURRENT_RASTER_DONE_RAW_SET,Raster mode frame done interrupt" "Inactive,Active" bitfld.long 0x00 0. "DONE_RAW_SET,Raster or LIDD frame done" "Inactive,Active" line.long 0x04 "IRQSTATUS_SET/CLR,IRQSTATUS Register" setclrfld.long 0x04 9. 0x08 9. 0x0C 9. "EOF1_EN,DMA End-of-Frame 1 enabled" "Disabled,Enabled" setclrfld.long 0x04 8. 0x08 8. 0x0C 8. "EOF0_EN,DMA End-of-Frame 0 enabled" "Disabled,Enabled" newline setclrfld.long 0x04 6. 0x08 6. 0x0C 6. "PL_EN,DMA palette loaded enabled" "Disabled,Enabled" setclrfld.long 0x04 5. 0x08 5. 0x0C 5. "FUF_EN,DMA FIFO underflow enabled" "Disabled,Enabled" newline setclrfld.long 0x04 3. 0x08 3. 0x0C 3. "ACB_EN,AC bias count" "Disabled,Enabled" setclrfld.long 0x04 2. 0x08 2. 0x0C 2. "SYNC_EN,Frame synchronization lost" "Disabled,Enabled" newline setclrfld.long 0x04 1. 0x08 1. 0x0C 1. "RECURRENT_RASTER__DONE_EN,Raster frame done interrupt" "Disabled,Enabled" setclrfld.long 0x04 0. 0x08 0. 0x0C 0. "DONE_EN,Raster or LIDD frame done" "Disabled,Enabled" else group.long 0x58++0x07 line.long 0x00 "IRQSTATUS_RAW,IRQSTATUS_RAW Register" bitfld.long 0x00 9. "EOF1_RAW_SET,DMA End-of-Frame 1 raw interrupt status and set" "Inactive,Active" bitfld.long 0x00 8. "EOF0_RAW_SET,DMA End-of-Frame 0 raw interrupt status and set" "Inactive,Active" newline bitfld.long 0x00 6. "PL_RAW_SET,DMA palette loaded raw interrupt status and set" "Inactive,Active" bitfld.long 0x00 5. "FUF_RAW_SET,DMA FIFO underflow raw interrupt status and set" "Inactive,Active" newline bitfld.long 0x00 2. "SYNC_RAW_SET,Frame synchronization lost raw interrupt status and set" "Inactive,Active" bitfld.long 0x00 1. "RECURRENT_RASTER_DONE_RAW_SET,Raster mode frame done interrupt" "Inactive,Active" newline bitfld.long 0x00 0. "DONE_RAW_SET,Raster or LIDD frame done" "Inactive,Active" line.long 0x04 "IRQSTATUS_SET/CLR,IRQSTATUS Register" setclrfld.long 0x04 9. 0x08 9. 0x0C 9. "EOF1_EN,DMA End-of-Frame 1 enabled" "Disabled,Enabled" setclrfld.long 0x04 8. 0x08 8. 0x0C 8. "EOF0_EN,DMA End-of-Frame 0 enabled" "Disabled,Enabled" newline setclrfld.long 0x04 6. 0x08 6. 0x0C 6. "PL_EN,DMA palette loaded enabled" "Disabled,Enabled" setclrfld.long 0x04 5. 0x08 5. 0x0C 5. "FUF_EN,DMA FIFO underflow enabled" "Disabled,Enabled" newline setclrfld.long 0x04 2. 0x08 2. 0x0C 2. "SYNC_EN,Frame synchronization lost" "Disabled,Enabled" setclrfld.long 0x04 1. 0x08 1. 0x0C 1. "RECURRENT_RASTER__DONE_EN,Raster frame done interrupt" "Disabled,Enabled" newline setclrfld.long 0x04 0. 0x08 0. 0x0C 0. "DONE_EN,Raster or LIDD frame done" "Disabled,Enabled" endif group.long 0x6C++0x07 line.long 0x00 "CLKC_ENABLE,CLKC_ENABLE Register" bitfld.long 0x00 2. "DMA_CLK_EN,Software clock enable for the DMA submodule" "Disabled,Enabled" bitfld.long 0x00 1. "LIDD_CLK_EN,Software clock enable for the LIDD submodule (Character displays)" "Disabled,Enabled" newline bitfld.long 0x00 0. "CORE_CLK_EN,Software clock enable for the core" "Disabled,Enabled" line.long 0x04 "CLKC_RESET,CLKC_RESET Register" bitfld.long 0x04 3. "MAIN_RST,Software reset for the entire LCD module" "Disabled,Enabled" bitfld.long 0x04 2. "DMA_RST,Software reset for the DMA submodule" "Disabled,Enabled" newline bitfld.long 0x04 1. "LIDD_RST,Software reset for the LIDD submodule (Character displays)" "Disabled,Enabled" bitfld.long 0x04 0. "CORE_RST,Software reset for the core" "Disabled,Enabled" tree.end tree "Ethernet Subsystem" tree "CPSW_ALE" base ad:0x4A100D00 group.long 0x00++0x03 line.long 0x00 "IDVER,Address Lookup Engine ID/Version Register" hexmask.long.word 0x00 16.--31. 1. "IDENT,ALE identification value" hexmask.long.byte 0x00 8.--15. 1. "MAJ_VER,ALE major version value" newline hexmask.long.byte 0x00 0.--7. 1. "MINOR_VER,ALE minor version value" group.long 0x08++0x03 line.long 0x00 "CONTROL,Address Lookup Engine Control Register" bitfld.long 0x00 31. "ENABLE_ALE,Enable ALE" "Disabled,Enabled" bitfld.long 0x00 30. "CLEAR_TABLE,Clear ALE address table" "No effect,Clear" newline bitfld.long 0x00 29. "AGE_OUT_NOW,Age out address table now" "No effect,Clear" bitfld.long 0x00 8. "EN_P0_UNI_FLOOD,Enable port 0 (Host port) unicast flood" "Disabled,Enabled" newline bitfld.long 0x00 7. "LEARN_NO_VID,Learn no VID disable" "No,Yes" bitfld.long 0x00 6. "EN_VID0_MODE,Enable VLAN ID = 0 mode" "Disabled,Enabled" newline bitfld.long 0x00 5. "ENABLE_OUI_DENY,Enable OUI deny mode" "Disabled,Enabled" bitfld.long 0x00 4. "BYPASS,ALE bypass" "Not bypassed,Bypassed" newline bitfld.long 0x00 3. "RATE_LIMIT_TX,Rate limit transmit mode" "Receive,Transmit" bitfld.long 0x00 2. "VLAN_AWARE,ALE VLAN aware" "Flood,Drop packet" newline bitfld.long 0x00 1. "ENABLE_AUTH_MODE,Enable MAC authorization mode" "Disabled,Enabled" bitfld.long 0x00 0. "ENABLE_RATE_LIMIT,Enable broadcast and multicast rate limit" "Disabled,Enabled" group.long 0x10++0x03 line.long 0x00 "PRESCALE,Address Lookup Engine Prescale Register" hexmask.long.tbyte 0x00 0.--19. 1. "PRESCALE,ALE prescale register" group.long 0x18++0x03 line.long 0x00 "UNKNOWN_VLAN,Address Lookup Engine Unknown Vlan Register" bitfld.long 0x00 24.--29. "UNKNOWN_FORCE_UNTAGGED_EGRESS,Unknown VLAN force untagged egress" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. "UNKNOWN_REG_MCAST_FLOOD_MASK,Unknown VLAN registered multicast flood mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 8.--13. "UNKNOWN_MCAST_FLOOD_MASK,Unknown VLAN multicast flood mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. "UNKNOWN_VLAN_MEMBER_LIST,Unknown VLAN member list" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x20++0x03 line.long 0x00 "TBLCTL,Address Lookup Eengine Table Control" bitfld.long 0x00 31. "WRITE_RDZ,Write bit" "0,1" hexmask.long.word 0x00 0.--9. 1. "ENTRY_POINTER,Table entry pointer" group.long 0x34++0x0B line.long 0x00 "TBLW2,Address Lookup Engine Table Word 2 Register" hexmask.long.byte 0x00 0.--7. 1. "ENTRY71-64,Table entry bits" line.long 0x04 "TBLW1,Address Lookup Engine Table Word 1 Register" line.long 0x08 "TBLW0,Address Lookup Engine Table Word 0 Register" group.long 0x40++0x03 line.long 0x00 "PORTCTL0,Address Lookup Engine Port 0 Control Register" hexmask.long.byte 0x00 24.--31. 1. "BCAST_LIMIT,Broadcast packet rate limit" hexmask.long.byte 0x00 16.--23. 1. "MCAST_LIMIT,Multicast packet rate limit" newline bitfld.long 0x00 5. "NO_SA_UPDATE,No souce address update" "Disabled,Enabled" bitfld.long 0x00 4. "NO_LEARN,No learn mode" "Disabled,Enabled" newline bitfld.long 0x00 3. "VID_INGRESS_CHECK,VLAN ID ingress check" "0,1" bitfld.long 0x00 2. "DROP_UNTAGGED,Drop untagged packets" "0,1" newline bitfld.long 0x00 0.--1. "PORT_STATE,Port state" "Disabled,Blocked,Learn,Forwad" group.long 0x44++0x03 line.long 0x00 "PORTCTL1,Address Lookup Engine Port 1 Control Register" hexmask.long.byte 0x00 24.--31. 1. "BCAST_LIMIT,Broadcast packet rate limit" hexmask.long.byte 0x00 16.--23. 1. "MCAST_LIMIT,Multicast packet rate limit" newline bitfld.long 0x00 5. "NO_SA_UPDATE,No souce address update" "Disabled,Enabled" bitfld.long 0x00 4. "NO_LEARN,No learn mode" "Disabled,Enabled" newline bitfld.long 0x00 3. "VID_INGRESS_CHECK,VLAN ID ingress check" "0,1" bitfld.long 0x00 2. "DROP_UNTAGGED,Drop untagged packets" "0,1" newline bitfld.long 0x00 0.--1. "PORT_STATE,Port state" "Disabled,Blocked,Learn,Forwad" group.long 0x48++0x03 line.long 0x00 "PORTCTL2,Address Lookup Engine Port 2 Control Register" hexmask.long.byte 0x00 24.--31. 1. "BCAST_LIMIT,Broadcast packet rate limit" hexmask.long.byte 0x00 16.--23. 1. "MCAST_LIMIT,Multicast packet rate limit" newline bitfld.long 0x00 5. "NO_SA_UPDATE,No souce address update" "Disabled,Enabled" bitfld.long 0x00 4. "NO_LEARN,No learn mode" "Disabled,Enabled" newline bitfld.long 0x00 3. "VID_INGRESS_CHECK,VLAN ID ingress check" "0,1" bitfld.long 0x00 2. "DROP_UNTAGGED,Drop untagged packets" "0,1" newline bitfld.long 0x00 0.--1. "PORT_STATE,Port state" "Disabled,Blocked,Learn,Forwad" group.long 0x4C++0x03 line.long 0x00 "PORTCTL3,Address Lookup Engine Port 3 Control Register" hexmask.long.byte 0x00 24.--31. 1. "BCAST_LIMIT,Broadcast packet rate limit" hexmask.long.byte 0x00 16.--23. 1. "MCAST_LIMIT,Multicast packet rate limit" newline bitfld.long 0x00 5. "NO_SA_UPDATE,No souce address update" "Disabled,Enabled" bitfld.long 0x00 4. "NO_LEARN,No learn mode" "Disabled,Enabled" newline bitfld.long 0x00 3. "VID_INGRESS_CHECK,VLAN ID ingress check" "0,1" bitfld.long 0x00 2. "DROP_UNTAGGED,Drop untagged packets" "0,1" newline bitfld.long 0x00 0.--1. "PORT_STATE,Port state" "Disabled,Blocked,Learn,Forwad" group.long 0x50++0x03 line.long 0x00 "PORTCTL4,Address Lookup Engine Port 4 Control Register" hexmask.long.byte 0x00 24.--31. 1. "BCAST_LIMIT,Broadcast packet rate limit" hexmask.long.byte 0x00 16.--23. 1. "MCAST_LIMIT,Multicast packet rate limit" newline bitfld.long 0x00 5. "NO_SA_UPDATE,No souce address update" "Disabled,Enabled" bitfld.long 0x00 4. "NO_LEARN,No learn mode" "Disabled,Enabled" newline bitfld.long 0x00 3. "VID_INGRESS_CHECK,VLAN ID ingress check" "0,1" bitfld.long 0x00 2. "DROP_UNTAGGED,Drop untagged packets" "0,1" newline bitfld.long 0x00 0.--1. "PORT_STATE,Port state" "Disabled,Blocked,Learn,Forwad" group.long 0x54++0x03 line.long 0x00 "PORTCTL5,Address Lookup Engine Port 5 Control Register" hexmask.long.byte 0x00 24.--31. 1. "BCAST_LIMIT,Broadcast packet rate limit" hexmask.long.byte 0x00 16.--23. 1. "MCAST_LIMIT,Multicast packet rate limit" newline bitfld.long 0x00 5. "NO_SA_UPDATE,No souce address update" "Disabled,Enabled" bitfld.long 0x00 4. "NO_LEARN,No learn mode" "Disabled,Enabled" newline bitfld.long 0x00 3. "VID_INGRESS_CHECK,VLAN ID ingress check" "0,1" bitfld.long 0x00 2. "DROP_UNTAGGED,Drop untagged packets" "0,1" newline bitfld.long 0x00 0.--1. "PORT_STATE,Port state" "Disabled,Blocked,Learn,Forwad" tree.end tree "CPSW_CPDMA" base ad:0x4A100800 rgroup.long 0x0++0x03 line.long 0x00 "TX_IDVER,CPDMA_REGS TX Identification And Version Register" hexmask.long.word 0x00 16.--31. 1. "TX_IDENT,TX identification value" hexmask.long.byte 0x00 8.--15. 1. "TX_MAJOR_VER,TX major version value" newline hexmask.long.byte 0x00 0.--7. 1. "TX_MINOR_VER,TX minor version value" group.long (0x0+0x04)++0x07 line.long 0x00 "TX_CONTROL,CPDMA_REGS TX Control Register" bitfld.long 0x00 0. "TX_EN,TX enable" "Disabled,Enabled" line.long 0x04 "TX_TEARDOWN,CPDMA_REGS TX Teardown Register" rbitfld.long 0x04 31. "TX_TDN_RDY,TX teardown ready" "0,1" bitfld.long 0x04 0.--2. "TX_TDN_CH,TX teardown channel" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7" rgroup.long 0x10++0x03 line.long 0x00 "RX_IDVER,CPDMA_REGS RX Identification And Version Register" hexmask.long.word 0x00 16.--31. 1. "RX_IDENT,RX identification value" hexmask.long.byte 0x00 8.--15. 1. "RX_MAJOR_VER,RX major version value" newline hexmask.long.byte 0x00 0.--7. 1. "RX_MINOR_VER,RX minor version value" group.long (0x10+0x04)++0x07 line.long 0x00 "RX_CONTROL,CPDMA_REGS RX Control Register" bitfld.long 0x00 0. "RX_EN,RX enable" "Disabled,Enabled" line.long 0x04 "RX_TEARDOWN,CPDMA_REGS RX Teardown Register" rbitfld.long 0x04 31. "RX_TDN_RDY,RX teardown ready" "0,1" bitfld.long 0x04 0.--2. "RX_TDN_CH,RX teardown channel" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7" group.long 0x1C++0x07 line.long 0x00 "CPDMA_SOFT_RESET,CPDMA_REGS Soft Reset Register" bitfld.long 0x00 0. "SOFT_RESET,Software reset" "No reset,Reset" line.long 0x04 "DMACONTROL,CPDMA_REGS CPDMA Control Register" hexmask.long.byte 0x04 8.--15. 1. "TX_RLIM,Transmit rate limit channel bus" bitfld.long 0x04 4. "RX_CEF,RX copy error frames enable" "Disabled,Enabled" newline bitfld.long 0x04 3. "CMD_IDLE,Command idle" "Disabled,Enabled" bitfld.long 0x04 2. "RX_OFFLEN_BLOCK,Receive offset/length word write block enable" "Disabled,Enabled" newline bitfld.long 0x04 1. "RX_OWNERSHIP,Receive ownership write bit value" "0,1" bitfld.long 0x04 0. "TX_PTYPE,Transmit queue priority type" "Round robin,Fixed" rgroup.long 0x24++0x03 line.long 0x00 "DMASTATUS,CPDMA_REGS CPDMA Status Register" bitfld.long 0x00 31. "IDLE,Idle status bit" "Busy,Idle" bitfld.long 0x00 20.--23. "TX_HOST_ERR_CODE,TX host error code" "No error,SOP error,Ownership bit not set in SOP buffer,Zero next buffer descriptor pointer without EOP,Zero buffer pointer,Zero buffer length,Packet length error,?..." newline bitfld.long 0x00 16.--18. "TX_ERR_CH,TX host error channel" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7" bitfld.long 0x00 12.--15. "RX_HOST_ERR_CODE,RX host error code" "No error,,Ownership bit not set in input buffer,,Zero buffer pointer,Zero buffer length on non-SOP descriptor,SOP buffer length not greater than offset,?..." newline bitfld.long 0x00 8.--10. "RX_ERR_CH,RX host error channel" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7" group.long 0x28++0x07 line.long 0x00 "RX_BUFFER_OFFSET,CPDMA_REGS Receive Buffer Offset" hexmask.long.word 0x00 0.--15. 1. "RX_BUFFER_OFFSET,Receive buffer offset value" line.long 0x04 "EMCONTROL,CPDMA_REGS Emulation Control Register" bitfld.long 0x04 1. "SOFT,Emulation soft bit" "0,1" bitfld.long 0x04 0. "FREE,Emulation free bit" "0,1" group.long 0x30++0x03 line.long 0x00 "TX_PRI0_RATE,CPDMA_REGS Transmit (Ingress) Priority 0 Rate" hexmask.long.word 0x00 16.--29. 1. "PRIN_IDLE_CNT,Priority (7:0) idle count" hexmask.long.word 0x00 0.--13. 1. "PRIN_SEND_CNT,Priority (7:0) send count" group.long 0x34++0x03 line.long 0x00 "TX_PRI1_RATE,CPDMA_REGS Transmit (Ingress) Priority 1 Rate" hexmask.long.word 0x00 16.--29. 1. "PRIN_IDLE_CNT,Priority (7:0) idle count" hexmask.long.word 0x00 0.--13. 1. "PRIN_SEND_CNT,Priority (7:0) send count" group.long 0x38++0x03 line.long 0x00 "TX_PRI2_RATE,CPDMA_REGS Transmit (Ingress) Priority 2 Rate" hexmask.long.word 0x00 16.--29. 1. "PRIN_IDLE_CNT,Priority (7:0) idle count" hexmask.long.word 0x00 0.--13. 1. "PRIN_SEND_CNT,Priority (7:0) send count" group.long 0x3C++0x03 line.long 0x00 "TX_PRI3_RATE,CPDMA_REGS Transmit (Ingress) Priority 3 Rate" hexmask.long.word 0x00 16.--29. 1. "PRIN_IDLE_CNT,Priority (7:0) idle count" hexmask.long.word 0x00 0.--13. 1. "PRIN_SEND_CNT,Priority (7:0) send count" group.long 0x40++0x03 line.long 0x00 "TX_PRI4_RATE,CPDMA_REGS Transmit (Ingress) Priority 4 Rate" hexmask.long.word 0x00 16.--29. 1. "PRIN_IDLE_CNT,Priority (7:0) idle count" hexmask.long.word 0x00 0.--13. 1. "PRIN_SEND_CNT,Priority (7:0) send count" group.long 0x44++0x03 line.long 0x00 "TX_PRI5_RATE,CPDMA_REGS Transmit (Ingress) Priority 5 Rate" hexmask.long.word 0x00 16.--29. 1. "PRIN_IDLE_CNT,Priority (7:0) idle count" hexmask.long.word 0x00 0.--13. 1. "PRIN_SEND_CNT,Priority (7:0) send count" group.long 0x48++0x03 line.long 0x00 "TX_PRI6_RATE,CPDMA_REGS Transmit (Ingress) Priority 6 Rate" hexmask.long.word 0x00 16.--29. 1. "PRIN_IDLE_CNT,Priority (7:0) idle count" hexmask.long.word 0x00 0.--13. 1. "PRIN_SEND_CNT,Priority (7:0) send count" group.long 0x4C++0x03 line.long 0x00 "TX_PRI7_RATE,CPDMA_REGS Transmit (Ingress) Priority 7 Rate" hexmask.long.word 0x00 16.--29. 1. "PRIN_IDLE_CNT,Priority (7:0) idle count" hexmask.long.word 0x00 0.--13. 1. "PRIN_SEND_CNT,Priority (7:0) send count" rgroup.long 0x80++0x03 line.long 0x00 "TX_INTSTAT_RAW,CPDMA_INT TX Interrupt Status Register (Raw Value)" bitfld.long 0x00 7. "TX7_PEND,TX7_PEND raw interrupt read (Before mask)" "0,1" bitfld.long 0x00 6. "TX6_PEND,TX6_PEND raw interrupt read (Before mask)" "0,1" newline bitfld.long 0x00 5. "TX5_PEND,TX5_PEND raw interrupt read (Before mask)" "0,1" bitfld.long 0x00 4. "TX4_PEND,TX4_PEND raw interrupt read (Before mask)" "0,1" newline bitfld.long 0x00 3. "TX3_PEND,TX3_PEND raw interrupt read (Before mask)" "0,1" bitfld.long 0x00 2. "TX2_PEND,TX2_PEND raw interrupt read (Before mask)" "0,1" newline bitfld.long 0x00 1. "TX1_PEND,TX1_PEND raw interrupt read (Before mask)" "0,1" bitfld.long 0x00 0. "TX0_PEND,TX0_PEND raw interrupt read (Before mask)" "0,1" group.long 0x84++0x07 line.long 0x00 "TX_INTSTAT_MASKED,CPDMA_INT TX Interrupt Status Register (Masked Value)" bitfld.long 0x00 7. "TX7_PEND,TX7_PEND masked interrupt read" "0,1" bitfld.long 0x00 6. "TX6_PEND,TX6_PEND masked interrupt read" "0,1" newline bitfld.long 0x00 5. "TX5_PEND,TX5_PEND masked interrupt read" "0,1" bitfld.long 0x00 4. "TX4_PEND,TX4_PEND masked interrupt read" "0,1" newline bitfld.long 0x00 3. "TX3_PEND,TX3_PEND masked interrupt read" "0,1" bitfld.long 0x00 2. "TX2_PEND,TX2_PEND masked interrupt read" "0,1" newline bitfld.long 0x00 1. "TX1_PEND,TX1_PEND masked interrupt read" "0,1" bitfld.long 0x00 0. "TX0_PEND,TX0_PEND masked interrupt read" "0,1" line.long 0x04 "TX_INTMASK_SET/CLR,CPDMA_INT TX Interrupt Mask Set Register" setclrfld.long 0x04 7. 0x04 7. 0x08 7. "TX7_MASK,TX channel 7 mask" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x08 6. "TX6_MASK,TX channel 6 mask" "Disabled,Enabled" newline setclrfld.long 0x04 5. 0x04 5. 0x08 5. "TX5_MASK,TX channel 5 mask" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x08 4. "TX4_MASK,TX channel 4 mask" "Disabled,Enabled" newline setclrfld.long 0x04 3. 0x04 3. 0x08 3. "TX3_MASK,TX channel 3 mask" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x08 2. "TX2_MASK,TX channel 2 mask" "Disabled,Enabled" newline setclrfld.long 0x04 1. 0x04 1. 0x08 1. "TX1_MASK,TX channel 1 mask" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x08 0. "TX0_MASK,TX channel 0 mask" "Disabled,Enabled" rgroup.long 0x90++0x03 line.long 0x00 "CPDMA_IN_VECTOR,CPDMA_INT Input Vector" group.long 0x94++0x03 line.long 0x00 "CPDMA_EOI_VECTOR,CPDMA_INT End OF Interrupt Vector" bitfld.long 0x00 0.--4. "DMA_EOI_VECTOR,DMA end of interrupt vector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0xA0++0x07 line.long 0x00 "RX_INTSTAT_RAW,CPDMA_INT RX Interrupt Status Register (Raw Value)" bitfld.long 0x00 15. "RX7_THRESH_PEND,RX7_THRESH_PEND raw int read (Before mask)" "0,1" bitfld.long 0x00 14. "RX6_THRESH_PEND,RX6_THRESH_PEND raw int read (Before mask)" "0,1" newline bitfld.long 0x00 13. "RX5_THRESH_PEND,RX5_THRESH_PEND raw int read (Before mask)" "0,1" bitfld.long 0x00 12. "RX4_THRESH_PEND,RX4_THRESH_PEND raw int read (Before mask)" "0,1" newline bitfld.long 0x00 11. "RX3_THRESH_PEND,RX3_THRESH_PEND raw int read (Before mask)" "0,1" bitfld.long 0x00 10. "RX2_THRESH_PEND,RX2_THRESH_PEND raw int read (Before mask)" "0,1" newline bitfld.long 0x00 9. "RX1_THRESH_PEND,RX1_THRESH_PEND raw int read (Before mask)" "0,1" bitfld.long 0x00 8. "RX0_THRESH_PEND,RX0_THRESH_PEND raw int read (Before mask)" "0,1" newline bitfld.long 0x00 7. "RX7_PEND,RX7_PEND raw int read (Before mask)" "0,1" bitfld.long 0x00 6. "RX6_PEND,RX6_PEND raw int read (Before mask)" "0,1" newline bitfld.long 0x00 5. "RX5_PEND,RX5_PEND raw int read (Before mask)" "0,1" bitfld.long 0x00 4. "RX4_PEND,RX4_PEND raw int read (Before mask)" "0,1" newline bitfld.long 0x00 3. "RX3_PEND,RX3_PEND raw int read (Before mask)" "0,1" bitfld.long 0x00 2. "RX2_PEND,RX2_PEND raw int read (Before mask)" "0,1" newline bitfld.long 0x00 1. "RX1_PEND,RX1_PEND raw int read (Before mask)" "0,1" bitfld.long 0x00 0. "RX0_PEND,RX0_PEND raw int read (Before mask)" "0,1" line.long 0x04 "RX_INTSTAT_MASKED,CPDMA_INT RX Interrupt Status Register (Masked Value)" bitfld.long 0x04 15. "RX7_THRESH_PEND,RX7_THRESH_PEND masked int read" "0,1" bitfld.long 0x04 14. "RX6_THRESH_PEND,RX6_THRESH_PEND masked int read" "0,1" newline bitfld.long 0x04 13. "RX5_THRESH_PEND,RX5_THRESH_PEND masked int read" "0,1" bitfld.long 0x04 12. "RX4_THRESH_PEND,RX4_THRESH_PEND masked int read" "0,1" newline bitfld.long 0x04 11. "RX3_THRESH_PEND,RX3_THRESH_PEND masked int read" "0,1" bitfld.long 0x04 10. "RX2_THRESH_PEND,RX2_THRESH_PEND masked int read" "0,1" newline bitfld.long 0x04 9. "RX1_THRESH_PEND,RX1_THRESH_PEND masked int read" "0,1" bitfld.long 0x04 8. "RX0_THRESH_PEND,RX0_THRESH_PEND masked int read" "0,1" newline bitfld.long 0x04 7. "RX7_PEND,RX7_PEND masked int read" "0,1" bitfld.long 0x04 6. "RX6_PEND,RX6_PEND masked int read" "0,1" newline bitfld.long 0x04 5. "RX5_PEND,RX5_PEND masked int read" "0,1" bitfld.long 0x04 4. "RX4_PEND,RX4_PEND masked int read" "0,1" newline bitfld.long 0x04 3. "RX3_PEND,RX3_PEND masked int read" "0,1" bitfld.long 0x04 2. "RX2_PEND,RX2_PEND masked int read" "0,1" newline bitfld.long 0x04 1. "RX1_PEND,RX1_PEND masked int read" "0,1" bitfld.long 0x04 0. "RX0_PEND,RX0_PEND masked int read" "0,1" group.long 0xA8++0x03 line.long 0x00 "RX_INTMASK_SET/CLR,CPDMA_INT RX Interrupt Mask Set Register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. "RX7_THRESH_PEND_MASK,RX channel 7 threshold pending int" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x04 14. "RX6_THRESH_PEND_MASK,RX channel 6 threshold pending int" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x04 13. "RX5_THRESH_PEND_MASK,RX channel 5 threshold pending int" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x04 12. "RX4_THRESH_PEND_MASK,RX channel 4 threshold pending int" "Not pending,Pending" newline setclrfld.long 0x00 11. 0x00 11. 0x04 11. "RX3_THRESH_PEND_MASK,RX channel 3 threshold pending int" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x04 10. "RX2_THRESH_PEND_MASK,RX channel 2 threshold pending int" "Not pending,Pending" newline setclrfld.long 0x00 9. 0x00 9. 0x04 9. "RX1_THRESH_PEND_MASK,RX channel 1 threshold pending int" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x04 8. "RX0_THRESH_PEND_MASK,RX channel 0 threshold pending int" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x04 7. "RX7_PEND_MASK,RX channel 7 pending int" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x04 6. "RX6_PEND_MASK,RX channel 6 pending int" "Not pending,Pending" newline setclrfld.long 0x00 5. 0x00 5. 0x04 5. "RX5_PEND_MASK,RX channel 5 pending int" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x04 4. "RX4_PEND_MASK,RX channel 4 pending int" "Not pending,Pending" newline setclrfld.long 0x00 3. 0x00 3. 0x04 3. "RX3_PEND_MASK,RX channel 3 pending int" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x04 2. "RX2_PEND_MASK,RX channel 2 pending int" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x04 1. "RX1_PEND_MASK,RX channel 1 pending int" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x04 0. "RX0_PEND_MASK,RX channel 0 pending int" "Not pending,Pending" rgroup.long 0xB0++0x07 line.long 0x00 "DMA_INTSTAT_RAW,CPDMA_INT DMA Interrupt Status Register (Raw Value)" bitfld.long 0x00 1. "HOST_PEND,Host pending interrupt - raw int read (Before mask)" "0,1" bitfld.long 0x00 0. "STAT_PEND,Statistics pending interrupt - raw int read (Before mask)" "0,1" line.long 0x04 "DMA_INTSTAT_MASKED,CPDMA_INT DMA Interrupt Status Register (Masked Value)" bitfld.long 0x04 1. "HOST_PEND,Host pending interrupt - masked interrupt read" "0,1" bitfld.long 0x04 0. "STAT_PEND,Statistics pending interrupt - masked interrupt read" "0,1" group.long 0xB8++0x03 line.long 0x00 "DMA_INTMASK_SET/CLR,CPDMA_INT DMA Interrupt Mask Set Register" setclrfld.long 0x00 1. 0x00 1. 0x04 1. "HOST_ERR_INT_MASK,Host error interrupt mask - write one to enable interrupt" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. "STAT_INT_MASK,Statistics interrupt mask - write one to enable interrupt" "Disabled,Enabled" group.long 0xC0++0x03 line.long 0x00 "RX0_PENDTHRESH,CPDMA_INT Receive Threshold Pending Register Channel 0" hexmask.long.byte 0x00 0.--7. 1. "RX_PENDTHRESH,Rx flow threshold value forissuing receive threshold pending interrupts" group.long 0xC4++0x03 line.long 0x00 "RX1_PENDTHRESH,CPDMA_INT Receive Threshold Pending Register Channel 1" hexmask.long.byte 0x00 0.--7. 1. "RX_PENDTHRESH,Rx flow threshold value forissuing receive threshold pending interrupts" group.long 0xC8++0x03 line.long 0x00 "RX2_PENDTHRESH,CPDMA_INT Receive Threshold Pending Register Channel 2" hexmask.long.byte 0x00 0.--7. 1. "RX_PENDTHRESH,Rx flow threshold value forissuing receive threshold pending interrupts" group.long 0xCC++0x03 line.long 0x00 "RX3_PENDTHRESH,CPDMA_INT Receive Threshold Pending Register Channel 3" hexmask.long.byte 0x00 0.--7. 1. "RX_PENDTHRESH,Rx flow threshold value forissuing receive threshold pending interrupts" group.long 0xD0++0x03 line.long 0x00 "RX4_PENDTHRESH,CPDMA_INT Receive Threshold Pending Register Channel 4" hexmask.long.byte 0x00 0.--7. 1. "RX_PENDTHRESH,Rx flow threshold value forissuing receive threshold pending interrupts" group.long 0xD4++0x03 line.long 0x00 "RX5_PENDTHRESH,CPDMA_INT Receive Threshold Pending Register Channel 5" hexmask.long.byte 0x00 0.--7. 1. "RX_PENDTHRESH,Rx flow threshold value forissuing receive threshold pending interrupts" group.long 0xD8++0x03 line.long 0x00 "RX6_PENDTHRESH,CPDMA_INT Receive Threshold Pending Register Channel 6" hexmask.long.byte 0x00 0.--7. 1. "RX_PENDTHRESH,Rx flow threshold value forissuing receive threshold pending interrupts" group.long 0xDC++0x03 line.long 0x00 "RX7_PENDTHRESH,CPDMA_INT Receive Threshold Pending Register Channel 7" hexmask.long.byte 0x00 0.--7. 1. "RX_PENDTHRESH,Rx flow threshold value forissuing receive threshold pending interrupts" group.long 0xE0++0x03 line.long 0x00 "RX0_FREEBUFFER,CPDMA_INT Receive Free Buffer Register Channel 0" hexmask.long.byte 0x00 0.--7. 1. "RX_FREEBUFFER,Rx free buffer count contains the count of free buffers available" group.long 0xE4++0x03 line.long 0x00 "RX1_FREEBUFFER,CPDMA_INT Receive Free Buffer Register Channel 1" hexmask.long.byte 0x00 0.--7. 1. "RX_FREEBUFFER,Rx free buffer count contains the count of free buffers available" group.long 0xE8++0x03 line.long 0x00 "RX2_FREEBUFFER,CPDMA_INT Receive Free Buffer Register Channel 2" hexmask.long.byte 0x00 0.--7. 1. "RX_FREEBUFFER,Rx free buffer count contains the count of free buffers available" group.long 0xEC++0x03 line.long 0x00 "RX3_FREEBUFFER,CPDMA_INT Receive Free Buffer Register Channel 3" hexmask.long.byte 0x00 0.--7. 1. "RX_FREEBUFFER,Rx free buffer count contains the count of free buffers available" group.long 0xF0++0x03 line.long 0x00 "RX4_FREEBUFFER,CPDMA_INT Receive Free Buffer Register Channel 4" hexmask.long.byte 0x00 0.--7. 1. "RX_FREEBUFFER,Rx free buffer count contains the count of free buffers available" group.long 0xF4++0x03 line.long 0x00 "RX5_FREEBUFFER,CPDMA_INT Receive Free Buffer Register Channel 5" hexmask.long.byte 0x00 0.--7. 1. "RX_FREEBUFFER,Rx free buffer count contains the count of free buffers available" group.long 0xF8++0x03 line.long 0x00 "RX6_FREEBUFFER,CPDMA_INT Receive Free Buffer Register Channel 6" hexmask.long.byte 0x00 0.--7. 1. "RX_FREEBUFFER,Rx free buffer count contains the count of free buffers available" group.long 0xFC++0x03 line.long 0x00 "RX7_FREEBUFFER,CPDMA_INT Receive Free Buffer Register Channel 7" hexmask.long.byte 0x00 0.--7. 1. "RX_FREEBUFFER,Rx free buffer count contains the count of free buffers available" tree.end tree "CPSW_CPTS" base ad:0x4A100C00 rgroup.long 0x00++0x03 line.long 0x00 "CPTS_IDVER,Identification and Version Register" hexmask.long.word 0x00 16.--31. 1. "TX_IDENT,TX Identification Value" bitfld.long 0x00 11.--15. "RTL_VER,RTL Version Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "MAJOR_VER,Major Version Value" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 0.--7. 1. "MINOR_VER,Minor Version Value" group.long 0x04++0x03 line.long 0x00 "CPTS_CONTROL,Time Sync Control Register" bitfld.long 0x00 11. "HW4_TS_PUSH_EN,Hardware push 4 enable" "Disabled,Enabled" bitfld.long 0x00 10. "HW3_TS_PUSH_EN,Hardware push 3 enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "HW2_TS_PUSH_EN,Hardware push 2 enable" "Disabled,Enabled" bitfld.long 0x00 8. "HW1_TS_PUSH_EN,Hardware push 1 enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "INT_TEST,Interrupt Test" "Disabled,Enabled" bitfld.long 0x00 0. "CPTS_EN,Time Sync Enable" "Disabled,Enabled" wgroup.long 0x0C++0x03 line.long 0x00 "CPTS_TS_PUSH,Time Stamp Event Push Register" bitfld.long 0x00 0. "TS_PUSH,Time stamp event push" "0,1" group.long 0x10++0x03 line.long 0x00 "CPTS_TS_LOAD_VAL,Time Stamp Load Value Register" wgroup.long 0x14++0x03 line.long 0x00 "CPTS_TS_LOAD_EN,Time Stamp Load Enable Register" bitfld.long 0x00 0. "TS_LOAD_EN,Time Stamp Load" "Disabled,Enabled" if (((d.l(ad:0x4A100C00+0x14))&0x01)==0x01) group.long 0x20++0x03 line.long 0x00 "CPTS_INTSTAT_RAW,Time Sync Interrupt Status RAaw Register" bitfld.long 0x00 0. "TS_PEND_RAW,TS_PEND_RAW int read" "Not pending,Pending" else rgroup.long 0x20++0x03 line.long 0x00 "CPTS_INTSTAT_RAW,Time Sync Interrupt Status RAaw Register" bitfld.long 0x00 0. "TS_PEND_RAW,TS_PEND_RAW int read" "Not pending,Pending" endif rgroup.long 0x24++0x03 line.long 0x00 "CPTS_INTSTAT_MASKED,Time Sync Interrupt Status Masked Register" bitfld.long 0x00 0. "TS_PEND,TS_PEND masked interrupt read" "Not pending,Pending" group.long 0x28++0x03 line.long 0x00 "CPTS_INT_ENABLE,Time Sync Interrupt Enable Register" bitfld.long 0x00 0. "TS_PEND_EN,TS_PEND masked interrupt enable" "Disabled,Enabled" wgroup.long 0x30++0x03 line.long 0x00 "CPTS_EVENT_POP,Event Interrupt Pop Register" bitfld.long 0x00 0. "EVENT_POP,Event Pop" "Disabled,Enabled" rgroup.long 0x34++0x03 line.long 0x00 "CPTS_EVENT_LOW,Lower 32-bits of the Event Value" if (((d.l(ad:0x4A100C00+0x38))&0x400000)==0x400000) rgroup.long 0x38++0x03 line.long 0x00 "CPTS_EVENT_HIGH,Upper 32-bits of the Event Value" bitfld.long 0x00 24.--28. "PORT_NUMBER,Port Number of an Ethernet Event or the Hardware Push Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20.--23. "EVENT_TYPE,Time Sync Event Type" "Time Stamp Push Event,Time Stamp Rollover Event,Time Stamp Half Rollover Event,Hardware Time Stamp Push Event,Ethernet Receive Event,Ethernet Transmit Event,?..." newline bitfld.long 0x00 16.--19. "MESSAGE_TYPE,Message type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--15. 1. "SEQUENCE_ID,Sequence ID" else rgroup.long 0x38++0x03 line.long 0x00 "CPTS_EVENT_HIGH,Upper 32-bits of the Event Value" bitfld.long 0x00 24.--28. "PORT_NUMBER,Port Number of an Ethernet Event or the Hardware Push Pin Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20.--23. "EVENT_TYPE,Time Sync Event Type" "Time Stamp Push Event,Time Stamp Rollover Event,Time Stamp Half Rollover Event,Hardware Time Stamp Push Event,Ethernet Receive Event,Ethernet Transmit Event,?..." newline hexmask.long.word 0x00 0.--15. 1. "SEQUENCE_ID,Sequence ID" endif tree.end tree "CPSW_STATS" base ad:0x4A100900 group.long 0x00++0x27 line.long 0x00 "GOODRXFRAMES,The Total Number Of Good Frames Received On The Port" line.long 0x04 "BROADCASTRXFRAMES,The Total Number Of Good Broadcast Frames Received On The Port" line.long 0x08 "MULTICASTRXFRAMES,The Total Number Of Good Multicast Frames Received On The Port" line.long 0x0C "PAUSERXFRAMES,The Total Number Of IEEE 802.3X Pause Frames Received By The Port" line.long 0x10 "RXCRCERRORS,The Total Number Of Frames Received On The Port That Experienced A CRC Error" line.long 0x14 "RXALIGN/CODEERRORS,The Total Number Of Frames Received On The Port That Experienced An Alignment Error Or Code Error" line.long 0x18 "OVERSIZERXFRAMES,The Total Number Of Oversized Frames Received On The Port" line.long 0x1C "RXJABBERS,The Total Number Of Jabber Frames Received On The Port" line.long 0x20 "UNDERSIZERXFRAMES,The Total Number Of Undersized Frames Received On The Port" line.long 0x24 "RXFRAGMENTS,The Total Number Of Frame Fragments Received On The Port" group.long 0x30++0x5F line.long 0x00 "RXOCTETS,The Total Number Of Bytes In All Good Frames Received On The Port" line.long 0x04 "GOODTXFRAMES,The Total Number Of Good Frames Received On The Port" line.long 0x08 "BROADCASTTXFRAMES,The Total Number Of Good Broadcast Frames Received On The Port" line.long 0x0C "MULTICASTTXFRAMES,The Total Number Of Good Multicast Frames Received On The Port" line.long 0x10 "PAUSETXFRAMES,This Statistic Indicates The Number Of IEEE 802.3X Pause Frames Transmitted By The Port" line.long 0x14 "DEFERREDTXFRAMES,The Total Number Of Frames Transmitted On The Port That First Experienced Deferment" line.long 0x18 "COLLISIONS,This Statistic Records The Total Number Of Times That The Port Experienced A Collision" line.long 0x1C "SINGLECOLLISIONTXFRAMES,The Total Number Of Frames Transmitted On The Port That Experienced Exactly One Collision" line.long 0x20 "MULTIPLECOLLISIONTXFRAMES,The Total Number Of Frames Transmitted On The Port That Experienced Multiple Collisions" line.long 0x24 "EXCESSIVECOLLISIONS,The Total Number Of Frames For Which Transmission Was Abandoned Due To Excessive Collisions" line.long 0x28 "LATECOLLISIONS,The Total Number Of Frames On The Port For Which Transmission Was Abandoned Because They Experienced A Late Collision" line.long 0x2C "TXUNDERRUN,Transmitted Frames That Experience Underrun" line.long 0x30 "CARRIERSENSEERRORS,The Total Number Of Frames Received On The Port That Had A CPDMA Middle Of Frame (Mof) Overrun" line.long 0x34 "TXOCTETS,The Total Number Of Bytes In All Good Frames Transmitted On The Port" line.long 0x38 "RXTX64OCTETFRAMES,The Total Number Of 64-byte Frames Received And Transmitted On The Port" line.long 0x3C "RXTX65/127OCTETFRAMES,The Total Number Of Frames Of Size 65 To 127 Bytes Received And Transmitted On The Port" line.long 0x40 "RXTX128/255OCTETFRAMES,The Total Number Of Frames Of Size 128 To 255 Bytes Received And Transmitted On The Port" line.long 0x44 "RXTX256/511OCTETFRAMES,The Total Number Of Frames Of Size 256 To 511 Bytes Received And Transmitted On The Port" line.long 0x48 "RXTX512/1023OCTETFRAMES,The Total Number Of Frames Of Size 512 To 1023 Bytes Received And Transmitted On The Port" line.long 0x4C "RXTX1024UPOCTETFRAMES,The Total Number Of Frames Of Size 1024 To Rx_maxlen Bytes For Receive Or 1024 Up For Transmit On The Port" line.long 0x50 "NETOCTETS,The Total Number Of Bytes Of Frame Data Received And Transmitted On The Port" line.long 0x54 "RXSTARTOFFRAMEOVERRUNS,The Total Number Of Frames Received On The Port That Had A CPDMA Start Of Frame (Sof) Overrun Or Were Dropped By Due To FIFO Resource Limitations" line.long 0x58 "RXMIDDLEOFFRAMEOVERRUNS,The Total Number Of Frames Received On The Port That Had A CPDMA Middle Of Frame (Mof) Overrun" line.long 0x5C "RXDMAOVERRUNS,The Total Number Of Frames Received On The Port That Had Either A DMA Start Of Frame (Sof) Overrun Or A DMA MOF Overrun" tree.end tree "CPSW_STATERAM" base ad:0x4A100A00 group.long 0x0++0x03 line.long 0x00 "TX0_HDP,CPDMA_STATERAM TX Channel 0 Head Desc Pointer" group.long 0x4++0x03 line.long 0x00 "TX1_HDP,CPDMA_STATERAM TX Channel 1 Head Desc Pointer" group.long 0x8++0x03 line.long 0x00 "TX2_HDP,CPDMA_STATERAM TX Channel 2 Head Desc Pointer" group.long 0xC++0x03 line.long 0x00 "TX3_HDP,CPDMA_STATERAM TX Channel 3 Head Desc Pointer" group.long 0x10++0x03 line.long 0x00 "TX4_HDP,CPDMA_STATERAM TX Channel 4 Head Desc Pointer" group.long 0x14++0x03 line.long 0x00 "TX5_HDP,CPDMA_STATERAM TX Channel 5 Head Desc Pointer" group.long 0x18++0x03 line.long 0x00 "TX6_HDP,CPDMA_STATERAM TX Channel 6 Head Desc Pointer" group.long 0x1C++0x03 line.long 0x00 "TX7_HDP,CPDMA_STATERAM TX Channel 7 Head Desc Pointer" group.long 0x20++0x03 line.long 0x00 "RX0_HDP,CPDMA_STATERAM RX Channel 0 Head Desc Pointer" group.long 0x24++0x03 line.long 0x00 "RX1_HDP,CPDMA_STATERAM RX Channel 1 Head Desc Pointer" group.long 0x28++0x03 line.long 0x00 "RX2_HDP,CPDMA_STATERAM RX Channel 2 Head Desc Pointer" group.long 0x2C++0x03 line.long 0x00 "RX3_HDP,CPDMA_STATERAM RX Channel 3 Head Desc Pointer" group.long 0x30++0x03 line.long 0x00 "RX4_HDP,CPDMA_STATERAM RX Channel 4 Head Desc Pointer" group.long 0x34++0x03 line.long 0x00 "RX5_HDP,CPDMA_STATERAM RX Channel 5 Head Desc Pointer" group.long 0x38++0x03 line.long 0x00 "RX6_HDP,CPDMA_STATERAM RX Channel 6 Head Desc Pointer" group.long 0x3C++0x03 line.long 0x00 "RX7_HDP,CPDMA_STATERAM RX Channel 7 Head Desc Pointer" group.long 0x40++0x03 line.long 0x00 "TX0_CP,CPDMA_STATERAM TX Channel 0 Completion Pointer Register" group.long 0x44++0x03 line.long 0x00 "TX1_CP,CPDMA_STATERAM TX Channel 1 Completion Pointer Register" group.long 0x48++0x03 line.long 0x00 "TX2_CP,CPDMA_STATERAM TX Channel 2 Completion Pointer Register" group.long 0x4C++0x03 line.long 0x00 "TX3_CP,CPDMA_STATERAM TX Channel 3 Completion Pointer Register" group.long 0x50++0x03 line.long 0x00 "TX4_CP,CPDMA_STATERAM TX Channel 4 Completion Pointer Register" group.long 0x54++0x03 line.long 0x00 "TX5_CP,CPDMA_STATERAM TX Channel 5 Completion Pointer Register" group.long 0x58++0x03 line.long 0x00 "TX6_CP,CPDMA_STATERAM TX Channel 6 Completion Pointer Register" group.long 0x5C++0x03 line.long 0x00 "TX7_CP,CPDMA_STATERAM TX Channel 7 Completion Pointer Register" group.long 0x60++0x03 line.long 0x00 "RX0_CP,CPDMA_STATERAM RX Channel 0 Completion Pointer Register" group.long 0x64++0x03 line.long 0x00 "RX1_CP,CPDMA_STATERAM RX Channel 1 Completion Pointer Register" group.long 0x68++0x03 line.long 0x00 "RX2_CP,CPDMA_STATERAM RX Channel 2 Completion Pointer Register" group.long 0x6C++0x03 line.long 0x00 "RX3_CP,CPDMA_STATERAM RX Channel 3 Completion Pointer Register" group.long 0x70++0x03 line.long 0x00 "RX4_CP,CPDMA_STATERAM RX Channel 4 Completion Pointer Register" group.long 0x74++0x03 line.long 0x00 "RX5_CP,CPDMA_STATERAM RX Channel 5 Completion Pointer Register" group.long 0x78++0x03 line.long 0x00 "RX6_CP,CPDMA_STATERAM RX Channel 6 Completion Pointer Register" group.long 0x7C++0x03 line.long 0x00 "RX7_CP,CPDMA_STATERAM RX Channel 7 Completion Pointer Register" tree.end tree "CPSW_PORT" base ad:0x4A100100 tree "Port 0" group.long 0x00++0x03 line.long 0x00 "P0_CONTROL,CPSW Port 0 Control Register" bitfld.long 0x00 28.--30. "P0_DLR_CPDMA_CH,Port 0 DLR CPDMA channel" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24. "P0_PASS_PRI_TAGGED,Port 0 pass priority tagged" "Changed,Unchanged" newline bitfld.long 0x00 21. "P0_VLAN_LTYPE2_EN,Port 0 VLAN LTYPE 2 enable" "Disabled,Enabled" bitfld.long 0x00 20. "P0_VLAN_LTYPE1_EN,Port 0 VLAN LTYPE 1 enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "P0_DSCP_PRI_EN,Port 0 DSCP priority enable" "Disabled,Enabled" group.long 0x08++0x03 line.long 0x00 "P0_MAX_BLKS,CPSW Port 0 Maximum FIFO Blocks Register" bitfld.long 0x00 4.--8. "P0_TX_MAX_BLKS,Transmit FIFO maximum blocks" ",,,,,,,,,,,,,,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. "P0_RX_MAX_BLKS,Receive FIFO maximum blocks" ",,,3,4,5,6,?..." rgroup.long 0x0C++0x03 line.long 0x00 "P0_BLK_CNT,CPSW Port 0 FIFO Block Usage Count" bitfld.long 0x00 4.--8. "P0_TX_BLK_CNT,Port 0 transmit block count usage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. "P0_RX_BLK_CNT,Port 0 receive block count usage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x10++0x13 line.long 0x00 "P0_TX_IN_CTL,CPSW Port 0 Transmit FIFO Control" bitfld.long 0x00 20.--23. "TX_RATE_EN,Transmit FIFO input rate enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--17. "TX_IN_SEL,Transmit FIFO input queue type select" "Normal priority,Dual MAC,Rate limit,?..." newline bitfld.long 0x00 12.--15. "TX_BLKS_REM,Transmit FIFO input blocks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--9. 1. "TX_PRI_WDS,Transmit FIFO words in queue" line.long 0x04 "P0_PORT_VLAN,CPSW Port 0 VLAN Register" bitfld.long 0x04 13.--15. "PORT_PRI,Port VLAN priority" "Lowest,1,2,3,4,5,6,Highest" bitfld.long 0x04 12. "PORT_CFI,Port CFI bit" "0,1" newline hexmask.long.word 0x04 0.--11. 1. "PORT_VID,Port VLAN ID" line.long 0x08 "P0_TX_PRI_MAP,CPSW Port 0 TX Header PRI To Switch PRI Mapping Register" bitfld.long 0x08 28.--29. "PRI7,Priority 7" "0,1,2,3" bitfld.long 0x08 24.--25. "PRI6,Priority 6" "0,1,2,3" newline bitfld.long 0x08 20.--21. "PRI5,Priority 5" "0,1,2,3" bitfld.long 0x08 16.--17. "PRI4,Priority 4" "0,1,2,3" newline bitfld.long 0x08 12.--13. "PRI3,Priority 3" "0,1,2,3" bitfld.long 0x08 8.--9. "PRI2,Priority 2" "0,1,2,3" newline bitfld.long 0x08 4.--5. "PRI1,Priority 1" "0,1,2,3" bitfld.long 0x08 0.--1. "PRI0,Priority 0" "0,1,2,3" line.long 0x0C "P0_CPDMA_TX_PRI_MAP,CPSW CPDMA TX (Port 0 RX) PKT Priority To Header Priority" bitfld.long 0x0C 28.--30. "PRI7,Priority 7" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 24.--26. "PRI6,Priority 6" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 20.--22. "PRI5,Priority 5" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 16.--18. "PRI4,Priority 4" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 12.--14. "PRI3,Priority 3" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 8.--10. "PRI2,Priority 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 4.--6. "PRI1,Priority 1" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--2. "PRI0,Priority 0" "0,1,2,3,4,5,6,7" line.long 0x10 "P0_CPDMA_RX_CH_MAP,CPSW CPDMA RX (Port 0 TX) Switch Priority To DMA Channel" bitfld.long 0x10 28.--30. "P2_PRI3,Port 2 priority 3 packets go to this CPDMA rx channel" "0,1,2,3,4,5,6,7" bitfld.long 0x10 24.--26. "P2_PRI2,Port 2 priority 2 packets go to this CPDMA rx channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 20.--22. "P2_PRI1,Port 2 priority 1 packets go to this CPDMA rx channel" "0,1,2,3,4,5,6,7" bitfld.long 0x10 16.--18. "P2_PRI0,Port 2 priority 0 packets go to this CPDMA rx channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 12.--14. "P1_PRI3,Port 1 priority 3 packets go to this CPDMA rx channel" "0,1,2,3,4,5,6,7" bitfld.long 0x10 8.--10. "P1_PRI2,Port 1 priority 2 packets go to this CPDMA rx channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 4.--6. "P1_PRI1,Port 1 priority 1 packets go to this CPDMA rx channel" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "P1_PRI0,Port 1 priority 0 packets go to this CPDMA rx channel" "0,1,2,3,4,5,6,7" group.long 0x30++0x1F line.long 0x00 "P0_RX_DSCP_PRI_MAP0,CPSW Port 0 RX DSCP Priority To RX Packet Mapping Register 0" bitfld.long 0x00 28.--30. "PRI7,Priority 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. "PRI6,Priority 6" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 20.--22. "PRI5,Priority 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. "PRI4,Priority 4" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 12.--14. "PRI3,Priority 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. "PRI2,Priority 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 4.--6. "PRI1,Priority 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. "PRI0,Priority 0" "0,1,2,3,4,5,6,7" line.long 0x04 "P0_RX_DSCP_PRI_MAP1,CPSW Port 0 RX DSCP Priority To RX Packet Mapping Register 1" bitfld.long 0x04 28.--30. "PRI15,Priority 15" "0,1,2,3,4,5,6,7" bitfld.long 0x04 24.--26. "PRI14,Priority 14" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 20.--22. "PRI13,Priority 13" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16.--18. "PRI12,Priority 12" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 12.--14. "PRI11,Priority 11" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8.--10. "PRI10,Priority 10" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 4.--6. "PRI9,Priority 9" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. "PRI98,Priority 8" "0,1,2,3,4,5,6,7" line.long 0x08 "P0_RX_DSCP_PRI_MAP2,CPSW Port 0 RX DSCP Priority To RX Packet Mapping Register 2" bitfld.long 0x08 28.--30. "PRI23,Priority 23" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. "PRI22,Priority 22" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 20.--22. "PRI21,Priority 21" "0,1,2,3,4,5,6,7" bitfld.long 0x08 16.--18. "PRI20,Priority 20" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 12.--14. "PRI19,Priority 19" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. "PRI18,Priority 18" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 4.--6. "PRI17,Priority 17" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. "PRI16,Priority 16" "0,1,2,3,4,5,6,7" line.long 0x0C "P0_RX_DSCP_PRI_MAP3,CPSW Port 0 RX DSCP Priority To RX Packet Mapping Register 3" bitfld.long 0x0C 28.--30. "PRI31,Priority 31" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 24.--26. "PRI30,Priority 30" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 20.--22. "PRI29,Priority 29" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 16.--18. "PRI28,Priority 28" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 12.--14. "PRI27,Priority 27" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 8.--10. "PRI26,Priority 26" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 4.--6. "PRI25,Priority 25" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--2. "PRI24,Priority 24" "0,1,2,3,4,5,6,7" line.long 0x10 "P0_RX_DSCP_PRI_MAP4,CPSW Port 0 RX DSCP Priority To RX Packet Mapping Register 4" bitfld.long 0x10 28.--30. "PRI39,Priority 39" "0,1,2,3,4,5,6,7" bitfld.long 0x10 24.--26. "PRI38,Priority 38" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 20.--22. "PRI37,Priority 37" "0,1,2,3,4,5,6,7" bitfld.long 0x10 16.--18. "PRI36,Priority 36" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 12.--14. "PRI35,Priority 35" "0,1,2,3,4,5,6,7" bitfld.long 0x10 8.--10. "PRI34,Priority 34" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 4.--6. "PRI33,Priority 33" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "PRI32,Priority 32" "0,1,2,3,4,5,6,7" line.long 0x14 "P0_RX_DSCP_PRI_MAP5,CPSW Port 0 RX DSCP Priority To RX Packet Mapping Register 5" bitfld.long 0x14 28.--30. "PRI47,Priority 47" "0,1,2,3,4,5,6,7" bitfld.long 0x14 24.--26. "PRI46,Priority 46" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 20.--22. "PRI45,Priority 45" "0,1,2,3,4,5,6,7" bitfld.long 0x14 16.--18. "PRI44,Priority 44" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 12.--14. "PRI43,Priority 43" "0,1,2,3,4,5,6,7" bitfld.long 0x14 8.--10. "PRI42,Priority 42" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 4.--6. "PRI41,Priority 41" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0.--2. "PRI40,Priority 40" "0,1,2,3,4,5,6,7" line.long 0x18 "P0_RX_DSCP_PRI_MAP6,CPSW Port 0 RX DSCP Priority To RX Packet Mapping Register 6" bitfld.long 0x18 28.--30. "PRI55,Priority 55" "0,1,2,3,4,5,6,7" bitfld.long 0x18 24.--26. "PRI54,Priority 54" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 20.--22. "PRI53,Priority 53" "0,1,2,3,4,5,6,7" bitfld.long 0x18 16.--18. "PRI52,Priority 52" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 12.--14. "PRI51,Priority 51" "0,1,2,3,4,5,6,7" bitfld.long 0x18 8.--10. "PRI50,Priority 50" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 4.--6. "PRI49,Priority 49" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "PRI48,Priority 48" "0,1,2,3,4,5,6,7" line.long 0x1C "P0_RX_DSCP_PRI_MAP7,CPSW Port 0 RX DSCP Priority To RX Packet Mapping Register 7" bitfld.long 0x1C 28.--30. "PRI63,Priority 63" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 24.--26. "PRI62,Priority 62" "0,1,2,3,4,5,6,7" newline bitfld.long 0x1C 20.--22. "PRI61,Priority 61" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 16.--18. "PRI60,Priority 60" "0,1,2,3,4,5,6,7" newline bitfld.long 0x1C 12.--14. "PRI59,Priority 59" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 8.--10. "PRI58,Priority 58" "0,1,2,3,4,5,6,7" newline bitfld.long 0x1C 4.--6. "PRI57,Priority 57" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0.--2. "PRI56,Priority 56" "0,1,2,3,4,5,6,7" tree.end tree "Port 1" group.long 0x100++0x03 line.long 0x00 "P1_CONTROL,CPSW Port 1 Control Register" bitfld.long 0x00 24. "P1_PASS_PRI_TAGGED,Port 1 pass priority tagged" "Changed,Unchanged" bitfld.long 0x00 21. "P1_VLAN_LTYPE2_EN,Port 1 VLAN LTYPE 2 enable" "Disabled,Enabled" newline bitfld.long 0x00 20. "P1_VLAN_LTYPE1_EN,Port 1 VLAN LTYPE 1 enable" "Disabled,Enabled" bitfld.long 0x00 16. "P1_DSCP_PRI_EN,Port 1 DSCP priority enable" "Disabled,Enabled" newline bitfld.long 0x00 14. "P1_TS_320,Port 1 time sync destination port number 320 enable" "Disabled,Enabled" bitfld.long 0x00 13. "P1_TS_319,Port 1 time sync destination port number 319 enable" "Disabled,Enabled" newline bitfld.long 0x00 12. "P1_TS_132,Port 1 time sync destination IP address 132 enable" "Disabled,Enabled" bitfld.long 0x00 11. "P1_TS_131,Port 1 time sync destination IP address 131 enable" "Disabled,Enabled" newline bitfld.long 0x00 10. "P1_TS_130,Port 1 time sync destination IP address 130 enable" "Disabled,Enabled" bitfld.long 0x00 9. "P1_TS_129,Port 1 time sync destination IP address 129 enable" "Disabled,Enabled" newline bitfld.long 0x00 8. "P1_TS_TTL_NONZERO,Port 1 time sync time to live Non-zero enable" "Disabled,Enabled" bitfld.long 0x00 4. "P1_TS_ANNEX_D_EN,Port 1 time sync annex D enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "P1_TS_LTYPE2_EN,Port 1 time sync LTYPE 2 enable" "Disabled,Enabled" bitfld.long 0x00 2. "P1_TS_LTYPE1_EN,Port 1 time sync LTYPE 1 enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "P1_TS_TX_EN,Port 1 time sync transmit enable" "Disabled,Enabled" bitfld.long 0x00 0. "P1_TS_RX_EN,Port 1 time sync receive enable" "Disabled,Enabled" group.long 0x108++0x03 line.long 0x00 "P1_MAX_BLKS,CPSW Port 1 Maximum FIFO Blocks Register" bitfld.long 0x00 4.--8. "P1_TX_MAX_BLKS,Transmit FIFO maximum blocks" ",,,,,,,,,,,,,,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. "P1_RX_MAX_BLKS,Receive FIFO maximum blocks" ",,,3,4,5,6,?..." rgroup.long 0x10C++0x03 line.long 0x00 "P1_BLK_CNT,CPSW Port 1 FIFO Block Usage Count" bitfld.long 0x00 4.--8. "P1_TX_BLK_CNT,Port 1 transmit block count usage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. "P1_RX_BLK_CNT,Port 1 receive block count usage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x110++0x1B line.long 0x00 "P1_TX_IN_CTL,CPSW Port 1 Transmit FIFO Control" bitfld.long 0x00 24.--27. "HOST_BLKS_REM,Transmit FIFO blocks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "TX_RATE_EN,Transmit FIFO input rate enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 16.--17. "TX_IN_SEL,Transmit FIFO input queue type select" "Normal priority,,Rate limit,?..." bitfld.long 0x00 12.--15. "TX_BLKS_REM,Transmit FIFO input blocks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--9. 1. "TX_PRI_WDS,Transmit FIFO words in queue" line.long 0x04 "P1_PORT_VLAN,CPSW Port 1 VLAN Register" bitfld.long 0x04 13.--15. "PORT_PRI,Port VLAN priority" "Lowest,1,2,3,4,5,6,Highest" bitfld.long 0x04 12. "PORT_CFI,Port CFI bit" "0,1" newline hexmask.long.word 0x04 0.--11. 1. "PORT_VID,Port VLAN ID" line.long 0x08 "P1_TX_PRI_MAP,CPSW Port 1 TX Header PRI To Switch PRI Mapping Register" bitfld.long 0x08 28.--29. "PRI7,Priority 7" "0,1,2,3" bitfld.long 0x08 24.--25. "PRI6,Priority 6" "0,1,2,3" newline bitfld.long 0x08 20.--21. "PRI5,Priority 5" "0,1,2,3" bitfld.long 0x08 16.--17. "PRI4,Priority 4" "0,1,2,3" newline bitfld.long 0x08 12.--13. "PRI3,Priority 3" "0,1,2,3" bitfld.long 0x08 8.--9. "PRI2,Priority 2" "0,1,2,3" newline bitfld.long 0x08 4.--5. "PRI1,Priority 1" "0,1,2,3" bitfld.long 0x08 0.--1. "PRI0,Priority 0" "0,1,2,3" line.long 0x0C "P1_TS_SEQ_MTYPE,CPSW Port 1 Time Sync Sequence ID Offset And MSG Type" bitfld.long 0x0C 16.--21. "P1_TS_SEQ_ID_OFFSET,Port 1 time sync sequence ID offset" ",,,,,,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x0C 0.--15. 1. "P1_TS_MSG_TYPE_EN,Port 1 time sync message type enable" line.long 0x10 "P1_SA_LO,CPSW CPGMAC_SL1 Source Address Low Register" hexmask.long.byte 0x10 8.--15. 0x01 "MACSRCADDR_7_0,Source address lower 8 bits (Byte 0)" hexmask.long.byte 0x10 0.--7. 0x01 "MACSRCADDR_15_8,Source address bits 15:8 (Byte 1)" line.long 0x14 "P1_SA_HI,CPSW CPGMAC_SL1 Source Address High Register" hexmask.long.byte 0x14 24.--31. 1. "MACSRCADDR_23_16,Source address bits 23:16 (Byte 2)" hexmask.long.byte 0x14 16.--23. 1. "MACSRCADDR_31_24,Source address bits 31:24 (Byte 3)" newline hexmask.long.byte 0x14 8.--15. 1. "MACSRCADDR_39_32,Source address bits 39:32 (Byte 4)" hexmask.long.byte 0x14 0.--7. 1. "MACSRCADDR_47_40,Source address bits 47:40 (Byte 5)" line.long 0x18 "P1_SEND_PERCENT,CPSW Port 1 Transmit Queue Send Percentages" hexmask.long.byte 0x18 16.--22. 1. "PRI3_SEND_PERCENT,Priority 3 transmit percentage" hexmask.long.byte 0x18 8.--14. 1. "PRI2_SEND_PERCENT,Priority 2 transmit percentage" newline hexmask.long.byte 0x18 0.--6. 1. "PRI1_SEND_PERCENT,Priority 1 transmit percentage" group.long 0x130++0x1F line.long 0x00 "P1_RX_DSCP_PRI_MAP0,CPSW Port 1 RX DSCP Priority To RX Packet Mapping Register 0" bitfld.long 0x00 28.--30. "PRI7,Priority 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. "PRI6,Priority 6" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 20.--22. "PRI5,Priority 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. "PRI4,Priority 4" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 12.--14. "PRI3,Priority 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. "PRI2,Priority 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 4.--6. "PRI1,Priority 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. "PRI0,Priority 0" "0,1,2,3,4,5,6,7" line.long 0x04 "P1_RX_DSCP_PRI_MAP1,CPSW Port 1 RX DSCP Priority To RX Packet Mapping Register 1" bitfld.long 0x04 28.--30. "PRI15,Priority 15" "0,1,2,3,4,5,6,7" bitfld.long 0x04 24.--26. "PRI14,Priority 14" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 20.--22. "PRI13,Priority 13" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16.--18. "PRI12,Priority 12" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 12.--14. "PRI11,Priority 11" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8.--10. "PRI10,Priority 10" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 4.--6. "PRI9,Priority 9" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. "PRI98,Priority 8" "0,1,2,3,4,5,6,7" line.long 0x08 "P1_RX_DSCP_PRI_MAP2,CPSW Port 1 RX DSCP Priority To RX Packet Mapping Register 2" bitfld.long 0x08 28.--30. "PRI23,Priority 23" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. "PRI22,Priority 22" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 20.--22. "PRI21,Priority 21" "0,1,2,3,4,5,6,7" bitfld.long 0x08 16.--18. "PRI20,Priority 20" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 12.--14. "PRI19,Priority 19" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. "PRI18,Priority 18" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 4.--6. "PRI17,Priority 17" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. "PRI16,Priority 16" "0,1,2,3,4,5,6,7" line.long 0x0C "P1_RX_DSCP_PRI_MAP3,CPSW Port 1 RX DSCP Priority To RX Packet Mapping Register 3" bitfld.long 0x0C 28.--30. "PRI31,Priority 31" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 24.--26. "PRI30,Priority 30" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 20.--22. "PRI29,Priority 29" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 16.--18. "PRI28,Priority 28" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 12.--14. "PRI27,Priority 27" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 8.--10. "PRI26,Priority 26" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 4.--6. "PRI25,Priority 25" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--2. "PRI24,Priority 24" "0,1,2,3,4,5,6,7" line.long 0x10 "P1_RX_DSCP_PRI_MAP4,CPSW Port 1 RX DSCP Priority To RX Packet Mapping Register 4" bitfld.long 0x10 28.--30. "PRI39,Priority 39" "0,1,2,3,4,5,6,7" bitfld.long 0x10 24.--26. "PRI38,Priority 38" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 20.--22. "PRI37,Priority 37" "0,1,2,3,4,5,6,7" bitfld.long 0x10 16.--18. "PRI36,Priority 36" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 12.--14. "PRI35,Priority 35" "0,1,2,3,4,5,6,7" bitfld.long 0x10 8.--10. "PRI34,Priority 34" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 4.--6. "PRI33,Priority 33" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "PRI32,Priority 32" "0,1,2,3,4,5,6,7" line.long 0x14 "P1_RX_DSCP_PRI_MAP5,CPSW Port 1 RX DSCP Priority To RX Packet Mapping Register 5" bitfld.long 0x14 28.--30. "PRI47,Priority 47" "0,1,2,3,4,5,6,7" bitfld.long 0x14 24.--26. "PRI46,Priority 46" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 20.--22. "PRI45,Priority 45" "0,1,2,3,4,5,6,7" bitfld.long 0x14 16.--18. "PRI44,Priority 44" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 12.--14. "PRI43,Priority 43" "0,1,2,3,4,5,6,7" bitfld.long 0x14 8.--10. "PRI42,Priority 42" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 4.--6. "PRI41,Priority 41" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0.--2. "PRI40,Priority 40" "0,1,2,3,4,5,6,7" line.long 0x18 "P1_RX_DSCP_PRI_MAP6,CPSW Port 1 RX DSCP Priority To RX Packet Mapping Register 6" bitfld.long 0x18 28.--30. "PRI55,Priority 55" "0,1,2,3,4,5,6,7" bitfld.long 0x18 24.--26. "PRI54,Priority 54" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 20.--22. "PRI53,Priority 53" "0,1,2,3,4,5,6,7" bitfld.long 0x18 16.--18. "PRI52,Priority 52" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 12.--14. "PRI51,Priority 51" "0,1,2,3,4,5,6,7" bitfld.long 0x18 8.--10. "PRI50,Priority 50" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 4.--6. "PRI49,Priority 49" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "PRI48,Priority 48" "0,1,2,3,4,5,6,7" line.long 0x1C "P1_RX_DSCP_PRI_MAP7,CPSW Port 1 RX DSCP Priority To RX Packet Mapping Register 7" bitfld.long 0x1C 28.--30. "PRI63,Priority 63" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 24.--26. "PRI62,Priority 62" "0,1,2,3,4,5,6,7" newline bitfld.long 0x1C 20.--22. "PRI61,Priority 61" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 16.--18. "PRI60,Priority 60" "0,1,2,3,4,5,6,7" newline bitfld.long 0x1C 12.--14. "PRI59,Priority 59" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 8.--10. "PRI58,Priority 58" "0,1,2,3,4,5,6,7" newline bitfld.long 0x1C 4.--6. "PRI57,Priority 57" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0.--2. "PRI56,Priority 56" "0,1,2,3,4,5,6,7" tree.end tree "Port 2" group.long 0x200++0x03 line.long 0x00 "P2_CONTROL,CPSW Port 2 Control Register" bitfld.long 0x00 24. "P2_PASS_PRI_TAGGED,Port 2 pass priority tagged" "Changed,Unchanged" bitfld.long 0x00 21. "P2_VLAN_LTYPE2_EN,Port 2 VLAN LTYPE 2 enable" "Disabled,Enabled" newline bitfld.long 0x00 20. "P2_VLAN_LTYPE1_EN,Port 2 VLAN LTYPE 1 enable" "Disabled,Enabled" bitfld.long 0x00 16. "P2_DSCP_PRI_EN,Port 2 DSCP priority enable" "Disabled,Enabled" newline bitfld.long 0x00 14. "P2_TS_320,Port 2 time sync destination port number 320 enable" "Disabled,Enabled" bitfld.long 0x00 13. "P2_TS_319,Port 2 time sync destination port number 319 enable" "Disabled,Enabled" newline bitfld.long 0x00 12. "P2_TS_132,Port 2 time sync destination IP address 132 enable" "Disabled,Enabled" bitfld.long 0x00 11. "P2_TS_131,Port 2 time sync destination IP address 131 enable" "Disabled,Enabled" newline bitfld.long 0x00 10. "P2_TS_130,Port 2 time sync destination IP address 130 enable" "Disabled,Enabled" bitfld.long 0x00 9. "P2_TS_129,Port 2 time sync destination IP address 129 enable" "Disabled,Enabled" newline bitfld.long 0x00 8. "P2_TS_TTL_NONZERO,Port 2 time sync time to live Non-zero enable" "Disabled,Enabled" bitfld.long 0x00 4. "P2_TS_ANNEX_D_EN,Port 2 time sync annex D enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "P2_TS_LTYPE2_EN,Port 2 time sync LTYPE 2 enable" "Disabled,Enabled" bitfld.long 0x00 2. "P2_TS_LTYPE1_EN,Port 2 time sync LTYPE 1 enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "P2_TS_TX_EN,Port 2 time sync transmit enable" "Disabled,Enabled" bitfld.long 0x00 0. "P2_TS_RX_EN,Port 2 time sync receive enable" "Disabled,Enabled" group.long 0x208++0x03 line.long 0x00 "P2_MAX_BLKS,CPSW Port 2 Maximum FIFO Blocks Register" bitfld.long 0x00 4.--8. "P2_TX_MAX_BLKS,Transmit FIFO maximum blocks" ",,,,,,,,,,,,,,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. "P2_RX_MAX_BLKS,Receive FIFO maximum blocks" ",,,3,4,5,6,?..." rgroup.long 0x20C++0x03 line.long 0x00 "P2_BLK_CNT,CPSW Port 2 FIFO Block Usage Count" bitfld.long 0x00 4.--8. "P2_TX_BLK_CNT,Port 2 transmit block count usage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. "P2_RX_BLK_CNT,Port 2 receive block count usage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x210++0x1B line.long 0x00 "P2_TX_IN_CTL,CPSW Port 2 Transmit FIFO Control" bitfld.long 0x00 24.--27. "HOST_BLKS_REM,Transmit FIFO blocks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "TX_RATE_EN,Transmit FIFO input rate enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 16.--17. "TX_IN_SEL,Transmit FIFO input queue type select" "Normal priority,,Rate limit,?..." bitfld.long 0x00 12.--15. "TX_BLKS_REM,Transmit FIFO input blocks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--9. 1. "TX_PRI_WDS,Transmit FIFO words in queue" line.long 0x04 "P2_PORT_VLAN,CPSW Port 2 VLAN Register" bitfld.long 0x04 13.--15. "PORT_PRI,Port VLAN priority" "Lowest,1,2,3,4,5,6,Highest" bitfld.long 0x04 12. "PORT_CFI,Port CFI bit" "0,1" newline hexmask.long.word 0x04 0.--11. 1. "PORT_VID,Port VLAN ID" line.long 0x08 "P2_TX_PRI_MAP,CPSW Port 2 TX Header PRI To Switch PRI Mapping Register" bitfld.long 0x08 28.--29. "PRI7,Priority 7" "0,1,2,3" bitfld.long 0x08 24.--25. "PRI6,Priority 6" "0,1,2,3" newline bitfld.long 0x08 20.--21. "PRI5,Priority 5" "0,1,2,3" bitfld.long 0x08 16.--17. "PRI4,Priority 4" "0,1,2,3" newline bitfld.long 0x08 12.--13. "PRI3,Priority 3" "0,1,2,3" bitfld.long 0x08 8.--9. "PRI2,Priority 2" "0,1,2,3" newline bitfld.long 0x08 4.--5. "PRI1,Priority 1" "0,1,2,3" bitfld.long 0x08 0.--1. "PRI0,Priority 0" "0,1,2,3" line.long 0x0C "P2_TS_SEQ_MTYPE,CPSW Port 2 Time Sync Sequence ID Offset And MSG Type" bitfld.long 0x0C 16.--21. "P2_TS_SEQ_ID_OFFSET,Port 2 time sync sequence ID offset" ",,,,,,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x0C 0.--15. 1. "P2_TS_MSG_TYPE_EN,Port 2 time sync message type enable" line.long 0x10 "P2_SA_LO,CPSW CPGMAC_SL2 Source Address Low Register" hexmask.long.byte 0x10 8.--15. 0x01 "MACSRCADDR_7_0,Source address lower 8 bits (Byte 0)" hexmask.long.byte 0x10 0.--7. 0x01 "MACSRCADDR_15_8,Source address bits 15:8 (Byte 1)" line.long 0x14 "P2_SA_HI,CPSW CPGMAC_SL2 Source Address High Register" hexmask.long.byte 0x14 24.--31. 1. "MACSRCADDR_23_16,Source address bits 23:16 (Byte 2)" hexmask.long.byte 0x14 16.--23. 1. "MACSRCADDR_31_24,Source address bits 31:24 (Byte 3)" newline hexmask.long.byte 0x14 8.--15. 1. "MACSRCADDR_39_32,Source address bits 39:32 (Byte 4)" hexmask.long.byte 0x14 0.--7. 1. "MACSRCADDR_47_40,Source address bits 47:40 (Byte 5)" line.long 0x18 "P2_SEND_PERCENT,CPSW Port 2 Transmit Queue Send Percentages" hexmask.long.byte 0x18 16.--22. 1. "PRI3_SEND_PERCENT,Priority 3 transmit percentage" hexmask.long.byte 0x18 8.--14. 1. "PRI2_SEND_PERCENT,Priority 2 transmit percentage" newline hexmask.long.byte 0x18 0.--6. 1. "PRI1_SEND_PERCENT,Priority 1 transmit percentage" group.long 0x230++0x1F line.long 0x00 "P2_RX_DSCP_PRI_MAP0,CPSW Port 2 RX DSCP Priority To RX Packet Mapping Register 0" bitfld.long 0x00 28.--30. "PRI7,Priority 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. "PRI6,Priority 6" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 20.--22. "PRI5,Priority 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. "PRI4,Priority 4" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 12.--14. "PRI3,Priority 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. "PRI2,Priority 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 4.--6. "PRI1,Priority 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. "PRI0,Priority 0" "0,1,2,3,4,5,6,7" line.long 0x04 "P2_RX_DSCP_PRI_MAP1,CPSW Port 2 RX DSCP Priority To RX Packet Mapping Register 1" bitfld.long 0x04 28.--30. "PRI15,Priority 15" "0,1,2,3,4,5,6,7" bitfld.long 0x04 24.--26. "PRI14,Priority 14" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 20.--22. "PRI13,Priority 13" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16.--18. "PRI12,Priority 12" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 12.--14. "PRI11,Priority 11" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8.--10. "PRI10,Priority 10" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 4.--6. "PRI9,Priority 9" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. "PRI98,Priority 8" "0,1,2,3,4,5,6,7" line.long 0x08 "P2_RX_DSCP_PRI_MAP2,CPSW Port 2 RX DSCP Priority To RX Packet Mapping Register 2" bitfld.long 0x08 28.--30. "PRI23,Priority 23" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. "PRI22,Priority 22" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 20.--22. "PRI21,Priority 21" "0,1,2,3,4,5,6,7" bitfld.long 0x08 16.--18. "PRI20,Priority 20" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 12.--14. "PRI19,Priority 19" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. "PRI18,Priority 18" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 4.--6. "PRI17,Priority 17" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. "PRI16,Priority 16" "0,1,2,3,4,5,6,7" line.long 0x0C "P2_RX_DSCP_PRI_MAP3,CPSW Port 2 RX DSCP Priority To RX Packet Mapping Register 3" bitfld.long 0x0C 28.--30. "PRI31,Priority 31" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 24.--26. "PRI30,Priority 30" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 20.--22. "PRI29,Priority 29" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 16.--18. "PRI28,Priority 28" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 12.--14. "PRI27,Priority 27" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 8.--10. "PRI26,Priority 26" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 4.--6. "PRI25,Priority 25" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--2. "PRI24,Priority 24" "0,1,2,3,4,5,6,7" line.long 0x10 "P2_RX_DSCP_PRI_MAP4,CPSW Port 2 RX DSCP Priority To RX Packet Mapping Register 4" bitfld.long 0x10 28.--30. "PRI39,Priority 39" "0,1,2,3,4,5,6,7" bitfld.long 0x10 24.--26. "PRI38,Priority 38" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 20.--22. "PRI37,Priority 37" "0,1,2,3,4,5,6,7" bitfld.long 0x10 16.--18. "PRI36,Priority 36" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 12.--14. "PRI35,Priority 35" "0,1,2,3,4,5,6,7" bitfld.long 0x10 8.--10. "PRI34,Priority 34" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 4.--6. "PRI33,Priority 33" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. "PRI32,Priority 32" "0,1,2,3,4,5,6,7" line.long 0x14 "P2_RX_DSCP_PRI_MAP5,CPSW Port 2 RX DSCP Priority To RX Packet Mapping Register 5" bitfld.long 0x14 28.--30. "PRI47,Priority 47" "0,1,2,3,4,5,6,7" bitfld.long 0x14 24.--26. "PRI46,Priority 46" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 20.--22. "PRI45,Priority 45" "0,1,2,3,4,5,6,7" bitfld.long 0x14 16.--18. "PRI44,Priority 44" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 12.--14. "PRI43,Priority 43" "0,1,2,3,4,5,6,7" bitfld.long 0x14 8.--10. "PRI42,Priority 42" "0,1,2,3,4,5,6,7" newline bitfld.long 0x14 4.--6. "PRI41,Priority 41" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0.--2. "PRI40,Priority 40" "0,1,2,3,4,5,6,7" line.long 0x18 "P2_RX_DSCP_PRI_MAP6,CPSW Port 2 RX DSCP Priority To RX Packet Mapping Register 6" bitfld.long 0x18 28.--30. "PRI55,Priority 55" "0,1,2,3,4,5,6,7" bitfld.long 0x18 24.--26. "PRI54,Priority 54" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 20.--22. "PRI53,Priority 53" "0,1,2,3,4,5,6,7" bitfld.long 0x18 16.--18. "PRI52,Priority 52" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 12.--14. "PRI51,Priority 51" "0,1,2,3,4,5,6,7" bitfld.long 0x18 8.--10. "PRI50,Priority 50" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 4.--6. "PRI49,Priority 49" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. "PRI48,Priority 48" "0,1,2,3,4,5,6,7" line.long 0x1C "P2_RX_DSCP_PRI_MAP7,CPSW Port 2 RX DSCP Priority To RX Packet Mapping Register 7" bitfld.long 0x1C 28.--30. "PRI63,Priority 63" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 24.--26. "PRI62,Priority 62" "0,1,2,3,4,5,6,7" newline bitfld.long 0x1C 20.--22. "PRI61,Priority 61" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 16.--18. "PRI60,Priority 60" "0,1,2,3,4,5,6,7" newline bitfld.long 0x1C 12.--14. "PRI59,Priority 59" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 8.--10. "PRI58,Priority 58" "0,1,2,3,4,5,6,7" newline bitfld.long 0x1C 4.--6. "PRI57,Priority 57" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0.--2. "PRI56,Priority 56" "0,1,2,3,4,5,6,7" tree.end tree.end tree "CPSW_SL" tree "CPSW_SL 1" base ad:0x4A100D80 rgroup.long 0x00++0x03 line.long 0x00 "IDVER,CPGMAC_SL ID/Version Register" hexmask.long.word 0x00 16.--31. 1. "IDENT,Rx identification value" bitfld.long 0x00 11.--15. "Z,Rx Z value (X.Y.Z)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "X,Rx X value (Major)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 0.--7. 1. "Y,Rx Y value (Minor)" group.long 0x04++0x03 line.long 0x00 "MACCONTROL,CPGMAC_SL MAC Control Register" bitfld.long 0x00 24. "RX_CMF_EN,RX copy MAC control frames enable" "Disabled,Enabled" bitfld.long 0x00 23. "RX_CSF_EN,RX copy short frames enable" "Disabled,Enabled" newline bitfld.long 0x00 22. "RX_CEF_EN,RX copy error frames enable" "Disabled,Enabled" bitfld.long 0x00 21. "TX_SHORT_GAP_LIM_EN,Transmit short gap limit enable" "Disabled,Enabled" newline bitfld.long 0x00 18. "EXT_EN,Mode of operation" "Forced,In-band" bitfld.long 0x00 17. "GIG_FORCE,Gigabit mode force" "Not force,Forced" newline bitfld.long 0x00 16. "IFCTL_B,Connects to the speed_in input of the respective RMII gasket" "10mbps operation,100mbps operation" bitfld.long 0x00 15. "IFCTL_A,Connects to the speed_in input of the respective RMII gasket" "10mbps operation,100mbps operation" newline bitfld.long 0x00 11. "CMD_IDLE,Command idle" "Not commanded,Commanded" bitfld.long 0x00 10. "TX_SHORT_GAP_EN,Transmit short gap enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "GIG,Gigabit mode" "10/100,Gigabit" bitfld.long 0x00 6. "TX_PACE,Transmit pacing enable" "Disabled,Enabled" newline bitfld.long 0x00 5. "GMII_EN,RX/TX enable for all modes" "Disabled,Enabled" bitfld.long 0x00 4. "TX_FLOW_EN,Transmit flow control enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "RX_FLOW_EN,Receive flow control enable" "Disabled,Enabled" bitfld.long 0x00 2. "MTEST,Manufacturing test mode" "Disabled,Enabled" newline bitfld.long 0x00 1. "LOOPBACK,Loop back mode" "Disabled,Enabled" bitfld.long 0x00 0. "FULLDUPLEX,Full duplex mode" "Half duplex,Full duples" rgroup.long 0x08++0x03 line.long 0x00 "MACSTATUS,CPGMAC_SL MAC Status Register" bitfld.long 0x00 31. "IDLE,CPGMAC_SL IDLE" "Not idle,Idle" bitfld.long 0x00 4. "EXT_GIG,External GIG" "Low,High" newline bitfld.long 0x00 3. "EXT_FULLDUPLEX,External fullduplex" "Low,High" bitfld.long 0x00 1. "RX_FLOW_ACT,Receive flow control active" "Not active,Active" newline bitfld.long 0x00 0. "TX_FLOW_ACT,Transmit flow control active" "Not active,Active" group.long 0x0C++0x07 line.long 0x00 "SOFT_RESET,CPGMAC_SL Soft Reset Register" bitfld.long 0x00 0. "SOFT_RESET,Software reset" "No reset,Reset" line.long 0x04 "RX_MAXLEN,CPGMAC_SL RX Maximum Length Register" hexmask.long.word 0x04 0.--13. 1. "RX_MAXLEN,RX maximum frame length" group.long 0x14++0x03 line.long 0x00 "BOFFTEST,CPGMAC_SL Backoff Test Register" bitfld.long 0x00 26.--30. "PACEVAL,Pacing register current value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 16.--25. 1. "RNDNUM,Backoff random number generator" newline rbitfld.long 0x00 12.--15. "COLL_COUNT,Collision count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--9. 1. "TX_BACKOFF,Backoff count" rgroup.long 0x18++0x07 line.long 0x00 "RX_PAUSE,CPGMAC_SL Receive Pause Timer Register" hexmask.long.word 0x00 16.--31. 1. "RX_PAUSETIMER,RX pause timer value" line.long 0x04 "TX_PAUSE,CPGMAC_SL Transmit Pause Timer Register" hexmask.long.word 0x04 16.--31. 1. "TX_PAUSETIMER,TX pause timer value" group.long 0x20++0x03 line.long 0x00 "EMCONTROL,CPGMAC_SL Emulation Control Register" bitfld.long 0x00 1. "SOFT,Emulation soft bit" "0,1" bitfld.long 0x00 0. "FREE,Emulation free bit" "0,1" group.long 0x24++0x07 line.long 0x00 "RX_PRI_MAP,CPGMAC_SL RX PKT Priority To Header Priority Mapping Register" bitfld.long 0x00 28.--30. "PRI7,Priority 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. "PRI6,Priority 6" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 20.--22. "PRI5,Priority 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. "PRI4,Priority 4" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 12.--14. "PRI3,Priority 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. "PRI2,Priority 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 4.--6. "PRI1,Priority 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. "PRI0,Priority 0" "0,1,2,3,4,5,6,7" line.long 0x04 "TX_GAP,Transmit Inter-Packet Gap Register" hexmask.long.word 0x04 0.--8. 1. "TX_GAP,Transmit Inter-Packet gap" tree.end tree "CPSW_SL 2" base ad:0x4A100DC0 rgroup.long 0x00++0x03 line.long 0x00 "IDVER,CPGMAC_SL ID/Version Register" hexmask.long.word 0x00 16.--31. 1. "IDENT,Rx identification value" bitfld.long 0x00 11.--15. "Z,Rx Z value (X.Y.Z)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "X,Rx X value (Major)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 0.--7. 1. "Y,Rx Y value (Minor)" group.long 0x04++0x03 line.long 0x00 "MACCONTROL,CPGMAC_SL MAC Control Register" bitfld.long 0x00 24. "RX_CMF_EN,RX copy MAC control frames enable" "Disabled,Enabled" bitfld.long 0x00 23. "RX_CSF_EN,RX copy short frames enable" "Disabled,Enabled" newline bitfld.long 0x00 22. "RX_CEF_EN,RX copy error frames enable" "Disabled,Enabled" bitfld.long 0x00 21. "TX_SHORT_GAP_LIM_EN,Transmit short gap limit enable" "Disabled,Enabled" newline bitfld.long 0x00 18. "EXT_EN,Mode of operation" "Forced,In-band" bitfld.long 0x00 17. "GIG_FORCE,Gigabit mode force" "Not force,Forced" newline bitfld.long 0x00 16. "IFCTL_B,Connects to the speed_in input of the respective RMII gasket" "10mbps operation,100mbps operation" bitfld.long 0x00 15. "IFCTL_A,Connects to the speed_in input of the respective RMII gasket" "10mbps operation,100mbps operation" newline bitfld.long 0x00 11. "CMD_IDLE,Command idle" "Not commanded,Commanded" bitfld.long 0x00 10. "TX_SHORT_GAP_EN,Transmit short gap enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "GIG,Gigabit mode" "10/100,Gigabit" bitfld.long 0x00 6. "TX_PACE,Transmit pacing enable" "Disabled,Enabled" newline bitfld.long 0x00 5. "GMII_EN,RX/TX enable for all modes" "Disabled,Enabled" bitfld.long 0x00 4. "TX_FLOW_EN,Transmit flow control enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "RX_FLOW_EN,Receive flow control enable" "Disabled,Enabled" bitfld.long 0x00 2. "MTEST,Manufacturing test mode" "Disabled,Enabled" newline bitfld.long 0x00 1. "LOOPBACK,Loop back mode" "Disabled,Enabled" bitfld.long 0x00 0. "FULLDUPLEX,Full duplex mode" "Half duplex,Full duples" rgroup.long 0x08++0x03 line.long 0x00 "MACSTATUS,CPGMAC_SL MAC Status Register" bitfld.long 0x00 31. "IDLE,CPGMAC_SL IDLE" "Not idle,Idle" bitfld.long 0x00 4. "EXT_GIG,External GIG" "Low,High" newline bitfld.long 0x00 3. "EXT_FULLDUPLEX,External fullduplex" "Low,High" bitfld.long 0x00 1. "RX_FLOW_ACT,Receive flow control active" "Not active,Active" newline bitfld.long 0x00 0. "TX_FLOW_ACT,Transmit flow control active" "Not active,Active" group.long 0x0C++0x07 line.long 0x00 "SOFT_RESET,CPGMAC_SL Soft Reset Register" bitfld.long 0x00 0. "SOFT_RESET,Software reset" "No reset,Reset" line.long 0x04 "RX_MAXLEN,CPGMAC_SL RX Maximum Length Register" hexmask.long.word 0x04 0.--13. 1. "RX_MAXLEN,RX maximum frame length" group.long 0x14++0x03 line.long 0x00 "BOFFTEST,CPGMAC_SL Backoff Test Register" bitfld.long 0x00 26.--30. "PACEVAL,Pacing register current value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 16.--25. 1. "RNDNUM,Backoff random number generator" newline rbitfld.long 0x00 12.--15. "COLL_COUNT,Collision count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--9. 1. "TX_BACKOFF,Backoff count" rgroup.long 0x18++0x07 line.long 0x00 "RX_PAUSE,CPGMAC_SL Receive Pause Timer Register" hexmask.long.word 0x00 16.--31. 1. "RX_PAUSETIMER,RX pause timer value" line.long 0x04 "TX_PAUSE,CPGMAC_SL Transmit Pause Timer Register" hexmask.long.word 0x04 16.--31. 1. "TX_PAUSETIMER,TX pause timer value" group.long 0x20++0x03 line.long 0x00 "EMCONTROL,CPGMAC_SL Emulation Control Register" bitfld.long 0x00 1. "SOFT,Emulation soft bit" "0,1" bitfld.long 0x00 0. "FREE,Emulation free bit" "0,1" group.long 0x24++0x07 line.long 0x00 "RX_PRI_MAP,CPGMAC_SL RX PKT Priority To Header Priority Mapping Register" bitfld.long 0x00 28.--30. "PRI7,Priority 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. "PRI6,Priority 6" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 20.--22. "PRI5,Priority 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. "PRI4,Priority 4" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 12.--14. "PRI3,Priority 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. "PRI2,Priority 2" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 4.--6. "PRI1,Priority 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. "PRI0,Priority 0" "0,1,2,3,4,5,6,7" line.long 0x04 "TX_GAP,Transmit Inter-Packet Gap Register" hexmask.long.word 0x04 0.--8. 1. "TX_GAP,Transmit Inter-Packet gap" tree.end tree.end tree "CPSW_SS" base ad:0x4A100000 rgroup.long 0x00++0x03 line.long 0x00 "ID_VER,ID Version Register" hexmask.long.word 0x00 16.--31. 1. "CPSW_3G_IDENT,3G identification value" bitfld.long 0x00 11.--15. "CPSW_3G_RTL_VER,3G RTL version value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "CPSW_3G_MAJ_VER,3G major version value" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 0.--7. 1. "CPSW_3G_MINOR_VER,3G minor version value" group.long 0x04++0x2F line.long 0x00 "CONTROL,Switch Control Register" bitfld.long 0x00 3. "DLR_EN,DLR enable" "Disabled,Enabled" bitfld.long 0x00 2. "RX_VLAN_ENCAP,Port 0 VLAN encapsulation" "Not encapsulated,Encapsulated" newline bitfld.long 0x00 1. "VLAN_AWARE,VLAN aware mode" "Unwared,Awared" bitfld.long 0x00 0. "FIFO_LOOPBACK,FIFO loopback mode" "Disabled,Enabled" line.long 0x04 "SOFT_RESET,Sofr Reset Register" bitfld.long 0x04 0. "SOFT_RESET,Software reset" "No reset,Reset" line.long 0x08 "STAT_PORT_EN,STATISTICS PORT ENABLE REGISTER" bitfld.long 0x08 2. "P2_STAT_EN,Port 2 (Gmii2 and port 2 FIFO) statistics enable" "Disabled,Enabled" bitfld.long 0x08 1. "P1_STAT_EN,Port 1 (Gmii2 and port 1 FIFO) statistics enable" "Disabled,Enabled" newline bitfld.long 0x08 0. "P0_STAT_EN,Port 0 statistics enable" "Disabled,Enabled" line.long 0x0C "PTYPE,Transmit Priority Type Register" bitfld.long 0x0C 21. "P2_PRI3_SHAPE_EN,Port 2 queue priority 3 transmit shape enable" "Disabled,Enabled" bitfld.long 0x0C 20. "P2_PRI2_SHAPE_EN,Port 2 queue priority 2 transmit shape enable" "Disabled,Enabled" newline bitfld.long 0x0C 19. "P2_PRI1_SHAPE_EN,Port 2 queue priority 1 transmit shape enable" "Disabled,Enabled" bitfld.long 0x0C 18. "P1_PRI3_SHAPE_EN,Port 1 queue priority 3 transmit shape enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. "P1_PRI2_SHAPE_EN,Port 1 queue priority 2 transmit shape enable" "Disabled,Enabled" bitfld.long 0x0C 16. "P1_PRI1_SHAPE_EN,Port 1 queue priority 1 transmit shape enable" "Disabled,Enabled" newline bitfld.long 0x0C 10. "P2_PTYPE_ESC,Port 2 priority type escalate" "Fixed,Escalated" bitfld.long 0x0C 9. "P1_PTYPE_ESC,Port 1 priority type escalate" "Fixed,Escalated" newline bitfld.long 0x0C 8. "P0_PTYPE_ESC,Port 0 priority type escalate" "Fixed,Escalated" bitfld.long 0x0C 0.--4. "ESC_PRI_LD_VAL,Escalate priority load value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x10 "SOFT_IDLE,Software Idle" bitfld.long 0x10 0. "SOFT_IDLE,Software idle" "Not idle,Idle" line.long 0x14 "THRU_RATE,Throughput Rate" bitfld.long 0x14 12.--15. "SL_RX_THRU_RATE,CPGMAC_SL switch FIFO receive through rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 0.--3. "CPDMA_THRU_RATE,CPDMA switch FIFO receive through rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "GAP_THRESH,CPGMAC_SL Short Gap Threshold" bitfld.long 0x18 0.--4. "GAP_THRESH,CPGMAC_SL short gap threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x1C "TX_START_WDS,Transmit Start Words" hexmask.long.word 0x1C 0.--10. 1. "TX_START_WDS,FIFO packet transmit (Egress) start words" line.long 0x20 "FLOW_CONTROL,Flow Control" bitfld.long 0x20 2. "P2_FLOW_EN,Port 2 receive flow control enable" "Disabled,Enabled" bitfld.long 0x20 1. "P1_FLOW_EN,Port 1 receive flow control enable" "Disabled,Enabled" newline bitfld.long 0x20 0. "P0_FLOW_EN,Port 0 receive flow control enable" "Disabled,Enabled" line.long 0x24 "VLAN_LTYPE,LTYPE1 And LTYPE 2 Register" hexmask.long.word 0x24 16.--31. 1. "VLAN_LTYPE2,Time sync VLAN LTYPE2 this VLAN LTYPE value is used for TX ans RX" hexmask.long.word 0x24 0.--15. 1. "VLAN_LTYPE1,Time sync VLAN LTYPE1 this VLAN LTYPE value is used for TX and RX" line.long 0x28 "TS_LTYPE,VLAN_LTYPE1 And VLAN_LTYPE2 Register" bitfld.long 0x28 16.--21. "TS_LTYPE2,Time sync LTYPE2 this is an ethertype value to match for TX and RX time sync packets" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x28 0.--15. 1. "TS_LTYPE1,Time sync LTYPE1 this is an ethertype value to match for TX and RX time sync packets" line.long 0x2C "DLR_LTYPE,DLR LTYPE Register" hexmask.long.word 0x2C 0.--15. 1. "DLR_LTYPE,DLR LTYPE" tree.end tree "CPSW_WR" base ad:0x4A101200 rgroup.long 0x00++0x03 line.long 0x00 "IDVER,Subsystem ID Version Register" bitfld.long 0x00 30.--31. "SCHEME,Scheme value" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "FUNCTION,Function value" newline bitfld.long 0x00 11.--15. "RTL,RTL version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. "MAJOR,Major version" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. "CUSTOM,Custom version" "0,1,2,3" bitfld.long 0x00 0.--5. "MINOR,Minor version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x04++0x0B line.long 0x00 "SOFT_RESET,Subsystem Soft Reset Register" bitfld.long 0x00 0. "SOFT_RESET,Software reset" "No reset,Reset" line.long 0x04 "CONTROL,Subsystem Control Register" bitfld.long 0x04 2.--3. "MMR_STDBYMODE,Configuration of the local initiator state management mode" "Force-standby,No-standby,?..." bitfld.long 0x04 0.--1. "MMR_IDLEMODE,Configuration of the local initiator state management mode" "Force-idle,No-idle,?..." line.long 0x08 "INT_CONTROL,SUBSYSTEM INTERRUPT CONTROL" bitfld.long 0x08 31. "INT_TEST,Interrupt test" "0,1" bitfld.long 0x08 16.--21. "INT_PACE_EN,Interrupt pacing enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline hexmask.long.word 0x08 0.--11. 1. "INT_PRESCALE,Interrupt counter prescaler" group.long 0x10++0x0F line.long 0x00 "C0_RX_THRESH_EN,Subsystem Core 0 Receive Threshold Int Enable Register" hexmask.long.byte 0x00 0.--7. 1. "C0_RX_THRESH_EN,Core 0 receive threshold enable" line.long 0x04 "C0_RX_EN,Subsystem Core 0 Receive Interrupt Enable Register" hexmask.long.byte 0x04 0.--7. 1. "C0_RX_EN,Core 0 receive enable" line.long 0x08 "C0_TX_EN,Subsystem Core 0 Transmit Interrupt Enable Register" hexmask.long.byte 0x08 0.--7. 1. "C0_RX_EN,Core 0 transmit enable" line.long 0x0C "C0_MISC_EN,Subsystem Core 0 MISC Interrupt Enable Register" bitfld.long 0x0C 4. "C0_MISC_EN[4],Core 0 evnt_pend interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 3. "C0_MISC_EN[3],Core 0 stat_pend interrupt enable" "Disabled,Enabled" newline bitfld.long 0x0C 2. "C0_MISC_EN[2],Core 0 host_pend interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 1. "C0_MISC_EN[1],Core 0 mdio_linkint interrupt enable" "Disabled,Enabled" newline bitfld.long 0x0C 0. "C0_MISC_EN[0],Core 0 mdio_userint interrupt enable" "Disabled,Enabled" group.long 0x20++0x0F line.long 0x00 "C1_RX_THRESH_EN,Subsystem Core 1 Receive Threshold Int Enable Register" hexmask.long.byte 0x00 0.--7. 1. "C1_RX_THRESH_EN,Core 1 receive threshold enable" line.long 0x04 "C1_RX_EN,Subsystem Core 1 Receive Interrupt Enable Register" hexmask.long.byte 0x04 0.--7. 1. "C1_RX_EN,Core 1 receive enable" line.long 0x08 "C1_TX_EN,Subsystem Core 1 Transmit Interrupt Enable Register" hexmask.long.byte 0x08 0.--7. 1. "C1_RX_EN,Core 1 transmit enable" line.long 0x0C "C1_MISC_EN,Subsystem Core 1 MISC Interrupt Enable Register" bitfld.long 0x0C 4. "C1_MISC_EN[4],Core 1 evnt_pend interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 3. "C1_MISC_EN[3],Core 1 stat_pend interrupt enable" "Disabled,Enabled" newline bitfld.long 0x0C 2. "C1_MISC_EN[2],Core 1 host_pend interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 1. "C1_MISC_EN[1],Core 1 mdio_linkint interrupt enable" "Disabled,Enabled" newline bitfld.long 0x0C 0. "C1_MISC_EN[0],Core 1 mdio_userint interrupt enable" "Disabled,Enabled" group.long 0x30++0x0F line.long 0x00 "C2_RX_THRESH_EN,Subsystem Core 2 Receive Threshold Int Enable Register" hexmask.long.byte 0x00 0.--7. 1. "C2_RX_THRESH_EN,Core 2 receive threshold enable" line.long 0x04 "C2_RX_EN,Subsystem Core 2 Receive Interrupt Enable Register" hexmask.long.byte 0x04 0.--7. 1. "C2_RX_EN,Core 2 receive enable" line.long 0x08 "C2_TX_EN,Subsystem Core 2 Transmit Interrupt Enable Register" hexmask.long.byte 0x08 0.--7. 1. "C2_RX_EN,Core 2 transmit enable" line.long 0x0C "C2_MISC_EN,Subsystem Core 2 MISC Interrupt Enable Register" bitfld.long 0x0C 4. "C2_MISC_EN[4],Core 2 evnt_pend interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 3. "C2_MISC_EN[3],Core 2 stat_pend interrupt enable" "Disabled,Enabled" newline bitfld.long 0x0C 2. "C2_MISC_EN[2],Core 2 host_pend interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 1. "C2_MISC_EN[1],Core 2 mdio_linkint interrupt enable" "Disabled,Enabled" newline bitfld.long 0x0C 0. "C2_MISC_EN[0],Core 2 mdio_userint interrupt enable" "Disabled,Enabled" rgroup.long 0x40++0x0F line.long 0x00 "C0_RX_THRESH_STAT,Subsystem Core 0 Receive Threshold Masked Int Status Register" hexmask.long.byte 0x00 0.--7. 1. "C0_RX_THRESH_STAT,Core 0 receive threshold masked interrupt status" line.long 0x04 "C0_RX_STAT,Subsystem Core 0 Receive Interrupt Masked Int Status Register" hexmask.long.byte 0x04 0.--7. 1. "C0_RX_STAT,Core 0 receive masked interrupt status" line.long 0x08 "C0_TX_STAT,Subsystem Core 0 Transmit Interrupt Masked Int Status Register" hexmask.long.byte 0x08 0.--7. 1. "C0_TX_STAT,Core 0 transmit masked interrupt status" line.long 0x0C "C0_MISC_STAT,Subsystem Core 0 MISC Interrupt Masked Int Status Register" bitfld.long 0x0C 4. "C0_MISC_STAT[4],Core 0 evnt_pend masked interrupt status" "No interrupt,Interrupt" bitfld.long 0x0C 3. "C0_MISC_STAT[3],Core 0 stat_pend masked interrupt status" "No interrupt,Interrupt" newline bitfld.long 0x0C 2. "C0_MISC_STAT[2],Core 0 host_pend masked interrupt status" "No interrupt,Interrupt" bitfld.long 0x0C 1. "C0_MISC_STAT[1],Core 0 mdio_linkint masked interrupt status" "No interrupt,Interrupt" newline bitfld.long 0x0C 0. "C0_MISC_STAT[0],Core 0 mdio_userint masked interrupt status" "No interrupt,Interrupt" rgroup.long 0x50++0x0F line.long 0x00 "C1_RX_THRESH_STAT,Subsystem Core 1 Receive Threshold Masked Int Status Register" hexmask.long.byte 0x00 0.--7. 1. "C1_RX_THRESH_STAT,Core 1 receive threshold masked interrupt status" line.long 0x04 "C1_RX_STAT,Subsystem Core 1 Receive Interrupt Masked Int Status Register" hexmask.long.byte 0x04 0.--7. 1. "C1_RX_STAT,Core 1 receive masked interrupt status" line.long 0x08 "C1_TX_STAT,Subsystem Core 1 Transmit Interrupt Masked Int Status Register" hexmask.long.byte 0x08 0.--7. 1. "C1_TX_STAT,Core 1 transmit masked interrupt status" line.long 0x0C "C1_MISC_STAT,Subsystem Core 1 MISC Interrupt Masked Int Status Register" bitfld.long 0x0C 4. "C1_MISC_STAT[4],Core 1 evnt_pend masked interrupt status" "No interrupt,Interrupt" bitfld.long 0x0C 3. "C1_MISC_STAT[3],Core 1 stat_pend masked interrupt status" "No interrupt,Interrupt" newline bitfld.long 0x0C 2. "C1_MISC_STAT[2],Core 1 host_pend masked interrupt status" "No interrupt,Interrupt" bitfld.long 0x0C 1. "C1_MISC_STAT[1],Core 1 mdio_linkint masked interrupt status" "No interrupt,Interrupt" newline bitfld.long 0x0C 0. "C1_MISC_STAT[0],Core 1 mdio_userint masked interrupt status" "No interrupt,Interrupt" rgroup.long 0x60++0x0F line.long 0x00 "C2_RX_THRESH_STAT,Subsystem Core 2 Receive Threshold Masked Int Status Register" hexmask.long.byte 0x00 0.--7. 1. "C2_RX_THRESH_STAT,Core 2 receive threshold masked interrupt status" line.long 0x04 "C2_RX_STAT,Subsystem Core 2 Receive Interrupt Masked Int Status Register" hexmask.long.byte 0x04 0.--7. 1. "C2_RX_STAT,Core 2 receive masked interrupt status" line.long 0x08 "C2_TX_STAT,Subsystem Core 2 Transmit Interrupt Masked Int Status Register" hexmask.long.byte 0x08 0.--7. 1. "C2_TX_STAT,Core 2 transmit masked interrupt status" line.long 0x0C "C2_MISC_STAT,Subsystem Core 2 MISC Interrupt Masked Int Status Register" bitfld.long 0x0C 4. "C2_MISC_STAT[4],Core 2 evnt_pend masked interrupt status" "No interrupt,Interrupt" bitfld.long 0x0C 3. "C2_MISC_STAT[3],Core 2 stat_pend masked interrupt status" "No interrupt,Interrupt" newline bitfld.long 0x0C 2. "C2_MISC_STAT[2],Core 2 host_pend masked interrupt status" "No interrupt,Interrupt" bitfld.long 0x0C 1. "C2_MISC_STAT[1],Core 2 mdio_linkint masked interrupt status" "No interrupt,Interrupt" newline bitfld.long 0x0C 0. "C2_MISC_STAT[0],Core 2 mdio_userint masked interrupt status" "No interrupt,Interrupt" group.long 0x70++0x07 line.long 0x00 "C0_RX_IMAX,Subsystem Core 0 Receive Interrupts Per Millisecond Register" bitfld.long 0x00 0.--5. "C0_RX_IMAX,Core 0 receive interrupts per millisecond" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "C0_TX_IMAX,Subsystem Core 0 Transmit Interrupts Per Millisecond Register" bitfld.long 0x04 0.--5. "C0_TX_IMAX,Core 0 transmit interrupts per millisecond" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x78++0x07 line.long 0x00 "C1_RX_IMAX,Subsystem Core 1 Receive Interrupts Per Millisecond Register" bitfld.long 0x00 0.--5. "C1_RX_IMAX,Core 1 receive interrupts per millisecond" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "C1_TX_IMAX,Subsystem Core 1 Transmit Interrupts Per Millisecond Register" bitfld.long 0x04 0.--5. "C1_TX_IMAX,Core 1 transmit interrupts per millisecond" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x80++0x07 line.long 0x00 "C2_RX_IMAX,Subsystem Core 2 Receive Interrupts Per Millisecond Register" bitfld.long 0x00 0.--5. "C2_RX_IMAX,Core 2 receive interrupts per millisecond" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "C2_TX_IMAX,Subsystem Core 2 Transmit Interrupts Per Millisecond Register" bitfld.long 0x04 0.--5. "C2_TX_IMAX,Core 2 transmit interrupts per millisecond" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0x88++0x03 line.long 0x00 "RGMII_CTL,RGMII_CTL Register" bitfld.long 0x00 7. "RGMII2_FULLDUPLEX,RGMII 2 Fullduplex" "Half-duplex,Fullduplex" bitfld.long 0x00 5.--6. "RGMII2_SPEED,RGMII2 Speed" "10 Mbps,100 Mbps,1000 Mbps,?..." newline bitfld.long 0x00 4. "RGMII2_LINK,RGMII2 Link Indicator" "RGMII2 link is down,RGMII2 link is up" bitfld.long 0x00 3. "RGMII1_FULLDUPLEX,RGMII1 Fullduplex" "Half-duplex,Fullduplex" newline bitfld.long 0x00 1.--2. "RGMII1_SPEED,RGMII1 Speed" "10 Mbps,100 Mbps,1000 Mbps,?..." bitfld.long 0x00 0. "RGMII1_LINK,RGMII1 Link Indicator" "RGMII2 link is down,?..." tree.end tree "MDIO" base ad:0x4A101000 rgroup.long 0x00++0x17 line.long 0x00 "MDIOVER," hexmask.long.word 0x00 16.--31. 1. "MODID,Identifies type of peripheral" hexmask.long.byte 0x00 8.--15. 1. "REVMAJ,Management interface module major revision value" hexmask.long.byte 0x00 0.--7. 1. "REVMIN,Management interface module minor revision value" line.long 0x04 "MDIOCONTROL," rbitfld.long 0x04 31. "IDLE,MDIO state machine IDLE" "0,1" bitfld.long 0x04 30. "ENABLE,Enable control" "0,1" rbitfld.long 0x04 29. "Reserved1," "0,1" rbitfld.long 0x04 24.--28. "HIGHEST_USER_CHANNEL,Highest user channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x04 21.--23. "Reserved2," "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 20. "PREAMBLE,Preamble disable" "0,1" bitfld.long 0x04 19. "FAULT,Fault indicator" "0,1" bitfld.long 0x04 18. "FAULTENB,Fault detect enable" "0,1" bitfld.long 0x04 17. "INTTESTENB,Interrupt test enable" "0,1" rbitfld.long 0x04 16. "Reserved3," "0,1" newline hexmask.long.word 0x04 0.--15. 1. "CLKDIV,Clock divider" line.long 0x08 "MDIOALIVE," line.long 0x0C "MDIOLINK," line.long 0x10 "MDIOLINKINTRAW," hexmask.long 0x10 2.--31. 1. "Reserved1," bitfld.long 0x10 0.--1. "LINKINTRAW,MDIO link change event raw value" "0,1,2,3" line.long 0x14 "MDIOLINKINTMASKED," hexmask.long 0x14 2.--31. 1. "Reserved1," bitfld.long 0x14 0.--1. "LINKINTMASKED,MDIO link change interrupt masked value" "0,1,2,3" group.long 0x20++0x0F line.long 0x00 "MDIOUSERINTRAW," hexmask.long 0x00 2.--31. 1. "Reserved1," bitfld.long 0x00 0.--1. "USERINTRAW,Raw value of MDIO user command complete event for the MDIOUSERACCESS1 register through the MDIOUSERACCESS0 register respectively" "0,1,2,3" line.long 0x04 "MDIOUSERINTMASKED," hexmask.long 0x04 2.--31. 1. "Reserved1," bitfld.long 0x04 0.--1. "USERINTMASKED,Masked value of MDIO user command complete interrupt for the MDIOUSERACCESS1 register through the MDIOUSERACCESS0 register respectively" "0,1,2,3" line.long 0x08 "MDIOUSERINTMASKSET," hexmask.long 0x08 2.--31. 1. "Reserved1," bitfld.long 0x08 0.--1. "USERINTMASKSET,MDIO user interrupt mask set for USERINTMASKED respectively" "0,1,2,3" line.long 0x0C "MDIOUSERINTMASKCLR," hexmask.long 0x0C 2.--31. 1. "Reserved1," bitfld.long 0x0C 0.--1. "USERINTMASKCLEAR,MDIO user command complete interrupt mask clear for USERINTMASKED respectively" "0,1,2,3" group.long 0x80++0x0F line.long 0x00 "MDIOUSERACCESS0," bitfld.long 0x00 31. "GO,Go" "0,1" bitfld.long 0x00 30. "WRITE,Write enable" "0,1" bitfld.long 0x00 29. "ACK,Acknowledge" "0,1" rbitfld.long 0x00 26.--28. "Reserved1," "0,1,2,3,4,5,6,7" bitfld.long 0x00 21.--25. "REGADR,Register address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 16.--20. "PHYADR,PHY address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 0.--15. 1. "DATA,User data" line.long 0x04 "MDIOUSERPHYSEL0," hexmask.long.tbyte 0x04 8.--31. 1. "Reserved1," bitfld.long 0x04 7. "LINKSEL,Link status determination select" "0,1" bitfld.long 0x04 6. "LINKINTENB,Link change interrupt enable" "0,1" rbitfld.long 0x04 5. "Reserved2," "0,1" bitfld.long 0x04 0.--4. "PHYADDRMON,PHY address whose link status is to be monitored" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "MDIOUSERACCESS1," bitfld.long 0x08 31. "GO,Writing a 1 to this bit causes the MDIO state machine to perform an MDIO access when it is convenient for it to do so this is not an instantaneous process" "0,1" bitfld.long 0x08 30. "WRITE,Write enable" "0,1" bitfld.long 0x08 29. "ACK,Acknowledge" "0,1" rbitfld.long 0x08 26.--28. "Reserved1," "0,1,2,3,4,5,6,7" bitfld.long 0x08 21.--25. "REGADR,Register address; specifies the PHY register to be accessed for this transaction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 16.--20. "PHYADR,PHY address; specifies the PHY to be accesses for this transaction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x08 0.--15. 1. "DATA,User data" line.long 0x0C "MDIOUSERPHYSEL1," hexmask.long.tbyte 0x0C 8.--31. 1. "Reserved1," bitfld.long 0x0C 7. "LINKSEL,Link status determination select" "0,1" bitfld.long 0x0C 6. "LINKINTENB,Link change interrupt enable" "0,1" rbitfld.long 0x0C 5. "Reserved2," "0,1" bitfld.long 0x0C 0.--4. "PHYADDRMON,PHY address whose link status is to be monitored" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end tree.end tree "PWMSS (Pulse-Width Modulation Subsystem)" tree "PWMSS" tree "PWMSS0" base ad:0x48300000 rgroup.long 0x00++0x03 line.long 0x00 "IDVER,IP Revision Register" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between the old scheme and current" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "FUNC,Func" bitfld.long 0x00 11.--15. "R_RTL,RTL version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "X_MAJOR,Major revision (X)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "CUSTOM,Custom" "0,1,2,3" bitfld.long 0x00 0.--5. "Y_MINOR,Minor revision (Y)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x04++0x07 line.long 0x00 "SYSCONFIG,System Configuration Register" bitfld.long 0x00 4.--5. "STANDBYMODE,Configuration of the local initiator state management mode" "Force-standby,No-standby,Smart-standby,?..." bitfld.long 0x00 2.--3. "IDLEMODE,Configuration of the local target state management mode" "Force-idle,No-idle,Smart-idle,?..." bitfld.long 0x00 1. "FREEEMU,Sensitivity to emulation (Debug) suspend event from debug subsystem" "Sensitive,Not sensitive" newline bitfld.long 0x00 0. "SOFTRESET,Software reset (Optional)" "No reset,Reset" line.long 0x04 "CLKCONFIG,Clock Configuration Register" bitfld.long 0x04 9. "EPWMCLKSTOP_REQ,Controls the clkstop_req input to the epwm module" "Not requested,Requested" bitfld.long 0x04 8. "EPWMCLK_EN,Controls the clk_en input to the epwm module" "Disabled,Enabled" bitfld.long 0x04 5. "EQEPCLKSTOP_REQ,Controls the clkstop_req input to the eqep module" "Not requested,Requested" newline bitfld.long 0x04 4. "EQEPCLK_EN,Controls the clk_en input to the eqep module" "Disabled,Enabled" bitfld.long 0x04 1. "ECAPCLKSTOP_REQ,Controls the clkstop_req input to the ecap module" "Not requested,Requested" bitfld.long 0x04 0. "ECAPCLK_EN,Controls the clk_en input to the ecap module" "Disabled,Enabled" rgroup.long 0x0C++0x03 line.long 0x00 "CLKSTATUS,Clock Status Register" bitfld.long 0x00 9. "EPWM_CLKSTOP_ACK,CLKSTOP_REQ_ACK status output of the epwm module" "Not requested,Requested" bitfld.long 0x00 8. "EPWM_CLK_EN_ACK,CLK_EN status output of the epwm module" "Disabled,Enabled" bitfld.long 0x00 5. "EQEP_CLKSTOP_ACK,CLKSTOP_REQ_ACK status output of the eqep module" "Not requested,Requested" newline bitfld.long 0x00 4. "EQEP_CLK_EN_ACK,CLK_EN status output of the eqep module" "Disabled,Enabled" bitfld.long 0x00 1. "ECAP_CLKSTOP_ACK,CLKSTOP_REQ_ACK status output of the ecap module" "Not requested,Requested" bitfld.long 0x00 0. "ECAP_CLK_EN_ACK,CLK_EN status output of the ecap module" "Disabled,Enabled" tree.end tree "PWMSS1" base ad:0x48302000 rgroup.long 0x00++0x03 line.long 0x00 "IDVER,IP Revision Register" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between the old scheme and current" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "FUNC,Func" bitfld.long 0x00 11.--15. "R_RTL,RTL version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "X_MAJOR,Major revision (X)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "CUSTOM,Custom" "0,1,2,3" bitfld.long 0x00 0.--5. "Y_MINOR,Minor revision (Y)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x04++0x07 line.long 0x00 "SYSCONFIG,System Configuration Register" bitfld.long 0x00 4.--5. "STANDBYMODE,Configuration of the local initiator state management mode" "Force-standby,No-standby,Smart-standby,?..." bitfld.long 0x00 2.--3. "IDLEMODE,Configuration of the local target state management mode" "Force-idle,No-idle,Smart-idle,?..." bitfld.long 0x00 1. "FREEEMU,Sensitivity to emulation (Debug) suspend event from debug subsystem" "Sensitive,Not sensitive" newline bitfld.long 0x00 0. "SOFTRESET,Software reset (Optional)" "No reset,Reset" line.long 0x04 "CLKCONFIG,Clock Configuration Register" bitfld.long 0x04 9. "EPWMCLKSTOP_REQ,Controls the clkstop_req input to the epwm module" "Not requested,Requested" bitfld.long 0x04 8. "EPWMCLK_EN,Controls the clk_en input to the epwm module" "Disabled,Enabled" bitfld.long 0x04 5. "EQEPCLKSTOP_REQ,Controls the clkstop_req input to the eqep module" "Not requested,Requested" newline bitfld.long 0x04 4. "EQEPCLK_EN,Controls the clk_en input to the eqep module" "Disabled,Enabled" bitfld.long 0x04 1. "ECAPCLKSTOP_REQ,Controls the clkstop_req input to the ecap module" "Not requested,Requested" bitfld.long 0x04 0. "ECAPCLK_EN,Controls the clk_en input to the ecap module" "Disabled,Enabled" rgroup.long 0x0C++0x03 line.long 0x00 "CLKSTATUS,Clock Status Register" bitfld.long 0x00 9. "EPWM_CLKSTOP_ACK,CLKSTOP_REQ_ACK status output of the epwm module" "Not requested,Requested" bitfld.long 0x00 8. "EPWM_CLK_EN_ACK,CLK_EN status output of the epwm module" "Disabled,Enabled" bitfld.long 0x00 5. "EQEP_CLKSTOP_ACK,CLKSTOP_REQ_ACK status output of the eqep module" "Not requested,Requested" newline bitfld.long 0x00 4. "EQEP_CLK_EN_ACK,CLK_EN status output of the eqep module" "Disabled,Enabled" bitfld.long 0x00 1. "ECAP_CLKSTOP_ACK,CLKSTOP_REQ_ACK status output of the ecap module" "Not requested,Requested" bitfld.long 0x00 0. "ECAP_CLK_EN_ACK,CLK_EN status output of the ecap module" "Disabled,Enabled" tree.end tree "PWMSS2" base ad:0x48304000 rgroup.long 0x00++0x03 line.long 0x00 "IDVER,IP Revision Register" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between the old scheme and current" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "FUNC,Func" bitfld.long 0x00 11.--15. "R_RTL,RTL version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "X_MAJOR,Major revision (X)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "CUSTOM,Custom" "0,1,2,3" bitfld.long 0x00 0.--5. "Y_MINOR,Minor revision (Y)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x04++0x07 line.long 0x00 "SYSCONFIG,System Configuration Register" bitfld.long 0x00 4.--5. "STANDBYMODE,Configuration of the local initiator state management mode" "Force-standby,No-standby,Smart-standby,?..." bitfld.long 0x00 2.--3. "IDLEMODE,Configuration of the local target state management mode" "Force-idle,No-idle,Smart-idle,?..." bitfld.long 0x00 1. "FREEEMU,Sensitivity to emulation (Debug) suspend event from debug subsystem" "Sensitive,Not sensitive" newline bitfld.long 0x00 0. "SOFTRESET,Software reset (Optional)" "No reset,Reset" line.long 0x04 "CLKCONFIG,Clock Configuration Register" bitfld.long 0x04 9. "EPWMCLKSTOP_REQ,Controls the clkstop_req input to the epwm module" "Not requested,Requested" bitfld.long 0x04 8. "EPWMCLK_EN,Controls the clk_en input to the epwm module" "Disabled,Enabled" bitfld.long 0x04 5. "EQEPCLKSTOP_REQ,Controls the clkstop_req input to the eqep module" "Not requested,Requested" newline bitfld.long 0x04 4. "EQEPCLK_EN,Controls the clk_en input to the eqep module" "Disabled,Enabled" bitfld.long 0x04 1. "ECAPCLKSTOP_REQ,Controls the clkstop_req input to the ecap module" "Not requested,Requested" bitfld.long 0x04 0. "ECAPCLK_EN,Controls the clk_en input to the ecap module" "Disabled,Enabled" rgroup.long 0x0C++0x03 line.long 0x00 "CLKSTATUS,Clock Status Register" bitfld.long 0x00 9. "EPWM_CLKSTOP_ACK,CLKSTOP_REQ_ACK status output of the epwm module" "Not requested,Requested" bitfld.long 0x00 8. "EPWM_CLK_EN_ACK,CLK_EN status output of the epwm module" "Disabled,Enabled" bitfld.long 0x00 5. "EQEP_CLKSTOP_ACK,CLKSTOP_REQ_ACK status output of the eqep module" "Not requested,Requested" newline bitfld.long 0x00 4. "EQEP_CLK_EN_ACK,CLK_EN status output of the eqep module" "Disabled,Enabled" bitfld.long 0x00 1. "ECAP_CLKSTOP_ACK,CLKSTOP_REQ_ACK status output of the ecap module" "Not requested,Requested" bitfld.long 0x00 0. "ECAP_CLK_EN_ACK,CLK_EN status output of the ecap module" "Disabled,Enabled" tree.end tree.end tree "ePWM" tree "ePWM0" base ad:0x48300200 group.word 0x00++0x0B line.word 0x00 "TBCTL,Time-Base Control Register" bitfld.word 0x00 14.--15. "FREE_SOFT,Emulation mode bits" "Stop after the next time-base counter INC/DEC,Stop when counter completes a whole cycle,Free-running,Free-running" bitfld.word 0x00 13. "PHSDIR,Phase direction bit" "Count down,Count down" bitfld.word 0x00 10.--12. "CLKDIV,Time-base clock prescale bits" "/1,/2,/4,/8,/16,/32,/64,/128" newline bitfld.word 0x00 7.--9. "HSPCLKDIV,High-Speed Time-base clock prescale bits" "/1,/2,/4,/6,/8,/10,/12,/14" bitfld.word 0x00 6. "SWFSYNC,Software forced synchronization pulse" "No effect,Forced" bitfld.word 0x00 4.--5. "SYNCOSEL,Synchronization output select" "Epwmxsync,CTR = 0,CTR = CMPB,Disabled" newline bitfld.word 0x00 3. "PRDLD,Active period register load from shadow register disable" "No,Yes" bitfld.word 0x00 2. "PHSEN,Counter register load from phase register enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. "CTRMODE,Counter mode" "Up-count,Down-count,Up-down-count,Stop-freeze counter operation" line.word 0x02 "TBSTS,Time-Base Status Register" eventfld.word 0x02 2. "CTRMAX,Time-Base counter max latched status bit" "Not reached,Reached" eventfld.word 0x02 1. "SYNCI,Input synchronization latched status bit" "Not occured,Occured" rbitfld.word 0x02 0. "CTRDIR,Time-Base counter direction status bit" "Counting down,Counting up" line.word 0x04 "TBPHSHR,Extension For HRPWM Phase Register" hexmask.word.byte 0x04 8.--15. 1. "TBPHSH,Time-base phase high-resolution bits" line.word 0x06 "TBPHS,Time-Base Phase Register" line.word 0x08 "TBCNT,Time-Base Counter Register" line.word 0x0A "TBPRD,Time-Base Period Register" group.word 0x0E++0x03 line.word 0x00 "CMPCTL,Counter-Compare Control Register" rbitfld.word 0x00 9. "SHDWBFULL,Counter-compare B (Cmpb) shadow register full status flag" "Not full,Full" rbitfld.word 0x00 8. "SHDWAFULL,Counter-compare A (Cmpa) shadow register full status flag" "Not full,Full" bitfld.word 0x00 6. "SHDWBMODE,Counter-compare B (Cmpb) register operating mode" "Shadow,Immediate" newline bitfld.word 0x00 4. "SHDWAMODE,Counter-compare A (Cmpa) register operating mode" "Shadow,Immediate" bitfld.word 0x00 2.--3. "LOADBMODE,Active Counter-Compare B (Cmpb) load from shadow select mode" "CTR = 0,CTR = PRD,CTR = 0 or CTR = PRD,Freeze" bitfld.word 0x00 0.--1. "LOADAMODE,Active Counter-Compare A (Cmpa) load from shadow select mode" "CTR = 0,CTR = PRD,CTR = 0 or CTR = PRD,Freeze" line.word 0x02 "CMPAHR,Extension For HRPWM Counter-Compare A Register" hexmask.word.byte 0x02 8.--15. 1. "CMPAHR,Compare A High-Resolution register bits for MEP step control" group.word 0x12++0x03 line.word 0x00 "CMPA,Counter-Compare A Register" line.word 0x02 "AQCTLA,Action-Qualifier Control Register For Output A (EpwmxA)" bitfld.word 0x02 10.--11. "CBD,Action when the time-base counter equals the active CMPB register and the counter is decrementing" "No action,Clear,Set,Toggle" bitfld.word 0x02 8.--9. "CBU,Action when the counter equals the active CMPB register and the counter is incrementing" "No action,Clear,Set,Toggle" bitfld.word 0x02 6.--7. "CAD,Action when the counter equals the active CMPA register and the counter is decrementing" "No action,Clear,Set,Toggle" newline bitfld.word 0x02 4.--5. "CAU,Action when the counter equals the active CMPA register and the counter is incrementing" "No action,Clear,Set,Toggle" bitfld.word 0x02 2.--3. "PRD,Action when the counter equals the period" "No action,Clear,Set,Toggle" bitfld.word 0x02 0.--1. "ZRO,Action when counter equals zero" "No action,Clear,Set,Toggle" group.word 0x16++0x03 line.word 0x00 "CMPB,Counter-Compare B Register" line.word 0x02 "AQCTLB,Action-Qualifier Control Register For Output B (EpwmxB)" bitfld.word 0x02 10.--11. "CBD,Action when the time-base counter equals the active CMPB register and the counter is decrementing" "No action,Clear,Set,Toggle" bitfld.word 0x02 8.--9. "CBU,Action when the counter equals the active CMPB register and the counter is incrementing" "No action,Clear,Set,Toggle" bitfld.word 0x02 6.--7. "CAD,Action when the counter equals the active CMPA register and the counter is decrementing" "No action,Clear,Set,Toggle" newline bitfld.word 0x02 4.--5. "CAU,Action when the counter equals the active CMPA register and the counter is incrementing" "No action,Clear,Set,Toggle" bitfld.word 0x02 2.--3. "PRD,Action when the counter equals the period" "No action,Clear,Set,Toggle" bitfld.word 0x02 0.--1. "ZRO,Action when counter equals zero" "No action,Clear,Set,Toggle" group.word 0x1A++0x0B line.word 0x00 "AQSFRC,Action-Qualifier Software Force Register" bitfld.word 0x00 6.--7. "RLDCSF,AQCSFRC active register reload from shadow options" "Zero,Period,Zero or period,Load immediately" bitfld.word 0x00 5. "OTSFB,One-Time software forced event on output B" "No effect,Enabled" bitfld.word 0x00 3.--4. "ACTSFB,Action when One-Time software force B is invoked" "No action,Clear,Set,Toggle" newline bitfld.word 0x00 2. "OTSFA,One-Time software forced event on output A" "No effect,Enabled" bitfld.word 0x00 0.--1. "ACTSFA,Action when One-Time software force A is invoked" "No action,Clear,Set,Toggle" line.word 0x02 "AQCSFRC,Action-Qualifier Continuous S/W Force Register Set" bitfld.word 0x02 2.--3. "CSFB,Continuous software force on output B" "Disabled,Continuous low,Continuous high,Disabled" bitfld.word 0x02 0.--1. "CSFA,Continuous software force on output A" "Disabled,Continuous low,Continuous high,Disabled" line.word 0x04 "DBCTL,Dead-Band Generator Control Register" bitfld.word 0x04 4.--5. "IN_MODE,Dead band input mode control" "Epwmxa both edges,Epwmxa falling/epwmxb rising,Epwmxb falling/epwmxa rising,Epwmxb both edges" bitfld.word 0x04 2.--3. "POLSEL,Polarity select control" "Active high,Active low complementary,Active high complementary,Active low" bitfld.word 0x04 0.--1. "OUT_MODE,Dead-band output mode control" "Bypassed,Disable rising-edge delay,Disable falling-edge delay,Enabled" line.word 0x06 "DBRED,Dead-Band Generator Rising Edge Delay Count Register" hexmask.word 0x06 0.--9. 1. "DEL,Rising edge delay count" line.word 0x08 "DBFED,Dead-Band Generator Falling Edge Delay Count Register" hexmask.word 0x08 0.--9. 1. "DEL,Falling edge delay count" line.word 0x0A "TZSEL,Trip-Zone Select Register" hexmask.word.byte 0x0A 8.--15. 1. "CBCN,Cycle-by-Cycle (Cbc) trip-zone" hexmask.word.byte 0x0A 0.--7. 1. "OSHTN,One-Shot (Osht) trip-zone" group.word 0x28++0x07 line.word 0x00 "TZCTL,Trip-Zone Control Register" bitfld.word 0x00 2.--3. "TZB,When a trip event occurs the following action is taken on output epwmxb" "High impedance,Forced high,Forced low,No action" bitfld.word 0x00 0.--1. "TZA,When a trip event occurs the following action is taken on output epwmxa" "High impedance,Forced high,Forced low,No action" line.word 0x02 "TZEINT,Trip-Zone Enable Interrupt Register" bitfld.word 0x02 2. "OST,Trip-zone One-Shot interrupt enable" "Disabled,Enabled" bitfld.word 0x02 1. "CBC,Trip-zone Cycle-by-Cycle interrupt enable" "Disabled,Enabled" line.word 0x04 "TZFLG,Trip-Zone Flag Register" setclrfld.word 0x04 2. 0x08 2. 0x06 2. "OST_SET/CLR,Latched status flag for A One-Shot trip event" "Not occured,Occured" setclrfld.word 0x04 1. 0x08 1. 0x06 1. "CBC_SET/CLR,Latched status flag for Cycle-By-Cycle trip event" "Not occured,Occured" rbitfld.word 0x04 0. "INT,Latched trip interrupt status flag" "No interrupt,Interrupt" line.word 0x06 "TZCLR,Trip-Zone Flag Register" bitfld.word 0x06 0. "INT,Latched trip interrupt clear flag" "No effect,Clear" group.word 0x32++0x03 line.word 0x00 "ETSEL,Event-Trigger Selection Register" bitfld.word 0x00 3. "INTEN,Enable epwm interrupt (Epwmx_int) generation" "Disabled,Enabled" bitfld.word 0x00 0.--2. "INTSEL,Epwm interrupt (Epwmx_int) selection options" ",Zero,Period,,CMPA when INC,CMPA when DEC,CMPB when INC,CMPB when DEC" line.word 0x02 "ETPS,Event-Trigger Pre-Scale Register" rbitfld.word 0x02 2.--3. "INTCNT,Epwm interrupt event (Epwmx_int) counter register" "No events occured,1 event,2 events,3 events" bitfld.word 0x02 0.--1. "INTPRD,Epwm interrupt (Epwmx_int) period select" "Disabled,On 1st event,On 2nd event,On 3rd event" rgroup.word 0x36++0x05 line.word 0x00 "ETFLG,Event-Trigger Flag Register" bitfld.word 0x00 0. "INT,Latched epwm interrupt (Epwmx_int) status flag" "No interrupt,Interrupt" line.word 0x02 "ETCLR,Event-Trigger Clear Register" bitfld.word 0x02 0. "INT,ePWM Interrupt (EPWMx_INT) flag clear bit" "No effect,Clear" line.word 0x04 "ETFRC,Event-Trigger Flag Register" bitfld.word 0x04 0. "INT,INT force bit" "No effect,Forced" group.word 0x3C++0x01 line.word 0x00 "PCCTL,PWM-Chopper Control Register" bitfld.word 0x00 8.--10. "CHPDUTY,Chopping clock duty cycle" "1/8,2/8,3/8,4/8,5/8,6/8,7/8,?..." bitfld.word 0x00 5.--7. "CHPFREQ,Chopping clock frequency" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.word 0x00 1.--4. "OSHTWTH,One-Shot pulse width" "1 - SYSCLKOUT/8,2 - SYSCLKOUT/8,3 - SYSCLKOUT/8,4 - SYSCLKOUT/8,5 - SYSCLKOUT/8,6 - SYSCLKOUT/8,7 - SYSCLKOUT/8,8 - SYSCLKOUT/8,9 - SYSCLKOUT/8,10 - SYSCLKOUT/8,11 - SYSCLKOUT/8,12 - SYSCLKOUT/8,13 - SYSCLKOUT/8,14 - SYSCLKOUT/8,15 - SYSCLKOUT/8,16 - SYSCLKOUT/8" newline bitfld.word 0x00 0. "CHPEN,PWM-chopping enable" "Disabled,Enabled" group.word 0xC0++0x01 line.word 0x00 "HRCNFG,High Resolution Configuration Register" bitfld.word 0x00 3. "HRLOAD,Shadow mode bit" "CTR = PRD,CTR = 0" bitfld.word 0x00 2. "CTLMODE,Control mode bit" "CMPAHR(8),TBPHSHR(8)" bitfld.word 0x00 0.--1. "EDGMODE,Selects the edge of the PWM that is controlled by the micro-edge position (MEP) logic" "HRPWM disabled,Rising edge,Falling edge,Both edges" tree.end tree "ePWM1" base ad:0x48302200 group.word 0x00++0x0B line.word 0x00 "TBCTL,Time-Base Control Register" bitfld.word 0x00 14.--15. "FREE_SOFT,Emulation mode bits" "Stop after the next time-base counter INC/DEC,Stop when counter completes a whole cycle,Free-running,Free-running" bitfld.word 0x00 13. "PHSDIR,Phase direction bit" "Count down,Count down" bitfld.word 0x00 10.--12. "CLKDIV,Time-base clock prescale bits" "/1,/2,/4,/8,/16,/32,/64,/128" newline bitfld.word 0x00 7.--9. "HSPCLKDIV,High-Speed Time-base clock prescale bits" "/1,/2,/4,/6,/8,/10,/12,/14" bitfld.word 0x00 6. "SWFSYNC,Software forced synchronization pulse" "No effect,Forced" bitfld.word 0x00 4.--5. "SYNCOSEL,Synchronization output select" "Epwmxsync,CTR = 0,CTR = CMPB,Disabled" newline bitfld.word 0x00 3. "PRDLD,Active period register load from shadow register disable" "No,Yes" bitfld.word 0x00 2. "PHSEN,Counter register load from phase register enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. "CTRMODE,Counter mode" "Up-count,Down-count,Up-down-count,Stop-freeze counter operation" line.word 0x02 "TBSTS,Time-Base Status Register" eventfld.word 0x02 2. "CTRMAX,Time-Base counter max latched status bit" "Not reached,Reached" eventfld.word 0x02 1. "SYNCI,Input synchronization latched status bit" "Not occured,Occured" rbitfld.word 0x02 0. "CTRDIR,Time-Base counter direction status bit" "Counting down,Counting up" line.word 0x04 "TBPHSHR,Extension For HRPWM Phase Register" hexmask.word.byte 0x04 8.--15. 1. "TBPHSH,Time-base phase high-resolution bits" line.word 0x06 "TBPHS,Time-Base Phase Register" line.word 0x08 "TBCNT,Time-Base Counter Register" line.word 0x0A "TBPRD,Time-Base Period Register" group.word 0x0E++0x03 line.word 0x00 "CMPCTL,Counter-Compare Control Register" rbitfld.word 0x00 9. "SHDWBFULL,Counter-compare B (Cmpb) shadow register full status flag" "Not full,Full" rbitfld.word 0x00 8. "SHDWAFULL,Counter-compare A (Cmpa) shadow register full status flag" "Not full,Full" bitfld.word 0x00 6. "SHDWBMODE,Counter-compare B (Cmpb) register operating mode" "Shadow,Immediate" newline bitfld.word 0x00 4. "SHDWAMODE,Counter-compare A (Cmpa) register operating mode" "Shadow,Immediate" bitfld.word 0x00 2.--3. "LOADBMODE,Active Counter-Compare B (Cmpb) load from shadow select mode" "CTR = 0,CTR = PRD,CTR = 0 or CTR = PRD,Freeze" bitfld.word 0x00 0.--1. "LOADAMODE,Active Counter-Compare A (Cmpa) load from shadow select mode" "CTR = 0,CTR = PRD,CTR = 0 or CTR = PRD,Freeze" line.word 0x02 "CMPAHR,Extension For HRPWM Counter-Compare A Register" hexmask.word.byte 0x02 8.--15. 1. "CMPAHR,Compare A High-Resolution register bits for MEP step control" group.word 0x12++0x03 line.word 0x00 "CMPA,Counter-Compare A Register" line.word 0x02 "AQCTLA,Action-Qualifier Control Register For Output A (EpwmxA)" bitfld.word 0x02 10.--11. "CBD,Action when the time-base counter equals the active CMPB register and the counter is decrementing" "No action,Clear,Set,Toggle" bitfld.word 0x02 8.--9. "CBU,Action when the counter equals the active CMPB register and the counter is incrementing" "No action,Clear,Set,Toggle" bitfld.word 0x02 6.--7. "CAD,Action when the counter equals the active CMPA register and the counter is decrementing" "No action,Clear,Set,Toggle" newline bitfld.word 0x02 4.--5. "CAU,Action when the counter equals the active CMPA register and the counter is incrementing" "No action,Clear,Set,Toggle" bitfld.word 0x02 2.--3. "PRD,Action when the counter equals the period" "No action,Clear,Set,Toggle" bitfld.word 0x02 0.--1. "ZRO,Action when counter equals zero" "No action,Clear,Set,Toggle" group.word 0x16++0x03 line.word 0x00 "CMPB,Counter-Compare B Register" line.word 0x02 "AQCTLB,Action-Qualifier Control Register For Output B (EpwmxB)" bitfld.word 0x02 10.--11. "CBD,Action when the time-base counter equals the active CMPB register and the counter is decrementing" "No action,Clear,Set,Toggle" bitfld.word 0x02 8.--9. "CBU,Action when the counter equals the active CMPB register and the counter is incrementing" "No action,Clear,Set,Toggle" bitfld.word 0x02 6.--7. "CAD,Action when the counter equals the active CMPA register and the counter is decrementing" "No action,Clear,Set,Toggle" newline bitfld.word 0x02 4.--5. "CAU,Action when the counter equals the active CMPA register and the counter is incrementing" "No action,Clear,Set,Toggle" bitfld.word 0x02 2.--3. "PRD,Action when the counter equals the period" "No action,Clear,Set,Toggle" bitfld.word 0x02 0.--1. "ZRO,Action when counter equals zero" "No action,Clear,Set,Toggle" group.word 0x1A++0x0B line.word 0x00 "AQSFRC,Action-Qualifier Software Force Register" bitfld.word 0x00 6.--7. "RLDCSF,AQCSFRC active register reload from shadow options" "Zero,Period,Zero or period,Load immediately" bitfld.word 0x00 5. "OTSFB,One-Time software forced event on output B" "No effect,Enabled" bitfld.word 0x00 3.--4. "ACTSFB,Action when One-Time software force B is invoked" "No action,Clear,Set,Toggle" newline bitfld.word 0x00 2. "OTSFA,One-Time software forced event on output A" "No effect,Enabled" bitfld.word 0x00 0.--1. "ACTSFA,Action when One-Time software force A is invoked" "No action,Clear,Set,Toggle" line.word 0x02 "AQCSFRC,Action-Qualifier Continuous S/W Force Register Set" bitfld.word 0x02 2.--3. "CSFB,Continuous software force on output B" "Disabled,Continuous low,Continuous high,Disabled" bitfld.word 0x02 0.--1. "CSFA,Continuous software force on output A" "Disabled,Continuous low,Continuous high,Disabled" line.word 0x04 "DBCTL,Dead-Band Generator Control Register" bitfld.word 0x04 4.--5. "IN_MODE,Dead band input mode control" "Epwmxa both edges,Epwmxa falling/epwmxb rising,Epwmxb falling/epwmxa rising,Epwmxb both edges" bitfld.word 0x04 2.--3. "POLSEL,Polarity select control" "Active high,Active low complementary,Active high complementary,Active low" bitfld.word 0x04 0.--1. "OUT_MODE,Dead-band output mode control" "Bypassed,Disable rising-edge delay,Disable falling-edge delay,Enabled" line.word 0x06 "DBRED,Dead-Band Generator Rising Edge Delay Count Register" hexmask.word 0x06 0.--9. 1. "DEL,Rising edge delay count" line.word 0x08 "DBFED,Dead-Band Generator Falling Edge Delay Count Register" hexmask.word 0x08 0.--9. 1. "DEL,Falling edge delay count" line.word 0x0A "TZSEL,Trip-Zone Select Register" hexmask.word.byte 0x0A 8.--15. 1. "CBCN,Cycle-by-Cycle (Cbc) trip-zone" hexmask.word.byte 0x0A 0.--7. 1. "OSHTN,One-Shot (Osht) trip-zone" group.word 0x28++0x07 line.word 0x00 "TZCTL,Trip-Zone Control Register" bitfld.word 0x00 2.--3. "TZB,When a trip event occurs the following action is taken on output epwmxb" "High impedance,Forced high,Forced low,No action" bitfld.word 0x00 0.--1. "TZA,When a trip event occurs the following action is taken on output epwmxa" "High impedance,Forced high,Forced low,No action" line.word 0x02 "TZEINT,Trip-Zone Enable Interrupt Register" bitfld.word 0x02 2. "OST,Trip-zone One-Shot interrupt enable" "Disabled,Enabled" bitfld.word 0x02 1. "CBC,Trip-zone Cycle-by-Cycle interrupt enable" "Disabled,Enabled" line.word 0x04 "TZFLG,Trip-Zone Flag Register" setclrfld.word 0x04 2. 0x08 2. 0x06 2. "OST_SET/CLR,Latched status flag for A One-Shot trip event" "Not occured,Occured" setclrfld.word 0x04 1. 0x08 1. 0x06 1. "CBC_SET/CLR,Latched status flag for Cycle-By-Cycle trip event" "Not occured,Occured" rbitfld.word 0x04 0. "INT,Latched trip interrupt status flag" "No interrupt,Interrupt" line.word 0x06 "TZCLR,Trip-Zone Flag Register" bitfld.word 0x06 0. "INT,Latched trip interrupt clear flag" "No effect,Clear" group.word 0x32++0x03 line.word 0x00 "ETSEL,Event-Trigger Selection Register" bitfld.word 0x00 3. "INTEN,Enable epwm interrupt (Epwmx_int) generation" "Disabled,Enabled" bitfld.word 0x00 0.--2. "INTSEL,Epwm interrupt (Epwmx_int) selection options" ",Zero,Period,,CMPA when INC,CMPA when DEC,CMPB when INC,CMPB when DEC" line.word 0x02 "ETPS,Event-Trigger Pre-Scale Register" rbitfld.word 0x02 2.--3. "INTCNT,Epwm interrupt event (Epwmx_int) counter register" "No events occured,1 event,2 events,3 events" bitfld.word 0x02 0.--1. "INTPRD,Epwm interrupt (Epwmx_int) period select" "Disabled,On 1st event,On 2nd event,On 3rd event" rgroup.word 0x36++0x05 line.word 0x00 "ETFLG,Event-Trigger Flag Register" bitfld.word 0x00 0. "INT,Latched epwm interrupt (Epwmx_int) status flag" "No interrupt,Interrupt" line.word 0x02 "ETCLR,Event-Trigger Clear Register" bitfld.word 0x02 0. "INT,ePWM Interrupt (EPWMx_INT) flag clear bit" "No effect,Clear" line.word 0x04 "ETFRC,Event-Trigger Flag Register" bitfld.word 0x04 0. "INT,INT force bit" "No effect,Forced" group.word 0x3C++0x01 line.word 0x00 "PCCTL,PWM-Chopper Control Register" bitfld.word 0x00 8.--10. "CHPDUTY,Chopping clock duty cycle" "1/8,2/8,3/8,4/8,5/8,6/8,7/8,?..." bitfld.word 0x00 5.--7. "CHPFREQ,Chopping clock frequency" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.word 0x00 1.--4. "OSHTWTH,One-Shot pulse width" "1 - SYSCLKOUT/8,2 - SYSCLKOUT/8,3 - SYSCLKOUT/8,4 - SYSCLKOUT/8,5 - SYSCLKOUT/8,6 - SYSCLKOUT/8,7 - SYSCLKOUT/8,8 - SYSCLKOUT/8,9 - SYSCLKOUT/8,10 - SYSCLKOUT/8,11 - SYSCLKOUT/8,12 - SYSCLKOUT/8,13 - SYSCLKOUT/8,14 - SYSCLKOUT/8,15 - SYSCLKOUT/8,16 - SYSCLKOUT/8" newline bitfld.word 0x00 0. "CHPEN,PWM-chopping enable" "Disabled,Enabled" group.word 0xC0++0x01 line.word 0x00 "HRCNFG,High Resolution Configuration Register" bitfld.word 0x00 3. "HRLOAD,Shadow mode bit" "CTR = PRD,CTR = 0" bitfld.word 0x00 2. "CTLMODE,Control mode bit" "CMPAHR(8),TBPHSHR(8)" bitfld.word 0x00 0.--1. "EDGMODE,Selects the edge of the PWM that is controlled by the micro-edge position (MEP) logic" "HRPWM disabled,Rising edge,Falling edge,Both edges" tree.end tree "ePWM2" base ad:0x48304200 group.word 0x00++0x0B line.word 0x00 "TBCTL,Time-Base Control Register" bitfld.word 0x00 14.--15. "FREE_SOFT,Emulation mode bits" "Stop after the next time-base counter INC/DEC,Stop when counter completes a whole cycle,Free-running,Free-running" bitfld.word 0x00 13. "PHSDIR,Phase direction bit" "Count down,Count down" bitfld.word 0x00 10.--12. "CLKDIV,Time-base clock prescale bits" "/1,/2,/4,/8,/16,/32,/64,/128" newline bitfld.word 0x00 7.--9. "HSPCLKDIV,High-Speed Time-base clock prescale bits" "/1,/2,/4,/6,/8,/10,/12,/14" bitfld.word 0x00 6. "SWFSYNC,Software forced synchronization pulse" "No effect,Forced" bitfld.word 0x00 4.--5. "SYNCOSEL,Synchronization output select" "Epwmxsync,CTR = 0,CTR = CMPB,Disabled" newline bitfld.word 0x00 3. "PRDLD,Active period register load from shadow register disable" "No,Yes" bitfld.word 0x00 2. "PHSEN,Counter register load from phase register enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. "CTRMODE,Counter mode" "Up-count,Down-count,Up-down-count,Stop-freeze counter operation" line.word 0x02 "TBSTS,Time-Base Status Register" eventfld.word 0x02 2. "CTRMAX,Time-Base counter max latched status bit" "Not reached,Reached" eventfld.word 0x02 1. "SYNCI,Input synchronization latched status bit" "Not occured,Occured" rbitfld.word 0x02 0. "CTRDIR,Time-Base counter direction status bit" "Counting down,Counting up" line.word 0x04 "TBPHSHR,Extension For HRPWM Phase Register" hexmask.word.byte 0x04 8.--15. 1. "TBPHSH,Time-base phase high-resolution bits" line.word 0x06 "TBPHS,Time-Base Phase Register" line.word 0x08 "TBCNT,Time-Base Counter Register" line.word 0x0A "TBPRD,Time-Base Period Register" group.word 0x0E++0x03 line.word 0x00 "CMPCTL,Counter-Compare Control Register" rbitfld.word 0x00 9. "SHDWBFULL,Counter-compare B (Cmpb) shadow register full status flag" "Not full,Full" rbitfld.word 0x00 8. "SHDWAFULL,Counter-compare A (Cmpa) shadow register full status flag" "Not full,Full" bitfld.word 0x00 6. "SHDWBMODE,Counter-compare B (Cmpb) register operating mode" "Shadow,Immediate" newline bitfld.word 0x00 4. "SHDWAMODE,Counter-compare A (Cmpa) register operating mode" "Shadow,Immediate" bitfld.word 0x00 2.--3. "LOADBMODE,Active Counter-Compare B (Cmpb) load from shadow select mode" "CTR = 0,CTR = PRD,CTR = 0 or CTR = PRD,Freeze" bitfld.word 0x00 0.--1. "LOADAMODE,Active Counter-Compare A (Cmpa) load from shadow select mode" "CTR = 0,CTR = PRD,CTR = 0 or CTR = PRD,Freeze" line.word 0x02 "CMPAHR,Extension For HRPWM Counter-Compare A Register" hexmask.word.byte 0x02 8.--15. 1. "CMPAHR,Compare A High-Resolution register bits for MEP step control" group.word 0x12++0x03 line.word 0x00 "CMPA,Counter-Compare A Register" line.word 0x02 "AQCTLA,Action-Qualifier Control Register For Output A (EpwmxA)" bitfld.word 0x02 10.--11. "CBD,Action when the time-base counter equals the active CMPB register and the counter is decrementing" "No action,Clear,Set,Toggle" bitfld.word 0x02 8.--9. "CBU,Action when the counter equals the active CMPB register and the counter is incrementing" "No action,Clear,Set,Toggle" bitfld.word 0x02 6.--7. "CAD,Action when the counter equals the active CMPA register and the counter is decrementing" "No action,Clear,Set,Toggle" newline bitfld.word 0x02 4.--5. "CAU,Action when the counter equals the active CMPA register and the counter is incrementing" "No action,Clear,Set,Toggle" bitfld.word 0x02 2.--3. "PRD,Action when the counter equals the period" "No action,Clear,Set,Toggle" bitfld.word 0x02 0.--1. "ZRO,Action when counter equals zero" "No action,Clear,Set,Toggle" group.word 0x16++0x03 line.word 0x00 "CMPB,Counter-Compare B Register" line.word 0x02 "AQCTLB,Action-Qualifier Control Register For Output B (EpwmxB)" bitfld.word 0x02 10.--11. "CBD,Action when the time-base counter equals the active CMPB register and the counter is decrementing" "No action,Clear,Set,Toggle" bitfld.word 0x02 8.--9. "CBU,Action when the counter equals the active CMPB register and the counter is incrementing" "No action,Clear,Set,Toggle" bitfld.word 0x02 6.--7. "CAD,Action when the counter equals the active CMPA register and the counter is decrementing" "No action,Clear,Set,Toggle" newline bitfld.word 0x02 4.--5. "CAU,Action when the counter equals the active CMPA register and the counter is incrementing" "No action,Clear,Set,Toggle" bitfld.word 0x02 2.--3. "PRD,Action when the counter equals the period" "No action,Clear,Set,Toggle" bitfld.word 0x02 0.--1. "ZRO,Action when counter equals zero" "No action,Clear,Set,Toggle" group.word 0x1A++0x0B line.word 0x00 "AQSFRC,Action-Qualifier Software Force Register" bitfld.word 0x00 6.--7. "RLDCSF,AQCSFRC active register reload from shadow options" "Zero,Period,Zero or period,Load immediately" bitfld.word 0x00 5. "OTSFB,One-Time software forced event on output B" "No effect,Enabled" bitfld.word 0x00 3.--4. "ACTSFB,Action when One-Time software force B is invoked" "No action,Clear,Set,Toggle" newline bitfld.word 0x00 2. "OTSFA,One-Time software forced event on output A" "No effect,Enabled" bitfld.word 0x00 0.--1. "ACTSFA,Action when One-Time software force A is invoked" "No action,Clear,Set,Toggle" line.word 0x02 "AQCSFRC,Action-Qualifier Continuous S/W Force Register Set" bitfld.word 0x02 2.--3. "CSFB,Continuous software force on output B" "Disabled,Continuous low,Continuous high,Disabled" bitfld.word 0x02 0.--1. "CSFA,Continuous software force on output A" "Disabled,Continuous low,Continuous high,Disabled" line.word 0x04 "DBCTL,Dead-Band Generator Control Register" bitfld.word 0x04 4.--5. "IN_MODE,Dead band input mode control" "Epwmxa both edges,Epwmxa falling/epwmxb rising,Epwmxb falling/epwmxa rising,Epwmxb both edges" bitfld.word 0x04 2.--3. "POLSEL,Polarity select control" "Active high,Active low complementary,Active high complementary,Active low" bitfld.word 0x04 0.--1. "OUT_MODE,Dead-band output mode control" "Bypassed,Disable rising-edge delay,Disable falling-edge delay,Enabled" line.word 0x06 "DBRED,Dead-Band Generator Rising Edge Delay Count Register" hexmask.word 0x06 0.--9. 1. "DEL,Rising edge delay count" line.word 0x08 "DBFED,Dead-Band Generator Falling Edge Delay Count Register" hexmask.word 0x08 0.--9. 1. "DEL,Falling edge delay count" line.word 0x0A "TZSEL,Trip-Zone Select Register" hexmask.word.byte 0x0A 8.--15. 1. "CBCN,Cycle-by-Cycle (Cbc) trip-zone" hexmask.word.byte 0x0A 0.--7. 1. "OSHTN,One-Shot (Osht) trip-zone" group.word 0x28++0x07 line.word 0x00 "TZCTL,Trip-Zone Control Register" bitfld.word 0x00 2.--3. "TZB,When a trip event occurs the following action is taken on output epwmxb" "High impedance,Forced high,Forced low,No action" bitfld.word 0x00 0.--1. "TZA,When a trip event occurs the following action is taken on output epwmxa" "High impedance,Forced high,Forced low,No action" line.word 0x02 "TZEINT,Trip-Zone Enable Interrupt Register" bitfld.word 0x02 2. "OST,Trip-zone One-Shot interrupt enable" "Disabled,Enabled" bitfld.word 0x02 1. "CBC,Trip-zone Cycle-by-Cycle interrupt enable" "Disabled,Enabled" line.word 0x04 "TZFLG,Trip-Zone Flag Register" setclrfld.word 0x04 2. 0x08 2. 0x06 2. "OST_SET/CLR,Latched status flag for A One-Shot trip event" "Not occured,Occured" setclrfld.word 0x04 1. 0x08 1. 0x06 1. "CBC_SET/CLR,Latched status flag for Cycle-By-Cycle trip event" "Not occured,Occured" rbitfld.word 0x04 0. "INT,Latched trip interrupt status flag" "No interrupt,Interrupt" line.word 0x06 "TZCLR,Trip-Zone Flag Register" bitfld.word 0x06 0. "INT,Latched trip interrupt clear flag" "No effect,Clear" group.word 0x32++0x03 line.word 0x00 "ETSEL,Event-Trigger Selection Register" bitfld.word 0x00 3. "INTEN,Enable epwm interrupt (Epwmx_int) generation" "Disabled,Enabled" bitfld.word 0x00 0.--2. "INTSEL,Epwm interrupt (Epwmx_int) selection options" ",Zero,Period,,CMPA when INC,CMPA when DEC,CMPB when INC,CMPB when DEC" line.word 0x02 "ETPS,Event-Trigger Pre-Scale Register" rbitfld.word 0x02 2.--3. "INTCNT,Epwm interrupt event (Epwmx_int) counter register" "No events occured,1 event,2 events,3 events" bitfld.word 0x02 0.--1. "INTPRD,Epwm interrupt (Epwmx_int) period select" "Disabled,On 1st event,On 2nd event,On 3rd event" rgroup.word 0x36++0x05 line.word 0x00 "ETFLG,Event-Trigger Flag Register" bitfld.word 0x00 0. "INT,Latched epwm interrupt (Epwmx_int) status flag" "No interrupt,Interrupt" line.word 0x02 "ETCLR,Event-Trigger Clear Register" bitfld.word 0x02 0. "INT,ePWM Interrupt (EPWMx_INT) flag clear bit" "No effect,Clear" line.word 0x04 "ETFRC,Event-Trigger Flag Register" bitfld.word 0x04 0. "INT,INT force bit" "No effect,Forced" group.word 0x3C++0x01 line.word 0x00 "PCCTL,PWM-Chopper Control Register" bitfld.word 0x00 8.--10. "CHPDUTY,Chopping clock duty cycle" "1/8,2/8,3/8,4/8,5/8,6/8,7/8,?..." bitfld.word 0x00 5.--7. "CHPFREQ,Chopping clock frequency" "/1,/2,/3,/4,/5,/6,/7,/8" bitfld.word 0x00 1.--4. "OSHTWTH,One-Shot pulse width" "1 - SYSCLKOUT/8,2 - SYSCLKOUT/8,3 - SYSCLKOUT/8,4 - SYSCLKOUT/8,5 - SYSCLKOUT/8,6 - SYSCLKOUT/8,7 - SYSCLKOUT/8,8 - SYSCLKOUT/8,9 - SYSCLKOUT/8,10 - SYSCLKOUT/8,11 - SYSCLKOUT/8,12 - SYSCLKOUT/8,13 - SYSCLKOUT/8,14 - SYSCLKOUT/8,15 - SYSCLKOUT/8,16 - SYSCLKOUT/8" newline bitfld.word 0x00 0. "CHPEN,PWM-chopping enable" "Disabled,Enabled" group.word 0xC0++0x01 line.word 0x00 "HRCNFG,High Resolution Configuration Register" bitfld.word 0x00 3. "HRLOAD,Shadow mode bit" "CTR = PRD,CTR = 0" bitfld.word 0x00 2. "CTLMODE,Control mode bit" "CMPAHR(8),TBPHSHR(8)" bitfld.word 0x00 0.--1. "EDGMODE,Selects the edge of the PWM that is controlled by the micro-edge position (MEP) logic" "HRPWM disabled,Rising edge,Falling edge,Both edges" tree.end tree.end tree "eCAP" tree "eCAP0" base ad:0x48300100 group.long 0x00++0x17 line.long 0x00 "TSCTR,Time-Stamp Counter Register" line.long 0x04 "CTRPHS,Counter Phase Offset Value Register" line.long 0x08 "CAP1,Capture 1 Register" line.long 0x0C "CAP2,Capture 2 Register" line.long 0x10 "CAP3,Capture 3 Register" line.long 0x14 "CAP4,Capture 4 Register" group.word 0x28++0x05 line.word 0x00 "ECCTL1,Capture Control Register 1" bitfld.word 0x00 14.--15. "FREE_SOFT,Emulation control" "Stop,Runs until = 0,Free-running,Free-running" bitfld.word 0x00 9.--13. "PRESCALE,Event filter prescale select" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30,/32,/34,/36,/38,/40,/42,/44,/46,/48,/50,/52,/54,/56,/58,/60,/62" bitfld.word 0x00 8. "CAPLDEN,Enable loading of CAP" "Disabled,Enabled" bitfld.word 0x00 7. "CTRRST4,Counter reset on capture event 4" "No reset,Reset" newline bitfld.word 0x00 6. "CAP4POL,Capture event 4 polarity select" "Rising edge,Falling edge" bitfld.word 0x00 5. "CTRRST3,Counter reset on capture event 3" "No reset,Reset" bitfld.word 0x00 4. "CAP3POL,Capture event 3 polarity select" "Rising edge,Falling edge" bitfld.word 0x00 3. "CTRRST2,Counter reset on capture event 2" "No reset,Reset" newline bitfld.word 0x00 2. "CAP2POL,Capture event 2 polarity select" "Rising edge,Falling edge" bitfld.word 0x00 1. "CTRRST1,Counter reset on capture event 1" "No reset,Reset" bitfld.word 0x00 0. "CAP1POL,Capture event 1 polarity select" "Rising edge,Falling edge" line.word 0x02 "ECCTL2,Capture Control Register 2" bitfld.word 0x02 10. "APWMPOL,APWM output polarity select" "Active high,Active low" bitfld.word 0x02 9. "CAP_APWM,CAP/APWM operating mode select" "Capture,APWM" bitfld.word 0x02 8. "SWSYNC,Software-forced counter (Tsctr) synchronizing" "No effect,Forced" bitfld.word 0x02 6.--7. "SYNCO_SEL,Sync-Out select" "Sync-in event,PRDEQ event,Disabled,Disabled" newline bitfld.word 0x02 5. "SYNCI_EN,Counter (Tsctr) Sync-In select mode" "Disabled,Enabled" bitfld.word 0x02 4. "TSCTRSTOP,Time stamp (Tsctr) counter stop (Freeze) control" "Stopped,Free-runnig" bitfld.word 0x02 3. "RE-ARM,One-Shot Re-Arming control" "No effect,Enabled" bitfld.word 0x02 1.--2. "STOP_WRAP,Stop value" "1,2,3,4" newline bitfld.word 0x02 0. "CONT_ONESHT,Continuous or one-shot mode control" "Continuous,One-shot" line.word 0x04 "ECEINT,Capture Interrupt Enable Register" bitfld.word 0x04 7. "CMPEQ,Counter equal compare interrupt enable" "Disabled,Enabled" bitfld.word 0x04 6. "PRDEQ,Counter equal period interrupt enable" "Disabled,Enabled" bitfld.word 0x04 5. "CNTOVF,Counter overflow interrupt enable" "Disabled,Enabled" bitfld.word 0x04 4. "CEVT4,Capture event 4 interrupt enable" "Disabled,Enabled" newline bitfld.word 0x04 3. "CEVT3,Capture event 3 interrupt enable" "Disabled,Enabled" bitfld.word 0x04 2. "CEVT2,Capture event 2 interrupt enable" "Disabled,Enabled" bitfld.word 0x04 1. "CEVT1,Capture event 1 interrupt enable" "Disabled,Enabled" if (((d.l(ad:0x48300100+0x2A))&0x200)==0x200) group.word 0x2E++0x01 line.word 0x00 "ECFLG,Capture Interrupt Flag Register" setclrfld.word 0x00 7. 0x08 7. 0x04 7. "CMPEQ_SET/CLR,Compare equal compare status flag" "Not occured,Occured" setclrfld.word 0x00 6. 0x08 6. 0x04 6. "PRDEQ_SET/CLR,Counter equal period status flag" "Not occured,Occured" setclrfld.word 0x00 5. 0x08 5. 0x04 5. "CNTOVF_SET/CLR,Counter overflow status flag" "Not occured,Occured" rbitfld.word 0x00 0. "INT,Global interrupt status flag" "No interrupt,Interrupt" else group.word 0x2E++0x01 line.word 0x00 "ECFLG,Capture Interrupt Flag Register" setclrfld.word 0x00 5. 0x08 5. 0x04 5. "CNTOVF_SET/CLR,Counter overflow status flag" "Not occured,Occured" setclrfld.word 0x00 4. 0x08 4. 0x04 4. "CEVT4_SET/CLR,Capture event 4 status flag" "Not occured,Occured" setclrfld.word 0x00 3. 0x08 3. 0x04 3. "CEVT3_SET/CLR,Capture event 3 status flag" "Not occured,Occured" setclrfld.word 0x00 2. 0x08 2. 0x04 2. "CEVT2_SET/CLR,Capture event 2 status flag" "Not occured,Occured" newline setclrfld.word 0x00 1. 0x08 1. 0x04 1. "CEVT1_SET/CLR,Capture event 1 status flag" "Not occured,Occured" rbitfld.word 0x00 0. "INT,Global interrupt status flag" "No interrupt,Interrupt" endif group.word 0x30++0x01 line.word 0x00 "ECFLG,Capture Interrupt Flag Register" bitfld.word 0x00 0. "INT,Global interrupt clear flag" "No effect,Clear" rgroup.long 0x5C++0x03 line.long 0x00 "REVID,Revision ID Register" tree.end tree "eCAP1" base ad:0x48302100 group.long 0x00++0x17 line.long 0x00 "TSCTR,Time-Stamp Counter Register" line.long 0x04 "CTRPHS,Counter Phase Offset Value Register" line.long 0x08 "CAP1,Capture 1 Register" line.long 0x0C "CAP2,Capture 2 Register" line.long 0x10 "CAP3,Capture 3 Register" line.long 0x14 "CAP4,Capture 4 Register" group.word 0x28++0x05 line.word 0x00 "ECCTL1,Capture Control Register 1" bitfld.word 0x00 14.--15. "FREE_SOFT,Emulation control" "Stop,Runs until = 0,Free-running,Free-running" bitfld.word 0x00 9.--13. "PRESCALE,Event filter prescale select" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30,/32,/34,/36,/38,/40,/42,/44,/46,/48,/50,/52,/54,/56,/58,/60,/62" bitfld.word 0x00 8. "CAPLDEN,Enable loading of CAP" "Disabled,Enabled" bitfld.word 0x00 7. "CTRRST4,Counter reset on capture event 4" "No reset,Reset" newline bitfld.word 0x00 6. "CAP4POL,Capture event 4 polarity select" "Rising edge,Falling edge" bitfld.word 0x00 5. "CTRRST3,Counter reset on capture event 3" "No reset,Reset" bitfld.word 0x00 4. "CAP3POL,Capture event 3 polarity select" "Rising edge,Falling edge" bitfld.word 0x00 3. "CTRRST2,Counter reset on capture event 2" "No reset,Reset" newline bitfld.word 0x00 2. "CAP2POL,Capture event 2 polarity select" "Rising edge,Falling edge" bitfld.word 0x00 1. "CTRRST1,Counter reset on capture event 1" "No reset,Reset" bitfld.word 0x00 0. "CAP1POL,Capture event 1 polarity select" "Rising edge,Falling edge" line.word 0x02 "ECCTL2,Capture Control Register 2" bitfld.word 0x02 10. "APWMPOL,APWM output polarity select" "Active high,Active low" bitfld.word 0x02 9. "CAP_APWM,CAP/APWM operating mode select" "Capture,APWM" bitfld.word 0x02 8. "SWSYNC,Software-forced counter (Tsctr) synchronizing" "No effect,Forced" bitfld.word 0x02 6.--7. "SYNCO_SEL,Sync-Out select" "Sync-in event,PRDEQ event,Disabled,Disabled" newline bitfld.word 0x02 5. "SYNCI_EN,Counter (Tsctr) Sync-In select mode" "Disabled,Enabled" bitfld.word 0x02 4. "TSCTRSTOP,Time stamp (Tsctr) counter stop (Freeze) control" "Stopped,Free-runnig" bitfld.word 0x02 3. "RE-ARM,One-Shot Re-Arming control" "No effect,Enabled" bitfld.word 0x02 1.--2. "STOP_WRAP,Stop value" "1,2,3,4" newline bitfld.word 0x02 0. "CONT_ONESHT,Continuous or one-shot mode control" "Continuous,One-shot" line.word 0x04 "ECEINT,Capture Interrupt Enable Register" bitfld.word 0x04 7. "CMPEQ,Counter equal compare interrupt enable" "Disabled,Enabled" bitfld.word 0x04 6. "PRDEQ,Counter equal period interrupt enable" "Disabled,Enabled" bitfld.word 0x04 5. "CNTOVF,Counter overflow interrupt enable" "Disabled,Enabled" bitfld.word 0x04 4. "CEVT4,Capture event 4 interrupt enable" "Disabled,Enabled" newline bitfld.word 0x04 3. "CEVT3,Capture event 3 interrupt enable" "Disabled,Enabled" bitfld.word 0x04 2. "CEVT2,Capture event 2 interrupt enable" "Disabled,Enabled" bitfld.word 0x04 1. "CEVT1,Capture event 1 interrupt enable" "Disabled,Enabled" if (((d.l(ad:0x48302100+0x2A))&0x200)==0x200) group.word 0x2E++0x01 line.word 0x00 "ECFLG,Capture Interrupt Flag Register" setclrfld.word 0x00 7. 0x08 7. 0x04 7. "CMPEQ_SET/CLR,Compare equal compare status flag" "Not occured,Occured" setclrfld.word 0x00 6. 0x08 6. 0x04 6. "PRDEQ_SET/CLR,Counter equal period status flag" "Not occured,Occured" setclrfld.word 0x00 5. 0x08 5. 0x04 5. "CNTOVF_SET/CLR,Counter overflow status flag" "Not occured,Occured" rbitfld.word 0x00 0. "INT,Global interrupt status flag" "No interrupt,Interrupt" else group.word 0x2E++0x01 line.word 0x00 "ECFLG,Capture Interrupt Flag Register" setclrfld.word 0x00 5. 0x08 5. 0x04 5. "CNTOVF_SET/CLR,Counter overflow status flag" "Not occured,Occured" setclrfld.word 0x00 4. 0x08 4. 0x04 4. "CEVT4_SET/CLR,Capture event 4 status flag" "Not occured,Occured" setclrfld.word 0x00 3. 0x08 3. 0x04 3. "CEVT3_SET/CLR,Capture event 3 status flag" "Not occured,Occured" setclrfld.word 0x00 2. 0x08 2. 0x04 2. "CEVT2_SET/CLR,Capture event 2 status flag" "Not occured,Occured" newline setclrfld.word 0x00 1. 0x08 1. 0x04 1. "CEVT1_SET/CLR,Capture event 1 status flag" "Not occured,Occured" rbitfld.word 0x00 0. "INT,Global interrupt status flag" "No interrupt,Interrupt" endif group.word 0x30++0x01 line.word 0x00 "ECFLG,Capture Interrupt Flag Register" bitfld.word 0x00 0. "INT,Global interrupt clear flag" "No effect,Clear" rgroup.long 0x5C++0x03 line.long 0x00 "REVID,Revision ID Register" tree.end tree "eCAP2" base ad:0x48304100 group.long 0x00++0x17 line.long 0x00 "TSCTR,Time-Stamp Counter Register" line.long 0x04 "CTRPHS,Counter Phase Offset Value Register" line.long 0x08 "CAP1,Capture 1 Register" line.long 0x0C "CAP2,Capture 2 Register" line.long 0x10 "CAP3,Capture 3 Register" line.long 0x14 "CAP4,Capture 4 Register" group.word 0x28++0x05 line.word 0x00 "ECCTL1,Capture Control Register 1" bitfld.word 0x00 14.--15. "FREE_SOFT,Emulation control" "Stop,Runs until = 0,Free-running,Free-running" bitfld.word 0x00 9.--13. "PRESCALE,Event filter prescale select" "/1,/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30,/32,/34,/36,/38,/40,/42,/44,/46,/48,/50,/52,/54,/56,/58,/60,/62" bitfld.word 0x00 8. "CAPLDEN,Enable loading of CAP" "Disabled,Enabled" bitfld.word 0x00 7. "CTRRST4,Counter reset on capture event 4" "No reset,Reset" newline bitfld.word 0x00 6. "CAP4POL,Capture event 4 polarity select" "Rising edge,Falling edge" bitfld.word 0x00 5. "CTRRST3,Counter reset on capture event 3" "No reset,Reset" bitfld.word 0x00 4. "CAP3POL,Capture event 3 polarity select" "Rising edge,Falling edge" bitfld.word 0x00 3. "CTRRST2,Counter reset on capture event 2" "No reset,Reset" newline bitfld.word 0x00 2. "CAP2POL,Capture event 2 polarity select" "Rising edge,Falling edge" bitfld.word 0x00 1. "CTRRST1,Counter reset on capture event 1" "No reset,Reset" bitfld.word 0x00 0. "CAP1POL,Capture event 1 polarity select" "Rising edge,Falling edge" line.word 0x02 "ECCTL2,Capture Control Register 2" bitfld.word 0x02 10. "APWMPOL,APWM output polarity select" "Active high,Active low" bitfld.word 0x02 9. "CAP_APWM,CAP/APWM operating mode select" "Capture,APWM" bitfld.word 0x02 8. "SWSYNC,Software-forced counter (Tsctr) synchronizing" "No effect,Forced" bitfld.word 0x02 6.--7. "SYNCO_SEL,Sync-Out select" "Sync-in event,PRDEQ event,Disabled,Disabled" newline bitfld.word 0x02 5. "SYNCI_EN,Counter (Tsctr) Sync-In select mode" "Disabled,Enabled" bitfld.word 0x02 4. "TSCTRSTOP,Time stamp (Tsctr) counter stop (Freeze) control" "Stopped,Free-runnig" bitfld.word 0x02 3. "RE-ARM,One-Shot Re-Arming control" "No effect,Enabled" bitfld.word 0x02 1.--2. "STOP_WRAP,Stop value" "1,2,3,4" newline bitfld.word 0x02 0. "CONT_ONESHT,Continuous or one-shot mode control" "Continuous,One-shot" line.word 0x04 "ECEINT,Capture Interrupt Enable Register" bitfld.word 0x04 7. "CMPEQ,Counter equal compare interrupt enable" "Disabled,Enabled" bitfld.word 0x04 6. "PRDEQ,Counter equal period interrupt enable" "Disabled,Enabled" bitfld.word 0x04 5. "CNTOVF,Counter overflow interrupt enable" "Disabled,Enabled" bitfld.word 0x04 4. "CEVT4,Capture event 4 interrupt enable" "Disabled,Enabled" newline bitfld.word 0x04 3. "CEVT3,Capture event 3 interrupt enable" "Disabled,Enabled" bitfld.word 0x04 2. "CEVT2,Capture event 2 interrupt enable" "Disabled,Enabled" bitfld.word 0x04 1. "CEVT1,Capture event 1 interrupt enable" "Disabled,Enabled" if (((d.l(ad:0x48304100+0x2A))&0x200)==0x200) group.word 0x2E++0x01 line.word 0x00 "ECFLG,Capture Interrupt Flag Register" setclrfld.word 0x00 7. 0x08 7. 0x04 7. "CMPEQ_SET/CLR,Compare equal compare status flag" "Not occured,Occured" setclrfld.word 0x00 6. 0x08 6. 0x04 6. "PRDEQ_SET/CLR,Counter equal period status flag" "Not occured,Occured" setclrfld.word 0x00 5. 0x08 5. 0x04 5. "CNTOVF_SET/CLR,Counter overflow status flag" "Not occured,Occured" rbitfld.word 0x00 0. "INT,Global interrupt status flag" "No interrupt,Interrupt" else group.word 0x2E++0x01 line.word 0x00 "ECFLG,Capture Interrupt Flag Register" setclrfld.word 0x00 5. 0x08 5. 0x04 5. "CNTOVF_SET/CLR,Counter overflow status flag" "Not occured,Occured" setclrfld.word 0x00 4. 0x08 4. 0x04 4. "CEVT4_SET/CLR,Capture event 4 status flag" "Not occured,Occured" setclrfld.word 0x00 3. 0x08 3. 0x04 3. "CEVT3_SET/CLR,Capture event 3 status flag" "Not occured,Occured" setclrfld.word 0x00 2. 0x08 2. 0x04 2. "CEVT2_SET/CLR,Capture event 2 status flag" "Not occured,Occured" newline setclrfld.word 0x00 1. 0x08 1. 0x04 1. "CEVT1_SET/CLR,Capture event 1 status flag" "Not occured,Occured" rbitfld.word 0x00 0. "INT,Global interrupt status flag" "No interrupt,Interrupt" endif group.word 0x30++0x01 line.word 0x00 "ECFLG,Capture Interrupt Flag Register" bitfld.word 0x00 0. "INT,Global interrupt clear flag" "No effect,Clear" rgroup.long 0x5C++0x03 line.long 0x00 "REVID,Revision ID Register" tree.end tree.end tree "eQEP" tree "eQEP0" base ad:0x48300180 group.long 0x00++0x0F line.long 0x00 "QPOSCNT,eQEP Position Counter Register" line.long 0x04 "QPOSINIT,eQEP Position Counter Initialization Register" line.long 0x08 "QPOSMAX,eQEP Maximum Position Count Register" line.long 0x0C "QPOSCMP,eQEP Position-Compare Register" rgroup.long 0x10++0x0B line.long 0x00 "QPOSILAT,eQEP Index Position Latch Register" line.long 0x04 "QPOSSLAT,eQEP Strobe Position Latch Register" line.long 0x08 "QPOSLAT,eQEP Position Counter Latch Register" group.long 0x1C++0x07 line.long 0x00 "QUTMR,eQEP Unit Timer Register" line.long 0x04 "QUPRD,eQEP Unit Period Register" group.word 0x24++0x11 line.word 0x00 "QWDTMR,eQEP Watchdog Timer Register" line.word 0x02 "QWDPRD,eQEP Watchdog Period Register" line.word 0x04 "QDECCTL,eQEP Decoder Control Register" bitfld.word 0x04 14.--15. "QSRC,Position-counter source selection" "Quadrature count mode,Direction-count mode,UP count mode for frequency measurement,DOWN count mode for frequency measurement" bitfld.word 0x04 13. "SOEN,Sync output-enable" "Disabled,Enabled" bitfld.word 0x04 12. "SPSEL,Sync output pin selection" "Index pin,Stobe pin" newline bitfld.word 0x04 11. "XCR,External clock rate" "2x resolution,1x resolution" bitfld.word 0x04 10. "SWAP,Swap quadrature clock inputs" "Not swapped,Swapped" bitfld.word 0x04 9. "IGATE,Index pulse gating option" "Disabled,Enabled" newline bitfld.word 0x04 8. "QAP,QEPA input polarity" "No effect,Inverted" bitfld.word 0x04 7. "QBP,QEPB input polarity" "No effect,Inverted" bitfld.word 0x04 6. "QIP,QEPI input polarity" "No effect,Inverted" newline bitfld.word 0x04 5. "QSP,QEPS input polarity" "No effect,Inverted" line.word 0x06 "QEPCTL,eQEP Decoder Control Register" bitfld.word 0x06 14.--15. "FREE_SOFT,Emulation control bits" "Stop,Runs until = 0,Free-running,Free-running" bitfld.word 0x06 12.--13. "PCRM,Position counter reset mode" "On index event,On maximum position,On first index event,On unit time event" bitfld.word 0x06 10.--11. "SEI,Strobe event initialization of position counter" "No action,No action,Rising edge,Clockwise direction" newline bitfld.word 0x06 8.--9. "IEI,Index event initialization of position counter" "No action,No action,Rising edge,Falling edge" bitfld.word 0x06 7. "SWI,Software initialization of position counter" "No action,Initialized" bitfld.word 0x06 6. "SEL,Strobe event latch of position counter" "On the rising edge of QEPS strobe,Clockwise direction" newline bitfld.word 0x06 4.--5. "IEL,Index event latch of position counter (Software index marker)" ",Rising edge,Falling edge,Software index marker" bitfld.word 0x06 3. "PHEN,Quadrature position counter enable/software reset" "Reset,Enabled" bitfld.word 0x06 2. "QCLM,Eqep capture latch mode" "On position counter read by CPU,On unit time out" newline bitfld.word 0x06 1. "UTE,Eqep unit timer enable" "Disabled,Enabled" bitfld.word 0x06 0. "WDE,Eqep watchdog enable" "Disabled,Enabled" line.word 0x08 "QCAPCTL,eQEP Capture Control Register" bitfld.word 0x08 15. "CEN,Enable eqep capture" "Disabled,Enabled" bitfld.word 0x08 4.--6. "CCPS,Eqep capture timer clock prescaler" "/1,/2,/4,/8,/16,/32,/64,/128" bitfld.word 0x08 0.--3. "UPPS,Unit position event prescaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,?..." line.word 0x0A "QPOSCTL,eQEP Position-Compare Control Register" bitfld.word 0x0A 15. "PCSHDW,Position-compare shadow enable" "Disabled,Enabled" bitfld.word 0x0A 14. "PCLOAD,Position-compare shadow load mode" "QPOSCNT = 0,QPOSCNT = QPOSCMP" bitfld.word 0x0A 13. "PCPOL,Polarity of sync output" "Active high,Active low" newline bitfld.word 0x0A 12. "PCE,Position-compare enable/disable" "Disabled,Enabled" hexmask.word 0x0A 0.--11. 1. "PCSPW,Select-position-compare sync output pulse width" line.word 0x0C "QEINT,eQEP Interrupt Enable Register" bitfld.word 0x0C 11. "UTO,Unit time out interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 10. "IEL,Index event latch interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 9. "SEL,Strobe event latch interrupt enable" "Disabled,Enabled" newline bitfld.word 0x0C 8. "PCM,Position-compare match interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 7. "PCR,Position-compare ready interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 6. "PCO,Position counter overflow interrupt enable" "Disabled,Enabled" newline bitfld.word 0x0C 5. "PCU,Position counter underflow interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 4. "WTO,Watchdog time out interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 3. "QDC,Quadrature direction change interrupt enable" "Disabled,Enabled" newline bitfld.word 0x0C 2. "PHE,Quadrature phase error interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 1. "PCE,Position counter error interrupt enable" "Disabled,Enabled" line.word 0x0E "QFLG,eQEP Interrupt Flag Register" setclrfld.word 0x0E 11. 0x12 11. 0x10 11. "UTO_SET/CLR,Unit time out interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 10. 0x12 10. 0x10 10. "IEL_SET/CLR,Index event latch interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 9. 0x12 9. 0x10 9. "SEL_SET/CLR,Strobe event latch interrupt flag" "No interrupt,Interrupt" newline setclrfld.word 0x0E 8. 0x12 8. 0x10 8. "PCM_SET/CLR,Position-compare match interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 7. 0x12 7. 0x10 7. "PCR_SET/CLR,Position-compare ready interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 6. 0x12 6. 0x10 6. "PCO_SET/CLR,Position counter overflow interrupt flag" "No interrupt,Interrupt" newline setclrfld.word 0x0E 5. 0x12 5. 0x10 5. "PCU_SET/CLR,Position counter underflow interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 4. 0x12 4. 0x10 4. "WTO_SET/CLR,Watchdog time out interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 3. 0x12 3. 0x10 3. "QDC_SET/CLR,Quadrature direction change interrupt flag" "No interrupt,Interrupt" newline setclrfld.word 0x0E 2. 0x12 2. 0x10 2. "PHE_SET/CLR,Quadrature phase error interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 1. 0x12 1. 0x10 1. "PCE_SET/CLR,Position counter error interrupt flag" "No interrupt,Interrupt" rbitfld.word 0x0E 0. "INT,Global interrupt status flag" "No interrupt,Interrupt" line.word 0x10 "QCLR,eQEP Interrupt Clear Register" bitfld.word 0x10 0. "INT,Global interrupt clear flag" "No effect,Clear" group.word 0x38++0x05 line.word 0x00 "QEPSTS,eQEP Status Register" rbitfld.word 0x00 7. "UPEVNT,Unit position event flag" "Not occured,Occured" rbitfld.word 0x00 6. "FDF,Direction on the first index marker" "Counter-clockwise,Clockwise" rbitfld.word 0x00 5. "QDF,Quadrature direction flag" "Counter-clockwise,Clockwise" newline rbitfld.word 0x00 4. "QDLF,Eqep direction latch flag" "Counter-clockwise,Clockwise" bitfld.word 0x00 3. "COEF,Capture overflow error flag" "Not occured,Occured" bitfld.word 0x00 2. "CDEF,Capture direction error flag" "Not occured,Occured" newline bitfld.word 0x00 1. "FIMF,First index marker flag" "Not occured,Occured" rbitfld.word 0x00 0. "PCEF,Position counter error flag" "Not occured,Occured" line.word 0x02 "QCTMR,eQEP Capture Timer Register" line.word 0x04 "QCPRD,eQEP Capture Period Register" rgroup.word 0x3E++0x01 line.word 0x00 "QCTMRLAT,eQEP Capture Timer Latch Register" group.long 0x40++0x03 line.long 0x00 "QCPRDLAT,eQEP Capture Period Latch Register" rgroup.long 0x5C++0x03 line.long 0x00 "REVID,eQEP Revision ID Register" tree.end tree "eQEP1" base ad:0x48302180 group.long 0x00++0x0F line.long 0x00 "QPOSCNT,eQEP Position Counter Register" line.long 0x04 "QPOSINIT,eQEP Position Counter Initialization Register" line.long 0x08 "QPOSMAX,eQEP Maximum Position Count Register" line.long 0x0C "QPOSCMP,eQEP Position-Compare Register" rgroup.long 0x10++0x0B line.long 0x00 "QPOSILAT,eQEP Index Position Latch Register" line.long 0x04 "QPOSSLAT,eQEP Strobe Position Latch Register" line.long 0x08 "QPOSLAT,eQEP Position Counter Latch Register" group.long 0x1C++0x07 line.long 0x00 "QUTMR,eQEP Unit Timer Register" line.long 0x04 "QUPRD,eQEP Unit Period Register" group.word 0x24++0x11 line.word 0x00 "QWDTMR,eQEP Watchdog Timer Register" line.word 0x02 "QWDPRD,eQEP Watchdog Period Register" line.word 0x04 "QDECCTL,eQEP Decoder Control Register" bitfld.word 0x04 14.--15. "QSRC,Position-counter source selection" "Quadrature count mode,Direction-count mode,UP count mode for frequency measurement,DOWN count mode for frequency measurement" bitfld.word 0x04 13. "SOEN,Sync output-enable" "Disabled,Enabled" bitfld.word 0x04 12. "SPSEL,Sync output pin selection" "Index pin,Stobe pin" newline bitfld.word 0x04 11. "XCR,External clock rate" "2x resolution,1x resolution" bitfld.word 0x04 10. "SWAP,Swap quadrature clock inputs" "Not swapped,Swapped" bitfld.word 0x04 9. "IGATE,Index pulse gating option" "Disabled,Enabled" newline bitfld.word 0x04 8. "QAP,QEPA input polarity" "No effect,Inverted" bitfld.word 0x04 7. "QBP,QEPB input polarity" "No effect,Inverted" bitfld.word 0x04 6. "QIP,QEPI input polarity" "No effect,Inverted" newline bitfld.word 0x04 5. "QSP,QEPS input polarity" "No effect,Inverted" line.word 0x06 "QEPCTL,eQEP Decoder Control Register" bitfld.word 0x06 14.--15. "FREE_SOFT,Emulation control bits" "Stop,Runs until = 0,Free-running,Free-running" bitfld.word 0x06 12.--13. "PCRM,Position counter reset mode" "On index event,On maximum position,On first index event,On unit time event" bitfld.word 0x06 10.--11. "SEI,Strobe event initialization of position counter" "No action,No action,Rising edge,Clockwise direction" newline bitfld.word 0x06 8.--9. "IEI,Index event initialization of position counter" "No action,No action,Rising edge,Falling edge" bitfld.word 0x06 7. "SWI,Software initialization of position counter" "No action,Initialized" bitfld.word 0x06 6. "SEL,Strobe event latch of position counter" "On the rising edge of QEPS strobe,Clockwise direction" newline bitfld.word 0x06 4.--5. "IEL,Index event latch of position counter (Software index marker)" ",Rising edge,Falling edge,Software index marker" bitfld.word 0x06 3. "PHEN,Quadrature position counter enable/software reset" "Reset,Enabled" bitfld.word 0x06 2. "QCLM,Eqep capture latch mode" "On position counter read by CPU,On unit time out" newline bitfld.word 0x06 1. "UTE,Eqep unit timer enable" "Disabled,Enabled" bitfld.word 0x06 0. "WDE,Eqep watchdog enable" "Disabled,Enabled" line.word 0x08 "QCAPCTL,eQEP Capture Control Register" bitfld.word 0x08 15. "CEN,Enable eqep capture" "Disabled,Enabled" bitfld.word 0x08 4.--6. "CCPS,Eqep capture timer clock prescaler" "/1,/2,/4,/8,/16,/32,/64,/128" bitfld.word 0x08 0.--3. "UPPS,Unit position event prescaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,?..." line.word 0x0A "QPOSCTL,eQEP Position-Compare Control Register" bitfld.word 0x0A 15. "PCSHDW,Position-compare shadow enable" "Disabled,Enabled" bitfld.word 0x0A 14. "PCLOAD,Position-compare shadow load mode" "QPOSCNT = 0,QPOSCNT = QPOSCMP" bitfld.word 0x0A 13. "PCPOL,Polarity of sync output" "Active high,Active low" newline bitfld.word 0x0A 12. "PCE,Position-compare enable/disable" "Disabled,Enabled" hexmask.word 0x0A 0.--11. 1. "PCSPW,Select-position-compare sync output pulse width" line.word 0x0C "QEINT,eQEP Interrupt Enable Register" bitfld.word 0x0C 11. "UTO,Unit time out interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 10. "IEL,Index event latch interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 9. "SEL,Strobe event latch interrupt enable" "Disabled,Enabled" newline bitfld.word 0x0C 8. "PCM,Position-compare match interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 7. "PCR,Position-compare ready interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 6. "PCO,Position counter overflow interrupt enable" "Disabled,Enabled" newline bitfld.word 0x0C 5. "PCU,Position counter underflow interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 4. "WTO,Watchdog time out interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 3. "QDC,Quadrature direction change interrupt enable" "Disabled,Enabled" newline bitfld.word 0x0C 2. "PHE,Quadrature phase error interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 1. "PCE,Position counter error interrupt enable" "Disabled,Enabled" line.word 0x0E "QFLG,eQEP Interrupt Flag Register" setclrfld.word 0x0E 11. 0x12 11. 0x10 11. "UTO_SET/CLR,Unit time out interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 10. 0x12 10. 0x10 10. "IEL_SET/CLR,Index event latch interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 9. 0x12 9. 0x10 9. "SEL_SET/CLR,Strobe event latch interrupt flag" "No interrupt,Interrupt" newline setclrfld.word 0x0E 8. 0x12 8. 0x10 8. "PCM_SET/CLR,Position-compare match interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 7. 0x12 7. 0x10 7. "PCR_SET/CLR,Position-compare ready interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 6. 0x12 6. 0x10 6. "PCO_SET/CLR,Position counter overflow interrupt flag" "No interrupt,Interrupt" newline setclrfld.word 0x0E 5. 0x12 5. 0x10 5. "PCU_SET/CLR,Position counter underflow interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 4. 0x12 4. 0x10 4. "WTO_SET/CLR,Watchdog time out interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 3. 0x12 3. 0x10 3. "QDC_SET/CLR,Quadrature direction change interrupt flag" "No interrupt,Interrupt" newline setclrfld.word 0x0E 2. 0x12 2. 0x10 2. "PHE_SET/CLR,Quadrature phase error interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 1. 0x12 1. 0x10 1. "PCE_SET/CLR,Position counter error interrupt flag" "No interrupt,Interrupt" rbitfld.word 0x0E 0. "INT,Global interrupt status flag" "No interrupt,Interrupt" line.word 0x10 "QCLR,eQEP Interrupt Clear Register" bitfld.word 0x10 0. "INT,Global interrupt clear flag" "No effect,Clear" group.word 0x38++0x05 line.word 0x00 "QEPSTS,eQEP Status Register" rbitfld.word 0x00 7. "UPEVNT,Unit position event flag" "Not occured,Occured" rbitfld.word 0x00 6. "FDF,Direction on the first index marker" "Counter-clockwise,Clockwise" rbitfld.word 0x00 5. "QDF,Quadrature direction flag" "Counter-clockwise,Clockwise" newline rbitfld.word 0x00 4. "QDLF,Eqep direction latch flag" "Counter-clockwise,Clockwise" bitfld.word 0x00 3. "COEF,Capture overflow error flag" "Not occured,Occured" bitfld.word 0x00 2. "CDEF,Capture direction error flag" "Not occured,Occured" newline bitfld.word 0x00 1. "FIMF,First index marker flag" "Not occured,Occured" rbitfld.word 0x00 0. "PCEF,Position counter error flag" "Not occured,Occured" line.word 0x02 "QCTMR,eQEP Capture Timer Register" line.word 0x04 "QCPRD,eQEP Capture Period Register" rgroup.word 0x3E++0x01 line.word 0x00 "QCTMRLAT,eQEP Capture Timer Latch Register" group.long 0x40++0x03 line.long 0x00 "QCPRDLAT,eQEP Capture Period Latch Register" rgroup.long 0x5C++0x03 line.long 0x00 "REVID,eQEP Revision ID Register" tree.end tree "eQEP2" base ad:0x48304180 group.long 0x00++0x0F line.long 0x00 "QPOSCNT,eQEP Position Counter Register" line.long 0x04 "QPOSINIT,eQEP Position Counter Initialization Register" line.long 0x08 "QPOSMAX,eQEP Maximum Position Count Register" line.long 0x0C "QPOSCMP,eQEP Position-Compare Register" rgroup.long 0x10++0x0B line.long 0x00 "QPOSILAT,eQEP Index Position Latch Register" line.long 0x04 "QPOSSLAT,eQEP Strobe Position Latch Register" line.long 0x08 "QPOSLAT,eQEP Position Counter Latch Register" group.long 0x1C++0x07 line.long 0x00 "QUTMR,eQEP Unit Timer Register" line.long 0x04 "QUPRD,eQEP Unit Period Register" group.word 0x24++0x11 line.word 0x00 "QWDTMR,eQEP Watchdog Timer Register" line.word 0x02 "QWDPRD,eQEP Watchdog Period Register" line.word 0x04 "QDECCTL,eQEP Decoder Control Register" bitfld.word 0x04 14.--15. "QSRC,Position-counter source selection" "Quadrature count mode,Direction-count mode,UP count mode for frequency measurement,DOWN count mode for frequency measurement" bitfld.word 0x04 13. "SOEN,Sync output-enable" "Disabled,Enabled" bitfld.word 0x04 12. "SPSEL,Sync output pin selection" "Index pin,Stobe pin" newline bitfld.word 0x04 11. "XCR,External clock rate" "2x resolution,1x resolution" bitfld.word 0x04 10. "SWAP,Swap quadrature clock inputs" "Not swapped,Swapped" bitfld.word 0x04 9. "IGATE,Index pulse gating option" "Disabled,Enabled" newline bitfld.word 0x04 8. "QAP,QEPA input polarity" "No effect,Inverted" bitfld.word 0x04 7. "QBP,QEPB input polarity" "No effect,Inverted" bitfld.word 0x04 6. "QIP,QEPI input polarity" "No effect,Inverted" newline bitfld.word 0x04 5. "QSP,QEPS input polarity" "No effect,Inverted" line.word 0x06 "QEPCTL,eQEP Decoder Control Register" bitfld.word 0x06 14.--15. "FREE_SOFT,Emulation control bits" "Stop,Runs until = 0,Free-running,Free-running" bitfld.word 0x06 12.--13. "PCRM,Position counter reset mode" "On index event,On maximum position,On first index event,On unit time event" bitfld.word 0x06 10.--11. "SEI,Strobe event initialization of position counter" "No action,No action,Rising edge,Clockwise direction" newline bitfld.word 0x06 8.--9. "IEI,Index event initialization of position counter" "No action,No action,Rising edge,Falling edge" bitfld.word 0x06 7. "SWI,Software initialization of position counter" "No action,Initialized" bitfld.word 0x06 6. "SEL,Strobe event latch of position counter" "On the rising edge of QEPS strobe,Clockwise direction" newline bitfld.word 0x06 4.--5. "IEL,Index event latch of position counter (Software index marker)" ",Rising edge,Falling edge,Software index marker" bitfld.word 0x06 3. "PHEN,Quadrature position counter enable/software reset" "Reset,Enabled" bitfld.word 0x06 2. "QCLM,Eqep capture latch mode" "On position counter read by CPU,On unit time out" newline bitfld.word 0x06 1. "UTE,Eqep unit timer enable" "Disabled,Enabled" bitfld.word 0x06 0. "WDE,Eqep watchdog enable" "Disabled,Enabled" line.word 0x08 "QCAPCTL,eQEP Capture Control Register" bitfld.word 0x08 15. "CEN,Enable eqep capture" "Disabled,Enabled" bitfld.word 0x08 4.--6. "CCPS,Eqep capture timer clock prescaler" "/1,/2,/4,/8,/16,/32,/64,/128" bitfld.word 0x08 0.--3. "UPPS,Unit position event prescaler" "/1,/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,?..." line.word 0x0A "QPOSCTL,eQEP Position-Compare Control Register" bitfld.word 0x0A 15. "PCSHDW,Position-compare shadow enable" "Disabled,Enabled" bitfld.word 0x0A 14. "PCLOAD,Position-compare shadow load mode" "QPOSCNT = 0,QPOSCNT = QPOSCMP" bitfld.word 0x0A 13. "PCPOL,Polarity of sync output" "Active high,Active low" newline bitfld.word 0x0A 12. "PCE,Position-compare enable/disable" "Disabled,Enabled" hexmask.word 0x0A 0.--11. 1. "PCSPW,Select-position-compare sync output pulse width" line.word 0x0C "QEINT,eQEP Interrupt Enable Register" bitfld.word 0x0C 11. "UTO,Unit time out interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 10. "IEL,Index event latch interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 9. "SEL,Strobe event latch interrupt enable" "Disabled,Enabled" newline bitfld.word 0x0C 8. "PCM,Position-compare match interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 7. "PCR,Position-compare ready interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 6. "PCO,Position counter overflow interrupt enable" "Disabled,Enabled" newline bitfld.word 0x0C 5. "PCU,Position counter underflow interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 4. "WTO,Watchdog time out interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 3. "QDC,Quadrature direction change interrupt enable" "Disabled,Enabled" newline bitfld.word 0x0C 2. "PHE,Quadrature phase error interrupt enable" "Disabled,Enabled" bitfld.word 0x0C 1. "PCE,Position counter error interrupt enable" "Disabled,Enabled" line.word 0x0E "QFLG,eQEP Interrupt Flag Register" setclrfld.word 0x0E 11. 0x12 11. 0x10 11. "UTO_SET/CLR,Unit time out interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 10. 0x12 10. 0x10 10. "IEL_SET/CLR,Index event latch interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 9. 0x12 9. 0x10 9. "SEL_SET/CLR,Strobe event latch interrupt flag" "No interrupt,Interrupt" newline setclrfld.word 0x0E 8. 0x12 8. 0x10 8. "PCM_SET/CLR,Position-compare match interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 7. 0x12 7. 0x10 7. "PCR_SET/CLR,Position-compare ready interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 6. 0x12 6. 0x10 6. "PCO_SET/CLR,Position counter overflow interrupt flag" "No interrupt,Interrupt" newline setclrfld.word 0x0E 5. 0x12 5. 0x10 5. "PCU_SET/CLR,Position counter underflow interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 4. 0x12 4. 0x10 4. "WTO_SET/CLR,Watchdog time out interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 3. 0x12 3. 0x10 3. "QDC_SET/CLR,Quadrature direction change interrupt flag" "No interrupt,Interrupt" newline setclrfld.word 0x0E 2. 0x12 2. 0x10 2. "PHE_SET/CLR,Quadrature phase error interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x0E 1. 0x12 1. 0x10 1. "PCE_SET/CLR,Position counter error interrupt flag" "No interrupt,Interrupt" rbitfld.word 0x0E 0. "INT,Global interrupt status flag" "No interrupt,Interrupt" line.word 0x10 "QCLR,eQEP Interrupt Clear Register" bitfld.word 0x10 0. "INT,Global interrupt clear flag" "No effect,Clear" group.word 0x38++0x05 line.word 0x00 "QEPSTS,eQEP Status Register" rbitfld.word 0x00 7. "UPEVNT,Unit position event flag" "Not occured,Occured" rbitfld.word 0x00 6. "FDF,Direction on the first index marker" "Counter-clockwise,Clockwise" rbitfld.word 0x00 5. "QDF,Quadrature direction flag" "Counter-clockwise,Clockwise" newline rbitfld.word 0x00 4. "QDLF,Eqep direction latch flag" "Counter-clockwise,Clockwise" bitfld.word 0x00 3. "COEF,Capture overflow error flag" "Not occured,Occured" bitfld.word 0x00 2. "CDEF,Capture direction error flag" "Not occured,Occured" newline bitfld.word 0x00 1. "FIMF,First index marker flag" "Not occured,Occured" rbitfld.word 0x00 0. "PCEF,Position counter error flag" "Not occured,Occured" line.word 0x02 "QCTMR,eQEP Capture Timer Register" line.word 0x04 "QCPRD,eQEP Capture Period Register" rgroup.word 0x3E++0x01 line.word 0x00 "QCTMRLAT,eQEP Capture Timer Latch Register" group.long 0x40++0x03 line.long 0x00 "QCPRDLAT,eQEP Capture Period Latch Register" rgroup.long 0x5C++0x03 line.long 0x00 "REVID,eQEP Revision ID Register" tree.end tree.end tree.end tree "USB (Universal Serial Bus)" tree "USBSS" base ad:0x47400000 rgroup.long 0x00++0x03 line.long 0x00 "REVREG,Revision Register" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between legacy interface scheme and current" "Legacy,Current,?..." hexmask.long.word 0x00 16.--27. 1. "FUNC,Function indicates a software compatible module family" bitfld.long 0x00 11.--15. "R_RTL,RTL revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "X_MAJOR,Major revision" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "CUSTOM,Custom revision" "0,1,2,3" bitfld.long 0x00 0.--5. "Y_MINOR,Minor revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x10++0x03 line.long 0x00 "SYSCONFIG,System Configuration Register" bitfld.long 0x00 11. "USB0_OCP_EN_N,Active low clock disable for USB0_OCP_CLK" "No,Yes" bitfld.long 0x00 10. "PHY0_UTMI_EN_N,Active low clock disable for PHY0_UTMI_CLK" "No,Yes" bitfld.long 0x00 9. "USB1_OCP_EN_N,Active low clock disable for USB1_OCP_CLK" "No,Yes" newline bitfld.long 0x00 8. "PHY1_UTMI_EN_N,Active low clock disable for PHY1_UTMI_CLK" "No,Yes" bitfld.long 0x00 4.--5. "STANDBY_MODE,Configuration of the local initiator state management mode" "Force-standby,No-standby,Smart-standby,?..." bitfld.long 0x00 2.--3. "IDLEMODE,Configuration of the local target state management mode" "Force-idle,No-idle,Smart-idle,smart-idle with wakeup" newline bitfld.long 0x00 1. "FREEEMU,Sensitivity to emulation (Debug) suspend input signal disable" "No,Yes" bitfld.long 0x00 0. "SOFT_RESET,Software reset of USBSS USB0 and USB1 modules" "No action,Reset" group.long 0x24++0x07 line.long 0x00 "IRQSTATRAW,IRQSTATRAW Register" bitfld.long 0x00 11. "RX_PKT_CMP_1,Interrupt status for USB1 rx CPPI DMA packet completion status" "In progress,Done" bitfld.long 0x00 10. "TX_PKT_CMP_1,Interrupt status for USB1 tx CPPI DMA packet completion status" "In progress,Done" bitfld.long 0x00 9. "RX_PKT_CMP_0,Interrupt status for USB0 rx CPPI DMA packet completion status" "In progress,Done" newline bitfld.long 0x00 8. "TX_PKT_CMP_0,Interrupt status for USB0 tx CPPI DMA packet completion status" "In progress,Done" bitfld.long 0x00 2. "PD_CMP_FLAG,Interrupt status when the packet is completed" "In progress,Done" bitfld.long 0x00 1. "RX_MOP_STARVATION,Interrupt status when queue manager cannot allocate an rx buffer in the middle of a packet" "No interrupt,Interrupt" newline bitfld.long 0x00 0. "RX_SOP_STARVATION,Interrupt status when queue manager cannot allocate an rx buffer at the start of a packet" "No interrupt,Interrupt" line.long 0x04 "IRQSTAT_SET/CLR,IRQSTAT Register" setclrfld.long 0x04 11. 0x08 11. 0x0C 11. "RX_PKT_CMP_1,Interrupt status for USB1 rx CPPI DMA packet completion status" "In progress,Done" setclrfld.long 0x04 10. 0x08 10. 0x0C 10. "TX_PKT_CMP_1,Interrupt status for USB1 tx CPPI DMA packet completion status" "In progress,Done" setclrfld.long 0x04 9. 0x08 9. 0x0C 9. "RX_PKT_CMP_0,Interrupt status for USB0 rx CPPI DMA packet completion status" "In progress,Done" newline setclrfld.long 0x04 8. 0x08 8. 0x0C 8. "TX_PKT_CMP_0,Interrupt status for USB0 tx CPPI DMA packet completion status" "In progress,Done" setclrfld.long 0x04 2. 0x08 2. 0x0C 2. "PD_CMP_FLAG,Interrupt status when the packet is completed" "In progress,Done" setclrfld.long 0x04 1. 0x08 1. 0x0C 1. "RX_MOP_STARVATION,Interrupt status when queue manager cannot allocate an rx buffer in the middle of a packet" "No interrupt,Interrupt" newline setclrfld.long 0x04 0. 0x08 0. 0x0C 0. "RX_SOP_STARVATION,Interrupt status when queue manager cannot allocate an rx buffer at the start of a packet" "No interrupt,Interrupt" group.long 0x100++0x0F line.long 0x00 "IRQDMATHOLDTX00,IRQDMATHOLDTX00 Register" hexmask.long.byte 0x00 24.--31. 1. "DMA_THRES_TX0[3],DMA threshold value for TX_PKT_CMP_0 for USB0 endpoint 1" hexmask.long.byte 0x00 16.--23. 1. "DMA_THRES_TX0[2],DMA threshold value for TX_PKT_CMP_0 for USB0 endpoint 1" hexmask.long.byte 0x00 8.--15. 1. "DMA_THRES_TX0[1],DMA threshold value for TX_PKT_CMP_0 for USB0 endpoint 1" line.long 0x04 "IRQDMATHOLDTX01,IRQDMATHOLDTX01 Register" hexmask.long.byte 0x04 24.--31. 1. "DMA_THRES_TX0[7],DMA threshold value for TX_PKT_CMP_0 for USB0 endpoint 7" hexmask.long.byte 0x04 16.--23. 1. "DMA_THRES_TX0[6],DMA threshold value for TX_PKT_CMP_0 for USB0 endpoint 6" hexmask.long.byte 0x04 8.--15. 1. "DMA_THRES_TX0[5],DMA threshold value for TX_PKT_CMP_0 for USB0 endpoint 5" newline hexmask.long.byte 0x04 0.--7. 1. "DMA_THRES_TX0[4],DMA threshold value for TX_PKT_CMP_0 for USB0 endpoint 4" line.long 0x08 "IRQDMATHOLDTX02,IRQDMATHOLDTX02 Register" hexmask.long.byte 0x08 24.--31. 1. "DMA_THRES_TX0[11],DMA threshold value for TX_PKT_CMP_0 for USB0 endpoint 11" hexmask.long.byte 0x08 16.--23. 1. "DMA_THRES_TX0[10],DMA threshold value for TX_PKT_CMP_0 for USB0 endpoint 10" hexmask.long.byte 0x08 8.--15. 1. "DMA_THRES_TX0[9],DMA threshold value for TX_PKT_CMP_0 for USB0 endpoint 9" newline hexmask.long.byte 0x08 0.--7. 1. "DMA_THRES_TX0[8],DMA threshold value for TX_PKT_CMP_0 for USB0 endpoint 8" line.long 0x0C "IRQDMATHOLDTX03,IRQDMATHOLDTX03 Register" hexmask.long.byte 0x0C 24.--31. 1. "DMA_THRES_TX0[15],DMA threshold value for TX_PKT_CMP_0 for USB0 endpoint 15" hexmask.long.byte 0x0C 16.--23. 1. "DMA_THRES_TX0[14],DMA threshold value for TX_PKT_CMP_0 for USB0 endpoint 14" hexmask.long.byte 0x0C 8.--15. 1. "DMA_THRES_TX0[13],DMA threshold value for TX_PKT_CMP_0 for USB0 endpoint 13" newline hexmask.long.byte 0x0C 0.--7. 1. "DMA_THRES_TX0[12],DMA threshold value for TX_PKT_CMP_0 for USB0 endpoint 12" group.long 0x110++0x0F line.long 0x00 "IRQDMATHOLDRX00,IRQDMATHOLDRX00 Register" hexmask.long.byte 0x00 24.--31. 1. "DMA_THRES_RX0[3],DMA threshold value for RX_PKT_CMP_0 for USB0 endpoint 1" hexmask.long.byte 0x00 16.--23. 1. "DMA_THRES_RX0[2],DMA threshold value for RX_PKT_CMP_0 for USB0 endpoint 1" hexmask.long.byte 0x00 8.--15. 1. "DMA_THRES_RX0[1],DMA threshold value for RX_PKT_CMP_0 for USB0 endpoint 1" line.long 0x04 "IRQDMATHOLDRX01,IRQDMATHOLDRX01 Register" hexmask.long.byte 0x04 24.--31. 1. "DMA_THRES_RX0[7],DMA threshold value for RX_PKT_CMP_0 for USB0 endpoint 7" hexmask.long.byte 0x04 16.--23. 1. "DMA_THRES_RX0[6],DMA threshold value for RX_PKT_CMP_0 for USB0 endpoint 6" hexmask.long.byte 0x04 8.--15. 1. "DMA_THRES_RX0[5],DMA threshold value for RX_PKT_CMP_0 for USB0 endpoint 5" newline hexmask.long.byte 0x04 0.--7. 1. "DMA_THRES_RX0[4],DMA threshold value for RX_PKT_CMP_0 for USB0 endpoint 4" line.long 0x08 "IRQDMATHOLDRX02,IRQDMATHOLDRX02 Register" hexmask.long.byte 0x08 24.--31. 1. "DMA_THRES_RX0[11],DMA threshold value for RX_PKT_CMP_0 for USB0 endpoint 11" hexmask.long.byte 0x08 16.--23. 1. "DMA_THRES_RX0[10],DMA threshold value for RX_PKT_CMP_0 for USB0 endpoint 10" hexmask.long.byte 0x08 8.--15. 1. "DMA_THRES_RX0[9],DMA threshold value for RX_PKT_CMP_0 for USB0 endpoint 9" newline hexmask.long.byte 0x08 0.--7. 1. "DMA_THRES_RX0[8],DMA threshold value for RX_PKT_CMP_0 for USB0 endpoint 8" line.long 0x0C "IRQDMATHOLDRX03,IRQDMATHOLDRX03 Register" hexmask.long.byte 0x0C 24.--31. 1. "DMA_THRES_RX0[15],DMA threshold value for RX_PKT_CMP_0 for USB0 endpoint 15" hexmask.long.byte 0x0C 16.--23. 1. "DMA_THRES_RX0[14],DMA threshold value for RX_PKT_CMP_0 for USB0 endpoint 14" hexmask.long.byte 0x0C 8.--15. 1. "DMA_THRES_RX0[13],DMA threshold value for RX_PKT_CMP_0 for USB0 endpoint 13" newline hexmask.long.byte 0x0C 0.--7. 1. "DMA_THRES_RX0[12],DMA threshold value for RX_PKT_CMP_0 for USB0 endpoint 12" group.long 0x120++0x0F line.long 0x00 "IRQDMATHOLDTX10,IRQDMATHOLDTX10 Register" hexmask.long.byte 0x00 24.--31. 1. "DMA_THRES_TX1[3],DMA threshold value for TX_PKT_CMP_1 for USB0 endpoint 1" hexmask.long.byte 0x00 16.--23. 1. "DMA_THRES_TX1[2],DMA threshold value for TX_PKT_CMP_1 for USB0 endpoint 1" hexmask.long.byte 0x00 8.--15. 1. "DMA_THRES_TX1[1],DMA threshold value for TX_PKT_CMP_1 for USB0 endpoint 1" line.long 0x04 "IRQDMATHOLDTX11,IRQDMATHOLDTX11 Register" hexmask.long.byte 0x04 24.--31. 1. "DMA_THRES_TX1[7],DMA threshold value for TX_PKT_CMP_1 for USB0 endpoint 7" hexmask.long.byte 0x04 16.--23. 1. "DMA_THRES_TX1[6],DMA threshold value for TX_PKT_CMP_1 for USB0 endpoint 6" hexmask.long.byte 0x04 8.--15. 1. "DMA_THRES_TX1[5],DMA threshold value for TX_PKT_CMP_1 for USB0 endpoint 5" newline hexmask.long.byte 0x04 0.--7. 1. "DMA_THRES_TX1[4],DMA threshold value for TX_PKT_CMP_1 for USB0 endpoint 4" line.long 0x08 "IRQDMATHOLDTX12,IRQDMATHOLDTX12 Register" hexmask.long.byte 0x08 24.--31. 1. "DMA_THRES_TX1[11],DMA threshold value for TX_PKT_CMP_1 for USB0 endpoint 11" hexmask.long.byte 0x08 16.--23. 1. "DMA_THRES_TX1[10],DMA threshold value for TX_PKT_CMP_1 for USB0 endpoint 10" hexmask.long.byte 0x08 8.--15. 1. "DMA_THRES_TX1[9],DMA threshold value for TX_PKT_CMP_1 for USB0 endpoint 9" newline hexmask.long.byte 0x08 0.--7. 1. "DMA_THRES_TX1[8],DMA threshold value for TX_PKT_CMP_1 for USB0 endpoint 8" line.long 0x0C "IRQDMATHOLDTX13,IRQDMATHOLDTX13 Register" hexmask.long.byte 0x0C 24.--31. 1. "DMA_THRES_TX1[15],DMA threshold value for TX_PKT_CMP_1 for USB0 endpoint 15" hexmask.long.byte 0x0C 16.--23. 1. "DMA_THRES_TX1[14],DMA threshold value for TX_PKT_CMP_1 for USB0 endpoint 14" hexmask.long.byte 0x0C 8.--15. 1. "DMA_THRES_TX1[13],DMA threshold value for TX_PKT_CMP_1 for USB0 endpoint 13" newline hexmask.long.byte 0x0C 0.--7. 1. "DMA_THRES_TX1[12],DMA threshold value for TX_PKT_CMP_1 for USB0 endpoint 12" group.long 0x130++0x0F line.long 0x00 "IRQDMATHOLDRX10,IRQDMATHOLDRX10 Register" hexmask.long.byte 0x00 24.--31. 1. "DMA_THRES_RX1[3],DMA threshold value for RX_PKT_CMP_1 for USB0 endpoint 1" hexmask.long.byte 0x00 16.--23. 1. "DMA_THRES_RX1[2],DMA threshold value for RX_PKT_CMP_1 for USB0 endpoint 1" hexmask.long.byte 0x00 8.--15. 1. "DMA_THRES_RX1[1],DMA threshold value for RX_PKT_CMP_1 for USB0 endpoint 1" line.long 0x04 "IRQDMATHOLDRX11,IRQDMATHOLDRX11 Register" hexmask.long.byte 0x04 24.--31. 1. "DMA_THRES_RX1[7],DMA threshold value for RX_PKT_CMP_1 for USB0 endpoint 7" hexmask.long.byte 0x04 16.--23. 1. "DMA_THRES_RX1[6],DMA threshold value for RX_PKT_CMP_1 for USB0 endpoint 6" hexmask.long.byte 0x04 8.--15. 1. "DMA_THRES_RX1[5],DMA threshold value for RX_PKT_CMP_1 for USB0 endpoint 5" newline hexmask.long.byte 0x04 0.--7. 1. "DMA_THRES_RX1[4],DMA threshold value for RX_PKT_CMP_1 for USB0 endpoint 4" line.long 0x08 "IRQDMATHOLDRX12,IRQDMATHOLDRX12 Register" hexmask.long.byte 0x08 24.--31. 1. "DMA_THRES_RX1[11],DMA threshold value for RX_PKT_CMP_1 for USB0 endpoint 11" hexmask.long.byte 0x08 16.--23. 1. "DMA_THRES_RX1[10],DMA threshold value for RX_PKT_CMP_1 for USB0 endpoint 10" hexmask.long.byte 0x08 8.--15. 1. "DMA_THRES_RX1[9],DMA threshold value for RX_PKT_CMP_1 for USB0 endpoint 9" newline hexmask.long.byte 0x08 0.--7. 1. "DMA_THRES_RX1[8],DMA threshold value for RX_PKT_CMP_1 for USB0 endpoint 8" line.long 0x0C "IRQDMATHOLDRX13,IRQDMATHOLDRX13 Register" hexmask.long.byte 0x0C 24.--31. 1. "DMA_THRES_RX1[15],DMA threshold value for RX_PKT_CMP_1 for USB0 endpoint 15" hexmask.long.byte 0x0C 16.--23. 1. "DMA_THRES_RX1[14],DMA threshold value for RX_PKT_CMP_1 for USB0 endpoint 14" hexmask.long.byte 0x0C 8.--15. 1. "DMA_THRES_RX1[13],DMA threshold value for RX_PKT_CMP_1 for USB0 endpoint 13" newline hexmask.long.byte 0x0C 0.--7. 1. "DMA_THRES_RX1[12],DMA threshold value for RX_PKT_CMP_1 for USB0 endpoint 12" group.long 0x140++0x03 line.long 0x00 "IRQDMAENABLE0,IRQDMAENABLE0 Register" bitfld.long 0x00 31. "DMA_EN_RX0[15],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 15" "Disabled,Enabled" bitfld.long 0x00 30. "DMA_EN_RX0[14],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 14" "Disabled,Enabled" bitfld.long 0x00 29. "DMA_EN_RX0[13],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 13" "Disabled,Enabled" newline bitfld.long 0x00 28. "DMA_EN_RX0[12],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 12" "Disabled,Enabled" bitfld.long 0x00 27. "DMA_EN_RX0[11],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 11" "Disabled,Enabled" bitfld.long 0x00 26. "DMA_EN_RX0[10],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 10" "Disabled,Enabled" newline bitfld.long 0x00 25. "DMA_EN_RX0[9],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 9" "Disabled,Enabled" bitfld.long 0x00 24. "DMA_EN_RX0[8],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 8" "Disabled,Enabled" bitfld.long 0x00 23. "DMA_EN_RX0[7],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 7" "Disabled,Enabled" newline bitfld.long 0x00 22. "DMA_EN_RX0[6],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 6" "Disabled,Enabled" bitfld.long 0x00 21. "DMA_EN_RX0[5],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 5" "Disabled,Enabled" bitfld.long 0x00 20. "DMA_EN_RX0[4],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 4" "Disabled,Enabled" newline bitfld.long 0x00 19. "DMA_EN_RX0[3],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 3" "Disabled,Enabled" bitfld.long 0x00 18. "DMA_EN_RX0[2],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 2" "Disabled,Enabled" bitfld.long 0x00 17. "DMA_EN_RX0[1],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 1" "Disabled,Enabled" newline bitfld.long 0x00 15. "DMA_EN_TX0[15],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 15" "Disabled,Enabled" bitfld.long 0x00 14. "DMA_EN_TX0[14],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 14" "Disabled,Enabled" bitfld.long 0x00 13. "DMA_EN_TX0[13],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 13" "Disabled,Enabled" newline bitfld.long 0x00 12. "DMA_EN_TX0[12],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 12" "Disabled,Enabled" bitfld.long 0x00 11. "DMA_EN_TX0[11],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 11" "Disabled,Enabled" bitfld.long 0x00 10. "DMA_EN_TX0[10],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 10" "Disabled,Enabled" newline bitfld.long 0x00 9. "DMA_EN_TX0[9],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 9" "Disabled,Enabled" bitfld.long 0x00 8. "DMA_EN_TX0[8],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 8" "Disabled,Enabled" bitfld.long 0x00 7. "DMA_EN_TX0[7],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 7" "Disabled,Enabled" newline bitfld.long 0x00 6. "DMA_EN_TX0[6],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 6" "Disabled,Enabled" bitfld.long 0x00 5. "DMA_EN_TX0[5],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 5" "Disabled,Enabled" bitfld.long 0x00 4. "DMA_EN_TX0[4],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 4" "Disabled,Enabled" newline bitfld.long 0x00 3. "DMA_EN_TX0[3],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 3" "Disabled,Enabled" bitfld.long 0x00 2. "DMA_EN_TX0[2],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 2" "Disabled,Enabled" bitfld.long 0x00 1. "DMA_EN_TX0[1],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 1" "Disabled,Enabled" group.long 0x144++0x03 line.long 0x00 "IRQDMAENABLE1,IRQDMAENABLE1 Register" bitfld.long 0x00 31. "DMA_EN_RX1[15],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 15" "Disabled,Enabled" bitfld.long 0x00 30. "DMA_EN_RX1[14],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 14" "Disabled,Enabled" bitfld.long 0x00 29. "DMA_EN_RX1[13],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 13" "Disabled,Enabled" newline bitfld.long 0x00 28. "DMA_EN_RX1[12],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 12" "Disabled,Enabled" bitfld.long 0x00 27. "DMA_EN_RX1[11],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 11" "Disabled,Enabled" bitfld.long 0x00 26. "DMA_EN_RX1[10],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 10" "Disabled,Enabled" newline bitfld.long 0x00 25. "DMA_EN_RX1[9],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 9" "Disabled,Enabled" bitfld.long 0x00 24. "DMA_EN_RX1[8],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 8" "Disabled,Enabled" bitfld.long 0x00 23. "DMA_EN_RX1[7],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 7" "Disabled,Enabled" newline bitfld.long 0x00 22. "DMA_EN_RX1[6],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 6" "Disabled,Enabled" bitfld.long 0x00 21. "DMA_EN_RX1[5],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 5" "Disabled,Enabled" bitfld.long 0x00 20. "DMA_EN_RX1[4],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 4" "Disabled,Enabled" newline bitfld.long 0x00 19. "DMA_EN_RX1[3],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 3" "Disabled,Enabled" bitfld.long 0x00 18. "DMA_EN_RX1[2],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 2" "Disabled,Enabled" bitfld.long 0x00 17. "DMA_EN_RX1[1],DMA threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 1" "Disabled,Enabled" newline bitfld.long 0x00 15. "DMA_EN_TX1[15],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 15" "Disabled,Enabled" bitfld.long 0x00 14. "DMA_EN_TX1[14],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 14" "Disabled,Enabled" bitfld.long 0x00 13. "DMA_EN_TX1[13],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 13" "Disabled,Enabled" newline bitfld.long 0x00 12. "DMA_EN_TX1[12],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 12" "Disabled,Enabled" bitfld.long 0x00 11. "DMA_EN_TX1[11],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 11" "Disabled,Enabled" bitfld.long 0x00 10. "DMA_EN_TX1[10],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 10" "Disabled,Enabled" newline bitfld.long 0x00 9. "DMA_EN_TX1[9],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 9" "Disabled,Enabled" bitfld.long 0x00 8. "DMA_EN_TX1[8],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 8" "Disabled,Enabled" bitfld.long 0x00 7. "DMA_EN_TX1[7],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 7" "Disabled,Enabled" newline bitfld.long 0x00 6. "DMA_EN_TX1[6],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 6" "Disabled,Enabled" bitfld.long 0x00 5. "DMA_EN_TX1[5],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 5" "Disabled,Enabled" bitfld.long 0x00 4. "DMA_EN_TX1[4],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 4" "Disabled,Enabled" newline bitfld.long 0x00 3. "DMA_EN_TX1[3],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 3" "Disabled,Enabled" bitfld.long 0x00 2. "DMA_EN_TX1[2],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 2" "Disabled,Enabled" bitfld.long 0x00 1. "DMA_EN_TX1[1],DMA threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 1" "Disabled,Enabled" group.long 0x200++0x0F line.long 0x00 "IRQFRAMETHOLDTX00,IRQFRAMETHOLDTX00 Register" hexmask.long.byte 0x00 24.--31. 1. "FRAME_THRES_TX0[3],FRAME threshold value for TX_PKT_CMP_0 for USB0 endpoint 1" hexmask.long.byte 0x00 16.--23. 1. "FRAME_THRES_TX0[2],FRAME threshold value for TX_PKT_CMP_0 for USB0 endpoint 1" hexmask.long.byte 0x00 8.--15. 1. "FRAME_THRES_TX0[1],FRAME threshold value for TX_PKT_CMP_0 for USB0 endpoint 1" line.long 0x04 "IRQFRAMETHOLDTX01,IRQFRAMETHOLDTX01 Register" hexmask.long.byte 0x04 24.--31. 1. "FRAME_THRES_TX0[7],FRAME threshold value for TX_PKT_CMP_0 for USB0 endpoint 7" hexmask.long.byte 0x04 16.--23. 1. "FRAME_THRES_TX0[6],FRAME threshold value for TX_PKT_CMP_0 for USB0 endpoint 6" hexmask.long.byte 0x04 8.--15. 1. "FRAME_THRES_TX0[5],FRAME threshold value for TX_PKT_CMP_0 for USB0 endpoint 5" newline hexmask.long.byte 0x04 0.--7. 1. "FRAME_THRES_TX0[4],FRAME threshold value for TX_PKT_CMP_0 for USB0 endpoint 4" line.long 0x08 "IRQFRAMETHOLDTX02,IRQFRAMETHOLDTX02 Register" hexmask.long.byte 0x08 24.--31. 1. "FRAME_THRES_TX0[11],FRAME threshold value for TX_PKT_CMP_0 for USB0 endpoint 11" hexmask.long.byte 0x08 16.--23. 1. "FRAME_THRES_TX0[10],FRAME threshold value for TX_PKT_CMP_0 for USB0 endpoint 10" hexmask.long.byte 0x08 8.--15. 1. "FRAME_THRES_TX0[9],FRAME threshold value for TX_PKT_CMP_0 for USB0 endpoint 9" newline hexmask.long.byte 0x08 0.--7. 1. "FRAME_THRES_TX0[8],FRAME threshold value for TX_PKT_CMP_0 for USB0 endpoint 8" line.long 0x0C "IRQFRAMETHOLDTX03,IRQFRAMETHOLDTX03 Register" hexmask.long.byte 0x0C 24.--31. 1. "FRAME_THRES_TX0[15],FRAME threshold value for TX_PKT_CMP_0 for USB0 endpoint 15" hexmask.long.byte 0x0C 16.--23. 1. "FRAME_THRES_TX0[14],FRAME threshold value for TX_PKT_CMP_0 for USB0 endpoint 14" hexmask.long.byte 0x0C 8.--15. 1. "FRAME_THRES_TX0[13],FRAME threshold value for TX_PKT_CMP_0 for USB0 endpoint 13" newline hexmask.long.byte 0x0C 0.--7. 1. "FRAME_THRES_TX0[12],FRAME threshold value for TX_PKT_CMP_0 for USB0 endpoint 12" group.long 0x210++0x0F line.long 0x00 "IRQFRAMETHOLDRX00,IRQFRAMETHOLDRX00 Register" hexmask.long.byte 0x00 24.--31. 1. "FRAME_THRES_RX0[3],FRAME threshold value for RX_PKT_CMP_0 for USB0 endpoint 1" hexmask.long.byte 0x00 16.--23. 1. "FRAME_THRES_RX0[2],FRAME threshold value for RX_PKT_CMP_0 for USB0 endpoint 1" hexmask.long.byte 0x00 8.--15. 1. "FRAME_THRES_RX0[1],FRAME threshold value for RX_PKT_CMP_0 for USB0 endpoint 1" line.long 0x04 "IRQFRAMETHOLDRX01,IRQFRAMETHOLDRX01 Register" hexmask.long.byte 0x04 24.--31. 1. "FRAME_THRES_RX0[7],FRAME threshold value for RX_PKT_CMP_0 for USB0 endpoint 7" hexmask.long.byte 0x04 16.--23. 1. "FRAME_THRES_RX0[6],FRAME threshold value for RX_PKT_CMP_0 for USB0 endpoint 6" hexmask.long.byte 0x04 8.--15. 1. "FRAME_THRES_RX0[5],FRAME threshold value for RX_PKT_CMP_0 for USB0 endpoint 5" newline hexmask.long.byte 0x04 0.--7. 1. "FRAME_THRES_RX0[4],FRAME threshold value for RX_PKT_CMP_0 for USB0 endpoint 4" line.long 0x08 "IRQFRAMETHOLDRX02,IRQFRAMETHOLDRX02 Register" hexmask.long.byte 0x08 24.--31. 1. "FRAME_THRES_RX0[11],FRAME threshold value for RX_PKT_CMP_0 for USB0 endpoint 11" hexmask.long.byte 0x08 16.--23. 1. "FRAME_THRES_RX0[10],FRAME threshold value for RX_PKT_CMP_0 for USB0 endpoint 10" hexmask.long.byte 0x08 8.--15. 1. "FRAME_THRES_RX0[9],FRAME threshold value for RX_PKT_CMP_0 for USB0 endpoint 9" newline hexmask.long.byte 0x08 0.--7. 1. "FRAME_THRES_RX0[8],FRAME threshold value for RX_PKT_CMP_0 for USB0 endpoint 8" line.long 0x0C "IRQFRAMETHOLDRX03,IRQFRAMETHOLDRX03 Register" hexmask.long.byte 0x0C 24.--31. 1. "FRAME_THRES_RX0[15],FRAME threshold value for RX_PKT_CMP_0 for USB0 endpoint 15" hexmask.long.byte 0x0C 16.--23. 1. "FRAME_THRES_RX0[14],FRAME threshold value for RX_PKT_CMP_0 for USB0 endpoint 14" hexmask.long.byte 0x0C 8.--15. 1. "FRAME_THRES_RX0[13],FRAME threshold value for RX_PKT_CMP_0 for USB0 endpoint 13" newline hexmask.long.byte 0x0C 0.--7. 1. "FRAME_THRES_RX0[12],FRAME threshold value for RX_PKT_CMP_0 for USB0 endpoint 12" group.long 0x220++0x0F line.long 0x00 "IRQFRAMETHOLDTX10,IRQFRAMETHOLDTX10 Register" hexmask.long.byte 0x00 24.--31. 1. "FRAME_THRES_TX1[3],FRAME threshold value for TX_PKT_CMP_1 for USB0 endpoint 1" hexmask.long.byte 0x00 16.--23. 1. "FRAME_THRES_TX1[2],FRAME threshold value for TX_PKT_CMP_1 for USB0 endpoint 1" hexmask.long.byte 0x00 8.--15. 1. "FRAME_THRES_TX1[1],FRAME threshold value for TX_PKT_CMP_1 for USB0 endpoint 1" line.long 0x04 "IRQFRAMETHOLDTX11,IRQFRAMETHOLDTX11 Register" hexmask.long.byte 0x04 24.--31. 1. "FRAME_THRES_TX1[7],FRAME threshold value for TX_PKT_CMP_1 for USB0 endpoint 7" hexmask.long.byte 0x04 16.--23. 1. "FRAME_THRES_TX1[6],FRAME threshold value for TX_PKT_CMP_1 for USB0 endpoint 6" hexmask.long.byte 0x04 8.--15. 1. "FRAME_THRES_TX1[5],FRAME threshold value for TX_PKT_CMP_1 for USB0 endpoint 5" newline hexmask.long.byte 0x04 0.--7. 1. "FRAME_THRES_TX1[4],FRAME threshold value for TX_PKT_CMP_1 for USB0 endpoint 4" line.long 0x08 "IRQFRAMETHOLDTX12,IRQFRAMETHOLDTX12 Register" hexmask.long.byte 0x08 24.--31. 1. "FRAME_THRES_TX1[11],FRAME threshold value for TX_PKT_CMP_1 for USB0 endpoint 11" hexmask.long.byte 0x08 16.--23. 1. "FRAME_THRES_TX1[10],FRAME threshold value for TX_PKT_CMP_1 for USB0 endpoint 10" hexmask.long.byte 0x08 8.--15. 1. "FRAME_THRES_TX1[9],FRAME threshold value for TX_PKT_CMP_1 for USB0 endpoint 9" newline hexmask.long.byte 0x08 0.--7. 1. "FRAME_THRES_TX1[8],FRAME threshold value for TX_PKT_CMP_1 for USB0 endpoint 8" line.long 0x0C "IRQFRAMETHOLDTX13,IRQFRAMETHOLDTX13 Register" hexmask.long.byte 0x0C 24.--31. 1. "FRAME_THRES_TX1[15],FRAME threshold value for TX_PKT_CMP_1 for USB0 endpoint 15" hexmask.long.byte 0x0C 16.--23. 1. "FRAME_THRES_TX1[14],FRAME threshold value for TX_PKT_CMP_1 for USB0 endpoint 14" hexmask.long.byte 0x0C 8.--15. 1. "FRAME_THRES_TX1[13],FRAME threshold value for TX_PKT_CMP_1 for USB0 endpoint 13" newline hexmask.long.byte 0x0C 0.--7. 1. "FRAME_THRES_TX1[12],FRAME threshold value for TX_PKT_CMP_1 for USB0 endpoint 12" group.long 0x230++0x0F line.long 0x00 "IRQFRAMETHOLDRX10,IRQFRAMETHOLDRX10 Register" hexmask.long.byte 0x00 24.--31. 1. "FRAME_THRES_RX1[3],FRAME threshold value for RX_PKT_CMP_1 for USB0 endpoint 1" hexmask.long.byte 0x00 16.--23. 1. "FRAME_THRES_RX1[2],FRAME threshold value for RX_PKT_CMP_1 for USB0 endpoint 1" hexmask.long.byte 0x00 8.--15. 1. "FRAME_THRES_RX1[1],FRAME threshold value for RX_PKT_CMP_1 for USB0 endpoint 1" line.long 0x04 "IRQFRAMETHOLDRX11,IRQFRAMETHOLDRX11 Register" hexmask.long.byte 0x04 24.--31. 1. "FRAME_THRES_RX1[7],FRAME threshold value for RX_PKT_CMP_1 for USB0 endpoint 7" hexmask.long.byte 0x04 16.--23. 1. "FRAME_THRES_RX1[6],FRAME threshold value for RX_PKT_CMP_1 for USB0 endpoint 6" hexmask.long.byte 0x04 8.--15. 1. "FRAME_THRES_RX1[5],FRAME threshold value for RX_PKT_CMP_1 for USB0 endpoint 5" newline hexmask.long.byte 0x04 0.--7. 1. "FRAME_THRES_RX1[4],FRAME threshold value for RX_PKT_CMP_1 for USB0 endpoint 4" line.long 0x08 "IRQFRAMETHOLDRX12,IRQFRAMETHOLDRX12 Register" hexmask.long.byte 0x08 24.--31. 1. "FRAME_THRES_RX1[11],FRAME threshold value for RX_PKT_CMP_1 for USB0 endpoint 11" hexmask.long.byte 0x08 16.--23. 1. "FRAME_THRES_RX1[10],FRAME threshold value for RX_PKT_CMP_1 for USB0 endpoint 10" hexmask.long.byte 0x08 8.--15. 1. "FRAME_THRES_RX1[9],FRAME threshold value for RX_PKT_CMP_1 for USB0 endpoint 9" newline hexmask.long.byte 0x08 0.--7. 1. "FRAME_THRES_RX1[8],FRAME threshold value for RX_PKT_CMP_1 for USB0 endpoint 8" line.long 0x0C "IRQFRAMETHOLDRX13,IRQFRAMETHOLDRX13 Register" hexmask.long.byte 0x0C 24.--31. 1. "FRAME_THRES_RX1[15],FRAME threshold value for RX_PKT_CMP_1 for USB0 endpoint 15" hexmask.long.byte 0x0C 16.--23. 1. "FRAME_THRES_RX1[14],FRAME threshold value for RX_PKT_CMP_1 for USB0 endpoint 14" hexmask.long.byte 0x0C 8.--15. 1. "FRAME_THRES_RX1[13],FRAME threshold value for RX_PKT_CMP_1 for USB0 endpoint 13" newline hexmask.long.byte 0x0C 0.--7. 1. "FRAME_THRES_RX1[12],FRAME threshold value for RX_PKT_CMP_1 for USB0 endpoint 12" group.long 0x240++0x03 line.long 0x00 "IRQFRAMEENABLE0,IRQFRAMEENABLE0 Register" bitfld.long 0x00 31. "FRAME_EN_RX0_15,FRAME threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 15" "Disabled,Enabled" bitfld.long 0x00 17. "FRAME_EN_RX0_1,FRAME threshold enable value for RX_PKT_CMP_0 for USB0 endpoint 1" "Disabled,Enabled" bitfld.long 0x00 15. "FRAME_EN_TX0_15,FRAME threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 15" "Disabled,Enabled" newline bitfld.long 0x00 1. "FRAME_EN_TX0_1,FRAME threshold enable value for TX_PKT_CMP_0 for USB0 endpoint 1" "Disabled,Enabled" group.long 0x244++0x03 line.long 0x00 "IRQFRAMEENABLE1,IRQFRAMEENABLE1 Register" bitfld.long 0x00 31. "FRAME_EN_RX1_15,FRAME threshold enable value for RX_PKT_CMP_1 for USB0 endpoint 15" "Disabled,Enabled" bitfld.long 0x00 17. "FRAME_EN_RX1_1,FRAME threshold enable value for RX_PKT_CMP_1 for USB0 endpoint 1" "Disabled,Enabled" bitfld.long 0x00 15. "FRAME_EN_TX1_15,FRAME threshold enable value for TX_PKT_CMP_1 for USB0 endpoint 15" "Disabled,Enabled" newline bitfld.long 0x00 1. "FRAME_EN_TX1_1,FRAME threshold enable value for TX_PKT_CMP_1 for USB0 endpoint 1" "Disabled,Enabled" tree.end tree "USB" tree "USB0" base ad:0x47401000 rgroup.long 0x00++0x03 line.long 0x00 "USB0REV,USB0 Revision" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between legacy interface scheme and current" "Legacy,Current,?..." hexmask.long.word 0x00 16.--27. 1. "FUNC,Function indicates a software compatible module family" bitfld.long 0x00 11.--15. "R_RTL,RTL revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "X_MAJOR,Major revision" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "CUSTOM,Custom revision" "0,1,2,3" bitfld.long 0x00 0.--5. "Y_MINOR,Minor revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x14++0x03 line.long 0x00 "USB0CTRL,USB0 Control Register" bitfld.long 0x00 31. "DIS_DEB,Disable the VBUS debouncer circuit fix" "No,Yes" bitfld.long 0x00 30. "DIS_SRP,Disable the OTG session request protocol (Srp) AVALID circuit fix" "No,Yes" bitfld.long 0x00 5. "SOFT_RESET_ISOLATION,Soft reset isolation" "Not isolated,Isolated" newline bitfld.long 0x00 4. "RNDIS,Global RNDIS mode enable for all endpoints" "Disabled,Enabled" bitfld.long 0x00 3. "UINT,USB interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. "CLKFACK,Clock stop fast ack enable" "Disabled,Enabled" newline bitfld.long 0x00 0. "SOFT_RESET,Software reset of USB0" "No action,Reset" rgroup.long 0x18++0x03 line.long 0x00 "USB0STAT,USB0 Status Register" bitfld.long 0x00 0. "DRVVBUS,Current DRVVBUS value USB0 status register" "Low,High" rgroup.long 0x20++0x03 line.long 0x00 "USB0IRQMSTAT,USB0IRQMSTAT Register" bitfld.long 0x00 1. "BANK1,Event pending from IRQ_STATUS_1" "Not pending,Pending" bitfld.long 0x00 0. "BANK0,Event pending from IRQ_STATUS_0" "Not pending,Pending" group.long 0x28++0x0F line.long 0x00 "USB0IRQSTATRAW0,USB0IRQSTATRAW0 Register" bitfld.long 0x00 31. "RX_EP[15],Interrupt status for RX endpoint 15" "No interrupt,Interrupt" bitfld.long 0x00 30. "RX_EP[14],Interrupt status for RX endpoint 14" "No interrupt,Interrupt" bitfld.long 0x00 29. "RX_EP[13],Interrupt status for RX endpoint 13" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "RX_EP[12],Interrupt status for RX endpoint 12" "No interrupt,Interrupt" bitfld.long 0x00 27. "RX_EP[11],Interrupt status for RX endpoint 11" "No interrupt,Interrupt" bitfld.long 0x00 26. "RX_EP[10],Interrupt status for RX endpoint 10" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "RX_EP[9],Interrupt status for RX endpoint 9" "No interrupt,Interrupt" bitfld.long 0x00 24. "RX_EP[8],Interrupt status for RX endpoint 8" "No interrupt,Interrupt" bitfld.long 0x00 23. "RX_EP[7],Interrupt status for RX endpoint 7" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "RX_EP[6],Interrupt status for RX endpoint 6" "No interrupt,Interrupt" bitfld.long 0x00 21. "RX_EP[5],Interrupt status for RX endpoint 5" "No interrupt,Interrupt" bitfld.long 0x00 20. "RX_EP[4],Interrupt status for RX endpoint 4" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "RX_EP[3],Interrupt status for RX endpoint 3" "No interrupt,Interrupt" bitfld.long 0x00 18. "RX_EP[2],Interrupt status for RX endpoint 2" "No interrupt,Interrupt" bitfld.long 0x00 17. "TX_EP[1],Interrupt status for RX endpoint 1" "No interrupt,Interrupt" newline bitfld.long 0x00 15. "TX_EP[15],Interrupt status for TX endpoint 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "TX_EP[14],Interrupt status for TX endpoint 14" "No interrupt,Interrupt" bitfld.long 0x00 13. "TX_EP[13],Interrupt status for TX endpoint 13" "No interrupt,Interrupt" newline bitfld.long 0x00 12. "TX_EP[12],Interrupt status for TX endpoint 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "TX_EP[11],Interrupt status for TX endpoint 11" "No interrupt,Interrupt" bitfld.long 0x00 10. "TX_EP[10],Interrupt status for TX endpoint 10" "No interrupt,Interrupt" newline bitfld.long 0x00 9. "TX_EP[9],Interrupt status for TX endpoint 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "TX_EP[8],Interrupt status for TX endpoint 8" "No interrupt,Interrupt" bitfld.long 0x00 7. "TX_EP[7],Interrupt status for TX endpoint 7" "No interrupt,Interrupt" newline bitfld.long 0x00 6. "TX_EP[6],Interrupt status for TX endpoint 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "TX_EP[5],Interrupt status for TX endpoint 5" "No interrupt,Interrupt" bitfld.long 0x00 4. "TX_EP[4],Interrupt status for TX endpoint 4" "No interrupt,Interrupt" newline bitfld.long 0x00 3. "TX_EP[3],Interrupt status for TX endpoint 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "TX_EP[2],Interrupt status for TX endpoint 2" "No interrupt,Interrupt" bitfld.long 0x00 1. "TX_EP[1],Interrupt status for TX endpoint 1" "No interrupt,Interrupt" newline bitfld.long 0x00 0. "TX_EP[0],Interrupt status for TX endpoint 0" "No interrupt,Interrupt" line.long 0x04 "USB0IRQSTATRAW1,USB0IRQSTATRAW1 Register" bitfld.long 0x04 31. "TX_FIFO[15],Interrupt status for TX FIFO endpoint 15" "No interrupt,Interrupt" bitfld.long 0x04 30. "TX_FIFO[14],Interrupt status for TX FIFO endpoint 14" "No interrupt,Interrupt" bitfld.long 0x04 29. "TX_FIFO[13],Interrupt status for TX FIFO endpoint 13" "No interrupt,Interrupt" newline bitfld.long 0x04 28. "TX_FIFO[12],Interrupt status for TX FIFO endpoint 12" "No interrupt,Interrupt" bitfld.long 0x04 27. "TX_FIFO[11],Interrupt status for TX FIFO endpoint 11" "No interrupt,Interrupt" bitfld.long 0x04 26. "TX_FIFO[10],Interrupt status for TX FIFO endpoint 10" "No interrupt,Interrupt" newline bitfld.long 0x04 25. "TX_FIFO[9],Interrupt status for TX FIFO endpoint 9" "No interrupt,Interrupt" bitfld.long 0x04 24. "TX_FIFO[8],Interrupt status for TX FIFO endpoint 8" "No interrupt,Interrupt" bitfld.long 0x04 23. "TX_FIFO[7],Interrupt status for TX FIFO endpoint 7" "No interrupt,Interrupt" newline bitfld.long 0x04 22. "TX_FIFO[6],Interrupt status for TX FIFO endpoint 6" "No interrupt,Interrupt" bitfld.long 0x04 21. "TX_FIFO[5],Interrupt status for TX FIFO endpoint 5" "No interrupt,Interrupt" bitfld.long 0x04 20. "TX_FIFO[4],Interrupt status for TX FIFO endpoint 4" "No interrupt,Interrupt" newline bitfld.long 0x04 19. "TX_FIFO[3],Interrupt status for TX FIFO endpoint 3" "No interrupt,Interrupt" bitfld.long 0x04 18. "TX_FIFO[2],Interrupt status for TX FIFO endpoint 2" "No interrupt,Interrupt" bitfld.long 0x04 17. "TX_FIFO[1],Interrupt status for TX FIFO endpoint 1" "No interrupt,Interrupt" newline bitfld.long 0x04 16. "TX_FIFO[0],Interrupt status for TX FIFO endpoint 0" "No interrupt,Interrupt" bitfld.long 0x04 9. "USB[9],Interrupt status for mentor controller USB_INT generic interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. "USB[8],Interrupt status for DRVVBUS level change" "No interrupt,Interrupt" newline bitfld.long 0x04 7. "USB[7],Interrupt status for VBUS and VBUS valid threshold" "No interrupt,Interrupt" bitfld.long 0x04 6. "USB[6],Interrupt status for SRP detected" "No interrupt,Interrupt" bitfld.long 0x04 5. "USB[5],Interrupt status for device disconnected (Host mode)" "No interrupt,Interrupt" newline bitfld.long 0x04 4. "USB[4],Interrupt status for device connected (Host mode)" "No interrupt,Interrupt" bitfld.long 0x04 3. "USB[3],Interrupt status for SOF started" "No interrupt,Interrupt" bitfld.long 0x04 2. "USB[2],Interrupt status for mentor controller USB_INT generic interrupt" "No interrupt,Interrupt" newline bitfld.long 0x04 1. "USB[1],Interrupt status for resume signaling detected" "No interrupt,Interrupt" bitfld.long 0x04 0. "USB[0],Interrupt status for suspend signaling detected" "No interrupt,Interrupt" line.long 0x08 "USB0IRQSTAT0_SET/CLR,USB0IRQSTAT0 Register" setclrfld.long 0x08 31. 0x10 31. 0x18 31. "RX_EP[15],Interrupt status for RX endpoint 15" "No interrupt,Interrupt" setclrfld.long 0x08 30. 0x10 30. 0x18 30. "RX_EP[14],Interrupt status for RX endpoint 14" "No interrupt,Interrupt" setclrfld.long 0x08 29. 0x10 29. 0x18 29. "RX_EP[13],Interrupt status for RX endpoint 13" "No interrupt,Interrupt" newline setclrfld.long 0x08 28. 0x10 28. 0x18 28. "RX_EP[12],Interrupt status for RX endpoint 12" "No interrupt,Interrupt" setclrfld.long 0x08 27. 0x10 27. 0x18 27. "RX_EP[11],Interrupt status for RX endpoint 11" "No interrupt,Interrupt" setclrfld.long 0x08 26. 0x10 26. 0x18 26. "RX_EP[10],Interrupt status for RX endpoint 10" "No interrupt,Interrupt" newline setclrfld.long 0x08 25. 0x10 25. 0x18 25. "RX_EP[9],Interrupt status for RX endpoint 9" "No interrupt,Interrupt" setclrfld.long 0x08 24. 0x10 24. 0x18 24. "RX_EP[8],Interrupt status for RX endpoint 8" "No interrupt,Interrupt" setclrfld.long 0x08 23. 0x10 23. 0x18 23. "RX_EP[7],Interrupt status for RX endpoint 7" "No interrupt,Interrupt" newline setclrfld.long 0x08 22. 0x10 22. 0x18 22. "RX_EP[6],Interrupt status for RX endpoint 6" "No interrupt,Interrupt" setclrfld.long 0x08 21. 0x10 21. 0x18 21. "RX_EP[5],Interrupt status for RX endpoint 5" "No interrupt,Interrupt" setclrfld.long 0x08 20. 0x10 20. 0x18 20. "RX_EP[4],Interrupt status for RX endpoint 4" "No interrupt,Interrupt" newline setclrfld.long 0x08 19. 0x10 19. 0x18 19. "RX_EP[3],Interrupt status for RX endpoint 3" "No interrupt,Interrupt" setclrfld.long 0x08 18. 0x10 18. 0x18 18. "RX_EP[2],Interrupt status for RX endpoint 2" "No interrupt,Interrupt" setclrfld.long 0x08 17. 0x10 17. 0x18 17. "RX_EP[1],Interrupt status for RX endpoint 1" "No interrupt,Interrupt" newline setclrfld.long 0x08 15. 0x10 15. 0x18 15. "TX_EP[15],Interrupt status for TX endpoint 15" "No interrupt,Interrupt" setclrfld.long 0x08 14. 0x10 14. 0x18 14. "TX_EP[14],Interrupt status for TX endpoint 14" "No interrupt,Interrupt" setclrfld.long 0x08 13. 0x10 13. 0x18 13. "TX_EP[13],Interrupt status for TX endpoint 13" "No interrupt,Interrupt" newline setclrfld.long 0x08 12. 0x10 12. 0x18 12. "TX_EP[12],Interrupt status for TX endpoint 12" "No interrupt,Interrupt" setclrfld.long 0x08 11. 0x10 11. 0x18 11. "TX_EP[11],Interrupt status for TX endpoint 11" "No interrupt,Interrupt" setclrfld.long 0x08 10. 0x10 10. 0x18 10. "TX_EP[10],Interrupt status for TX endpoint 10" "No interrupt,Interrupt" newline setclrfld.long 0x08 9. 0x10 9. 0x18 9. "TX_EP[9],Interrupt status for TX endpoint 9" "No interrupt,Interrupt" setclrfld.long 0x08 8. 0x10 8. 0x18 8. "TX_EP[8],Interrupt status for TX endpoint 8" "No interrupt,Interrupt" setclrfld.long 0x08 7. 0x10 7. 0x18 7. "TX_EP[7],Interrupt status for TX endpoint 7" "No interrupt,Interrupt" newline setclrfld.long 0x08 6. 0x10 6. 0x18 6. "TX_EP[6],Interrupt status for TX endpoint 6" "No interrupt,Interrupt" setclrfld.long 0x08 5. 0x10 5. 0x18 5. "TX_EP[5],Interrupt status for TX endpoint 5" "No interrupt,Interrupt" setclrfld.long 0x08 4. 0x10 4. 0x18 4. "TX_EP[4],Interrupt status for TX endpoint 4" "No interrupt,Interrupt" newline setclrfld.long 0x08 3. 0x10 3. 0x18 3. "TX_EP[3],Interrupt status for TX endpoint 3" "No interrupt,Interrupt" setclrfld.long 0x08 2. 0x10 2. 0x18 2. "TX_EP[2],Interrupt status for TX endpoint 2" "No interrupt,Interrupt" setclrfld.long 0x08 1. 0x10 1. 0x18 1. "TX_EP[1],Interrupt status for TX endpoint 1" "No interrupt,Interrupt" newline setclrfld.long 0x08 0. 0x10 0. 0x18 0. "TX_EP[0],Interrupt status for TX endpoint 1" "No interrupt,Interrupt" line.long 0x0C "USB0IRQSTAT1_SET/CLR,USB0IRQSTAT0 Register" setclrfld.long 0x0C 31. 0x14 31. 0x1C 31. "TX_FIFO[15],Interrupt status for TX FIFO endpoint 15" "No interrupt,Interrupt" setclrfld.long 0x0C 30. 0x14 30. 0x1C 30. "TX_FIFO[14],Interrupt status for TX FIFO endpoint 14" "No interrupt,Interrupt" setclrfld.long 0x0C 29. 0x14 29. 0x1C 29. "TX_FIFO[13],Interrupt status for TX FIFO endpoint 13" "No interrupt,Interrupt" newline setclrfld.long 0x0C 28. 0x14 28. 0x1C 28. "TX_FIFO[12],Interrupt status for TX FIFO endpoint 12" "No interrupt,Interrupt" setclrfld.long 0x0C 27. 0x14 27. 0x1C 27. "TX_FIFO[11],Interrupt status for TX FIFO endpoint 11" "No interrupt,Interrupt" setclrfld.long 0x0C 26. 0x14 26. 0x1C 26. "TX_FIFO[10],Interrupt status for TX FIFO endpoint 10" "No interrupt,Interrupt" newline setclrfld.long 0x0C 25. 0x14 25. 0x1C 25. "TX_FIFO[9],Interrupt status for TX FIFO endpoint 9" "No interrupt,Interrupt" setclrfld.long 0x0C 24. 0x14 24. 0x1C 24. "TX_FIFO[8],Interrupt status for TX FIFO endpoint 8" "No interrupt,Interrupt" setclrfld.long 0x0C 23. 0x14 23. 0x1C 23. "TX_FIFO[7],Interrupt status for TX FIFO endpoint 7" "No interrupt,Interrupt" newline setclrfld.long 0x0C 22. 0x14 22. 0x1C 22. "TX_FIFO[6],Interrupt status for TX FIFO endpoint 6" "No interrupt,Interrupt" setclrfld.long 0x0C 21. 0x14 21. 0x1C 21. "TX_FIFO[5],Interrupt status for TX FIFO endpoint 5" "No interrupt,Interrupt" setclrfld.long 0x0C 20. 0x14 20. 0x1C 20. "TX_FIFO[4],Interrupt status for TX FIFO endpoint 4" "No interrupt,Interrupt" newline setclrfld.long 0x0C 19. 0x14 19. 0x1C 19. "TX_FIFO[3],Interrupt status for TX FIFO endpoint 3" "No interrupt,Interrupt" setclrfld.long 0x0C 18. 0x14 18. 0x1C 18. "TX_FIFO[2],Interrupt status for TX FIFO endpoint 2" "No interrupt,Interrupt" setclrfld.long 0x0C 17. 0x14 17. 0x1C 17. "TX_FIFO[1],Interrupt status for TX FIFO endpoint 1" "No interrupt,Interrupt" newline setclrfld.long 0x0C 16. 0x14 16. 0x1C 16. "TX_FIFO[0],Interrupt status for TX FIFO endpoint 0" "No interrupt,Interrupt" setclrfld.long 0x0C 9. 0x14 9. 0x1C 9. "USB[9],Interrupt status for mentor controller USB_INT generic interrupt" "No interrupt,Interrupt" setclrfld.long 0x0C 8. 0x14 8. 0x1C 8. "USB[8],Interrupt status for DRVVBUS level change" "No interrupt,Interrupt" newline setclrfld.long 0x0C 7. 0x14 7. 0x1C 7. "USB[7],Interrupt status for VBUS and VBUS valid threshold" "No interrupt,Interrupt" newline setclrfld.long 0x0C 6. 0x14 6. 0x1C 6. "USB[6],Interrupt status for SRP detected" "No interrupt,Interrupt" setclrfld.long 0x0C 5. 0x14 5. 0x1C 5. "USB[5],Interrupt status for device disconnected (Host mode)" "No interrupt,Interrupt" setclrfld.long 0x0C 4. 0x14 4. 0x1C 4. "USB[4],Interrupt status for device connected (Host mode)" "No interrupt,Interrupt" newline setclrfld.long 0x0C 3. 0x14 3. 0x1C 3. "USB[3],Interrupt status for SOF started" "No interrupt,Interrupt" setclrfld.long 0x0C 2. 0x14 2. 0x1C 2. "USB[2],Interrupt status for mentor controller USB_INT generic interrupt" "No interrupt,Interrupt" setclrfld.long 0x0C 1. 0x14 1. 0x1C 1. "USB[1],Interrupt status for resume signaling detected" "No interrupt,Interrupt" newline setclrfld.long 0x0C 0. 0x14 0. 0x1C 0. "USB[0],Interrupt status for suspend signaling detected" "No interrupt,Interrupt" group.long 0x70++0x03 line.long 0x00 "USB0TXMODE,USB0TXMODE Register" bitfld.long 0x00 28.--29. "TX15_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 26.--27. "TX14_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 24.--25. "TX13_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" newline bitfld.long 0x00 22.--23. "TX12_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 20.--21. "TX11_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 18.--19. "TX10_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" newline bitfld.long 0x00 16.--17. "TX9_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 14.--15. "TX8_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 12.--13. "TX7_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" newline bitfld.long 0x00 10.--11. "TX6_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 8.--9. "TX5_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 6.--7. "TX4_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" newline bitfld.long 0x00 4.--5. "TX3_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 2.--3. "TX2_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 0.--1. "TX1_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" group.long 0x74++0x03 line.long 0x00 "USB0RXMODE,USB0RXMODE Register" bitfld.long 0x00 28.--29. "RX15_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 26.--27. "RX14_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 24.--25. "RX13_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" newline bitfld.long 0x00 22.--23. "RX12_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 20.--21. "RX11_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 18.--19. "RX10_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" newline bitfld.long 0x00 16.--17. "RX9_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 14.--15. "RX8_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 12.--13. "RX7_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" newline bitfld.long 0x00 10.--11. "RX6_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 8.--9. "RX5_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 6.--7. "RX4_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" newline bitfld.long 0x00 4.--5. "RX3_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 2.--3. "RX2_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 0.--1. "RX1_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" group.long 0x80++0x03 line.long 0x00 "USB0GENRNDISEP1,USB0GENRNDISEP1 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP1_SIZE,Generic RNDIS packet size" group.long 0x84++0x03 line.long 0x00 "USB0GENRNDISEP2,USB0GENRNDISEP2 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP2_SIZE,Generic RNDIS packet size" group.long 0x88++0x03 line.long 0x00 "USB0GENRNDISEP3,USB0GENRNDISEP3 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP3_SIZE,Generic RNDIS packet size" group.long 0x8C++0x03 line.long 0x00 "USB0GENRNDISEP4,USB0GENRNDISEP4 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP4_SIZE,Generic RNDIS packet size" group.long 0x90++0x03 line.long 0x00 "USB0GENRNDISEP5,USB0GENRNDISEP5 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP5_SIZE,Generic RNDIS packet size" group.long 0x94++0x03 line.long 0x00 "USB0GENRNDISEP6,USB0GENRNDISEP6 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP6_SIZE,Generic RNDIS packet size" group.long 0x98++0x03 line.long 0x00 "USB0GENRNDISEP7,USB0GENRNDISEP7 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP7_SIZE,Generic RNDIS packet size" group.long 0x9C++0x03 line.long 0x00 "USB0GENRNDISEP8,USB0GENRNDISEP8 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP8_SIZE,Generic RNDIS packet size" group.long 0xA0++0x03 line.long 0x00 "USB0GENRNDISEP9,USB0GENRNDISEP9 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP9_SIZE,Generic RNDIS packet size" group.long 0xA4++0x03 line.long 0x00 "USB0GENRNDISEP10,USB0GENRNDISEP10 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP10_SIZE,Generic RNDIS packet size" group.long 0xA8++0x03 line.long 0x00 "USB0GENRNDISEP11,USB0GENRNDISEP11 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP11_SIZE,Generic RNDIS packet size" group.long 0xAC++0x03 line.long 0x00 "USB0GENRNDISEP12,USB0GENRNDISEP12 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP12_SIZE,Generic RNDIS packet size" group.long 0xB0++0x03 line.long 0x00 "USB0GENRNDISEP13,USB0GENRNDISEP13 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP13_SIZE,Generic RNDIS packet size" group.long 0xB4++0x03 line.long 0x00 "USB0GENRNDISEP14,USB0GENRNDISEP14 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP14_SIZE,Generic RNDIS packet size" group.long 0xD0++0x0B line.long 0x00 "USB0AUTOREQ,USB0AUTOREQ Register" bitfld.long 0x00 28.--29. "RX15_AUTOREQ,RX endpoint 15 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 26.--27. "RX14_AUTOREQ,RX endpoint 14 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 24.--25. "RX13_AUTOREQ,RX endpoint 13 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" newline bitfld.long 0x00 22.--23. "RX12_AUTOREQ,RX endpoint 12 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 20.--21. "RX11_AUTOREQ,RX endpoint 11 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 18.--19. "RX10_AUTOREQ,RX endpoint 10 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" newline bitfld.long 0x00 16.--17. "RX9_AUTOREQ,RX endpoint 9 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 14.--15. "RX8_AUTOREQ,RX endpoint 8 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 12.--13. "RX7_AUTOREQ,RX endpoint 7 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" newline bitfld.long 0x00 10.--11. "RX6_AUTOREQ,RX endpoint 6 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 8.--9. "RX5_AUTOREQ,RX endpoint 5 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 6.--7. "RX4_AUTOREQ,RX endpoint 4 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" newline bitfld.long 0x00 4.--5. "RX3_AUTOREQ,RX endpoint 3 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 2.--3. "RX2_AUTOREQ,RX endpoint 2 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 0.--1. "RX1_AUTOREQ,RX endpoint 1 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" line.long 0x04 "USB0SRPFIXTIME,SRP Fix Maximum Time Register" line.long 0x08 "USB0_TDOWN,Endpoint Teardown Register" bitfld.long 0x08 31. "TX_TDOWN[15],Tx endpoint 15 teardown" "0,1" bitfld.long 0x08 30. "TX_TDOWN[14],Tx endpoint 14 teardown" "0,1" bitfld.long 0x08 29. "TX_TDOWN[13],Tx endpoint 13 teardown" "0,1" newline bitfld.long 0x08 28. "TX_TDOWN[12],Tx endpoint 12 teardown" "0,1" bitfld.long 0x08 27. "TX_TDOWN[11],Tx endpoint 11 teardown" "0,1" bitfld.long 0x08 26. "TX_TDOWN[10],Tx endpoint 10 teardown" "0,1" newline bitfld.long 0x08 25. "TX_TDOWN[9],Tx endpoint 9 teardown" "0,1" bitfld.long 0x08 24. "TX_TDOWN[8],Tx endpoint 8 teardown" "0,1" bitfld.long 0x08 23. "TX_TDOWN[7],Tx endpoint 7 teardown" "0,1" newline bitfld.long 0x08 22. "TX_TDOWN[6],Tx endpoint 6 teardown" "0,1" bitfld.long 0x08 21. "TX_TDOWN[5],Tx endpoint 5 teardown" "0,1" bitfld.long 0x08 20. "TX_TDOWN[4],Tx endpoint 4 teardown" "0,1" newline bitfld.long 0x08 19. "TX_TDOWN[3],Tx endpoint 3 teardown" "0,1" bitfld.long 0x08 18. "TX_TDOWN[2],Tx endpoint 2 teardown" "0,1" bitfld.long 0x08 17. "TX_TDOWN[1],Tx endpoint 1 teardown" "0,1" newline bitfld.long 0x08 15. "RX_TDOWN[15],Rx endpoint 15 teardown" "0,1" bitfld.long 0x08 14. "RX_TDOWN[14],Rx endpoint 14 teardown" "0,1" bitfld.long 0x08 13. "RX_TDOWN[13],Rx endpoint 13 teardown" "0,1" newline bitfld.long 0x08 12. "RX_TDOWN[12],Rx endpoint 12 teardown" "0,1" bitfld.long 0x08 11. "RX_TDOWN[11],Rx endpoint 11 teardown" "0,1" bitfld.long 0x08 10. "RX_TDOWN[10],Rx endpoint 10 teardown" "0,1" newline bitfld.long 0x08 9. "RX_TDOWN[9],Rx endpoint 9 teardown" "0,1" bitfld.long 0x08 8. "RX_TDOWN[8],Rx endpoint 8 teardown" "0,1" bitfld.long 0x08 7. "RX_TDOWN[7],Rx endpoint 7 teardown" "0,1" newline bitfld.long 0x08 6. "RX_TDOWN[6],Rx endpoint 6 teardown" "0,1" bitfld.long 0x08 5. "RX_TDOWN[5],Rx endpoint 5 teardown" "0,1" bitfld.long 0x08 4. "RX_TDOWN[4],Rx endpoint 4 teardown" "0,1" newline bitfld.long 0x08 3. "RX_TDOWN[3],Rx endpoint 3 teardown" "0,1" bitfld.long 0x08 2. "RX_TDOWN[2],Rx endpoint 2 teardown" "0,1" bitfld.long 0x08 1. "RX_TDOWN[1],Rx endpoint 1 teardown" "0,1" group.long 0xE0++0x0B line.long 0x00 "USB0UTMI,USB UTMI Register" bitfld.long 0x00 23. "TXBITSTUFFEN,PHY UTMI input for signal TXBITSTUFFEN" "0,1" bitfld.long 0x00 22. "TXBITSTUFFENH,PHY UTMI input for signal TXBITSTUFFENH" "0,1" bitfld.long 0x00 21. "OTGDISABLE,PHY UTMI input for signal OTGDISABLE" "0,1" newline bitfld.long 0x00 20. "VBUSVLDEXTSEL,PHY UTMI input for signal VBUSVLDEXTSEL" "0,1" bitfld.long 0x00 19. "VBUSVLDEXT,PHY UTMI input for signal VBUSVLDEXT" "0,1" bitfld.long 0x00 18. "TXENABLEN,PHY UTMI input for signal TXENABLEN" "0,1" newline bitfld.long 0x00 17. "FSXCVROWNER,PHY UTMI input for signal FSXCVROWNER" "0,1" bitfld.long 0x00 16. "TXVALIDH,PHY UTMI input for signal TXVALIDH" "0,1" hexmask.long.byte 0x00 8.--15. 1. "DATAINH,PHY UTMI input for signal DATAINH" newline bitfld.long 0x00 2. "WORDINTERFACE,PHY UTMI input for signal WORDINTERFACE" "0,1" bitfld.long 0x00 1. "FSDATAEXT,PHY UTMI input for signal FSDATAEXT" "0,1" bitfld.long 0x00 0. "FSSE0EXT,PHY UTMI input for signal FSSE0EXT" "0,1" line.long 0x04 "USB0MGCUTMILB,USB0MGCUTMILB Register" rbitfld.long 0x04 28. "SUSPENDM,Loopback test observed value for SUSPENDM" "0,1" rbitfld.long 0x04 26.--27. "OPMODE,Loopback test observed value for OPMODE" "0,1,2,3" rbitfld.long 0x04 25. "TXVALID,Loopback test observed value for TXVALID" "0,1" newline rbitfld.long 0x04 23.--24. "XCVRSEL,Loopback test observed value for XCVRSEL" "0,1,3,4" rbitfld.long 0x04 22. "TERMSEL,Loopback test observed value for TERMSEL" "0,1" rbitfld.long 0x04 21. "DRVVBUS,Loopback test observed value for DRVVBUS" "0,1" newline rbitfld.long 0x04 20. "CHRGVBUS,Loopback test observed value for CHRGVBUS" "0,1" rbitfld.long 0x04 19. "DISCHRGVBUS,Loopback test observed value for DISCHRGVBUS" "0,1" rbitfld.long 0x04 18. "DPPULLDOWN,Loopback test observed value for DPPULLDOWN" "0,1" newline rbitfld.long 0x04 17. "DMPULLDOWN,Loopback test observed value for DMPULLDOWN" "0,1" rbitfld.long 0x04 16. "IDPULLUP,Loopback test observed value for IDPULLUP" "0,1" bitfld.long 0x04 11. "IDDIG,Loopback test value for IDDIG" "0,1" newline bitfld.long 0x04 10. "HOSTDISCON,Loopback test value for HOSTDISCON" "0,1" bitfld.long 0x04 9. "SESSEND,Loopback test value for SESSEND" "0,1" bitfld.long 0x04 8. "AVALID,Loopback test value for AVALID" "0,1" newline bitfld.long 0x04 7. "VBUSVALID,Loopback test value for VBUSVALID" "0,1" bitfld.long 0x04 6. "RXERROR,Loopback test value for RXERROR" "0,1" bitfld.long 0x04 2.--3. "LINESTATE,Loopback test value for LINESTATE" "0,1,2,3" line.long 0x08 "USB0MODE,USB0MODE Register" bitfld.long 0x08 8. "IDDIG,MGC input value for IDDIG" "A type,B type" bitfld.long 0x08 7. "IDDIG_MUX,Multiplexer control for IDDIG signal going to the controller" "PHY0,IDDIG[8]" bitfld.long 0x08 1. "PHY_TEST,PHY test" "Normal,PHY test" newline bitfld.long 0x08 0. "LOOPBACK,Loopback test mode" "Normal,Loopback test" tree.end tree "USB1" base ad:0x47401800 rgroup.long 0x00++0x03 line.long 0x00 "USB1REV,USB1 Revision" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between legacy interface scheme and current" "Legacy,Current,?..." hexmask.long.word 0x00 16.--27. 1. "FUNC,Function indicates a software compatible module family" bitfld.long 0x00 11.--15. "R_RTL,RTL revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "X_MAJOR,Major revision" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "CUSTOM,Custom revision" "0,1,2,3" bitfld.long 0x00 0.--5. "Y_MINOR,Minor revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x14++0x03 line.long 0x00 "USB1CTRL,USB1 Control Register" bitfld.long 0x00 31. "DIS_DEB,Disable the VBUS debouncer circuit fix" "No,Yes" bitfld.long 0x00 30. "DIS_SRP,Disable the OTG session request protocol (Srp) AVALID circuit fix" "No,Yes" bitfld.long 0x00 5. "SOFT_RESET_ISOLATION,Soft reset isolation" "Not isolated,Isolated" newline bitfld.long 0x00 4. "RNDIS,Global RNDIS mode enable for all endpoints" "Disabled,Enabled" bitfld.long 0x00 3. "UINT,USB interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. "CLKFACK,Clock stop fast ack enable" "Disabled,Enabled" newline bitfld.long 0x00 0. "SOFT_RESET,Software reset of USB0" "No action,Reset" rgroup.long 0x18++0x03 line.long 0x00 "USB1STAT,USB1 Status Register" bitfld.long 0x00 0. "DRVVBUS,Current DRVVBUS value USB0 status register" "Low,High" rgroup.long 0x20++0x03 line.long 0x00 "USB1IRQMSTAT,USB1IRQMSTAT Register" bitfld.long 0x00 1. "BANK1,Event pending from IRQ_STATUS_1" "Not pending,Pending" bitfld.long 0x00 0. "BANK0,Event pending from IRQ_STATUS_0" "Not pending,Pending" group.long 0x28++0x0F line.long 0x00 "USB1IRQSTATRAW0,USB0IRQSTATRAW0 Register" bitfld.long 0x00 31. "RX_EP[15],Interrupt status for RX endpoint 15" "No interrupt,Interrupt" bitfld.long 0x00 30. "RX_EP[14],Interrupt status for RX endpoint 14" "No interrupt,Interrupt" bitfld.long 0x00 29. "RX_EP[13],Interrupt status for RX endpoint 13" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "RX_EP[12],Interrupt status for RX endpoint 12" "No interrupt,Interrupt" bitfld.long 0x00 27. "RX_EP[11],Interrupt status for RX endpoint 11" "No interrupt,Interrupt" bitfld.long 0x00 26. "RX_EP[10],Interrupt status for RX endpoint 10" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "RX_EP[9],Interrupt status for RX endpoint 9" "No interrupt,Interrupt" bitfld.long 0x00 24. "RX_EP[8],Interrupt status for RX endpoint 8" "No interrupt,Interrupt" bitfld.long 0x00 23. "RX_EP[7],Interrupt status for RX endpoint 7" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "RX_EP[6],Interrupt status for RX endpoint 6" "No interrupt,Interrupt" bitfld.long 0x00 21. "RX_EP[5],Interrupt status for RX endpoint 5" "No interrupt,Interrupt" bitfld.long 0x00 20. "RX_EP[4],Interrupt status for RX endpoint 4" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "RX_EP[3],Interrupt status for RX endpoint 3" "No interrupt,Interrupt" bitfld.long 0x00 18. "RX_EP[2],Interrupt status for RX endpoint 2" "No interrupt,Interrupt" bitfld.long 0x00 17. "TX_EP[1],Interrupt status for RX endpoint 1" "No interrupt,Interrupt" newline bitfld.long 0x00 15. "TX_EP[15],Interrupt status for TX endpoint 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "TX_EP[14],Interrupt status for TX endpoint 14" "No interrupt,Interrupt" bitfld.long 0x00 13. "TX_EP[13],Interrupt status for TX endpoint 13" "No interrupt,Interrupt" newline bitfld.long 0x00 12. "TX_EP[12],Interrupt status for TX endpoint 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "TX_EP[11],Interrupt status for TX endpoint 11" "No interrupt,Interrupt" bitfld.long 0x00 10. "TX_EP[10],Interrupt status for TX endpoint 10" "No interrupt,Interrupt" newline bitfld.long 0x00 9. "TX_EP[9],Interrupt status for TX endpoint 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "TX_EP[8],Interrupt status for TX endpoint 8" "No interrupt,Interrupt" bitfld.long 0x00 7. "TX_EP[7],Interrupt status for TX endpoint 7" "No interrupt,Interrupt" newline bitfld.long 0x00 6. "TX_EP[6],Interrupt status for TX endpoint 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "TX_EP[5],Interrupt status for TX endpoint 5" "No interrupt,Interrupt" bitfld.long 0x00 4. "TX_EP[4],Interrupt status for TX endpoint 4" "No interrupt,Interrupt" newline bitfld.long 0x00 3. "TX_EP[3],Interrupt status for TX endpoint 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "TX_EP[2],Interrupt status for TX endpoint 2" "No interrupt,Interrupt" bitfld.long 0x00 1. "TX_EP[1],Interrupt status for TX endpoint 1" "No interrupt,Interrupt" newline bitfld.long 0x00 0. "TX_EP[0],Interrupt status for TX endpoint 0" "No interrupt,Interrupt" line.long 0x04 "USB1IRQSTATRAW1,USB1IRQSTATRAW1 Register" bitfld.long 0x04 31. "TX_FIFO[15],Interrupt status for TX FIFO endpoint 15" "No interrupt,Interrupt" bitfld.long 0x04 30. "TX_FIFO[14],Interrupt status for TX FIFO endpoint 14" "No interrupt,Interrupt" bitfld.long 0x04 29. "TX_FIFO[13],Interrupt status for TX FIFO endpoint 13" "No interrupt,Interrupt" newline bitfld.long 0x04 28. "TX_FIFO[12],Interrupt status for TX FIFO endpoint 12" "No interrupt,Interrupt" bitfld.long 0x04 27. "TX_FIFO[11],Interrupt status for TX FIFO endpoint 11" "No interrupt,Interrupt" bitfld.long 0x04 26. "TX_FIFO[10],Interrupt status for TX FIFO endpoint 10" "No interrupt,Interrupt" newline bitfld.long 0x04 25. "TX_FIFO[9],Interrupt status for TX FIFO endpoint 9" "No interrupt,Interrupt" bitfld.long 0x04 24. "TX_FIFO[8],Interrupt status for TX FIFO endpoint 8" "No interrupt,Interrupt" bitfld.long 0x04 23. "TX_FIFO[7],Interrupt status for TX FIFO endpoint 7" "No interrupt,Interrupt" newline bitfld.long 0x04 22. "TX_FIFO[6],Interrupt status for TX FIFO endpoint 6" "No interrupt,Interrupt" bitfld.long 0x04 21. "TX_FIFO[5],Interrupt status for TX FIFO endpoint 5" "No interrupt,Interrupt" bitfld.long 0x04 20. "TX_FIFO[4],Interrupt status for TX FIFO endpoint 4" "No interrupt,Interrupt" newline bitfld.long 0x04 19. "TX_FIFO[3],Interrupt status for TX FIFO endpoint 3" "No interrupt,Interrupt" bitfld.long 0x04 18. "TX_FIFO[2],Interrupt status for TX FIFO endpoint 2" "No interrupt,Interrupt" bitfld.long 0x04 17. "TX_FIFO[1],Interrupt status for TX FIFO endpoint 1" "No interrupt,Interrupt" newline bitfld.long 0x04 9. "USB[9],Interrupt status for mentor controller USB_INT generic interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. "USB[8],Interrupt status for DRVVBUS level change" "No interrupt,Interrupt" newline bitfld.long 0x04 7. "USB[7],Interrupt status for VBUS and VBUS valid threshold" "No interrupt,Interrupt" bitfld.long 0x04 6. "USB[6],Interrupt status for SRP detected" "No interrupt,Interrupt" bitfld.long 0x04 5. "USB[5],Interrupt status for device disconnected (Host mode)" "No interrupt,Interrupt" newline bitfld.long 0x04 4. "USB[4],Interrupt status for device connected (Host mode)" "No interrupt,Interrupt" bitfld.long 0x04 3. "USB[3],Interrupt status for SOF started" "No interrupt,Interrupt" bitfld.long 0x04 2. "USB[2],Interrupt status for mentor controller USB_INT generic interrupt" "No interrupt,Interrupt" newline bitfld.long 0x04 1. "USB[1],Interrupt status for resume signaling detected" "No interrupt,Interrupt" bitfld.long 0x04 0. "USB[0],Interrupt status for suspend signaling detected" "No interrupt,Interrupt" line.long 0x08 "USB1IRQSTAT0_SET/CLR,USB1IRQSTAT0 Register" setclrfld.long 0x08 31. 0x10 31. 0x18 31. "RX_EP[15],Interrupt status for RX endpoint 15" "No interrupt,Interrupt" setclrfld.long 0x08 30. 0x10 30. 0x18 30. "RX_EP[14],Interrupt status for RX endpoint 14" "No interrupt,Interrupt" setclrfld.long 0x08 29. 0x10 29. 0x18 29. "RX_EP[13],Interrupt status for RX endpoint 13" "No interrupt,Interrupt" newline setclrfld.long 0x08 28. 0x10 28. 0x18 28. "RX_EP[12],Interrupt status for RX endpoint 12" "No interrupt,Interrupt" setclrfld.long 0x08 27. 0x10 27. 0x18 27. "RX_EP[11],Interrupt status for RX endpoint 11" "No interrupt,Interrupt" setclrfld.long 0x08 26. 0x10 26. 0x18 26. "RX_EP[10],Interrupt status for RX endpoint 10" "No interrupt,Interrupt" newline setclrfld.long 0x08 25. 0x10 25. 0x18 25. "RX_EP[9],Interrupt status for RX endpoint 9" "No interrupt,Interrupt" setclrfld.long 0x08 24. 0x10 24. 0x18 24. "RX_EP[8],Interrupt status for RX endpoint 8" "No interrupt,Interrupt" setclrfld.long 0x08 23. 0x10 23. 0x18 23. "RX_EP[7],Interrupt status for RX endpoint 7" "No interrupt,Interrupt" newline setclrfld.long 0x08 22. 0x10 22. 0x18 22. "RX_EP[6],Interrupt status for RX endpoint 6" "No interrupt,Interrupt" setclrfld.long 0x08 21. 0x10 21. 0x18 21. "RX_EP[5],Interrupt status for RX endpoint 5" "No interrupt,Interrupt" setclrfld.long 0x08 20. 0x10 20. 0x18 20. "RX_EP[4],Interrupt status for RX endpoint 4" "No interrupt,Interrupt" newline setclrfld.long 0x08 19. 0x10 19. 0x18 19. "RX_EP[3],Interrupt status for RX endpoint 3" "No interrupt,Interrupt" setclrfld.long 0x08 18. 0x10 18. 0x18 18. "RX_EP[2],Interrupt status for RX endpoint 2" "No interrupt,Interrupt" setclrfld.long 0x08 17. 0x10 17. 0x18 17. "RX_EP[1],Interrupt status for RX endpoint 1" "No interrupt,Interrupt" newline setclrfld.long 0x08 15. 0x10 15. 0x18 15. "TX_EP[15],Interrupt status for TX endpoint 15" "No interrupt,Interrupt" setclrfld.long 0x08 14. 0x10 14. 0x18 14. "TX_EP[14],Interrupt status for TX endpoint 14" "No interrupt,Interrupt" setclrfld.long 0x08 13. 0x10 13. 0x18 13. "TX_EP[13],Interrupt status for TX endpoint 13" "No interrupt,Interrupt" newline setclrfld.long 0x08 12. 0x10 12. 0x18 12. "TX_EP[12],Interrupt status for TX endpoint 12" "No interrupt,Interrupt" setclrfld.long 0x08 11. 0x10 11. 0x18 11. "TX_EP[11],Interrupt status for TX endpoint 11" "No interrupt,Interrupt" setclrfld.long 0x08 10. 0x10 10. 0x18 10. "TX_EP[10],Interrupt status for TX endpoint 10" "No interrupt,Interrupt" newline setclrfld.long 0x08 9. 0x10 9. 0x18 9. "TX_EP[9],Interrupt status for TX endpoint 9" "No interrupt,Interrupt" setclrfld.long 0x08 8. 0x10 8. 0x18 8. "TX_EP[8],Interrupt status for TX endpoint 8" "No interrupt,Interrupt" setclrfld.long 0x08 7. 0x10 7. 0x18 7. "TX_EP[7],Interrupt status for TX endpoint 7" "No interrupt,Interrupt" newline setclrfld.long 0x08 6. 0x10 6. 0x18 6. "TX_EP[6],Interrupt status for TX endpoint 6" "No interrupt,Interrupt" setclrfld.long 0x08 5. 0x10 5. 0x18 5. "TX_EP[5],Interrupt status for TX endpoint 5" "No interrupt,Interrupt" setclrfld.long 0x08 4. 0x10 4. 0x18 4. "TX_EP[4],Interrupt status for TX endpoint 4" "No interrupt,Interrupt" newline setclrfld.long 0x08 3. 0x10 3. 0x18 3. "TX_EP[3],Interrupt status for TX endpoint 3" "No interrupt,Interrupt" setclrfld.long 0x08 2. 0x10 2. 0x18 2. "TX_EP[2],Interrupt status for TX endpoint 2" "No interrupt,Interrupt" setclrfld.long 0x08 1. 0x10 1. 0x18 1. "TX_EP[1],Interrupt status for TX endpoint 1" "No interrupt,Interrupt" newline setclrfld.long 0x08 0. 0x10 0. 0x18 0. "TX_EP[0],Interrupt status for TX endpoint 1" "No interrupt,Interrupt" line.long 0x0C "USB1IRQSTAT1_SET/CLR,USB1IRQSTAT0 Register" setclrfld.long 0x0C 31. 0x14 31. 0x1C 31. "TX_FIFO[15],Interrupt status for TX FIFO endpoint 15" "No interrupt,Interrupt" setclrfld.long 0x0C 30. 0x14 30. 0x1C 30. "TX_FIFO[14],Interrupt status for TX FIFO endpoint 14" "No interrupt,Interrupt" setclrfld.long 0x0C 29. 0x14 29. 0x1C 29. "TX_FIFO[13],Interrupt status for TX FIFO endpoint 13" "No interrupt,Interrupt" newline setclrfld.long 0x0C 28. 0x14 28. 0x1C 28. "TX_FIFO[12],Interrupt status for TX FIFO endpoint 12" "No interrupt,Interrupt" setclrfld.long 0x0C 27. 0x14 27. 0x1C 27. "TX_FIFO[11],Interrupt status for TX FIFO endpoint 11" "No interrupt,Interrupt" setclrfld.long 0x0C 26. 0x14 26. 0x1C 26. "TX_FIFO[10],Interrupt status for TX FIFO endpoint 10" "No interrupt,Interrupt" newline setclrfld.long 0x0C 25. 0x14 25. 0x1C 25. "TX_FIFO[9],Interrupt status for TX FIFO endpoint 9" "No interrupt,Interrupt" setclrfld.long 0x0C 24. 0x14 24. 0x1C 24. "TX_FIFO[8],Interrupt status for TX FIFO endpoint 8" "No interrupt,Interrupt" setclrfld.long 0x0C 23. 0x14 23. 0x1C 23. "TX_FIFO[7],Interrupt status for TX FIFO endpoint 7" "No interrupt,Interrupt" newline setclrfld.long 0x0C 22. 0x14 22. 0x1C 22. "TX_FIFO[6],Interrupt status for TX FIFO endpoint 6" "No interrupt,Interrupt" setclrfld.long 0x0C 21. 0x14 21. 0x1C 21. "TX_FIFO[5],Interrupt status for TX FIFO endpoint 5" "No interrupt,Interrupt" setclrfld.long 0x0C 20. 0x14 20. 0x1C 20. "TX_FIFO[4],Interrupt status for TX FIFO endpoint 4" "No interrupt,Interrupt" newline setclrfld.long 0x0C 19. 0x14 19. 0x1C 19. "TX_FIFO[3],Interrupt status for TX FIFO endpoint 3" "No interrupt,Interrupt" setclrfld.long 0x0C 18. 0x14 18. 0x1C 18. "TX_FIFO[2],Interrupt status for TX FIFO endpoint 2" "No interrupt,Interrupt" setclrfld.long 0x0C 17. 0x14 17. 0x1C 17. "TX_FIFO[1],Interrupt status for TX FIFO endpoint 1" "No interrupt,Interrupt" newline setclrfld.long 0x0C 9. 0x14 9. 0x1C 9. "USB[9],Interrupt status for mentor controller USB_INT generic interrupt" "No interrupt,Interrupt" setclrfld.long 0x0C 8. 0x14 8. 0x1C 8. "USB[8],Interrupt status for DRVVBUS level change" "No interrupt,Interrupt" setclrfld.long 0x0C 7. 0x14 7. 0x1C 7. "USB[7],Interrupt status for VBUS and VBUS valid threshold" "No interrupt,Interrupt" newline setclrfld.long 0x0C 6. 0x14 6. 0x1C 6. "USB[6],Interrupt status for SRP detected" "No interrupt,Interrupt" setclrfld.long 0x0C 5. 0x14 5. 0x1C 5. "USB[5],Interrupt status for device disconnected (Host mode)" "No interrupt,Interrupt" setclrfld.long 0x0C 4. 0x14 4. 0x1C 4. "USB[4],Interrupt status for device connected (Host mode)" "No interrupt,Interrupt" newline setclrfld.long 0x0C 3. 0x14 3. 0x1C 3. "USB[3],Interrupt status for SOF started" "No interrupt,Interrupt" setclrfld.long 0x0C 2. 0x14 2. 0x1C 2. "USB[2],Interrupt status for mentor controller USB_INT generic interrupt" "No interrupt,Interrupt" setclrfld.long 0x0C 1. 0x14 1. 0x1C 1. "USB[1],Interrupt status for resume signaling detected" "No interrupt,Interrupt" newline setclrfld.long 0x0C 0. 0x14 0. 0x1C 0. "USB[0],Interrupt status for suspend signaling detected" "No interrupt,Interrupt" group.long 0x70++0x03 line.long 0x00 "USB1TXMODE,USB1TXMODE Register" bitfld.long 0x00 28.--29. "TX15_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 26.--27. "TX14_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 24.--25. "TX13_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" newline bitfld.long 0x00 22.--23. "TX12_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 20.--21. "TX11_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 18.--19. "TX10_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" newline bitfld.long 0x00 16.--17. "TX9_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 14.--15. "TX8_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 12.--13. "TX7_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" newline bitfld.long 0x00 10.--11. "TX6_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 8.--9. "TX5_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 6.--7. "TX4_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" newline bitfld.long 0x00 4.--5. "TX3_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 2.--3. "TX2_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 0.--1. "TX1_MODE,TX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" group.long 0x74++0x03 line.long 0x00 "USB1RXMODE,USB1RXMODE Register" bitfld.long 0x00 28.--29. "RX15_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 26.--27. "RX14_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 24.--25. "RX13_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" newline bitfld.long 0x00 22.--23. "RX12_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 20.--21. "RX11_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 18.--19. "RX10_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" newline bitfld.long 0x00 16.--17. "RX9_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 14.--15. "RX8_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 12.--13. "RX7_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" newline bitfld.long 0x00 10.--11. "RX6_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 8.--9. "RX5_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 6.--7. "RX4_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" newline bitfld.long 0x00 4.--5. "RX3_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 2.--3. "RX2_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" bitfld.long 0x00 0.--1. "RX1_MODE,RX15 mode select" "Transparent,RNDIS,CDC,Generic RNDIS" group.long 0x80++0x03 line.long 0x00 "USB1GENRNDISEP1,USB1GENRNDISEP1 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP1_SIZE,Generic RNDIS packet size" group.long 0x84++0x03 line.long 0x00 "USB1GENRNDISEP2,USB1GENRNDISEP2 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP2_SIZE,Generic RNDIS packet size" group.long 0x88++0x03 line.long 0x00 "USB1GENRNDISEP3,USB1GENRNDISEP3 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP3_SIZE,Generic RNDIS packet size" group.long 0x8C++0x03 line.long 0x00 "USB1GENRNDISEP4,USB1GENRNDISEP4 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP4_SIZE,Generic RNDIS packet size" group.long 0x90++0x03 line.long 0x00 "USB1GENRNDISEP5,USB1GENRNDISEP5 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP5_SIZE,Generic RNDIS packet size" group.long 0x94++0x03 line.long 0x00 "USB1GENRNDISEP6,USB1GENRNDISEP6 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP6_SIZE,Generic RNDIS packet size" group.long 0x98++0x03 line.long 0x00 "USB1GENRNDISEP7,USB1GENRNDISEP7 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP7_SIZE,Generic RNDIS packet size" group.long 0x9C++0x03 line.long 0x00 "USB1GENRNDISEP8,USB1GENRNDISEP8 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP8_SIZE,Generic RNDIS packet size" group.long 0xA0++0x03 line.long 0x00 "USB1GENRNDISEP9,USB1GENRNDISEP9 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP9_SIZE,Generic RNDIS packet size" group.long 0xA4++0x03 line.long 0x00 "USB1GENRNDISEP10,USB1GENRNDISEP10 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP10_SIZE,Generic RNDIS packet size" group.long 0xA8++0x03 line.long 0x00 "USB1GENRNDISEP11,USB1GENRNDISEP11 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP11_SIZE,Generic RNDIS packet size" group.long 0xAC++0x03 line.long 0x00 "USB1GENRNDISEP12,USB1GENRNDISEP12 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP12_SIZE,Generic RNDIS packet size" group.long 0xB0++0x03 line.long 0x00 "USB1GENRNDISEP13,USB1GENRNDISEP13 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP13_SIZE,Generic RNDIS packet size" group.long 0xB4++0x03 line.long 0x00 "USB1GENRNDISEP14,USB1GENRNDISEP14 Register" hexmask.long.tbyte 0x00 0.--16. 1. "EP14_SIZE,Generic RNDIS packet size" group.long 0xD0++0x0B line.long 0x00 "USB1AUTOREQ,USB1AUTOREQ Register" bitfld.long 0x00 28.--29. "RX15_AUTOREQ,RX endpoint 15 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 26.--27. "RX14_AUTOREQ,RX endpoint 14 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 24.--25. "RX13_AUTOREQ,RX endpoint 13 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" newline bitfld.long 0x00 22.--23. "RX12_AUTOREQ,RX endpoint 12 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 20.--21. "RX11_AUTOREQ,RX endpoint 11 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 18.--19. "RX10_AUTOREQ,RX endpoint 10 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" newline bitfld.long 0x00 16.--17. "RX9_AUTOREQ,RX endpoint 9 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 14.--15. "RX8_AUTOREQ,RX endpoint 8 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 12.--13. "RX7_AUTOREQ,RX endpoint 7 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" newline bitfld.long 0x00 10.--11. "RX6_AUTOREQ,RX endpoint 6 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 8.--9. "RX5_AUTOREQ,RX endpoint 5 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 6.--7. "RX4_AUTOREQ,RX endpoint 4 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" newline bitfld.long 0x00 4.--5. "RX3_AUTOREQ,RX endpoint 3 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 2.--3. "RX2_AUTOREQ,RX endpoint 2 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" bitfld.long 0x00 0.--1. "RX1_AUTOREQ,RX endpoint 1 auto req enable" "Disabled,Auto req on all but EOP,,Auto req always" line.long 0x04 "USB1SRPFIXTIME,SRP Fix Maximum Time Register" line.long 0x08 "USB1_TDOWN,Endpoint Teardown Register" bitfld.long 0x08 31. "TX_TDOWN[15],Tx endpoint 15 teardown" "0,1" bitfld.long 0x08 30. "TX_TDOWN[14],Tx endpoint 14 teardown" "0,1" bitfld.long 0x08 29. "TX_TDOWN[13],Tx endpoint 13 teardown" "0,1" newline bitfld.long 0x08 28. "TX_TDOWN[12],Tx endpoint 12 teardown" "0,1" bitfld.long 0x08 27. "TX_TDOWN[11],Tx endpoint 11 teardown" "0,1" bitfld.long 0x08 26. "TX_TDOWN[10],Tx endpoint 10 teardown" "0,1" newline bitfld.long 0x08 25. "TX_TDOWN[9],Tx endpoint 9 teardown" "0,1" bitfld.long 0x08 24. "TX_TDOWN[8],Tx endpoint 8 teardown" "0,1" bitfld.long 0x08 23. "TX_TDOWN[7],Tx endpoint 7 teardown" "0,1" newline bitfld.long 0x08 22. "TX_TDOWN[6],Tx endpoint 6 teardown" "0,1" bitfld.long 0x08 21. "TX_TDOWN[5],Tx endpoint 5 teardown" "0,1" bitfld.long 0x08 20. "TX_TDOWN[4],Tx endpoint 4 teardown" "0,1" newline bitfld.long 0x08 19. "TX_TDOWN[3],Tx endpoint 3 teardown" "0,1" bitfld.long 0x08 18. "TX_TDOWN[2],Tx endpoint 2 teardown" "0,1" bitfld.long 0x08 17. "TX_TDOWN[1],Tx endpoint 1 teardown" "0,1" newline bitfld.long 0x08 15. "RX_TDOWN[15],Rx endpoint 15 teardown" "0,1" bitfld.long 0x08 14. "RX_TDOWN[14],Rx endpoint 14 teardown" "0,1" bitfld.long 0x08 13. "RX_TDOWN[13],Rx endpoint 13 teardown" "0,1" newline bitfld.long 0x08 12. "RX_TDOWN[12],Rx endpoint 12 teardown" "0,1" bitfld.long 0x08 11. "RX_TDOWN[11],Rx endpoint 11 teardown" "0,1" bitfld.long 0x08 10. "RX_TDOWN[10],Rx endpoint 10 teardown" "0,1" newline bitfld.long 0x08 9. "RX_TDOWN[9],Rx endpoint 9 teardown" "0,1" bitfld.long 0x08 8. "RX_TDOWN[8],Rx endpoint 8 teardown" "0,1" bitfld.long 0x08 7. "RX_TDOWN[7],Rx endpoint 7 teardown" "0,1" newline bitfld.long 0x08 6. "RX_TDOWN[6],Rx endpoint 6 teardown" "0,1" bitfld.long 0x08 5. "RX_TDOWN[5],Rx endpoint 5 teardown" "0,1" bitfld.long 0x08 4. "RX_TDOWN[4],Rx endpoint 4 teardown" "0,1" newline bitfld.long 0x08 3. "RX_TDOWN[3],Rx endpoint 3 teardown" "0,1" bitfld.long 0x08 2. "RX_TDOWN[2],Rx endpoint 2 teardown" "0,1" bitfld.long 0x08 1. "RX_TDOWN[1],Rx endpoint 1 teardown" "0,1" group.long 0xE0++0x0B line.long 0x00 "USB1UTMI,USB UTMI Register" bitfld.long 0x00 23. "TXBITSTUFFEN,PHY UTMI input for signal TXBITSTUFFEN" "0,1" bitfld.long 0x00 22. "TXBITSTUFFENH,PHY UTMI input for signal TXBITSTUFFENH" "0,1" bitfld.long 0x00 21. "OTGDISABLE,PHY UTMI input for signal OTGDISABLE" "0,1" newline bitfld.long 0x00 20. "VBUSVLDEXTSEL,PHY UTMI input for signal VBUSVLDEXTSEL" "0,1" bitfld.long 0x00 19. "VBUSVLDEXT,PHY UTMI input for signal VBUSVLDEXT" "0,1" bitfld.long 0x00 18. "TXENABLEN,PHY UTMI input for signal TXENABLEN" "0,1" newline bitfld.long 0x00 17. "FSXCVROWNER,PHY UTMI input for signal FSXCVROWNER" "0,1" bitfld.long 0x00 16. "TXVALIDH,PHY UTMI input for signal TXVALIDH" "0,1" hexmask.long.byte 0x00 8.--15. 1. "DATAINH,PHY UTMI input for signal DATAINH" newline bitfld.long 0x00 2. "WORDINTERFACE,PHY UTMI input for signal WORDINTERFACE" "0,1" bitfld.long 0x00 1. "FSDATAEXT,PHY UTMI input for signal FSDATAEXT" "0,1" bitfld.long 0x00 0. "FSSE0EXT,PHY UTMI input for signal FSSE0EXT" "0,1" line.long 0x04 "USB1MGCUTMILB,USB1MGCUTMILB Register" rbitfld.long 0x04 28. "SUSPENDM,Loopback test observed value for SUSPENDM" "0,1" rbitfld.long 0x04 26.--27. "OPMODE,Loopback test observed value for OPMODE" "0,1,2,3" rbitfld.long 0x04 25. "TXVALID,Loopback test observed value for TXVALID" "0,1" newline rbitfld.long 0x04 23.--24. "XCVRSEL,Loopback test observed value for XCVRSEL" "0,1,3,4" rbitfld.long 0x04 22. "TERMSEL,Loopback test observed value for TERMSEL" "0,1" rbitfld.long 0x04 21. "DRVVBUS,Loopback test observed value for DRVVBUS" "0,1" newline rbitfld.long 0x04 20. "CHRGVBUS,Loopback test observed value for CHRGVBUS" "0,1" rbitfld.long 0x04 19. "DISCHRGVBUS,Loopback test observed value for DISCHRGVBUS" "0,1" rbitfld.long 0x04 18. "DPPULLDOWN,Loopback test observed value for DPPULLDOWN" "0,1" newline rbitfld.long 0x04 17. "DMPULLDOWN,Loopback test observed value for DMPULLDOWN" "0,1" rbitfld.long 0x04 16. "IDPULLUP,Loopback test observed value for IDPULLUP" "0,1" bitfld.long 0x04 11. "IDDIG,Loopback test value for IDDIG" "0,1" newline bitfld.long 0x04 10. "HOSTDISCON,Loopback test value for HOSTDISCON" "0,1" bitfld.long 0x04 9. "SESSEND,Loopback test value for SESSEND" "0,1" bitfld.long 0x04 8. "AVALID,Loopback test value for AVALID" "0,1" newline bitfld.long 0x04 7. "VBUSVALID,Loopback test value for VBUSVALID" "0,1" bitfld.long 0x04 6. "RXERROR,Loopback test value for RXERROR" "0,1" bitfld.long 0x04 2.--3. "LINESTATE,Loopback test value for LINESTATE" "0,1,2,3" line.long 0x08 "USB1MODE,USB1MODE Register" bitfld.long 0x08 8. "IDDIG,MGC input value for IDDIG" "A type,B type" bitfld.long 0x08 7. "IDDIG_MUX,Multiplexer control for IDDIG signal going to the controller" "PHY0,IDDIG[8]" bitfld.long 0x08 1. "PHY_TEST,PHY test" "Normal,PHY test" newline bitfld.long 0x08 0. "LOOPBACK,Loopback test mode" "Normal,Loopback test" tree.end tree.end tree "USB_PHY" tree "USB0_PHY" base ad:0x47401300 group.long 0x00++0x0F line.long 0x00 "TERMINATION_CONTROL,Contains Bits Related To Control Of Terminations In USB2PHY" bitfld.long 0x00 29. "ALWAYS_UPDATE,Calibration code update immediately after a code computation enable" "Disabled,Enabled" rbitfld.long 0x00 28. "RTERM_CAL_DONE,RTERM calibration is done" "In progress,Done" newline bitfld.long 0x00 24.--27. "FS_CODE_SEL,FS code selection control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 21. "USE_RTERM_RMX_REG,Override termination resistor trim code with RTERM_RMX from this registers" "Disabled,Enabled" newline hexmask.long.byte 0x00 14.--20. 1. "RTERM_RMX,Current termination resistor trim code" bitfld.long 0x00 11.--13. "HS_CODE_SEL,HS code selection control" "0,1.5%,3%,4.5%,?..." newline rbitfld.long 0x00 10. "RTERM_COMP_OUT,Master loop comparator output" "0,1" bitfld.long 0x00 9. "RESTART_RTERM_CAL,Restart the RTERM calibration" "Restart,Restart" newline bitfld.long 0x00 8. "DISABLE_TEMP_TRACK,Temperature tracking function of the termination caliration disable" "No,Yes" bitfld.long 0x00 7. "USE_RTERM_CAL_REG,RTERM cal code override by values in TRERM_CAL" "Disabled,Enabled" newline hexmask.long.byte 0x00 0.--6. 1. "RTERM_CAL,Current RTERM calibration code" line.long 0x04 "RX_CALIB,RX Calibration Register" bitfld.long 0x04 31. "RESTART_HSRX_CAL,Restart the HSRX calibration state machine" "No restart,Restart" bitfld.long 0x04 30. "USE_HS_OFF_REG,Override HS offset correction with HS_OFF_CODE" "Disabled,Enabled" newline bitfld.long 0x04 24.--29. "HS_OFF_CODE,HS offset code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x04 23. "HSRX_COMP_OUT,The output of the HSRX comparator" "Low,High" newline rbitfld.long 0x04 22. "HSRX_CAL_DONE,HSRX calibration done status" "In progress,Done" bitfld.long 0x04 21. "USE_SQ_OFF_DAC1,Override squelch offset DAC1 code" "Disabled,Enabled" newline bitfld.long 0x04 15.--20. "SQ_OFF_CODE_DAC1,Current sq offset code for DAC1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 14. "USE_SQ_OFF_DAC2,Override squelch offset DAC2 code" "Disabled,Enabled" newline bitfld.long 0x04 9.--13. "SQ_OFF_CODE_DAC2,Current sq offset code for DAC2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8. "USE_SQ_OFF_DAC3,Override squelch offset DAC3 code" "Disabled,Enabled" newline bitfld.long 0x04 3.--7. "SQ_OFF_CODE_DAC3,Current sq offset code for DAC3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x04 2. "SQ_COMP_OUT,Sq comp output" "Low,High" newline rbitfld.long 0x04 1. "SQ_CAL_DONE,Sq calibration is done status" "In progress,Done" bitfld.long 0x04 0. "RESTART_SQ_CAL,The squelch calibration continuously goes through restart cycles enable" "Disabled,Enabled" line.long 0x08 "DLLHS_2,2nd DLLHS Control Register" hexmask.long.byte 0x08 24.--31. 1. "DLLHS_CNTRL_LDO,DLLHS LDO control" hexmask.long.byte 0x08 16.--23. 1. "DLLHS_STATUS_LDO,DLLHS LDO status" newline bitfld.long 0x08 4. "LINESTATE_DEBOUNCE_EN,Enables the linestate debounce filter" "Disabled,Enabled" bitfld.long 0x08 0.--3. "LINESTATE_DEBOUNCE_CNTL,Control of the linestate debounce filter when going from syncronous to async linestate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "RX_TEST_2,2nd Receiver Test Register" bitfld.long 0x0C 31. "HSOSREVERSAL,Swaps the dataout from HSOS" "Not swapped,Swapped" bitfld.long 0x0C 30. "HSOSBITINVERSION,Inverts the HSOS bits" "Not inverted,Inverted" newline bitfld.long 0x0C 29. "PHYCLKOUTINVERSION,Inverts the phase for the PHYCLKOUT" "Not inverted,Inverted" bitfld.long 0x0C 27. "USEINTDATAOUT,Bypass the analog and send data packet to controller incase of receiver" "Not bypassed,Bypassed" newline hexmask.long.word 0x0C 11.--26. 1. "INTDATAOUTREG,INTDATAOUTREG" hexmask.long.byte 0x0C 0.--7. 1. "CDR_TESTOUT,CDR debug bits" group.long 0x14++0x33 line.long 0x00 "CHRG_DET,Charger Detect Register" bitfld.long 0x00 29. "USE_CHG_DET_REG,Use bits 28-24 and 18-17 from this register" "Disabled,Enabled" bitfld.long 0x00 28. "DIS_CHG_DET,Current value of charger detect input" "Low,High" newline bitfld.long 0x00 27. "SRC_ON_DM,Current value of charger detect input" "Low,High" bitfld.long 0x00 26. "SINK_ON_DP,Current value of charger detect input" "Low,High" newline bitfld.long 0x00 25. "CHG_DET_EXT_CTL,Current value of charger detect input" "Low,High" bitfld.long 0x00 24. "RESTART_CHG_DET,Restart the charger detection protocol" "No restart,Restart" newline rbitfld.long 0x00 23. "CHG_DET_DONE,Charger detect protocol has completion status" "In progress,Done" rbitfld.long 0x00 22. "CHG_DETECTED,Same signal as CE" "Low,High" newline rbitfld.long 0x00 21. "DATA_DET,Output of the data det comparator" "Low,High" bitfld.long 0x00 18. "CHG_ISINK_EN,Current value of charger detect input" "Low,High" newline bitfld.long 0x00 17. "CHG_VSRC_EN,Current value of charger detect input" "Low,High" rbitfld.long 0x00 16. "COMP_DP,Comparator on the DP line value" "Low,High" newline rbitfld.long 0x00 15. "COMP_DM,Comparator on the DM line value" "Low,High" bitfld.long 0x00 13.--14. "CHG_DET_OSC_CNTRL,Charger detect osc control" "0,1,2,3" newline bitfld.long 0x00 7.--12. "CHG_DET_TIMER,Charger detect timer control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 3.--4. "CHG_DET_ICTRL,Charger detect current control" "0,1,3,4" newline bitfld.long 0x00 1.--2. "CHG_DET_VCTRL,Charger detect voltage buffer control" "0,1,2,3" bitfld.long 0x00 0. "FOR_CE,Force CE" "Not forced,Forced" line.long 0x04 "PWR_CNTL,Power Control Register" rbitfld.long 0x04 31. "RESETDONETCLK,Reset done status" "In progress,Done" rbitfld.long 0x04 30. "RESET_DONE_VMAIN,Reset done status" "In progress,Done" newline rbitfld.long 0x04 29. "VMAIN_GLOBAL_RESET_DONE,VMAIN global resert done status" "In progress,Done" rbitfld.long 0x04 28. "RESETDONEMCLK,Reset done status" "In progress,Done" newline rbitfld.long 0x04 27. "RESETDONE_CHGDET,Reset done status" "In progress,Done" hexmask.long.word 0x04 12.--26. 1. "LDOPWRCOUNTER,Value of the counter used for LDO power up" newline bitfld.long 0x04 11. "FORCEPLLSLOWCLK,Forces the PLL to the slow clk mode" "Not forced,Forced" bitfld.long 0x04 10. "FORCELDOON,Forces the LDO to be ON" "Not forced,Forced" newline bitfld.long 0x04 9. "FORCEPLLON,Forces the PLL to be ON" "Not forced,Forced" rbitfld.long 0x04 6. "PLLLOCK,Lock signal from the PLL" "0,1" newline bitfld.long 0x04 5. "USEPLLLOCK,PLL lock enable" "Disabled,Enabled" bitfld.long 0x04 4. "USE_DATAPOLARITYN_REG,Use bit 3 as override for the DATAPOLARITYN signal" "Disabled,Enabled" newline bitfld.long 0x04 3. "DATAPOLARITYN,Override value of datapolarityn" "Low,High" bitfld.long 0x04 2. "USE_PD_REG,Use bit 1 from this register as PD override" "Disabled,Enabled" newline bitfld.long 0x04 1. "PD,Override value for PD" "Low,High" line.long 0x08 "UTMI_INTERFACE_CNTL_1,Override UTMI Interface Control Register" bitfld.long 0x08 31. "USEUTMIDATAREG,Use datain from UTMI interface register" "Disabled,Enabled" hexmask.long.word 0x08 15.--30. 1. "UTMIDATAIN,Override value for the UTMIDATAIN" newline bitfld.long 0x08 13. "USEDATABUSREG,Use bit 12 from register instead of interface" "Disabled,Enabled" bitfld.long 0x08 12. "DATABUS16OR8,Override value for UTMI signal DATABUS16OR8" "Low,High" newline bitfld.long 0x08 11. "USEOPMODEREG,Use bit 10-9 from register instead of interface" "Disabled,Enabled" bitfld.long 0x08 9.--10. "OPMODE,Override value for UTMI signal OPMODE[1:0]" "0,1,2,3" newline bitfld.long 0x08 8. "OVERRIDESUSRESET,Override the suspend and reset values" "Low,High" bitfld.long 0x08 7. "SUSPENDM,Override value for UTMI signal SUSPENDM" "Low,High" newline bitfld.long 0x08 6. "UTMIRESET,Override value for UTMI signal UTMIRESET" "Low,High" bitfld.long 0x08 5. "OVERRIDEXCVRSEL,Use bit 4-3 from register instead of interface" "Disabled,Enabled" newline bitfld.long 0x08 3.--4. "XCVRSEL,Override value for UTMI signal XCVRSEL[1:0]" "0,1,2,3" bitfld.long 0x08 2. "USETXVALIDREG,Use bit 1-0 from register instead of interface" "Disabled,Enabled" newline bitfld.long 0x08 1. "TXVALID,Override value for UTMI signal TXVALID" "Low,High" bitfld.long 0x08 0. "TXVALIDH,Override value for UTMI signal TXVALIDH" "Low,High" line.long 0x0C "UTMI_INTERFACE_CNTL_2,Override UTMI Interface Control Register" rbitfld.long 0x0C 31. "RXRCV,Read for UTMI signal" "Low,High" rbitfld.long 0x0C 30. "RXDP,Read for UTMI signal" "Low,High" newline rbitfld.long 0x0C 29. "RXDM,Read for UTMI signal" "Low,High" rbitfld.long 0x0C 28. "HOSTDISCONNECT,Read for UTMI signal" "Low,High" newline rbitfld.long 0x0C 26.--27. "LINESTATE,Read for UTMI signal" "0,1,2,3" rbitfld.long 0x0C 25. "RXVALID,Read for UTMI signal" "Low,High" newline rbitfld.long 0x0C 24. "RXVALIDH,Read for UTMI signal" "Low,High" rbitfld.long 0x0C 23. "RXACTIVE,Read for UTMI signal" "Low,High" newline rbitfld.long 0x0C 22. "RXERROR,Read for UTMI signal" "Low,High" rbitfld.long 0x0C 21. "TXREADY,Read for UTMI signal" "Low,High" newline rbitfld.long 0x0C 20. "UTMIRESETDONE,Read for UTMI signal" "Low,High" bitfld.long 0x0C 19. "USEBITSTUFFREG,Use bits 18-17 from register instead of interface" "Disabled,Enabled" newline bitfld.long 0x0C 18. "TXBITSTUFFENABLE,Override value for signal TXBITSTUFFENABLE" "Low,High" bitfld.long 0x0C 17. "TXBITSTUFFENABLEH,Override value for pin TXBITSTUFFENABLE" "Low,High" newline bitfld.long 0x0C 16. "USETERMCONTROLREG,Use bits 15-13 from register instead of interface" "Disabled,Enabled" bitfld.long 0x0C 15. "TERMSEL,Override value for signal TERMSEL" "Low,High" newline bitfld.long 0x0C 14. "DPPULLDOWN,Override value for signal DPPULLDOWN" "Low,High" bitfld.long 0x0C 13. "DMPULLDOWN,Override value for signal DMPULLDOWN" "Low,High" newline bitfld.long 0x0C 9. "USEREGSERIALMODE,Use bits 8-5 from register instead of interface" "Disabled,Enabled" bitfld.long 0x0C 8. "TXSE0,Override value for signal TXSE0" "Low,High" newline bitfld.long 0x0C 7. "TXDAT,Override value for signal TXSTXDATE0" "Low,High" bitfld.long 0x0C 6. "FSLSSERIALMODE,Override value for signal FSLSSERIALMODE" "Low,High" newline bitfld.long 0x0C 5. "TXENABLEN,Override value for signal TXENABLEN" "Low,High" bitfld.long 0x0C 0. "SIG_BYPASS_SUSPENDMPULSE_INCR,Pulse extention bypass" "Not bypassed,Byassed" line.long 0x10 "BIST,Built In Self Test Register" bitfld.long 0x10 31. "BIST_START,BIST mode start" "Not started,Started" bitfld.long 0x10 30. "REDUCED_SWING,TX swing reduce in BIST mode" "Not reduced,Reduced" newline bitfld.long 0x10 29. "BIST_CRC_CALC_EN,Enables CRC calculation during BIST when set to 1" "Disabled,Enabled" hexmask.long.word 0x10 20.--28. 1. "BIST_PKT_LENGTH,Address for which BIST to select" newline bitfld.long 0x10 19. "LOOPBACK_EN,Enables the loopback mode" "Disabled,Enabled" bitfld.long 0x10 16.--18. "BIST_OP_PHASE_SEL,Selects which phase to use for data transmission during BIST" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 15. "SWEEP_EN,Enables freq sweep on CDR" "Disabled,Enabled" bitfld.long 0x10 12.--14. "SWEEP_MODE,Selects the freq sweep mode" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x10 11. "BIST_PASS,Indicates that the BIST has passed" "Not passes,Passed" rbitfld.long 0x10 10. "BIST_BUSY,Indicates that BIST is running" "Not running,Running" newline bitfld.long 0x10 5.--6. "OP_CODE,OP code" "0,1,2,3" bitfld.long 0x10 4. "RX_TEST_MODE,RX test mode" "0,1" newline bitfld.long 0x10 2. "INTER_PKT_DELAY_TEST,Internal PKT delay test" "0,1" bitfld.long 0x10 1. "HS_ALL_ONES_TEST,HS all ones test" "0,1" newline bitfld.long 0x10 0. "USE_BIST_TX_PHASES,Use bits 18-16 activaton for choosing the transmitting phase" "Disabled,Enabled" line.long 0x14 "BIST_CRC,CRC Code For BIST Test Register" line.long 0x18 "CDR_BIST2,Clock Data Recovery Register And BIST Register 2" bitfld.long 0x18 31. "CDR_EXE_EN,CDR EXE enable" "Disabled,Enabled" bitfld.long 0x18 28.--30. "CDR_EXE_MODE,CDR exe mode" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 25.--27. "NUM_DECISIONS,Num decisions" "0,1,2,3,4,5,6,7" rbitfld.long 0x18 22.--24. "CDR_CHOSEN_PHASE,CDR chosen phase" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x18 19.--21. "FORCE_CDR_PHASE,Force CDR phase" "0,1,2,3,4,5,6,7" rbitfld.long 0x18 18. "DISABLE_CDR_FREQ_TRACK,Disable CDR freq track" "No,Yes" newline rbitfld.long 0x18 13.--17. "CDR_CONFIGURE,CDR configure" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x18 12. "FORCE_CDR_PHASE_EN,Force CDR phase enablde" "Diabled,Enabled" newline bitfld.long 0x18 6.--11. "BIST_START_ADDR,Bist start addr" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. "BIST_END_ADDR,Bist_end_addr" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x1C "GPIO,GPIO Mode Configurations And Reads Register" bitfld.long 0x1C 31. "USEGPIOMODEREG,Use bits 31 24 from this register instead of primary inputs" "Disabled,Enabled" bitfld.long 0x1C 30. "GPIOMODE,Overrides the corresponding primary input" "Disabled,Enabled" newline bitfld.long 0x1C 29. "DPGPIOGZ,Overrides the corresponding primary input" "Disabled,Enabled" bitfld.long 0x1C 28. "DMGPIOGZ,Overrides the corresponding primary input" "Disabled,Enabled" newline bitfld.long 0x1C 27. "DPGPIOA,Overrides the corresponding primary input" "Disabled,Enabled" bitfld.long 0x1C 26. "DMGPIOA,Overrides the corresponding primary input" "Disabled,Enabled" newline rbitfld.long 0x1C 25. "DPGPIOY,GPIO Y output value" "Low,High" rbitfld.long 0x1C 24. "DMGPIOY,GPIO Y output value" "Low,High" newline bitfld.long 0x1C 23. "GPIO1P8VCONFIG,Overrides the corresponding primary input" "Disabled,Enabled" bitfld.long 0x1C 20.--22. "GPIOCONFIG,Used for configuring the gpios" "0,1,2,3,4,5,6,7" newline bitfld.long 0x1C 19. "DMGPIOPIPD,GPIO mode DM pull down enabled" "Disabled,Enabled" bitfld.long 0x1C 18. "DPGPIOPIPD,GPIO mode DP pull-down enabled" "Disabled,Enabled" line.long 0x20 "DLLHS,Control And Debug Of The DLL Inside The Phy Register" rbitfld.long 0x20 28. "DLLHS_LOCK,Read the AFE output" "0,1" rbitfld.long 0x20 22.--27. "DLLHS_GENERATED_CODE,Read the AFE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x20 21. "DLL_SEL_CODE_PHS,Connect to DLLHS_TEST_LDO[0] on AFE interface" "0,1" bitfld.long 0x20 19.--20. "DLL_LOCKCHK,Connect to DLLHS_TEST_LDO [2:1] on AFE interface" "0,1,2,3" newline bitfld.long 0x20 16.--18. "DLL_SEL_COD,Connect to DLLHS_TEST_LDO [5:3] on AFE interface" "0,1,2,3,4,5,6,7" bitfld.long 0x20 15. "DLL_PHS0_8,Connect to DLLHS_TEST_LDO[6] on AFE interface" "0,1" newline bitfld.long 0x20 9.--14. "DLL_FORCED_CODE,Connect to the pin of this name on AFE interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x20 8. "FORCE_DLL_CODE,Connect to DLLHS_TEST_LDO[11] on AFE interface" "0,1" newline bitfld.long 0x20 6.--7. "DLL_RATE,Connect to DLLHS_TEST_LDO [8:7] on AFE interface" "0,1,2,3" bitfld.long 0x20 4.--5. "DLL_FILT,Connect to DLLHS_TEST_LDO [10:9] on AFE interface" "0,1,2,3" newline bitfld.long 0x20 3. "DLL_CDR_MODE,Connect to the pin of this name on AFE interface" "0,1" bitfld.long 0x20 2. "DLL_IDLE,Connect to DLLHS_TEST_LDO[12] on AFE interface" "0,1" newline bitfld.long 0x20 1. "DLL_FREEZE,Connect to DLLHS_TEST_LDO[13] on AFE interface" "0,1" line.long 0x24 "DLLHS,Control And Debug Of The DLL Inside The Phy Register" hexmask.long.byte 0x24 24.--31. 1. "CONFIGURECM,Connects to the CONFIGURECM pins" rbitfld.long 0x24 18.--23. "CMSTATUS,Reads the CMSTATUS bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline hexmask.long.word 0x24 2.--17. 1. "LDOCONFIG,The LDOCONFIG bit settings" rbitfld.long 0x24 0.--1. "LDOSTATUS,Reads the LDOSTATUS bits" "0,1,2,3" line.long 0x28 "AD_INTERFACE_REG1,Analog To Digital Interface Register" bitfld.long 0x28 31. "USE_AD_DATA_REG,Override for bits 29-30" "Disabled,Enabled" bitfld.long 0x28 30. "HS_TX_DATA,HS TX data" "0,1" newline bitfld.long 0x28 29. "FS_TX_DATA,FS TX data" "0,1" bitfld.long 0x28 28. "TEST_PRE_EN_CNTRL,Override for bits 25-27" "Disabled,Enabled" newline bitfld.long 0x28 27. "SQ_PRE_EN,SQ PRE enable" "Disabled,Enabled" bitfld.long 0x28 25. "HS_TX_PRE_EN,HS TX PRE enable" "Disabled,Enabled" newline bitfld.long 0x28 24. "TEST_EN_CNTRL,Override for bits 19-23" "Disabled,Enabled" bitfld.long 0x28 23. "HS_TX_EN,HS TX enable" "Disabled,Enabled" newline bitfld.long 0x28 22. "FS_RX_EN,FS RX enable" "Disabled,Enabled" bitfld.long 0x28 20. "SQ_EN,SQ enable" "Disabled,Enabled" newline bitfld.long 0x28 19. "HS_RX_EN,HS RX elnable" "Disabled,Enabled" bitfld.long 0x28 18. "TEST_HS_MODE,Override for bits 16-17" "Disabled,Enabled" newline bitfld.long 0x28 17. "HS_HV_SW,HS HV SW" "0,1" bitfld.long 0x28 16. "HS_CHIRP,HS CHIRP" "0,1" newline bitfld.long 0x28 15. "TEST_FS_MODE,Override for bits 12-14" "Disabled,Enabled" bitfld.long 0x28 14. "FSTX_GZ,FSTX_GX" "0,1" newline bitfld.long 0x28 13. "FSTX_PRE_EN,FSTX PRE enable" "Disabled,Enabled" bitfld.long 0x28 11. "TEST_SQ_CAL_CONTROL,Override for bits 8-10" "Disabled,Enabled" newline bitfld.long 0x28 10. "SQ_CAL_EN3,SQ CAL enable" "Disabled,Enabled" bitfld.long 0x28 9. "SQ_CAL_EN2,SQ CAL enable" "Disabled,Enabled" newline bitfld.long 0x28 8. "SQ_CAL_EN1,SQ CAL enable" "Disabled,Enabled" bitfld.long 0x28 7. "TEST_RTERM_CAL_CONTROL,Override for bit 6" "Disabled,Enabled" newline bitfld.long 0x28 6. "RTERM_CAL_EN,RTERM CAL enable" "Disabled,Enabled" rbitfld.long 0x28 5. "DLL_RX_DATA,DLL RX data" "0,1" newline rbitfld.long 0x28 4. "DISCON_DETECT,DISCON_DETECT" "0,1" bitfld.long 0x28 3. "USE_LSHOST_REG,Use bit 2 for this reg" "Disabled,Enabled" newline bitfld.long 0x28 2. "LSHOSTMODE,LSHOSTMODE" "0,1" rbitfld.long 0x28 1. "LSFS_RX_DATA,LSFS RX data" "0,1" newline rbitfld.long 0x28 0. "SQUELCH,SQUELCH" "0,1" line.long 0x2C "AD_INTERFACE_REG2,Analog To Digital Interface Register" bitfld.long 0x2C 31. "USE_SUSP_DRV_REG,Use bits 27-30 from this register as overrides" "Disabled,Enabled" bitfld.long 0x2C 30. "SUS_DRV_DP_DATA,SUS DRV DP data" "0,1" newline bitfld.long 0x2C 29. "SUS_DRV_DP_EN,SUS DRV DP enable" "Disabled,Enabled" bitfld.long 0x2C 28. "SUS_DRV_DM_DATA,SUS DRV DM data" "0,1" newline bitfld.long 0x2C 27. "SUS_DRV_DM_EN,SUS DRV DM enable" "Disabled,Enabled" bitfld.long 0x2C 26. "USE_SUSP_DRV_REG,Use bits 24-25 from this register as overrides" "Disabled,Enabled" newline bitfld.long 0x2C 25. "DISCON_EN,DISCON enable" "Disabled,Enabled" bitfld.long 0x2C 24. "DISCON_PRE_EN,DISCON PRE enable" "Disabled,Enabled" newline rbitfld.long 0x2C 18.--22. "SPARE_OUT_CORE,SPARE_OUT_CORE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x2C 17. "SERX_DP_CORE,SERX_DP_CORE" "0,1" newline rbitfld.long 0x2C 16. "SERX_DM_CORE,SERX_DM_CORE" "0,1" bitfld.long 0x2C 15. "USE_SUSP_DRV_REG,Use bits 14 from this register as overrides" "Disabled,Enabled" newline bitfld.long 0x2C 14. "HSRX_CAL_EN,HSRX CAL enable" "Disabled,Enabled" bitfld.long 0x2C 13. "USE_RPU_RPD_REG,Use bits 7-12 from this register as overrides" "Disabled,Enabled" newline bitfld.long 0x2C 12. "RPU_DP_SW1_EN_CORE,RPU_DP_SW1_EN_CORE" "Disabled,Enabled" bitfld.long 0x2C 11. "RPU_DP_SW2_EN_CORE,RPU_DP_SW2_EN_CORE" "Disabled,Enabled" newline bitfld.long 0x2C 10. "RPU_DM_SW2_EN_COR,RPU_DM_SW2_EN_COR" "Disabled,Enabled" bitfld.long 0x2C 9. "RPU_DM_SW2_EN_COR,RPU_DM_SW2_EN_COR" "Disabled,Enabled" newline bitfld.long 0x2C 8. "DP_PULLDOWN_EN_CORE,DP pulldown enable core" "Disabled,Enabled" bitfld.long 0x2C 7. "DM_PULLDOWN_EN_CORE,DM pulldown enable core" "Disabled,Enabled" newline rbitfld.long 0x2C 6. "DP_DM_5V_SHORT,DP_DM_5V_SHORT" "0,1" bitfld.long 0x2C 1.--5. "SPARE_IN_CORE,SPARE_IN_CORE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x2C 0. "PORZ,PORZ" "0,1" line.long 0x30 "AD_INTERFACE_REG3,Analog To Digital Interface Register" bitfld.long 0x30 31. "USE_HSOS_DATA_REG,Use bits 30-23 as bypass bits" "Disabled,Enabled" hexmask.long.byte 0x30 23.--30. 1. "HSOS_DATA,HSOS data" newline bitfld.long 0x30 22. "USE_FS_REG3,Use bits 20-21 as bypass bits" "Disabled,Enabled" bitfld.long 0x30 21. "FSTX_MODE,FSTX_MODE" "0,1" newline bitfld.long 0x30 20. "FSTX_SE0,FSTX_SE0" "0,1" bitfld.long 0x30 19. "USE_HS_TERM_RES_REG,Use bit 18 as override bit" "Disabled,Enabled" newline bitfld.long 0x30 18. "HS_TERM_RES,HS_TERM_RES" "0,1" hexmask.long.byte 0x30 10.--17. 1. "SPARE_IN_LDO,SPARE_IN_LDO" newline hexmask.long.byte 0x30 2.--9. 1. "SPARE_OUT_LDO,SPARE_OUT_LDO" bitfld.long 0x30 1. "USE_FARCORE_REG,Use bit 0 as override bit" "Disabled,Enabled" newline bitfld.long 0x30 0. "FARCORE,FARCORE" "0,1" group.long 0x54++0x03 line.long 0x00 "ANA_CONFIG2,Debug The Analog Blocks Configuration Register" hexmask.long.byte 0x00 20.--26. 1. "REF_GEN_TEST,REF_GEN_TEST" bitfld.long 0x00 15.--17. "RTERM_TEST,Termination impedance test" "Typical,,,Decreased,?..." tree.end tree "USB1_PHY" base ad:0x47401B00 group.long 0x00++0x0F line.long 0x00 "TERMINATION_CONTROL,Contains Bits Related To Control Of Terminations In USB2PHY" bitfld.long 0x00 29. "ALWAYS_UPDATE,Calibration code update immediately after a code computation enable" "Disabled,Enabled" rbitfld.long 0x00 28. "RTERM_CAL_DONE,RTERM calibration is done" "In progress,Done" newline bitfld.long 0x00 24.--27. "FS_CODE_SEL,FS code selection control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 21. "USE_RTERM_RMX_REG,Override termination resistor trim code with RTERM_RMX from this registers" "Disabled,Enabled" newline hexmask.long.byte 0x00 14.--20. 1. "RTERM_RMX,Current termination resistor trim code" bitfld.long 0x00 11.--13. "HS_CODE_SEL,HS code selection control" "0,1.5%,3%,4.5%,?..." newline rbitfld.long 0x00 10. "RTERM_COMP_OUT,Master loop comparator output" "0,1" bitfld.long 0x00 9. "RESTART_RTERM_CAL,Restart the RTERM calibration" "Restart,Restart" newline bitfld.long 0x00 8. "DISABLE_TEMP_TRACK,Temperature tracking function of the termination caliration disable" "No,Yes" bitfld.long 0x00 7. "USE_RTERM_CAL_REG,RTERM cal code override by values in TRERM_CAL" "Disabled,Enabled" newline hexmask.long.byte 0x00 0.--6. 1. "RTERM_CAL,Current RTERM calibration code" line.long 0x04 "RX_CALIB,RX Calibration Register" bitfld.long 0x04 31. "RESTART_HSRX_CAL,Restart the HSRX calibration state machine" "No restart,Restart" bitfld.long 0x04 30. "USE_HS_OFF_REG,Override HS offset correction with HS_OFF_CODE" "Disabled,Enabled" newline bitfld.long 0x04 24.--29. "HS_OFF_CODE,HS offset code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x04 23. "HSRX_COMP_OUT,The output of the HSRX comparator" "Low,High" newline rbitfld.long 0x04 22. "HSRX_CAL_DONE,HSRX calibration done status" "In progress,Done" bitfld.long 0x04 21. "USE_SQ_OFF_DAC1,Override squelch offset DAC1 code" "Disabled,Enabled" newline bitfld.long 0x04 15.--20. "SQ_OFF_CODE_DAC1,Current sq offset code for DAC1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 14. "USE_SQ_OFF_DAC2,Override squelch offset DAC2 code" "Disabled,Enabled" newline bitfld.long 0x04 9.--13. "SQ_OFF_CODE_DAC2,Current sq offset code for DAC2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8. "USE_SQ_OFF_DAC3,Override squelch offset DAC3 code" "Disabled,Enabled" newline bitfld.long 0x04 3.--7. "SQ_OFF_CODE_DAC3,Current sq offset code for DAC3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x04 2. "SQ_COMP_OUT,Sq comp output" "Low,High" newline rbitfld.long 0x04 1. "SQ_CAL_DONE,Sq calibration is done status" "In progress,Done" bitfld.long 0x04 0. "RESTART_SQ_CAL,The squelch calibration continuously goes through restart cycles enable" "Disabled,Enabled" line.long 0x08 "DLLHS_2,2nd DLLHS Control Register" hexmask.long.byte 0x08 24.--31. 1. "DLLHS_CNTRL_LDO,DLLHS LDO control" hexmask.long.byte 0x08 16.--23. 1. "DLLHS_STATUS_LDO,DLLHS LDO status" newline bitfld.long 0x08 4. "LINESTATE_DEBOUNCE_EN,Enables the linestate debounce filter" "Disabled,Enabled" bitfld.long 0x08 0.--3. "LINESTATE_DEBOUNCE_CNTL,Control of the linestate debounce filter when going from syncronous to async linestate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "RX_TEST_2,2nd Receiver Test Register" bitfld.long 0x0C 31. "HSOSREVERSAL,Swaps the dataout from HSOS" "Not swapped,Swapped" bitfld.long 0x0C 30. "HSOSBITINVERSION,Inverts the HSOS bits" "Not inverted,Inverted" newline bitfld.long 0x0C 29. "PHYCLKOUTINVERSION,Inverts the phase for the PHYCLKOUT" "Not inverted,Inverted" bitfld.long 0x0C 27. "USEINTDATAOUT,Bypass the analog and send data packet to controller incase of receiver" "Not bypassed,Bypassed" newline hexmask.long.word 0x0C 11.--26. 1. "INTDATAOUTREG,INTDATAOUTREG" hexmask.long.byte 0x0C 0.--7. 1. "CDR_TESTOUT,CDR debug bits" group.long 0x14++0x33 line.long 0x00 "CHRG_DET,Charger Detect Register" bitfld.long 0x00 29. "USE_CHG_DET_REG,Use bits 28-24 and 18-17 from this register" "Disabled,Enabled" bitfld.long 0x00 28. "DIS_CHG_DET,Current value of charger detect input" "Low,High" newline bitfld.long 0x00 27. "SRC_ON_DM,Current value of charger detect input" "Low,High" bitfld.long 0x00 26. "SINK_ON_DP,Current value of charger detect input" "Low,High" newline bitfld.long 0x00 25. "CHG_DET_EXT_CTL,Current value of charger detect input" "Low,High" bitfld.long 0x00 24. "RESTART_CHG_DET,Restart the charger detection protocol" "No restart,Restart" newline rbitfld.long 0x00 23. "CHG_DET_DONE,Charger detect protocol has completion status" "In progress,Done" rbitfld.long 0x00 22. "CHG_DETECTED,Same signal as CE" "Low,High" newline rbitfld.long 0x00 21. "DATA_DET,Output of the data det comparator" "Low,High" bitfld.long 0x00 18. "CHG_ISINK_EN,Current value of charger detect input" "Low,High" newline bitfld.long 0x00 17. "CHG_VSRC_EN,Current value of charger detect input" "Low,High" rbitfld.long 0x00 16. "COMP_DP,Comparator on the DP line value" "Low,High" newline rbitfld.long 0x00 15. "COMP_DM,Comparator on the DM line value" "Low,High" bitfld.long 0x00 13.--14. "CHG_DET_OSC_CNTRL,Charger detect osc control" "0,1,2,3" newline bitfld.long 0x00 7.--12. "CHG_DET_TIMER,Charger detect timer control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 3.--4. "CHG_DET_ICTRL,Charger detect current control" "0,1,3,4" newline bitfld.long 0x00 1.--2. "CHG_DET_VCTRL,Charger detect voltage buffer control" "0,1,2,3" bitfld.long 0x00 0. "FOR_CE,Force CE" "Not forced,Forced" line.long 0x04 "PWR_CNTL,Power Control Register" rbitfld.long 0x04 31. "RESETDONETCLK,Reset done status" "In progress,Done" rbitfld.long 0x04 30. "RESET_DONE_VMAIN,Reset done status" "In progress,Done" newline rbitfld.long 0x04 29. "VMAIN_GLOBAL_RESET_DONE,VMAIN global resert done status" "In progress,Done" rbitfld.long 0x04 28. "RESETDONEMCLK,Reset done status" "In progress,Done" newline rbitfld.long 0x04 27. "RESETDONE_CHGDET,Reset done status" "In progress,Done" hexmask.long.word 0x04 12.--26. 1. "LDOPWRCOUNTER,Value of the counter used for LDO power up" newline bitfld.long 0x04 11. "FORCEPLLSLOWCLK,Forces the PLL to the slow clk mode" "Not forced,Forced" bitfld.long 0x04 10. "FORCELDOON,Forces the LDO to be ON" "Not forced,Forced" newline bitfld.long 0x04 9. "FORCEPLLON,Forces the PLL to be ON" "Not forced,Forced" rbitfld.long 0x04 6. "PLLLOCK,Lock signal from the PLL" "0,1" newline bitfld.long 0x04 5. "USEPLLLOCK,PLL lock enable" "Disabled,Enabled" bitfld.long 0x04 4. "USE_DATAPOLARITYN_REG,Use bit 3 as override for the DATAPOLARITYN signal" "Disabled,Enabled" newline bitfld.long 0x04 3. "DATAPOLARITYN,Override value of datapolarityn" "Low,High" bitfld.long 0x04 2. "USE_PD_REG,Use bit 1 from this register as PD override" "Disabled,Enabled" newline bitfld.long 0x04 1. "PD,Override value for PD" "Low,High" line.long 0x08 "UTMI_INTERFACE_CNTL_1,Override UTMI Interface Control Register" bitfld.long 0x08 31. "USEUTMIDATAREG,Use datain from UTMI interface register" "Disabled,Enabled" hexmask.long.word 0x08 15.--30. 1. "UTMIDATAIN,Override value for the UTMIDATAIN" newline bitfld.long 0x08 13. "USEDATABUSREG,Use bit 12 from register instead of interface" "Disabled,Enabled" bitfld.long 0x08 12. "DATABUS16OR8,Override value for UTMI signal DATABUS16OR8" "Low,High" newline bitfld.long 0x08 11. "USEOPMODEREG,Use bit 10-9 from register instead of interface" "Disabled,Enabled" bitfld.long 0x08 9.--10. "OPMODE,Override value for UTMI signal OPMODE[1:0]" "0,1,2,3" newline bitfld.long 0x08 8. "OVERRIDESUSRESET,Override the suspend and reset values" "Low,High" bitfld.long 0x08 7. "SUSPENDM,Override value for UTMI signal SUSPENDM" "Low,High" newline bitfld.long 0x08 6. "UTMIRESET,Override value for UTMI signal UTMIRESET" "Low,High" bitfld.long 0x08 5. "OVERRIDEXCVRSEL,Use bit 4-3 from register instead of interface" "Disabled,Enabled" newline bitfld.long 0x08 3.--4. "XCVRSEL,Override value for UTMI signal XCVRSEL[1:0]" "0,1,2,3" bitfld.long 0x08 2. "USETXVALIDREG,Use bit 1-0 from register instead of interface" "Disabled,Enabled" newline bitfld.long 0x08 1. "TXVALID,Override value for UTMI signal TXVALID" "Low,High" bitfld.long 0x08 0. "TXVALIDH,Override value for UTMI signal TXVALIDH" "Low,High" line.long 0x0C "UTMI_INTERFACE_CNTL_2,Override UTMI Interface Control Register" rbitfld.long 0x0C 31. "RXRCV,Read for UTMI signal" "Low,High" rbitfld.long 0x0C 30. "RXDP,Read for UTMI signal" "Low,High" newline rbitfld.long 0x0C 29. "RXDM,Read for UTMI signal" "Low,High" rbitfld.long 0x0C 28. "HOSTDISCONNECT,Read for UTMI signal" "Low,High" newline rbitfld.long 0x0C 26.--27. "LINESTATE,Read for UTMI signal" "0,1,2,3" rbitfld.long 0x0C 25. "RXVALID,Read for UTMI signal" "Low,High" newline rbitfld.long 0x0C 24. "RXVALIDH,Read for UTMI signal" "Low,High" rbitfld.long 0x0C 23. "RXACTIVE,Read for UTMI signal" "Low,High" newline rbitfld.long 0x0C 22. "RXERROR,Read for UTMI signal" "Low,High" rbitfld.long 0x0C 21. "TXREADY,Read for UTMI signal" "Low,High" newline rbitfld.long 0x0C 20. "UTMIRESETDONE,Read for UTMI signal" "Low,High" bitfld.long 0x0C 19. "USEBITSTUFFREG,Use bits 18-17 from register instead of interface" "Disabled,Enabled" newline bitfld.long 0x0C 18. "TXBITSTUFFENABLE,Override value for signal TXBITSTUFFENABLE" "Low,High" bitfld.long 0x0C 17. "TXBITSTUFFENABLEH,Override value for pin TXBITSTUFFENABLE" "Low,High" newline bitfld.long 0x0C 16. "USETERMCONTROLREG,Use bits 15-13 from register instead of interface" "Disabled,Enabled" bitfld.long 0x0C 15. "TERMSEL,Override value for signal TERMSEL" "Low,High" newline bitfld.long 0x0C 14. "DPPULLDOWN,Override value for signal DPPULLDOWN" "Low,High" bitfld.long 0x0C 13. "DMPULLDOWN,Override value for signal DMPULLDOWN" "Low,High" newline bitfld.long 0x0C 9. "USEREGSERIALMODE,Use bits 8-5 from register instead of interface" "Disabled,Enabled" bitfld.long 0x0C 8. "TXSE0,Override value for signal TXSE0" "Low,High" newline bitfld.long 0x0C 7. "TXDAT,Override value for signal TXSTXDATE0" "Low,High" bitfld.long 0x0C 6. "FSLSSERIALMODE,Override value for signal FSLSSERIALMODE" "Low,High" newline bitfld.long 0x0C 5. "TXENABLEN,Override value for signal TXENABLEN" "Low,High" bitfld.long 0x0C 0. "SIG_BYPASS_SUSPENDMPULSE_INCR,Pulse extention bypass" "Not bypassed,Byassed" line.long 0x10 "BIST,Built In Self Test Register" bitfld.long 0x10 31. "BIST_START,BIST mode start" "Not started,Started" bitfld.long 0x10 30. "REDUCED_SWING,TX swing reduce in BIST mode" "Not reduced,Reduced" newline bitfld.long 0x10 29. "BIST_CRC_CALC_EN,Enables CRC calculation during BIST when set to 1" "Disabled,Enabled" hexmask.long.word 0x10 20.--28. 1. "BIST_PKT_LENGTH,Address for which BIST to select" newline bitfld.long 0x10 19. "LOOPBACK_EN,Enables the loopback mode" "Disabled,Enabled" bitfld.long 0x10 16.--18. "BIST_OP_PHASE_SEL,Selects which phase to use for data transmission during BIST" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 15. "SWEEP_EN,Enables freq sweep on CDR" "Disabled,Enabled" bitfld.long 0x10 12.--14. "SWEEP_MODE,Selects the freq sweep mode" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x10 11. "BIST_PASS,Indicates that the BIST has passed" "Not passes,Passed" rbitfld.long 0x10 10. "BIST_BUSY,Indicates that BIST is running" "Not running,Running" newline bitfld.long 0x10 5.--6. "OP_CODE,OP code" "0,1,2,3" bitfld.long 0x10 4. "RX_TEST_MODE,RX test mode" "0,1" newline bitfld.long 0x10 2. "INTER_PKT_DELAY_TEST,Internal PKT delay test" "0,1" bitfld.long 0x10 1. "HS_ALL_ONES_TEST,HS all ones test" "0,1" newline bitfld.long 0x10 0. "USE_BIST_TX_PHASES,Use bits 18-16 activaton for choosing the transmitting phase" "Disabled,Enabled" line.long 0x14 "BIST_CRC,CRC Code For BIST Test Register" line.long 0x18 "CDR_BIST2,Clock Data Recovery Register And BIST Register 2" bitfld.long 0x18 31. "CDR_EXE_EN,CDR EXE enable" "Disabled,Enabled" bitfld.long 0x18 28.--30. "CDR_EXE_MODE,CDR exe mode" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 25.--27. "NUM_DECISIONS,Num decisions" "0,1,2,3,4,5,6,7" rbitfld.long 0x18 22.--24. "CDR_CHOSEN_PHASE,CDR chosen phase" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x18 19.--21. "FORCE_CDR_PHASE,Force CDR phase" "0,1,2,3,4,5,6,7" rbitfld.long 0x18 18. "DISABLE_CDR_FREQ_TRACK,Disable CDR freq track" "No,Yes" newline rbitfld.long 0x18 13.--17. "CDR_CONFIGURE,CDR configure" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x18 12. "FORCE_CDR_PHASE_EN,Force CDR phase enablde" "Diabled,Enabled" newline bitfld.long 0x18 6.--11. "BIST_START_ADDR,Bist start addr" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. "BIST_END_ADDR,Bist_end_addr" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x1C "GPIO,GPIO Mode Configurations And Reads Register" bitfld.long 0x1C 31. "USEGPIOMODEREG,Use bits 31 24 from this register instead of primary inputs" "Disabled,Enabled" bitfld.long 0x1C 30. "GPIOMODE,Overrides the corresponding primary input" "Disabled,Enabled" newline bitfld.long 0x1C 29. "DPGPIOGZ,Overrides the corresponding primary input" "Disabled,Enabled" bitfld.long 0x1C 28. "DMGPIOGZ,Overrides the corresponding primary input" "Disabled,Enabled" newline bitfld.long 0x1C 27. "DPGPIOA,Overrides the corresponding primary input" "Disabled,Enabled" bitfld.long 0x1C 26. "DMGPIOA,Overrides the corresponding primary input" "Disabled,Enabled" newline rbitfld.long 0x1C 25. "DPGPIOY,GPIO Y output value" "Low,High" rbitfld.long 0x1C 24. "DMGPIOY,GPIO Y output value" "Low,High" newline bitfld.long 0x1C 23. "GPIO1P8VCONFIG,Overrides the corresponding primary input" "Disabled,Enabled" bitfld.long 0x1C 20.--22. "GPIOCONFIG,Used for configuring the gpios" "0,1,2,3,4,5,6,7" newline bitfld.long 0x1C 19. "DMGPIOPIPD,GPIO mode DM pull down enabled" "Disabled,Enabled" bitfld.long 0x1C 18. "DPGPIOPIPD,GPIO mode DP pull-down enabled" "Disabled,Enabled" line.long 0x20 "DLLHS,Control And Debug Of The DLL Inside The Phy Register" rbitfld.long 0x20 28. "DLLHS_LOCK,Read the AFE output" "0,1" rbitfld.long 0x20 22.--27. "DLLHS_GENERATED_CODE,Read the AFE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x20 21. "DLL_SEL_CODE_PHS,Connect to DLLHS_TEST_LDO[0] on AFE interface" "0,1" bitfld.long 0x20 19.--20. "DLL_LOCKCHK,Connect to DLLHS_TEST_LDO [2:1] on AFE interface" "0,1,2,3" newline bitfld.long 0x20 16.--18. "DLL_SEL_COD,Connect to DLLHS_TEST_LDO [5:3] on AFE interface" "0,1,2,3,4,5,6,7" bitfld.long 0x20 15. "DLL_PHS0_8,Connect to DLLHS_TEST_LDO[6] on AFE interface" "0,1" newline bitfld.long 0x20 9.--14. "DLL_FORCED_CODE,Connect to the pin of this name on AFE interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x20 8. "FORCE_DLL_CODE,Connect to DLLHS_TEST_LDO[11] on AFE interface" "0,1" newline bitfld.long 0x20 6.--7. "DLL_RATE,Connect to DLLHS_TEST_LDO [8:7] on AFE interface" "0,1,2,3" bitfld.long 0x20 4.--5. "DLL_FILT,Connect to DLLHS_TEST_LDO [10:9] on AFE interface" "0,1,2,3" newline bitfld.long 0x20 3. "DLL_CDR_MODE,Connect to the pin of this name on AFE interface" "0,1" bitfld.long 0x20 2. "DLL_IDLE,Connect to DLLHS_TEST_LDO[12] on AFE interface" "0,1" newline bitfld.long 0x20 1. "DLL_FREEZE,Connect to DLLHS_TEST_LDO[13] on AFE interface" "0,1" line.long 0x24 "DLLHS,Control And Debug Of The DLL Inside The Phy Register" hexmask.long.byte 0x24 24.--31. 1. "CONFIGURECM,Connects to the CONFIGURECM pins" rbitfld.long 0x24 18.--23. "CMSTATUS,Reads the CMSTATUS bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline hexmask.long.word 0x24 2.--17. 1. "LDOCONFIG,The LDOCONFIG bit settings" rbitfld.long 0x24 0.--1. "LDOSTATUS,Reads the LDOSTATUS bits" "0,1,2,3" line.long 0x28 "AD_INTERFACE_REG1,Analog To Digital Interface Register" bitfld.long 0x28 31. "USE_AD_DATA_REG,Override for bits 29-30" "Disabled,Enabled" bitfld.long 0x28 30. "HS_TX_DATA,HS TX data" "0,1" newline bitfld.long 0x28 29. "FS_TX_DATA,FS TX data" "0,1" bitfld.long 0x28 28. "TEST_PRE_EN_CNTRL,Override for bits 25-27" "Disabled,Enabled" newline bitfld.long 0x28 27. "SQ_PRE_EN,SQ PRE enable" "Disabled,Enabled" bitfld.long 0x28 25. "HS_TX_PRE_EN,HS TX PRE enable" "Disabled,Enabled" newline bitfld.long 0x28 24. "TEST_EN_CNTRL,Override for bits 19-23" "Disabled,Enabled" bitfld.long 0x28 23. "HS_TX_EN,HS TX enable" "Disabled,Enabled" newline bitfld.long 0x28 22. "FS_RX_EN,FS RX enable" "Disabled,Enabled" bitfld.long 0x28 20. "SQ_EN,SQ enable" "Disabled,Enabled" newline bitfld.long 0x28 19. "HS_RX_EN,HS RX elnable" "Disabled,Enabled" bitfld.long 0x28 18. "TEST_HS_MODE,Override for bits 16-17" "Disabled,Enabled" newline bitfld.long 0x28 17. "HS_HV_SW,HS HV SW" "0,1" bitfld.long 0x28 16. "HS_CHIRP,HS CHIRP" "0,1" newline bitfld.long 0x28 15. "TEST_FS_MODE,Override for bits 12-14" "Disabled,Enabled" bitfld.long 0x28 14. "FSTX_GZ,FSTX_GX" "0,1" newline bitfld.long 0x28 13. "FSTX_PRE_EN,FSTX PRE enable" "Disabled,Enabled" bitfld.long 0x28 11. "TEST_SQ_CAL_CONTROL,Override for bits 8-10" "Disabled,Enabled" newline bitfld.long 0x28 10. "SQ_CAL_EN3,SQ CAL enable" "Disabled,Enabled" bitfld.long 0x28 9. "SQ_CAL_EN2,SQ CAL enable" "Disabled,Enabled" newline bitfld.long 0x28 8. "SQ_CAL_EN1,SQ CAL enable" "Disabled,Enabled" bitfld.long 0x28 7. "TEST_RTERM_CAL_CONTROL,Override for bit 6" "Disabled,Enabled" newline bitfld.long 0x28 6. "RTERM_CAL_EN,RTERM CAL enable" "Disabled,Enabled" rbitfld.long 0x28 5. "DLL_RX_DATA,DLL RX data" "0,1" newline rbitfld.long 0x28 4. "DISCON_DETECT,DISCON_DETECT" "0,1" bitfld.long 0x28 3. "USE_LSHOST_REG,Use bit 2 for this reg" "Disabled,Enabled" newline bitfld.long 0x28 2. "LSHOSTMODE,LSHOSTMODE" "0,1" rbitfld.long 0x28 1. "LSFS_RX_DATA,LSFS RX data" "0,1" newline rbitfld.long 0x28 0. "SQUELCH,SQUELCH" "0,1" line.long 0x2C "AD_INTERFACE_REG2,Analog To Digital Interface Register" bitfld.long 0x2C 31. "USE_SUSP_DRV_REG,Use bits 27-30 from this register as overrides" "Disabled,Enabled" bitfld.long 0x2C 30. "SUS_DRV_DP_DATA,SUS DRV DP data" "0,1" newline bitfld.long 0x2C 29. "SUS_DRV_DP_EN,SUS DRV DP enable" "Disabled,Enabled" bitfld.long 0x2C 28. "SUS_DRV_DM_DATA,SUS DRV DM data" "0,1" newline bitfld.long 0x2C 27. "SUS_DRV_DM_EN,SUS DRV DM enable" "Disabled,Enabled" bitfld.long 0x2C 26. "USE_SUSP_DRV_REG,Use bits 24-25 from this register as overrides" "Disabled,Enabled" newline bitfld.long 0x2C 25. "DISCON_EN,DISCON enable" "Disabled,Enabled" bitfld.long 0x2C 24. "DISCON_PRE_EN,DISCON PRE enable" "Disabled,Enabled" newline rbitfld.long 0x2C 18.--22. "SPARE_OUT_CORE,SPARE_OUT_CORE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x2C 17. "SERX_DP_CORE,SERX_DP_CORE" "0,1" newline rbitfld.long 0x2C 16. "SERX_DM_CORE,SERX_DM_CORE" "0,1" bitfld.long 0x2C 15. "USE_SUSP_DRV_REG,Use bits 14 from this register as overrides" "Disabled,Enabled" newline bitfld.long 0x2C 14. "HSRX_CAL_EN,HSRX CAL enable" "Disabled,Enabled" bitfld.long 0x2C 13. "USE_RPU_RPD_REG,Use bits 7-12 from this register as overrides" "Disabled,Enabled" newline bitfld.long 0x2C 12. "RPU_DP_SW1_EN_CORE,RPU_DP_SW1_EN_CORE" "Disabled,Enabled" bitfld.long 0x2C 11. "RPU_DP_SW2_EN_CORE,RPU_DP_SW2_EN_CORE" "Disabled,Enabled" newline bitfld.long 0x2C 10. "RPU_DM_SW2_EN_COR,RPU_DM_SW2_EN_COR" "Disabled,Enabled" bitfld.long 0x2C 9. "RPU_DM_SW2_EN_COR,RPU_DM_SW2_EN_COR" "Disabled,Enabled" newline bitfld.long 0x2C 8. "DP_PULLDOWN_EN_CORE,DP pulldown enable core" "Disabled,Enabled" bitfld.long 0x2C 7. "DM_PULLDOWN_EN_CORE,DM pulldown enable core" "Disabled,Enabled" newline rbitfld.long 0x2C 6. "DP_DM_5V_SHORT,DP_DM_5V_SHORT" "0,1" bitfld.long 0x2C 1.--5. "SPARE_IN_CORE,SPARE_IN_CORE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x2C 0. "PORZ,PORZ" "0,1" line.long 0x30 "AD_INTERFACE_REG3,Analog To Digital Interface Register" bitfld.long 0x30 31. "USE_HSOS_DATA_REG,Use bits 30-23 as bypass bits" "Disabled,Enabled" hexmask.long.byte 0x30 23.--30. 1. "HSOS_DATA,HSOS data" newline bitfld.long 0x30 22. "USE_FS_REG3,Use bits 20-21 as bypass bits" "Disabled,Enabled" bitfld.long 0x30 21. "FSTX_MODE,FSTX_MODE" "0,1" newline bitfld.long 0x30 20. "FSTX_SE0,FSTX_SE0" "0,1" bitfld.long 0x30 19. "USE_HS_TERM_RES_REG,Use bit 18 as override bit" "Disabled,Enabled" newline bitfld.long 0x30 18. "HS_TERM_RES,HS_TERM_RES" "0,1" hexmask.long.byte 0x30 10.--17. 1. "SPARE_IN_LDO,SPARE_IN_LDO" newline hexmask.long.byte 0x30 2.--9. 1. "SPARE_OUT_LDO,SPARE_OUT_LDO" bitfld.long 0x30 1. "USE_FARCORE_REG,Use bit 0 as override bit" "Disabled,Enabled" newline bitfld.long 0x30 0. "FARCORE,FARCORE" "0,1" group.long 0x54++0x03 line.long 0x00 "ANA_CONFIG2,Debug The Analog Blocks Configuration Register" hexmask.long.byte 0x00 20.--26. 1. "REF_GEN_TEST,REF_GEN_TEST" bitfld.long 0x00 15.--17. "RTERM_TEST,Termination impedance test" "Typical,,,Decreased,?..." tree.end tree.end tree "CPPI_DMA" base ad:0x47402000 rgroup.long 0x00++0x03 line.long 0x00 "DMAREVID,DMA Revision" hexmask.long.word 0x00 16.--29. 1. "MODID,Module ID field" bitfld.long 0x00 11.--15. "REVRTL,RTL revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "REVMAJ,Major revision" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 0.--7. 1. "REVMIN,Minor revision" group.long 0x04++0x07 line.long 0x00 "TDFDQ,Teardown Free Descriptor Queue Control Register" bitfld.long 0x00 12.--13. "TD_DESC_QMGR,Teardown desctriptor queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TD_DESC_QNUM,Teardown desctriptor queqe number" line.long 0x04 "DMAEMU,Emulation Control Register" bitfld.long 0x04 1. "SOFT,Control for emulation pause request" "Not forced,Forced" bitfld.long 0x04 0. "FREE,Enable for emulation suspend" "Disabled,Enabled" group.long 0x800++0x03 line.long 0x00 "TXGCR0,Tx Channel 0 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0x800+0x08)++0x03 line.long 0x00 "RXGCR0,Rx Channel 0 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0x800+0x0C)++0x07 line.long 0x00 "RXHPCRA0,Rx Channel 0 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB0,Rx Channel 0 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0x820++0x03 line.long 0x00 "TXGCR1,Tx Channel 1 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0x820+0x08)++0x03 line.long 0x00 "RXGCR1,Rx Channel 1 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0x820+0x0C)++0x07 line.long 0x00 "RXHPCRA1,Rx Channel 1 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB1,Rx Channel 1 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0x840++0x03 line.long 0x00 "TXGCR2,Tx Channel 2 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0x840+0x08)++0x03 line.long 0x00 "RXGCR2,Rx Channel 2 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0x840+0x0C)++0x07 line.long 0x00 "RXHPCRA2,Rx Channel 2 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB2,Rx Channel 2 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0x860++0x03 line.long 0x00 "TXGCR3,Tx Channel 3 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0x860+0x08)++0x03 line.long 0x00 "RXGCR3,Rx Channel 3 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0x860+0x0C)++0x07 line.long 0x00 "RXHPCRA3,Rx Channel 3 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB3,Rx Channel 3 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0x880++0x03 line.long 0x00 "TXGCR4,Tx Channel 4 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0x880+0x08)++0x03 line.long 0x00 "RXGCR4,Rx Channel 4 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0x880+0x0C)++0x07 line.long 0x00 "RXHPCRA4,Rx Channel 4 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB4,Rx Channel 4 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0x8A0++0x03 line.long 0x00 "TXGCR5,Tx Channel 5 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0x8A0+0x08)++0x03 line.long 0x00 "RXGCR5,Rx Channel 5 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0x8A0+0x0C)++0x07 line.long 0x00 "RXHPCRA5,Rx Channel 5 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB5,Rx Channel 5 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0x8C0++0x03 line.long 0x00 "TXGCR6,Tx Channel 6 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0x8C0+0x08)++0x03 line.long 0x00 "RXGCR6,Rx Channel 6 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0x8C0+0x0C)++0x07 line.long 0x00 "RXHPCRA6,Rx Channel 6 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB6,Rx Channel 6 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0x8E0++0x03 line.long 0x00 "TXGCR7,Tx Channel 7 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0x8E0+0x08)++0x03 line.long 0x00 "RXGCR7,Rx Channel 7 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0x8E0+0x0C)++0x07 line.long 0x00 "RXHPCRA7,Rx Channel 7 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB7,Rx Channel 7 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0x900++0x03 line.long 0x00 "TXGCR8,Tx Channel 8 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0x900+0x08)++0x03 line.long 0x00 "RXGCR8,Rx Channel 8 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0x900+0x0C)++0x07 line.long 0x00 "RXHPCRA8,Rx Channel 8 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB8,Rx Channel 8 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0x920++0x03 line.long 0x00 "TXGCR9,Tx Channel 9 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0x920+0x08)++0x03 line.long 0x00 "RXGCR9,Rx Channel 9 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0x920+0x0C)++0x07 line.long 0x00 "RXHPCRA9,Rx Channel 9 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB9,Rx Channel 9 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0x940++0x03 line.long 0x00 "TXGCR10,Tx Channel 10 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0x940+0x08)++0x03 line.long 0x00 "RXGCR10,Rx Channel 10 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0x940+0x0C)++0x07 line.long 0x00 "RXHPCRA10,Rx Channel 10 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB10,Rx Channel 10 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0x960++0x03 line.long 0x00 "TXGCR11,Tx Channel 11 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0x960+0x08)++0x03 line.long 0x00 "RXGCR11,Rx Channel 11 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0x960+0x0C)++0x07 line.long 0x00 "RXHPCRA11,Rx Channel 11 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB11,Rx Channel 11 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0x980++0x03 line.long 0x00 "TXGCR12,Tx Channel 12 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0x980+0x08)++0x03 line.long 0x00 "RXGCR12,Rx Channel 12 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0x980+0x0C)++0x07 line.long 0x00 "RXHPCRA12,Rx Channel 12 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB12,Rx Channel 12 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0x9A0++0x03 line.long 0x00 "TXGCR13,Tx Channel 13 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0x9A0+0x08)++0x03 line.long 0x00 "RXGCR13,Rx Channel 13 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0x9A0+0x0C)++0x07 line.long 0x00 "RXHPCRA13,Rx Channel 13 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB13,Rx Channel 13 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0x9C0++0x03 line.long 0x00 "TXGCR14,Tx Channel 14 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0x9C0+0x08)++0x03 line.long 0x00 "RXGCR14,Rx Channel 14 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0x9C0+0x0C)++0x07 line.long 0x00 "RXHPCRA14,Rx Channel 14 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB14,Rx Channel 14 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0x9E0++0x03 line.long 0x00 "TXGCR15,Tx Channel 15 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0x9E0+0x08)++0x03 line.long 0x00 "RXGCR15,Rx Channel 15 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0x9E0+0x0C)++0x07 line.long 0x00 "RXHPCRA15,Rx Channel 15 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB15,Rx Channel 15 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0xA00++0x03 line.long 0x00 "TXGCR16,Tx Channel 16 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0xA00+0x08)++0x03 line.long 0x00 "RXGCR16,Rx Channel 16 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0xA00+0x0C)++0x07 line.long 0x00 "RXHPCRA16,Rx Channel 16 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB16,Rx Channel 16 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0xA20++0x03 line.long 0x00 "TXGCR17,Tx Channel 17 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0xA20+0x08)++0x03 line.long 0x00 "RXGCR17,Rx Channel 17 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0xA20+0x0C)++0x07 line.long 0x00 "RXHPCRA17,Rx Channel 17 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB17,Rx Channel 17 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0xA40++0x03 line.long 0x00 "TXGCR18,Tx Channel 18 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0xA40+0x08)++0x03 line.long 0x00 "RXGCR18,Rx Channel 18 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0xA40+0x0C)++0x07 line.long 0x00 "RXHPCRA18,Rx Channel 18 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB18,Rx Channel 18 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0xA60++0x03 line.long 0x00 "TXGCR19,Tx Channel 19 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0xA60+0x08)++0x03 line.long 0x00 "RXGCR19,Rx Channel 19 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0xA60+0x0C)++0x07 line.long 0x00 "RXHPCRA19,Rx Channel 19 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB19,Rx Channel 19 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0xA80++0x03 line.long 0x00 "TXGCR20,Tx Channel 20 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0xA80+0x08)++0x03 line.long 0x00 "RXGCR20,Rx Channel 20 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0xA80+0x0C)++0x07 line.long 0x00 "RXHPCRA20,Rx Channel 20 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB20,Rx Channel 20 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0xAA0++0x03 line.long 0x00 "TXGCR21,Tx Channel 21 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0xAA0+0x08)++0x03 line.long 0x00 "RXGCR21,Rx Channel 21 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0xAA0+0x0C)++0x07 line.long 0x00 "RXHPCRA21,Rx Channel 21 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB21,Rx Channel 21 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0xAC0++0x03 line.long 0x00 "TXGCR22,Tx Channel 22 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0xAC0+0x08)++0x03 line.long 0x00 "RXGCR22,Rx Channel 22 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0xAC0+0x0C)++0x07 line.long 0x00 "RXHPCRA22,Rx Channel 22 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB22,Rx Channel 22 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0xAE0++0x03 line.long 0x00 "TXGCR23,Tx Channel 23 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0xAE0+0x08)++0x03 line.long 0x00 "RXGCR23,Rx Channel 23 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0xAE0+0x0C)++0x07 line.long 0x00 "RXHPCRA23,Rx Channel 23 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB23,Rx Channel 23 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0xB00++0x03 line.long 0x00 "TXGCR24,Tx Channel 24 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0xB00+0x08)++0x03 line.long 0x00 "RXGCR24,Rx Channel 24 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0xB00+0x0C)++0x07 line.long 0x00 "RXHPCRA24,Rx Channel 24 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB24,Rx Channel 24 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0xB20++0x03 line.long 0x00 "TXGCR25,Tx Channel 25 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0xB20+0x08)++0x03 line.long 0x00 "RXGCR25,Rx Channel 25 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0xB20+0x0C)++0x07 line.long 0x00 "RXHPCRA25,Rx Channel 25 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB25,Rx Channel 25 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0xB40++0x03 line.long 0x00 "TXGCR26,Tx Channel 26 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0xB40+0x08)++0x03 line.long 0x00 "RXGCR26,Rx Channel 26 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0xB40+0x0C)++0x07 line.long 0x00 "RXHPCRA26,Rx Channel 26 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB26,Rx Channel 26 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0xB60++0x03 line.long 0x00 "TXGCR27,Tx Channel 27 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0xB60+0x08)++0x03 line.long 0x00 "RXGCR27,Rx Channel 27 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0xB60+0x0C)++0x07 line.long 0x00 "RXHPCRA27,Rx Channel 27 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB27,Rx Channel 27 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0xB80++0x03 line.long 0x00 "TXGCR28,Tx Channel 28 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0xB80+0x08)++0x03 line.long 0x00 "RXGCR28,Rx Channel 28 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0xB80+0x0C)++0x07 line.long 0x00 "RXHPCRA28,Rx Channel 28 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB28,Rx Channel 28 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" group.long 0xBA0++0x03 line.long 0x00 "TXGCR29,Tx Channel 29 Global Configuration Registers" bitfld.long 0x00 31. "TX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "TX_TEARDOWN,Channel teardown" "In progress,Done" newline bitfld.long 0x00 12.--13. "TX_DEFAULT_QMGR,Default queue manager number" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "TX_DEFAULT_QNUM,Default queue number" group.long (0xBA0+0x08)++0x03 line.long 0x00 "RXGCR29,Rx Channel 29 Global Configuration Registers" bitfld.long 0x00 31. "RX_ENABLE,Channel enable" "Diabled,Enabled" bitfld.long 0x00 30. "RX_TEARDOWN,Channel enable" "In progress,Done" newline bitfld.long 0x00 29. "RX_PAUSE,RX pause request" "Not requested,Requested" bitfld.long 0x00 24. "RX_ERROR_HANDLING,RX error handling" "While droping,While retry" newline hexmask.long.byte 0x00 16.--23. 1. "RX_SOP_OFFSET,RX SOP offset" bitfld.long 0x00 14.--15. "RX_DEFAULT_DESC_TYPE,RX default descriptor" ",Host,?..." newline bitfld.long 0x00 12.--13. "RX_DEFAULT_RQ_QMGR,RX default receive queue manager" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_DEFAULT_RQ_QNUM,RX default receive queue" wgroup.long (0xBA0+0x0C)++0x07 line.long 0x00 "RXHPCRA29,Rx Channel 29 Host Packet Configuration Registers A" bitfld.long 0x00 28.--29. "RX_HOST_FDQ1_QMGR,Buffer manager used for 2nd rx buffer select" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "RX_HOST_FDQ1_QNUM,Free descriptor / buffer pool used for 2nd rx buffer" newline bitfld.long 0x00 12.--13. "RX_HOST_FDQ0_QMGR,Buffer manager used for 1st rx buffer select" "0,1,2,3" hexmask.long.word 0x00 0.--11. 1. "RX_HOST_FDQ0_QNUM,Free descriptor / buffer pool used for 1st rx buffer" line.long 0x04 "RXHPCRB29,Rx Channel 29 Host Packet Configuration Registers B" bitfld.long 0x04 28.--29. "RX_HOST_FDQ3_QMGR,Buffer manager used for 4th or later rx buffer select" "0,1,2,3" hexmask.long.word 0x04 16.--27. 1. "RX_HOST_FDQ3_QNUM,Free descriptor / buffer pool used for 4th or later rx buffer" newline bitfld.long 0x04 12.--13. "RX_HOST_FDQ2_QMGR,Buffer manager used for 3rd rx buffer select" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "RX_HOST_FDQ2_QNUM,Free descriptor / buffer pool used for 3rd rx buffer" tree.end tree "CPPI_DMA_SCHEDULER" base ad:0x47403000 group.long 0x00++0x03 line.long 0x00 "DMA_SCHED_CTRL,DMA Scheduler Control Register" bitfld.long 0x00 31. "ENABLE,Scheduler enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. "LAST_ENTRY,Indicates the last valid entry in the scheduler table" group.long 0x800++0x03 line.long 0x00 "WORD0,WORD0 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x804++0x03 line.long 0x00 "WORD1,WORD1 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x808++0x03 line.long 0x00 "WORD2,WORD2 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x80C++0x03 line.long 0x00 "WORD3,WORD3 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x810++0x03 line.long 0x00 "WORD4,WORD4 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x814++0x03 line.long 0x00 "WORD5,WORD5 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x818++0x03 line.long 0x00 "WORD6,WORD6 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x81C++0x03 line.long 0x00 "WORD7,WORD7 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x820++0x03 line.long 0x00 "WORD8,WORD8 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x824++0x03 line.long 0x00 "WORD9,WORD9 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x828++0x03 line.long 0x00 "WORD10,WORD10 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x82C++0x03 line.long 0x00 "WORD11,WORD11 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x830++0x03 line.long 0x00 "WORD12,WORD12 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x834++0x03 line.long 0x00 "WORD13,WORD13 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x838++0x03 line.long 0x00 "WORD14,WORD14 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x83C++0x03 line.long 0x00 "WORD15,WORD15 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x840++0x03 line.long 0x00 "WORD16,WORD16 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x844++0x03 line.long 0x00 "WORD17,WORD17 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x848++0x03 line.long 0x00 "WORD18,WORD18 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x84C++0x03 line.long 0x00 "WORD19,WORD19 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x850++0x03 line.long 0x00 "WORD20,WORD20 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x854++0x03 line.long 0x00 "WORD21,WORD21 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x858++0x03 line.long 0x00 "WORD22,WORD22 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x85C++0x03 line.long 0x00 "WORD23,WORD23 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x860++0x03 line.long 0x00 "WORD24,WORD24 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x864++0x03 line.long 0x00 "WORD25,WORD25 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x868++0x03 line.long 0x00 "WORD26,WORD26 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x86C++0x03 line.long 0x00 "WORD27,WORD27 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x870++0x03 line.long 0x00 "WORD28,WORD28 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x874++0x03 line.long 0x00 "WORD29,WORD29 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x878++0x03 line.long 0x00 "WORD30,WORD30 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x87C++0x03 line.long 0x00 "WORD31,WORD31 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x880++0x03 line.long 0x00 "WORD32,WORD32 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x884++0x03 line.long 0x00 "WORD33,WORD33 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x888++0x03 line.long 0x00 "WORD34,WORD34 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x88C++0x03 line.long 0x00 "WORD35,WORD35 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x890++0x03 line.long 0x00 "WORD36,WORD36 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x894++0x03 line.long 0x00 "WORD37,WORD37 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x898++0x03 line.long 0x00 "WORD38,WORD38 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x89C++0x03 line.long 0x00 "WORD39,WORD39 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8A0++0x03 line.long 0x00 "WORD40,WORD40 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8A4++0x03 line.long 0x00 "WORD41,WORD41 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8A8++0x03 line.long 0x00 "WORD42,WORD42 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8AC++0x03 line.long 0x00 "WORD43,WORD43 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8B0++0x03 line.long 0x00 "WORD44,WORD44 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8B4++0x03 line.long 0x00 "WORD45,WORD45 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8B8++0x03 line.long 0x00 "WORD46,WORD46 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8BC++0x03 line.long 0x00 "WORD47,WORD47 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8C0++0x03 line.long 0x00 "WORD48,WORD48 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8C4++0x03 line.long 0x00 "WORD49,WORD49 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8C8++0x03 line.long 0x00 "WORD50,WORD50 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8CC++0x03 line.long 0x00 "WORD51,WORD51 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8D0++0x03 line.long 0x00 "WORD52,WORD52 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8D4++0x03 line.long 0x00 "WORD53,WORD53 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8D8++0x03 line.long 0x00 "WORD54,WORD54 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8DC++0x03 line.long 0x00 "WORD55,WORD55 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8E0++0x03 line.long 0x00 "WORD56,WORD56 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8E4++0x03 line.long 0x00 "WORD57,WORD57 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8E8++0x03 line.long 0x00 "WORD58,WORD58 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8EC++0x03 line.long 0x00 "WORD59,WORD59 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8F0++0x03 line.long 0x00 "WORD60,WORD60 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8F4++0x03 line.long 0x00 "WORD61,WORD61 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8F8++0x03 line.long 0x00 "WORD62,WORD62 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x8FC++0x03 line.long 0x00 "WORD63,WORD63 Register" bitfld.long 0x00 31. "ENTRY3_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 24.--28. "ENTRY3_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 23. "ENTRY2_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 16.--20. "ENTRY2_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "ENTRY1_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 8.--12. "ENTRY1_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 7. "ENTRY0_RXTX,Indicates if this entry is for a tx or an rx channel and is encoded" "Tx channel,Rx channel" bitfld.long 0x00 0.--4. "ENTRY0_CHANNEL,Indicates the channel number that is to be given an opportunity to transfer data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end tree "QUEUE_MGR (USB Queue Manager)" base ad:0x47404000 rgroup.long 0x00++0x03 line.long 0x00 "QMGRREVID,Queue Manager Revision Register" bitfld.long 0x00 30.--31. "SCHEME,Scheme" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "FUNCTION,Function" bitfld.long 0x00 11.--15. "REVRTL,RTL revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "REVMAJ,Major revision" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "REVCUSTOM,Custom revision" "0,1,2,3" bitfld.long 0x00 0.--5. "REVMIN,Minor revision queue manager revision register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" wgroup.long 0x08++0x03 line.long 0x00 "QMGRRST,Queue Manager Queue Diversion Register" bitfld.long 0x00 31. "HEAD_TAIL,Queqe content merge" "Head,Tail" hexmask.long.word 0x00 16.--29. 1. "DEST_QNUM,Destination queue number" hexmask.long.word 0x00 0.--13. 1. "SOURCE_QNUM,Source queue number" rgroup.long 0x20++0x0B line.long 0x00 "FDBSC0,Free Descriptor Buffer Starvation Count Register 0" hexmask.long.byte 0x00 24.--31. 1. "FDBQ3_STARVE_CNT,Free descriptor/buffer queue 3 counter" hexmask.long.byte 0x00 16.--23. 1. "FDBQ2_STARVE_CNT,Free descriptor/buffer queue 2 counter" hexmask.long.byte 0x00 8.--15. 1. "FDBQ1_STARVE_CNT,Free descriptor/buffer queue 1 counter" newline hexmask.long.byte 0x00 0.--7. 1. "FDBQ0_STARVE_CNT,Free descriptor/buffer queue 0 counter" line.long 0x04 "FDBSC1,Free Descriptor Buffer Starvation Count Register 1" hexmask.long.byte 0x04 24.--31. 1. "FDBQ7_STARVE_CNT,Free descriptor/buffer queue 7 counter" hexmask.long.byte 0x04 16.--23. 1. "FDBQ6_STARVE_CNT,Free descriptor/buffer queue 6 counter" hexmask.long.byte 0x04 8.--15. 1. "FDBQ5_STARVE_CNT,Free descriptor/buffer queue 5 counter" newline hexmask.long.byte 0x04 0.--7. 1. "FDBQ4_STARVE_CNT,Free descriptor/buffer queue 4 counter" line.long 0x08 "FDBSC2,Free Descriptor Buffer Starvation Count Register 2" hexmask.long.byte 0x08 24.--31. 1. "FDBQ11_STARVE_CNT,Free descriptor/buffer queue 11 counter" hexmask.long.byte 0x08 16.--23. 1. "FDBQ10_STARVE_CNT,Free descriptor/buffer queue 10 counter" hexmask.long.byte 0x08 8.--15. 1. "FDBQ9_STARVE_CNT,Free descriptor/buffer queue 9 counter" newline hexmask.long.byte 0x08 0.--7. 1. "FDBQ8_STARVE_CNT,Free descriptor/buffer queue 8 counter" rgroup.long 0x2C++0x03 line.long 0x00 "FDBSC3,Free Descriptor Buffer Starvation Count Register 3" hexmask.long.byte 0x00 24.--31. 1. "FDBQ15_STARVE_CNT,Free descriptor/buffer queue 15 counter" hexmask.long.byte 0x00 16.--23. 1. "FDBQ14_STARVE_CNT,Free descriptor/buffer queue 14 counter" hexmask.long.byte 0x00 8.--15. 1. "FDBQ13_STARVE_CNT,Free descriptor/buffer queue 13 counter" newline hexmask.long.byte 0x00 0.--7. 1. "FDBQ12_STARVE_CNT,Free descriptor/buffer queue 12 counter" rgroup.long 0x30++0x03 line.long 0x00 "FDBSC4,Free Descriptor Buffer Starvation Count Register 4" hexmask.long.byte 0x00 24.--31. 1. "FDBQ19_STARVE_CNT,Free descriptor/buffer queue 19 counter" hexmask.long.byte 0x00 16.--23. 1. "FDBQ18_STARVE_CNT,Free descriptor/buffer queue 18 counter" hexmask.long.byte 0x00 8.--15. 1. "FDBQ17_STARVE_CNT,Free descriptor/buffer queue 17 counter" newline hexmask.long.byte 0x00 0.--7. 1. "FDBQ16_STARVE_CNT,Free descriptor/buffer queue 16 counter" rgroup.long 0x34++0x03 line.long 0x00 "FDBSC5,Free Descriptor Buffer Starvation Count Register 5" hexmask.long.byte 0x00 24.--31. 1. "FDBQ23_STARVE_CNT,Free descriptor/buffer queue 23 counter" hexmask.long.byte 0x00 16.--23. 1. "FDBQ22_STARVE_CNT,Free descriptor/buffer queue 22 counter" hexmask.long.byte 0x00 8.--15. 1. "FDBQ21_STARVE_CNT,Free descriptor/buffer queue 21 counter" newline hexmask.long.byte 0x00 0.--7. 1. "FDBQ20_STARVE_CNT,Free descriptor/buffer queue 20 counter" rgroup.long 0x38++0x03 line.long 0x00 "FDBSC6,Free Descriptor Buffer Starvation Count Register 6" hexmask.long.byte 0x00 24.--31. 1. "FDBQ27_STARVE_CNT,Free descriptor/buffer queue 27 counter" hexmask.long.byte 0x00 16.--23. 1. "FDBQ26_STARVE_CNT,Free descriptor/buffer queue 26 counter" hexmask.long.byte 0x00 8.--15. 1. "FDBQ25_STARVE_CNT,Free descriptor/buffer queue 25 counter" newline hexmask.long.byte 0x00 0.--7. 1. "FDBQ24_STARVE_CNT,Free descriptor/buffer queue 24 counter" rgroup.long 0x3C++0x03 line.long 0x00 "FDBSC7,Free Descriptor Buffer Starvation Count Register 7" hexmask.long.byte 0x00 24.--31. 1. "FDBQ31_STARVE_CNT,Free descriptor/buffer queue 31 counter" hexmask.long.byte 0x00 16.--23. 1. "FDBQ30_STARVE_CNT,Free descriptor/buffer queue 30 counter" hexmask.long.byte 0x00 8.--15. 1. "FDBQ29_STARVE_CNT,Free descriptor/buffer queue 29 counter" newline hexmask.long.byte 0x00 0.--7. 1. "FDBQ28_STARVE_CNT,Free descriptor/buffer queue 28 counter" group.long 0x80++0x0B line.long 0x00 "LRAM0BASE,Linking Ram Region 0 Base Register" hexmask.long 0x00 2.--31. 0x04 "REGION0_BASE,Base address" line.long 0x04 "LRAM0SIZE,Linking Ram Region 0 Size Register" hexmask.long.word 0x04 0.--13. 1. "REGION0_SIZE,Number of entries contained in the linking RAM region 0" line.long 0x08 "LRAM1BASE,Linking Ram Region 1 Base Register" hexmask.long 0x08 2.--31. 0x04 "REGION1_BASE,Base address" rgroup.long 0x90++0x03 line.long 0x00 "PEND0,Queue Pending 0 Register 0" rgroup.long 0x94++0x03 line.long 0x00 "PEND1,Queue Pending 1 Register 1" rgroup.long 0x98++0x03 line.long 0x00 "PEND2,Queue Pending 2 Register 2" rgroup.long 0x9C++0x03 line.long 0x00 "PEND3,Queue Pending 3 Register 3" rgroup.long 0xA0++0x03 line.long 0x00 "PEND4,Queue Pending 4 Register 4" group.long 0x1000++0x07 line.long 0x00 "QMEMRBASE0,Queue Memory Base Register 0" hexmask.long 0x00 5.--31. 0x20 "REG,Base address of the memory region R" line.long 0x04 "QMEMCTRL0,Queue Memory Control Register 0" hexmask.long.word 0x04 16.--29. 1. "START_INDEX,Start index" bitfld.long 0x04 8.--11. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--2. "REG_SIZE,Region size" "0,1,2,3,4,5,6,7" group.long 0x1010++0x07 line.long 0x00 "QMEMRBASE1,Queue Memory Base Register 1" hexmask.long 0x00 5.--31. 0x20 "REG,Base address of the memory region R" line.long 0x04 "QMEMCTRL1,Queue Memory Control Register 1" hexmask.long.word 0x04 16.--29. 1. "START_INDEX,Start index" bitfld.long 0x04 8.--11. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--2. "REG_SIZE,Region size" "0,1,2,3,4,5,6,7" group.long 0x1020++0x07 line.long 0x00 "QMEMRBASE2,Queue Memory Base Register 2" hexmask.long 0x00 5.--31. 0x20 "REG,Base address of the memory region R" line.long 0x04 "QMEMCTRL2,Queue Memory Control Register 2" hexmask.long.word 0x04 16.--29. 1. "START_INDEX,Start index" bitfld.long 0x04 8.--11. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--2. "REG_SIZE,Region size" "0,1,2,3,4,5,6,7" group.long 0x1030++0x07 line.long 0x00 "QMEMRBASE3,Queue Memory Base Register 3" hexmask.long 0x00 5.--31. 0x20 "REG,Base address of the memory region R" line.long 0x04 "QMEMCTRL3,Queue Memory Control Register 3" hexmask.long.word 0x04 16.--29. 1. "START_INDEX,Start index" bitfld.long 0x04 8.--11. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--2. "REG_SIZE,Region size" "0,1,2,3,4,5,6,7" group.long 0x1040++0x07 line.long 0x00 "QMEMRBASE4,Queue Memory Base Register 4" hexmask.long 0x00 5.--31. 0x20 "REG,Base address of the memory region R" line.long 0x04 "QMEMCTRL4,Queue Memory Control Register 4" hexmask.long.word 0x04 16.--29. 1. "START_INDEX,Start index" bitfld.long 0x04 8.--11. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--2. "REG_SIZE,Region size" "0,1,2,3,4,5,6,7" group.long 0x1050++0x07 line.long 0x00 "QMEMRBASE5,Queue Memory Base Register 5" hexmask.long 0x00 5.--31. 0x20 "REG,Base address of the memory region R" line.long 0x04 "QMEMCTRL5,Queue Memory Control Register 5" hexmask.long.word 0x04 16.--29. 1. "START_INDEX,Start index" bitfld.long 0x04 8.--11. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--2. "REG_SIZE,Region size" "0,1,2,3,4,5,6,7" group.long 0x1060++0x07 line.long 0x00 "QMEMRBASE6,Queue Memory Base Register 6" hexmask.long 0x00 5.--31. 0x20 "REG,Base address of the memory region R" line.long 0x04 "QMEMCTRL6,Queue Memory Control Register 6" hexmask.long.word 0x04 16.--29. 1. "START_INDEX,Start index" bitfld.long 0x04 8.--11. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--2. "REG_SIZE,Region size" "0,1,2,3,4,5,6,7" group.long 0x1070++0x07 line.long 0x00 "QMEMRBASE7,Queue Memory Base Register 7" hexmask.long 0x00 5.--31. 0x20 "REG,Base address of the memory region R" line.long 0x04 "QMEMCTRL7,Queue Memory Control Register 7" hexmask.long.word 0x04 16.--29. 1. "START_INDEX,Start index" bitfld.long 0x04 8.--11. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--2. "REG_SIZE,Region size" "0,1,2,3,4,5,6,7" tree "Queue A B C D Registers" rgroup.long 0x2000++0x07 line.long 0x00 "QUEUE_0_A,Queue 0 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_0_B,Queue 0 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2000+0x08)++0x07 line.long 0x00 "QUEUE_0_C,Queue 0 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_0_D,Queue 0 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2010++0x07 line.long 0x00 "QUEUE_1_A,Queue 1 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_1_B,Queue 1 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2010+0x08)++0x07 line.long 0x00 "QUEUE_1_C,Queue 1 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_1_D,Queue 1 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2020++0x07 line.long 0x00 "QUEUE_2_A,Queue 2 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_2_B,Queue 2 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2020+0x08)++0x07 line.long 0x00 "QUEUE_2_C,Queue 2 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_2_D,Queue 2 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2030++0x07 line.long 0x00 "QUEUE_3_A,Queue 3 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_3_B,Queue 3 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2030+0x08)++0x07 line.long 0x00 "QUEUE_3_C,Queue 3 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_3_D,Queue 3 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2040++0x07 line.long 0x00 "QUEUE_4_A,Queue 4 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_4_B,Queue 4 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2040+0x08)++0x07 line.long 0x00 "QUEUE_4_C,Queue 4 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_4_D,Queue 4 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2050++0x07 line.long 0x00 "QUEUE_5_A,Queue 5 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_5_B,Queue 5 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2050+0x08)++0x07 line.long 0x00 "QUEUE_5_C,Queue 5 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_5_D,Queue 5 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2060++0x07 line.long 0x00 "QUEUE_6_A,Queue 6 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_6_B,Queue 6 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2060+0x08)++0x07 line.long 0x00 "QUEUE_6_C,Queue 6 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_6_D,Queue 6 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2070++0x07 line.long 0x00 "QUEUE_7_A,Queue 7 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_7_B,Queue 7 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2070+0x08)++0x07 line.long 0x00 "QUEUE_7_C,Queue 7 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_7_D,Queue 7 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2080++0x07 line.long 0x00 "QUEUE_8_A,Queue 8 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_8_B,Queue 8 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2080+0x08)++0x07 line.long 0x00 "QUEUE_8_C,Queue 8 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_8_D,Queue 8 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2090++0x07 line.long 0x00 "QUEUE_9_A,Queue 9 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_9_B,Queue 9 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2090+0x08)++0x07 line.long 0x00 "QUEUE_9_C,Queue 9 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_9_D,Queue 9 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x20A0++0x07 line.long 0x00 "QUEUE_10_A,Queue 10 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_10_B,Queue 10 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x20A0+0x08)++0x07 line.long 0x00 "QUEUE_10_C,Queue 10 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_10_D,Queue 10 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x20B0++0x07 line.long 0x00 "QUEUE_11_A,Queue 11 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_11_B,Queue 11 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x20B0+0x08)++0x07 line.long 0x00 "QUEUE_11_C,Queue 11 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_11_D,Queue 11 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x20C0++0x07 line.long 0x00 "QUEUE_12_A,Queue 12 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_12_B,Queue 12 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x20C0+0x08)++0x07 line.long 0x00 "QUEUE_12_C,Queue 12 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_12_D,Queue 12 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x20D0++0x07 line.long 0x00 "QUEUE_13_A,Queue 13 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_13_B,Queue 13 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x20D0+0x08)++0x07 line.long 0x00 "QUEUE_13_C,Queue 13 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_13_D,Queue 13 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x20E0++0x07 line.long 0x00 "QUEUE_14_A,Queue 14 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_14_B,Queue 14 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x20E0+0x08)++0x07 line.long 0x00 "QUEUE_14_C,Queue 14 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_14_D,Queue 14 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x20F0++0x07 line.long 0x00 "QUEUE_15_A,Queue 15 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_15_B,Queue 15 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x20F0+0x08)++0x07 line.long 0x00 "QUEUE_15_C,Queue 15 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_15_D,Queue 15 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2100++0x07 line.long 0x00 "QUEUE_16_A,Queue 16 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_16_B,Queue 16 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2100+0x08)++0x07 line.long 0x00 "QUEUE_16_C,Queue 16 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_16_D,Queue 16 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2110++0x07 line.long 0x00 "QUEUE_17_A,Queue 17 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_17_B,Queue 17 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2110+0x08)++0x07 line.long 0x00 "QUEUE_17_C,Queue 17 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_17_D,Queue 17 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2120++0x07 line.long 0x00 "QUEUE_18_A,Queue 18 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_18_B,Queue 18 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2120+0x08)++0x07 line.long 0x00 "QUEUE_18_C,Queue 18 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_18_D,Queue 18 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2130++0x07 line.long 0x00 "QUEUE_19_A,Queue 19 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_19_B,Queue 19 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2130+0x08)++0x07 line.long 0x00 "QUEUE_19_C,Queue 19 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_19_D,Queue 19 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2140++0x07 line.long 0x00 "QUEUE_20_A,Queue 20 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_20_B,Queue 20 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2140+0x08)++0x07 line.long 0x00 "QUEUE_20_C,Queue 20 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_20_D,Queue 20 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2150++0x07 line.long 0x00 "QUEUE_21_A,Queue 21 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_21_B,Queue 21 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2150+0x08)++0x07 line.long 0x00 "QUEUE_21_C,Queue 21 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_21_D,Queue 21 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2160++0x07 line.long 0x00 "QUEUE_22_A,Queue 22 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_22_B,Queue 22 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2160+0x08)++0x07 line.long 0x00 "QUEUE_22_C,Queue 22 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_22_D,Queue 22 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2170++0x07 line.long 0x00 "QUEUE_23_A,Queue 23 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_23_B,Queue 23 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2170+0x08)++0x07 line.long 0x00 "QUEUE_23_C,Queue 23 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_23_D,Queue 23 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2180++0x07 line.long 0x00 "QUEUE_24_A,Queue 24 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_24_B,Queue 24 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2180+0x08)++0x07 line.long 0x00 "QUEUE_24_C,Queue 24 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_24_D,Queue 24 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2190++0x07 line.long 0x00 "QUEUE_25_A,Queue 25 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_25_B,Queue 25 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2190+0x08)++0x07 line.long 0x00 "QUEUE_25_C,Queue 25 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_25_D,Queue 25 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x21A0++0x07 line.long 0x00 "QUEUE_26_A,Queue 26 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_26_B,Queue 26 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x21A0+0x08)++0x07 line.long 0x00 "QUEUE_26_C,Queue 26 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_26_D,Queue 26 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x21B0++0x07 line.long 0x00 "QUEUE_27_A,Queue 27 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_27_B,Queue 27 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x21B0+0x08)++0x07 line.long 0x00 "QUEUE_27_C,Queue 27 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_27_D,Queue 27 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x21C0++0x07 line.long 0x00 "QUEUE_28_A,Queue 28 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_28_B,Queue 28 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x21C0+0x08)++0x07 line.long 0x00 "QUEUE_28_C,Queue 28 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_28_D,Queue 28 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x21D0++0x07 line.long 0x00 "QUEUE_29_A,Queue 29 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_29_B,Queue 29 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x21D0+0x08)++0x07 line.long 0x00 "QUEUE_29_C,Queue 29 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_29_D,Queue 29 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x21E0++0x07 line.long 0x00 "QUEUE_30_A,Queue 30 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_30_B,Queue 30 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x21E0+0x08)++0x07 line.long 0x00 "QUEUE_30_C,Queue 30 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_30_D,Queue 30 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x21F0++0x07 line.long 0x00 "QUEUE_31_A,Queue 31 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_31_B,Queue 31 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x21F0+0x08)++0x07 line.long 0x00 "QUEUE_31_C,Queue 31 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_31_D,Queue 31 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2200++0x07 line.long 0x00 "QUEUE_32_A,Queue 32 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_32_B,Queue 32 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2200+0x08)++0x07 line.long 0x00 "QUEUE_32_C,Queue 32 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_32_D,Queue 32 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2210++0x07 line.long 0x00 "QUEUE_33_A,Queue 33 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_33_B,Queue 33 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2210+0x08)++0x07 line.long 0x00 "QUEUE_33_C,Queue 33 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_33_D,Queue 33 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2220++0x07 line.long 0x00 "QUEUE_34_A,Queue 34 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_34_B,Queue 34 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2220+0x08)++0x07 line.long 0x00 "QUEUE_34_C,Queue 34 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_34_D,Queue 34 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2230++0x07 line.long 0x00 "QUEUE_35_A,Queue 35 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_35_B,Queue 35 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2230+0x08)++0x07 line.long 0x00 "QUEUE_35_C,Queue 35 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_35_D,Queue 35 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2240++0x07 line.long 0x00 "QUEUE_36_A,Queue 36 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_36_B,Queue 36 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2240+0x08)++0x07 line.long 0x00 "QUEUE_36_C,Queue 36 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_36_D,Queue 36 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2250++0x07 line.long 0x00 "QUEUE_37_A,Queue 37 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_37_B,Queue 37 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2250+0x08)++0x07 line.long 0x00 "QUEUE_37_C,Queue 37 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_37_D,Queue 37 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2260++0x07 line.long 0x00 "QUEUE_38_A,Queue 38 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_38_B,Queue 38 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2260+0x08)++0x07 line.long 0x00 "QUEUE_38_C,Queue 38 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_38_D,Queue 38 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2270++0x07 line.long 0x00 "QUEUE_39_A,Queue 39 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_39_B,Queue 39 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2270+0x08)++0x07 line.long 0x00 "QUEUE_39_C,Queue 39 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_39_D,Queue 39 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2280++0x07 line.long 0x00 "QUEUE_40_A,Queue 40 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_40_B,Queue 40 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2280+0x08)++0x07 line.long 0x00 "QUEUE_40_C,Queue 40 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_40_D,Queue 40 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2290++0x07 line.long 0x00 "QUEUE_41_A,Queue 41 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_41_B,Queue 41 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2290+0x08)++0x07 line.long 0x00 "QUEUE_41_C,Queue 41 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_41_D,Queue 41 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x22A0++0x07 line.long 0x00 "QUEUE_42_A,Queue 42 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_42_B,Queue 42 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x22A0+0x08)++0x07 line.long 0x00 "QUEUE_42_C,Queue 42 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_42_D,Queue 42 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x22B0++0x07 line.long 0x00 "QUEUE_43_A,Queue 43 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_43_B,Queue 43 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x22B0+0x08)++0x07 line.long 0x00 "QUEUE_43_C,Queue 43 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_43_D,Queue 43 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x22C0++0x07 line.long 0x00 "QUEUE_44_A,Queue 44 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_44_B,Queue 44 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x22C0+0x08)++0x07 line.long 0x00 "QUEUE_44_C,Queue 44 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_44_D,Queue 44 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x22D0++0x07 line.long 0x00 "QUEUE_45_A,Queue 45 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_45_B,Queue 45 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x22D0+0x08)++0x07 line.long 0x00 "QUEUE_45_C,Queue 45 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_45_D,Queue 45 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x22E0++0x07 line.long 0x00 "QUEUE_46_A,Queue 46 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_46_B,Queue 46 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x22E0+0x08)++0x07 line.long 0x00 "QUEUE_46_C,Queue 46 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_46_D,Queue 46 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x22F0++0x07 line.long 0x00 "QUEUE_47_A,Queue 47 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_47_B,Queue 47 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x22F0+0x08)++0x07 line.long 0x00 "QUEUE_47_C,Queue 47 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_47_D,Queue 47 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2300++0x07 line.long 0x00 "QUEUE_48_A,Queue 48 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_48_B,Queue 48 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2300+0x08)++0x07 line.long 0x00 "QUEUE_48_C,Queue 48 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_48_D,Queue 48 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2310++0x07 line.long 0x00 "QUEUE_49_A,Queue 49 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_49_B,Queue 49 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2310+0x08)++0x07 line.long 0x00 "QUEUE_49_C,Queue 49 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_49_D,Queue 49 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2320++0x07 line.long 0x00 "QUEUE_50_A,Queue 50 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_50_B,Queue 50 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2320+0x08)++0x07 line.long 0x00 "QUEUE_50_C,Queue 50 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_50_D,Queue 50 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2330++0x07 line.long 0x00 "QUEUE_51_A,Queue 51 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_51_B,Queue 51 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2330+0x08)++0x07 line.long 0x00 "QUEUE_51_C,Queue 51 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_51_D,Queue 51 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2340++0x07 line.long 0x00 "QUEUE_52_A,Queue 52 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_52_B,Queue 52 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2340+0x08)++0x07 line.long 0x00 "QUEUE_52_C,Queue 52 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_52_D,Queue 52 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2350++0x07 line.long 0x00 "QUEUE_53_A,Queue 53 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_53_B,Queue 53 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2350+0x08)++0x07 line.long 0x00 "QUEUE_53_C,Queue 53 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_53_D,Queue 53 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2360++0x07 line.long 0x00 "QUEUE_54_A,Queue 54 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_54_B,Queue 54 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2360+0x08)++0x07 line.long 0x00 "QUEUE_54_C,Queue 54 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_54_D,Queue 54 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2370++0x07 line.long 0x00 "QUEUE_55_A,Queue 55 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_55_B,Queue 55 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2370+0x08)++0x07 line.long 0x00 "QUEUE_55_C,Queue 55 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_55_D,Queue 55 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2380++0x07 line.long 0x00 "QUEUE_56_A,Queue 56 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_56_B,Queue 56 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2380+0x08)++0x07 line.long 0x00 "QUEUE_56_C,Queue 56 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_56_D,Queue 56 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2390++0x07 line.long 0x00 "QUEUE_57_A,Queue 57 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_57_B,Queue 57 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2390+0x08)++0x07 line.long 0x00 "QUEUE_57_C,Queue 57 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_57_D,Queue 57 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x23A0++0x07 line.long 0x00 "QUEUE_58_A,Queue 58 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_58_B,Queue 58 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x23A0+0x08)++0x07 line.long 0x00 "QUEUE_58_C,Queue 58 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_58_D,Queue 58 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x23B0++0x07 line.long 0x00 "QUEUE_59_A,Queue 59 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_59_B,Queue 59 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x23B0+0x08)++0x07 line.long 0x00 "QUEUE_59_C,Queue 59 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_59_D,Queue 59 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x23C0++0x07 line.long 0x00 "QUEUE_60_A,Queue 60 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_60_B,Queue 60 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x23C0+0x08)++0x07 line.long 0x00 "QUEUE_60_C,Queue 60 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_60_D,Queue 60 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x23D0++0x07 line.long 0x00 "QUEUE_61_A,Queue 61 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_61_B,Queue 61 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x23D0+0x08)++0x07 line.long 0x00 "QUEUE_61_C,Queue 61 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_61_D,Queue 61 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x23E0++0x07 line.long 0x00 "QUEUE_62_A,Queue 62 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_62_B,Queue 62 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x23E0+0x08)++0x07 line.long 0x00 "QUEUE_62_C,Queue 62 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_62_D,Queue 62 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x23F0++0x07 line.long 0x00 "QUEUE_63_A,Queue 63 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_63_B,Queue 63 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x23F0+0x08)++0x07 line.long 0x00 "QUEUE_63_C,Queue 63 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_63_D,Queue 63 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2400++0x07 line.long 0x00 "QUEUE_64_A,Queue 64 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_64_B,Queue 64 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2400+0x08)++0x07 line.long 0x00 "QUEUE_64_C,Queue 64 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_64_D,Queue 64 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2410++0x07 line.long 0x00 "QUEUE_65_A,Queue 65 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_65_B,Queue 65 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2410+0x08)++0x07 line.long 0x00 "QUEUE_65_C,Queue 65 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_65_D,Queue 65 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2420++0x07 line.long 0x00 "QUEUE_66_A,Queue 66 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_66_B,Queue 66 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2420+0x08)++0x07 line.long 0x00 "QUEUE_66_C,Queue 66 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_66_D,Queue 66 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2430++0x07 line.long 0x00 "QUEUE_67_A,Queue 67 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_67_B,Queue 67 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2430+0x08)++0x07 line.long 0x00 "QUEUE_67_C,Queue 67 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_67_D,Queue 67 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2440++0x07 line.long 0x00 "QUEUE_68_A,Queue 68 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_68_B,Queue 68 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2440+0x08)++0x07 line.long 0x00 "QUEUE_68_C,Queue 68 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_68_D,Queue 68 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2450++0x07 line.long 0x00 "QUEUE_69_A,Queue 69 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_69_B,Queue 69 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2450+0x08)++0x07 line.long 0x00 "QUEUE_69_C,Queue 69 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_69_D,Queue 69 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2460++0x07 line.long 0x00 "QUEUE_70_A,Queue 70 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_70_B,Queue 70 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2460+0x08)++0x07 line.long 0x00 "QUEUE_70_C,Queue 70 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_70_D,Queue 70 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2470++0x07 line.long 0x00 "QUEUE_71_A,Queue 71 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_71_B,Queue 71 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2470+0x08)++0x07 line.long 0x00 "QUEUE_71_C,Queue 71 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_71_D,Queue 71 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2480++0x07 line.long 0x00 "QUEUE_72_A,Queue 72 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_72_B,Queue 72 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2480+0x08)++0x07 line.long 0x00 "QUEUE_72_C,Queue 72 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_72_D,Queue 72 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2490++0x07 line.long 0x00 "QUEUE_73_A,Queue 73 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_73_B,Queue 73 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2490+0x08)++0x07 line.long 0x00 "QUEUE_73_C,Queue 73 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_73_D,Queue 73 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x24A0++0x07 line.long 0x00 "QUEUE_74_A,Queue 74 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_74_B,Queue 74 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x24A0+0x08)++0x07 line.long 0x00 "QUEUE_74_C,Queue 74 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_74_D,Queue 74 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x24B0++0x07 line.long 0x00 "QUEUE_75_A,Queue 75 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_75_B,Queue 75 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x24B0+0x08)++0x07 line.long 0x00 "QUEUE_75_C,Queue 75 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_75_D,Queue 75 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x24C0++0x07 line.long 0x00 "QUEUE_76_A,Queue 76 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_76_B,Queue 76 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x24C0+0x08)++0x07 line.long 0x00 "QUEUE_76_C,Queue 76 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_76_D,Queue 76 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x24D0++0x07 line.long 0x00 "QUEUE_77_A,Queue 77 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_77_B,Queue 77 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x24D0+0x08)++0x07 line.long 0x00 "QUEUE_77_C,Queue 77 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_77_D,Queue 77 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x24E0++0x07 line.long 0x00 "QUEUE_78_A,Queue 78 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_78_B,Queue 78 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x24E0+0x08)++0x07 line.long 0x00 "QUEUE_78_C,Queue 78 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_78_D,Queue 78 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x24F0++0x07 line.long 0x00 "QUEUE_79_A,Queue 79 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_79_B,Queue 79 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x24F0+0x08)++0x07 line.long 0x00 "QUEUE_79_C,Queue 79 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_79_D,Queue 79 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2500++0x07 line.long 0x00 "QUEUE_80_A,Queue 80 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_80_B,Queue 80 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2500+0x08)++0x07 line.long 0x00 "QUEUE_80_C,Queue 80 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_80_D,Queue 80 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2510++0x07 line.long 0x00 "QUEUE_81_A,Queue 81 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_81_B,Queue 81 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2510+0x08)++0x07 line.long 0x00 "QUEUE_81_C,Queue 81 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_81_D,Queue 81 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2520++0x07 line.long 0x00 "QUEUE_82_A,Queue 82 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_82_B,Queue 82 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2520+0x08)++0x07 line.long 0x00 "QUEUE_82_C,Queue 82 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_82_D,Queue 82 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2530++0x07 line.long 0x00 "QUEUE_83_A,Queue 83 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_83_B,Queue 83 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2530+0x08)++0x07 line.long 0x00 "QUEUE_83_C,Queue 83 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_83_D,Queue 83 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2540++0x07 line.long 0x00 "QUEUE_84_A,Queue 84 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_84_B,Queue 84 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2540+0x08)++0x07 line.long 0x00 "QUEUE_84_C,Queue 84 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_84_D,Queue 84 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2550++0x07 line.long 0x00 "QUEUE_85_A,Queue 85 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_85_B,Queue 85 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2550+0x08)++0x07 line.long 0x00 "QUEUE_85_C,Queue 85 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_85_D,Queue 85 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2560++0x07 line.long 0x00 "QUEUE_86_A,Queue 86 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_86_B,Queue 86 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2560+0x08)++0x07 line.long 0x00 "QUEUE_86_C,Queue 86 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_86_D,Queue 86 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2570++0x07 line.long 0x00 "QUEUE_87_A,Queue 87 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_87_B,Queue 87 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2570+0x08)++0x07 line.long 0x00 "QUEUE_87_C,Queue 87 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_87_D,Queue 87 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2580++0x07 line.long 0x00 "QUEUE_88_A,Queue 88 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_88_B,Queue 88 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2580+0x08)++0x07 line.long 0x00 "QUEUE_88_C,Queue 88 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_88_D,Queue 88 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2590++0x07 line.long 0x00 "QUEUE_89_A,Queue 89 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_89_B,Queue 89 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2590+0x08)++0x07 line.long 0x00 "QUEUE_89_C,Queue 89 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_89_D,Queue 89 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x25A0++0x07 line.long 0x00 "QUEUE_90_A,Queue 90 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_90_B,Queue 90 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x25A0+0x08)++0x07 line.long 0x00 "QUEUE_90_C,Queue 90 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_90_D,Queue 90 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x25B0++0x07 line.long 0x00 "QUEUE_91_A,Queue 91 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_91_B,Queue 91 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x25B0+0x08)++0x07 line.long 0x00 "QUEUE_91_C,Queue 91 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_91_D,Queue 91 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x25C0++0x07 line.long 0x00 "QUEUE_92_A,Queue 92 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_92_B,Queue 92 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x25C0+0x08)++0x07 line.long 0x00 "QUEUE_92_C,Queue 92 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_92_D,Queue 92 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x25D0++0x07 line.long 0x00 "QUEUE_93_A,Queue 93 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_93_B,Queue 93 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x25D0+0x08)++0x07 line.long 0x00 "QUEUE_93_C,Queue 93 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_93_D,Queue 93 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x25E0++0x07 line.long 0x00 "QUEUE_94_A,Queue 94 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_94_B,Queue 94 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x25E0+0x08)++0x07 line.long 0x00 "QUEUE_94_C,Queue 94 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_94_D,Queue 94 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x25F0++0x07 line.long 0x00 "QUEUE_95_A,Queue 95 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_95_B,Queue 95 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x25F0+0x08)++0x07 line.long 0x00 "QUEUE_95_C,Queue 95 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_95_D,Queue 95 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2600++0x07 line.long 0x00 "QUEUE_96_A,Queue 96 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_96_B,Queue 96 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2600+0x08)++0x07 line.long 0x00 "QUEUE_96_C,Queue 96 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_96_D,Queue 96 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2610++0x07 line.long 0x00 "QUEUE_97_A,Queue 97 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_97_B,Queue 97 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2610+0x08)++0x07 line.long 0x00 "QUEUE_97_C,Queue 97 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_97_D,Queue 97 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2620++0x07 line.long 0x00 "QUEUE_98_A,Queue 98 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_98_B,Queue 98 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2620+0x08)++0x07 line.long 0x00 "QUEUE_98_C,Queue 98 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_98_D,Queue 98 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2630++0x07 line.long 0x00 "QUEUE_99_A,Queue 99 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_99_B,Queue 99 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2630+0x08)++0x07 line.long 0x00 "QUEUE_99_C,Queue 99 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_99_D,Queue 99 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2640++0x07 line.long 0x00 "QUEUE_100_A,Queue 100 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_100_B,Queue 100 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2640+0x08)++0x07 line.long 0x00 "QUEUE_100_C,Queue 100 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_100_D,Queue 100 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2650++0x07 line.long 0x00 "QUEUE_101_A,Queue 101 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_101_B,Queue 101 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2650+0x08)++0x07 line.long 0x00 "QUEUE_101_C,Queue 101 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_101_D,Queue 101 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2660++0x07 line.long 0x00 "QUEUE_102_A,Queue 102 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_102_B,Queue 102 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2660+0x08)++0x07 line.long 0x00 "QUEUE_102_C,Queue 102 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_102_D,Queue 102 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2670++0x07 line.long 0x00 "QUEUE_103_A,Queue 103 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_103_B,Queue 103 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2670+0x08)++0x07 line.long 0x00 "QUEUE_103_C,Queue 103 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_103_D,Queue 103 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2680++0x07 line.long 0x00 "QUEUE_104_A,Queue 104 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_104_B,Queue 104 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2680+0x08)++0x07 line.long 0x00 "QUEUE_104_C,Queue 104 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_104_D,Queue 104 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2690++0x07 line.long 0x00 "QUEUE_105_A,Queue 105 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_105_B,Queue 105 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2690+0x08)++0x07 line.long 0x00 "QUEUE_105_C,Queue 105 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_105_D,Queue 105 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x26A0++0x07 line.long 0x00 "QUEUE_106_A,Queue 106 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_106_B,Queue 106 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x26A0+0x08)++0x07 line.long 0x00 "QUEUE_106_C,Queue 106 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_106_D,Queue 106 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x26B0++0x07 line.long 0x00 "QUEUE_107_A,Queue 107 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_107_B,Queue 107 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x26B0+0x08)++0x07 line.long 0x00 "QUEUE_107_C,Queue 107 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_107_D,Queue 107 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x26C0++0x07 line.long 0x00 "QUEUE_108_A,Queue 108 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_108_B,Queue 108 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x26C0+0x08)++0x07 line.long 0x00 "QUEUE_108_C,Queue 108 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_108_D,Queue 108 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x26D0++0x07 line.long 0x00 "QUEUE_109_A,Queue 109 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_109_B,Queue 109 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x26D0+0x08)++0x07 line.long 0x00 "QUEUE_109_C,Queue 109 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_109_D,Queue 109 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x26E0++0x07 line.long 0x00 "QUEUE_110_A,Queue 110 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_110_B,Queue 110 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x26E0+0x08)++0x07 line.long 0x00 "QUEUE_110_C,Queue 110 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_110_D,Queue 110 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x26F0++0x07 line.long 0x00 "QUEUE_111_A,Queue 111 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_111_B,Queue 111 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x26F0+0x08)++0x07 line.long 0x00 "QUEUE_111_C,Queue 111 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_111_D,Queue 111 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2700++0x07 line.long 0x00 "QUEUE_112_A,Queue 112 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_112_B,Queue 112 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2700+0x08)++0x07 line.long 0x00 "QUEUE_112_C,Queue 112 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_112_D,Queue 112 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2710++0x07 line.long 0x00 "QUEUE_113_A,Queue 113 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_113_B,Queue 113 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2710+0x08)++0x07 line.long 0x00 "QUEUE_113_C,Queue 113 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_113_D,Queue 113 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2720++0x07 line.long 0x00 "QUEUE_114_A,Queue 114 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_114_B,Queue 114 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2720+0x08)++0x07 line.long 0x00 "QUEUE_114_C,Queue 114 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_114_D,Queue 114 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2730++0x07 line.long 0x00 "QUEUE_115_A,Queue 115 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_115_B,Queue 115 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2730+0x08)++0x07 line.long 0x00 "QUEUE_115_C,Queue 115 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_115_D,Queue 115 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2740++0x07 line.long 0x00 "QUEUE_116_A,Queue 116 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_116_B,Queue 116 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2740+0x08)++0x07 line.long 0x00 "QUEUE_116_C,Queue 116 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_116_D,Queue 116 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2750++0x07 line.long 0x00 "QUEUE_117_A,Queue 117 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_117_B,Queue 117 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2750+0x08)++0x07 line.long 0x00 "QUEUE_117_C,Queue 117 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_117_D,Queue 117 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2760++0x07 line.long 0x00 "QUEUE_118_A,Queue 118 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_118_B,Queue 118 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2760+0x08)++0x07 line.long 0x00 "QUEUE_118_C,Queue 118 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_118_D,Queue 118 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2770++0x07 line.long 0x00 "QUEUE_119_A,Queue 119 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_119_B,Queue 119 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2770+0x08)++0x07 line.long 0x00 "QUEUE_119_C,Queue 119 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_119_D,Queue 119 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2780++0x07 line.long 0x00 "QUEUE_120_A,Queue 120 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_120_B,Queue 120 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2780+0x08)++0x07 line.long 0x00 "QUEUE_120_C,Queue 120 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_120_D,Queue 120 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2790++0x07 line.long 0x00 "QUEUE_121_A,Queue 121 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_121_B,Queue 121 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2790+0x08)++0x07 line.long 0x00 "QUEUE_121_C,Queue 121 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_121_D,Queue 121 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x27A0++0x07 line.long 0x00 "QUEUE_122_A,Queue 122 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_122_B,Queue 122 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x27A0+0x08)++0x07 line.long 0x00 "QUEUE_122_C,Queue 122 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_122_D,Queue 122 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x27B0++0x07 line.long 0x00 "QUEUE_123_A,Queue 123 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_123_B,Queue 123 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x27B0+0x08)++0x07 line.long 0x00 "QUEUE_123_C,Queue 123 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_123_D,Queue 123 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x27C0++0x07 line.long 0x00 "QUEUE_124_A,Queue 124 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_124_B,Queue 124 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x27C0+0x08)++0x07 line.long 0x00 "QUEUE_124_C,Queue 124 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_124_D,Queue 124 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x27D0++0x07 line.long 0x00 "QUEUE_125_A,Queue 125 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_125_B,Queue 125 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x27D0+0x08)++0x07 line.long 0x00 "QUEUE_125_C,Queue 125 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_125_D,Queue 125 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x27E0++0x07 line.long 0x00 "QUEUE_126_A,Queue 126 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_126_B,Queue 126 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x27E0+0x08)++0x07 line.long 0x00 "QUEUE_126_C,Queue 126 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_126_D,Queue 126 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x27F0++0x07 line.long 0x00 "QUEUE_127_A,Queue 127 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_127_B,Queue 127 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x27F0+0x08)++0x07 line.long 0x00 "QUEUE_127_C,Queue 127 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_127_D,Queue 127 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2800++0x07 line.long 0x00 "QUEUE_128_A,Queue 128 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_128_B,Queue 128 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2800+0x08)++0x07 line.long 0x00 "QUEUE_128_C,Queue 128 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_128_D,Queue 128 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2810++0x07 line.long 0x00 "QUEUE_129_A,Queue 129 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_129_B,Queue 129 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2810+0x08)++0x07 line.long 0x00 "QUEUE_129_C,Queue 129 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_129_D,Queue 129 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2820++0x07 line.long 0x00 "QUEUE_130_A,Queue 130 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_130_B,Queue 130 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2820+0x08)++0x07 line.long 0x00 "QUEUE_130_C,Queue 130 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_130_D,Queue 130 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2830++0x07 line.long 0x00 "QUEUE_131_A,Queue 131 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_131_B,Queue 131 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2830+0x08)++0x07 line.long 0x00 "QUEUE_131_C,Queue 131 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_131_D,Queue 131 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2840++0x07 line.long 0x00 "QUEUE_132_A,Queue 132 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_132_B,Queue 132 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2840+0x08)++0x07 line.long 0x00 "QUEUE_132_C,Queue 132 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_132_D,Queue 132 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2850++0x07 line.long 0x00 "QUEUE_133_A,Queue 133 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_133_B,Queue 133 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2850+0x08)++0x07 line.long 0x00 "QUEUE_133_C,Queue 133 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_133_D,Queue 133 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2860++0x07 line.long 0x00 "QUEUE_134_A,Queue 134 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_134_B,Queue 134 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2860+0x08)++0x07 line.long 0x00 "QUEUE_134_C,Queue 134 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_134_D,Queue 134 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2870++0x07 line.long 0x00 "QUEUE_135_A,Queue 135 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_135_B,Queue 135 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2870+0x08)++0x07 line.long 0x00 "QUEUE_135_C,Queue 135 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_135_D,Queue 135 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2880++0x07 line.long 0x00 "QUEUE_136_A,Queue 136 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_136_B,Queue 136 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2880+0x08)++0x07 line.long 0x00 "QUEUE_136_C,Queue 136 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_136_D,Queue 136 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2890++0x07 line.long 0x00 "QUEUE_137_A,Queue 137 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_137_B,Queue 137 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2890+0x08)++0x07 line.long 0x00 "QUEUE_137_C,Queue 137 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_137_D,Queue 137 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x28A0++0x07 line.long 0x00 "QUEUE_138_A,Queue 138 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_138_B,Queue 138 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x28A0+0x08)++0x07 line.long 0x00 "QUEUE_138_C,Queue 138 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_138_D,Queue 138 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x28B0++0x07 line.long 0x00 "QUEUE_139_A,Queue 139 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_139_B,Queue 139 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x28B0+0x08)++0x07 line.long 0x00 "QUEUE_139_C,Queue 139 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_139_D,Queue 139 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x28C0++0x07 line.long 0x00 "QUEUE_140_A,Queue 140 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_140_B,Queue 140 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x28C0+0x08)++0x07 line.long 0x00 "QUEUE_140_C,Queue 140 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_140_D,Queue 140 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x28D0++0x07 line.long 0x00 "QUEUE_141_A,Queue 141 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_141_B,Queue 141 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x28D0+0x08)++0x07 line.long 0x00 "QUEUE_141_C,Queue 141 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_141_D,Queue 141 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x28E0++0x07 line.long 0x00 "QUEUE_142_A,Queue 142 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_142_B,Queue 142 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x28E0+0x08)++0x07 line.long 0x00 "QUEUE_142_C,Queue 142 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_142_D,Queue 142 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x28F0++0x07 line.long 0x00 "QUEUE_143_A,Queue 143 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_143_B,Queue 143 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x28F0+0x08)++0x07 line.long 0x00 "QUEUE_143_C,Queue 143 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_143_D,Queue 143 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2900++0x07 line.long 0x00 "QUEUE_144_A,Queue 144 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_144_B,Queue 144 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2900+0x08)++0x07 line.long 0x00 "QUEUE_144_C,Queue 144 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_144_D,Queue 144 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2910++0x07 line.long 0x00 "QUEUE_145_A,Queue 145 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_145_B,Queue 145 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2910+0x08)++0x07 line.long 0x00 "QUEUE_145_C,Queue 145 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_145_D,Queue 145 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2920++0x07 line.long 0x00 "QUEUE_146_A,Queue 146 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_146_B,Queue 146 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2920+0x08)++0x07 line.long 0x00 "QUEUE_146_C,Queue 146 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_146_D,Queue 146 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2930++0x07 line.long 0x00 "QUEUE_147_A,Queue 147 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_147_B,Queue 147 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2930+0x08)++0x07 line.long 0x00 "QUEUE_147_C,Queue 147 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_147_D,Queue 147 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2940++0x07 line.long 0x00 "QUEUE_148_A,Queue 148 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_148_B,Queue 148 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2940+0x08)++0x07 line.long 0x00 "QUEUE_148_C,Queue 148 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_148_D,Queue 148 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2950++0x07 line.long 0x00 "QUEUE_149_A,Queue 149 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_149_B,Queue 149 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2950+0x08)++0x07 line.long 0x00 "QUEUE_149_C,Queue 149 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_149_D,Queue 149 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2960++0x07 line.long 0x00 "QUEUE_150_A,Queue 150 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_150_B,Queue 150 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2960+0x08)++0x07 line.long 0x00 "QUEUE_150_C,Queue 150 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_150_D,Queue 150 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2970++0x07 line.long 0x00 "QUEUE_151_A,Queue 151 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_151_B,Queue 151 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2970+0x08)++0x07 line.long 0x00 "QUEUE_151_C,Queue 151 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_151_D,Queue 151 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2980++0x07 line.long 0x00 "QUEUE_152_A,Queue 152 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_152_B,Queue 152 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2980+0x08)++0x07 line.long 0x00 "QUEUE_152_C,Queue 152 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_152_D,Queue 152 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x2990++0x07 line.long 0x00 "QUEUE_153_A,Queue 153 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_153_B,Queue 153 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x2990+0x08)++0x07 line.long 0x00 "QUEUE_153_C,Queue 153 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_153_D,Queue 153 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x29A0++0x07 line.long 0x00 "QUEUE_154_A,Queue 154 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_154_B,Queue 154 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x29A0+0x08)++0x07 line.long 0x00 "QUEUE_154_C,Queue 154 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_154_D,Queue 154 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x29B0++0x07 line.long 0x00 "QUEUE_155_A,Queue 155 A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_155_B,Queue 155 B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" group.long (0x29B0+0x08)++0x07 line.long 0x00 "QUEUE_155_C,Queue 155 C Register" bitfld.long 0x00 31. "HEAD_TAIL,Head/tail push control" "Tail,Head" hexmask.long.word 0x00 0.--13. 1. "PACKET_SIZE,Packet size" line.long 0x04 "QUEUE_155_D,Queue 155 D Register" hexmask.long 0x04 5.--31. 1. "DESC_PTR,Descriptor pointer" bitfld.long 0x04 0.--4. "DESC_SIZE,Descriptor size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end tree "Queue A B C D Status Registers" rgroup.long 0x3000++0x0B line.long 0x00 "QUEUE_0_STATUS_A,Queue 0 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_0_STATUS_B,Queue 0 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_0_STATUS_C,Queue 0 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3010++0x0B line.long 0x00 "QUEUE_1_STATUS_A,Queue 1 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_1_STATUS_B,Queue 1 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_1_STATUS_C,Queue 1 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3020++0x0B line.long 0x00 "QUEUE_2_STATUS_A,Queue 2 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_2_STATUS_B,Queue 2 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_2_STATUS_C,Queue 2 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3030++0x0B line.long 0x00 "QUEUE_3_STATUS_A,Queue 3 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_3_STATUS_B,Queue 3 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_3_STATUS_C,Queue 3 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3040++0x0B line.long 0x00 "QUEUE_4_STATUS_A,Queue 4 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_4_STATUS_B,Queue 4 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_4_STATUS_C,Queue 4 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3050++0x0B line.long 0x00 "QUEUE_5_STATUS_A,Queue 5 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_5_STATUS_B,Queue 5 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_5_STATUS_C,Queue 5 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3060++0x0B line.long 0x00 "QUEUE_6_STATUS_A,Queue 6 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_6_STATUS_B,Queue 6 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_6_STATUS_C,Queue 6 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3070++0x0B line.long 0x00 "QUEUE_7_STATUS_A,Queue 7 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_7_STATUS_B,Queue 7 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_7_STATUS_C,Queue 7 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3080++0x0B line.long 0x00 "QUEUE_8_STATUS_A,Queue 8 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_8_STATUS_B,Queue 8 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_8_STATUS_C,Queue 8 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3090++0x0B line.long 0x00 "QUEUE_9_STATUS_A,Queue 9 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_9_STATUS_B,Queue 9 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_9_STATUS_C,Queue 9 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x30A0++0x0B line.long 0x00 "QUEUE_10_STATUS_A,Queue 10 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_10_STATUS_B,Queue 10 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_10_STATUS_C,Queue 10 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x30B0++0x0B line.long 0x00 "QUEUE_11_STATUS_A,Queue 11 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_11_STATUS_B,Queue 11 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_11_STATUS_C,Queue 11 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x30C0++0x0B line.long 0x00 "QUEUE_12_STATUS_A,Queue 12 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_12_STATUS_B,Queue 12 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_12_STATUS_C,Queue 12 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x30D0++0x0B line.long 0x00 "QUEUE_13_STATUS_A,Queue 13 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_13_STATUS_B,Queue 13 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_13_STATUS_C,Queue 13 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x30E0++0x0B line.long 0x00 "QUEUE_14_STATUS_A,Queue 14 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_14_STATUS_B,Queue 14 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_14_STATUS_C,Queue 14 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x30F0++0x0B line.long 0x00 "QUEUE_15_STATUS_A,Queue 15 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_15_STATUS_B,Queue 15 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_15_STATUS_C,Queue 15 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3100++0x0B line.long 0x00 "QUEUE_16_STATUS_A,Queue 16 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_16_STATUS_B,Queue 16 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_16_STATUS_C,Queue 16 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3110++0x0B line.long 0x00 "QUEUE_17_STATUS_A,Queue 17 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_17_STATUS_B,Queue 17 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_17_STATUS_C,Queue 17 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3120++0x0B line.long 0x00 "QUEUE_18_STATUS_A,Queue 18 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_18_STATUS_B,Queue 18 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_18_STATUS_C,Queue 18 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3130++0x0B line.long 0x00 "QUEUE_19_STATUS_A,Queue 19 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_19_STATUS_B,Queue 19 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_19_STATUS_C,Queue 19 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3140++0x0B line.long 0x00 "QUEUE_20_STATUS_A,Queue 20 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_20_STATUS_B,Queue 20 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_20_STATUS_C,Queue 20 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3150++0x0B line.long 0x00 "QUEUE_21_STATUS_A,Queue 21 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_21_STATUS_B,Queue 21 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_21_STATUS_C,Queue 21 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3160++0x0B line.long 0x00 "QUEUE_22_STATUS_A,Queue 22 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_22_STATUS_B,Queue 22 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_22_STATUS_C,Queue 22 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3170++0x0B line.long 0x00 "QUEUE_23_STATUS_A,Queue 23 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_23_STATUS_B,Queue 23 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_23_STATUS_C,Queue 23 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3180++0x0B line.long 0x00 "QUEUE_24_STATUS_A,Queue 24 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_24_STATUS_B,Queue 24 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_24_STATUS_C,Queue 24 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3190++0x0B line.long 0x00 "QUEUE_25_STATUS_A,Queue 25 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_25_STATUS_B,Queue 25 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_25_STATUS_C,Queue 25 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x31A0++0x0B line.long 0x00 "QUEUE_26_STATUS_A,Queue 26 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_26_STATUS_B,Queue 26 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_26_STATUS_C,Queue 26 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x31B0++0x0B line.long 0x00 "QUEUE_27_STATUS_A,Queue 27 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_27_STATUS_B,Queue 27 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_27_STATUS_C,Queue 27 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x31C0++0x0B line.long 0x00 "QUEUE_28_STATUS_A,Queue 28 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_28_STATUS_B,Queue 28 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_28_STATUS_C,Queue 28 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x31D0++0x0B line.long 0x00 "QUEUE_29_STATUS_A,Queue 29 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_29_STATUS_B,Queue 29 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_29_STATUS_C,Queue 29 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x31E0++0x0B line.long 0x00 "QUEUE_30_STATUS_A,Queue 30 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_30_STATUS_B,Queue 30 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_30_STATUS_C,Queue 30 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x31F0++0x0B line.long 0x00 "QUEUE_31_STATUS_A,Queue 31 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_31_STATUS_B,Queue 31 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_31_STATUS_C,Queue 31 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3200++0x0B line.long 0x00 "QUEUE_32_STATUS_A,Queue 32 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_32_STATUS_B,Queue 32 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_32_STATUS_C,Queue 32 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3210++0x0B line.long 0x00 "QUEUE_33_STATUS_A,Queue 33 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_33_STATUS_B,Queue 33 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_33_STATUS_C,Queue 33 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3220++0x0B line.long 0x00 "QUEUE_34_STATUS_A,Queue 34 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_34_STATUS_B,Queue 34 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_34_STATUS_C,Queue 34 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3230++0x0B line.long 0x00 "QUEUE_35_STATUS_A,Queue 35 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_35_STATUS_B,Queue 35 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_35_STATUS_C,Queue 35 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3240++0x0B line.long 0x00 "QUEUE_36_STATUS_A,Queue 36 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_36_STATUS_B,Queue 36 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_36_STATUS_C,Queue 36 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3250++0x0B line.long 0x00 "QUEUE_37_STATUS_A,Queue 37 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_37_STATUS_B,Queue 37 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_37_STATUS_C,Queue 37 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3260++0x0B line.long 0x00 "QUEUE_38_STATUS_A,Queue 38 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_38_STATUS_B,Queue 38 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_38_STATUS_C,Queue 38 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3270++0x0B line.long 0x00 "QUEUE_39_STATUS_A,Queue 39 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_39_STATUS_B,Queue 39 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_39_STATUS_C,Queue 39 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3280++0x0B line.long 0x00 "QUEUE_40_STATUS_A,Queue 40 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_40_STATUS_B,Queue 40 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_40_STATUS_C,Queue 40 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3290++0x0B line.long 0x00 "QUEUE_41_STATUS_A,Queue 41 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_41_STATUS_B,Queue 41 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_41_STATUS_C,Queue 41 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x32A0++0x0B line.long 0x00 "QUEUE_42_STATUS_A,Queue 42 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_42_STATUS_B,Queue 42 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_42_STATUS_C,Queue 42 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x32B0++0x0B line.long 0x00 "QUEUE_43_STATUS_A,Queue 43 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_43_STATUS_B,Queue 43 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_43_STATUS_C,Queue 43 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x32C0++0x0B line.long 0x00 "QUEUE_44_STATUS_A,Queue 44 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_44_STATUS_B,Queue 44 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_44_STATUS_C,Queue 44 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x32D0++0x0B line.long 0x00 "QUEUE_45_STATUS_A,Queue 45 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_45_STATUS_B,Queue 45 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_45_STATUS_C,Queue 45 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x32E0++0x0B line.long 0x00 "QUEUE_46_STATUS_A,Queue 46 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_46_STATUS_B,Queue 46 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_46_STATUS_C,Queue 46 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x32F0++0x0B line.long 0x00 "QUEUE_47_STATUS_A,Queue 47 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_47_STATUS_B,Queue 47 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_47_STATUS_C,Queue 47 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3300++0x0B line.long 0x00 "QUEUE_48_STATUS_A,Queue 48 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_48_STATUS_B,Queue 48 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_48_STATUS_C,Queue 48 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3310++0x0B line.long 0x00 "QUEUE_49_STATUS_A,Queue 49 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_49_STATUS_B,Queue 49 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_49_STATUS_C,Queue 49 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3320++0x0B line.long 0x00 "QUEUE_50_STATUS_A,Queue 50 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_50_STATUS_B,Queue 50 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_50_STATUS_C,Queue 50 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3330++0x0B line.long 0x00 "QUEUE_51_STATUS_A,Queue 51 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_51_STATUS_B,Queue 51 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_51_STATUS_C,Queue 51 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3340++0x0B line.long 0x00 "QUEUE_52_STATUS_A,Queue 52 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_52_STATUS_B,Queue 52 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_52_STATUS_C,Queue 52 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3350++0x0B line.long 0x00 "QUEUE_53_STATUS_A,Queue 53 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_53_STATUS_B,Queue 53 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_53_STATUS_C,Queue 53 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3360++0x0B line.long 0x00 "QUEUE_54_STATUS_A,Queue 54 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_54_STATUS_B,Queue 54 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_54_STATUS_C,Queue 54 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3370++0x0B line.long 0x00 "QUEUE_55_STATUS_A,Queue 55 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_55_STATUS_B,Queue 55 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_55_STATUS_C,Queue 55 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3380++0x0B line.long 0x00 "QUEUE_56_STATUS_A,Queue 56 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_56_STATUS_B,Queue 56 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_56_STATUS_C,Queue 56 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3390++0x0B line.long 0x00 "QUEUE_57_STATUS_A,Queue 57 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_57_STATUS_B,Queue 57 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_57_STATUS_C,Queue 57 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x33A0++0x0B line.long 0x00 "QUEUE_58_STATUS_A,Queue 58 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_58_STATUS_B,Queue 58 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_58_STATUS_C,Queue 58 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x33B0++0x0B line.long 0x00 "QUEUE_59_STATUS_A,Queue 59 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_59_STATUS_B,Queue 59 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_59_STATUS_C,Queue 59 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x33C0++0x0B line.long 0x00 "QUEUE_60_STATUS_A,Queue 60 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_60_STATUS_B,Queue 60 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_60_STATUS_C,Queue 60 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x33D0++0x0B line.long 0x00 "QUEUE_61_STATUS_A,Queue 61 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_61_STATUS_B,Queue 61 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_61_STATUS_C,Queue 61 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x33E0++0x0B line.long 0x00 "QUEUE_62_STATUS_A,Queue 62 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_62_STATUS_B,Queue 62 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_62_STATUS_C,Queue 62 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x33F0++0x0B line.long 0x00 "QUEUE_63_STATUS_A,Queue 63 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_63_STATUS_B,Queue 63 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_63_STATUS_C,Queue 63 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3400++0x0B line.long 0x00 "QUEUE_64_STATUS_A,Queue 64 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_64_STATUS_B,Queue 64 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_64_STATUS_C,Queue 64 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3410++0x0B line.long 0x00 "QUEUE_65_STATUS_A,Queue 65 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_65_STATUS_B,Queue 65 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_65_STATUS_C,Queue 65 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3420++0x0B line.long 0x00 "QUEUE_66_STATUS_A,Queue 66 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_66_STATUS_B,Queue 66 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_66_STATUS_C,Queue 66 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3430++0x0B line.long 0x00 "QUEUE_67_STATUS_A,Queue 67 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_67_STATUS_B,Queue 67 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_67_STATUS_C,Queue 67 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3440++0x0B line.long 0x00 "QUEUE_68_STATUS_A,Queue 68 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_68_STATUS_B,Queue 68 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_68_STATUS_C,Queue 68 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3450++0x0B line.long 0x00 "QUEUE_69_STATUS_A,Queue 69 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_69_STATUS_B,Queue 69 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_69_STATUS_C,Queue 69 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3460++0x0B line.long 0x00 "QUEUE_70_STATUS_A,Queue 70 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_70_STATUS_B,Queue 70 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_70_STATUS_C,Queue 70 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3470++0x0B line.long 0x00 "QUEUE_71_STATUS_A,Queue 71 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_71_STATUS_B,Queue 71 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_71_STATUS_C,Queue 71 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3480++0x0B line.long 0x00 "QUEUE_72_STATUS_A,Queue 72 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_72_STATUS_B,Queue 72 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_72_STATUS_C,Queue 72 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3490++0x0B line.long 0x00 "QUEUE_73_STATUS_A,Queue 73 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_73_STATUS_B,Queue 73 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_73_STATUS_C,Queue 73 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x34A0++0x0B line.long 0x00 "QUEUE_74_STATUS_A,Queue 74 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_74_STATUS_B,Queue 74 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_74_STATUS_C,Queue 74 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x34B0++0x0B line.long 0x00 "QUEUE_75_STATUS_A,Queue 75 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_75_STATUS_B,Queue 75 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_75_STATUS_C,Queue 75 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x34C0++0x0B line.long 0x00 "QUEUE_76_STATUS_A,Queue 76 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_76_STATUS_B,Queue 76 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_76_STATUS_C,Queue 76 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x34D0++0x0B line.long 0x00 "QUEUE_77_STATUS_A,Queue 77 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_77_STATUS_B,Queue 77 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_77_STATUS_C,Queue 77 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x34E0++0x0B line.long 0x00 "QUEUE_78_STATUS_A,Queue 78 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_78_STATUS_B,Queue 78 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_78_STATUS_C,Queue 78 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x34F0++0x0B line.long 0x00 "QUEUE_79_STATUS_A,Queue 79 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_79_STATUS_B,Queue 79 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_79_STATUS_C,Queue 79 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3500++0x0B line.long 0x00 "QUEUE_80_STATUS_A,Queue 80 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_80_STATUS_B,Queue 80 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_80_STATUS_C,Queue 80 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3510++0x0B line.long 0x00 "QUEUE_81_STATUS_A,Queue 81 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_81_STATUS_B,Queue 81 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_81_STATUS_C,Queue 81 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3520++0x0B line.long 0x00 "QUEUE_82_STATUS_A,Queue 82 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_82_STATUS_B,Queue 82 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_82_STATUS_C,Queue 82 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3530++0x0B line.long 0x00 "QUEUE_83_STATUS_A,Queue 83 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_83_STATUS_B,Queue 83 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_83_STATUS_C,Queue 83 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3540++0x0B line.long 0x00 "QUEUE_84_STATUS_A,Queue 84 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_84_STATUS_B,Queue 84 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_84_STATUS_C,Queue 84 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3550++0x0B line.long 0x00 "QUEUE_85_STATUS_A,Queue 85 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_85_STATUS_B,Queue 85 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_85_STATUS_C,Queue 85 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3560++0x0B line.long 0x00 "QUEUE_86_STATUS_A,Queue 86 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_86_STATUS_B,Queue 86 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_86_STATUS_C,Queue 86 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3570++0x0B line.long 0x00 "QUEUE_87_STATUS_A,Queue 87 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_87_STATUS_B,Queue 87 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_87_STATUS_C,Queue 87 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3580++0x0B line.long 0x00 "QUEUE_88_STATUS_A,Queue 88 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_88_STATUS_B,Queue 88 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_88_STATUS_C,Queue 88 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3590++0x0B line.long 0x00 "QUEUE_89_STATUS_A,Queue 89 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_89_STATUS_B,Queue 89 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_89_STATUS_C,Queue 89 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x35A0++0x0B line.long 0x00 "QUEUE_90_STATUS_A,Queue 90 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_90_STATUS_B,Queue 90 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_90_STATUS_C,Queue 90 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x35B0++0x0B line.long 0x00 "QUEUE_91_STATUS_A,Queue 91 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_91_STATUS_B,Queue 91 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_91_STATUS_C,Queue 91 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x35C0++0x0B line.long 0x00 "QUEUE_92_STATUS_A,Queue 92 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_92_STATUS_B,Queue 92 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_92_STATUS_C,Queue 92 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x35D0++0x0B line.long 0x00 "QUEUE_93_STATUS_A,Queue 93 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_93_STATUS_B,Queue 93 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_93_STATUS_C,Queue 93 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x35E0++0x0B line.long 0x00 "QUEUE_94_STATUS_A,Queue 94 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_94_STATUS_B,Queue 94 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_94_STATUS_C,Queue 94 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x35F0++0x0B line.long 0x00 "QUEUE_95_STATUS_A,Queue 95 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_95_STATUS_B,Queue 95 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_95_STATUS_C,Queue 95 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3600++0x0B line.long 0x00 "QUEUE_96_STATUS_A,Queue 96 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_96_STATUS_B,Queue 96 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_96_STATUS_C,Queue 96 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3610++0x0B line.long 0x00 "QUEUE_97_STATUS_A,Queue 97 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_97_STATUS_B,Queue 97 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_97_STATUS_C,Queue 97 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3620++0x0B line.long 0x00 "QUEUE_98_STATUS_A,Queue 98 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_98_STATUS_B,Queue 98 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_98_STATUS_C,Queue 98 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3630++0x0B line.long 0x00 "QUEUE_99_STATUS_A,Queue 99 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_99_STATUS_B,Queue 99 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_99_STATUS_C,Queue 99 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3640++0x0B line.long 0x00 "QUEUE_100_STATUS_A,Queue 100 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_100_STATUS_B,Queue 100 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_100_STATUS_C,Queue 100 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3650++0x0B line.long 0x00 "QUEUE_101_STATUS_A,Queue 101 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_101_STATUS_B,Queue 101 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_101_STATUS_C,Queue 101 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3660++0x0B line.long 0x00 "QUEUE_102_STATUS_A,Queue 102 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_102_STATUS_B,Queue 102 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_102_STATUS_C,Queue 102 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3670++0x0B line.long 0x00 "QUEUE_103_STATUS_A,Queue 103 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_103_STATUS_B,Queue 103 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_103_STATUS_C,Queue 103 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3680++0x0B line.long 0x00 "QUEUE_104_STATUS_A,Queue 104 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_104_STATUS_B,Queue 104 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_104_STATUS_C,Queue 104 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3690++0x0B line.long 0x00 "QUEUE_105_STATUS_A,Queue 105 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_105_STATUS_B,Queue 105 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_105_STATUS_C,Queue 105 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x36A0++0x0B line.long 0x00 "QUEUE_106_STATUS_A,Queue 106 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_106_STATUS_B,Queue 106 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_106_STATUS_C,Queue 106 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x36B0++0x0B line.long 0x00 "QUEUE_107_STATUS_A,Queue 107 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_107_STATUS_B,Queue 107 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_107_STATUS_C,Queue 107 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x36C0++0x0B line.long 0x00 "QUEUE_108_STATUS_A,Queue 108 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_108_STATUS_B,Queue 108 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_108_STATUS_C,Queue 108 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x36D0++0x0B line.long 0x00 "QUEUE_109_STATUS_A,Queue 109 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_109_STATUS_B,Queue 109 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_109_STATUS_C,Queue 109 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x36E0++0x0B line.long 0x00 "QUEUE_110_STATUS_A,Queue 110 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_110_STATUS_B,Queue 110 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_110_STATUS_C,Queue 110 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x36F0++0x0B line.long 0x00 "QUEUE_111_STATUS_A,Queue 111 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_111_STATUS_B,Queue 111 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_111_STATUS_C,Queue 111 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3700++0x0B line.long 0x00 "QUEUE_112_STATUS_A,Queue 112 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_112_STATUS_B,Queue 112 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_112_STATUS_C,Queue 112 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3710++0x0B line.long 0x00 "QUEUE_113_STATUS_A,Queue 113 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_113_STATUS_B,Queue 113 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_113_STATUS_C,Queue 113 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3720++0x0B line.long 0x00 "QUEUE_114_STATUS_A,Queue 114 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_114_STATUS_B,Queue 114 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_114_STATUS_C,Queue 114 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3730++0x0B line.long 0x00 "QUEUE_115_STATUS_A,Queue 115 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_115_STATUS_B,Queue 115 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_115_STATUS_C,Queue 115 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3740++0x0B line.long 0x00 "QUEUE_116_STATUS_A,Queue 116 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_116_STATUS_B,Queue 116 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_116_STATUS_C,Queue 116 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3750++0x0B line.long 0x00 "QUEUE_117_STATUS_A,Queue 117 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_117_STATUS_B,Queue 117 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_117_STATUS_C,Queue 117 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3760++0x0B line.long 0x00 "QUEUE_118_STATUS_A,Queue 118 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_118_STATUS_B,Queue 118 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_118_STATUS_C,Queue 118 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3770++0x0B line.long 0x00 "QUEUE_119_STATUS_A,Queue 119 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_119_STATUS_B,Queue 119 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_119_STATUS_C,Queue 119 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3780++0x0B line.long 0x00 "QUEUE_120_STATUS_A,Queue 120 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_120_STATUS_B,Queue 120 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_120_STATUS_C,Queue 120 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3790++0x0B line.long 0x00 "QUEUE_121_STATUS_A,Queue 121 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_121_STATUS_B,Queue 121 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_121_STATUS_C,Queue 121 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x37A0++0x0B line.long 0x00 "QUEUE_122_STATUS_A,Queue 122 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_122_STATUS_B,Queue 122 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_122_STATUS_C,Queue 122 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x37B0++0x0B line.long 0x00 "QUEUE_123_STATUS_A,Queue 123 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_123_STATUS_B,Queue 123 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_123_STATUS_C,Queue 123 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x37C0++0x0B line.long 0x00 "QUEUE_124_STATUS_A,Queue 124 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_124_STATUS_B,Queue 124 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_124_STATUS_C,Queue 124 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x37D0++0x0B line.long 0x00 "QUEUE_125_STATUS_A,Queue 125 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_125_STATUS_B,Queue 125 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_125_STATUS_C,Queue 125 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x37E0++0x0B line.long 0x00 "QUEUE_126_STATUS_A,Queue 126 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_126_STATUS_B,Queue 126 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_126_STATUS_C,Queue 126 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x37F0++0x0B line.long 0x00 "QUEUE_127_STATUS_A,Queue 127 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_127_STATUS_B,Queue 127 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_127_STATUS_C,Queue 127 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3800++0x0B line.long 0x00 "QUEUE_128_STATUS_A,Queue 128 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_128_STATUS_B,Queue 128 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_128_STATUS_C,Queue 128 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3810++0x0B line.long 0x00 "QUEUE_129_STATUS_A,Queue 129 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_129_STATUS_B,Queue 129 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_129_STATUS_C,Queue 129 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3820++0x0B line.long 0x00 "QUEUE_130_STATUS_A,Queue 130 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_130_STATUS_B,Queue 130 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_130_STATUS_C,Queue 130 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3830++0x0B line.long 0x00 "QUEUE_131_STATUS_A,Queue 131 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_131_STATUS_B,Queue 131 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_131_STATUS_C,Queue 131 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3840++0x0B line.long 0x00 "QUEUE_132_STATUS_A,Queue 132 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_132_STATUS_B,Queue 132 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_132_STATUS_C,Queue 132 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3850++0x0B line.long 0x00 "QUEUE_133_STATUS_A,Queue 133 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_133_STATUS_B,Queue 133 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_133_STATUS_C,Queue 133 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3860++0x0B line.long 0x00 "QUEUE_134_STATUS_A,Queue 134 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_134_STATUS_B,Queue 134 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_134_STATUS_C,Queue 134 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3870++0x0B line.long 0x00 "QUEUE_135_STATUS_A,Queue 135 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_135_STATUS_B,Queue 135 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_135_STATUS_C,Queue 135 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3880++0x0B line.long 0x00 "QUEUE_136_STATUS_A,Queue 136 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_136_STATUS_B,Queue 136 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_136_STATUS_C,Queue 136 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3890++0x0B line.long 0x00 "QUEUE_137_STATUS_A,Queue 137 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_137_STATUS_B,Queue 137 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_137_STATUS_C,Queue 137 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x38A0++0x0B line.long 0x00 "QUEUE_138_STATUS_A,Queue 138 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_138_STATUS_B,Queue 138 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_138_STATUS_C,Queue 138 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x38B0++0x0B line.long 0x00 "QUEUE_139_STATUS_A,Queue 139 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_139_STATUS_B,Queue 139 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_139_STATUS_C,Queue 139 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x38C0++0x0B line.long 0x00 "QUEUE_140_STATUS_A,Queue 140 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_140_STATUS_B,Queue 140 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_140_STATUS_C,Queue 140 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x38D0++0x0B line.long 0x00 "QUEUE_141_STATUS_A,Queue 141 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_141_STATUS_B,Queue 141 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_141_STATUS_C,Queue 141 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x38E0++0x0B line.long 0x00 "QUEUE_142_STATUS_A,Queue 142 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_142_STATUS_B,Queue 142 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_142_STATUS_C,Queue 142 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x38F0++0x0B line.long 0x00 "QUEUE_143_STATUS_A,Queue 143 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_143_STATUS_B,Queue 143 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_143_STATUS_C,Queue 143 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3900++0x0B line.long 0x00 "QUEUE_144_STATUS_A,Queue 144 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_144_STATUS_B,Queue 144 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_144_STATUS_C,Queue 144 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3910++0x0B line.long 0x00 "QUEUE_145_STATUS_A,Queue 145 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_145_STATUS_B,Queue 145 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_145_STATUS_C,Queue 145 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3920++0x0B line.long 0x00 "QUEUE_146_STATUS_A,Queue 146 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_146_STATUS_B,Queue 146 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_146_STATUS_C,Queue 146 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3930++0x0B line.long 0x00 "QUEUE_147_STATUS_A,Queue 147 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_147_STATUS_B,Queue 147 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_147_STATUS_C,Queue 147 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3940++0x0B line.long 0x00 "QUEUE_148_STATUS_A,Queue 148 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_148_STATUS_B,Queue 148 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_148_STATUS_C,Queue 148 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3950++0x0B line.long 0x00 "QUEUE_149_STATUS_A,Queue 149 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_149_STATUS_B,Queue 149 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_149_STATUS_C,Queue 149 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3960++0x0B line.long 0x00 "QUEUE_150_STATUS_A,Queue 150 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_150_STATUS_B,Queue 150 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_150_STATUS_C,Queue 150 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3970++0x0B line.long 0x00 "QUEUE_151_STATUS_A,Queue 151 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_151_STATUS_B,Queue 151 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_151_STATUS_C,Queue 151 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3980++0x0B line.long 0x00 "QUEUE_152_STATUS_A,Queue 152 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_152_STATUS_B,Queue 152 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_152_STATUS_C,Queue 152 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x3990++0x0B line.long 0x00 "QUEUE_153_STATUS_A,Queue 153 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_153_STATUS_B,Queue 153 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_153_STATUS_C,Queue 153 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x39A0++0x0B line.long 0x00 "QUEUE_154_STATUS_A,Queue 154 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_154_STATUS_B,Queue 154 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_154_STATUS_C,Queue 154 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" rgroup.long 0x39B0++0x0B line.long 0x00 "QUEUE_155_STATUS_A,Queue 155 Status A Register" hexmask.long.word 0x00 0.--13. 1. "QUEUE_ENTRY_COUNT,Queue entry counter" line.long 0x04 "QUEUE_155_STATUS_B,Queue 155 Status B Register" hexmask.long 0x04 0.--27. 1. "QUEUE_BYTE_COUNT,Queue bytes counter" line.long 0x08 "QUEUE_155_STATUS_C,Queue 155 Status C Register" hexmask.long.word 0x08 0.--13. 1. "PACKET_SIZE,Packet size" tree.end tree.end tree.end tree "Interprocessor Communication" tree "Mailbox" base ad:0x480C8000 rgroup.long 0x00++0x03 line.long 0x00 "REVISION,IP Revision Code Register" bitfld.long 0x00 8.--10. "MAJOR,IP-Major revision" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--5. "MINOR,IP-Minor revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x10++0x03 line.long 0x00 "SYSCONFIG,Sysconfig Register" bitfld.long 0x00 2.--3. "SIDLEMODE,Idle mode" "0,1,2,3" bitfld.long 0x00 0. "SOFTRESET,Software reset" "No reset,Reset" hgroup.long 0x40++0x03 hide.long 0x00 "MESSAGE_0,Message Register" in hgroup.long 0x44++0x03 hide.long 0x00 "MESSAGE_1,Message Register" in hgroup.long 0x48++0x03 hide.long 0x00 "MESSAGE_2,Message Register" in hgroup.long 0x4C++0x03 hide.long 0x00 "MESSAGE_3,Message Register" in hgroup.long 0x50++0x03 hide.long 0x00 "MESSAGE_4,Message Register" in hgroup.long 0x54++0x03 hide.long 0x00 "MESSAGE_5,Message Register" in hgroup.long 0x58++0x03 hide.long 0x00 "MESSAGE_6,Message Register" in hgroup.long 0x5C++0x03 hide.long 0x00 "MESSAGE_7,Message Register" in hgroup.long 0x80++0x03 hide.long 0x00 "FIFOSTATUS_0,FIFO Status Register" in hgroup.long 0x84++0x03 hide.long 0x00 "FIFOSTATUS_1,FIFO Status Register" in hgroup.long 0x88++0x03 hide.long 0x00 "FIFOSTATUS_2,FIFO Status Register" in hgroup.long 0x8C++0x03 hide.long 0x00 "FIFOSTATUS_3,FIFO Status Register" in hgroup.long 0x90++0x03 hide.long 0x00 "FIFOSTATUS_4,FIFO Status Register" in hgroup.long 0x94++0x03 hide.long 0x00 "FIFOSTATUS_5,FIFO Status Register" in hgroup.long 0x98++0x03 hide.long 0x00 "FIFOSTATUS_6,FIFO Status Register" in hgroup.long 0x9C++0x03 hide.long 0x00 "FIFOSTATUS_7,FIFO Status Register" in rgroup.long 0xC0++0x03 line.long 0x00 "MSGSTATUS_0,Message Status Register" bitfld.long 0x00 0.--2. "NBOFMSGMBM,Number of unread messages in mailbox" "0,1,2,3,4,5,6,7" rgroup.long 0xC4++0x03 line.long 0x00 "MSGSTATUS_1,Message Status Register" bitfld.long 0x00 0.--2. "NBOFMSGMBM,Number of unread messages in mailbox" "0,1,2,3,4,5,6,7" rgroup.long 0xC8++0x03 line.long 0x00 "MSGSTATUS_2,Message Status Register" bitfld.long 0x00 0.--2. "NBOFMSGMBM,Number of unread messages in mailbox" "0,1,2,3,4,5,6,7" rgroup.long 0xCC++0x03 line.long 0x00 "MSGSTATUS_3,Message Status Register" bitfld.long 0x00 0.--2. "NBOFMSGMBM,Number of unread messages in mailbox" "0,1,2,3,4,5,6,7" rgroup.long 0xD0++0x03 line.long 0x00 "MSGSTATUS_4,Message Status Register" bitfld.long 0x00 0.--2. "NBOFMSGMBM,Number of unread messages in mailbox" "0,1,2,3,4,5,6,7" rgroup.long 0xD4++0x03 line.long 0x00 "MSGSTATUS_5,Message Status Register" bitfld.long 0x00 0.--2. "NBOFMSGMBM,Number of unread messages in mailbox" "0,1,2,3,4,5,6,7" rgroup.long 0xD8++0x03 line.long 0x00 "MSGSTATUS_6,Message Status Register" bitfld.long 0x00 0.--2. "NBOFMSGMBM,Number of unread messages in mailbox" "0,1,2,3,4,5,6,7" rgroup.long 0xDC++0x03 line.long 0x00 "MSGSTATUS_7,Message Status Register" bitfld.long 0x00 0.--2. "NBOFMSGMBM,Number of unread messages in mailbox" "0,1,2,3,4,5,6,7" group.long 0x100++0x03 line.long 0x00 "IRQSTATUS_0_SET/CLR,Interrupt Status Register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. "NOTFULLSTATUSUUMB7,Not full status bit for user u mailbox 7" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x00 14. 0x04 14. "NEWMSGSTATUSUUMB7,New message status bit for user u mailbox 7" "No interrupt,Interrupt" newline setclrfld.long 0x00 13. 0x00 13. 0x04 13. "NOTFULLSTATUSUUMB6,Not full status bit for user u mailbox 6" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x00 12. 0x04 12. "NEWMSGSTATUSUUMB6,New message status bit for user u mailbox 6" "No interrupt,Interrupt" newline setclrfld.long 0x00 11. 0x00 11. 0x04 11. "NOTFULLSTATUSUUMB5,Not full status bit for user u mailbox 5" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x00 10. 0x04 10. "NEWMSGSTATUSUUMB5,New message status bit for user u mailbox 5" "No interrupt,Interrupt" newline setclrfld.long 0x00 9. 0x00 9. 0x04 9. "NOTFULLSTATUSUUMB4,Not full status bit for user u mailbox 4" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x00 8. 0x04 8. "NEWMSGSTATUSUUMB4,New message status bit for user u mailbox 4" "No interrupt,Interrupt" newline setclrfld.long 0x00 7. 0x00 7. 0x04 7. "NOTFULLSTATUSUUMB3,Not full status bit for user u mailbox 3" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x00 6. 0x04 6. "NEWMSGSTATUSUUMB3,New message status bit for user u mailbox 3" "No interrupt,Interrupt" newline setclrfld.long 0x00 5. 0x00 5. 0x04 5. "NOTFULLSTATUSUUMB2,Not full status bit for user u mailbox 2" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x00 4. 0x04 4. "NEWMSGSTATUSUUMB2,New message status bit for user u mailbox 2" "No interrupt,Interrupt" newline setclrfld.long 0x00 3. 0x00 3. 0x04 3. "NOTFULLSTATUSUUMB1,Not full status bit for user u mailbox 1" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x00 2. 0x04 2. "NEWMSGSTATUSUUMB1,New message status bit for user u mailbox 1" "No interrupt,Interrupt" newline setclrfld.long 0x00 1. 0x00 1. 0x04 1. "NOTFULLSTATUSUUMB0,Not full status bit for user u mailbox 0" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x00 0. 0x04 0. "NEWMSGSTATUSUUMB0,New message status bit for user u mailbox 0" "No interrupt,Interrupt" group.long (0x100+0x08)++0x03 line.long 0x00 "IRQENABLE_0_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. "NOTFULLSTATUSUUMB7,Not full status bit for user u mailbox 7" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x00 14. 0x04 14. "NEWMSGSTATUSUUMB7,New message status bit for user u mailbox 7" "No interrupt,Interrupt" newline setclrfld.long 0x00 13. 0x00 13. 0x04 13. "NOTFULLSTATUSUUMB6,Not full status bit for user u mailbox 6" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x00 12. 0x04 12. "NEWMSGSTATUSUUMB6,New message status bit for user u mailbox 6" "No interrupt,Interrupt" newline setclrfld.long 0x00 11. 0x00 11. 0x04 11. "NOTFULLSTATUSUUMB5,Not full status bit for user u mailbox 5" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x00 10. 0x04 10. "NEWMSGSTATUSUUMB5,New message status bit for user u mailbox 5" "No interrupt,Interrupt" newline setclrfld.long 0x00 9. 0x00 9. 0x04 9. "NOTFULLSTATUSUUMB4,Not full status bit for user u mailbox 4" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x00 8. 0x04 8. "NEWMSGSTATUSUUMB4,New message status bit for user u mailbox 4" "No interrupt,Interrupt" newline setclrfld.long 0x00 7. 0x00 7. 0x04 7. "NOTFULLSTATUSUUMB3,Not full status bit for user u mailbox 3" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x00 6. 0x04 6. "NEWMSGSTATUSUUMB3,New message status bit for user u mailbox 3" "No interrupt,Interrupt" newline setclrfld.long 0x00 5. 0x00 5. 0x04 5. "NOTFULLSTATUSUUMB2,Not full status bit for user u mailbox 2" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x00 4. 0x04 4. "NEWMSGSTATUSUUMB2,New message status bit for user u mailbox 2" "No interrupt,Interrupt" newline setclrfld.long 0x00 3. 0x00 3. 0x04 3. "NOTFULLSTATUSUUMB1,Not full status bit for user u mailbox 1" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x00 2. 0x04 2. "NEWMSGSTATUSUUMB1,New message status bit for user u mailbox 1" "No interrupt,Interrupt" newline setclrfld.long 0x00 1. 0x00 1. 0x04 1. "NOTFULLSTATUSUUMB0,Not full status bit for user u mailbox 0" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x00 0. 0x04 0. "NEWMSGSTATUSUUMB0,New message status bit for user u mailbox 0" "No interrupt,Interrupt" group.long 0x110++0x03 line.long 0x00 "IRQSTATUS_1_SET/CLR,Interrupt Status Register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. "NOTFULLSTATUSUUMB7,Not full status bit for user u mailbox 7" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x00 14. 0x04 14. "NEWMSGSTATUSUUMB7,New message status bit for user u mailbox 7" "No interrupt,Interrupt" newline setclrfld.long 0x00 13. 0x00 13. 0x04 13. "NOTFULLSTATUSUUMB6,Not full status bit for user u mailbox 6" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x00 12. 0x04 12. "NEWMSGSTATUSUUMB6,New message status bit for user u mailbox 6" "No interrupt,Interrupt" newline setclrfld.long 0x00 11. 0x00 11. 0x04 11. "NOTFULLSTATUSUUMB5,Not full status bit for user u mailbox 5" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x00 10. 0x04 10. "NEWMSGSTATUSUUMB5,New message status bit for user u mailbox 5" "No interrupt,Interrupt" newline setclrfld.long 0x00 9. 0x00 9. 0x04 9. "NOTFULLSTATUSUUMB4,Not full status bit for user u mailbox 4" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x00 8. 0x04 8. "NEWMSGSTATUSUUMB4,New message status bit for user u mailbox 4" "No interrupt,Interrupt" newline setclrfld.long 0x00 7. 0x00 7. 0x04 7. "NOTFULLSTATUSUUMB3,Not full status bit for user u mailbox 3" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x00 6. 0x04 6. "NEWMSGSTATUSUUMB3,New message status bit for user u mailbox 3" "No interrupt,Interrupt" newline setclrfld.long 0x00 5. 0x00 5. 0x04 5. "NOTFULLSTATUSUUMB2,Not full status bit for user u mailbox 2" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x00 4. 0x04 4. "NEWMSGSTATUSUUMB2,New message status bit for user u mailbox 2" "No interrupt,Interrupt" newline setclrfld.long 0x00 3. 0x00 3. 0x04 3. "NOTFULLSTATUSUUMB1,Not full status bit for user u mailbox 1" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x00 2. 0x04 2. "NEWMSGSTATUSUUMB1,New message status bit for user u mailbox 1" "No interrupt,Interrupt" newline setclrfld.long 0x00 1. 0x00 1. 0x04 1. "NOTFULLSTATUSUUMB0,Not full status bit for user u mailbox 0" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x00 0. 0x04 0. "NEWMSGSTATUSUUMB0,New message status bit for user u mailbox 0" "No interrupt,Interrupt" group.long (0x110+0x08)++0x03 line.long 0x00 "IRQENABLE_1_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. "NOTFULLSTATUSUUMB7,Not full status bit for user u mailbox 7" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x00 14. 0x04 14. "NEWMSGSTATUSUUMB7,New message status bit for user u mailbox 7" "No interrupt,Interrupt" newline setclrfld.long 0x00 13. 0x00 13. 0x04 13. "NOTFULLSTATUSUUMB6,Not full status bit for user u mailbox 6" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x00 12. 0x04 12. "NEWMSGSTATUSUUMB6,New message status bit for user u mailbox 6" "No interrupt,Interrupt" newline setclrfld.long 0x00 11. 0x00 11. 0x04 11. "NOTFULLSTATUSUUMB5,Not full status bit for user u mailbox 5" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x00 10. 0x04 10. "NEWMSGSTATUSUUMB5,New message status bit for user u mailbox 5" "No interrupt,Interrupt" newline setclrfld.long 0x00 9. 0x00 9. 0x04 9. "NOTFULLSTATUSUUMB4,Not full status bit for user u mailbox 4" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x00 8. 0x04 8. "NEWMSGSTATUSUUMB4,New message status bit for user u mailbox 4" "No interrupt,Interrupt" newline setclrfld.long 0x00 7. 0x00 7. 0x04 7. "NOTFULLSTATUSUUMB3,Not full status bit for user u mailbox 3" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x00 6. 0x04 6. "NEWMSGSTATUSUUMB3,New message status bit for user u mailbox 3" "No interrupt,Interrupt" newline setclrfld.long 0x00 5. 0x00 5. 0x04 5. "NOTFULLSTATUSUUMB2,Not full status bit for user u mailbox 2" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x00 4. 0x04 4. "NEWMSGSTATUSUUMB2,New message status bit for user u mailbox 2" "No interrupt,Interrupt" newline setclrfld.long 0x00 3. 0x00 3. 0x04 3. "NOTFULLSTATUSUUMB1,Not full status bit for user u mailbox 1" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x00 2. 0x04 2. "NEWMSGSTATUSUUMB1,New message status bit for user u mailbox 1" "No interrupt,Interrupt" newline setclrfld.long 0x00 1. 0x00 1. 0x04 1. "NOTFULLSTATUSUUMB0,Not full status bit for user u mailbox 0" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x00 0. 0x04 0. "NEWMSGSTATUSUUMB0,New message status bit for user u mailbox 0" "No interrupt,Interrupt" group.long 0x120++0x03 line.long 0x00 "IRQSTATUS_2_SET/CLR,Interrupt Status Register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. "NOTFULLSTATUSUUMB7,Not full status bit for user u mailbox 7" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x00 14. 0x04 14. "NEWMSGSTATUSUUMB7,New message status bit for user u mailbox 7" "No interrupt,Interrupt" newline setclrfld.long 0x00 13. 0x00 13. 0x04 13. "NOTFULLSTATUSUUMB6,Not full status bit for user u mailbox 6" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x00 12. 0x04 12. "NEWMSGSTATUSUUMB6,New message status bit for user u mailbox 6" "No interrupt,Interrupt" newline setclrfld.long 0x00 11. 0x00 11. 0x04 11. "NOTFULLSTATUSUUMB5,Not full status bit for user u mailbox 5" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x00 10. 0x04 10. "NEWMSGSTATUSUUMB5,New message status bit for user u mailbox 5" "No interrupt,Interrupt" newline setclrfld.long 0x00 9. 0x00 9. 0x04 9. "NOTFULLSTATUSUUMB4,Not full status bit for user u mailbox 4" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x00 8. 0x04 8. "NEWMSGSTATUSUUMB4,New message status bit for user u mailbox 4" "No interrupt,Interrupt" newline setclrfld.long 0x00 7. 0x00 7. 0x04 7. "NOTFULLSTATUSUUMB3,Not full status bit for user u mailbox 3" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x00 6. 0x04 6. "NEWMSGSTATUSUUMB3,New message status bit for user u mailbox 3" "No interrupt,Interrupt" newline setclrfld.long 0x00 5. 0x00 5. 0x04 5. "NOTFULLSTATUSUUMB2,Not full status bit for user u mailbox 2" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x00 4. 0x04 4. "NEWMSGSTATUSUUMB2,New message status bit for user u mailbox 2" "No interrupt,Interrupt" newline setclrfld.long 0x00 3. 0x00 3. 0x04 3. "NOTFULLSTATUSUUMB1,Not full status bit for user u mailbox 1" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x00 2. 0x04 2. "NEWMSGSTATUSUUMB1,New message status bit for user u mailbox 1" "No interrupt,Interrupt" newline setclrfld.long 0x00 1. 0x00 1. 0x04 1. "NOTFULLSTATUSUUMB0,Not full status bit for user u mailbox 0" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x00 0. 0x04 0. "NEWMSGSTATUSUUMB0,New message status bit for user u mailbox 0" "No interrupt,Interrupt" group.long (0x120+0x08)++0x03 line.long 0x00 "IRQENABLE_2_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. "NOTFULLSTATUSUUMB7,Not full status bit for user u mailbox 7" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x00 14. 0x04 14. "NEWMSGSTATUSUUMB7,New message status bit for user u mailbox 7" "No interrupt,Interrupt" newline setclrfld.long 0x00 13. 0x00 13. 0x04 13. "NOTFULLSTATUSUUMB6,Not full status bit for user u mailbox 6" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x00 12. 0x04 12. "NEWMSGSTATUSUUMB6,New message status bit for user u mailbox 6" "No interrupt,Interrupt" newline setclrfld.long 0x00 11. 0x00 11. 0x04 11. "NOTFULLSTATUSUUMB5,Not full status bit for user u mailbox 5" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x00 10. 0x04 10. "NEWMSGSTATUSUUMB5,New message status bit for user u mailbox 5" "No interrupt,Interrupt" newline setclrfld.long 0x00 9. 0x00 9. 0x04 9. "NOTFULLSTATUSUUMB4,Not full status bit for user u mailbox 4" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x00 8. 0x04 8. "NEWMSGSTATUSUUMB4,New message status bit for user u mailbox 4" "No interrupt,Interrupt" newline setclrfld.long 0x00 7. 0x00 7. 0x04 7. "NOTFULLSTATUSUUMB3,Not full status bit for user u mailbox 3" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x00 6. 0x04 6. "NEWMSGSTATUSUUMB3,New message status bit for user u mailbox 3" "No interrupt,Interrupt" newline setclrfld.long 0x00 5. 0x00 5. 0x04 5. "NOTFULLSTATUSUUMB2,Not full status bit for user u mailbox 2" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x00 4. 0x04 4. "NEWMSGSTATUSUUMB2,New message status bit for user u mailbox 2" "No interrupt,Interrupt" newline setclrfld.long 0x00 3. 0x00 3. 0x04 3. "NOTFULLSTATUSUUMB1,Not full status bit for user u mailbox 1" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x00 2. 0x04 2. "NEWMSGSTATUSUUMB1,New message status bit for user u mailbox 1" "No interrupt,Interrupt" newline setclrfld.long 0x00 1. 0x00 1. 0x04 1. "NOTFULLSTATUSUUMB0,Not full status bit for user u mailbox 0" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x00 0. 0x04 0. "NEWMSGSTATUSUUMB0,New message status bit for user u mailbox 0" "No interrupt,Interrupt" group.long 0x130++0x03 line.long 0x00 "IRQSTATUS_3_SET/CLR,Interrupt Status Register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. "NOTFULLSTATUSUUMB7,Not full status bit for user u mailbox 7" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x00 14. 0x04 14. "NEWMSGSTATUSUUMB7,New message status bit for user u mailbox 7" "No interrupt,Interrupt" newline setclrfld.long 0x00 13. 0x00 13. 0x04 13. "NOTFULLSTATUSUUMB6,Not full status bit for user u mailbox 6" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x00 12. 0x04 12. "NEWMSGSTATUSUUMB6,New message status bit for user u mailbox 6" "No interrupt,Interrupt" newline setclrfld.long 0x00 11. 0x00 11. 0x04 11. "NOTFULLSTATUSUUMB5,Not full status bit for user u mailbox 5" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x00 10. 0x04 10. "NEWMSGSTATUSUUMB5,New message status bit for user u mailbox 5" "No interrupt,Interrupt" newline setclrfld.long 0x00 9. 0x00 9. 0x04 9. "NOTFULLSTATUSUUMB4,Not full status bit for user u mailbox 4" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x00 8. 0x04 8. "NEWMSGSTATUSUUMB4,New message status bit for user u mailbox 4" "No interrupt,Interrupt" newline setclrfld.long 0x00 7. 0x00 7. 0x04 7. "NOTFULLSTATUSUUMB3,Not full status bit for user u mailbox 3" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x00 6. 0x04 6. "NEWMSGSTATUSUUMB3,New message status bit for user u mailbox 3" "No interrupt,Interrupt" newline setclrfld.long 0x00 5. 0x00 5. 0x04 5. "NOTFULLSTATUSUUMB2,Not full status bit for user u mailbox 2" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x00 4. 0x04 4. "NEWMSGSTATUSUUMB2,New message status bit for user u mailbox 2" "No interrupt,Interrupt" newline setclrfld.long 0x00 3. 0x00 3. 0x04 3. "NOTFULLSTATUSUUMB1,Not full status bit for user u mailbox 1" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x00 2. 0x04 2. "NEWMSGSTATUSUUMB1,New message status bit for user u mailbox 1" "No interrupt,Interrupt" newline setclrfld.long 0x00 1. 0x00 1. 0x04 1. "NOTFULLSTATUSUUMB0,Not full status bit for user u mailbox 0" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x00 0. 0x04 0. "NEWMSGSTATUSUUMB0,New message status bit for user u mailbox 0" "No interrupt,Interrupt" group.long (0x130+0x08)++0x03 line.long 0x00 "IRQENABLE_3_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. "NOTFULLSTATUSUUMB7,Not full status bit for user u mailbox 7" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x00 14. 0x04 14. "NEWMSGSTATUSUUMB7,New message status bit for user u mailbox 7" "No interrupt,Interrupt" newline setclrfld.long 0x00 13. 0x00 13. 0x04 13. "NOTFULLSTATUSUUMB6,Not full status bit for user u mailbox 6" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x00 12. 0x04 12. "NEWMSGSTATUSUUMB6,New message status bit for user u mailbox 6" "No interrupt,Interrupt" newline setclrfld.long 0x00 11. 0x00 11. 0x04 11. "NOTFULLSTATUSUUMB5,Not full status bit for user u mailbox 5" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x00 10. 0x04 10. "NEWMSGSTATUSUUMB5,New message status bit for user u mailbox 5" "No interrupt,Interrupt" newline setclrfld.long 0x00 9. 0x00 9. 0x04 9. "NOTFULLSTATUSUUMB4,Not full status bit for user u mailbox 4" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x00 8. 0x04 8. "NEWMSGSTATUSUUMB4,New message status bit for user u mailbox 4" "No interrupt,Interrupt" newline setclrfld.long 0x00 7. 0x00 7. 0x04 7. "NOTFULLSTATUSUUMB3,Not full status bit for user u mailbox 3" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x00 6. 0x04 6. "NEWMSGSTATUSUUMB3,New message status bit for user u mailbox 3" "No interrupt,Interrupt" newline setclrfld.long 0x00 5. 0x00 5. 0x04 5. "NOTFULLSTATUSUUMB2,Not full status bit for user u mailbox 2" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x00 4. 0x04 4. "NEWMSGSTATUSUUMB2,New message status bit for user u mailbox 2" "No interrupt,Interrupt" newline setclrfld.long 0x00 3. 0x00 3. 0x04 3. "NOTFULLSTATUSUUMB1,Not full status bit for user u mailbox 1" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x00 2. 0x04 2. "NEWMSGSTATUSUUMB1,New message status bit for user u mailbox 1" "No interrupt,Interrupt" newline setclrfld.long 0x00 1. 0x00 1. 0x04 1. "NOTFULLSTATUSUUMB0,Not full status bit for user u mailbox 0" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x00 0. 0x04 0. "NEWMSGSTATUSUUMB0,New message status bit for user u mailbox 0" "No interrupt,Interrupt" tree.end tree "Spinlock" base ad:0x480CA000 rgroup.long 0x00++0x03 line.long 0x00 "REV,IP Revision Register" group.long 0x10++0x03 line.long 0x00 "SYSCONFIG,SYSCONFIG Register" rbitfld.long 0x00 8. "CLOCKACTIVITY,Indicates whether the module requires the OCP when in IDLE mode" "Not required,Required" rbitfld.long 0x00 3.--4. "SIDLEMODE,Idle mode" "Force-idle,No-idle,Smart-idle,?..." rbitfld.long 0x00 2. "ENWAKEUP,Asynchronous wakeup gereration enable" "Disabled,Enabled" bitfld.long 0x00 1. "SOFTRESET,Module software reset" "No reset,Reset" newline rbitfld.long 0x00 0. "AUTOGATING,Internal OCP clock gating strategy" "Free-running,Gated" rgroup.long 0x14++0x03 line.long 0x00 "SYSTATUS,SYSTATUS Register" hexmask.long.byte 0x00 24.--31. 1. "NUMLOCKS,NUMLOCKS" bitfld.long 0x00 15. "IU7,In-Use flag 7" "Not taken,Taken" bitfld.long 0x00 14. "IU6,In-Use flag 6" "Not taken,Taken" bitfld.long 0x00 13. "IU5,In-Use flag 5" "Not taken,Taken" newline bitfld.long 0x00 12. "IU4,In-Use flag 4" "Not taken,Taken" bitfld.long 0x00 11. "IU3,In-Use flag 3" "Not taken,Taken" bitfld.long 0x00 10. "IU2,In-Use flag 2" "Not taken,Taken" bitfld.long 0x00 9. "IU1,In-Use flag 1" "Not taken,Taken" newline bitfld.long 0x00 8. "IU0,In-Use flag 0" "Not taken,Taken" bitfld.long 0x00 0. "RESETDONE,RESET status" "In progress,Done" group.long 0x800++0x03 line.long 0x00 "LOCK_REG_0,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x804++0x03 line.long 0x00 "LOCK_REG_1,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x808++0x03 line.long 0x00 "LOCK_REG_2,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x80C++0x03 line.long 0x00 "LOCK_REG_3,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x810++0x03 line.long 0x00 "LOCK_REG_4,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x814++0x03 line.long 0x00 "LOCK_REG_5,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x818++0x03 line.long 0x00 "LOCK_REG_6,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x81C++0x03 line.long 0x00 "LOCK_REG_7,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x820++0x03 line.long 0x00 "LOCK_REG_8,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x824++0x03 line.long 0x00 "LOCK_REG_9,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x828++0x03 line.long 0x00 "LOCK_REG_10,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x82C++0x03 line.long 0x00 "LOCK_REG_11,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x830++0x03 line.long 0x00 "LOCK_REG_12,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x834++0x03 line.long 0x00 "LOCK_REG_13,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x838++0x03 line.long 0x00 "LOCK_REG_14,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x83C++0x03 line.long 0x00 "LOCK_REG_15,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x840++0x03 line.long 0x00 "LOCK_REG_16,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x844++0x03 line.long 0x00 "LOCK_REG_17,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x848++0x03 line.long 0x00 "LOCK_REG_18,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x84C++0x03 line.long 0x00 "LOCK_REG_19,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x850++0x03 line.long 0x00 "LOCK_REG_20,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x854++0x03 line.long 0x00 "LOCK_REG_21,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x858++0x03 line.long 0x00 "LOCK_REG_22,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x85C++0x03 line.long 0x00 "LOCK_REG_23,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x860++0x03 line.long 0x00 "LOCK_REG_24,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x864++0x03 line.long 0x00 "LOCK_REG_25,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x868++0x03 line.long 0x00 "LOCK_REG_26,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x86C++0x03 line.long 0x00 "LOCK_REG_27,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x870++0x03 line.long 0x00 "LOCK_REG_28,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x874++0x03 line.long 0x00 "LOCK_REG_29,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x878++0x03 line.long 0x00 "LOCK_REG_30,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" group.long 0x87C++0x03 line.long 0x00 "LOCK_REG_31,Lock Register" bitfld.long 0x00 0. "TAKEN,Lock take" "Not taken,Taken" tree.end tree.end tree "MMC (Multimedia Card)" base ad:0x481D8000 if (((d.l(ad:0x481D8000+0x110))&0x04)==0x04) group.long 0x110++0x03 line.long 0x00 "SD_SYSCONFIG,System Configuration Register" bitfld.long 0x00 8.--9. "CLOCKACTIVITY,Clocks activity during wake up mode period (Interface/functional clock )" "Off,On/off,Off/on,On" bitfld.long 0x00 3.--4. "SIDLEMODE,Power management" "Inactive mode,Normal mode,Wake-up mode,?..." newline bitfld.long 0x00 2. "ENAWAKEUP,Wake-up feature control" "Disabled,Enabled" bitfld.long 0x00 1. "SOFTRESET,Software reset" "No reset,Reset" newline bitfld.long 0x00 0. "AUTOIDLE,Internal clock gating strategy" "Free-running,Gated" else group.long 0x110++0x03 line.long 0x00 "SD_SYSCONFIG,System Configuration Register" bitfld.long 0x00 8.--9. "CLOCKACTIVITY,Clocks activity during wake up mode period (Interface/functional clock )" "Off,On/off,Off/on,On" bitfld.long 0x00 3.--4. "SIDLEMODE,Power management" "Inactive mode,Normal mode,?..." newline bitfld.long 0x00 2. "ENAWAKEUP,Wake-up feature control" "Disabled,Enabled" bitfld.long 0x00 1. "SOFTRESET,Software reset" "No reset,Reset" newline bitfld.long 0x00 0. "AUTOIDLE,Internal clock gating strategy" "Free-running,Gated" endif rgroup.long 0x114++0x03 line.long 0x00 "SD_SYSSTATUS,System Status Register" bitfld.long 0x00 0. "RESETDONE,Internal reset monitoring" "In progress,Done" group.long 0x124++0x07 line.long 0x00 "SD_CSRE,Card Status Response Error Register" line.long 0x04 "SD_SYSTEST,System Test Register" bitfld.long 0x04 16. "OBI,Out-of-band interrupt (Obi) data value" "Low,High" bitfld.long 0x04 15. "SDCD,Card detect input signal (Sdcd) data value" "Low,High" newline bitfld.long 0x04 14. "SDWP,Write protect input signal (Sdwp) data value" "Low,High" bitfld.long 0x04 13. "WAKD,Wake request output signal data value" "Low,High" newline bitfld.long 0x04 12. "SSB,Set status bit" "Low,High" bitfld.long 0x04 11. "D7D,DAT7 input/output signal data value" "Low,High" newline bitfld.long 0x04 10. "D6D,DAT6 input/output signal data value" "Low,High" bitfld.long 0x04 9. "D5D,DAT5 input/output signal data value" "Low,High" newline bitfld.long 0x04 8. "D4D,DAT4 input/output signal data value" "Low,High" bitfld.long 0x04 7. "D3D,DAT3 input/output signal data value" "Low,High" newline bitfld.long 0x04 6. "D2D,DAT2 input/output signal data value" "Low,High" bitfld.long 0x04 5. "D1D,DAT1 input/output signal data value" "Low,High" newline bitfld.long 0x04 4. "D0D,DAT0 input/output signal data value" "Low,High" bitfld.long 0x04 3. "DDIR,Control of the DAT" "Output,Input" newline bitfld.long 0x04 2. "CDAT,CMD input/output signal data value" "Low,High" bitfld.long 0x04 1. "CDIR,Control of the CMD pin direction" "Output,Input" newline bitfld.long 0x04 0. "MCKD,MMC clock output signal data value" "Low,High" if (((d.l(ad:0x481D8000+0x22C))&0x04)==0x04) group.long 0x12C++0x03 line.long 0x00 "SD_CON,Configuration Register" bitfld.long 0x00 21. "SDMA_LNE,Slave DMA level/edge request" "Edge,Level" bitfld.long 0x00 20. "DMA_MNS,DMA master or slave selection" "Slave,?..." newline bitfld.long 0x00 18. "BOOT_CF0,Boot status supported" "Enabled,Released" bitfld.long 0x00 17. "BOOT_ACK,Book acknowledge received" "Not received,Received" newline bitfld.long 0x00 16. "CLKEXTFREE,External clock free running" "Disabled,Enabled" bitfld.long 0x00 15. "PADEN,Control power for MMC lines" "Not forced,Forced" newline bitfld.long 0x00 12. "CEATA,CE-ATA control mode" "Standard MMC/SD/SDIO,CE-ATA" bitfld.long 0x00 11. "CTPL,Control Power for mmc_dat[1] line" "Disable all,Except mmc_dat[1]" newline bitfld.long 0x00 9.--10. "DVAL,Debounce filter value" "33 us,231 us,1 ms,8.4 ms" bitfld.long 0x00 8. "WPP,Write protect polarity" "Active high,Active low" newline bitfld.long 0x00 7. "CDP,Card detect polarity" "Active high,Active low" bitfld.long 0x00 6. "MIT,MMC interrupt command" "Disabled,Enabled" newline bitfld.long 0x00 5. "DW8,8-bit mode MMC select" "1 bit or 4 bit,8 bit" bitfld.long 0x00 4. "MODE,Mode select" "Functional,STSTEST" newline bitfld.long 0x00 3. "STR,Stream command" "Block oriented,Stream oriented" bitfld.long 0x00 2. "HR,Broadcast host response" "Disabled,Enabled" newline bitfld.long 0x00 1. "INIT,Send initialization stream" "Disabled,Enabled" bitfld.long 0x00 0. "OD,Card open drain mode" "Disabled,Enabled" else group.long 0x12C++0x03 line.long 0x00 "SD_CON,Configuration Register" bitfld.long 0x00 21. "SDMA_LNE,Slave DMA level/edge request" "Edge,Level" bitfld.long 0x00 20. "DMA_MNS,DMA master or slave selection" "Slave,?..." newline bitfld.long 0x00 18. "BOOT_CF0,Boot status supported" "Enabled,Released" bitfld.long 0x00 17. "BOOT_ACK,Book acknowledge received" "Not received,Received" newline bitfld.long 0x00 16. "CLKEXTFREE,External clock free running" "Disabled,?..." bitfld.long 0x00 15. "PADEN,Control power for MMC lines" "Not forced,Forced" newline bitfld.long 0x00 12. "CEATA,CE-ATA control mode" "Standard MMC/SD/SDIO,CE-ATA" bitfld.long 0x00 11. "CTPL,Control power for mmc_dat[1] line" "Disable all,Except mmc_dat[1]" newline bitfld.long 0x00 9.--10. "DVAL,Debounce filter value" "33 us,231 us,1 ms,8.4 ms" bitfld.long 0x00 8. "WPP,Write protect polarity" "Active high,Active low" newline bitfld.long 0x00 7. "CDP,Card detect polarity" "Active high,Active low" bitfld.long 0x00 6. "MIT,MMC interrupt command" "Disabled,Enabled" newline bitfld.long 0x00 5. "DW8,8-bit mode MMC select" "1 bit or 4 bit,8 bit" bitfld.long 0x00 4. "MODE,Mode select" "Functional,STSTEST" newline bitfld.long 0x00 3. "STR,Stream command" "Block oriented,Stream oriented" bitfld.long 0x00 2. "HR,Broadcast host response" "Disabled,Enabled" newline bitfld.long 0x00 1. "INIT,Send initialization stream" "Disabled,Enabled" bitfld.long 0x00 0. "OD,Card open drain mode" "Disabled,Enabled" endif group.long 0x130++0x03 line.long 0x00 "SD_PWCNT,Power Counter" hexmask.long.word 0x00 0.--15. 1. "PWRCNT,Power counter register" rgroup.long 0x200++0x03 line.long 0x00 "SD_SDMASA,SDMA System Address Register" if (((d.l(ad:0x481D8000+0x20C))&0x22)==0x22) group.long 0x204++0x03 line.long 0x00 "SD_BLK,Transfer Length Configuration Register" hexmask.long.word 0x00 16.--31. 1. "NBLK,Blocks count for current transfer" hexmask.long.word 0x00 0.--11. 1. "BLEN,Transfer block size" else group.long 0x204++0x03 line.long 0x00 "SD_BLK,Transfer Length Configuration Register" hexmask.long.word 0x00 0.--11. 1. "BLEN,Transfer block size" endif group.long 0x208++0x07 line.long 0x00 "SD_ARG,Command Argument Register" line.long 0x04 "SD_CMD,Command And Transfer Mode" bitfld.long 0x04 24.--29. "INDX,Command index binary encoded value from 0 to 63 specifying the command number send to card" "CMD0 or ACMD0,CMD1 or ACMD1,CMD2 or ACMD2,CMD3 or ACMD3,CMD4 or ACMD4,CMD5 or ACMD5,CMD6 or ACMD6,CMD7 or ACMD7,CMD8 or ACMD8,CMD9 or ACMD9,CMD10 or ACMD10,CMD11 or ACMD11,CMD12 or ACMD12,CMD13 or ACMD13,CMD14 or ACMD14,CMD15 or ACMD15,CMD16 or ACMD16,CMD17 or ACMD17,CMD18 or ACMD18,CMD19 or ACMD19,CMD20 or ACMD20,CMD21 or ACMD21,CMD22 or ACMD22,CMD23 or ACMD23,CMD24 or ACMD24,CMD25 or ACMD25,CMD26 or ACMD26,CMD27 or ACMD27,CMD28 or ACMD28,CMD29 or ACMD29,CMD30 or ACMD30,CMD31 or ACMD31,CMD32 or ACMD32,CMD33 or ACMD33,CMD34 or ACMD34,CMD35 or ACMD35,CMD36 or ACMD36,CMD37 or ACMD37,CMD38 or ACMD38,CMD39 or ACMD39,CMD40 or ACMD40,CMD41 or ACMD41,CMD42 or ACMD42,CMD43 or ACMD43,CMD44 or ACMD44,CMD45 or ACMD45,CMD46 or ACMD46,CMD47 or ACMD47,CMD48 or ACMD48,CMD49 or ACMD49,CMD50 or ACMD5,CMD51 or ACMD5,CMD52 or ACMD5,CMD53 or ACMD5,CMD54 or ACMD5,CMD55 or ACMD5,CMD56 or ACMD5,CMD57 or ACMD5,CMD58 or ACMD5,CMD59 or ACMD5,CMD60 or ACMD60,CMD61 or ACMD61,CMD62 or ACMD62,CMD63 or ACMD63" bitfld.long 0x04 22.--23. "CMD,Command type" "Other,Suspend,Resume,Abort" newline bitfld.long 0x04 21. "DP,Data present select" "Not selected,Selected" bitfld.long 0x04 20. "CICE,Command index check enable" "Disabled,Enabled" newline bitfld.long 0x04 19. "CCCE,Command CRC check enable" "Disabled,Enabled" bitfld.long 0x04 16.--17. "RSP_TYPE,Response type" "No response,136 bits,48 bits,48 bits with busy" newline bitfld.long 0x04 5. "MSBS,Multi/single block select" "Single,Multi" bitfld.long 0x04 4. "DDIR,Data transfer direction" "Write,Read" newline bitfld.long 0x04 2. "ACEN,Auto CMD12 enable" "Disabled,Enabled" bitfld.long 0x04 1. "BCE,Block count enable" "Disabled,Enabled" newline bitfld.long 0x04 0. "DE,DMA enable" "Disabled,Enabled" rgroup.long 0x210++0x0F line.long 0x00 "SD_RSP10,Command Response 0 And 1 Register" hexmask.long.word 0x00 16.--31. 1. "RSP1,Command response [31:16]" hexmask.long.word 0x00 0.--15. 1. "RSP0,Command response [15:0]" line.long 0x04 "SD_RSP32,Command Response 2 And 3 Register" hexmask.long.word 0x04 16.--31. 1. "RSP3,Command response [63:48]" hexmask.long.word 0x04 0.--15. 1. "RSP2,Command response [47:32]" line.long 0x08 "SD_RSP54,Command Response 4 And 5 Register" hexmask.long.word 0x08 16.--31. 1. "RSP5,Command response [95:80]" hexmask.long.word 0x08 0.--15. 1. "RSP4,Command response [79:64]" line.long 0x0C "SD_RSP76,Command Response 6 And 7 Register" hexmask.long.word 0x0C 16.--31. 1. "RSP7,Command response [127:112]" hexmask.long.word 0x0C 0.--15. 1. "RSP6,Command response [111:96]" hgroup.long 0x220++0x03 hide.long 0x00 "SD_DATA,Data Register" in if (((d.l(ad:0x481D8000+0x12C))&0x180)==0x180) rgroup.long 0x224++0x03 line.long 0x00 "SD_PSTATE,Present State Register" bitfld.long 0x00 24. "CLEV,MMC_CMD line signal level" "0,1" bitfld.long 0x00 20.--23. "DLEV,MMC_DAT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 19. "WP,Write protect" "Not protected,Protected" bitfld.long 0x00 18. "CDPL,Card detect pin level" "1,0" newline bitfld.long 0x00 17. "CSS,Card state stable" "Reset or debouncing,Reset or debouncing" bitfld.long 0x00 16. "CINS,Card inserted" "Inserted,Removed" newline bitfld.long 0x00 11. "BRE,Buffer read enable" "Disabled,Enabled" bitfld.long 0x00 10. "BWE,Buffer write enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "RTA,Read transfer active" "Inactive,Active" bitfld.long 0x00 8. "WTA,Write transfer active" "Inactive,Active" newline bitfld.long 0x00 2. "DLA,MMC_DAT line active" "Inactive,Active" bitfld.long 0x00 1. "DATI,Command inhibit (Mmc_dat) disable" "No,Yes" newline bitfld.long 0x00 0. "CMDI,Command Inhibit(Mmc_cmd) disable" "No,Yes" elif (((d.l(ad:0x481D8000+0x12C))&0x180)==0x80) rgroup.long 0x224++0x03 line.long 0x00 "SD_PSTATE,Present State Register" bitfld.long 0x00 24. "CLEV,MMC_CMD line signal level" "0,1" bitfld.long 0x00 20.--23. "DLEV,MMC_DAT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 19. "WP,Write protect" "Protected,Not protected" bitfld.long 0x00 18. "CDPL,Card detect pin level" "1,0" newline bitfld.long 0x00 17. "CSS,Card state stable" "Reset or debouncing,Reset or debouncing" bitfld.long 0x00 16. "CINS,Card inserted" "Inserted,Removed" newline bitfld.long 0x00 11. "BRE,Buffer read enable" "Disabled,Enabled" bitfld.long 0x00 10. "BWE,Buffer write enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "RTA,Read transfer active" "Inactive,Active" bitfld.long 0x00 8. "WTA,Write transfer active" "Inactive,Active" newline bitfld.long 0x00 2. "DLA,MMC_DAT line active" "Inactive,Active" bitfld.long 0x00 1. "DATI,Command inhibit (Mmc_dat) disable" "No,Yes" newline bitfld.long 0x00 0. "CMDI,Command Inhibit(Mmc_cmd) disable" "No,Yes" elif (((d.l(ad:0x481D8000+0x12C))&0x180)==0x100) rgroup.long 0x224++0x03 line.long 0x00 "SD_PSTATE,Present State Register" bitfld.long 0x00 24. "CLEV,MMC_CMD line signal level" "0,1" bitfld.long 0x00 20.--23. "DLEV,MMC_DAT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 19. "WP,Write protect" "Not protected,Protected" bitfld.long 0x00 18. "CDPL,Card detect pin level" "1,0" newline bitfld.long 0x00 17. "CSS,Card state stable" "Reset or debouncing,Reset or debouncing" bitfld.long 0x00 16. "CINS,Card inserted" "Removed,Inserted" newline bitfld.long 0x00 11. "BRE,Buffer read enable" "Disabled,Enabled" bitfld.long 0x00 10. "BWE,Buffer write enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "RTA,Read transfer active" "Inactive,Active" bitfld.long 0x00 8. "WTA,Write transfer active" "Inactive,Active" newline bitfld.long 0x00 2. "DLA,MMC_DAT line active" "Inactive,Active" bitfld.long 0x00 1. "DATI,Command inhibit (Mmc_dat) disable" "No,Yes" newline bitfld.long 0x00 0. "CMDI,Command Inhibit(Mmc_cmd) disable" "No,Yes" else rgroup.long 0x224++0x03 line.long 0x00 "SD_PSTATE,Present State Register" bitfld.long 0x00 24. "CLEV,MMC_CMD line signal level" "0,1" bitfld.long 0x00 20.--23. "DLEV,MMC_DAT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 19. "WP,Write protect" "Protected,Not protected" bitfld.long 0x00 18. "CDPL,Card detect pin level" "1,0" newline bitfld.long 0x00 17. "CSS,Card state stable" "Reset or debouncing,Reset or debouncing" bitfld.long 0x00 16. "CINS,Card inserted" "Removed,Inserted" newline bitfld.long 0x00 11. "BRE,Buffer read enable" "Disabled,Enabled" bitfld.long 0x00 10. "BWE,Buffer write enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "RTA,Read transfer active" "Inactive,Active" bitfld.long 0x00 8. "WTA,Write transfer active" "Inactive,Active" newline bitfld.long 0x00 2. "DLA,MMC_DAT line active" "Inactive,Active" bitfld.long 0x00 1. "DATI,Command inhibit (Mmc_dat) disable" "No,Yes" newline bitfld.long 0x00 0. "CMDI,Command Inhibit(Mmc_cmd) disable" "No,Yes" endif if (((d.l(ad:0x481D8000+0x228))&0x02)==0x02) group.long 0x228++0x03 line.long 0x00 "SD_HCTL,Host Control Register" bitfld.long 0x00 27. "OBWE,Wake-up event enable for 'out-of-band' interrupt" "Disabled,Enabled" bitfld.long 0x00 26. "REM,Wake-up event enable on SD card removal" "Disabled,Enabled" newline bitfld.long 0x00 25. "INS,Wake-up event enable on SD card insertion" "Disabled,Enabled" bitfld.long 0x00 24. "IWE,Wake-up event enable on SD card interrupt" "Disabled,Enabled" newline bitfld.long 0x00 19. "IBG,Interrupt block at gap" "Disabled,Enabled" bitfld.long 0x00 18. "RWC,Read wait control" "Disabled,Enabled" newline bitfld.long 0x00 17. "CR,Continue request" "No effect,Restart" bitfld.long 0x00 16. "SBGR,Stop at block gap request" "Not requested,Requested" newline bitfld.long 0x00 9.--11. "SDVS,SD bus voltage select" ",,,,,1.8 V,3.0 V,3.3 V" bitfld.long 0x00 8. "SDBP,SD bus power" "Off,On" newline bitfld.long 0x00 7. "CDSS,Card detect signal selection" "SDCD,CDTL" bitfld.long 0x00 6. "CDTL,Card detect test level" "Not detected,Detected" newline bitfld.long 0x00 3.--4. "DMAS,DMA select" ",,32 bit address ADMA2,?..." bitfld.long 0x00 2. "HSPE,High speed enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "DTW,Data transfer width" "1 bit,4 bit" else group.long 0x228++0x03 line.long 0x00 "SD_HCTL,Host Control Register" bitfld.long 0x00 27. "OBWE,Wake-up event enable for 'out-of-band' interrupt" "Disabled,Enabled" bitfld.long 0x00 26. "REM,Wake-up event enable on SD card removal" "Disabled,Enabled" newline bitfld.long 0x00 25. "INS,Wake-up event enable on SD card insertion" "Disabled,Enabled" bitfld.long 0x00 24. "IWE,Wake-up event enable on SD card interrupt" "Disabled,Enabled" newline bitfld.long 0x00 18. "RWC,Read wait control" "Disabled,Enabled" bitfld.long 0x00 17. "CR,Continue request" "No effect,Restart" newline bitfld.long 0x00 16. "SBGR,Stop at block gap request" "Not requested,Requested" bitfld.long 0x00 9.--11. "SDVS,SD bus voltage select" ",,,,,1.8 V,3.0 V,3.3 V" newline bitfld.long 0x00 8. "SDBP,SD bus power" "Off,On" bitfld.long 0x00 7. "CDSS,Card detect signal selection" "SDCD#,CDTL" newline bitfld.long 0x00 6. "CDTL,Card detect test level" "Not detected,Detected" bitfld.long 0x00 3.--4. "DMAS,DMA select" ",,32 bit address ADMA2,?..." newline bitfld.long 0x00 2. "HSPE,High speed enable" "Disabled,Enabled" bitfld.long 0x00 1. "DTW,Data transfer width" "1 bit,4 bit" endif group.long 0x22C++0x0B line.long 0x00 "SD_SYSCTL,SD System Control Register" bitfld.long 0x00 26. "SRD,Software reset for mmc_dat line" "No reset,Reset" bitfld.long 0x00 25. "SRC,Software reset for mmc_cmd line" "No reset,Reset" newline bitfld.long 0x00 24. "SRA,Software reset for all" "Completed,Reset" bitfld.long 0x00 16.--19. "DTO,Data timeout counter value and busy timeout" "TCF x 2^13,TCF x 2^14,,,,,,,,,,,,TCF x 2^27,?..." newline hexmask.long.word 0x00 6.--15. 1. "CLKD,Clock frequency select" bitfld.long 0x00 2. "CEN,Clock enable" "Disabled,Enabled" newline rbitfld.long 0x00 1. "ICS,Internal clock stable (Status)" "Not stable,Stable" bitfld.long 0x00 0. "ICE,Internal clock enable" "Disabled,Enabled" line.long 0x04 "SD_STAT,SD Interrupt Status Register (Read/Write)" bitfld.long 0x04 29. "BADA,Bad access to data space" "No interrupt/No effect,Interrupt/Clear" bitfld.long 0x04 28. "CERR,Card error" "No error/No effect,Error/Clear" newline bitfld.long 0x04 25. "ADMAE,ADMA error" "No interrupt/No effect,Interrupt/Clear" bitfld.long 0x04 24. "ACE,Auto CMD12 error" "No error/No effect,Error/Clear" newline bitfld.long 0x04 22. "DEB,Data end bit error" "No error/No effect,Error/Clear" bitfld.long 0x04 21. "DCRC,Data CRC error" "No error/No effect,Error/Clear" newline bitfld.long 0x04 20. "DTO,Data timeout error" "No error/No effect,Error/Clear" bitfld.long 0x04 19. "CIE,Command index error" "No error/No effect,Error/Clear" newline bitfld.long 0x04 18. "CEB,Command end bit error" "No error/No effect,Error/Clear" bitfld.long 0x04 17. "CCRC,Command CRC error" "No error/No effect,Error/Clear" newline bitfld.long 0x04 16. "CTO,Command timeout error" "No error/No effect,Error/Clear" rbitfld.long 0x04 15. "ERRI,Error interrupt" "No interrupt,Interrupt" newline bitfld.long 0x04 10. "BSR,Boot status received interrupt" "No interrupt/No effect,Interrupt/Clear" rbitfld.long 0x04 9. "OBI,Out-of-band interrupt" "No interrupt,Interrupt" newline rbitfld.long 0x04 8. "CIRQ,Card interrupt" "No interrupt,Interrupt" bitfld.long 0x04 7. "CREM,Card removal" "Stable||Debouncing/No effect,Removed/Clear" newline bitfld.long 0x04 6. "CINS,Card insertion" "Stable||Debouncing/No effect,Inserted/Clear" bitfld.long 0x04 5. "BRR,Buffer read ready" "Not ready/No effect,Ready/Clear" newline bitfld.long 0x04 4. "BWR,Buffer write ready" "Not ready/No effect,Ready/Clear" bitfld.long 0x04 3. "DMA,DMA interrupt" "No interrupt/No effect,Interrupt/Clear" newline bitfld.long 0x04 2. "BGE,Block gap event" "No block gap/No effect,Block gap/Clear" bitfld.long 0x04 1. "TC,Transfer completed" "Not completed/No effect,Completed/Clear" newline bitfld.long 0x04 0. "CC,Command complete" "Not completed/No effect,Completed/Clear" line.long 0x08 "SD_IE,SD Interrupt Enable Register" bitfld.long 0x08 29. "BAD_ENABLEA,Bad access to data space interrupt enable" "Disabled,Enabled" bitfld.long 0x08 28. "CERR_ENABLE,Card error interrupt enable" "Disabled,Enabled" newline bitfld.long 0x08 25. "ADMAE_ENABLE,ADMA error interrupt enable" "Disabled,Enabled" bitfld.long 0x08 24. "ACE_ENABLE,Auto CMD12 error interrupt enable" "Disabled,Enabled" newline bitfld.long 0x08 22. "DEB_ENABLE,Data end bit error interrupt enable" "Disabled,Enabled" bitfld.long 0x08 21. "DCRC_ENABLE,Data CRC error interrupt enable" "Disabled,Enabled" newline bitfld.long 0x08 20. "DTO_ENABLE,Data timeout error interrupt enable" "Disabled,Enabled" bitfld.long 0x08 19. "CIE_ENABLE,Command index error interrupt enable" "Disabled,Enabled" newline bitfld.long 0x08 18. "CEB_ENABLE,Command end bit error interrupt enable" "Disabled,Enabled" bitfld.long 0x08 17. "CCRC_ENABLE,Command CRC error interrupt enable" "Disabled,Enabled" newline bitfld.long 0x08 16. "CTO_ENABLE,Command timeout error interrupt enable" "Disabled,Enabled" rbitfld.long 0x08 15. "NULL,Fixed to 0" "0,1" newline bitfld.long 0x08 10. "BSR_ENABLE,Boot status received interrupt interrupt enable" "Disabled,Enabled" bitfld.long 0x08 9. "OBI_ENABLE,Out-of-band interrupt interrupt enable" "Disabled,Enabled" newline bitfld.long 0x08 8. "CIRQ_ENABLE,Card interrupt interrupt enable" "Disabled,Enabled" bitfld.long 0x08 7. "CREM_ENABLE,Card removal interrupt enable" "Disabled,Enabled" newline bitfld.long 0x08 6. "CINS_ENABLE,Card insertion interrupt enable" "Disabled,Enabled" bitfld.long 0x08 5. "BRR_ENABLE,Buffer read ready interrupt enable" "Disabled,Enabled" newline bitfld.long 0x08 4. "BWR_ENABLE,Buffer write ready interrupt enable" "Disabled,Enabled" bitfld.long 0x08 3. "DMA_ENABLE,DMA interrupt interrupt enable" "Disabled,Enabled" newline bitfld.long 0x08 2. "BGE_ENABLE,Block gap event interrupt enable" "Disabled,Enabled" bitfld.long 0x08 1. "TC_ENABLE,Transfer completed interrupt enable" "Disabled,Enabled" newline bitfld.long 0x08 0. "CC_ENABLE,Command complete interrupt enable" "Disabled,Enabled" group.long 0x238++0x03 line.long 0x00 "SD_ISE,SD Interrupt Enable Set Register" bitfld.long 0x00 29. "BADA_SIGEN,Bad access to data space interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. "CERR_SIGEN,Card error interrupt signal status enable" "Disabled,Enabled" newline bitfld.long 0x00 25. "ADMA_SIGEN,ADMA error signal status enable" "Disabled,Enabled" bitfld.long 0x00 24. "ACE_SIGEN,Auto CMD12 error signal status enable" "Disabled,Enabled" newline bitfld.long 0x00 22. "DEB_SIGEN,Data end bit error signal status enable" "Disabled,Enabled" bitfld.long 0x00 21. "DCRC_SIGEN,Data CRC error signal status enable" "Disabled,Enabled" newline bitfld.long 0x00 20. "DTO_SIGEN,Data timeout error signal status enable" "Disabled,Enabled" bitfld.long 0x00 19. "CIE_SIGEN,Command index error signal status enable" "Disabled,Enabled" newline bitfld.long 0x00 18. "CEB_SIGEN,Command end bit error signal status enable" "Disabled,Enabled" bitfld.long 0x00 17. "CCRC_SIGEN,Command CRC error signal status enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "CTO_SIGEN,Command timeout error signal status enable" "Disabled,Enabled" rbitfld.long 0x00 15. "NULL,Fixed to 0" "0,1" newline bitfld.long 0x00 10. "BSR_SIGEN,Boot status signal status enable" "Disabled,Enabled" bitfld.long 0x00 9. "OBI_SIGEN,Out-of-band interrupt signal status enable" "Disabled,Enabled" newline bitfld.long 0x00 8. "CIRQ_SIGEN,Card interrupt signal status enable" "Disabled,Enabled" bitfld.long 0x00 7. "CREM_SIGEN,Card removal signal status enable" "Disabled,Enabled" newline bitfld.long 0x00 6. "CINS_SIGEN,Card insertion signal status enable" "Disabled,Enabled" bitfld.long 0x00 5. "BRR_SIGEN,Buffer read ready signal status enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "BWR_SIGEN,Buffer write ready signal status enable" "Disabled,Enabled" bitfld.long 0x00 3. "DMA_SIGEN,DMA signal status enable" "Disabled,Enabled" newline bitfld.long 0x00 2. "BGE_SIGEN,Block gap event signal status enable" "Disabled,Enabled" bitfld.long 0x00 1. "TC_SIGEN,Transfer completed signal status enable" "Disabled,Enabled" newline bitfld.long 0x00 0. "CC_SIGEN,Command completed signal status enable" "Disabled,Enabled" rgroup.long 0x23C++0x03 line.long 0x00 "SD_AC12,Auto CMD12 Error Status Register" bitfld.long 0x00 7. "CNI,Command not issue by auto CMD12 error" "No error,Not issued" bitfld.long 0x00 4. "ACIE,Auto CMD12 index error" "No error,Error" newline bitfld.long 0x00 3. "ACEB,Auto CMD12 end bit error" "No error,Error" bitfld.long 0x00 2. "ACCE,Auto CMD12 CRC error" "No error,Error" newline bitfld.long 0x00 1. "ACTO,Auto CMD12 timeout error" "No error,Error" bitfld.long 0x00 0. "ACNE,Auto CMD12 not executed" "Executed,Not executed" group.long 0x240++0x03 line.long 0x00 "SD_CAPA,Capabilities Register" bitfld.long 0x00 28. "BUS_64BIT,64 bit system bus support" "32 bit,64 bit" bitfld.long 0x00 26. "VS18,Voltage support 1.8 V" "Not supported,Supported" newline bitfld.long 0x00 25. "VS30,Voltage support 3.0V" "Not supported,Supported" bitfld.long 0x00 24. "VS33,Voltage support 3.3V" "Not supported,Supported" newline rbitfld.long 0x00 23. "SRS,Suspend/resume support" "Not supported,Supported" rbitfld.long 0x00 22. "DS,DMA support" "Not supported,Supported" newline rbitfld.long 0x00 21. "HSS,High-speed support" "Not supported,Supported" rbitfld.long 0x00 19. "AD2S,ADMA2 support" "Supported,Not supported" newline rbitfld.long 0x00 16.--17. "MBL,Maximum block length" "512 bytes,1024 bytes,2048 bytes,?..." rbitfld.long 0x00 8.--13. "BCF,Base clock frequency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline rbitfld.long 0x00 7. "TCU,Timeout clock unit" "Khz,Mhz" rbitfld.long 0x00 0.--5. "TCF,Timeout clock frequency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x248++0x03 line.long 0x00 "SD_CUR_CAPA,Current Capabilities Register" hexmask.long.byte 0x00 16.--23. 1. "CUR_1V8,Maximum current for 1.8 V" hexmask.long.byte 0x00 8.--15. 1. "CUR_3V0,Maximum current for 3.0 V" newline hexmask.long.byte 0x00 0.--7. 1. "CUR_3V3,Maximum current for 3.3 V" wgroup.long 0x250++0x03 line.long 0x00 "SD_FE,Force Event Register" bitfld.long 0x00 29. "FE_BADA,Force event bad access to data space" "No effect,Force" bitfld.long 0x00 28. "FE_CERR,Force event card error" "No effect,Force" newline bitfld.long 0x00 25. "FE_ADMAE,Force event ADMA error" "No effect,Force" bitfld.long 0x00 24. "FE_ACE,Force event auto CMD12 error" "No effect,Force" newline bitfld.long 0x00 22. "FE_DEB,Force event data end bit error" "No effect,Force" bitfld.long 0x00 21. "FE_DCRC,Force event data CRC error" "No effect,Force" newline bitfld.long 0x00 20. "FE_DTO,Force event data timeout error" "No effect,Force" bitfld.long 0x00 19. "FE_CIE,Force event command index error" "No effect,Force" newline bitfld.long 0x00 18. "FE_CEB,Force event command end bit error" "No effect,Force" bitfld.long 0x00 17. "FE_CCRC,Force event comemand CRC error" "No effect,Force" newline bitfld.long 0x00 16. "FE_CTO,Force event command timeout error" "No effect,Force" bitfld.long 0x00 7. "FE_CNI,Force event command not issue by auto CMD12 error" "No effect,Force" newline bitfld.long 0x00 4. "FE_ACIE,Force event auto CMD12 index error" "No effect,Force" bitfld.long 0x00 3. "FE_ACEB,Force event auto CMD12 end bit error" "No effect,Force" newline bitfld.long 0x00 2. "FE_ACCE,Force event auto CMD12 CRC error" "No effect,Force" bitfld.long 0x00 1. "FE_ACTO,Force event auto CMD12 timeout error" "No effect,Force" newline bitfld.long 0x00 0. "FE_ACNE,Force event auto CMD12 not executed" "No effect,Force" group.long 0x254++0x0B line.long 0x00 "SD_ADMAES,ADMA Error Status Register" bitfld.long 0x00 2. "LME,ADMA length mismatch error" "No error,Error" bitfld.long 0x00 0.--1. "AES,ADMA error state" "Stop DMA,Stop DMA,,Transfer data" line.long 0x04 "SD_ADMASAL,ADMA System Address Low Bits" line.long 0x08 "SD_ADMASAH,ADMA System Address High Bits" rgroup.long 0x2FC++0x03 line.long 0x00 "SD_REV,Versions Register" hexmask.long.byte 0x00 24.--31. 1. "VREV,Vendor version number" hexmask.long.byte 0x00 16.--23. 1. "SREV,Specification version number" newline bitfld.long 0x00 0. "SIS,Slot interrupt status" "0,1" tree.end tree "UART (Universal Asynchronous Receiver/Transmitter)" base ad:0x44E09000 if (((d.w(ad:0x44E09000+0x0C))&0x80)==0x80)&&(((d.w(ad:0x44E09000+0x0C))&0xFF)!=0xBF) group.word 0x00++0x01 line.word 0x00 "DLL,Divisor Latches Low Register" hexmask.word.byte 0x00 0.--7. 1. "CLOCK_LSB,Divisor latches low" group.word 0x04++0x01 line.word 0x00 "DLH,Divisor Latches High Register" bitfld.word 0x00 0.--5. "CLOCK_MSB,Divisor latches high" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" if (((d.w(ad:0x44E09000+0x20))&0x07)==(0x00||0x02||0x03)) rgroup.word 0x08++0x01 line.word 0x00 "IIR_UART,Interrupt Identification Register (Uart)" bitfld.word 0x00 6.--7. "FCR_MIRROR,Mirror the contents of FCR[0] on both bits" "0,1,2,3" bitfld.word 0x00 1.--5. "IT_TYPE,Interrupt select" "Modem,THR,RHR,Reveiver line status,,,Rx timeout,,Xoff/special char,,,,,,,,CTS/RST/DSR inactive,?..." newline bitfld.word 0x00 0. "IT_PENDING,Interrupt pending" "Pending,Not pending" elif (((d.w(ad:0x44E09000+0x20))&0x07)==0x06) rgroup.word 0x08++0x01 line.word 0x00 "IIR_CIR,Interrupt Identification Register (Cir)" bitfld.word 0x00 5. "TXSTATUSIT,TX status interrupt" "Inactive,Active" bitfld.word 0x00 3. "RXOEIT,RX overrun interrupt" "Inactive,Active" newline bitfld.word 0x00 2. "RXSTOPIT,Receive stop interrupt" "Inactive,Active" bitfld.word 0x00 1. "THRIT,THR interrupt" "Inactive,Active" newline bitfld.word 0x00 0. "RHRIT_,RHR interrupt" "Inactive,Active" elif (((d.w(ad:0x44E09000+0x20))&0x07)==(0x01||0x04||0x05)) rgroup.word 0x08++0x01 line.word 0x00 "IIR_IRDA,Interrupt Identification Register (Irda)" bitfld.word 0x00 7. "EOF_IT,Received EOF interrupt" "Inactive,Active" bitfld.word 0x00 6. "LINE_STS_IT,Receiver line status interrupt" "Inactive,Active" newline bitfld.word 0x00 5. "TX_STATUS_IT,TX status interrupt" "Inactive,Active" bitfld.word 0x00 4. "STS_FIFO_IT,Status FIFO trigger level interrupt" "Inactive,Active" newline bitfld.word 0x00 3. "RX_OE_IT,RX overrun interrupt" "Inactive,Active" bitfld.word 0x00 2. "RX_FIFO_LAST_BYTE_IT,Last byte of frame in RX FIFO interrupt" "Inactive,Active" newline bitfld.word 0x00 1. "THR_IT,THR interrupt" "Inactive,Active" bitfld.word 0x00 0. "RHR_IT,RHR interrupt" "Inactive,Active" endif if (((d.w(ad:0x44E09000))&0xFF)==0x00)&&(((d.w(ad:0x44E09000+0x04))&0x3F)==0x00) wgroup.word 0x08++0x01 line.word 0x00 "FCR,Fifocontrol Register" bitfld.word 0x00 6.--7. "RX_FIFO_TRIG,Trigger level for RX FIFO" "8 characters,16 characters,56 characters,60 characters" bitfld.word 0x00 4.--5. "TX_FIFO_TRIG,Trigger level for TX FIFO" "8 characters,16 characters,32 characters,56 characters" newline bitfld.word 0x00 3. "DMA_MODE,DMA mode" "0,1" bitfld.word 0x00 2. "TX_FIFO_CLEAR,Transmit FIFO clear" "No effect,Clear" newline bitfld.word 0x00 1. "RX_FIFO_CLEAR,Receive FIFO clear" "No effect,Clear" bitfld.word 0x00 0. "FIFO_EN,Transmit and receive fifos enable" "Disabled,Enabled" else wgroup.word 0x08++0x01 line.word 0x00 "FCR,FIFO control Register" bitfld.word 0x00 6.--7. "RX_FIFO_TRIG,Trigger level for RX FIFO" "8 characters,16 characters,56 characters,60 characters" bitfld.word 0x00 4.--5. "TX_FIFO_TRIG,Trigger level for TX FIFO" "8 characters,16 characters,32 characters,56 characters" newline bitfld.word 0x00 2. "TX_FIFO_CLEAR,Transmit FIFO clear" "No effect,Clear" bitfld.word 0x00 1. "RX_FIFO_CLEAR,Receive FIFO clear" "No effect,Clear" endif elif (((d.w(ad:0x44E09000+0x0C))&0xFF)==0xBF) group.word 0x00++0x01 line.word 0x00 "DLL,Divisor Latches Low Register" hexmask.word.byte 0x00 0.--7. 1. "CLOCK_LSB,Divisor latches low" group.word 0x04++0x01 line.word 0x00 "DLH,Divisor Latches High Register" bitfld.word 0x00 0.--5. "CLOCK_MSB,Divisor latches high" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" if (((d.w(ad:0x44E09000+0x20))&0x07)==(0x00||0x02||0x03)) group.word 0x08++0x01 line.word 0x00 "EFR,Enhanced Feature Register" bitfld.word 0x00 7. "AUTOCTSEN,Auto-CTS enable" "Disabled,Enabled" bitfld.word 0x00 6. "AUTORTSEN,Auto-RTS enable" "Disabled,Enabled" newline bitfld.word 0x00 5. "SPECIALCHARDETECT,Special character detect" "Disabled,Enabled" bitfld.word 0x00 4. "ENHANCEDEN,Enhanced functions write enable" "Disabled,Enabled" newline bitfld.word 0x00 0.--3. "SWFLOWCONTROL,Software flow control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.word 0x08++0x01 line.word 0x00 "EFR,Enhanced Feature Register" bitfld.word 0x00 4. "ENHANCEDEN,Enhanced functions write enable" "Disabled,Enabled" bitfld.word 0x00 0.--3. "SWFLOWCONTROL,Software flow control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif elif (((d.w(ad:0x44E09000+0x0C))&0xFF)==0x00) wgroup.word 0x00++0x01 line.word 0x00 "THR,Transmit Holding Register" hexmask.word.byte 0x00 0.--7. 1. "THR,Transmit holding register" hgroup.word 0x00++0x01 hide.word 0x00 "RHR,Receiver Holding Register" in if (((d.w(ad:0x44E09000+0x20))&0x07)==(0x01||0x04||0x05)) group.word 0x04++0x01 line.word 0x00 "IER_IRDA,Interrupt Enable Register (Irda)" bitfld.word 0x00 7. "EOFIT,Received EOF interrupt enable" "Disabled,Enabled" bitfld.word 0x00 6. "LINESTSITM,Receiver line status interrupt enable" "Disabled,Enabled" newline bitfld.word 0x00 5. "TXSTATUSIT,TX status interrupt enable" "Disabled,Enabled" bitfld.word 0x00 4. "STSFIFOTRIGIT,Status FIFO trigger level interrupt enable" "Disabled,Enabled" newline bitfld.word 0x00 3. "RXOVERRUNIT,RX overrun interrupt enable" "Disabled,Enabled" bitfld.word 0x00 2. "LASTRXBYTEIT,Last byte of frame in RX FIFO interrupt enable" "Disabled,Enabled" newline bitfld.word 0x00 1. "THRIT,THR interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0. "RHRIT,RHR interrupt enable" "Disabled,Enabled" elif (((d.w(ad:0x44E09000+0x20))&0x07)==0x06) group.word 0x04++0x01 line.word 0x00 "IER_CIR,Interrupt Enable Register (CIR)" bitfld.word 0x00 5. "TXSTATUSIT,TX status interrupt enable" "Disabled,Enabled" bitfld.word 0x00 3. "RXOVERRUNIT,RX overrun interrupt enable" "Disabled,Enabled" newline bitfld.word 0x00 2. "RXSTOPIT,RX stop interrupt enable" "Disabled,Enabled" bitfld.word 0x00 1. "THRIT,THR interrupt enable" "Disabled,Enabled" newline bitfld.word 0x00 0. "RHRIT,RHR interrupt enable" "Disabled,Enabled" else group.word 0x04++0x01 line.word 0x00 "IER_UART,Interrupt Enable Register (Uart)" bitfld.word 0x00 7. "CTSIT,CTS (Active-low) interrupt enable" "Disabled,Enabled" bitfld.word 0x00 6. "RTSIT,RTS (Active-low) interrupt enable" "Disabled,Enabled" newline bitfld.word 0x00 5. "XOFFIT,XOFF interrupt enable" "Disabled,Enabled" bitfld.word 0x00 4. "SLEEPMODE,Sleep mode enable" "Disabled,Enabled" newline bitfld.word 0x00 3. "MODEMSTSIT,Modem status register interrupt enable" "Disabled,Enabled" bitfld.word 0x00 2. "LINESTSIT,Receiver line status interrupt enable" "Disabled,Enabled" newline bitfld.word 0x00 1. "THRIT,THR interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0. "RHRIT,RHR interrupt and time out interrupt enable" "Disabled,Enabled" endif if (((d.w(ad:0x44E09000+0x20))&0x07)==(0x01||0x04||0x05)) rgroup.word 0x08++0x01 line.word 0x00 "IIR_IRDA,Interrupt Identification Register (Irda)" bitfld.word 0x00 7. "EOF_IT,Received EOF interrupt" "Inactive,Active" bitfld.word 0x00 6. "LINE_STS_IT,Receiver line status interrupt" "Inactive,Active" newline bitfld.word 0x00 5. "TX_STATUS_IT,TX status interrupt" "Inactive,Active" bitfld.word 0x00 4. "STS_FIFO_IT,Status FIFO trigger level interrupt" "Inactive,Active" newline bitfld.word 0x00 3. "RX_OE_IT,RX overrun interrupt" "Inactive,Active" bitfld.word 0x00 2. "RX_FIFO_LAST_BYTE_IT,Last byte of frame in RX FIFO interrupt" "Inactive,Active" newline bitfld.word 0x00 1. "THR_IT,THR interrupt" "Inactive,Active" bitfld.word 0x00 0. "RHR_IT,RHR interrupt" "Inactive,Active" elif (((d.w(ad:0x44E09000+0x20))&0x07)==(0x00||0x02||0x03)) rgroup.word 0x08++0x01 line.word 0x00 "IIR_UART,Interrupt Identification Register (Uart)" bitfld.word 0x00 6.--7. "FCR_MIRROR,Mirror the contents of FCR[0] on both bits" "0,1,2,3" bitfld.word 0x00 1.--5. "IT_TYPE,Interrupt select" "Modem,THR,RHR,Reveiver line status,,,Rx timeout,,Xoff/special char,,,,,,,,CTS/RST/DSR inactive,?..." newline bitfld.word 0x00 0. "IT_PENDING,Interrupt pending" "Pending,Not pending" else rgroup.word 0x08++0x01 line.word 0x00 "IIR_CIR,Interrupt Identification Register (Cir)" bitfld.word 0x00 5. "TXSTATUSIT,TX status interrupt" "Inactive,Active" bitfld.word 0x00 3. "RXOEIT,RX overrun interrupt" "Inactive,Active" newline bitfld.word 0x00 2. "RXSTOPIT,Receive stop interrupt" "Inactive,Active" bitfld.word 0x00 1. "THRIT,THR interrupt" "Inactive,Active" newline bitfld.word 0x00 0. "RHRIT_,RHR interrupt" "Inactive,Active" endif wgroup.word 0x08++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 6.--7. "RX_FIFO_TRIG,Trigger level for RX FIFO" "8 characters,16 characters,56 characters,60 characters" bitfld.word 0x00 4.--5. "TX_FIFO_TRIG,Trigger level for TX FIFO" "8 characters,16 characters,32 characters,56 characters" newline bitfld.word 0x00 3. "DMA_MODE,DMA mode" "0,1" bitfld.word 0x00 2. "TX_FIFO_CLEAR,Transmit FIFO clear" "No effect,Clear" newline bitfld.word 0x00 1. "RX_FIFO_CLEAR,Receive FIFO clear" "No effect,Clear" bitfld.word 0x00 0. "FIFO_EN,Transmit and receive fifos enable" "Disabled,Enabled" endif if (((d.w(ad:0x44E09000+0x0C))&0x18)==0x08) group.word 0x0C++0x01 line.word 0x00 "LCR,Line Control Register" bitfld.word 0x00 7. "DIV_EN,Divisor latch enable" "Disabled,Enabled" bitfld.word 0x00 6. "BREAK_EN,Break control bit" "Disabled,Enabled" newline bitfld.word 0x00 5. "PARITY_TYPE2,Party bit type" "PARITY_TYPE1,Forced low" bitfld.word 0x00 4. "PARITY_TYPE1,Party bit type" "Odd,Even" newline bitfld.word 0x00 3. "PARITY_EN,Parity bit" "Disabled,Enabled" bitfld.word 0x00 2. "NB_STOP,Number of stop bits" "1 bit,1.5 bits" newline bitfld.word 0x00 0.--1. "CHAR_LENGTH,Word length to be transmitted or received" "5 bits,6 bits,7 bits,8 bits" elif (((d.w(ad:0x44E09000+0x0C))&0x18)==0x18) group.word 0x0C++0x01 line.word 0x00 "LCR,Line Control Register" bitfld.word 0x00 7. "DIV_EN,Divisor latch enable" "Disabled,Enabled" bitfld.word 0x00 6. "BREAK_EN,Break control bit" "Disabled,Enabled" newline bitfld.word 0x00 5. "PARITY_TYPE2,Party bit type" "PARITY_TYPE1,Forced high" bitfld.word 0x00 4. "PARITY_TYPE1,Party bit type" "Odd,Even" newline bitfld.word 0x00 3. "PARITY_EN,Parity bit" "Disabled,Enabled" bitfld.word 0x00 2. "NB_STOP,Number of stop bits" "1 bit,1.5 bits" newline bitfld.word 0x00 0.--1. "CHAR_LENGTH,Word length to be transmitted or received" "5 bits,6 bits,7 bits,8 bits" else group.word 0x0C++0x01 line.word 0x00 "LCR,Line Control Register" bitfld.word 0x00 7. "DIV_EN,Divisor latch enable" "Disabled,Enabled" bitfld.word 0x00 6. "BREAK_EN,Break control bit" "Disabled,Enabled" newline rbitfld.word 0x00 5. "PARITY_TYPE2,Party bit type" "PARITY_TYPE1,Forced" rbitfld.word 0x00 4. "PARITY_TYPE1,Party bit type" "Odd,Even" newline bitfld.word 0x00 3. "PARITY_EN,Parity bit" "Disabled,Enabled" bitfld.word 0x00 2. "NB_STOP,Number of stop bits" "1 bit,1.5 bits" newline bitfld.word 0x00 0.--1. "CHAR_LENGTH,Word length to be transmitted or received" "5 bits,6 bits,7 bits,8 bits" endif if (((d.w(ad:0x44E09000+0x0C))&0x80)==0x80)&&(((d.w(ad:0x44E09000+0x0C))&0xFF)!=0xBF) if (((d.w(ad:0x44E09000+0x10))&0x10)==0x10) group.word 0x10++0x01 line.word 0x00 "MCR,Modem Control Register" bitfld.word 0x00 6. "TCRTLR,TCR and TLR acces enable" "No action,Enabled" bitfld.word 0x00 5. "XONEN,XON enable" "Disabled,Enabled" newline bitfld.word 0x00 4. "LOOPBACKEN,Loopback mode enable" "Disabled,Enabled" bitfld.word 0x00 3. "CDSTSCH,DCD (Active-low) input force / IRQ output force" "High/inactive,Low/inactive" newline bitfld.word 0x00 2. "RISTSCH,RI (Active-low) input force" "Inactive,Active" bitfld.word 0x00 1. "RTS,RTS (Active-low) output force" "Inactive,Active" newline bitfld.word 0x00 0. "DTR,DTR (Active-low) output force" "Inactive,Active" else group.word 0x10++0x01 line.word 0x00 "MCR,Modem Control Register" bitfld.word 0x00 6. "TCRTLR,TCR and TLR acces enable" "No action,Enabled" bitfld.word 0x00 5. "XONEN,XON enable" "Disabled,Enabled" newline bitfld.word 0x00 4. "LOOPBACKEN,Loopback mode enable" "Disabled,Enabled" endif if (((d.w(ad:0x44E09000+0x20))&0x07)==0x06) hgroup.word 0x14++0x01 hide.word 0x00 "LSR_CIR,Line Status Register (Cir)" in elif (((d.w(ad:0x44E09000+0x20))&0x07)==(0x01||0x04||0x05)) hgroup.word 0x14++0x01 hide.word 0x00 "LSR_IRDA,Line Status Register (Irda)" in else hgroup.word 0x14++0x01 hide.word 0x00 "LSR_UART,Line Status Register (Uart)" in endif if (((d.w(ad:0x44E09000+0x10))&0x40)==0x40) group.word 0x18++0x01 line.word 0x00 "TCR,Transmission Control Register" bitfld.word 0x00 4.--7. "RXFIFOTRIGSTART,RX FIFO trigger level to RESTORE transmission" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. "RXFIFOTRIGHALT,RX FIFO trigger level to HALT transmission" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.word 0x1C++0x01 line.word 0x00 "TLR,Trigger Level Register" bitfld.word 0x00 4.--7. "RX_FIFO_TRIG_DMA,Receive FIFO trigger level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. "TX_FIFO_TRIG_DMA,Transmit FIFO trigger level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else hgroup.word 0x18++0x01 hide.word 0x00 "MSR,Modem Status Register" in group.word 0x1C++0x01 line.word 0x00 "SPR,Scratchpad Register" hexmask.word.byte 0x00 0.--7. 1. "SPR_WORD,Scratchpad register" endif elif (((d.w(ad:0x44E09000+0x0C))&0xFF)==0xBF) group.word 0x10++0x01 line.word 0x00 "XON1_ADDR1,XON1/ADDR1 Register" hexmask.word.byte 0x00 0.--7. 1. "XONWORD1,Stores the 8 bit XON1 character in UART modes and ADDR1 address 1 in irda modes" group.word 0x14++0x01 line.word 0x00 "XON2_ADDR2,XON2/ADDR2 Register" hexmask.word.byte 0x00 0.--7. 1. "XONWORD2,Stores the 8 bit XON2 character in UART modes and ADDR2 address 2 in irda modes" if (((d.w(ad:0x44E09000+0x08))&0x10)==0x10) if (((d.w(ad:0x44E09000+0x08))&0x10)==0x10) group.word 0x18++0x01 line.word 0x00 "TCR,Transmission Control Register" bitfld.word 0x00 4.--7. "RXFIFOTRIGSTART,RX FIFO trigger level to RESTORE transmission" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. "RXFIFOTRIGHALT,RX FIFO trigger level to HALT transmission" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.word 0x1C++0x01 line.word 0x00 "TLR,Trigger Level Register" bitfld.word 0x00 4.--7. "RX_FIFO_TRIG_DMA,Receive FIFO trigger level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. "TX_FIFO_TRIG_DMA,Transmit FIFO trigger level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.word 0x18++0x01 line.word 0x00 "XOFF1,XOFF1 Register" hexmask.word.byte 0x00 0.--7. 1. "XOFFWORD1,Stores the 8 bit XOFF1 character in UART modes" group.word 0x1C++0x01 line.word 0x00 "XOFF2,XOFF2 Register" hexmask.word.byte 0x00 0.--7. 1. "XOFFWORD2,Stores the 8 bit XOFF2 character in UART modes" endif elif (((d.w(ad:0x44E09000+0x0C))&0xFF)==0x00) if (((d.w(ad:0x44E09000+0x10))&0x10)==0x10) group.word 0x10++0x01 line.word 0x00 "MCR,Modem Control Register" bitfld.word 0x00 6. "TCRTLR,TCR and TLR acces enable" "No action,Enabled" bitfld.word 0x00 5. "XONEN,XON enable" "Disabled,Enabled" newline bitfld.word 0x00 4. "LOOPBACKEN,Loopback mode enable" "Disabled,Enabled" bitfld.word 0x00 3. "CDSTSCH,DCD (Active-low) input force / IRQ output force" "High/inactive,Low/inactive" newline bitfld.word 0x00 2. "RISTSCH,RI (Active-low) input force" "Inactive,Active" bitfld.word 0x00 1. "RTS,RTS (Active-low) output force" "Inactive,Active" newline bitfld.word 0x00 0. "DTR,DTR (Active-low) output force" "Inactive,Active" else group.word 0x10++0x01 line.word 0x00 "MCR,Modem Control Register" bitfld.word 0x00 6. "TCRTLR,TCR and TLR acces enable" "No action,Enabled" bitfld.word 0x00 5. "XONEN,XON enable" "Disabled,Enabled" newline bitfld.word 0x00 4. "LOOPBACKEN,Loopback mode enable" "Disabled,Enabled" endif if (((d.w(ad:0x44E09000+0x20))&0x07)==0x06) hgroup.word 0x14++0x01 hide.word 0x00 "LSR_CIR,Line Status Register (Cir)" in elif (((d.w(ad:0x44E09000+0x20))&0x07)==(0x01||0x04||0x05)) hgroup.word 0x14++0x01 hide.word 0x00 "LSR_IRDA,Line Status Register (Irda)" in else hgroup.word 0x14++0x01 hide.word 0x00 "LSR_UART,Line Status Register (Uart)" in endif if (((d.w(ad:0x44E09000+0x08))&0x40)==0x40) if (((d.w(ad:0x44E09000+0x10))&0x40)==0x40) group.word 0x18++0x01 line.word 0x00 "TCR,Transmission Control Register" bitfld.word 0x00 4.--7. "RXFIFOTRIGSTART,RX FIFO trigger level to RESTORE transmission" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. "RXFIFOTRIGHALT,RX FIFO trigger level to HALT transmission" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.word 0x1C++0x01 line.word 0x00 "TLR,Trigger Level Register" bitfld.word 0x00 4.--7. "RX_FIFO_TRIG_DMA,Receive FIFO trigger level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. "TX_FIFO_TRIG_DMA,Transmit FIFO trigger level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else hgroup.word 0x18++0x01 hide.word 0x00 "MSR,Modem Status Register" in group.word 0x1C++0x01 line.word 0x00 "SPR,Scratchpad Register" hexmask.word.byte 0x00 0.--7. 1. "SPR_WORD,Scratchpad register" endif endif if (((d.w(ad:0x44E09000+0x24))&0x80)==0x00) group.word 0x20++0x01 line.word 0x00 "MDR1,Mode Definition Register 1" bitfld.word 0x00 7. "FRAMEENDMODE,Frame end mode" "Frame-length,Set EOT bit" bitfld.word 0x00 6. "SIPMODE,SIP mode" "Manual,Auto" newline bitfld.word 0x00 5. "SCT,Store and control the transmission" "Start when write to THR,Start with the control of ACREG[2]" bitfld.word 0x00 4. "SETTXIR,Used to configure the infrared transceiver" "No action,Forced high" newline bitfld.word 0x00 3. "IRSLEEP,Irda/cir sleep mode" "Disabled,Enabled" bitfld.word 0x00 0.--2. "MODESELECT,Uart/irda/cir mode selection" "UART 16x,SIR,UART 16x,UART 13x,MIR,FIR,CIR,Disabled" else group.word 0x20++0x01 line.word 0x00 "MDR1,Mode Definition Register 1" bitfld.word 0x00 7. "FRAMEENDMODE,Frame end mode" "Frame-length,Set EOT bit" bitfld.word 0x00 6. "SIPMODE,SIP mode" "Manual,Auto" newline bitfld.word 0x00 5. "SCT,Store and control the transmission" "Start when write to THR,Start with the control of ACREG[2]" bitfld.word 0x00 4. "SETTXIR,Used to configure the infrared transceiver" "Forced low,Forced high" newline bitfld.word 0x00 3. "IRSLEEP,Irda/cir sleep mode" "Disabled,Enabled" bitfld.word 0x00 0.--2. "MODESELECT,Uart/irda/cir mode selection" "UART 16x,SIR,UART 16x,UART 13x,MIR,FIR,CIR,Disabled" endif if (((d.w(ad:0x44E09000+0x20))&0x07)==(0x01||0x04||0x05)) group.word 0x24++0x01 line.word 0x00 "MDR2,Mode Definition Register 2" bitfld.word 0x00 7. "SETTXIRALT,Alternate mode for MDR1[4]" "Normal,Alternatie" bitfld.word 0x00 6. "IRRXINVERT,Invert RX pin" "Inverted,Not inverted" newline bitfld.word 0x00 1.--2. "STSFIFOTRIG,Frame status FIFO threshold select" "1 entry,4 entries,7 entries,8 entries" rbitfld.word 0x00 0. "IRTXUNDERRUN,Irda transmission status interrupt" "No interrupt,Interrupt" elif (((d.w(ad:0x44E09000+0x20))&0x07)==0x06) group.word 0x24++0x01 line.word 0x00 "MDR2,Mode Definition Register 2" bitfld.word 0x00 7. "SETTXIRALT,Alternate mode for MDR1[4]" "Normal,Alternatie" bitfld.word 0x00 6. "IRRXINVERT,Invert RX pin" "Inverted,Not inverted" newline bitfld.word 0x00 4.--5. "CIRPULSEMODE,CIR pulse modulation definition select from 12 cycles" "3,4,5,6" else group.word 0x24++0x01 line.word 0x00 "MDR2,Mode Definition Register 2" bitfld.word 0x00 7. "SETTXIRALT,Alternate mode for MDR1[4]" "Normal,Alternatie" bitfld.word 0x00 3. "UARTPULSE,UART mode" "Normal,Pulse shaping" endif group.word 0x28++0x01 line.word 0x00 "TXFLL,Transmit Frame Length Low Register" hexmask.word.byte 0x00 0.--7. 1. "TXFLL,LSB register used to specify the frame length" hgroup.word 0x28++0x01 hide.word 0x00 "SFLSR,Status FIFO Line Status Register" in hgroup.word 0x2C++0x01 hide.word 0x00 "RESUME,RESUME Register" in wgroup.word 0x2C++0x01 line.word 0x00 "TXFLH,Transmit Frame Length High Register" bitfld.word 0x00 0.--4. "TXFLH,MSB register used to specify the frame length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" wgroup.word 0x30++0x01 line.word 0x00 "RXFLL,Received Frame Length Low Register" hexmask.word.byte 0x00 0.--7. 1. "RXFLL,LSB register used to specify the frame length in reception" rgroup.word 0x30++0x01 line.word 0x00 "SFREGL,Status FIFO Register Low" hexmask.word.byte 0x00 0.--7. 1. "SFREGL,LSB part of the frame length" rgroup.word 0x34++0x01 line.word 0x00 "SFREGH,Status FIFO Register High" bitfld.word 0x00 0.--3. "SFREGH,MSB part of the frame length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.word 0x34++0x01 line.word 0x00 "RXFLH,Received Frame Length High Register" bitfld.word 0x00 0.--3. "RXFLH,MSB register used to specify the frame length in reception" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (((d.w(ad:0x44E09000+0x0C))&0xFF)==0x00) group.word 0x38++0x01 line.word 0x00 "BLR,BOF Control Register" eventfld.word 0x00 7. "STSFIFORESET,Status FIFO reset" "No reset,Reset" bitfld.word 0x00 6. "XBOFTYPE,SIR xbof select" "FFh,C0h" group.word 0x3C++0x01 line.word 0x00 "ACREG,Auxiliary Control Register" bitfld.word 0x00 7. "PULSETYPE,SIR pulse-width select" "3/16 of baud-rate,1.6 microseconds" bitfld.word 0x00 6. "SDMOD,Primary output used to configure transceivers" "High,Low" newline bitfld.word 0x00 5. "DISIRRX,Disable RX input" "No,Yes" bitfld.word 0x00 4. "DISTXUNDERRUN,Disable TX underrun" "No,Yes" newline bitfld.word 0x00 3. "SENDSIP,MIR/FIR modes only" "No action,Send SIP pulse" eventfld.word 0x00 2. "SCTXEN,Store and control TX start" "Not started,Started" newline bitfld.word 0x00 1. "ABORTEN,Frame abort" "Not aborted,Aborted" bitfld.word 0x00 0. "EOTEN,EOT (End-of-transmission) bit" "No EOT,EOT" else rgroup.word 0x38++0x01 line.word 0x00 "UASR,UART Autobauding Status Register" bitfld.word 0x00 6.--7. "PARITYTYPE,Type of the parity in UART autobauding mode" "None,Parity space,Even,Odd" bitfld.word 0x00 5. "BITBYCHAR,Number of bits by characters" "7 bit,8 bit" newline bitfld.word 0x00 0.--4. "SPEED,Speed (Bauds)" "None,115 200,57 600,38 400,28 800,19 200,14 400,9600,4800,2400,1200,?..." endif if (((d.w(ad:0x44E09000+0x40))&0x01)==0x01) group.word 0x40++0x01 line.word 0x00 "SCR,Supplementary Control Register" bitfld.word 0x00 7. "RXTRIGGRANU1,Granularity of 1 for trigger RX level enable" "Disabled,Enabled" bitfld.word 0x00 6. "TXTRIGGRANU1,Granularity of 1 for trigger TX level enable" "Disabled,Enabled" newline bitfld.word 0x00 5. "DSRIT,DSR (Active-low) interrupt enable" "Disabled,Enabled" bitfld.word 0x00 4. "RXCTSDSRWAKEUPENABLE,RX CTS wake-up enable" "Disabled,Enabled" newline bitfld.word 0x00 3. "TXEMPTYCTLIT,TX empty interrupt enable" "Disabled,Enabled" bitfld.word 0x00 1.--2. "DMAMODE2,Specifies the DMA mode valid" "0,1,2,3" newline bitfld.word 0x00 0. "DMAMODECTL,DMAMODE" "FCR[3],CR[2:1]" else group.word 0x40++0x01 line.word 0x00 "SCR,Supplementary Control Register" bitfld.word 0x00 7. "RXTRIGGRANU1,Granularity of 1 for trigger RX level enable" "Disabled,Enabled" bitfld.word 0x00 6. "TXTRIGGRANU1,Granularity of 1 for trigger TX level enable" "Disabled,Enabled" newline bitfld.word 0x00 5. "DSRIT,DSR (Active-low) interrupt enable" "Disabled,Enabled" bitfld.word 0x00 4. "RXCTSDSRWAKEUPENABLE,RX CTS wake-up enable" "Disabled,Enabled" newline bitfld.word 0x00 3. "TXEMPTYCTLIT,TX empty interrupt enable" "Disabled,Enabled" bitfld.word 0x00 0. "DMAMODECTL,DMAMODE" "FCR[3],CR[2:1]" endif group.word 0x44++0x01 line.word 0x00 "SSR,Supplementary Status Register" bitfld.word 0x00 2. "DMACOUNTERRST,DMA counter reset" "No reset,Reset" rbitfld.word 0x00 1. "RXCTSDSRWAKEUPSTS,Pin falling edge detection" "Not detected,Detected" newline rbitfld.word 0x00 0. "TXFIFOFULL,TX FIFO full" "Not full,Full" if (((d.w(ad:0x44E09000+0x0C))&0xFF)==0x00) group.word 0x48++0x01 line.word 0x00 "EBLR,BOF Length Register" hexmask.word.byte 0x00 0.--7. 1. "EBLR,EBLR" endif rgroup.word 0x50++0x01 line.word 0x00 "MVR,Module Version Register" bitfld.word 0x00 8.--10. "MAJORREV,Major revision number of the module" "0,1,2,3,4,5,6,7" bitfld.word 0x00 0.--5. "MINORREV_,Minor revision number of the module" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.word 0x54++0x01 line.word 0x00 "SYSC,System Configuration Register" bitfld.word 0x00 3.--4. "IDLEMODE,Power management req/ack control" "Force-idle,No-idle,Smart-idle,Smart-idle wakeup" bitfld.word 0x00 2. "ENAWAKEUP,Wakeup control" "Disabled,Enabled" newline bitfld.word 0x00 1. "SOFTRESET,Software reset" "No reset,Reset" bitfld.word 0x00 0. "AUTOIDLE,Internal interface clock-gating strategy" "Clock running,?..." rgroup.word 0x58++0x01 line.word 0x00 "SYSS,System Status Register" bitfld.word 0x00 0. "RESETDONE,Internal reset monitoring" "In progress,Done" group.word 0x5C++0x01 line.word 0x00 "WER,Wake-Up Enable Register" bitfld.word 0x00 7. "TXWAKEUPEN,Wake-up interrupt" "Disabled,Enabled" bitfld.word 0x00 6. "RLS__INTERRUPT,Receiver line status interrupt" "Disabled,Enabled" newline bitfld.word 0x00 5. "RHR__INTERRUPT,RHR interrupt" "Disabled,Enabled" bitfld.word 0x00 4. "RX__ACTIVITY,RX activity" "Disabled,Enabled" newline bitfld.word 0x00 3. "DCD_ACTIVITY,DCD activity" "Disabled,Enabled" bitfld.word 0x00 2. "RI__ACTIVITY,RI activity" "Disabled,Enabled" newline bitfld.word 0x00 1. "DSR_ACTIVITY,DSR activity" "Disabled,Enabled" bitfld.word 0x00 0. "CTS__ACTIVITY,CTS activity" "Disabled,Enabled" group.word 0x60++0x01 line.word 0x00 "CFPS,Carrier Frequency Prescaler Register" hexmask.word.byte 0x00 0.--7. 1. "CFPS,System clock frequency prescaler at (12x multiple)" rgroup.word 0x64++0x03 line.word 0x00 "RXFIFO_LVL,Received FIFO Level Register" hexmask.word.byte 0x00 0.--7. 1. "RXFIFO_LVL,Level of the RX FIFO" line.word 0x02 "TXFIFO_LVL,Transmit FIFO Level Register" hexmask.word.byte 0x02 0.--7. 1. "TXFIFO_LVL,Level of the TX FIFO" group.word 0x6C++0x03 line.word 0x00 "IER2,IER2 Register" bitfld.word 0x00 1. "EN_TXFIFO_EMPTY,TX FIFO empty interrupt enabled" "Disabled,Enabled" bitfld.word 0x00 0. "EN_RXFIFO_EMPTY,Number of bits by characters interrupt enabled" "Disabled,Enabled" line.word 0x02 "ISR2,ISR2 Register" bitfld.word 0x02 1. "TXFIFO_EMPTY_STS,TX FIFO empty interrupt pending" "Not pending,Pending" bitfld.word 0x02 0. "RXFIFO_EMPTY_STS,Number of bits by characters interrupt pending" "Not pending,Pending" group.word 0x74++0x01 line.word 0x00 "FREQ_SEL,FREQ_SEL Register" hexmask.word.byte 0x00 0.--7. 1. "FREQ_SEL,Sets the sample per bit if non default frequency is used" group.word 0x80++0x01 line.word 0x00 "MDR3,Mode Definition Register 3" bitfld.word 0x00 2. "SET_DMA_TX_THRESHOLD,Set DMA TX THRESHOLD enable" "Disabled,Enabled" bitfld.word 0x00 1. "NONDEFAULT_FREQ,NONDEFAULT fclk frequencies usabe enable" "Disabled,Enabled" newline bitfld.word 0x00 0. "DISABLE_CIR_RX_DEMOD,CIR RX demodulation enable" "Disabled,Enabled" group.word 0x84++0x01 line.word 0x00 "TX_DMA_THRESHOLD,TX DMA Threshold Register" bitfld.word 0x00 0.--5. "TX_DMA_THRESHOLD,Used to manually set the TX DMA threshold level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" tree.end tree "Timers" tree "DMTimer" tree "DMTimer 0" base ad:0x44E05000 rgroup.long 0x00++0x03 line.long 0x00 "TIDR,Identification Register" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between old scheme and current" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "FUNC,Function indicates a software compatible module family" bitfld.long 0x00 11.--15. "R_RTL,RTL version (R)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "X_MAJOR,Major revision (X)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "CUSTOM,Indicates a special version for a particular device" "0,1,2,3" bitfld.long 0x00 0.--5. "Y_MINOR,Minor revision (Y)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x10++0x03 line.long 0x00 "TIOCP_CFG,Timer OCP Configuration Register" bitfld.long 0x00 2.--3. "IDLEMODE,Power management, req/ack control" "Force-idle,No-idle,Smart-idle,Smart-idle wakeup capable" bitfld.long 0x00 1. "EMUFREE,Sensitivity to emulation (Debug) suspend event from debug subsystem" "Frozen,Free-running" bitfld.long 0x00 0. "SOFTRESET,Software reset" "No reset,Reset" group.long 0x20++0x0F line.long 0x00 "IRQ_EOI,Timer IRQ End-of-Interrupt Register" bitfld.long 0x00 0. "DMAEVENT_ACK,DMA event acknowledge event" "Acknowledged,Not acknowledged" line.long 0x04 "IRQSTATUS_RAW,Imer Status Raw Register" bitfld.long 0x04 2. "TCAR_IT_FLAG,IRQ event status for capture" "Not pending,Pending" bitfld.long 0x04 1. "OVF_IT_FLAG,IRQ event status for overflow" "Not pending,Pending" bitfld.long 0x04 0. "MAT_IT_FLAG,IRQ event status for match" "Not pending,Pending" line.long 0x08 "IRQSTATUS,Timer Status Register" bitfld.long 0x08 2. "TCAR_IT_FLAG,IRQ status for capture" "Not pending,Pending" bitfld.long 0x08 1. "OVF_IT_FLAG,IRQ status for overflow" "Not pending,Pending" bitfld.long 0x08 0. "MAT_IT_FLAG,IRQ status for match" "Not pending,Pending" line.long 0x0C "IRQENABLE_SET/CLR,Timer Interrupt Enable Set/Clear Register" setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. "TCAR_IT_FLAG,IRQ event status for capture" "Not pending,Pending" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. "OVF_IT_FLAG,IRQ event status for overflow" "Not pending,Pending" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. "MAT_IT_FLAG,IRQ event status for match" "Not pending,Pending" group.long 0x34++0x03 line.long 0x00 "IRQWAKEEN,Timer IRQ Wakeup Enable Register" bitfld.long 0x00 2. "TCAR_WUP_ENA,Wakeup generation for capture" "Disabled,Enabled" bitfld.long 0x00 1. "OVF_WUP_ENA,Wakeup generation for overflow" "Disabled,Enabled" bitfld.long 0x00 0. "MAT_WUP_ENA,Wakeup generation for match" "Disabled,Enabled" if (((d.l(ad:0x44E05000+0x38))&0xC00)==0x00)||(((d.l(ad:0x44E05000+0x38))&0x01)==0x00) group.long 0x38++0x03 line.long 0x00 "TCLR,Timer Control Register" bitfld.long 0x00 14. "GPO_CFG,Configures the timer pin" "Output,Input" bitfld.long 0x00 13. "CAPT_MODE,Capture mode" "Single,On second event" bitfld.long 0x00 12. "PT,Pulse or toggle mode on PORTIMERPWM output pin" "Pulse,Toggle" newline bitfld.long 0x00 10.--11. "TRG,Trigger output mode on PORTIMERPWM output pin" "No trigger,Overflow,Overflow and match,?..." bitfld.long 0x00 8.--9. "TCM,Transition capture mode on PIEVENTCAPT input pin" "No capture,Low to high,High to low,Both" bitfld.long 0x00 7. "SCPWM,Set clear PORTIMERPWM output pin" "Clear,Set" newline bitfld.long 0x00 6. "CE,Compare enabled" "Disabled,Enabled" bitfld.long 0x00 5. "PRE,Prescaler enable" "Disabled,Enabled" bitfld.long 0x00 2.--4. "PTV,Pre-scale clock timer value" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 1. "AR,Auto reload timer" "One shot,Auto reload" bitfld.long 0x00 0. "ST,Start/Stop timer control" "Stop,Start" else group.long 0x38++0x03 line.long 0x00 "TCLR,Timer Control Register" bitfld.long 0x00 14. "GPO_CFG,Configures the timer pin" "Output,Input" bitfld.long 0x00 13. "CAPT_MODE,Capture mode" "Single,On second event" bitfld.long 0x00 12. "PT,Pulse or toggle mode on PORTIMERPWM output pin" "Pulse,Toggle" newline bitfld.long 0x00 10.--11. "TRG,Trigger output mode on PORTIMERPWM output pin" "No trigger,Overflow,Overflow and match,?..." bitfld.long 0x00 8.--9. "TCM,Transition capture mode on PIEVENTCAPT input pin" "No capture,Low to high,High to low,Both" rbitfld.long 0x00 7. "SCPWM,Set clear PORTIMERPWM output pin" "Clear,Set" newline bitfld.long 0x00 6. "CE,Compare enabled" "Disabled,Enabled" bitfld.long 0x00 5. "PRE,Prescaler enable" "Disabled,Enabled" bitfld.long 0x00 2.--4. "PTV,Pre-scale clock timer value" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 1. "AR,Auto reload timer" "One shot,Auto reload" bitfld.long 0x00 0. "ST,Start/Stop timer control" "Stop,Start" endif group.long 0x3C++0x1F line.long 0x00 "TCRR,Timer Counter Register" line.long 0x04 "TLDR,Timer Load Register" line.long 0x08 "TTGR,Timer Trigger Register" line.long 0x0C "TWPS,Timer Write Posting Bits Register" bitfld.long 0x0C 4. "W_PEND_TMAR,Write pending to TMAR register" "Not pending,Pending" bitfld.long 0x0C 3. "W_PEND_TTGR,Write pending to TTGR register" "Not pending,Pending" bitfld.long 0x0C 2. "W_PEND_TLDR,Write pending to TLDR register" "Not pending,Pending" newline bitfld.long 0x0C 1. "W_PEND_TCRR,Write pending to TCRR register" "Not pending,Pending" bitfld.long 0x0C 0. "W_PEND_TCLR,Write pending to TCLR register" "Not pending,Pending" line.long 0x10 "TMAR,Timer Match Register" line.long 0x14 "TCAR1,Timer Capture Register" line.long 0x18 "TSICR,Timer Synchronous Interface Control Register" bitfld.long 0x18 2. "POSTED,Posted mode" "Inactive,Active" bitfld.long 0x18 1. "SFT,Software reset enable" "Enabled,Disabled" line.long 0x1C "TCAR2,Timer Capture Register" tree.end tree "DMTimer 2" base ad:0x48040000 rgroup.long 0x00++0x03 line.long 0x00 "TIDR,Identification Register" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between old scheme and current" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "FUNC,Function indicates a software compatible module family" bitfld.long 0x00 11.--15. "R_RTL,RTL version (R)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "X_MAJOR,Major revision (X)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "CUSTOM,Indicates a special version for a particular device" "0,1,2,3" bitfld.long 0x00 0.--5. "Y_MINOR,Minor revision (Y)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x10++0x03 line.long 0x00 "TIOCP_CFG,Timer OCP Configuration Register" bitfld.long 0x00 2.--3. "IDLEMODE,Power management, req/ack control" "Force-idle,No-idle,Smart-idle,Smart-idle wakeup capable" bitfld.long 0x00 1. "EMUFREE,Sensitivity to emulation (Debug) suspend event from debug subsystem" "Frozen,Free-running" bitfld.long 0x00 0. "SOFTRESET,Software reset" "No reset,Reset" group.long 0x20++0x0F line.long 0x00 "IRQ_EOI,Timer IRQ End-of-Interrupt Register" bitfld.long 0x00 0. "DMAEVENT_ACK,DMA event acknowledge event" "Acknowledged,Not acknowledged" line.long 0x04 "IRQSTATUS_RAW,Imer Status Raw Register" bitfld.long 0x04 2. "TCAR_IT_FLAG,IRQ event status for capture" "Not pending,Pending" bitfld.long 0x04 1. "OVF_IT_FLAG,IRQ event status for overflow" "Not pending,Pending" bitfld.long 0x04 0. "MAT_IT_FLAG,IRQ event status for match" "Not pending,Pending" line.long 0x08 "IRQSTATUS,Timer Status Register" bitfld.long 0x08 2. "TCAR_IT_FLAG,IRQ status for capture" "Not pending,Pending" bitfld.long 0x08 1. "OVF_IT_FLAG,IRQ status for overflow" "Not pending,Pending" bitfld.long 0x08 0. "MAT_IT_FLAG,IRQ status for match" "Not pending,Pending" line.long 0x0C "IRQENABLE_SET/CLR,Timer Interrupt Enable Set/Clear Register" setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. "TCAR_IT_FLAG,IRQ event status for capture" "Not pending,Pending" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. "OVF_IT_FLAG,IRQ event status for overflow" "Not pending,Pending" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. "MAT_IT_FLAG,IRQ event status for match" "Not pending,Pending" group.long 0x34++0x03 line.long 0x00 "IRQWAKEEN,Timer IRQ Wakeup Enable Register" bitfld.long 0x00 2. "TCAR_WUP_ENA,Wakeup generation for capture" "Disabled,Enabled" bitfld.long 0x00 1. "OVF_WUP_ENA,Wakeup generation for overflow" "Disabled,Enabled" bitfld.long 0x00 0. "MAT_WUP_ENA,Wakeup generation for match" "Disabled,Enabled" if (((d.l(ad:0x48040000+0x38))&0xC00)==0x00)||(((d.l(ad:0x48040000+0x38))&0x01)==0x00) group.long 0x38++0x03 line.long 0x00 "TCLR,Timer Control Register" bitfld.long 0x00 14. "GPO_CFG,Configures the timer pin" "Output,Input" bitfld.long 0x00 13. "CAPT_MODE,Capture mode" "Single,On second event" bitfld.long 0x00 12. "PT,Pulse or toggle mode on PORTIMERPWM output pin" "Pulse,Toggle" newline bitfld.long 0x00 10.--11. "TRG,Trigger output mode on PORTIMERPWM output pin" "No trigger,Overflow,Overflow and match,?..." bitfld.long 0x00 8.--9. "TCM,Transition capture mode on PIEVENTCAPT input pin" "No capture,Low to high,High to low,Both" bitfld.long 0x00 7. "SCPWM,Set clear PORTIMERPWM output pin" "Clear,Set" newline bitfld.long 0x00 6. "CE,Compare enabled" "Disabled,Enabled" bitfld.long 0x00 5. "PRE,Prescaler enable" "Disabled,Enabled" bitfld.long 0x00 2.--4. "PTV,Pre-scale clock timer value" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 1. "AR,Auto reload timer" "One shot,Auto reload" bitfld.long 0x00 0. "ST,Start/Stop timer control" "Stop,Start" else group.long 0x38++0x03 line.long 0x00 "TCLR,Timer Control Register" bitfld.long 0x00 14. "GPO_CFG,Configures the timer pin" "Output,Input" bitfld.long 0x00 13. "CAPT_MODE,Capture mode" "Single,On second event" bitfld.long 0x00 12. "PT,Pulse or toggle mode on PORTIMERPWM output pin" "Pulse,Toggle" newline bitfld.long 0x00 10.--11. "TRG,Trigger output mode on PORTIMERPWM output pin" "No trigger,Overflow,Overflow and match,?..." bitfld.long 0x00 8.--9. "TCM,Transition capture mode on PIEVENTCAPT input pin" "No capture,Low to high,High to low,Both" rbitfld.long 0x00 7. "SCPWM,Set clear PORTIMERPWM output pin" "Clear,Set" newline bitfld.long 0x00 6. "CE,Compare enabled" "Disabled,Enabled" bitfld.long 0x00 5. "PRE,Prescaler enable" "Disabled,Enabled" bitfld.long 0x00 2.--4. "PTV,Pre-scale clock timer value" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 1. "AR,Auto reload timer" "One shot,Auto reload" bitfld.long 0x00 0. "ST,Start/Stop timer control" "Stop,Start" endif group.long 0x3C++0x1F line.long 0x00 "TCRR,Timer Counter Register" line.long 0x04 "TLDR,Timer Load Register" line.long 0x08 "TTGR,Timer Trigger Register" line.long 0x0C "TWPS,Timer Write Posting Bits Register" bitfld.long 0x0C 4. "W_PEND_TMAR,Write pending to TMAR register" "Not pending,Pending" bitfld.long 0x0C 3. "W_PEND_TTGR,Write pending to TTGR register" "Not pending,Pending" bitfld.long 0x0C 2. "W_PEND_TLDR,Write pending to TLDR register" "Not pending,Pending" newline bitfld.long 0x0C 1. "W_PEND_TCRR,Write pending to TCRR register" "Not pending,Pending" bitfld.long 0x0C 0. "W_PEND_TCLR,Write pending to TCLR register" "Not pending,Pending" line.long 0x10 "TMAR,Timer Match Register" line.long 0x14 "TCAR1,Timer Capture Register" line.long 0x18 "TSICR,Timer Synchronous Interface Control Register" bitfld.long 0x18 2. "POSTED,Posted mode" "Inactive,Active" bitfld.long 0x18 1. "SFT,Software reset enable" "Enabled,Disabled" line.long 0x1C "TCAR2,Timer Capture Register" tree.end tree "DMTimer 3" base ad:0x48042000 rgroup.long 0x00++0x03 line.long 0x00 "TIDR,Identification Register" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between old scheme and current" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "FUNC,Function indicates a software compatible module family" bitfld.long 0x00 11.--15. "R_RTL,RTL version (R)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "X_MAJOR,Major revision (X)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "CUSTOM,Indicates a special version for a particular device" "0,1,2,3" bitfld.long 0x00 0.--5. "Y_MINOR,Minor revision (Y)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x10++0x03 line.long 0x00 "TIOCP_CFG,Timer OCP Configuration Register" bitfld.long 0x00 2.--3. "IDLEMODE,Power management, req/ack control" "Force-idle,No-idle,Smart-idle,Smart-idle wakeup capable" bitfld.long 0x00 1. "EMUFREE,Sensitivity to emulation (Debug) suspend event from debug subsystem" "Frozen,Free-running" bitfld.long 0x00 0. "SOFTRESET,Software reset" "No reset,Reset" group.long 0x20++0x0F line.long 0x00 "IRQ_EOI,Timer IRQ End-of-Interrupt Register" bitfld.long 0x00 0. "DMAEVENT_ACK,DMA event acknowledge event" "Acknowledged,Not acknowledged" line.long 0x04 "IRQSTATUS_RAW,Imer Status Raw Register" bitfld.long 0x04 2. "TCAR_IT_FLAG,IRQ event status for capture" "Not pending,Pending" bitfld.long 0x04 1. "OVF_IT_FLAG,IRQ event status for overflow" "Not pending,Pending" bitfld.long 0x04 0. "MAT_IT_FLAG,IRQ event status for match" "Not pending,Pending" line.long 0x08 "IRQSTATUS,Timer Status Register" bitfld.long 0x08 2. "TCAR_IT_FLAG,IRQ status for capture" "Not pending,Pending" bitfld.long 0x08 1. "OVF_IT_FLAG,IRQ status for overflow" "Not pending,Pending" bitfld.long 0x08 0. "MAT_IT_FLAG,IRQ status for match" "Not pending,Pending" line.long 0x0C "IRQENABLE_SET/CLR,Timer Interrupt Enable Set/Clear Register" setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. "TCAR_IT_FLAG,IRQ event status for capture" "Not pending,Pending" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. "OVF_IT_FLAG,IRQ event status for overflow" "Not pending,Pending" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. "MAT_IT_FLAG,IRQ event status for match" "Not pending,Pending" group.long 0x34++0x03 line.long 0x00 "IRQWAKEEN,Timer IRQ Wakeup Enable Register" bitfld.long 0x00 2. "TCAR_WUP_ENA,Wakeup generation for capture" "Disabled,Enabled" bitfld.long 0x00 1. "OVF_WUP_ENA,Wakeup generation for overflow" "Disabled,Enabled" bitfld.long 0x00 0. "MAT_WUP_ENA,Wakeup generation for match" "Disabled,Enabled" if (((d.l(ad:0x48042000+0x38))&0xC00)==0x00)||(((d.l(ad:0x48042000+0x38))&0x01)==0x00) group.long 0x38++0x03 line.long 0x00 "TCLR,Timer Control Register" bitfld.long 0x00 14. "GPO_CFG,Configures the timer pin" "Output,Input" bitfld.long 0x00 13. "CAPT_MODE,Capture mode" "Single,On second event" bitfld.long 0x00 12. "PT,Pulse or toggle mode on PORTIMERPWM output pin" "Pulse,Toggle" newline bitfld.long 0x00 10.--11. "TRG,Trigger output mode on PORTIMERPWM output pin" "No trigger,Overflow,Overflow and match,?..." bitfld.long 0x00 8.--9. "TCM,Transition capture mode on PIEVENTCAPT input pin" "No capture,Low to high,High to low,Both" bitfld.long 0x00 7. "SCPWM,Set clear PORTIMERPWM output pin" "Clear,Set" newline bitfld.long 0x00 6. "CE,Compare enabled" "Disabled,Enabled" bitfld.long 0x00 5. "PRE,Prescaler enable" "Disabled,Enabled" bitfld.long 0x00 2.--4. "PTV,Pre-scale clock timer value" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 1. "AR,Auto reload timer" "One shot,Auto reload" bitfld.long 0x00 0. "ST,Start/Stop timer control" "Stop,Start" else group.long 0x38++0x03 line.long 0x00 "TCLR,Timer Control Register" bitfld.long 0x00 14. "GPO_CFG,Configures the timer pin" "Output,Input" bitfld.long 0x00 13. "CAPT_MODE,Capture mode" "Single,On second event" bitfld.long 0x00 12. "PT,Pulse or toggle mode on PORTIMERPWM output pin" "Pulse,Toggle" newline bitfld.long 0x00 10.--11. "TRG,Trigger output mode on PORTIMERPWM output pin" "No trigger,Overflow,Overflow and match,?..." bitfld.long 0x00 8.--9. "TCM,Transition capture mode on PIEVENTCAPT input pin" "No capture,Low to high,High to low,Both" rbitfld.long 0x00 7. "SCPWM,Set clear PORTIMERPWM output pin" "Clear,Set" newline bitfld.long 0x00 6. "CE,Compare enabled" "Disabled,Enabled" bitfld.long 0x00 5. "PRE,Prescaler enable" "Disabled,Enabled" bitfld.long 0x00 2.--4. "PTV,Pre-scale clock timer value" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 1. "AR,Auto reload timer" "One shot,Auto reload" bitfld.long 0x00 0. "ST,Start/Stop timer control" "Stop,Start" endif group.long 0x3C++0x1F line.long 0x00 "TCRR,Timer Counter Register" line.long 0x04 "TLDR,Timer Load Register" line.long 0x08 "TTGR,Timer Trigger Register" line.long 0x0C "TWPS,Timer Write Posting Bits Register" bitfld.long 0x0C 4. "W_PEND_TMAR,Write pending to TMAR register" "Not pending,Pending" bitfld.long 0x0C 3. "W_PEND_TTGR,Write pending to TTGR register" "Not pending,Pending" bitfld.long 0x0C 2. "W_PEND_TLDR,Write pending to TLDR register" "Not pending,Pending" newline bitfld.long 0x0C 1. "W_PEND_TCRR,Write pending to TCRR register" "Not pending,Pending" bitfld.long 0x0C 0. "W_PEND_TCLR,Write pending to TCLR register" "Not pending,Pending" line.long 0x10 "TMAR,Timer Match Register" line.long 0x14 "TCAR1,Timer Capture Register" line.long 0x18 "TSICR,Timer Synchronous Interface Control Register" bitfld.long 0x18 2. "POSTED,Posted mode" "Inactive,Active" bitfld.long 0x18 1. "SFT,Software reset enable" "Enabled,Disabled" line.long 0x1C "TCAR2,Timer Capture Register" tree.end tree "DMTimer 4" base ad:0x48044000 rgroup.long 0x00++0x03 line.long 0x00 "TIDR,Identification Register" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between old scheme and current" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "FUNC,Function indicates a software compatible module family" bitfld.long 0x00 11.--15. "R_RTL,RTL version (R)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "X_MAJOR,Major revision (X)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "CUSTOM,Indicates a special version for a particular device" "0,1,2,3" bitfld.long 0x00 0.--5. "Y_MINOR,Minor revision (Y)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x10++0x03 line.long 0x00 "TIOCP_CFG,Timer OCP Configuration Register" bitfld.long 0x00 2.--3. "IDLEMODE,Power management, req/ack control" "Force-idle,No-idle,Smart-idle,Smart-idle wakeup capable" bitfld.long 0x00 1. "EMUFREE,Sensitivity to emulation (Debug) suspend event from debug subsystem" "Frozen,Free-running" bitfld.long 0x00 0. "SOFTRESET,Software reset" "No reset,Reset" group.long 0x20++0x0F line.long 0x00 "IRQ_EOI,Timer IRQ End-of-Interrupt Register" bitfld.long 0x00 0. "DMAEVENT_ACK,DMA event acknowledge event" "Acknowledged,Not acknowledged" line.long 0x04 "IRQSTATUS_RAW,Imer Status Raw Register" bitfld.long 0x04 2. "TCAR_IT_FLAG,IRQ event status for capture" "Not pending,Pending" bitfld.long 0x04 1. "OVF_IT_FLAG,IRQ event status for overflow" "Not pending,Pending" bitfld.long 0x04 0. "MAT_IT_FLAG,IRQ event status for match" "Not pending,Pending" line.long 0x08 "IRQSTATUS,Timer Status Register" bitfld.long 0x08 2. "TCAR_IT_FLAG,IRQ status for capture" "Not pending,Pending" bitfld.long 0x08 1. "OVF_IT_FLAG,IRQ status for overflow" "Not pending,Pending" bitfld.long 0x08 0. "MAT_IT_FLAG,IRQ status for match" "Not pending,Pending" line.long 0x0C "IRQENABLE_SET/CLR,Timer Interrupt Enable Set/Clear Register" setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. "TCAR_IT_FLAG,IRQ event status for capture" "Not pending,Pending" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. "OVF_IT_FLAG,IRQ event status for overflow" "Not pending,Pending" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. "MAT_IT_FLAG,IRQ event status for match" "Not pending,Pending" group.long 0x34++0x03 line.long 0x00 "IRQWAKEEN,Timer IRQ Wakeup Enable Register" bitfld.long 0x00 2. "TCAR_WUP_ENA,Wakeup generation for capture" "Disabled,Enabled" bitfld.long 0x00 1. "OVF_WUP_ENA,Wakeup generation for overflow" "Disabled,Enabled" bitfld.long 0x00 0. "MAT_WUP_ENA,Wakeup generation for match" "Disabled,Enabled" if (((d.l(ad:0x48044000+0x38))&0xC00)==0x00)||(((d.l(ad:0x48044000+0x38))&0x01)==0x00) group.long 0x38++0x03 line.long 0x00 "TCLR,Timer Control Register" bitfld.long 0x00 14. "GPO_CFG,Configures the timer pin" "Output,Input" bitfld.long 0x00 13. "CAPT_MODE,Capture mode" "Single,On second event" bitfld.long 0x00 12. "PT,Pulse or toggle mode on PORTIMERPWM output pin" "Pulse,Toggle" newline bitfld.long 0x00 10.--11. "TRG,Trigger output mode on PORTIMERPWM output pin" "No trigger,Overflow,Overflow and match,?..." bitfld.long 0x00 8.--9. "TCM,Transition capture mode on PIEVENTCAPT input pin" "No capture,Low to high,High to low,Both" bitfld.long 0x00 7. "SCPWM,Set clear PORTIMERPWM output pin" "Clear,Set" newline bitfld.long 0x00 6. "CE,Compare enabled" "Disabled,Enabled" bitfld.long 0x00 5. "PRE,Prescaler enable" "Disabled,Enabled" bitfld.long 0x00 2.--4. "PTV,Pre-scale clock timer value" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 1. "AR,Auto reload timer" "One shot,Auto reload" bitfld.long 0x00 0. "ST,Start/Stop timer control" "Stop,Start" else group.long 0x38++0x03 line.long 0x00 "TCLR,Timer Control Register" bitfld.long 0x00 14. "GPO_CFG,Configures the timer pin" "Output,Input" bitfld.long 0x00 13. "CAPT_MODE,Capture mode" "Single,On second event" bitfld.long 0x00 12. "PT,Pulse or toggle mode on PORTIMERPWM output pin" "Pulse,Toggle" newline bitfld.long 0x00 10.--11. "TRG,Trigger output mode on PORTIMERPWM output pin" "No trigger,Overflow,Overflow and match,?..." bitfld.long 0x00 8.--9. "TCM,Transition capture mode on PIEVENTCAPT input pin" "No capture,Low to high,High to low,Both" rbitfld.long 0x00 7. "SCPWM,Set clear PORTIMERPWM output pin" "Clear,Set" newline bitfld.long 0x00 6. "CE,Compare enabled" "Disabled,Enabled" bitfld.long 0x00 5. "PRE,Prescaler enable" "Disabled,Enabled" bitfld.long 0x00 2.--4. "PTV,Pre-scale clock timer value" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 1. "AR,Auto reload timer" "One shot,Auto reload" bitfld.long 0x00 0. "ST,Start/Stop timer control" "Stop,Start" endif group.long 0x3C++0x1F line.long 0x00 "TCRR,Timer Counter Register" line.long 0x04 "TLDR,Timer Load Register" line.long 0x08 "TTGR,Timer Trigger Register" line.long 0x0C "TWPS,Timer Write Posting Bits Register" bitfld.long 0x0C 4. "W_PEND_TMAR,Write pending to TMAR register" "Not pending,Pending" bitfld.long 0x0C 3. "W_PEND_TTGR,Write pending to TTGR register" "Not pending,Pending" bitfld.long 0x0C 2. "W_PEND_TLDR,Write pending to TLDR register" "Not pending,Pending" newline bitfld.long 0x0C 1. "W_PEND_TCRR,Write pending to TCRR register" "Not pending,Pending" bitfld.long 0x0C 0. "W_PEND_TCLR,Write pending to TCLR register" "Not pending,Pending" line.long 0x10 "TMAR,Timer Match Register" line.long 0x14 "TCAR1,Timer Capture Register" line.long 0x18 "TSICR,Timer Synchronous Interface Control Register" bitfld.long 0x18 2. "POSTED,Posted mode" "Inactive,Active" bitfld.long 0x18 1. "SFT,Software reset enable" "Enabled,Disabled" line.long 0x1C "TCAR2,Timer Capture Register" tree.end tree "DMTimer 5" base ad:0x48046000 rgroup.long 0x00++0x03 line.long 0x00 "TIDR,Identification Register" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between old scheme and current" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "FUNC,Function indicates a software compatible module family" bitfld.long 0x00 11.--15. "R_RTL,RTL version (R)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "X_MAJOR,Major revision (X)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "CUSTOM,Indicates a special version for a particular device" "0,1,2,3" bitfld.long 0x00 0.--5. "Y_MINOR,Minor revision (Y)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x10++0x03 line.long 0x00 "TIOCP_CFG,Timer OCP Configuration Register" bitfld.long 0x00 2.--3. "IDLEMODE,Power management, req/ack control" "Force-idle,No-idle,Smart-idle,Smart-idle wakeup capable" bitfld.long 0x00 1. "EMUFREE,Sensitivity to emulation (Debug) suspend event from debug subsystem" "Frozen,Free-running" bitfld.long 0x00 0. "SOFTRESET,Software reset" "No reset,Reset" group.long 0x20++0x0F line.long 0x00 "IRQ_EOI,Timer IRQ End-of-Interrupt Register" bitfld.long 0x00 0. "DMAEVENT_ACK,DMA event acknowledge event" "Acknowledged,Not acknowledged" line.long 0x04 "IRQSTATUS_RAW,Imer Status Raw Register" bitfld.long 0x04 2. "TCAR_IT_FLAG,IRQ event status for capture" "Not pending,Pending" bitfld.long 0x04 1. "OVF_IT_FLAG,IRQ event status for overflow" "Not pending,Pending" bitfld.long 0x04 0. "MAT_IT_FLAG,IRQ event status for match" "Not pending,Pending" line.long 0x08 "IRQSTATUS,Timer Status Register" bitfld.long 0x08 2. "TCAR_IT_FLAG,IRQ status for capture" "Not pending,Pending" bitfld.long 0x08 1. "OVF_IT_FLAG,IRQ status for overflow" "Not pending,Pending" bitfld.long 0x08 0. "MAT_IT_FLAG,IRQ status for match" "Not pending,Pending" line.long 0x0C "IRQENABLE_SET/CLR,Timer Interrupt Enable Set/Clear Register" setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. "TCAR_IT_FLAG,IRQ event status for capture" "Not pending,Pending" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. "OVF_IT_FLAG,IRQ event status for overflow" "Not pending,Pending" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. "MAT_IT_FLAG,IRQ event status for match" "Not pending,Pending" group.long 0x34++0x03 line.long 0x00 "IRQWAKEEN,Timer IRQ Wakeup Enable Register" bitfld.long 0x00 2. "TCAR_WUP_ENA,Wakeup generation for capture" "Disabled,Enabled" bitfld.long 0x00 1. "OVF_WUP_ENA,Wakeup generation for overflow" "Disabled,Enabled" bitfld.long 0x00 0. "MAT_WUP_ENA,Wakeup generation for match" "Disabled,Enabled" if (((d.l(ad:0x48046000+0x38))&0xC00)==0x00)||(((d.l(ad:0x48046000+0x38))&0x01)==0x00) group.long 0x38++0x03 line.long 0x00 "TCLR,Timer Control Register" bitfld.long 0x00 14. "GPO_CFG,Configures the timer pin" "Output,Input" bitfld.long 0x00 13. "CAPT_MODE,Capture mode" "Single,On second event" bitfld.long 0x00 12. "PT,Pulse or toggle mode on PORTIMERPWM output pin" "Pulse,Toggle" newline bitfld.long 0x00 10.--11. "TRG,Trigger output mode on PORTIMERPWM output pin" "No trigger,Overflow,Overflow and match,?..." bitfld.long 0x00 8.--9. "TCM,Transition capture mode on PIEVENTCAPT input pin" "No capture,Low to high,High to low,Both" bitfld.long 0x00 7. "SCPWM,Set clear PORTIMERPWM output pin" "Clear,Set" newline bitfld.long 0x00 6. "CE,Compare enabled" "Disabled,Enabled" bitfld.long 0x00 5. "PRE,Prescaler enable" "Disabled,Enabled" bitfld.long 0x00 2.--4. "PTV,Pre-scale clock timer value" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 1. "AR,Auto reload timer" "One shot,Auto reload" bitfld.long 0x00 0. "ST,Start/Stop timer control" "Stop,Start" else group.long 0x38++0x03 line.long 0x00 "TCLR,Timer Control Register" bitfld.long 0x00 14. "GPO_CFG,Configures the timer pin" "Output,Input" bitfld.long 0x00 13. "CAPT_MODE,Capture mode" "Single,On second event" bitfld.long 0x00 12. "PT,Pulse or toggle mode on PORTIMERPWM output pin" "Pulse,Toggle" newline bitfld.long 0x00 10.--11. "TRG,Trigger output mode on PORTIMERPWM output pin" "No trigger,Overflow,Overflow and match,?..." bitfld.long 0x00 8.--9. "TCM,Transition capture mode on PIEVENTCAPT input pin" "No capture,Low to high,High to low,Both" rbitfld.long 0x00 7. "SCPWM,Set clear PORTIMERPWM output pin" "Clear,Set" newline bitfld.long 0x00 6. "CE,Compare enabled" "Disabled,Enabled" bitfld.long 0x00 5. "PRE,Prescaler enable" "Disabled,Enabled" bitfld.long 0x00 2.--4. "PTV,Pre-scale clock timer value" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 1. "AR,Auto reload timer" "One shot,Auto reload" bitfld.long 0x00 0. "ST,Start/Stop timer control" "Stop,Start" endif group.long 0x3C++0x1F line.long 0x00 "TCRR,Timer Counter Register" line.long 0x04 "TLDR,Timer Load Register" line.long 0x08 "TTGR,Timer Trigger Register" line.long 0x0C "TWPS,Timer Write Posting Bits Register" bitfld.long 0x0C 4. "W_PEND_TMAR,Write pending to TMAR register" "Not pending,Pending" bitfld.long 0x0C 3. "W_PEND_TTGR,Write pending to TTGR register" "Not pending,Pending" bitfld.long 0x0C 2. "W_PEND_TLDR,Write pending to TLDR register" "Not pending,Pending" newline bitfld.long 0x0C 1. "W_PEND_TCRR,Write pending to TCRR register" "Not pending,Pending" bitfld.long 0x0C 0. "W_PEND_TCLR,Write pending to TCLR register" "Not pending,Pending" line.long 0x10 "TMAR,Timer Match Register" line.long 0x14 "TCAR1,Timer Capture Register" line.long 0x18 "TSICR,Timer Synchronous Interface Control Register" bitfld.long 0x18 2. "POSTED,Posted mode" "Inactive,Active" bitfld.long 0x18 1. "SFT,Software reset enable" "Enabled,Disabled" line.long 0x1C "TCAR2,Timer Capture Register" tree.end tree "DMTimer 6" base ad:0x48048000 rgroup.long 0x00++0x03 line.long 0x00 "TIDR,Identification Register" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between old scheme and current" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "FUNC,Function indicates a software compatible module family" bitfld.long 0x00 11.--15. "R_RTL,RTL version (R)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "X_MAJOR,Major revision (X)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "CUSTOM,Indicates a special version for a particular device" "0,1,2,3" bitfld.long 0x00 0.--5. "Y_MINOR,Minor revision (Y)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x10++0x03 line.long 0x00 "TIOCP_CFG,Timer OCP Configuration Register" bitfld.long 0x00 2.--3. "IDLEMODE,Power management, req/ack control" "Force-idle,No-idle,Smart-idle,Smart-idle wakeup capable" bitfld.long 0x00 1. "EMUFREE,Sensitivity to emulation (Debug) suspend event from debug subsystem" "Frozen,Free-running" bitfld.long 0x00 0. "SOFTRESET,Software reset" "No reset,Reset" group.long 0x20++0x0F line.long 0x00 "IRQ_EOI,Timer IRQ End-of-Interrupt Register" bitfld.long 0x00 0. "DMAEVENT_ACK,DMA event acknowledge event" "Acknowledged,Not acknowledged" line.long 0x04 "IRQSTATUS_RAW,Imer Status Raw Register" bitfld.long 0x04 2. "TCAR_IT_FLAG,IRQ event status for capture" "Not pending,Pending" bitfld.long 0x04 1. "OVF_IT_FLAG,IRQ event status for overflow" "Not pending,Pending" bitfld.long 0x04 0. "MAT_IT_FLAG,IRQ event status for match" "Not pending,Pending" line.long 0x08 "IRQSTATUS,Timer Status Register" bitfld.long 0x08 2. "TCAR_IT_FLAG,IRQ status for capture" "Not pending,Pending" bitfld.long 0x08 1. "OVF_IT_FLAG,IRQ status for overflow" "Not pending,Pending" bitfld.long 0x08 0. "MAT_IT_FLAG,IRQ status for match" "Not pending,Pending" line.long 0x0C "IRQENABLE_SET/CLR,Timer Interrupt Enable Set/Clear Register" setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. "TCAR_IT_FLAG,IRQ event status for capture" "Not pending,Pending" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. "OVF_IT_FLAG,IRQ event status for overflow" "Not pending,Pending" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. "MAT_IT_FLAG,IRQ event status for match" "Not pending,Pending" group.long 0x34++0x03 line.long 0x00 "IRQWAKEEN,Timer IRQ Wakeup Enable Register" bitfld.long 0x00 2. "TCAR_WUP_ENA,Wakeup generation for capture" "Disabled,Enabled" bitfld.long 0x00 1. "OVF_WUP_ENA,Wakeup generation for overflow" "Disabled,Enabled" bitfld.long 0x00 0. "MAT_WUP_ENA,Wakeup generation for match" "Disabled,Enabled" if (((d.l(ad:0x48048000+0x38))&0xC00)==0x00)||(((d.l(ad:0x48048000+0x38))&0x01)==0x00) group.long 0x38++0x03 line.long 0x00 "TCLR,Timer Control Register" bitfld.long 0x00 14. "GPO_CFG,Configures the timer pin" "Output,Input" bitfld.long 0x00 13. "CAPT_MODE,Capture mode" "Single,On second event" bitfld.long 0x00 12. "PT,Pulse or toggle mode on PORTIMERPWM output pin" "Pulse,Toggle" newline bitfld.long 0x00 10.--11. "TRG,Trigger output mode on PORTIMERPWM output pin" "No trigger,Overflow,Overflow and match,?..." bitfld.long 0x00 8.--9. "TCM,Transition capture mode on PIEVENTCAPT input pin" "No capture,Low to high,High to low,Both" bitfld.long 0x00 7. "SCPWM,Set clear PORTIMERPWM output pin" "Clear,Set" newline bitfld.long 0x00 6. "CE,Compare enabled" "Disabled,Enabled" bitfld.long 0x00 5. "PRE,Prescaler enable" "Disabled,Enabled" bitfld.long 0x00 2.--4. "PTV,Pre-scale clock timer value" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 1. "AR,Auto reload timer" "One shot,Auto reload" bitfld.long 0x00 0. "ST,Start/Stop timer control" "Stop,Start" else group.long 0x38++0x03 line.long 0x00 "TCLR,Timer Control Register" bitfld.long 0x00 14. "GPO_CFG,Configures the timer pin" "Output,Input" bitfld.long 0x00 13. "CAPT_MODE,Capture mode" "Single,On second event" bitfld.long 0x00 12. "PT,Pulse or toggle mode on PORTIMERPWM output pin" "Pulse,Toggle" newline bitfld.long 0x00 10.--11. "TRG,Trigger output mode on PORTIMERPWM output pin" "No trigger,Overflow,Overflow and match,?..." bitfld.long 0x00 8.--9. "TCM,Transition capture mode on PIEVENTCAPT input pin" "No capture,Low to high,High to low,Both" rbitfld.long 0x00 7. "SCPWM,Set clear PORTIMERPWM output pin" "Clear,Set" newline bitfld.long 0x00 6. "CE,Compare enabled" "Disabled,Enabled" bitfld.long 0x00 5. "PRE,Prescaler enable" "Disabled,Enabled" bitfld.long 0x00 2.--4. "PTV,Pre-scale clock timer value" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 1. "AR,Auto reload timer" "One shot,Auto reload" bitfld.long 0x00 0. "ST,Start/Stop timer control" "Stop,Start" endif group.long 0x3C++0x1F line.long 0x00 "TCRR,Timer Counter Register" line.long 0x04 "TLDR,Timer Load Register" line.long 0x08 "TTGR,Timer Trigger Register" line.long 0x0C "TWPS,Timer Write Posting Bits Register" bitfld.long 0x0C 4. "W_PEND_TMAR,Write pending to TMAR register" "Not pending,Pending" bitfld.long 0x0C 3. "W_PEND_TTGR,Write pending to TTGR register" "Not pending,Pending" bitfld.long 0x0C 2. "W_PEND_TLDR,Write pending to TLDR register" "Not pending,Pending" newline bitfld.long 0x0C 1. "W_PEND_TCRR,Write pending to TCRR register" "Not pending,Pending" bitfld.long 0x0C 0. "W_PEND_TCLR,Write pending to TCLR register" "Not pending,Pending" line.long 0x10 "TMAR,Timer Match Register" line.long 0x14 "TCAR1,Timer Capture Register" line.long 0x18 "TSICR,Timer Synchronous Interface Control Register" bitfld.long 0x18 2. "POSTED,Posted mode" "Inactive,Active" bitfld.long 0x18 1. "SFT,Software reset enable" "Enabled,Disabled" line.long 0x1C "TCAR2,Timer Capture Register" tree.end tree "DMTimer 7" base ad:0x4804A000 rgroup.long 0x00++0x03 line.long 0x00 "TIDR,Identification Register" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between old scheme and current" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "FUNC,Function indicates a software compatible module family" bitfld.long 0x00 11.--15. "R_RTL,RTL version (R)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "X_MAJOR,Major revision (X)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "CUSTOM,Indicates a special version for a particular device" "0,1,2,3" bitfld.long 0x00 0.--5. "Y_MINOR,Minor revision (Y)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x10++0x03 line.long 0x00 "TIOCP_CFG,Timer OCP Configuration Register" bitfld.long 0x00 2.--3. "IDLEMODE,Power management, req/ack control" "Force-idle,No-idle,Smart-idle,Smart-idle wakeup capable" bitfld.long 0x00 1. "EMUFREE,Sensitivity to emulation (Debug) suspend event from debug subsystem" "Frozen,Free-running" bitfld.long 0x00 0. "SOFTRESET,Software reset" "No reset,Reset" group.long 0x20++0x0F line.long 0x00 "IRQ_EOI,Timer IRQ End-of-Interrupt Register" bitfld.long 0x00 0. "DMAEVENT_ACK,DMA event acknowledge event" "Acknowledged,Not acknowledged" line.long 0x04 "IRQSTATUS_RAW,Imer Status Raw Register" bitfld.long 0x04 2. "TCAR_IT_FLAG,IRQ event status for capture" "Not pending,Pending" bitfld.long 0x04 1. "OVF_IT_FLAG,IRQ event status for overflow" "Not pending,Pending" bitfld.long 0x04 0. "MAT_IT_FLAG,IRQ event status for match" "Not pending,Pending" line.long 0x08 "IRQSTATUS,Timer Status Register" bitfld.long 0x08 2. "TCAR_IT_FLAG,IRQ status for capture" "Not pending,Pending" bitfld.long 0x08 1. "OVF_IT_FLAG,IRQ status for overflow" "Not pending,Pending" bitfld.long 0x08 0. "MAT_IT_FLAG,IRQ status for match" "Not pending,Pending" line.long 0x0C "IRQENABLE_SET/CLR,Timer Interrupt Enable Set/Clear Register" setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. "TCAR_IT_FLAG,IRQ event status for capture" "Not pending,Pending" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. "OVF_IT_FLAG,IRQ event status for overflow" "Not pending,Pending" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. "MAT_IT_FLAG,IRQ event status for match" "Not pending,Pending" group.long 0x34++0x03 line.long 0x00 "IRQWAKEEN,Timer IRQ Wakeup Enable Register" bitfld.long 0x00 2. "TCAR_WUP_ENA,Wakeup generation for capture" "Disabled,Enabled" bitfld.long 0x00 1. "OVF_WUP_ENA,Wakeup generation for overflow" "Disabled,Enabled" bitfld.long 0x00 0. "MAT_WUP_ENA,Wakeup generation for match" "Disabled,Enabled" if (((d.l(ad:0x4804A000+0x38))&0xC00)==0x00)||(((d.l(ad:0x4804A000+0x38))&0x01)==0x00) group.long 0x38++0x03 line.long 0x00 "TCLR,Timer Control Register" bitfld.long 0x00 14. "GPO_CFG,Configures the timer pin" "Output,Input" bitfld.long 0x00 13. "CAPT_MODE,Capture mode" "Single,On second event" bitfld.long 0x00 12. "PT,Pulse or toggle mode on PORTIMERPWM output pin" "Pulse,Toggle" newline bitfld.long 0x00 10.--11. "TRG,Trigger output mode on PORTIMERPWM output pin" "No trigger,Overflow,Overflow and match,?..." bitfld.long 0x00 8.--9. "TCM,Transition capture mode on PIEVENTCAPT input pin" "No capture,Low to high,High to low,Both" bitfld.long 0x00 7. "SCPWM,Set clear PORTIMERPWM output pin" "Clear,Set" newline bitfld.long 0x00 6. "CE,Compare enabled" "Disabled,Enabled" bitfld.long 0x00 5. "PRE,Prescaler enable" "Disabled,Enabled" bitfld.long 0x00 2.--4. "PTV,Pre-scale clock timer value" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 1. "AR,Auto reload timer" "One shot,Auto reload" bitfld.long 0x00 0. "ST,Start/Stop timer control" "Stop,Start" else group.long 0x38++0x03 line.long 0x00 "TCLR,Timer Control Register" bitfld.long 0x00 14. "GPO_CFG,Configures the timer pin" "Output,Input" bitfld.long 0x00 13. "CAPT_MODE,Capture mode" "Single,On second event" bitfld.long 0x00 12. "PT,Pulse or toggle mode on PORTIMERPWM output pin" "Pulse,Toggle" newline bitfld.long 0x00 10.--11. "TRG,Trigger output mode on PORTIMERPWM output pin" "No trigger,Overflow,Overflow and match,?..." bitfld.long 0x00 8.--9. "TCM,Transition capture mode on PIEVENTCAPT input pin" "No capture,Low to high,High to low,Both" rbitfld.long 0x00 7. "SCPWM,Set clear PORTIMERPWM output pin" "Clear,Set" newline bitfld.long 0x00 6. "CE,Compare enabled" "Disabled,Enabled" bitfld.long 0x00 5. "PRE,Prescaler enable" "Disabled,Enabled" bitfld.long 0x00 2.--4. "PTV,Pre-scale clock timer value" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 1. "AR,Auto reload timer" "One shot,Auto reload" bitfld.long 0x00 0. "ST,Start/Stop timer control" "Stop,Start" endif group.long 0x3C++0x1F line.long 0x00 "TCRR,Timer Counter Register" line.long 0x04 "TLDR,Timer Load Register" line.long 0x08 "TTGR,Timer Trigger Register" line.long 0x0C "TWPS,Timer Write Posting Bits Register" bitfld.long 0x0C 4. "W_PEND_TMAR,Write pending to TMAR register" "Not pending,Pending" bitfld.long 0x0C 3. "W_PEND_TTGR,Write pending to TTGR register" "Not pending,Pending" bitfld.long 0x0C 2. "W_PEND_TLDR,Write pending to TLDR register" "Not pending,Pending" newline bitfld.long 0x0C 1. "W_PEND_TCRR,Write pending to TCRR register" "Not pending,Pending" bitfld.long 0x0C 0. "W_PEND_TCLR,Write pending to TCLR register" "Not pending,Pending" line.long 0x10 "TMAR,Timer Match Register" line.long 0x14 "TCAR1,Timer Capture Register" line.long 0x18 "TSICR,Timer Synchronous Interface Control Register" bitfld.long 0x18 2. "POSTED,Posted mode" "Inactive,Active" bitfld.long 0x18 1. "SFT,Software reset enable" "Enabled,Disabled" line.long 0x1C "TCAR2,Timer Capture Register" tree.end tree.end tree "DMTIMER 1MS" base ad:0x44E31000 rgroup.long 0x00++0x03 line.long 0x00 "TIDR,IP Revision Code Register" hexmask.long.byte 0x00 0.--7. 1. "TID_REV,IP revision" group.long 0x10++0x03 line.long 0x00 "TIOCP_CFG,OCP Interface Control Register" bitfld.long 0x00 8.--9. "CLOCKACTIVITY,Clock activity" "0,1,2,3" bitfld.long 0x00 5. "EMUFREE,Sensitivity to emulation (Debug) suspend event from debug subsystem" "Frozen,Free-running" bitfld.long 0x00 3.--4. "IDLEMODE,Power management, req/ack control" "Force-idle,No-idle,Smart-idle,Smart-idle wakeup capable" newline bitfld.long 0x00 2. "ENAWAKEUP,Wake-up feature global control" "Disabed,Enabled" bitfld.long 0x00 1. "SOFTRESET,Software reset" "No reset,Reset" bitfld.long 0x00 0. "AUTOIDLE,Internal OCP clock gating strategy" "Free-running,Gated" rgroup.long 0x14++0x03 line.long 0x00 "TISTAT,Status Register" bitfld.long 0x00 0. "RESETDONE,Internal reset monitoring" "In progress,Done" group.long 0x18++0x1B line.long 0x00 "TISR,Timer Status Register" eventfld.long 0x00 2. "TCAR_IT_FLAG,External pulse transition capture" "Not requested,Requested" eventfld.long 0x00 1. "OVF_IT_FLAG,TCRR overflow" "Not requested,Requested" eventfld.long 0x00 0. "MAT_IT_FLAG,Compare result of TCRR and TMAR" "Not requested,Requested" line.long 0x04 "TIER,Interrupt Control Register" bitfld.long 0x04 2. "TCAR_IT_FLAG,External pulse transition capture enable" "Disabed,Enabled" bitfld.long 0x04 1. "OVF_IT_FLAG,TCRR overflow enable" "Disabed,Enabled" bitfld.long 0x04 0. "MAT_IT_FLAG,Compare result of TCRR and TMAR enable" "Disabed,Enabled" line.long 0x08 "TWER,Wakeup Control Register" bitfld.long 0x08 2. "TCAR_WUP_ENA,Enable capture wake-up" "Disabled,Enabled" bitfld.long 0x08 1. "OVF_WUP_ENA,Enable overflow wake-up" "Disabled,Enabled" bitfld.long 0x08 0. "MAT_WUP_ENA,Enable match wake-up" "Disabled,Enabled" line.long 0x0C "TCLR,Timer Control Register" bitfld.long 0x0C 14. "GPO_CFG,Configures the timer pin" "Output,Input" bitfld.long 0x0C 13. "CAPT_MODE,Capture mode select bit (First/second)" "First,Second" bitfld.long 0x0C 12. "PT,Pulse or toggle select bit" "Pulse,Toggle" newline bitfld.long 0x0C 10.--11. "TRG,Trigger output mode" "No trigger,Overflow,Overflow and match,?..." bitfld.long 0x0C 8.--9. "TCM,Transition capture mode" "No capture,Rising edge,Falling edge,Both edges" bitfld.long 0x0C 7. "SCPWM,Pulse width modulation output pin default value" "Low,High" newline bitfld.long 0x0C 6. "CE,Compare enable" "Disabled,Enabled" bitfld.long 0x0C 5. "PRE,Prescaler enable" "Disabled,Enabled" bitfld.long 0x0C 2.--4. "PTV,Trigger output mode" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 1. "AR,Auto reload timer" "One shot,Auto reload" bitfld.long 0x0C 0. "ST,Start/stop timer control" "Stop,Start" line.long 0x10 "TCRR,Timer Counter Register" line.long 0x14 "TLDR,Timer Load Register" line.long 0x18 "TTGR,Timer Trigger Register" rgroup.long 0x34++0x03 line.long 0x00 "TWPS,Timer Write Posting Bits Register" bitfld.long 0x00 9. "W_PEND_TOWR,Write pending for register TOWR" "Not pending,Pending" bitfld.long 0x00 8. "W_PEND_TOCR,Write pending for register TOCR" "Not pending,Pending" bitfld.long 0x00 7. "W_PEND_TCVR,Write pending for register TCVR" "Not pending,Pending" newline bitfld.long 0x00 6. "W_PEND_TNIR,Write pending for register TNIR" "Not pending,Pending" bitfld.long 0x00 5. "W_PEND_TPIR,Write pending for register TPIR" "Not pending,Pending" bitfld.long 0x00 4. "W_PEND_TMAR,Write pending for register TMAR" "Not pending,Pending" newline bitfld.long 0x00 3. "W_PEND_TTGR,Write pending for register TTGR" "Not pending,Pending" bitfld.long 0x00 2. "W_PEND_TLDR,Write pending for register TLDR" "Not pending,Pending" bitfld.long 0x00 1. "W_PEND_TCRR,Write pending for register TCRR" "Not pending,Pending" newline bitfld.long 0x00 0. "W_PEND_TCLR,Write pending for register TCLR" "Not pending,Pending" group.long 0x38++0x03 line.long 0x00 "TMAR,Timer Match Register" rgroup.long 0x3C++0x03 line.long 0x00 "TCAR1,Timer Capture Register" group.long 0x40++0x03 line.long 0x00 "TSICR,Timer Synchronous Interface Control Register" bitfld.long 0x00 2. "POSTED,Posted mode" "Inactive,Active" bitfld.long 0x00 1. "SFT,Software reset enable" "Disabled,Enabled" rgroup.long 0x44++0x03 line.long 0x00 "TCAR2,Timer Capture Register" group.long 0x48++0x13 line.long 0x00 "TPIR,Timer Positive Increment Register" line.long 0x04 "TNIR,Timer Negative Increment Register" line.long 0x08 "TCVR,Timer Counter Value Register" line.long 0x0C "TOCR,Timer Overflow Counter Register" hexmask.long.tbyte 0x0C 0.--23. 1. "OVF_COUNTER_VALUE,The number of overflow events" line.long 0x10 "TOWR,Timer Overflow Wrapping Register" hexmask.long.tbyte 0x10 0.--23. 1. "OVF_WRAPPING_VALUE,The number of masked interrupts" tree.end tree "RTCSS (Real Time Clock)" base ad:0x44E3E000 group.long 0x00++0x03 line.long 0x00 "SECONDS_REG,Seconds Register" bitfld.long 0x00 4.--6. "SEC,2nd digit of seconds" "0,1,2,3,4,5,?..." bitfld.long 0x00 0.--3. ",1st digit of seconds" "0,1,2,3,4,5,6,7,8,9,?..." group.long 0x04++0x03 line.long 0x00 "MINUTES_REG,Minutes Register" bitfld.long 0x00 4.--6. "MIN,2nd digit of minutes" "0,1,2,3,4,5,?..." bitfld.long 0x00 0.--3. ",1st digit of minutes" "0,1,2,3,4,5,6,7,8,9,?..." if (((d.l(ad:0x44E3E000+0x40))&0x08)==0x08)&&(((d.l(ad:0x44E3E000+0x08))&0x30)==0x00) group.long 0x08++0x03 line.long 0x00 "HOURS_REG,Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "-,1,2,3,4,5,6,7,8,9,?..." newline bitfld.long 0x00 7. ",PM AM select" "AM,PM" elif (((d.l(ad:0x44E3E000+0x40))&0x08)==0x08)&&(((d.l(ad:0x44E3E000+0x08))&0x30)==0x10) group.long 0x08++0x03 line.long 0x00 "HOURS_REG,Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "0,1,2,?..." newline bitfld.long 0x00 7. ",PM AM select" "AM,PM" elif (((d.l(ad:0x44E3E000+0x40))&0x08)==0x00)&&(((d.l(ad:0x44E3E000+0x08))&0x30)==0x20) group.long 0x08++0x03 line.long 0x00 "HOURS_REG,Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "0,1,2,3,?..." elif (((d.l(ad:0x44E3E000+0x40))&0x08)==0x00)&&(((d.l(ad:0x44E3E000+0x008))&0x30)==0x10) group.long 0x08++0x03 line.long 0x00 "HOURS_REG,Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "0,1,2,3,4,5,6,7,8,9,?..." elif (((d.l(ad:0x44E3E000+0x40))&0x08)==0x00)&&(((d.l(ad:0x44E3E000+0x008))&0x30)==0x00) group.long 0x08++0x03 line.long 0x00 "HOURS_REG,Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "-,1,2,3,4,5,6,7,8,9,?..." elif (((d.l(ad:0x44E3E000+0x40))&0x08)==0x08) group.long 0x08++0x03 line.long 0x00 "HOURS_REG,Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "0,1,2,3,4,5,6,7,8,9,?..." newline bitfld.long 0x00 7. ",PM AM select" "AM,PM" else group.long 0x08++0x03 line.long 0x00 "HOURS_REG,Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "0,1,2,3,4,5,6,7,8,9,?..." endif if ((((d.l(ad:0x44E3E000+0x10))&0x1F)==(0x01||0x03||0x05||0x07||0x08||0x10||0x12))&&((d.l(ad:0x44E3E000+0x0C))&0x30)==0x30) group.long 0x0C++0x03 line.long 0x00 "DAYS_REG,Days Register" bitfld.long 0x00 4.--5. "DAY,2nd digit of days" "0,1,2,3" bitfld.long 0x00 0.--3. ",1st digit of days" "0,1,?..." elif (((d.l(ad:0x44E3E000+0x10))&0x1F)==(0x04||0x06||0x09||0x11))&&(((d.l(ad:0x44E3E000+0x0C))&0x30)==0x30) group.long 0x0C++0x03 line.long 0x00 "DAYS_REG,Days Register" bitfld.long 0x00 4.--5. "DAY,2nd digit of days" "0,1,2,3" bitfld.long 0x00 0.--3. ",1st digit of days" "0,?..." elif (((d.l(ad:0x44E3E000+0x10))&0x1F)==0x02)&&(((d.l(ad:0x44E3E000+0x0C))&0x30)==0x20)&&((((d.l(ad:0x44E3E000+0x14))&0xFF)==(0x00||0x04||0x08||0x12||0x16||0x20||0x24||0x28))||(((d.l(ad:0x44E3E000+0x14))&0xFF)==(0x32||0x36||0x40||0x44||0x48||0x52||0x56||0x60))||(((d.l(ad:0x44E3E000+0x14))&0xFF)==(0x64||0x68||0x72||0x76))) group.long 0x0C++0x03 line.long 0x00 "DAYS_REG,Days Register" bitfld.long 0x00 4.--5. "DAY,2nd digit of days" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of days" "-,1,2,3,4,5,6,7,8,9,?..." elif (((d.l(ad:0x44E3E000+0x10))&0x1F)==0x02)&&(((d.l(ad:0x44E3E000+0x0C))&0x30)==0x20)&&(((d.l(ad:0x44E3E000+0x14))&0xFF)==(0x80||0x84||0x88||0x92||0x96)) group.long 0x0C++0x03 line.long 0x00 "DAYS_REG,Days Register" bitfld.long 0x00 4.--5. "DAY,2nd digit of days" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of days" "-,1,2,3,4,5,6,7,8,9,?..." elif (((d.l(ad:0x44E3E000+0x10))&0x1F)==0x02)&&(((d.l(ad:0x44E3E000+0x0C))&0x30)==0x20) group.long 0x0C++0x03 line.long 0x00 "DAYS_REG,Days Register" bitfld.long 0x00 4.--5. "DAY,2nd digit of days" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of days" "-,1,2,3,4,5,6,7,8,?..." elif (((d.l(ad:0x44E3E000+0x0C))&0x30)==0x00) group.long 0x0C++0x03 line.long 0x00 "DAYS_REG,Days Register" bitfld.long 0x00 4.--5. "DAY,2nd digit of days" "0,1,2,3" bitfld.long 0x00 0.--3. ",1st digit of days" "-,1,2,3,4,5,6,7,8,9,?..." elif (((d.l(ad:0x44E3E000+0x10))&0x1F)==0x02)&&(((d.l(ad:0x44E3E000+0x0C))&0x3F)<0x29) group.long 0x0C++0x03 line.long 0x00 "DAYS_REG,Days Register" bitfld.long 0x00 4.--5. "DAY,2nd digit of days" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of days" "0,1,2,3,4,5,6,7,8,?..." else group.long 0x0C++0x03 line.long 0x00 "DAYS_REG,Days Register" bitfld.long 0x00 4.--5. "DAY,2nd digit of days" "0,1,2,3" bitfld.long 0x00 0.--3. ",1st digit of days" "0,1,2,3,4,5,6,7,8,9,?..." endif if (((d.l(ad:0x44E3E000+0x10))&0x10)==0x10) group.long 0x10++0x03 line.long 0x00 "MONTHS_REG,Months Register" bitfld.long 0x00 4. "MONTH,2nd digit of months" "0,1" bitfld.long 0x00 0.--3. ",1st digit of months" "0,1,2,?..." else group.long 0x10++0x03 line.long 0x00 "MONTHS_REG,Months Register" bitfld.long 0x00 4. "MONTH,2nd digit of months" "0,1" bitfld.long 0x00 0.--3. ",1st digit of months" "-,1,2,3,4,5,6,7,8,9,?..." endif group.long 0x14++0x03 line.long 0x00 "YEARS_REG,Years Register" bitfld.long 0x00 4.--7. "YEAR,2nd digit of years" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 0.--3. ",1st digit of years" "0,1,2,3,4,5,6,7,8,9,?..." group.long 0x18++0x03 line.long 0x00 "WEEKS_REG,Weeks Register" bitfld.long 0x00 0.--2. "WEEK,Day of week" "Sunday,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,?..." group.long 0x20++0x03 line.long 0x00 "ALARM_SECONDS_REG,Alarm Seconds Register" bitfld.long 0x00 4.--6. "ALARMSEC,2nd digit of seconds" "0,1,2,3,4,5,?..." bitfld.long 0x00 0.--3. ",1st digit of seconds" "0,1,2,3,4,5,6,7,8,9,?..." group.long 0x24++0x03 line.long 0x00 "ALARM_MINUTES_REG,Alarm Minutes Register" bitfld.long 0x00 4.--6. "ALARM_MIN,2nd digit of minutes" "0,1,2,3,4,5,?..." bitfld.long 0x00 0.--3. ",1st digit of minutes" "0,1,2,3,4,5,6,7,8,9,?..." if (((d.l(ad:0x44E3E000+0x40))&0x08)==0x08)&&(((d.l(ad:0x44E3E000+0x28))&0x30)==0x00) group.long 0x28++0x03 line.long 0x00 "ALARM_HOURS_REG,Alarm Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "-,1,2,3,4,5,6,7,8,9,?..." newline bitfld.long 0x00 7. ",PM AM" "AM,PM" elif (((d.l(ad:0x44E3E000+0x40))&0x08)==0x08)&&(((d.l(ad:0x44E3E000+0x28))&0x30)==0x10) group.long 0x28++0x03 line.long 0x00 "ALARM_HOURS_REG,Alarm Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "0,1,2,?..." newline bitfld.long 0x00 7. ",PM AM" "AM,PM" elif (((d.l(ad:0x44E3E000+0x40))&0x08)==0x00)&&(((d.l(ad:0x44E3E000+0x28))&0x30)==0x20) group.long 0x28++0x03 line.long 0x00 "ALARM_HOURS_REG,Alarm Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "0,1,2,3,?..." elif (((d.l(ad:0x44E3E000+0x40))&0x08)==0x00)&&(((d.l(ad:0x44E3E000+0x28))&0x30)==0x10) group.long 0x28++0x03 line.long 0x00 "ALARM_HOURS_REG,Alarm Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "0,1,2,3,4,5,6,7,8,9,?..." elif (((d.l(ad:0x44E3E000+0x40))&0x08)==0x00)&&(((d.l(ad:0x44E3E000+0x28))&0x30)==0x00) group.long 0x28++0x03 line.long 0x00 "ALARM_HOURS_REG,Alarm Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "-,1,2,3,4,5,6,7,8,9,?..." elif (((d.l(ad:0x44E3E000+0x40))&0x08)==0x08) group.long 0x28++0x03 line.long 0x00 "ALARM_HOURS_REG,Alarm Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "0,1,2,3,4,5,6,7,8,9,?..." newline bitfld.long 0x00 7. ",PM AM select" "AM,PM" else group.long 0x28++0x03 line.long 0x00 "ALARM_HOURS_REG,Alarm Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "0,1,2,3,4,5,6,7,8,9,?..." endif if ((((d.l(ad:0x44E3E000+0x10))&0x1F)==(0x01||0x03||0x05||0x07||0x08||0x10||0x12))&&((d.l(ad:0x44E3E000+0x2C))&0x30)==0x30) group.long 0x2C++0x03 line.long 0x00 "ALARM_DAYS_REG,Alarm Day Of The Month Register" bitfld.long 0x00 4.--5. "ALARM_DAY,2nd digit of days" "0,1,2,3" bitfld.long 0x00 0.--3. ",1st digit of days" "0,1,?..." elif (((d.l(ad:0x44E3E000+0x10))&0x1F)==(0x04||0x06||0x09||0x11))&&(((d.l(ad:0x44E3E000+0x2C))&0x30)==0x30) group.long 0x2C++0x03 line.long 0x00 "ALARM_DAYS_REG,Alarm Day Of The Month Register" bitfld.long 0x00 4.--5. "ALARM_DAY,2nd digit of days" "0,1,2,3" bitfld.long 0x00 0.--3. ",1st digit of days" "0,?..." elif (((d.l(ad:0x44E3E000+0x10))&0x1F)==0x02)&&(((d.l(ad:0x44E3E000+0x0C))&0x30)==0x20)&&((((d.l(ad:0x44E3E000+0x14))&0xFF)==(0x00||0x04||0x08||0x12||0x16||0x20||0x24||0x28))||(((d.l(ad:0x44E3E000+0x14))&0xFF)==(0x32||0x36||0x40||0x44||0x48||0x52||0x56||0x60))||(((d.l(ad:0x44E3E000+0x14))&0xFF)==(0x64||0x68||0x72||0x76))) group.long 0x0C++0x03 line.long 0x00 "ALARM_DAYS_REG,Alarm Day Of The Month Register" bitfld.long 0x00 4.--5. "ALARM_DAY,2nd digit of days" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of days" "-,1,2,3,4,5,6,7,8,9,?..." elif (((d.l(ad:0x44E3E000+0x10))&0x1F)==0x02)&&(((d.l(ad:0x44E3E000+0x0C))&0x30)==0x20)&&(((d.l(ad:0x44E3E000+0x14))&0xFF)==(0x80||0x84||0x88||0x92||0x96)) group.long 0x0C++0x03 line.long 0x00 "ALARM_DAYS_REG,Alarm Day Of The Month Register" bitfld.long 0x00 4.--5. "ALARM_DAY,2nd digit of days" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of days" "-,1,2,3,4,5,6,7,8,9,?..." elif (((d.l(ad:0x44E3E000+0x10))&0x1F)==0x02)&&(((d.l(ad:0x44E3E000+0x0C))&0x30)==0x20) group.long 0x0C++0x03 line.long 0x00 "ALARM_DAYS_REG,Alarm Day Of The Month Register" bitfld.long 0x00 4.--5. "ALARM_DAY,2nd digit of days" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of days" "-,1,2,3,4,5,6,7,8,?..." elif (((d.l(ad:0x44E3E000+0x0C))&0x30)==0x00) group.long 0x0C++0x03 line.long 0x00 "ALARM_DAYS_REG,Alarm Day Of The Month Register" bitfld.long 0x00 4.--5. "ALARM_DAY,2nd digit of days" "0,1,2,3" bitfld.long 0x00 0.--3. ",1st digit of days" "-,1,2,3,4,5,6,7,8,9,?..." elif (((d.l(ad:0x44E3E000+0x10))&0x1F)==0x02)&&(((d.l(ad:0x44E3E000+0x0C))&0x3F)<0x29) group.long 0x0C++0x03 line.long 0x00 "ALARM_DAYS_REG,Alarm Day Of The Month Register" bitfld.long 0x00 4.--5. "ALARM_DAY,2nd digit of days" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of days" "0,1,2,3,4,5,6,7,8,?..." else group.long 0x2C++0x03 line.long 0x00 "ALARM_DAYS_REG,Alarm Day Of The Month Register" bitfld.long 0x00 4.--5. "ALARM_DAY,2nd digit of days" "0,1,2,3" bitfld.long 0x00 0.--3. ",1st digit of days" "0,1,2,3,4,5,6,7,8,9,?..." endif if (((d.l(ad:0x44E3E000+0x30))&0x10)==0x10) group.long 0x30++0x03 line.long 0x00 "ALARM_MONTHS_REG,Alarm Months Register" bitfld.long 0x00 4. "ALARM_MONTH,2nd digit of months" "0,1" bitfld.long 0x00 0.--3. ",1st digit of months" "0,1,2,?..." else group.long 0x30++0x03 line.long 0x00 "ALARM_MONTHS_REG,Alarm Months Register" bitfld.long 0x00 4. "ALARM_MONTH,2nd digit of months" "0,1" bitfld.long 0x00 0.--3. ",1st digit of months" "-,1,2,3,4,5,6,7,8,9,?..." endif group.long 0x34++0x03 line.long 0x00 "ALARM_YEARS_REG,Alarm Years Register" bitfld.long 0x00 4.--7. "ALARM_YEAR,2nd digit of years" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 0.--3. ",1st digit of years" "0,1,2,3,4,5,6,7,8,9,?..." if (((d.l(ad:0x44E3E000+0x40))&0x01)==0x01) group.long 0x40++0x03 line.long 0x00 "RTC_CTRL_REG,Control Register" bitfld.long 0x00 6. "RTC_DISABLE,Disable RTC module and gate 32-kHz reference clock" "No,Yes" rbitfld.long 0x00 5. "SET_32_COUNTER,Set the 32-kHz counter with COMP_REG value" "No action,Set" newline bitfld.long 0x00 4. "TEST_MODE,Test mode" "Functional,Test" bitfld.long 0x00 3. "MODE_12_24,12 or 24 hour mode" "24-hour,12-hour" newline bitfld.long 0x00 2. "AUTO_COMP,Enable oscillator compensation mode" "Disabled,Enabled" bitfld.long 0x00 1. "ROUND_30S,Enable one-time rounding to nearest minute" "Not round,Round" newline bitfld.long 0x00 0. "STOP_RTC,Stop the RTC 32-kHz counter" "Frozen,Running" else group.long 0x40++0x03 line.long 0x00 "RTC_CTRL_REG,Control Register" bitfld.long 0x00 6. "RTC_DISABLE,Disable RTC" "No,Yes" bitfld.long 0x00 5. "SET_32_COUNTER,Set the 32-kHz counter with COMP_REG value" "No action,Set" newline bitfld.long 0x00 4. "TEST_MODE,Test mode" "Functional,Test" bitfld.long 0x00 3. "MODE_12_24,12 or 24 hour mode" "24-hour,12-hour" newline bitfld.long 0x00 2. "AUTO_COMP,Enable oscillator compensation mode" "Disabled,Enabled" bitfld.long 0x00 1. "ROUND_30S,Enable one-time rounding to nearest minute" "Not round,Round" newline bitfld.long 0x00 0. "STOP_RTC,Stop the RTC 32-kHz counter" "Frozen,Running" endif group.long 0x44++0x13 line.long 0x00 "RTC_STATUS_REG,Status Register" bitfld.long 0x00 7. "ALARM2,Indicates that an alarm2 interrupt has been generated" "Not generated,Generated" bitfld.long 0x00 6. "ALARM,Indicates that an alarm interrupt has been generated" "Not generated,Generated" newline rbitfld.long 0x00 5. "ONE_DAY_EVENT,One day has occurred" "Not occurred,Occurred" rbitfld.long 0x00 4. "ONE_HR_EVENT,One hour has occurred" "Not occurred,Occurred" newline rbitfld.long 0x00 3. "ONE_MIN_EVENT,One minute has occurred" "Not occurred,Occurred" rbitfld.long 0x00 2. "ONE_SEC_EVENT,One second has occurred" "Not occurred,Occurred" newline rbitfld.long 0x00 1. "RUN,RTC is frozen or is running" "Frozen,Running" rbitfld.long 0x00 0. "BUSY,Status of RTC module updating event" ">15us,Now" line.long 0x04 "RTC_INTERRUPTS_REG,Interrupts Register" bitfld.long 0x04 4. "IT_ALARM2,Enable one interrupt when the alarm 2 value is reached" "Disabled,Enabled" bitfld.long 0x04 3. "IT_ALARM,Enable one interrupt when the alarm value is reached" "Disabled,Enabled" newline bitfld.long 0x04 2. "IT_TIMER,Enable periodic interrupt" "Disabled,Enabled" bitfld.long 0x04 0.--1. "EVERY,Interrupt period" "Second,Minute,Hour,Day" line.long 0x08 "RTC_COMP_LSB_REG,Compensation LSB Register" hexmask.long.byte 0x08 0.--7. 1. "RTC_COMP_LSB,Indicates number of 32-kHz periods to be added into the 32-kHz counter every hour" line.long 0x0C "RTC_COMP_MSB_REG,Compensation MSB Register" hexmask.long.byte 0x0C 0.--7. 1. "RTC_COMP_MSB,Indicates number of 32-kHz periods to be added into the 32-kHz counter every hour" line.long 0x10 "RTC_OSC_REG,Oscillator Register" bitfld.long 0x10 6. "EN_32KCLK,32-kHz clock enable post clock mux" "Enabled,Disabled" bitfld.long 0x10 4. "OSC32K_GZ,Disable the oscillator and apply high impedance to the output" "No,Yes" newline bitfld.long 0x10 3. "SEL_32KCLK_SRC,32-kHz clock source select" "Internal,External" bitfld.long 0x10 2. "RES_SELECT,External feedback resistor" "Internal,External" newline bitfld.long 0x10 1. "SW2,Inverter size adjustment 2" "0,1" bitfld.long 0x10 0. "SW1,Inverter size adjustment 1" "0,1" group.long 0x60++0x0B line.long 0x00 "RTC_SCRATCH0_REG,Scratch 0 Register" line.long 0x04 "RTC_SCRATCH1_REG,Scratch 1 Register" line.long 0x08 "RTC_SCRATCH2_REG,Scratch 2 Register" wgroup.long 0x6C++0x07 line.long 0x00 "KICK0R,Kick 0 Register" line.long 0x04 "KICK1R,Kick 1 Register" rgroup.long 0x74++0x03 line.long 0x00 "RTC_REVISION,Revision Register" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between old scheme and current" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "FUNC,Function indicates a software compatible module family" newline bitfld.long 0x00 11.--15. "R_RTL,RTL version (R)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. "X_MAJOR,Major revision" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. "CUSTOM,Indicates a special version for a particular device" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "Y_MINOR,Minor revision (Y)" group.long 0x78++0x07 line.long 0x00 "RTC_SYSCONFIG,System Configuration Register" bitfld.long 0x00 0.--1. "IDLEMODE,Select IDLE mode" "Force idle,No idle mode,Smart-idle,Smart idle with wakeup" line.long 0x04 "RTC_IRQWAKEEN,Wakeup Enable Register" bitfld.long 0x04 1. "ALARM_WAKEEN,Wakeup generation for event alarm" "Disabled,Enabled" bitfld.long 0x04 0. "ALARM_TIMER,Wakeup generation for event timer" "Disabled,Enabled" if (((d.l(ad:0x44E3E000+0x80))&0x70)<0x60) group.long 0x80++0x03 line.long 0x00 "ALARM2_SECONDS_REG,Alarm2 Seconds Register" bitfld.long 0x00 4.--6. "ALARM2_SEC,2nd digit of seconds" "0,1,2,3,4,5,?..." bitfld.long 0x00 0.--3. ",1st digit of seconds" "0,1,2,3,4,5,6,7,8,9,?..." else group.long 0x80++0x03 line.long 0x00 "ALARM2_SECONDS_REG,Alarm2 Seconds Register" bitfld.long 0x00 4.--6. "ALARM2_SEC,2nd digit of seconds" "0,1,2,3,4,5,?..." bitfld.long 0x00 0.--3. ",1st digit of seconds" "?..." endif if (((d.l(ad:0x44E3E000+0x84))&0x70)<0x60) group.long 0x84++0x03 line.long 0x00 "ALARM2_MINUTES_REG,Alarm2 Minutes Register" bitfld.long 0x00 4.--6. "ALARM2_MIN,2nd digit of minutes" "0,1,2,3,4,5,?..." bitfld.long 0x00 0.--3. ",1st digit of minutes" "0,1,2,3,4,5,6,7,8,9,?..." else group.long 0x84++0x03 line.long 0x00 "ALARM2_MINUTES_REG,Alarm2 Minutes Register" bitfld.long 0x00 4.--6. "ALARM2_MIN,2nd digit of minutes" "0,1,2,3,4,5,?..." bitfld.long 0x00 0.--3. ",1st digit of minutes" "?..." endif if (((d.l(ad:0x44E3E000+0x40))&0x08)==0x08)&&(((d.l(ad:0x44E3E000+0x88))&0x30)==0x00) group.long 0x88++0x03 line.long 0x00 "ALARM2_HOURS_REG,Alarm2 Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "-,1,2,3,4,5,6,7,8,9,?..." newline bitfld.long 0x00 7. ",PM AM select" "AM,PM" elif (((d.l(ad:0x44E3E000+0x40))&0x08)==0x08)&&(((d.l(ad:0x44E3E000+0x88))&0x30)==0x10) group.long 0x88++0x03 line.long 0x00 "ALARM2_HOURS_REG,Alarm2 Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "0,1,2,?..." newline bitfld.long 0x00 7. ",PM AM select" "AM,PM" elif (((d.l(ad:0x44E3E000+0x40))&0x08)==0x00)&&(((d.l(ad:0x44E3E000+0x88))&0x30)==0x20) group.long 0x88++0x03 line.long 0x00 "ALARM2_HOURS_REG,Alarm2 Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "0,1,2,3,?..." elif (((d.l(ad:0x44E3E000+0x40))&0x08)==0x00)&&(((d.l(ad:0x44E3E000+0x88))&0x30)==0x10) group.long 0x88++0x03 line.long 0x00 "ALARM2_HOURS_REG,Alarm2 Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "0,1,2,3,4,5,6,7,8,9,?..." elif (((d.l(ad:0x44E3E000+0x40))&0x08)==0x00)&&(((d.l(ad:0x44E3E000+0x88))&0x30)==0x00) group.long 0x88++0x03 line.long 0x00 "ALARM2_HOURS_REG,Alarm2 Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "-,1,2,3,4,5,6,7,8,9,?..." elif (((d.l(ad:0x44E3E000+0x40))&0x08)==0x08) group.long 0x88++0x03 line.long 0x00 "ALARM2_HOURS_REG,Alarm2 Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "0,1,2,3,4,5,6,7,8,9,?..." newline bitfld.long 0x00 7. ",PM AM select" "AM,PM" else group.long 0x88++0x03 line.long 0x00 "ALARM2_HOURS_REG,Alarm2 Hours Register" bitfld.long 0x00 4.--5. "HOUR,2nd digit of hours" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of hours" "0,1,2,3,4,5,6,7,8,9,?..." endif if (((d.l(ad:0x44E3E000+0x10))&0x1F)==(0x01||0x03||0x05||0x07||0x08||0x10||0x12))&&(((d.l(ad:0x44E3E000+0x8C))&0x30)==0x30) group.long 0x8C++0x03 line.long 0x00 "ALARM2_DAYS_REG,Alarm2 Day Of The Month Register" bitfld.long 0x00 4.--5. "ALARM_DAY,2nd digit of days" "0,1,2,3" bitfld.long 0x00 0.--3. ",1st digit of days" "0,1,?..." elif (((d.l(ad:0x44E3E000+0x10))&0x1F)==(0x04||0x06||0x09||0x11))&&(((d.l(ad:0x44E3E000+0x8C))&0x30)==0x30) group.long 0x8C++0x03 line.long 0x00 "ALARM2_DAYS_REG,Alarm2 Day Of The Month Register" bitfld.long 0x00 4.--5. "ALARM_DAY,2nd digit of days" "0,1,2,3" bitfld.long 0x00 0.--3. ",1st digit of days" "0,?..." elif (((d.l(ad:0x44E3E000+0x10))&0x1F)==0x02)&&(((d.l(ad:0x44E3E000+0x8C))&0x30)==0x00)&&(((d.l(ad:0x44E3E000+0x14))&0x0F)==(0x00||0x04||0x08||0x0C)) group.long 0x8C++0x03 line.long 0x00 "ALARM2_DAYS_REG,Alarm2 Day Of The Month Register" bitfld.long 0x00 4.--5. "ALARM_DAY,2nd digit of days" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of days" ",1,2,3,4,5,6,7,8,9,?..." elif (((d.l(ad:0x44E3E000+0x10))&0x1F)==0x02)&&(((d.l(ad:0x44E3E000+0x8C))&0x3F)!=0x00)&&(((d.l(ad:0x44E3E000+0x14))&0x0F)==(0x00||0x04||0x08||0x0C)) group.long 0x8C++0x03 line.long 0x00 "ALARM2_DAYS_REG,Alarm2 Day Of The Month Register" bitfld.long 0x00 4.--5. "ALARM_DAY,2nd digit of days" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of days" "0,1,2,3,4,5,6,7,8,9,?..." elif (((d.l(ad:0x44E3E000+0x10))&0x1F)!=0x02)&&(((d.l(ad:0x44E3E000+0x8C))&0x30)==0x00) group.long 0x8C++0x03 line.long 0x00 "ALARM2_DAYS_REG,Alarm2 Day Of The Month Register" bitfld.long 0x00 4.--5. "ALARM_DAY,2nd digit of days" "0,1,2,3" bitfld.long 0x00 0.--3. ",1st digit of days" ",1,2,3,4,5,6,7,8,9,?..." elif (((d.l(ad:0x44E3E000+0x10))&0x1F)==0x02)&&(((d.l(ad:0x44E3E000+0x8C))&0x3F)<0x29) group.long 0x8C++0x03 line.long 0x00 "ALARM2_DAYS_REG,Alarm2 Day Of The Month Register" bitfld.long 0x00 4.--5. "ALARM_DAY,2nd digit of days" "0,1,2,?..." bitfld.long 0x00 0.--3. ",1st digit of days" "0,1,2,3,4,5,6,7,8,?..." else group.long 0x8C++0x03 line.long 0x00 "ALARM2_DAYS_REG,Alarm2 Day Of The Month Register" bitfld.long 0x00 4.--5. "ALARM_DAY,2nd digit of days" "0,1,2,3" bitfld.long 0x00 0.--3. ",1st digit of days" "0,1,2,3,4,5,6,7,8,9,?..." endif if (((d.l(ad:0x44E3E000+0x90))&0x10)==0x10) group.long 0x90++0x03 line.long 0x00 "ALARM2_MONTHS_REG,Alarm2 Months Register" bitfld.long 0x00 4. "ALARM2_MONTH,2nd digit of months" "0,1" bitfld.long 0x00 0.--3. ",1st digit of months" "0,1,2,?..." else group.long 0x90++0x03 line.long 0x00 "ALARM2_MONTHS_REG,Alarm2 Months Register" bitfld.long 0x00 4. "ALARM2_MONTH,2nd digit of months" "0,1" bitfld.long 0x00 0.--3. ",1st digit of months" ",1,2,3,4,5,6,7,8,9,?..." endif group.long 0x94++0x03 line.long 0x00 "ALARM2_YEARS_REG,Alarm2 Years Register" bitfld.long 0x00 4.--7. "ALARM2_YEAR,2nd digit of years" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 0.--3. ",1st digit of years" "0,1,2,3,4,5,6,7,8,9,?..." group.long 0x98++0x07 line.long 0x00 "RTC_PMIC,PMIC Register" rbitfld.long 0x00 17.--18. "PWR_ENABLE_SM,Power state machine state" "Idle,Shutdown,Time-based wakeup,External-event-based wakeup" bitfld.long 0x00 16. "PWR_ENABLE_EN,Enable for PMIC_POWER_EN signal" "Disabled,Enabled" newline eventfld.long 0x00 15. "EXT_WAKEUP_STATUS[3],External wakeup 3 status" "Not occurred,Occurred" eventfld.long 0x00 14. "EXT_WAKEUP_STATUS[2],External wakeup 2 status" "Not occurred,Occurred" newline eventfld.long 0x00 13. "EXT_WAKEUP_STATUS[9],External wakeup 1 status" "Not occurred,Occurred" eventfld.long 0x00 12. "EXT_WAKEUP_STATUS[0],External wakeup 0 status" "Not occurred,Occurred" newline bitfld.long 0x00 11. "EXT_WAKEUP_DB_EN[3],External wakeup debounce enabled" "Disabled,Enabled" bitfld.long 0x00 10. "EXT_WAKEUP_DB_EN[2],External wakeup debounce enabled" "Disabled,Enabled" newline bitfld.long 0x00 9. "EXT_WAKEUP_DB_EN[1],External wakeup debounce enabled" "Disabled,Enabled" bitfld.long 0x00 8. "EXT_WAKEUP_DB_EN[0],External wakeup debounce enabled" "Disabled,Enabled" newline bitfld.long 0x00 7. "EXT_WAKEUP_POL[3],External wakeup inputs polarity" "Active high,Active low" bitfld.long 0x00 6. "EXT_WAKEUP_POL[2],External wakeup inputs polarity" "Active high,Active low" newline bitfld.long 0x00 5. "EXT_WAKEUP_POL[1],External wakeup inputs polarity" "Active high,Active low" bitfld.long 0x00 4. "EXT_WAKEUP_POL[0],External wakeup inputs polarity" "Active high,Active low" newline bitfld.long 0x00 3. "EXT_WAKEUP_EN[3],Enable external wakeup inputs" "Disabled,Enabled" bitfld.long 0x00 2. "EXT_WAKEUP_EN[2],Enable external wakeup inputs" "Disabled,Enabled" newline bitfld.long 0x00 1. "EXT_WAKEUP_EN[1],Enable external wakeup inputs" "Disabled,Enabled" bitfld.long 0x00 0. "EXT_WAKEUP_EN[0],Enable external wakeup inputs" "Disabled,Enabled" line.long 0x04 "RTC_DEBOUNCE,Debounce Register" hexmask.long.byte 0x04 0.--7. 1. "DEBOUNCE_REG,Debounce Register" tree.end tree "WDT (Watchdog)" base ad:0x4E35000 rgroup.long 0x00++0x03 line.long 0x00 "WDT_WIDR,Watchdog Identification Register" group.long 0x10++0x03 line.long 0x00 "WDT_WDSC,Watchdog System Control Register" bitfld.long 0x00 5. "EMUFREE,Sensitivity to emulation (Debug) suspend event from debug subsystem" "Frozen,Free-running" bitfld.long 0x00 3.--4. "IDLEMODE,Configuration of the local target state management mode" "Force-idle,No-idle,Smart-idle,Smart-idle wakeup capable" bitfld.long 0x00 1. "SOFTRESET,Software reset" "Done,In progress" rgroup.long 0x14++0x03 line.long 0x00 "WDT_WDST,Watchdog Status Register" bitfld.long 0x00 0. "RESETDONE,Internal module reset monitoring" "Ongoing,Done" group.long 0x18++0x03 line.long 0x00 "WDT_WISR,Watchdog Interrupt Status Register (Read/Write)" bitfld.long 0x00 1. "DLY_IT_FLAG,Pending delay interrupt status" "Not pending/No effect,Pending/Clear" bitfld.long 0x00 0. "OVF_IT_FLAG,Pending overflow interrupt status" "Not pending/No effect,Pending/Clear" group.long 0x1C++0x03 line.long 0x00 "WDT_WIER,Watchdog Interrupt Enable Register" bitfld.long 0x00 1. "DLY_IT_ENA,Delay interrupt enable/disable" "Disabled,Enabled" bitfld.long 0x00 0. "OVF_IT_ENA,Overflow interrupt enable/disable" "Disabled,Enabled" group.long 0x24++0x0F line.long 0x00 "WDT_WCLR,Watchdog Control Register" bitfld.long 0x00 5. "PRE,Prescaler enable/disable configuration" "Disabled,Enabled" bitfld.long 0x00 2.--4. "PTV,Prescaler value" "0,2,4,8,16,32,64,128" line.long 0x04 "WDT_WCRR,Watchdog Counter Register" line.long 0x08 "WDT_WLDR,Watchdog Load Register" line.long 0x0C "WDT_WTGR,Watchdog Trigger Register" rgroup.long 0x34++0x03 line.long 0x00 "WDT_WWPS,Watchdog Write Posting Bits Register" bitfld.long 0x00 5. "W_PEND_WDLY,Write pending for register WDLY" "Not pending,Pending" bitfld.long 0x00 4. "W_PEND_WSPR,Write pending for register WSPR" "Not pending,Pending" bitfld.long 0x00 3. "W_PEND_WTGR,Write pending for register WTGR" "Not pending,Pending" newline bitfld.long 0x00 2. "W_PEND_WLDR,Write pending for register WLDR" "Not pending,Pending" bitfld.long 0x00 1. "W_PEND_WCRR,Write pending for register WCRR" "Not pending,Pending" bitfld.long 0x00 0. "W_PEND_WCLR,Write pending for register WCLR" "Not pending,Pending" group.long 0x44++0x7 line.long 0x00 "WDT_WDLY,Watchdog Delay Configuration Register" line.long 0x04 "WDT_WSPR,Watchdog Start/stop Register" group.long 0x54++0x0B line.long 0x00 "WDT_WIRQSTATRAW,Watchdog Raw Interrupt Status Register" bitfld.long 0x00 1. "EVENT_DLY,Settable raw status for delay event" "Not pending,Pending" bitfld.long 0x00 0. "EVENT_OVF,Settable raw status for overflow event" "Not pending,Pending" line.long 0x04 "WDT_WIRQSTAT,Watchdog Interrupt Status Register" bitfld.long 0x04 1. "EVENT_DLY,Clearable, enabled status for delay event" "Not pending,Pending" bitfld.long 0x04 0. "EVENT_OVF,Clearable, enabled status for overflow event" "Not pending,Pending" line.long 0x08 "WDT_WIRQEN_SET/CLR,Watchdog Interrupt Status Register" setclrfld.long 0x08 1. 0x08 1. 0x0C 1. "EVENT_DLY,Settable raw status for delay event" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x0C 0. "EVENT_OVF,Settable raw status for overflow event" "Not pending,Pending" tree.end tree.end tree "I2C" tree "I2C0" base ad:0x44E0B000 rgroup.long 0x00++0x07 line.long 0x00 "I2C_REVNB_LO,Module Revision Register (Low Bytes)" bitfld.long 0x00 11.--15. "RTL,RTL version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. "MAJOR,Major revision" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. "CUSTOM,Indicates a special version for a particular device" "0,1,2,3" bitfld.long 0x00 0.--5. "MINOR,Minor revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "I2C_REVNB_HI,Module Revision Register (High Bytes)" bitfld.long 0x04 14.--15. "SCHEME,Used to distinguish between old scheme and current" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "FUNC,Indicates a software compatible module family" group.long 0x10++0x03 line.long 0x00 "I2C_SYSC,System Configuration Register" bitfld.long 0x00 8.--9. "CLKACTIVITY,Clock activity selection (Interface/ocp)" "Off,On/off,Off/on,On" bitfld.long 0x00 3.--4. "IDLEMODE,Idle mode selection" ",No-idle,Smart-idle,Smart-idle wakeup" newline bitfld.long 0x00 2. "ENAWAKEUP,Enable wakeup control" "Disabled,Enabled" bitfld.long 0x00 1. "SRST,Soft reset" "No reset,Reset" newline bitfld.long 0x00 0. "AUTOIDLE,Autoidle enable" "Disabled,Enabled" if (((d.l(ad:0x44E0B000+0xA4))&0x8600)==0x8600) group.long 0x24++0x0B line.long 0x00 "I2C_IRQSTATUS_RAW,I2C Status Raw Register" bitfld.long 0x00 14. "XDR,Transmit draining IRQ status" "Inactive,Active" rbitfld.long 0x00 12. "BB,State of the serial bus" "Free,Busy" newline bitfld.long 0x00 10. "XUDF,Transmit underflow status" "Normal,Underflow" eventfld.long 0x00 9. "AAS,Address recognized as slave IRQ status (Read/Write)" "No effect,Recognized/Clear" newline eventfld.long 0x00 8. "BF,Bus free" "No effect,Bus free" bitfld.long 0x00 7. "AERR,Access error IRQ status" "No effect,Error" newline bitfld.long 0x00 6. "STC,Start condition IRQ status" "Not detected,Detected" eventfld.long 0x00 5. "GC,General call IRQ status (Read/Write)" "Not detected/No effect,Detected/Clear" newline bitfld.long 0x00 4. "XRDY,Transmit data ready IRQ status" "Ongoing,Ready" bitfld.long 0x00 2. "ARDY,Register access ready IRQ enabled status" "Busy,Ready" newline bitfld.long 0x00 1. "NACK,No acknowledgment IRQ enabled status" "Disabled,Enabled" bitfld.long 0x00 0. "AL,Arbitration lost IRQ status" "Not detected,Detected" line.long 0x04 "I2C_IRQSTATUS,I2C Status Register" eventfld.long 0x04 14. "XDR,Transmit draining IRQ status" "Inactive,Active" rbitfld.long 0x04 12. "BB,State of the serial bus" "Free,Busy" newline eventfld.long 0x04 10. "XUDF,Transmit underflow status" "Normal,Underflow" eventfld.long 0x04 9. "AAS,Address recognized as slave IRQ status" "No effect,Recognized" newline eventfld.long 0x04 8. "BF,Bus free" "No effect,Bus free" eventfld.long 0x04 7. "AERR,Access error IRQ status" "No effect,Error" newline eventfld.long 0x04 6. "STC,Start condition IRQ status" "Not detected,Detected" eventfld.long 0x04 5. "GC,General call IRQ status" "Not detected,Detected" newline eventfld.long 0x04 4. "XRDY,Transmit data ready IRQ status" "Ongoing,Ready" eventfld.long 0x04 2. "ARDY,Register access ready IRQ enabled status" "Busy,Ready" newline eventfld.long 0x04 1. "NACK,No acknowledgment IRQ enabled status" "Disabled,Enabled" eventfld.long 0x04 0. "AL,Arbitration lost IRQ status" "Not detected,Detected" line.long 0x08 "I2C_IRQENABLE_SET/CLR,I2C Interrupt Enable Set Register" setclrfld.long 0x08 14. 0x08 14. 0x0C 14. "XDR_IE,Transmit draining interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x0C 10. "XUDF,Transmit underflow enable" "Disabled,Enabled" newline setclrfld.long 0x08 9. 0x08 9. 0x0C 9. "AAS_IE,Addressed as slave interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x0C 8. "BF_IE,Bus free interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 7. 0x08 7. 0x0C 7. "AERR_IE,Access error interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x0C 6. "STC_IE,Start condition interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 5. 0x08 5. 0x0C 5. "GC_IE,General call interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x0C 4. "XRDY_IE,Transmit data ready interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 2. 0x08 2. 0x0C 2. "ARDY_IE,Register access ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 1. 0x08 1. 0x0C 1. "NACK_IE,No acknowledgment interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 0. 0x08 0. 0x0C 0. "AL_IE,Arbitration lost interrupt enable" "Disabled,Enabled" elif (((d.l(ad:0x44E0B000+0xA4))&0x8200)==0x8000) group.long 0x24++0x0B line.long 0x00 "I2C_IRQSTATUS_RAW,I2C Status Raw Register" bitfld.long 0x00 13. "RDR,Receive draining IRQ status" "Inactive,Active" rbitfld.long 0x00 12. "BB,State of the serial bus" "Free,Busy" newline rbitfld.long 0x00 11. "ROVR,Receive overrun status" "Normal,Receiver" eventfld.long 0x00 9. "AAS,Address recognized as slave IRQ status (Read/Write)" "No effect,Recognized/Clear" newline eventfld.long 0x00 8. "BF,Bus free" "No effect,Bus free" bitfld.long 0x00 7. "AERR,Access error IRQ status" "No effect,Error" newline bitfld.long 0x00 6. "STC,Start condition IRQ status" "Not detected,Detected" eventfld.long 0x00 5. "GC,General call IRQ status (Read/Write)" "Not detected/No effect,Detected/Clear" newline bitfld.long 0x00 3. "RRDY,Receive data ready IRQ enabled status" "Not available,Available" bitfld.long 0x00 2. "ARDY,Register access ready IRQ enabled status" "Busy,Ready" newline bitfld.long 0x00 1. "NACK,No acknowledgment IRQ enabled status" "Disabled,Enabled" bitfld.long 0x00 0. "AL,Arbitration lost IRQ status" "Not detected,Detected" line.long 0x04 "I2C_IRQSTATUS,I2C Status Register" eventfld.long 0x04 13. "RDR,Receive draining IRQ status" "Inactive,Active" rbitfld.long 0x04 12. "BB,State of the serial bus" "Free,Busy" newline eventfld.long 0x04 11. "ROVR,Receive overrun status" "Normal,Receiver" eventfld.long 0x04 9. "AAS,Address recognized as slave IRQ status" "No effect,Recognized" newline eventfld.long 0x04 8. "BF,Bus free" "No effect,Bus free" eventfld.long 0x04 7. "AERR,Access error IRQ status" "No effect,Error" newline eventfld.long 0x04 6. "STC,Start condition IRQ status" "Not detected,Detected" eventfld.long 0x04 5. "GC,General call IRQ status" "Not detected,Detected" newline eventfld.long 0x04 4. "XRDY,Transmit data ready IRQ status" "Ongoing,Ready" eventfld.long 0x04 3. "RRDY,Receive data ready IRQ enabled status" "Not available,Available" newline eventfld.long 0x04 2. "ARDY,Register access ready IRQ enabled status" "Busy,Ready" eventfld.long 0x04 1. "NACK,No acknowledgment IRQ enabled status" "Disabled,Enabled" newline eventfld.long 0x04 0. "AL,Arbitration lost IRQ status" "Not detected,Detected" line.long 0x08 "I2C_IRQENABLE_SET/CLR,I2C Interrupt Enable Set Register" setclrfld.long 0x08 13. 0x08 13. 0x0C 13. "RDR_IE,Receive draining interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x0C 11. "ROVR,Receive overrun enable" "Disabled,Enabled" newline setclrfld.long 0x08 9. 0x08 9. 0x0C 9. "AAS_IE,Addressed as slave interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x0C 8. "BF_IE,Bus free interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 7. 0x08 7. 0x0C 7. "AERR_IE,Access error interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x0C 6. "STC_IE,Start condition interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 5. 0x08 5. 0x0C 5. "GC_IE,General call interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x0C 4. "XRDY_IE,Transmit data ready interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 3. 0x08 3. 0x0C 3. "RRDY_IE,Receive data ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x0C 2. "ARDY_IE,Register access ready interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 1. 0x08 1. 0x0C 1. "NACK_IE,No acknowledgment interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x0C 0. "AL_IE,Arbitration lost interrupt enable" "Disabled,Enabled" elif (((d.l(ad:0x44E0B000+0xA4))&0x8200)==0x8200) group.long 0x24++0x0B line.long 0x00 "I2C_IRQSTATUS_RAW,I2C Status Raw Register" rbitfld.long 0x00 12. "BB,State of the serial bus" "Free,Busy" bitfld.long 0x00 10. "XUDF,Transmit underflow status" "Normal,Underflow" newline eventfld.long 0x00 9. "AAS,Address recognized as slave IRQ status (Read/Write)" "No effect,Recognized/Clear" eventfld.long 0x00 8. "BF,Bus free" "No effect,Bus free" newline bitfld.long 0x00 7. "AERR,Access error IRQ status" "No effect,Error" bitfld.long 0x00 6. "STC,Start condition IRQ status" "Not detected,Detected" newline eventfld.long 0x00 5. "GC,General call IRQ status (Read/Write)" "Not detected/No effect,Detected/Clear" bitfld.long 0x00 4. "XRDY,Transmit data ready IRQ status" "Ongoing,Ready" newline bitfld.long 0x00 2. "ARDY,Register access ready IRQ enabled status" "Busy,Ready" bitfld.long 0x00 1. "NACK,No acknowledgment IRQ enabled status" "Disabled,Enabled" newline bitfld.long 0x00 0. "AL,Arbitration lost IRQ status" "Not detected,Detected" line.long 0x04 "I2C_IRQSTATUS,I2C Status Register" rbitfld.long 0x04 12. "BB,State of the serial bus" "Free,Busy" eventfld.long 0x04 10. "XUDF,Transmit underflow status" "Normal,Underflow" newline eventfld.long 0x04 9. "AAS,Address recognized as slave IRQ status" "No effect,Recognized" eventfld.long 0x04 8. "BF,Bus free" "No effect,Bus free" newline eventfld.long 0x04 7. "AERR,Access error IRQ status" "No effect,Error" eventfld.long 0x04 6. "STC,Start condition IRQ status" "Not detected,Detected" newline eventfld.long 0x04 5. "GC,General call IRQ status" "Not detected,Detected" eventfld.long 0x04 4. "XRDY,Transmit data ready IRQ status" "Ongoing,Ready" newline eventfld.long 0x04 2. "ARDY,Register access ready IRQ enabled status" "Busy,Ready" eventfld.long 0x04 1. "NACK,No acknowledgment IRQ enabled status" "Disabled,Enabled" newline eventfld.long 0x04 0. "AL,Arbitration lost IRQ status" "Not detected,Detected" line.long 0x08 "I2C_IRQENABLE_SET/CLR,I2C Interrupt Enable Set Register" setclrfld.long 0x08 10. 0x08 10. 0x0C 10. "XUDF,Transmit underflow enable" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x0C 9. "AAS_IE,Addressed as slave interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 8. 0x08 8. 0x0C 8. "BF_IE,Bus free interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 7. 0x08 7. 0x0C 7. "AERR_IE,Access error interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 6. 0x08 6. 0x0C 6. "STC_IE,Start condition interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x0C 5. "GC_IE,General call interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 4. 0x08 4. 0x0C 4. "XRDY_IE,Transmit data ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x0C 2. "ARDY_IE,Register access ready interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 1. 0x08 1. 0x0C 1. "NACK_IE,No acknowledgment interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x0C 0. "AL_IE,Arbitration lost interrupt enable" "Disabled,Enabled" elif (((d.l(ad:0x44E0B000+0xA4))&0x8000)==0x00) group.long 0x2C++0x03 line.long 0x00 "I2C_IRQENABLE_SET/CLR,I2C Interrupt Enable Set Register" setclrfld.long 0x00 14. 0x00 14. 0x04 14. "XDR_IE,Transmit draining interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 13. 0x00 13. 0x04 13. "RDR_IE,Receive draining interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x00 11. 0x00 11. 0x04 11. "ROVR,Receive overrun enable" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x04 10. "XUDF,Transmit underflow enable" "Disabled,Enabled" newline setclrfld.long 0x00 9. 0x00 9. 0x04 9. "AAS_IE,Addressed as slave interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x04 8. "BF_IE,Bus free interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x04 7. "AERR_IE,Access error interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x04 6. "STC_IE,Start condition interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x00 5. 0x00 5. 0x04 5. "GC_IE,General call interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x04 4. "XRDY_IE,Transmit data ready interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x00 3. 0x00 3. 0x04 3. "RRDY_IE,Receive data ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x04 2. "ARDY_IE,Register access ready interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x04 1. "NACK_IE,No acknowledgment interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. "AL_IE,Arbitration lost interrupt enable" "Disabled,Enabled" endif group.long 0x34++0x03 line.long 0x00 "I2C_WE,I2C Wakeup Enable Register" bitfld.long 0x00 14. "XDR_WE,Transmit draining wakeup enable" "Disabled,Enabled" bitfld.long 0x00 13. "RDR_WE,Receive draining wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 11. "ROVR_WE,Receive overrun wakeup enable" "Disabled,Enabled" bitfld.long 0x00 10. "XUDF_WE,Transmit underflow wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "AAS_WE,Address as slave IRQ wakeup enable" "Disabled,Enabled" bitfld.long 0x00 8. "BF_WE,Bus free IRQ wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 6. "STC_WE,Start condition IRQ wakeup set" "Disabled,Enabled" bitfld.long 0x00 5. "GC_WE,General call IRQ wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "DRDY_WE,Receive/transmit data ready IRQ wakeup enable" "Disabled,Enabled" bitfld.long 0x00 2. "ARDY_WE,Register access ready IRQ wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "NACK_WE,No acknowledgment IRQ wakeup enable" "Disabled,Enabled" bitfld.long 0x00 0. "AL_WE,Arbitration lost IRQ wakeup enable" "Disabled,Enabled" group.long 0x38++0x07 line.long 0x00 "I2C_DMARXENABLE_SET/CLR,Receive DMA Enable Set Register" setclrfld.long 0x00 0. 0x00 0. 0x08 0. "DMARX_ENABLE_SET,Receive DMA channel enable" "Disabled,Enabled" line.long 0x04 "I2C_DMATXENABLE_SET/CLR,Transmit DMA Enable Set Register" setclrfld.long 0x04 0. 0x04 0. 0x0C 0. "DMATX_TRANSMIT_SET,Transmit DMA channel enable" "Disabled,Enabled" group.long 0x48++0x03 line.long 0x00 "I2C_DMARXWAKE_EN,Receive DMA Wakeup Register" bitfld.long 0x00 14. "XDR,Transmit draining wakeup enable" "Disabled,Enabled" bitfld.long 0x00 13. "RDR,Receive draining wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 11. "ROVR,Receive overrun wakeup enable" "Disabled,Enabled" bitfld.long 0x00 10. "XUDF,Transmit underflow wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "AAS,Address as slave IRQ wakeup enable" "Disabled,Enabled" bitfld.long 0x00 8. "BF,Bus free IRQ wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 6. "STC,Start condition IRQ wakeup set" "Disabled,Enabled" bitfld.long 0x00 5. "GC,General call IRQ wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "DRDY,Receive/transmit data ready IRQ wakeup enable" "Disabled,Enabled" bitfld.long 0x00 2. "ARDY,Register access ready IRQ wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "NACK,No acknowledgment IRQ wakeup enable" "Disabled,Enabled" bitfld.long 0x00 0. "AL,Arbitration lost IRQ wakeup enable" "Disabled,Enabled" group.long 0x4C++0x03 line.long 0x00 "I2C_DMATXWAKE_EN,Transmit DMA Wakeup Register" bitfld.long 0x00 14. "XDR,Transmit draining wakeup enable" "Disabled,Enabled" bitfld.long 0x00 13. "RDR,Receive draining wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 11. "ROVR,Receive overrun wakeup enable" "Disabled,Enabled" bitfld.long 0x00 10. "XUDF,Transmit underflow wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "AAS,Address as slave IRQ wakeup enable" "Disabled,Enabled" bitfld.long 0x00 8. "BF,Bus free IRQ wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 6. "STC,Start condition IRQ wakeup set" "Disabled,Enabled" bitfld.long 0x00 5. "GC,General call IRQ wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "DRDY,Receive/transmit data ready IRQ wakeup enable" "Disabled,Enabled" bitfld.long 0x00 2. "ARDY,Register access ready IRQ wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "NACK,No acknowledgment IRQ wakeup enable" "Disabled,Enabled" bitfld.long 0x00 0. "AL,Arbitration lost IRQ wakeup enable" "Disabled,Enabled" rgroup.long 0x90++0x03 line.long 0x00 "I2C_SYSS,System Status Register" bitfld.long 0x00 0. "RDONE,Reset done" "In progress,Done" group.long 0x94++0x03 line.long 0x00 "I2C_BUF,Buffer Configuration Register" bitfld.long 0x00 15. "RDMA_EN,Receive DMA channel enable" "Disabled,Enabled" bitfld.long 0x00 14. "RXFIFO_CLR,Receive FIFO clear" "No reset,Reset" newline bitfld.long 0x00 8.--13. "RXTRSH,Threshold value for FIFO buffer in RX mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64" bitfld.long 0x00 7. "XDMA_EN,Transmit DMA channel enable" "Disabled,Enabled" newline bitfld.long 0x00 6. "TXFIFO_CLR,Transmit FIFO clear" "No reset,Reset" bitfld.long 0x00 0.--5. "TXTRSH,Threshold value for FIFO buffer in TX mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64" if (((d.l(ad:0x44E0B000+0xA4))&0x400)==0x400) group.long 0x98++0x03 line.long 0x00 "I2C_CNT,Data Counter Register" hexmask.long.word 0x00 0.--15. 1. "DCOUNT,Data count" endif group.long 0x9C++0x03 line.long 0x00 "I2C_DATA,Data Access Register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Transmit/receive data FIFO endpoint" if (((d.l(ad:0x44E0B000+0xA4))&0x400)==0x400) group.long 0xA4++0x03 line.long 0x00 "I2C_CON,I2C Configuration Register" bitfld.long 0x00 15. "I2C_EN,I2C module enable" "Disabled,Enabled" bitfld.long 0x00 12.--13. "OPMODE,Operation mode selection" "I2C fast,?..." newline bitfld.long 0x00 11. "STB,Start byte mode" "Not started,Started" bitfld.long 0x00 10. "MST,Master/slave mode" "Slave,Master" newline bitfld.long 0x00 9. "TRX,Transmitter/receiver mode" "Receiver,Transmitter" bitfld.long 0x00 8. "XSA,Expand slave address" "7 bit,10 bit" newline bitfld.long 0x00 7. "XOA0,Expand own address 0" "7 bit,10 bit" bitfld.long 0x00 6. "XOA1,Expand own address 1" "7 bit,10 bit" newline bitfld.long 0x00 5. "XOA2,Expand own address 2" "7 bit,10 bit" bitfld.long 0x00 4. "XOA3,Expand own address 3" "7 bit,10 bit" newline bitfld.long 0x00 1. "STP,Stop condition" "No action/detected,Queried" bitfld.long 0x00 0. "STT,Start condition" "No action/detected,Queried" else group.long 0xA4++0x03 line.long 0x00 "I2C_CON,I2C Configuration Register" bitfld.long 0x00 15. "I2C_EN,I2C module enable" "Disabled,Enabled" bitfld.long 0x00 12.--13. "OPMODE,Operation mode selection" "I2C fast,?..." newline bitfld.long 0x00 10. "MST,Master/slave mode" "Slave,Master" bitfld.long 0x00 8. "XSA,Expand slave address" "7 bit,10 bit" newline bitfld.long 0x00 7. "XOA0,Expand own address 0" "7 bit,10 bit" bitfld.long 0x00 6. "XOA1,Expand own address 1" "7 bit,10 bit" newline bitfld.long 0x00 5. "XOA2,Expand own address 2" "7 bit,10 bit" bitfld.long 0x00 4. "XOA3,Expand own address 3" "7 bit,10 bit" endif if (((d.l(ad:0x44E0B000+0xA4))&0x80)==0x80) group.long 0xA8++0x03 line.long 0x00 "I2C_OA,I2C Own Address Register" hexmask.long.word 0x00 0.--9. 0x01 "OA,Own address" else group.long 0xA8++0x03 line.long 0x00 "I2C_OA,I2C Own Address Register" hexmask.long.byte 0x00 0.--6. 0x01 "OA,Own address" endif if (((d.l(ad:0x44E0B000+0xA4))&0x100)==0x100) group.long 0xAC++0x03 line.long 0x00 "I2C_SA,I2C Slave Address Register" hexmask.long.word 0x00 0.--9. 0x01 "SA,Slave address" else group.long 0xAC++0x03 line.long 0x00 "I2C_SA,I2C Slave Address Register" hexmask.long.byte 0x00 0.--6. 0x01 "SA,Slave address" endif if (((d.l(ad:0x44E0B000+0xA4))&0x8000)==0x00) group.long 0xB0++0x03 line.long 0x00 "I2C_PSC,I2C Clock Prescaler Register" hexmask.long.byte 0x00 0.--7. 1. "PSC,Fast/standard mode prescale sampling clock divider value" else rgroup.long 0xB0++0x03 line.long 0x00 "I2C_PSC,I2C Clock Prescaler Register" hexmask.long.byte 0x00 0.--7. 1. "PSC,Fast/standard mode prescale sampling clock divider value" endif if (((d.l(ad:0x44E0B000+0xA4))&0x8400)==0x8400) group.long 0xB4++0x07 line.long 0x00 "I2C_SCLL,I2C SCL Low Time Register" hexmask.long.byte 0x00 0.--7. 1. "SCLL,Fast/standard mode SCL low time" line.long 0x04 "I2C_SCLH,I2C SCL High Time Register" hexmask.long.byte 0x04 0.--7. 1. "SCLH,Fast/standard mode SCL low time" else rgroup.long 0xB4++0x07 line.long 0x00 "I2C_SCLL,I2C SCL Low Time Register" hexmask.long.byte 0x00 0.--7. 1. "SCLL,Fast/standard mode SCL low time" line.long 0x04 "I2C_SCLH,I2C SCL High Time Register" hexmask.long.byte 0x04 0.--7. 1. "SCLH,Fast/standard mode SCL low time" endif if (((d.l(ad:0x44E0B000+0xBC))&0x8000)==0x00) group.long 0xBC++0x03 line.long 0x00 "I2C_SYSTEST,System Test Register" bitfld.long 0x00 15. "ST_EN,System test enable" "Disabled,Enabled" else if (((d.l(ad:0x44E0B000+0xBC))&0x3000)==0x2000) group.long 0xBC++0x03 line.long 0x00 "I2C_SYSTEST,System Test Register" bitfld.long 0x00 15. "ST_EN,System test enable" "Disabled,Enabled" bitfld.long 0x00 14. "FREE,Free running mode (On breakpoint)" "Stop mode,Free running" newline bitfld.long 0x00 12.--13. "TMODE,Test mode select" "Functional,,SCL counters,Loop back + SDA/SCL IO" bitfld.long 0x00 11. "SSB,Set status bits" "No action,Set" newline bitfld.long 0x00 8. "SCL_I_FUNC,SCL line input value" "Low,High" rbitfld.long 0x00 7. "SCL_O_FUNC,SCL line output value" "Low,High" newline rbitfld.long 0x00 6. "SDA_I_FUNC,SDA line input value" "Low,High" rbitfld.long 0x00 5. "SDA_O_FUNC,SDA line output value" "Low,High" newline rbitfld.long 0x00 3. "SCL_I,SCL line sense input value" "Low,High" rbitfld.long 0x00 2. "SCL_O,SCL line drive output value" "Low,High" newline rbitfld.long 0x00 1. "SDA_I,SDA line sense input value" "Low,High" rbitfld.long 0x00 0. "SDA_O,SDA line drive output value" "Low,High" elif (((d.l(ad:0x44E0B000+0xBC))&0x3000)==0x00) group.long 0xBC++0x03 line.long 0x00 "I2C_SYSTEST,System Test Register" bitfld.long 0x00 15. "ST_EN,System test enable" "Disabled,Enabled" bitfld.long 0x00 14. "FREE,Free running mode (On breakpoint)" "Stop mode,Free running" newline bitfld.long 0x00 12.--13. "TMODE,Test mode select" "Functional,,SCL counters,Loop back + SDA/SCL IO" bitfld.long 0x00 11. "SSB,Set status bits" "No action,Set" newline bitfld.long 0x00 8. "SCL_I_FUNC,SCL line input value" "Low,High" rbitfld.long 0x00 7. "SCL_O_FUNC,SCL line output value" "Low,High" newline rbitfld.long 0x00 6. "SDA_I_FUNC,SDA line input value" "Low,High" rbitfld.long 0x00 5. "SDA_O_FUNC,SDA line output value" "Low,High" else group.long 0xBC++0x03 line.long 0x00 "I2C_SYSTEST,System Test Register" bitfld.long 0x00 15. "ST_EN,System test enable" "Disabled,Enabled" bitfld.long 0x00 14. "FREE,Free running mode (On breakpoint)" "Stop mode,Free running" newline bitfld.long 0x00 12.--13. "TMODE,Test mode select" "Functional,,SCL counters,Loop back + SDA/SCL IO" bitfld.long 0x00 11. "SSB,Set status bits" "No action,Set" endif endif rgroup.long 0xC0++0x03 line.long 0x00 "I2C_BUFSTAT,I2C Buffer Status Register" bitfld.long 0x00 14.--15. "FIFODEPTH,Internal FIFO buffers depth" "8 bytes,16 bytes,32 bytes,64 bytes" bitfld.long 0x00 8.--13. "RXSTAT,RX buffer status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 0.--5. "TXSTAT,TX buffer status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" if (((d.l(ad:0x44E0B000+0xA4))&0x80)==0x00) group.long 0xC4++0x03 line.long 0x00 "I2C_OA0,I2C Own Address 0 Register" hexmask.long.byte 0x00 0.--6. 0x01 "OA0,Own address 0" else group.long 0xC4++0x03 line.long 0x00 "I2C_OA0,I2C Own Address 0 Register" hexmask.long.word 0x00 0.--9. 0x01 "OA0,Own address 0" endif if (((d.l(ad:0x44E0B000+0xA4))&0x40)==0x00) group.long 0xC8++0x03 line.long 0x00 "I2C_OA1,I2C Own Address 1 Register" hexmask.long.byte 0x00 0.--6. 0x01 "OA1,Own address 1" else group.long 0xC8++0x03 line.long 0x00 "I2C_OA1,I2C Own Address 1 Register" hexmask.long.word 0x00 0.--9. 0x01 "OA1,Own address 1" endif if (((d.l(ad:0x44E0B000+0xA4))&0x20)==0x00) group.long 0xCC++0x03 line.long 0x00 "I2C_OA2,I2C Own Address 2 Register" hexmask.long.byte 0x00 0.--6. 0x01 "OA2,Own address 2" else group.long 0xCC++0x03 line.long 0x00 "I2C_OA2,I2C Own Address 2 Register" hexmask.long.word 0x00 0.--9. 0x01 "OA2,Own address 2" endif rgroup.long 0xD0++0x03 line.long 0x00 "I2C_ACTOA,Active Own Address Register" bitfld.long 0x00 3. "OA3_ACT,Own address 3 active" "Inactive,Active" bitfld.long 0x00 2. "OA2_ACT,Own address 2 active" "Inactive,Active" newline bitfld.long 0x00 1. "OA1_ACT,Own address 1 active" "Inactive,Active" bitfld.long 0x00 0. "OA0_ACT,Own address 0 active" "Inactive,Active" group.long 0xD4++0x03 line.long 0x00 "I2C_SBLOCK,I2C Clock Blocking Enable Register" bitfld.long 0x00 3. "OA3_EN,Enable I2C clock blocking for own address 3" "Released,Blocked" bitfld.long 0x00 2. "OA2_EN,Enable I2C clock blocking for own address 2" "Released,Blocked" newline bitfld.long 0x00 1. "OA1_EN,Enable I2C clock blocking for own address 1" "Released,Blocked" bitfld.long 0x00 0. "OA0_EN,Enable I2C clock blocking for own address 0" "Released,Blocked" tree.end tree "I2C1" base ad:0x4802A000 rgroup.long 0x00++0x07 line.long 0x00 "I2C_REVNB_LO,Module Revision Register (Low Bytes)" bitfld.long 0x00 11.--15. "RTL,RTL version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. "MAJOR,Major revision" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. "CUSTOM,Indicates a special version for a particular device" "0,1,2,3" bitfld.long 0x00 0.--5. "MINOR,Minor revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "I2C_REVNB_HI,Module Revision Register (High Bytes)" bitfld.long 0x04 14.--15. "SCHEME,Used to distinguish between old scheme and current" "0,1,2,3" hexmask.long.word 0x04 0.--11. 1. "FUNC,Indicates a software compatible module family" group.long 0x10++0x03 line.long 0x00 "I2C_SYSC,System Configuration Register" bitfld.long 0x00 8.--9. "CLKACTIVITY,Clock activity selection (Interface/ocp)" "Off,On/off,Off/on,On" bitfld.long 0x00 3.--4. "IDLEMODE,Idle mode selection" ",No-idle,Smart-idle,?..." newline bitfld.long 0x00 2. "ENAWAKEUP,Enable wakeup control" "Disabled,Enabled" bitfld.long 0x00 1. "SRST,Soft reset" "No reset,Reset" newline bitfld.long 0x00 0. "AUTOIDLE,Autoidle enable" "Disabled,Enabled" if (((d.l(ad:0x4802A000+0xA4))&0x8600)==0x8600) group.long 0x24++0x0B line.long 0x00 "I2C_IRQSTATUS_RAW,I2C Status Raw Register" bitfld.long 0x00 14. "XDR,Transmit draining IRQ status" "Inactive,Active" rbitfld.long 0x00 12. "BB,State of the serial bus" "Free,Busy" newline bitfld.long 0x00 10. "XUDF,Transmit underflow status" "Normal,Underflow" eventfld.long 0x00 9. "AAS,Address recognized as slave IRQ status (Read/Write)" "No effect,Recognized/Clear" newline eventfld.long 0x00 8. "BF,Bus free" "No effect,Bus free" bitfld.long 0x00 7. "AERR,Access error IRQ status" "No effect,Error" newline bitfld.long 0x00 6. "STC,Start condition IRQ status" "Not detected,Detected" eventfld.long 0x00 5. "GC,General call IRQ status (Read/Write)" "Not detected/No effect,Detected/Clear" newline bitfld.long 0x00 4. "XRDY,Transmit data ready IRQ status" "Ongoing,Ready" bitfld.long 0x00 2. "ARDY,Register access ready IRQ enabled status" "Busy,Ready" newline bitfld.long 0x00 1. "NACK,No acknowledgment IRQ enabled status" "Disabled,Enabled" bitfld.long 0x00 0. "AL,Arbitration lost IRQ status" "Not detected,Detected" line.long 0x04 "I2C_IRQSTATUS,I2C Status Register" eventfld.long 0x04 14. "XDR,Transmit draining IRQ status" "Inactive,Active" rbitfld.long 0x04 12. "BB,State of the serial bus" "Free,Busy" newline eventfld.long 0x04 10. "XUDF,Transmit underflow status" "Normal,Underflow" eventfld.long 0x04 9. "AAS,Address recognized as slave IRQ status" "No effect,Recognized" newline eventfld.long 0x04 8. "BF,Bus free" "No effect,Bus free" eventfld.long 0x04 7. "AERR,Access error IRQ status" "No effect,Error" newline eventfld.long 0x04 6. "STC,Start condition IRQ status" "Not detected,Detected" eventfld.long 0x04 5. "GC,General call IRQ status" "Not detected,Detected" newline eventfld.long 0x04 4. "XRDY,Transmit data ready IRQ status" "Ongoing,Ready" eventfld.long 0x04 2. "ARDY,Register access ready IRQ enabled status" "Busy,Ready" newline eventfld.long 0x04 1. "NACK,No acknowledgment IRQ enabled status" "Disabled,Enabled" eventfld.long 0x04 0. "AL,Arbitration lost IRQ status" "Not detected,Detected" line.long 0x08 "I2C_IRQENABLE_SET/CLR,I2C Interrupt Enable Set Register" setclrfld.long 0x08 14. 0x08 14. 0x0C 14. "XDR_IE,Transmit draining interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x0C 10. "XUDF,Transmit underflow enable" "Disabled,Enabled" newline setclrfld.long 0x08 9. 0x08 9. 0x0C 9. "AAS_IE,Addressed as slave interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x0C 8. "BF_IE,Bus free interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 7. 0x08 7. 0x0C 7. "AERR_IE,Access error interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x0C 6. "STC_IE,Start condition interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 5. 0x08 5. 0x0C 5. "GC_IE,General call interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x0C 4. "XRDY_IE,Transmit data ready interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 2. 0x08 2. 0x0C 2. "ARDY_IE,Register access ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 1. 0x08 1. 0x0C 1. "NACK_IE,No acknowledgment interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 0. 0x08 0. 0x0C 0. "AL_IE,Arbitration lost interrupt enable" "Disabled,Enabled" elif (((d.l(ad:0x4802A000+0xA4))&0x8200)==0x8000) group.long 0x24++0x0B line.long 0x00 "I2C_IRQSTATUS_RAW,I2C Status Raw Register" bitfld.long 0x00 13. "RDR,Receive draining IRQ status" "Inactive,Active" rbitfld.long 0x00 12. "BB,State of the serial bus" "Free,Busy" newline rbitfld.long 0x00 11. "ROVR,Receive overrun status" "Normal,Receiver" eventfld.long 0x00 9. "AAS,Address recognized as slave IRQ status (Read/Write)" "No effect,Recognized/Clear" newline eventfld.long 0x00 8. "BF,Bus free" "No effect,Bus free" bitfld.long 0x00 7. "AERR,Access error IRQ status" "No effect,Error" newline bitfld.long 0x00 6. "STC,Start condition IRQ status" "Not detected,Detected" eventfld.long 0x00 5. "GC,General call IRQ status (Read/Write)" "Not detected/No effect,Detected/Clear" newline bitfld.long 0x00 3. "RRDY,Receive data ready IRQ enabled status" "Not available,Available" bitfld.long 0x00 2. "ARDY,Register access ready IRQ enabled status" "Busy,Ready" newline bitfld.long 0x00 1. "NACK,No acknowledgment IRQ enabled status" "Disabled,Enabled" bitfld.long 0x00 0. "AL,Arbitration lost IRQ status" "Not detected,Detected" line.long 0x04 "I2C_IRQSTATUS,I2C Status Register" eventfld.long 0x04 13. "RDR,Receive draining IRQ status" "Inactive,Active" rbitfld.long 0x04 12. "BB,State of the serial bus" "Free,Busy" newline eventfld.long 0x04 11. "ROVR,Receive overrun status" "Normal,Receiver" eventfld.long 0x04 9. "AAS,Address recognized as slave IRQ status" "No effect,Recognized" newline eventfld.long 0x04 8. "BF,Bus free" "No effect,Bus free" eventfld.long 0x04 7. "AERR,Access error IRQ status" "No effect,Error" newline eventfld.long 0x04 6. "STC,Start condition IRQ status" "Not detected,Detected" eventfld.long 0x04 5. "GC,General call IRQ status" "Not detected,Detected" newline eventfld.long 0x04 4. "XRDY,Transmit data ready IRQ status" "Ongoing,Ready" eventfld.long 0x04 3. "RRDY,Receive data ready IRQ enabled status" "Not available,Available" newline eventfld.long 0x04 2. "ARDY,Register access ready IRQ enabled status" "Busy,Ready" eventfld.long 0x04 1. "NACK,No acknowledgment IRQ enabled status" "Disabled,Enabled" newline eventfld.long 0x04 0. "AL,Arbitration lost IRQ status" "Not detected,Detected" line.long 0x08 "I2C_IRQENABLE_SET/CLR,I2C Interrupt Enable Set Register" setclrfld.long 0x08 13. 0x08 13. 0x0C 13. "RDR_IE,Receive draining interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x0C 11. "ROVR,Receive overrun enable" "Disabled,Enabled" newline setclrfld.long 0x08 9. 0x08 9. 0x0C 9. "AAS_IE,Addressed as slave interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x0C 8. "BF_IE,Bus free interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 7. 0x08 7. 0x0C 7. "AERR_IE,Access error interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x0C 6. "STC_IE,Start condition interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 5. 0x08 5. 0x0C 5. "GC_IE,General call interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x0C 4. "XRDY_IE,Transmit data ready interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 3. 0x08 3. 0x0C 3. "RRDY_IE,Receive data ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x0C 2. "ARDY_IE,Register access ready interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 1. 0x08 1. 0x0C 1. "NACK_IE,No acknowledgment interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x0C 0. "AL_IE,Arbitration lost interrupt enable" "Disabled,Enabled" elif (((d.l(ad:0x4802A000+0xA4))&0x8200)==0x8200) group.long 0x24++0x0B line.long 0x00 "I2C_IRQSTATUS_RAW,I2C Status Raw Register" rbitfld.long 0x00 12. "BB,State of the serial bus" "Free,Busy" bitfld.long 0x00 10. "XUDF,Transmit underflow status" "Normal,Underflow" newline eventfld.long 0x00 9. "AAS,Address recognized as slave IRQ status (Read/Write)" "No effect,Recognized/Clear" eventfld.long 0x00 8. "BF,Bus free" "No effect,Bus free" newline bitfld.long 0x00 7. "AERR,Access error IRQ status" "No effect,Error" bitfld.long 0x00 6. "STC,Start condition IRQ status" "Not detected,Detected" newline eventfld.long 0x00 5. "GC,General call IRQ status (Read/Write)" "Not detected/No effect,Detected/Clear" bitfld.long 0x00 4. "XRDY,Transmit data ready IRQ status" "Ongoing,Ready" newline bitfld.long 0x00 2. "ARDY,Register access ready IRQ enabled status" "Busy,Ready" bitfld.long 0x00 1. "NACK,No acknowledgment IRQ enabled status" "Disabled,Enabled" newline bitfld.long 0x00 0. "AL,Arbitration lost IRQ status" "Not detected,Detected" line.long 0x04 "I2C_IRQSTATUS,I2C Status Register" rbitfld.long 0x04 12. "BB,State of the serial bus" "Free,Busy" eventfld.long 0x04 10. "XUDF,Transmit underflow status" "Normal,Underflow" newline eventfld.long 0x04 9. "AAS,Address recognized as slave IRQ status" "No effect,Recognized" eventfld.long 0x04 8. "BF,Bus free" "No effect,Bus free" newline eventfld.long 0x04 7. "AERR,Access error IRQ status" "No effect,Error" eventfld.long 0x04 6. "STC,Start condition IRQ status" "Not detected,Detected" newline eventfld.long 0x04 5. "GC,General call IRQ status" "Not detected,Detected" eventfld.long 0x04 4. "XRDY,Transmit data ready IRQ status" "Ongoing,Ready" newline eventfld.long 0x04 2. "ARDY,Register access ready IRQ enabled status" "Busy,Ready" eventfld.long 0x04 1. "NACK,No acknowledgment IRQ enabled status" "Disabled,Enabled" newline eventfld.long 0x04 0. "AL,Arbitration lost IRQ status" "Not detected,Detected" line.long 0x08 "I2C_IRQENABLE_SET/CLR,I2C Interrupt Enable Set Register" setclrfld.long 0x08 10. 0x08 10. 0x0C 10. "XUDF,Transmit underflow enable" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x0C 9. "AAS_IE,Addressed as slave interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 8. 0x08 8. 0x0C 8. "BF_IE,Bus free interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 7. 0x08 7. 0x0C 7. "AERR_IE,Access error interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 6. 0x08 6. 0x0C 6. "STC_IE,Start condition interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x0C 5. "GC_IE,General call interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 4. 0x08 4. 0x0C 4. "XRDY_IE,Transmit data ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x0C 2. "ARDY_IE,Register access ready interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x08 1. 0x08 1. 0x0C 1. "NACK_IE,No acknowledgment interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x0C 0. "AL_IE,Arbitration lost interrupt enable" "Disabled,Enabled" elif (((d.l(ad:0x4802A000+0xA4))&0x8000)==0x00) group.long 0x2C++0x03 line.long 0x00 "I2C_IRQENABLE_SET/CLR,I2C Interrupt Enable Set Register" setclrfld.long 0x00 14. 0x00 14. 0x04 14. "XDR_IE,Transmit draining interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 13. 0x00 13. 0x04 13. "RDR_IE,Receive draining interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x00 11. 0x00 11. 0x04 11. "ROVR,Receive overrun enable" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x04 10. "XUDF,Transmit underflow enable" "Disabled,Enabled" newline setclrfld.long 0x00 9. 0x00 9. 0x04 9. "AAS_IE,Addressed as slave interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x04 8. "BF_IE,Bus free interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x04 7. "AERR_IE,Access error interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x04 6. "STC_IE,Start condition interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x00 5. 0x00 5. 0x04 5. "GC_IE,General call interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x04 4. "XRDY_IE,Transmit data ready interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x00 3. 0x00 3. 0x04 3. "RRDY_IE,Receive data ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x04 2. "ARDY_IE,Register access ready interrupt enable" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x04 1. "NACK_IE,No acknowledgment interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. "AL_IE,Arbitration lost interrupt enable" "Disabled,Enabled" endif group.long 0x34++0x03 line.long 0x00 "I2C_WE,I2C Wakeup Enable Register" bitfld.long 0x00 14. "XDR_WE,Transmit draining wakeup enable" "Disabled,Enabled" bitfld.long 0x00 13. "RDR_WE,Receive draining wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 11. "ROVR_WE,Receive overrun wakeup enable" "Disabled,Enabled" bitfld.long 0x00 10. "XUDF_WE,Transmit underflow wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "AAS_WE,Address as slave IRQ wakeup enable" "Disabled,Enabled" bitfld.long 0x00 8. "BF_WE,Bus free IRQ wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 6. "STC_WE,Start condition IRQ wakeup set" "Disabled,Enabled" bitfld.long 0x00 5. "GC_WE,General call IRQ wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "DRDY_WE,Receive/transmit data ready IRQ wakeup enable" "Disabled,Enabled" bitfld.long 0x00 2. "ARDY_WE,Register access ready IRQ wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "NACK_WE,No acknowledgment IRQ wakeup enable" "Disabled,Enabled" bitfld.long 0x00 0. "AL_WE,Arbitration lost IRQ wakeup enable" "Disabled,Enabled" group.long 0x38++0x07 line.long 0x00 "I2C_DMARXENABLE_SET/CLR,Receive DMA Enable Set Register" setclrfld.long 0x00 0. 0x00 0. 0x08 0. "DMARX_ENABLE_SET,Receive DMA channel enable" "Disabled,Enabled" line.long 0x04 "I2C_DMATXENABLE_SET/CLR,Transmit DMA Enable Set Register" setclrfld.long 0x04 0. 0x04 0. 0x0C 0. "DMATX_TRANSMIT_SET,Transmit DMA channel enable" "Disabled,Enabled" group.long 0x48++0x03 line.long 0x00 "I2C_DMARXWAKE_EN,Receive DMA Wakeup Register" bitfld.long 0x00 14. "XDR,Transmit draining wakeup enable" "Disabled,Enabled" bitfld.long 0x00 13. "RDR,Receive draining wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 11. "ROVR,Receive overrun wakeup enable" "Disabled,Enabled" bitfld.long 0x00 10. "XUDF,Transmit underflow wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "AAS,Address as slave IRQ wakeup enable" "Disabled,Enabled" bitfld.long 0x00 8. "BF,Bus free IRQ wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 6. "STC,Start condition IRQ wakeup set" "Disabled,Enabled" bitfld.long 0x00 5. "GC,General call IRQ wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "DRDY,Receive/transmit data ready IRQ wakeup enable" "Disabled,Enabled" bitfld.long 0x00 2. "ARDY,Register access ready IRQ wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "NACK,No acknowledgment IRQ wakeup enable" "Disabled,Enabled" bitfld.long 0x00 0. "AL,Arbitration lost IRQ wakeup enable" "Disabled,Enabled" group.long 0x4C++0x03 line.long 0x00 "I2C_DMATXWAKE_EN,Transmit DMA Wakeup Register" bitfld.long 0x00 14. "XDR,Transmit draining wakeup enable" "Disabled,Enabled" bitfld.long 0x00 13. "RDR,Receive draining wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 11. "ROVR,Receive overrun wakeup enable" "Disabled,Enabled" bitfld.long 0x00 10. "XUDF,Transmit underflow wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "AAS,Address as slave IRQ wakeup enable" "Disabled,Enabled" bitfld.long 0x00 8. "BF,Bus free IRQ wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 6. "STC,Start condition IRQ wakeup set" "Disabled,Enabled" bitfld.long 0x00 5. "GC,General call IRQ wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "DRDY,Receive/transmit data ready IRQ wakeup enable" "Disabled,Enabled" bitfld.long 0x00 2. "ARDY,Register access ready IRQ wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "NACK,No acknowledgment IRQ wakeup enable" "Disabled,Enabled" bitfld.long 0x00 0. "AL,Arbitration lost IRQ wakeup enable" "Disabled,Enabled" rgroup.long 0x90++0x03 line.long 0x00 "I2C_SYSS,System Status Register" bitfld.long 0x00 0. "RDONE,Reset done" "In progress,Done" group.long 0x94++0x03 line.long 0x00 "I2C_BUF,Buffer Configuration Register" bitfld.long 0x00 15. "RDMA_EN,Receive DMA channel enable" "Disabled,Enabled" bitfld.long 0x00 14. "RXFIFO_CLR,Receive FIFO clear" "No reset,Reset" newline bitfld.long 0x00 8.--13. "RXTRSH,Threshold value for FIFO buffer in RX mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64" bitfld.long 0x00 7. "XDMA_EN,Transmit DMA channel enable" "Disabled,Enabled" newline bitfld.long 0x00 6. "TXFIFO_CLR,Transmit FIFO clear" "No reset,Reset" bitfld.long 0x00 0.--5. "TXTRSH,Threshold value for FIFO buffer in TX mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64" if (((d.l(ad:0x4802A000+0xA4))&0x400)==0x400) group.long 0x98++0x03 line.long 0x00 "I2C_CNT,Data Counter Register" hexmask.long.word 0x00 0.--15. 1. "DCOUNT,Data count" endif group.long 0x9C++0x03 line.long 0x00 "I2C_DATA,Data Access Register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Transmit/receive data FIFO endpoint" if (((d.l(ad:0x4802A000+0xA4))&0x400)==0x400) group.long 0xA4++0x03 line.long 0x00 "I2C_CON,I2C Configuration Register" bitfld.long 0x00 15. "I2C_EN,I2C module enable" "Disabled,Enabled" bitfld.long 0x00 12.--13. "OPMODE,Operation mode selection" "I2C fast,?..." newline bitfld.long 0x00 11. "STB,Start byte mode" "Not started,Started" bitfld.long 0x00 10. "MST,Master/slave mode" "Slave,Master" newline bitfld.long 0x00 9. "TRX,Transmitter/receiver mode" "Receiver,Transmitter" bitfld.long 0x00 8. "XSA,Expand slave address" "7 bit,10 bit" newline bitfld.long 0x00 7. "XOA0,Expand own address 0" "7 bit,10 bit" bitfld.long 0x00 6. "XOA1,Expand own address 1" "7 bit,10 bit" newline bitfld.long 0x00 5. "XOA2,Expand own address 2" "7 bit,10 bit" bitfld.long 0x00 4. "XOA3,Expand own address 3" "7 bit,10 bit" newline bitfld.long 0x00 1. "STP,Stop condition" "No action/detected,Queried" bitfld.long 0x00 0. "STT,Start condition" "No action/detected,Queried" else group.long 0xA4++0x03 line.long 0x00 "I2C_CON,I2C Configuration Register" bitfld.long 0x00 15. "I2C_EN,I2C module enable" "Disabled,Enabled" bitfld.long 0x00 12.--13. "OPMODE,Operation mode selection" "I2C fast,?..." newline bitfld.long 0x00 10. "MST,Master/slave mode" "Slave,Master" bitfld.long 0x00 8. "XSA,Expand slave address" "7 bit,10 bit" newline bitfld.long 0x00 7. "XOA0,Expand own address 0" "7 bit,10 bit" bitfld.long 0x00 6. "XOA1,Expand own address 1" "7 bit,10 bit" newline bitfld.long 0x00 5. "XOA2,Expand own address 2" "7 bit,10 bit" bitfld.long 0x00 4. "XOA3,Expand own address 3" "7 bit,10 bit" endif if (((d.l(ad:0x4802A000+0xA4))&0x80)==0x80) group.long 0xA8++0x03 line.long 0x00 "I2C_OA,I2C Own Address Register" hexmask.long.word 0x00 0.--9. 0x01 "OA,Own address" else group.long 0xA8++0x03 line.long 0x00 "I2C_OA,I2C Own Address Register" hexmask.long.byte 0x00 0.--6. 0x01 "OA,Own address" endif if (((d.l(ad:0x4802A000+0xA4))&0x100)==0x100) group.long 0xAC++0x03 line.long 0x00 "I2C_SA,I2C Slave Address Register" hexmask.long.word 0x00 0.--9. 0x01 "SA,Slave address" else group.long 0xAC++0x03 line.long 0x00 "I2C_SA,I2C Slave Address Register" hexmask.long.byte 0x00 0.--6. 0x01 "SA,Slave address" endif if (((d.l(ad:0x4802A000+0xA4))&0x8000)==0x00) group.long 0xB0++0x03 line.long 0x00 "I2C_PSC,I2C Clock Prescaler Register" hexmask.long.byte 0x00 0.--7. 1. "PSC,Fast/standard mode prescale sampling clock divider value" else rgroup.long 0xB0++0x03 line.long 0x00 "I2C_PSC,I2C Clock Prescaler Register" hexmask.long.byte 0x00 0.--7. 1. "PSC,Fast/standard mode prescale sampling clock divider value" endif if (((d.l(ad:0x4802A000+0xA4))&0x8400)==0x8400) group.long 0xB4++0x07 line.long 0x00 "I2C_SCLL,I2C SCL Low Time Register" hexmask.long.byte 0x00 0.--7. 1. "SCLL,Fast/standard mode SCL low time" line.long 0x04 "I2C_SCLH,I2C SCL High Time Register" hexmask.long.byte 0x04 0.--7. 1. "SCLH,Fast/standard mode SCL low time" else rgroup.long 0xB4++0x07 line.long 0x00 "I2C_SCLL,I2C SCL Low Time Register" hexmask.long.byte 0x00 0.--7. 1. "SCLL,Fast/standard mode SCL low time" line.long 0x04 "I2C_SCLH,I2C SCL High Time Register" hexmask.long.byte 0x04 0.--7. 1. "SCLH,Fast/standard mode SCL low time" endif if (((d.l(ad:0x4802A000+0xBC))&0x8000)==0x00) group.long 0xBC++0x03 line.long 0x00 "I2C_SYSTEST,System Test Register" bitfld.long 0x00 15. "ST_EN,System test enable" "Disabled,Enabled" else if (((d.l(ad:0x4802A000+0xBC))&0x3000)==0x2000) group.long 0xBC++0x03 line.long 0x00 "I2C_SYSTEST,System Test Register" bitfld.long 0x00 15. "ST_EN,System test enable" "Disabled,Enabled" bitfld.long 0x00 14. "FREE,Free running mode (On breakpoint)" "Stop mode,Free running" newline bitfld.long 0x00 12.--13. "TMODE,Test mode select" "Functional,,SCL counters,Loop back + SDA/SCL IO" bitfld.long 0x00 11. "SSB,Set status bits" "No action,Set" newline bitfld.long 0x00 8. "SCL_I_FUNC,SCL line input value" "Low,High" rbitfld.long 0x00 7. "SCL_O_FUNC,SCL line output value" "Low,High" newline rbitfld.long 0x00 6. "SDA_I_FUNC,SDA line input value" "Low,High" rbitfld.long 0x00 5. "SDA_O_FUNC,SDA line output value" "Low,High" newline rbitfld.long 0x00 3. "SCL_I,SCL line sense input value" "Low,High" rbitfld.long 0x00 2. "SCL_O,SCL line drive output value" "Low,High" newline rbitfld.long 0x00 1. "SDA_I,SDA line sense input value" "Low,High" rbitfld.long 0x00 0. "SDA_O,SDA line drive output value" "Low,High" elif (((d.l(ad:0x4802A000+0xBC))&0x3000)==0x00) group.long 0xBC++0x03 line.long 0x00 "I2C_SYSTEST,System Test Register" bitfld.long 0x00 15. "ST_EN,System test enable" "Disabled,Enabled" bitfld.long 0x00 14. "FREE,Free running mode (On breakpoint)" "Stop mode,Free running" newline bitfld.long 0x00 12.--13. "TMODE,Test mode select" "Functional,,SCL counters,Loop back + SDA/SCL IO" bitfld.long 0x00 11. "SSB,Set status bits" "No action,Set" newline bitfld.long 0x00 8. "SCL_I_FUNC,SCL line input value" "Low,High" rbitfld.long 0x00 7. "SCL_O_FUNC,SCL line output value" "Low,High" newline rbitfld.long 0x00 6. "SDA_I_FUNC,SDA line input value" "Low,High" rbitfld.long 0x00 5. "SDA_O_FUNC,SDA line output value" "Low,High" else group.long 0xBC++0x03 line.long 0x00 "I2C_SYSTEST,System Test Register" bitfld.long 0x00 15. "ST_EN,System test enable" "Disabled,Enabled" bitfld.long 0x00 14. "FREE,Free running mode (On breakpoint)" "Stop mode,Free running" newline bitfld.long 0x00 12.--13. "TMODE,Test mode select" "Functional,,SCL counters,Loop back + SDA/SCL IO" bitfld.long 0x00 11. "SSB,Set status bits" "No action,Set" endif endif rgroup.long 0xC0++0x03 line.long 0x00 "I2C_BUFSTAT,I2C Buffer Status Register" bitfld.long 0x00 14.--15. "FIFODEPTH,Internal FIFO buffers depth" "8 bytes,16 bytes,32 bytes,64 bytes" bitfld.long 0x00 8.--13. "RXSTAT,RX buffer status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" newline bitfld.long 0x00 0.--5. "TXSTAT,TX buffer status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" if (((d.l(ad:0x4802A000+0xA4))&0x80)==0x00) group.long 0xC4++0x03 line.long 0x00 "I2C_OA0,I2C Own Address 0 Register" hexmask.long.byte 0x00 0.--6. 0x01 "OA0,Own address 0" else group.long 0xC4++0x03 line.long 0x00 "I2C_OA0,I2C Own Address 0 Register" hexmask.long.word 0x00 0.--9. 0x01 "OA0,Own address 0" endif if (((d.l(ad:0x4802A000+0xA4))&0x40)==0x00) group.long 0xC8++0x03 line.long 0x00 "I2C_OA1,I2C Own Address 1 Register" hexmask.long.byte 0x00 0.--6. 0x01 "OA1,Own address 1" else group.long 0xC8++0x03 line.long 0x00 "I2C_OA1,I2C Own Address 1 Register" hexmask.long.word 0x00 0.--9. 0x01 "OA1,Own address 1" endif if (((d.l(ad:0x4802A000+0xA4))&0x20)==0x00) group.long 0xCC++0x03 line.long 0x00 "I2C_OA2,I2C Own Address 2 Register" hexmask.long.byte 0x00 0.--6. 0x01 "OA2,Own address 2" else group.long 0xCC++0x03 line.long 0x00 "I2C_OA2,I2C Own Address 2 Register" hexmask.long.word 0x00 0.--9. 0x01 "OA2,Own address 2" endif rgroup.long 0xD0++0x03 line.long 0x00 "I2C_ACTOA,Active Own Address Register" bitfld.long 0x00 3. "OA3_ACT,Own address 3 active" "Inactive,Active" bitfld.long 0x00 2. "OA2_ACT,Own address 2 active" "Inactive,Active" newline bitfld.long 0x00 1. "OA1_ACT,Own address 1 active" "Inactive,Active" bitfld.long 0x00 0. "OA0_ACT,Own address 0 active" "Inactive,Active" group.long 0xD4++0x03 line.long 0x00 "I2C_SBLOCK,I2C Clock Blocking Enable Register" bitfld.long 0x00 3. "OA3_EN,Enable I2C clock blocking for own address 3" "Released,Blocked" bitfld.long 0x00 2. "OA2_EN,Enable I2C clock blocking for own address 2" "Released,Blocked" newline bitfld.long 0x00 1. "OA1_EN,Enable I2C clock blocking for own address 1" "Released,Blocked" bitfld.long 0x00 0. "OA0_EN,Enable I2C clock blocking for own address 0" "Released,Blocked" tree.end tree.end tree "McASP (Multichannel Audio Serial Port)" tree "McASP0" base ad:0x46000000 rgroup.long 0x00++0x03 line.long 0x00 "REV,Revision Identification Register" group.long 0x04++0x03 line.long 0x00 "PWRIDLESYSCONFIG,Power Idle SYSCONFIG Register" bitfld.long 0x00 0.--1. "IDLEMODE,Power management of the local target state management mode" "Force-idle,No-idle,Smart-idle,?..." group.long 0x10++0x0F line.long 0x00 "PFUNC,Pin Function Register" bitfld.long 0x00 31. "AFSR,Determines if AFSR pin functions as McASP or GPIO" "McASP,GPIO" bitfld.long 0x00 30. "AHCLKR,Determines if AHCLKR pin functions as McASP or GPIO" "McASP,GPIO" bitfld.long 0x00 29. "ACLKR,Determines if ACLKR pin functions as McASP or GPIO" "McASP,GPIO" newline bitfld.long 0x00 28. "AFSX,Determines if AFSX pin functions as McASP or GPIO" "McASP,GPIO" bitfld.long 0x00 27. "AHCLKX,Determines if AHCLKX pin functions as McASP or GPIO" "McASP,GPIO" bitfld.long 0x00 26. "ACLKX,Determines if ACLKX pin functions as McASP or GPIO" "McASP,GPIO" newline bitfld.long 0x00 25. "AMUTE,Determines if AMUTE pin functions as McASP or GPIO" "McASP,GPIO" bitfld.long 0x00 0.--3. "AXR,Determines if AXRn pin functions as McASP or GPIO" "McASP,GPIO,?..." line.long 0x04 "PDIR,Pin Direction Register" bitfld.long 0x04 31. "AFSR,Determines if AFSR pin functions as an input or output" "Input,Output" bitfld.long 0x04 30. "AHCLKR,Determines if AHCLKR pin functions as an input or output" "Input,Output" bitfld.long 0x04 29. "ACLKR,Determines if ACLKR pin functions as an input or output" "Input,Output" newline bitfld.long 0x04 28. "AFSX,Determines if AFSX pin functions as an input or output" "Input,Output" bitfld.long 0x04 27. "AHCLKX,Determines if AHCLKX pin functions as an input or output" "Input,Output" bitfld.long 0x04 26. "ACLKX,Determines if ACLKX pin functions as an input or output" "Input,Output" newline bitfld.long 0x04 25. "AMUTE,Determines if AMUTE pin functions as an input or output" "Input,Output" bitfld.long 0x04 0.--3. "AXR,Determines if AXR, pin functions as an input or output" "Input,Output,?..." line.long 0x08 "PDOUT_SET/CLR,Pin Data Output Register" setclrfld.long 0x08 31. 0x08 31. 0x10 31. "AFSR,Determines drive on AFSR output pin when the corresponding PFUNC[31] and PDIR[31] bits = 1" "Low,High" setclrfld.long 0x08 30. 0x08 30. 0x10 30. "AHCLKR,Determines drive on AHCLKR output pin when the corresponding PFUNC[30] and PDIR[30] bits = 1" "Low,High" setclrfld.long 0x08 29. 0x08 29. 0x10 29. "ACLKR,Determines drive on ACLKR output pin when the corresponding PFUNC[29] and PDIR[29] bits = 1" "Low,High" newline setclrfld.long 0x08 28. 0x08 28. 0x10 28. "AFSX,Determines drive on AFSX output pin when the corresponding PFUNC[28] and PDIR[28] bits = 1" "Low,High" setclrfld.long 0x08 27. 0x08 27. 0x10 27. "AHCLKX,Determines drive on AHCLKX output pin when the corresponding PFUNC[27] and PDIR[27] bits = 1" "Low,High" setclrfld.long 0x08 26. 0x08 26. 0x10 26. "ACLKX,Determines drive on ACLKX output pin when the corresponding PFUNC[26] and PDIR[26] bits = 1" "Low,High" newline setclrfld.long 0x08 25. 0x08 25. 0x10 25. "AMUTE,Determines drive on AMUTE output pin when the corresponding PFUNC[25] and PDIR[25] bits = 1" "Low,High" setclrfld.long 0x08 3. 0x08 3. 0x10 3. "AXR[3],Determines drive on AXR3 output pin when the corresponding PFUNC and PDIR bits = 1" "Low,High" setclrfld.long 0x08 2. 0x08 2. 0x10 2. "AXR[2],Determines drive on AXR2 output pin when the corresponding PFUNC and PDIR bits = 1" "Low,High" newline setclrfld.long 0x08 1. 0x08 1. 0x10 1. "AXR[1],Determines drive on AXR1 output pin when the corresponding PFUNC and PDIR bits = 1" "Low,High" setclrfld.long 0x08 0. 0x08 0. 0x10 0. "AXR[0],Determines drive on AXR0 output pin when the corresponding PFUNC and PDIR bits = 1" "Low,High" line.long 0x0C "PDIN,Pin Data Input Register" bitfld.long 0x0C 31. "AFSR,Logic level on AFSR pin" "Low,High" bitfld.long 0x0C 30. "AHCLKR,Logic level on AFSR pin" "Low,High" bitfld.long 0x0C 29. "ACLKR,Logic level on AFSR pin" "Low,High" newline bitfld.long 0x0C 28. "AFSX,Logic level on AFSR pin" "Low,High" bitfld.long 0x0C 27. "AHCLKX,Logic level on AFSR pin" "Low,High" bitfld.long 0x0C 26. "ACLKX,Logic level on AFSR pin" "Low,High" newline bitfld.long 0x0C 25. "AMUTE,Logic level on AFSR pin" "Low,High" bitfld.long 0x0C 0.--3. "AXR,Logic level on AFSRn pin" "Low,High,?..." group.long 0x44++0x07 line.long 0x00 "GBLCTL,Global Control Register" bitfld.long 0x00 12. "XFRST,Transmit frame sync generator reset disable" "No,Yes" bitfld.long 0x00 11. "XSMRST,Transmit state machine reset disable" "No,Yes" bitfld.long 0x00 10. "XSRCLR,Transmit serializer clear disable" "No,Yes" newline bitfld.long 0x00 9. "XHCLKRST,Transmit high-frequency clock divider reset disable" "No,Yes" bitfld.long 0x00 8. "XCLKRST,Transmit clock divider reset disable" "No,Yes" bitfld.long 0x00 4. "RFRST,Receive frame sync generator reset disable" "No,Yes" newline bitfld.long 0x00 3. "RSMRST,Receive state machine reset disable" "No,Yes" bitfld.long 0x00 2. "RSRCLR,Receive serializer clear disable" "No,Yes" bitfld.long 0x00 1. "RHCLKRST,Receive high-frequency clock divider reset disable" "No,Yes" newline bitfld.long 0x00 0. "RCLKRST,Receive high-frequency clock divider reset disable" "No,Yes" line.long 0x04 "AMUTE,Audio Mute Control Register" bitfld.long 0x04 12. "XDMAERR,Drive AMUTE active when transmit DMA error occured" "Disabled,Enabled" bitfld.long 0x04 11. "RDMAERR,Drive AMUTE active when receive DMA error occured" "Disabled,Enabled" bitfld.long 0x04 10. "XCKFAIL,Drive AMUTE active when transmit clock failure (XCKFAIL) occured" "Disabled,Enabled" newline bitfld.long 0x04 9. "RCKFAIL,Drive AMUTE active when receive clock failure occured" "Disabled,Enabled" bitfld.long 0x04 8. "XSYNCERR,Drive AMUTE active when unexpected transmit frame sync error occured" "Disabled,Enabled" bitfld.long 0x04 7. "RSYNCERR,Drive AMUTE active when unexpected receive frame sync error occured" "Disabled,Enabled" newline bitfld.long 0x04 6. "XUNDRN,Drive AMUTE active when transmit underrun error occured" "Disabled,Enabled" bitfld.long 0x04 5. "ROVRN,Drive AMUTE active when receiver overrun error occured" "Disabled,Enabled" rbitfld.long 0x04 4. "INSTAT,Determines drive on AXRn pin when PFUNC[n] and PDIR[n] bits are set to 1" "Inactive,Active" newline bitfld.long 0x04 3. "INEN,Drive AMUTE active when AMUTEIN error is active" "Disabled,Enabled" bitfld.long 0x04 2. "INPOL,Audio mute in (AMUTEIN) polarity select" "Active high,Active low" bitfld.long 0x04 0.--1. "MUTEN,AMUTE pin enable" "Disabled,Driven high,Driven low,?..." if (((d.l(ad:0x46000000+0x4C))&0x01)==0x01) group.long 0x4C++0x03 line.long 0x00 "DLBCTL,Digital Loopback Control Register" bitfld.long 0x00 2.--3. "MODE,Loopback generator mode" ",Transmit clock + sync generators,?..." bitfld.long 0x00 1. "ORD,Loopback order" "Odd to even,Even to odd" bitfld.long 0x00 0. "DLBEN,Loopback mode enable bit" "Disabled,Enabled" else group.long 0x4C++0x03 line.long 0x00 "DLBCTL,Digital Loopback Control Register" bitfld.long 0x00 2.--3. "MODE,Loopback generator mode" "Default,Transmit clock + sync generators,?..." bitfld.long 0x00 0. "DLBEN,Loopback mode enable" "Disabled,Enabled" endif if (((d.l(ad:0x46000000+0x44))&0xC0)==0x00) group.long 0x50++0x03 line.long 0x00 "DITCTL,DIT Mode Control Register" bitfld.long 0x00 3. "VB,Valid bit for odd time slots (DIT right subframe)" "0,1" bitfld.long 0x00 2. "VA,Valid bit for even time slots (DIT left subframe)" "0,1" bitfld.long 0x00 0. "DITEN,DIT mode enable bit" "Disabled,Enabled" else group.long 0x50++0x03 line.long 0x00 "DITCTL,DIT Mode Control Register" bitfld.long 0x00 3. "VB,Valid bit for odd time slots (DIT right subframe)" "0,1" bitfld.long 0x00 2. "VA,Valid bit for even time slots (DIT left subframe)" "0,1" rbitfld.long 0x00 0. "DITEN,DIT mode enable bit" "Disabled,Enabled" endif group.long 0x60++0x23 line.long 0x00 "RGBLCTL,Receiver Global Control Register" rbitfld.long 0x00 12. "XFRST,Transmit frame sync generator reset enable" "Disabled,Enabled" rbitfld.long 0x00 11. "XSMRST,Transmit state machine reset enable" "Disabled,Enabled" rbitfld.long 0x00 10. "XSRCLR,Transmit serializer clear enable" "Disabled,Enabled" newline rbitfld.long 0x00 9. "XHCLKRST,Transmit high-frequency clock divider reset enable" "Disabled,Enabled" rbitfld.long 0x00 8. "XCLKRST,Transmit clock divider reset enable" "Disabled,Enabled" bitfld.long 0x00 4. "RFRST,Receive frame sync generator reset enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "RSMRST,Receive state machine reset enable" "Disabled,Enabled" bitfld.long 0x00 2. "RSRCLR,Receive serializer clear enable" "Disabled,Enabled" bitfld.long 0x00 1. "RHCLKRST,Receive high-frequency clock divider reset enable" "Disabled,Enabled" newline bitfld.long 0x00 0. "RCLKRST,Receive clock divider reset enable" "Disabled,Enabled" line.long 0x04 "RMASK,Receive Format Unit Bit Mask Register" bitfld.long 0x04 31. "RMASK[31],Receive data mask 31 enable" "Disabled,Enabled" bitfld.long 0x04 30. "RMASK[30],Receive data mask 30 enable" "Disabled,Enabled" bitfld.long 0x04 29. "RMASK[29],Receive data mask 29 enable" "Disabled,Enabled" newline bitfld.long 0x04 28. "RMASK[28],Receive data mask 28 enable" "Disabled,Enabled" bitfld.long 0x04 27. "RMASK[27],Receive data mask enable" "Disabled,Enabled" bitfld.long 0x04 26. "RMASK[26],Receive data mask 26 enable" "Disabled,Enabled" newline bitfld.long 0x04 25. "RMASK[25],Receive data mask 25 enable" "Disabled,Enabled" bitfld.long 0x04 24. "RMASK[24],Receive data mask 24 enable" "Disabled,Enabled" bitfld.long 0x04 23. "RMASK[23],Receive data mask 23 enable" "Disabled,Enabled" newline bitfld.long 0x04 22. "RMASK[22],Receive data mask 22 enable" "Disabled,Enabled" bitfld.long 0x04 21. "RMASK[21],Receive data mask 21 enable" "Disabled,Enabled" bitfld.long 0x04 20. "RMASK[20],Receive data mask 20 enable" "Disabled,Enabled" newline bitfld.long 0x04 19. "RMASK[19],Receive data mask 19 enable" "Disabled,Enabled" bitfld.long 0x04 18. "RMASK[18],Receive data mask enable" "Disabled,Enabled" bitfld.long 0x04 17. "RMASK[17],Receive data mask 17 enable" "Disabled,Enabled" newline bitfld.long 0x04 16. "RMASK[16],Receive data mask 16 enable" "Disabled,Enabled" bitfld.long 0x04 15. "RMASK[15],Receive data mask enable" "Disabled,Enabled" bitfld.long 0x04 14. "RMASK[14],Receive data mask 14 enable" "Disabled,Enabled" newline bitfld.long 0x04 12. "RMASK[12],Receive data mask 12 enable" "Disabled,Enabled" bitfld.long 0x04 11. "RMASK[11],Receive data mask 11 enable" "Disabled,Enabled" bitfld.long 0x04 10. "RMASK[10],Receive data mask 10 enable" "Disabled,Enabled" newline bitfld.long 0x04 9. "RMASK[9],Receive data mask 9 enable" "Disabled,Enabled" bitfld.long 0x04 8. "RMASK[8],Receive data mask 8 enable" "Disabled,Enabled" bitfld.long 0x04 7. "RMASK[7],Receive data mask 7 enable" "Disabled,Enabled" newline bitfld.long 0x04 6. "RMASK[6],Receive data mask 6 enable" "Disabled,Enabled" bitfld.long 0x04 5. "RMASK[5],Receive data mask 5 enable" "Disabled,Enabled" bitfld.long 0x04 4. "RMASK[4],Receive data mask 4 enable" "Disabled,Enabled" newline bitfld.long 0x04 3. "RMASK[3],Receive data mask 3 enable" "Disabled,Enabled" bitfld.long 0x04 2. "RMASK[2],Receive data mask 2 enable" "Disabled,Enabled" bitfld.long 0x04 1. "RMASK[1],Receive data mask 1 enable" "Disabled,Enabled" newline bitfld.long 0x04 0. "RMASK[0],Receive data mask 0 enable" "Disabled,Enabled" line.long 0x08 "RFMT,Receive Bit Stream Format Register" bitfld.long 0x08 16.--17. "RDATDLY,Receive bit delay" "0 bit,1 bit,2 bit,?..." bitfld.long 0x08 15. "RRVRS,Receive serial bitstream order" "LSB,MSB" bitfld.long 0x08 13.--14. "RPAD,Pad value for extra bits in slot not belonging to the word" "0,1,RPBIT,?..." newline bitfld.long 0x08 8.--12. "RPBIT,Determines which bit is used to pad the extra bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 4.--7. "RSSZ,Receive slot size" ",,,8 bits,,12 bits,,16 bits,,20 bits,,24 bits,,28 bits,,32 bits" bitfld.long 0x08 3. "RBUSEL,Selects whether reads from serializer buffer XRBUF[n] originate from the configuration bus (CFG) or the data (DAT) port" "Data port,Configuration bus" newline bitfld.long 0x08 0.--2. "RROT,Right-rotation value for receive rotate right format unit" "No rotation,4,8,12,16,20,24,28" line.long 0x0C "AFSRCTL,Receive Frame Sync Control Register" hexmask.long.word 0x0C 7.--15. 1. "RMOD,Receive frame sync mode select" bitfld.long 0x0C 4. "FRWID,Receive frame sync width select" "Single bit,Single word" bitfld.long 0x0C 1. "FSRM,Receive frame sync generation select" "Externally,Internally" newline bitfld.long 0x0C 0. "FSRP,Receive frame sync polarity select" "Rising edge,Falling edge" line.long 0x10 "ACLKRCTL,Receive Clock Control Register" bitfld.long 0x10 7. "CLKRP,Receive bitstream clock polarity select bit" "Falling edge,Rising edge" bitfld.long 0x10 5. "CLKRM,Receive bit clock source bit" "External,Internal" bitfld.long 0x10 0.--4. "CLKRDIV,Receive bit clock divide ratio" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" line.long 0x14 "AHCLKRCTL,Receive High-Frequency Clock Control Register" bitfld.long 0x14 15. "HCLKRM,Receive high-frequency clock source" "External,Internal" bitfld.long 0x14 14. "HCLKRP,Receive bitstream high-frequency clock polarity select" "Not inverted,Inverted" hexmask.long.word 0x14 0.--11. 1. "HCLKRDIV,Receive high-frequency clock divide ratio" line.long 0x18 "RTDM,Receive TDM Time Slot 0-31 Register" bitfld.long 0x18 31. "RTDMS[31],Receiver mode during TDM time slot 31" "Inactive,Active" bitfld.long 0x18 30. "RTDMS[30],Receiver mode during TDM time slot 30" "Inactive,Active" bitfld.long 0x18 29. "RTDMS[29],Receiver mode during TDM time slot 29" "Inactive,Active" newline bitfld.long 0x18 28. "RTDMS[28],Receiver mode during TDM time slot 28" "Inactive,Active" bitfld.long 0x18 27. "RTDMS[27],Receiver mode during TDM time slot 27" "Inactive,Active" bitfld.long 0x18 26. "RTDMS[26],Receiver mode during TDM time slot 26" "Inactive,Active" newline bitfld.long 0x18 25. "RTDMS[25],Receiver mode during TDM time slot 25" "Inactive,Active" bitfld.long 0x18 24. "RTDMS[24],Receiver mode during TDM time slot 24" "Inactive,Active" bitfld.long 0x18 23. "RTDMS[23],Receiver mode during TDM time slot 23" "Inactive,Active" newline bitfld.long 0x18 22. "RTDMS[22],Receiver mode during TDM time slot 22" "Inactive,Active" bitfld.long 0x18 21. "RTDMS[21],Receiver mode during TDM time slot 21" "Inactive,Active" bitfld.long 0x18 20. "RTDMS[20],Receiver mode during TDM time slot 20" "Inactive,Active" newline bitfld.long 0x18 19. "RTDMS[19],Receiver mode during TDM time slot 19" "Inactive,Active" bitfld.long 0x18 18. "RTDMS[18],Receiver mode during TDM time slot 18" "Inactive,Active" bitfld.long 0x18 17. "RTDMS[17],Receiver mode during TDM time slot 17" "Inactive,Active" newline bitfld.long 0x18 16. "RTDMS[16],Receiver mode during TDM time slot 16" "Inactive,Active" bitfld.long 0x18 15. "RTDMS[15],Receiver mode during TDM time slot 15" "Inactive,Active" bitfld.long 0x18 14. "RTDMS[14],Receiver mode during TDM time slot 14" "Inactive,Active" newline bitfld.long 0x18 12. "RTDMS[12],Receiver mode during TDM time slot 12" "Inactive,Active" bitfld.long 0x18 11. "RTDMS[11],Receiver mode during TDM time slot 11" "Inactive,Active" bitfld.long 0x18 10. "RTDMS[10],Receiver mode during TDM time slot 10" "Inactive,Active" newline bitfld.long 0x18 9. "RTDMS[9],Receiver mode during TDM time slot 9" "Inactive,Active" bitfld.long 0x18 8. "RTDMS[8],Receiver mode during TDM time slot 8" "Inactive,Active" bitfld.long 0x18 7. "RTDMS[7],Receiver mode during TDM time slot 7" "Inactive,Active" newline bitfld.long 0x18 6. "RTDMS[6],Receiver mode during TDM time slot 6" "Inactive,Active" bitfld.long 0x18 5. "RTDMS[5],Receiver mode during TDM time slot 5" "Inactive,Active" bitfld.long 0x18 4. "RTDMS[4],Receiver mode during TDM time slot 4" "Inactive,Active" newline bitfld.long 0x18 3. "RTDMS[3],Receiver mode during TDM time slot 3" "Inactive,Active" bitfld.long 0x18 2. "RTDMS[2],Receiver mode during TDM time slot 2" "Inactive,Active" bitfld.long 0x18 1. "RTDMS[1],Receiver mode during TDM time slot 1" "Inactive,Active" newline bitfld.long 0x18 0. "RTDMS[0],Receiver mode during TDM time slot 0" "Inactive,Active" line.long 0x1C "RINTCTL,Receiver Interrupt Control Register" bitfld.long 0x1C 7. "RSTAFRM,Receive start of frame interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 5. "RDATA,Receive data ready interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 4. "RLAST,Receive last slot interrupt enable" "Disabled,Enabled" newline bitfld.long 0x1C 3. "RDMAERR,Receive DMA error interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 2. "RCKFAIL,Receive clock failure interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 1. "RSYNCERR,Unexpected receive frame sync interrupt enable" "Disabled,Enabled" newline bitfld.long 0x1C 0. "ROVRN,Receiver overrun interrupt enable" "Disabled,Enabled" line.long 0x20 "RSTAT,Receiver Status Register" bitfld.long 0x20 8. "RERR,Receiver error flag" "Not occured,Occured" bitfld.long 0x20 7. "RDMAERR,Receive DMA error flag" "Not occured,Occured" bitfld.long 0x20 6. "RSTAFRM,Receive start of frame flag" "Not received,Received" newline bitfld.long 0x20 5. "RDATA,Receive data ready flag" "Not received,Received" bitfld.long 0x20 4. "RLAST,Receive last slot flag" "Not received,Received" bitfld.long 0x20 3. "RTDMSLOT,Returns the LSB of RSLOT" "Odd,Even" newline bitfld.long 0x20 2. "RCKFAIL,Receive clock failure flag" "Not received,Received" bitfld.long 0x20 1. "RSYNCERR,Unexpected receive frame sync flag" "Not occured,Occured" bitfld.long 0x20 0. "ROVRN,Receiver overrun flag" "No overrun,Overrun" rgroup.long 0x84++0x03 line.long 0x00 "RSLOT,Current Receive TDM Time Slot Register" hexmask.long.word 0x00 0.--8. 1. "RSLOTCNT,Current receive time slot count" group.long 0x88++0x07 line.long 0x00 "RCLKCHK,Receive Clock Check Control Register" hexmask.long.byte 0x00 24.--31. 1. "RCNT,Receive clock count value (from previous measurement)" hexmask.long.byte 0x00 16.--23. 1. "RMAX,Receive clock maximum boundary" hexmask.long.byte 0x00 8.--15. 1. "RMIN,Receive clock minimum boundary" newline bitfld.long 0x00 0.--3. "RPS,Receive clock check prescaler value" "/1,/2,/4,/8,/16,/32,/64,/128,/256,?..." line.long 0x04 "REVTCTL,Receiver DMA Event Control Register" bitfld.long 0x04 0. "RDATDMA,Receive data DMA request enable bit" "Enabled,?..." group.long 0xA0++0x23 line.long 0x00 "XGBLCTL,Transmitter Global Control Register" bitfld.long 0x00 12. "XFRST,Transmit frame sync generator reset enable" "Disabled,Enabled" bitfld.long 0x00 11. "XSMRST,Transmit state machine reset enable" "Disabled,Enabled" bitfld.long 0x00 10. "XSRCLR,Transmit serializer clear enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "XHCLKRST,Transmit high-frequency clock divider reset enable" "Disabled,Enabled" bitfld.long 0x00 8. "XCLKRST,Transmit clock divider reset enable" "Disabled,Enabled" rbitfld.long 0x00 4. "RFRST,Receive frame sync generator reset enable" "Disabled,Enabled" newline rbitfld.long 0x00 3. "RSMRST,Receive state machine reset enable" "Disabled,Enabled" rbitfld.long 0x00 2. "RSRCLR,Receive serializer clear enable" "Disabled,Enabled" rbitfld.long 0x00 1. "RHCLKRST,Receive high-frequency clock divider reset enable" "Disabled,Enabled" newline rbitfld.long 0x00 0. "RCLKRST,Receive clock divider reset enable" "Disabled,Enabled" line.long 0x04 "XMASK,Transmit Format Unit Bit Mask Register" bitfld.long 0x04 31. "XMASK[31],Transmit data mask 31 disable" "No,Yes" bitfld.long 0x04 30. "XMASK[30],Transmit data mask 30 disable" "No,Yes" bitfld.long 0x04 29. "XMASK[29],Transmit data mask 29 disable" "No,Yes" newline bitfld.long 0x04 28. "XMASK[28],Transmit data mask 28 disable" "No,Yes" bitfld.long 0x04 27. "XMASK[27],Transmit data mask 27 disable" "No,Yes" bitfld.long 0x04 26. "XMASK[26],Transmit data mask 26 disable" "No,Yes" newline bitfld.long 0x04 25. "XMASK[25],Transmit data mask 25 disable" "No,Yes" bitfld.long 0x04 24. "XMASK[24],Transmit data mask 24 disable" "No,Yes" bitfld.long 0x04 23. "XMASK[23],Transmit data mask 23 disable" "No,Yes" newline bitfld.long 0x04 22. "XMASK[22],Transmit data mask 22 disable" "No,Yes" bitfld.long 0x04 21. "XMASK[21],Transmit data mask 21 disable" "No,Yes" bitfld.long 0x04 20. "XMASK[20],Transmit data mask 20 disable" "No,Yes" newline bitfld.long 0x04 19. "XMASK[19],Transmit data mask 19 disable" "No,Yes" bitfld.long 0x04 18. "XMASK[18],Transmit data mask 18 disable" "No,Yes" bitfld.long 0x04 17. "XMASK[17],Transmit data mask 17 disable" "No,Yes" newline bitfld.long 0x04 16. "XMASK[16],Transmit data mask 16 disable" "No,Yes" bitfld.long 0x04 15. "XMASK[15],Transmit data mask 15 disable" "No,Yes" bitfld.long 0x04 14. "XMASK[14],Transmit data mask 14 disable" "No,Yes" newline bitfld.long 0x04 12. "XMASK[12],Transmit data mask 12 disable" "No,Yes" bitfld.long 0x04 11. "XMASK[11],Transmit data mask 11 disable" "No,Yes" bitfld.long 0x04 10. "XMASK[10],Transmit data mask 10 disable" "No,Yes" newline bitfld.long 0x04 9. "XMASK[9],Transmit data mask 9 disable" "No,Yes" bitfld.long 0x04 8. "XMASK[8],Transmit data mask 8 disable" "No,Yes" bitfld.long 0x04 7. "XMASK[7],Transmit data mask 7 disable" "No,Yes" newline bitfld.long 0x04 6. "XMASK[6],Transmit data mask 6 disable" "No,Yes" bitfld.long 0x04 5. "XMASK[5],Transmit data mask 5 disable" "No,Yes" bitfld.long 0x04 4. "XMASK[4],Transmit data mask 4 disable" "No,Yes" newline bitfld.long 0x04 3. "XMASK[3],Transmit data mask 3 disable" "No,Yes" bitfld.long 0x04 2. "XMASK[2],Transmit data mask 2 disable" "No,Yes" bitfld.long 0x04 1. "XMASK[1],Transmit data mask 1 disable" "No,Yes" newline bitfld.long 0x04 0. "XMASK[0],Transmit data mask 0 disable" "No,Yes" line.long 0x08 "XFMT,Transmit Bit Stream Format Register" bitfld.long 0x08 16.--17. "XDATDLY,Transmit sync bit delay" "0 bit,1 bit,2 bit,?..." bitfld.long 0x08 15. "XRVRS,Transmit serial bitstream order" "LSB,MSB" bitfld.long 0x08 13.--14. "XPAD,Pad value for extra bits in slot not belonging to the word" "0,1,XPBIT,?..." newline bitfld.long 0x08 8.--12. "XPBIT,Determines which bit is used to pad the extra bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 4.--7. "XSSZ,Transmit slot size" ",,,8 bits,,12 bits,,16 bits,,20 bits,,24 bits,,28 bits,,32 bits" bitfld.long 0x08 3. "XBUSEL,Selects whether reads from serializer buffer XRBUF[n] originate from the configuration bus (CFG) or the data (DAT) port" "Data port,Configuration bus" newline bitfld.long 0x08 0.--2. "XROT,Right-rotation value for rransmit rotate right format unit" "No rotation,4,8,12,16,20,24,28" line.long 0x0C "AFSXCTL,Transmit Frame Sync Control Register" hexmask.long.word 0x0C 7.--15. 1. "XMOD,Transmit frame sync mode select" bitfld.long 0x0C 4. "FXWID,Transmit frame sync width" "Single bit,Single word" bitfld.long 0x0C 1. "FSXM,Transmit frame sync generation select" "External,Internal" newline bitfld.long 0x0C 0. "FSXP,Transmit frame sync polarity select" "Falling edge,Rising edge" line.long 0x10 "ACLKXCTL,Transmit Clock Control Register" bitfld.long 0x10 7. "CLKXP,Transmit bitstream clock polarity select" "Falling edge,Rising edge" bitfld.long 0x10 6. "ASYNC,Transmit/receive operation asynchronous" "Synchronous,Asynchronous" bitfld.long 0x10 5. "CLKXM,Transmit bit clock source" "External,Internal" newline bitfld.long 0x10 0.--4. "CLKXDIV,Transmit bit clock divide ratio" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" line.long 0x14 "AHCLKXCTL,Transmit High-Frequency Clock Control Register" bitfld.long 0x14 15. "HCLKXM,Transmit high-frequency clock source" "External,Internal" bitfld.long 0x14 14. "HCLKXP,Transmit bitstream high-frequency clock polarity select" "Not inverted,Inverted" hexmask.long.word 0x14 0.--11. 1. "HCLKXDIV,Transmit high-frequency clock divide ratio" line.long 0x18 "XTDM,Transmit TDM Time Slot 0-31 Register" bitfld.long 0x18 31. "XTDMS[31],Transmitter mode during TDM time slot 31" "Inactive,Active" bitfld.long 0x18 30. "XTDMS[30],Transmitter mode during TDM time slot 30" "Inactive,Active" bitfld.long 0x18 29. "XTDMS[29],Transmitter mode during TDM time slot 29" "Inactive,Active" newline bitfld.long 0x18 28. "XTDMS[28],Transmitter mode during TDM time slot 28" "Inactive,Active" bitfld.long 0x18 27. "XTDMS[27],Transmitter mode during TDM time slot 27" "Inactive,Active" bitfld.long 0x18 26. "XTDMS[26],Transmitter mode during TDM time slot 26" "Inactive,Active" newline bitfld.long 0x18 25. "XTDMS[25],Transmitter mode during TDM time slot 25" "Inactive,Active" bitfld.long 0x18 24. "XTDMS[24],Transmitter mode during TDM time slot 24" "Inactive,Active" bitfld.long 0x18 23. "XTDMS[23],Transmitter mode during TDM time slot 23" "Inactive,Active" newline bitfld.long 0x18 22. "XTDMS[22],Transmitter mode during TDM time slot 22" "Inactive,Active" bitfld.long 0x18 21. "XTDMS[21],Transmitter mode during TDM time slot 21" "Inactive,Active" bitfld.long 0x18 20. "XTDMS[20],Transmitter mode during TDM time slot 20" "Inactive,Active" newline bitfld.long 0x18 19. "XTDMS[19],Transmitter mode during TDM time slot 19" "Inactive,Active" bitfld.long 0x18 18. "XTDMS[18],Transmitter mode during TDM time slot 18" "Inactive,Active" bitfld.long 0x18 17. "XTDMS[17],Transmitter mode during TDM time slot 17" "Inactive,Active" newline bitfld.long 0x18 16. "XTDMS[16],Transmitter mode during TDM time slot 16" "Inactive,Active" bitfld.long 0x18 15. "XTDMS[15],Transmitter mode during TDM time slot 15" "Inactive,Active" bitfld.long 0x18 14. "XTDMS[14],Transmitter mode during TDM time slot 14" "Inactive,Active" newline bitfld.long 0x18 12. "XTDMS[12],Transmitter mode during TDM time slot 12" "Inactive,Active" bitfld.long 0x18 11. "XTDMS[11],Transmitter mode during TDM time slot 11" "Inactive,Active" bitfld.long 0x18 10. "XTDMS[10],Transmitter mode during TDM time slot 10" "Inactive,Active" newline bitfld.long 0x18 9. "XTDMS[9],Transmitter mode during TDM time slot 9" "Inactive,Active" bitfld.long 0x18 8. "XTDMS[8],Transmitter mode during TDM time slot 8" "Inactive,Active" bitfld.long 0x18 7. "XTDMS[7],Transmitter mode during TDM time slot 7" "Inactive,Active" newline bitfld.long 0x18 6. "XTDMS[6],Transmitter mode during TDM time slot 6" "Inactive,Active" bitfld.long 0x18 5. "XTDMS[5],Transmitter mode during TDM time slot 5" "Inactive,Active" bitfld.long 0x18 4. "XTDMS[4],Transmitter mode during TDM time slot 4" "Inactive,Active" newline bitfld.long 0x18 3. "XTDMS[3],Transmitter mode during TDM time slot 3" "Inactive,Active" bitfld.long 0x18 2. "XTDMS[2],Transmitter mode during TDM time slot 2" "Inactive,Active" bitfld.long 0x18 1. "XTDMS[1],Transmitter mode during TDM time slot 1" "Inactive,Active" newline bitfld.long 0x18 0. "XTDMS[0],Transmitter mode during TDM time slot 0" "Inactive,Active" line.long 0x1C "XINTCTL,Transmitter Interrupt Control Register" bitfld.long 0x1C 7. "XSTAFRM,Transmit start of frame interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 5. "XDATA,Transmit data ready interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 4. "XLAST,Transmit last slot interrupt enable" "Disabled,Enabled" newline bitfld.long 0x1C 3. "XDMAERR,Transmit DMA error interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 2. "XCKFAIL,Transmit clock failure interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 1. "XSYNCERR,Unexpected transmit frame sync interrupt enable" "Disabled,Enabled" newline bitfld.long 0x1C 0. "XUNDRN,Transmit overrun interrupt enable" "Disabled,Enabled" line.long 0x20 "XSTAT,Transmitter Status Register" bitfld.long 0x20 8. "XERR,Transmit error flag" "Not occured,Occured" bitfld.long 0x20 7. "XDMAERR,Transmit DMA error flag" "Not occured,Occured" bitfld.long 0x20 6. "XSTAFRM,Transmit start of frame flag" "Not detected,Detected" newline bitfld.long 0x20 5. "XDATA,Transmit data ready flag" "Not ready,Ready" bitfld.long 0x20 4. "XLAST,Transmit last slot flag" "Not last,Last" bitfld.long 0x20 3. "XTDMSLOT,Returns the LSB of RSLOT" "Odd,Even" newline bitfld.long 0x20 2. "XCKFAIL,Transmit clock failure flag" "Not occured,Occured" bitfld.long 0x20 1. "XSYNCERR,Unexpected transmit frame sync flag" "Not occured,Occured" bitfld.long 0x20 0. "XUNDRN,Transmit underrun flag" "Not occured,Occured" rgroup.long 0xC4++0x03 line.long 0x00 "XSLOT,Current Transmit TDM Time Slot Register" hexmask.long.word 0x00 0.--9. 1. "XSLOTCNT,Current transmit time slot count" group.long 0xC8++0x07 line.long 0x00 "XCLKCHK,Transmit Clock Check Control Register" hexmask.long.byte 0x00 24.--31. 1. "XCNT,Transmit clock count value (from previous measurement)" hexmask.long.byte 0x00 16.--23. 1. "XMAX,Transmit clock maximum boundary" hexmask.long.byte 0x00 8.--15. 1. "XMIN,Transmit clock minimum boundary" newline bitfld.long 0x00 0.--3. "XPS,Transmit clock check prescaler value" "/1,/2,/4,/8,/16,/32,/64,/128,/256,?..." line.long 0x04 "XEVTCTL,Transmitter DMA Event Control Register" bitfld.long 0x04 0. "XDATDMA,Transmit data DMA request enable bit" "Enabled,?..." group.long 0x100++0x03 line.long 0x00 "DITCSRA_0,Left (Even TDM Time Slot) Channel Status Register" group.long (0x100+0x18)++0x03 line.long 0x00 "DITCSRB_0,Right (Odd TDM Time Slot) Channel Status Register" group.long (0x100+0x30)++0x03 line.long 0x00 "DITUDRA_0,Left (Even TDM Time Slot) Channel User Data Register" group.long (0x100+0x48)++0x03 line.long 0x00 "DITUDRB_0,Right (Odd TDM Time Slot) Channel User Data Register" group.long (0x100+0x80)++0x03 line.long 0x00 "SRCTL_0,Serializer Control Register" rbitfld.long 0x00 5. "RRDY,Receive buffer ready" "Empty,Not empty" rbitfld.long 0x00 4. "XRDY,Transmit buffer ready" "Not empty,Empty" bitfld.long 0x00 2.--3. "DISMOD,Serializer pin drive mode" "3-state,,Low,high" newline bitfld.long 0x00 0.--1. "SRMOD,Serializer mode" "Inactive,Transmitter,Receiver,?..." group.long (0x100+0x100)++0x03 line.long 0x00 "XBUF0,Transmit Buffer Register for Serializers" group.long (0x100+0x180)++0x03 line.long 0x00 "RBUF0,Transmit Receive Register for Serializers" group.long 0x104++0x03 line.long 0x00 "DITCSRA_1,Left (Even TDM Time Slot) Channel Status Register" group.long (0x104+0x18)++0x03 line.long 0x00 "DITCSRB_1,Right (Odd TDM Time Slot) Channel Status Register" group.long (0x104+0x30)++0x03 line.long 0x00 "DITUDRA_1,Left (Even TDM Time Slot) Channel User Data Register" group.long (0x104+0x48)++0x03 line.long 0x00 "DITUDRB_1,Right (Odd TDM Time Slot) Channel User Data Register" group.long (0x104+0x80)++0x03 line.long 0x00 "SRCTL_1,Serializer Control Register" rbitfld.long 0x00 5. "RRDY,Receive buffer ready" "Empty,Not empty" rbitfld.long 0x00 4. "XRDY,Transmit buffer ready" "Not empty,Empty" bitfld.long 0x00 2.--3. "DISMOD,Serializer pin drive mode" "3-state,,Low,high" newline bitfld.long 0x00 0.--1. "SRMOD,Serializer mode" "Inactive,Transmitter,Receiver,?..." group.long (0x104+0x100)++0x03 line.long 0x00 "XBUF1,Transmit Buffer Register for Serializers" group.long (0x104+0x180)++0x03 line.long 0x00 "RBUF1,Transmit Receive Register for Serializers" group.long 0x108++0x03 line.long 0x00 "DITCSRA_2,Left (Even TDM Time Slot) Channel Status Register" group.long (0x108+0x18)++0x03 line.long 0x00 "DITCSRB_2,Right (Odd TDM Time Slot) Channel Status Register" group.long (0x108+0x30)++0x03 line.long 0x00 "DITUDRA_2,Left (Even TDM Time Slot) Channel User Data Register" group.long (0x108+0x48)++0x03 line.long 0x00 "DITUDRB_2,Right (Odd TDM Time Slot) Channel User Data Register" group.long (0x108+0x80)++0x03 line.long 0x00 "SRCTL_2,Serializer Control Register" rbitfld.long 0x00 5. "RRDY,Receive buffer ready" "Empty,Not empty" rbitfld.long 0x00 4. "XRDY,Transmit buffer ready" "Not empty,Empty" bitfld.long 0x00 2.--3. "DISMOD,Serializer pin drive mode" "3-state,,Low,high" newline bitfld.long 0x00 0.--1. "SRMOD,Serializer mode" "Inactive,Transmitter,Receiver,?..." group.long (0x108+0x100)++0x03 line.long 0x00 "XBUF2,Transmit Buffer Register for Serializers" group.long (0x108+0x180)++0x03 line.long 0x00 "RBUF2,Transmit Receive Register for Serializers" group.long 0x10C++0x03 line.long 0x00 "DITCSRA_3,Left (Even TDM Time Slot) Channel Status Register" group.long (0x10C+0x18)++0x03 line.long 0x00 "DITCSRB_3,Right (Odd TDM Time Slot) Channel Status Register" group.long (0x10C+0x30)++0x03 line.long 0x00 "DITUDRA_3,Left (Even TDM Time Slot) Channel User Data Register" group.long (0x10C+0x48)++0x03 line.long 0x00 "DITUDRB_3,Right (Odd TDM Time Slot) Channel User Data Register" group.long (0x10C+0x80)++0x03 line.long 0x00 "SRCTL_3,Serializer Control Register" rbitfld.long 0x00 5. "RRDY,Receive buffer ready" "Empty,Not empty" rbitfld.long 0x00 4. "XRDY,Transmit buffer ready" "Not empty,Empty" bitfld.long 0x00 2.--3. "DISMOD,Serializer pin drive mode" "3-state,,Low,high" newline bitfld.long 0x00 0.--1. "SRMOD,Serializer mode" "Inactive,Transmitter,Receiver,?..." group.long (0x10C+0x100)++0x03 line.long 0x00 "XBUF3,Transmit Buffer Register for Serializers" group.long (0x10C+0x180)++0x03 line.long 0x00 "RBUF3,Transmit Receive Register for Serializers" group.long 0x110++0x03 line.long 0x00 "DITCSRA_4,Left (Even TDM Time Slot) Channel Status Register" group.long (0x110+0x18)++0x03 line.long 0x00 "DITCSRB_4,Right (Odd TDM Time Slot) Channel Status Register" group.long (0x110+0x30)++0x03 line.long 0x00 "DITUDRA_4,Left (Even TDM Time Slot) Channel User Data Register" group.long (0x110+0x48)++0x03 line.long 0x00 "DITUDRB_4,Right (Odd TDM Time Slot) Channel User Data Register" group.long (0x110+0x80)++0x03 line.long 0x00 "SRCTL_4,Serializer Control Register" rbitfld.long 0x00 5. "RRDY,Receive buffer ready" "Empty,Not empty" rbitfld.long 0x00 4. "XRDY,Transmit buffer ready" "Not empty,Empty" bitfld.long 0x00 2.--3. "DISMOD,Serializer pin drive mode" "3-state,,Low,high" newline bitfld.long 0x00 0.--1. "SRMOD,Serializer mode" "Inactive,Transmitter,Receiver,?..." group.long (0x110+0x100)++0x03 line.long 0x00 "XBUF4,Transmit Buffer Register for Serializers" group.long (0x110+0x180)++0x03 line.long 0x00 "RBUF4,Transmit Receive Register for Serializers" group.long 0x114++0x03 line.long 0x00 "DITCSRA_5,Left (Even TDM Time Slot) Channel Status Register" group.long (0x114+0x18)++0x03 line.long 0x00 "DITCSRB_5,Right (Odd TDM Time Slot) Channel Status Register" group.long (0x114+0x30)++0x03 line.long 0x00 "DITUDRA_5,Left (Even TDM Time Slot) Channel User Data Register" group.long (0x114+0x48)++0x03 line.long 0x00 "DITUDRB_5,Right (Odd TDM Time Slot) Channel User Data Register" group.long (0x114+0x80)++0x03 line.long 0x00 "SRCTL_5,Serializer Control Register" rbitfld.long 0x00 5. "RRDY,Receive buffer ready" "Empty,Not empty" rbitfld.long 0x00 4. "XRDY,Transmit buffer ready" "Not empty,Empty" bitfld.long 0x00 2.--3. "DISMOD,Serializer pin drive mode" "3-state,,Low,high" newline bitfld.long 0x00 0.--1. "SRMOD,Serializer mode" "Inactive,Transmitter,Receiver,?..." group.long (0x114+0x100)++0x03 line.long 0x00 "XBUF5,Transmit Buffer Register for Serializers" group.long (0x114+0x180)++0x03 line.long 0x00 "RBUF5,Transmit Receive Register for Serializers" group.long 0x1000++0x03 line.long 0x00 "WFIFOCTL,Write FIFO Control Register" bitfld.long 0x00 16. "WENA,Write FIFO enable" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. "WNUMEVT,Write word count per DMA event" hexmask.long.byte 0x00 0.--7. 1. "WNUMDMA,Write word count per transfer" rgroup.long 0x1004++0x03 line.long 0x00 "WFIFOSTS,Write FIFO Status Register" hexmask.long.byte 0x00 0.--7. 1. "WLVL,Write level" group.long 0x100C++0x03 line.long 0x00 "RFIFOCTL,Read FIFO Control Register" bitfld.long 0x00 16. "RENA,Read FIFO enable" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. "RNUMEVT,Read word count per DMA event" hexmask.long.byte 0x00 0.--7. 1. "RNUMDMA,Read word count per transfer" rgroup.long 0x1004++0x03 line.long 0x00 "RFIFOSTS,Read FIFO Status Register" hexmask.long.byte 0x00 0.--7. 1. "RLVL,Read level" tree.end tree "McASP1" base ad:0x46400000 rgroup.long 0x00++0x03 line.long 0x00 "REV,Revision Identification Register" group.long 0x04++0x03 line.long 0x00 "PWRIDLESYSCONFIG,Power Idle SYSCONFIG Register" bitfld.long 0x00 0.--1. "IDLEMODE,Power management of the local target state management mode" "Force-idle,No-idle,Smart-idle,?..." group.long 0x10++0x0F line.long 0x00 "PFUNC,Pin Function Register" bitfld.long 0x00 31. "AFSR,Determines if AFSR pin functions as McASP or GPIO" "McASP,GPIO" bitfld.long 0x00 30. "AHCLKR,Determines if AHCLKR pin functions as McASP or GPIO" "McASP,GPIO" bitfld.long 0x00 29. "ACLKR,Determines if ACLKR pin functions as McASP or GPIO" "McASP,GPIO" newline bitfld.long 0x00 28. "AFSX,Determines if AFSX pin functions as McASP or GPIO" "McASP,GPIO" bitfld.long 0x00 27. "AHCLKX,Determines if AHCLKX pin functions as McASP or GPIO" "McASP,GPIO" bitfld.long 0x00 26. "ACLKX,Determines if ACLKX pin functions as McASP or GPIO" "McASP,GPIO" newline bitfld.long 0x00 25. "AMUTE,Determines if AMUTE pin functions as McASP or GPIO" "McASP,GPIO" bitfld.long 0x00 0.--3. "AXR,Determines if AXRn pin functions as McASP or GPIO" "McASP,GPIO,?..." line.long 0x04 "PDIR,Pin Direction Register" bitfld.long 0x04 31. "AFSR,Determines if AFSR pin functions as an input or output" "Input,Output" bitfld.long 0x04 30. "AHCLKR,Determines if AHCLKR pin functions as an input or output" "Input,Output" bitfld.long 0x04 29. "ACLKR,Determines if ACLKR pin functions as an input or output" "Input,Output" newline bitfld.long 0x04 28. "AFSX,Determines if AFSX pin functions as an input or output" "Input,Output" bitfld.long 0x04 27. "AHCLKX,Determines if AHCLKX pin functions as an input or output" "Input,Output" bitfld.long 0x04 26. "ACLKX,Determines if ACLKX pin functions as an input or output" "Input,Output" newline bitfld.long 0x04 25. "AMUTE,Determines if AMUTE pin functions as an input or output" "Input,Output" bitfld.long 0x04 0.--3. "AXR,Determines if AXR, pin functions as an input or output" "Input,Output,?..." line.long 0x08 "PDOUT_SET/CLR,Pin Data Output Register" setclrfld.long 0x08 31. 0x08 31. 0x10 31. "AFSR,Determines drive on AFSR output pin when the corresponding PFUNC[31] and PDIR[31] bits = 1" "Low,High" setclrfld.long 0x08 30. 0x08 30. 0x10 30. "AHCLKR,Determines drive on AHCLKR output pin when the corresponding PFUNC[30] and PDIR[30] bits = 1" "Low,High" setclrfld.long 0x08 29. 0x08 29. 0x10 29. "ACLKR,Determines drive on ACLKR output pin when the corresponding PFUNC[29] and PDIR[29] bits = 1" "Low,High" newline setclrfld.long 0x08 28. 0x08 28. 0x10 28. "AFSX,Determines drive on AFSX output pin when the corresponding PFUNC[28] and PDIR[28] bits = 1" "Low,High" setclrfld.long 0x08 27. 0x08 27. 0x10 27. "AHCLKX,Determines drive on AHCLKX output pin when the corresponding PFUNC[27] and PDIR[27] bits = 1" "Low,High" setclrfld.long 0x08 26. 0x08 26. 0x10 26. "ACLKX,Determines drive on ACLKX output pin when the corresponding PFUNC[26] and PDIR[26] bits = 1" "Low,High" newline setclrfld.long 0x08 25. 0x08 25. 0x10 25. "AMUTE,Determines drive on AMUTE output pin when the corresponding PFUNC[25] and PDIR[25] bits = 1" "Low,High" setclrfld.long 0x08 3. 0x08 3. 0x10 3. "AXR[3],Determines drive on AXR3 output pin when the corresponding PFUNC and PDIR bits = 1" "Low,High" setclrfld.long 0x08 2. 0x08 2. 0x10 2. "AXR[2],Determines drive on AXR2 output pin when the corresponding PFUNC and PDIR bits = 1" "Low,High" newline setclrfld.long 0x08 1. 0x08 1. 0x10 1. "AXR[1],Determines drive on AXR1 output pin when the corresponding PFUNC and PDIR bits = 1" "Low,High" setclrfld.long 0x08 0. 0x08 0. 0x10 0. "AXR[0],Determines drive on AXR0 output pin when the corresponding PFUNC and PDIR bits = 1" "Low,High" line.long 0x0C "PDIN,Pin Data Input Register" bitfld.long 0x0C 31. "AFSR,Logic level on AFSR pin" "Low,High" bitfld.long 0x0C 30. "AHCLKR,Logic level on AFSR pin" "Low,High" bitfld.long 0x0C 29. "ACLKR,Logic level on AFSR pin" "Low,High" newline bitfld.long 0x0C 28. "AFSX,Logic level on AFSR pin" "Low,High" bitfld.long 0x0C 27. "AHCLKX,Logic level on AFSR pin" "Low,High" bitfld.long 0x0C 26. "ACLKX,Logic level on AFSR pin" "Low,High" newline bitfld.long 0x0C 25. "AMUTE,Logic level on AFSR pin" "Low,High" bitfld.long 0x0C 0.--3. "AXR,Logic level on AFSRn pin" "Low,High,?..." group.long 0x44++0x07 line.long 0x00 "GBLCTL,Global Control Register" bitfld.long 0x00 12. "XFRST,Transmit frame sync generator reset disable" "No,Yes" bitfld.long 0x00 11. "XSMRST,Transmit state machine reset disable" "No,Yes" bitfld.long 0x00 10. "XSRCLR,Transmit serializer clear disable" "No,Yes" newline bitfld.long 0x00 9. "XHCLKRST,Transmit high-frequency clock divider reset disable" "No,Yes" bitfld.long 0x00 8. "XCLKRST,Transmit clock divider reset disable" "No,Yes" bitfld.long 0x00 4. "RFRST,Receive frame sync generator reset disable" "No,Yes" newline bitfld.long 0x00 3. "RSMRST,Receive state machine reset disable" "No,Yes" bitfld.long 0x00 2. "RSRCLR,Receive serializer clear disable" "No,Yes" bitfld.long 0x00 1. "RHCLKRST,Receive high-frequency clock divider reset disable" "No,Yes" newline bitfld.long 0x00 0. "RCLKRST,Receive high-frequency clock divider reset disable" "No,Yes" line.long 0x04 "AMUTE,Audio Mute Control Register" bitfld.long 0x04 12. "XDMAERR,Drive AMUTE active when transmit DMA error occured" "Disabled,Enabled" bitfld.long 0x04 11. "RDMAERR,Drive AMUTE active when receive DMA error occured" "Disabled,Enabled" bitfld.long 0x04 10. "XCKFAIL,Drive AMUTE active when transmit clock failure (XCKFAIL) occured" "Disabled,Enabled" newline bitfld.long 0x04 9. "RCKFAIL,Drive AMUTE active when receive clock failure occured" "Disabled,Enabled" bitfld.long 0x04 8. "XSYNCERR,Drive AMUTE active when unexpected transmit frame sync error occured" "Disabled,Enabled" bitfld.long 0x04 7. "RSYNCERR,Drive AMUTE active when unexpected receive frame sync error occured" "Disabled,Enabled" newline bitfld.long 0x04 6. "XUNDRN,Drive AMUTE active when transmit underrun error occured" "Disabled,Enabled" bitfld.long 0x04 5. "ROVRN,Drive AMUTE active when receiver overrun error occured" "Disabled,Enabled" rbitfld.long 0x04 4. "INSTAT,Determines drive on AXRn pin when PFUNC[n] and PDIR[n] bits are set to 1" "Inactive,Active" newline bitfld.long 0x04 3. "INEN,Drive AMUTE active when AMUTEIN error is active" "Disabled,Enabled" bitfld.long 0x04 2. "INPOL,Audio mute in (AMUTEIN) polarity select" "Active high,Active low" bitfld.long 0x04 0.--1. "MUTEN,AMUTE pin enable" "Disabled,Driven high,Driven low,?..." if (((d.l(ad:0x46400000+0x4C))&0x01)==0x01) group.long 0x4C++0x03 line.long 0x00 "DLBCTL,Digital Loopback Control Register" bitfld.long 0x00 2.--3. "MODE,Loopback generator mode" ",Transmit clock + sync generators,?..." bitfld.long 0x00 1. "ORD,Loopback order" "Odd to even,Even to odd" bitfld.long 0x00 0. "DLBEN,Loopback mode enable bit" "Disabled,Enabled" else group.long 0x4C++0x03 line.long 0x00 "DLBCTL,Digital Loopback Control Register" bitfld.long 0x00 2.--3. "MODE,Loopback generator mode" "Default,Transmit clock + sync generators,?..." bitfld.long 0x00 0. "DLBEN,Loopback mode enable" "Disabled,Enabled" endif if (((d.l(ad:0x46400000+0x44))&0xC0)==0x00) group.long 0x50++0x03 line.long 0x00 "DITCTL,DIT Mode Control Register" bitfld.long 0x00 3. "VB,Valid bit for odd time slots (DIT right subframe)" "0,1" bitfld.long 0x00 2. "VA,Valid bit for even time slots (DIT left subframe)" "0,1" bitfld.long 0x00 0. "DITEN,DIT mode enable bit" "Disabled,Enabled" else group.long 0x50++0x03 line.long 0x00 "DITCTL,DIT Mode Control Register" bitfld.long 0x00 3. "VB,Valid bit for odd time slots (DIT right subframe)" "0,1" bitfld.long 0x00 2. "VA,Valid bit for even time slots (DIT left subframe)" "0,1" rbitfld.long 0x00 0. "DITEN,DIT mode enable bit" "Disabled,Enabled" endif group.long 0x60++0x23 line.long 0x00 "RGBLCTL,Receiver Global Control Register" rbitfld.long 0x00 12. "XFRST,Transmit frame sync generator reset enable" "Disabled,Enabled" rbitfld.long 0x00 11. "XSMRST,Transmit state machine reset enable" "Disabled,Enabled" rbitfld.long 0x00 10. "XSRCLR,Transmit serializer clear enable" "Disabled,Enabled" newline rbitfld.long 0x00 9. "XHCLKRST,Transmit high-frequency clock divider reset enable" "Disabled,Enabled" rbitfld.long 0x00 8. "XCLKRST,Transmit clock divider reset enable" "Disabled,Enabled" bitfld.long 0x00 4. "RFRST,Receive frame sync generator reset enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "RSMRST,Receive state machine reset enable" "Disabled,Enabled" bitfld.long 0x00 2. "RSRCLR,Receive serializer clear enable" "Disabled,Enabled" bitfld.long 0x00 1. "RHCLKRST,Receive high-frequency clock divider reset enable" "Disabled,Enabled" newline bitfld.long 0x00 0. "RCLKRST,Receive clock divider reset enable" "Disabled,Enabled" line.long 0x04 "RMASK,Receive Format Unit Bit Mask Register" bitfld.long 0x04 31. "RMASK[31],Receive data mask 31 enable" "Disabled,Enabled" bitfld.long 0x04 30. "RMASK[30],Receive data mask 30 enable" "Disabled,Enabled" bitfld.long 0x04 29. "RMASK[29],Receive data mask 29 enable" "Disabled,Enabled" newline bitfld.long 0x04 28. "RMASK[28],Receive data mask 28 enable" "Disabled,Enabled" bitfld.long 0x04 27. "RMASK[27],Receive data mask enable" "Disabled,Enabled" bitfld.long 0x04 26. "RMASK[26],Receive data mask 26 enable" "Disabled,Enabled" newline bitfld.long 0x04 25. "RMASK[25],Receive data mask 25 enable" "Disabled,Enabled" bitfld.long 0x04 24. "RMASK[24],Receive data mask 24 enable" "Disabled,Enabled" bitfld.long 0x04 23. "RMASK[23],Receive data mask 23 enable" "Disabled,Enabled" newline bitfld.long 0x04 22. "RMASK[22],Receive data mask 22 enable" "Disabled,Enabled" bitfld.long 0x04 21. "RMASK[21],Receive data mask 21 enable" "Disabled,Enabled" bitfld.long 0x04 20. "RMASK[20],Receive data mask 20 enable" "Disabled,Enabled" newline bitfld.long 0x04 19. "RMASK[19],Receive data mask 19 enable" "Disabled,Enabled" bitfld.long 0x04 18. "RMASK[18],Receive data mask enable" "Disabled,Enabled" bitfld.long 0x04 17. "RMASK[17],Receive data mask 17 enable" "Disabled,Enabled" newline bitfld.long 0x04 16. "RMASK[16],Receive data mask 16 enable" "Disabled,Enabled" bitfld.long 0x04 15. "RMASK[15],Receive data mask enable" "Disabled,Enabled" bitfld.long 0x04 14. "RMASK[14],Receive data mask 14 enable" "Disabled,Enabled" newline bitfld.long 0x04 12. "RMASK[12],Receive data mask 12 enable" "Disabled,Enabled" bitfld.long 0x04 11. "RMASK[11],Receive data mask 11 enable" "Disabled,Enabled" bitfld.long 0x04 10. "RMASK[10],Receive data mask 10 enable" "Disabled,Enabled" newline bitfld.long 0x04 9. "RMASK[9],Receive data mask 9 enable" "Disabled,Enabled" bitfld.long 0x04 8. "RMASK[8],Receive data mask 8 enable" "Disabled,Enabled" bitfld.long 0x04 7. "RMASK[7],Receive data mask 7 enable" "Disabled,Enabled" newline bitfld.long 0x04 6. "RMASK[6],Receive data mask 6 enable" "Disabled,Enabled" bitfld.long 0x04 5. "RMASK[5],Receive data mask 5 enable" "Disabled,Enabled" bitfld.long 0x04 4. "RMASK[4],Receive data mask 4 enable" "Disabled,Enabled" newline bitfld.long 0x04 3. "RMASK[3],Receive data mask 3 enable" "Disabled,Enabled" bitfld.long 0x04 2. "RMASK[2],Receive data mask 2 enable" "Disabled,Enabled" bitfld.long 0x04 1. "RMASK[1],Receive data mask 1 enable" "Disabled,Enabled" newline bitfld.long 0x04 0. "RMASK[0],Receive data mask 0 enable" "Disabled,Enabled" line.long 0x08 "RFMT,Receive Bit Stream Format Register" bitfld.long 0x08 16.--17. "RDATDLY,Receive bit delay" "0 bit,1 bit,2 bit,?..." bitfld.long 0x08 15. "RRVRS,Receive serial bitstream order" "LSB,MSB" bitfld.long 0x08 13.--14. "RPAD,Pad value for extra bits in slot not belonging to the word" "0,1,RPBIT,?..." newline bitfld.long 0x08 8.--12. "RPBIT,Determines which bit is used to pad the extra bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 4.--7. "RSSZ,Receive slot size" ",,,8 bits,,12 bits,,16 bits,,20 bits,,24 bits,,28 bits,,32 bits" bitfld.long 0x08 3. "RBUSEL,Selects whether reads from serializer buffer XRBUF[n] originate from the configuration bus (CFG) or the data (DAT) port" "Data port,Configuration bus" newline bitfld.long 0x08 0.--2. "RROT,Right-rotation value for receive rotate right format unit" "No rotation,4,8,12,16,20,24,28" line.long 0x0C "AFSRCTL,Receive Frame Sync Control Register" hexmask.long.word 0x0C 7.--15. 1. "RMOD,Receive frame sync mode select" bitfld.long 0x0C 4. "FRWID,Receive frame sync width select" "Single bit,Single word" bitfld.long 0x0C 1. "FSRM,Receive frame sync generation select" "Externally,Internally" newline bitfld.long 0x0C 0. "FSRP,Receive frame sync polarity select" "Rising edge,Falling edge" line.long 0x10 "ACLKRCTL,Receive Clock Control Register" bitfld.long 0x10 7. "CLKRP,Receive bitstream clock polarity select bit" "Falling edge,Rising edge" bitfld.long 0x10 5. "CLKRM,Receive bit clock source bit" "External,Internal" bitfld.long 0x10 0.--4. "CLKRDIV,Receive bit clock divide ratio" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" line.long 0x14 "AHCLKRCTL,Receive High-Frequency Clock Control Register" bitfld.long 0x14 15. "HCLKRM,Receive high-frequency clock source" "External,Internal" bitfld.long 0x14 14. "HCLKRP,Receive bitstream high-frequency clock polarity select" "Not inverted,Inverted" hexmask.long.word 0x14 0.--11. 1. "HCLKRDIV,Receive high-frequency clock divide ratio" line.long 0x18 "RTDM,Receive TDM Time Slot 0-31 Register" bitfld.long 0x18 31. "RTDMS[31],Receiver mode during TDM time slot 31" "Inactive,Active" bitfld.long 0x18 30. "RTDMS[30],Receiver mode during TDM time slot 30" "Inactive,Active" bitfld.long 0x18 29. "RTDMS[29],Receiver mode during TDM time slot 29" "Inactive,Active" newline bitfld.long 0x18 28. "RTDMS[28],Receiver mode during TDM time slot 28" "Inactive,Active" bitfld.long 0x18 27. "RTDMS[27],Receiver mode during TDM time slot 27" "Inactive,Active" bitfld.long 0x18 26. "RTDMS[26],Receiver mode during TDM time slot 26" "Inactive,Active" newline bitfld.long 0x18 25. "RTDMS[25],Receiver mode during TDM time slot 25" "Inactive,Active" bitfld.long 0x18 24. "RTDMS[24],Receiver mode during TDM time slot 24" "Inactive,Active" bitfld.long 0x18 23. "RTDMS[23],Receiver mode during TDM time slot 23" "Inactive,Active" newline bitfld.long 0x18 22. "RTDMS[22],Receiver mode during TDM time slot 22" "Inactive,Active" bitfld.long 0x18 21. "RTDMS[21],Receiver mode during TDM time slot 21" "Inactive,Active" bitfld.long 0x18 20. "RTDMS[20],Receiver mode during TDM time slot 20" "Inactive,Active" newline bitfld.long 0x18 19. "RTDMS[19],Receiver mode during TDM time slot 19" "Inactive,Active" bitfld.long 0x18 18. "RTDMS[18],Receiver mode during TDM time slot 18" "Inactive,Active" bitfld.long 0x18 17. "RTDMS[17],Receiver mode during TDM time slot 17" "Inactive,Active" newline bitfld.long 0x18 16. "RTDMS[16],Receiver mode during TDM time slot 16" "Inactive,Active" bitfld.long 0x18 15. "RTDMS[15],Receiver mode during TDM time slot 15" "Inactive,Active" bitfld.long 0x18 14. "RTDMS[14],Receiver mode during TDM time slot 14" "Inactive,Active" newline bitfld.long 0x18 12. "RTDMS[12],Receiver mode during TDM time slot 12" "Inactive,Active" bitfld.long 0x18 11. "RTDMS[11],Receiver mode during TDM time slot 11" "Inactive,Active" bitfld.long 0x18 10. "RTDMS[10],Receiver mode during TDM time slot 10" "Inactive,Active" newline bitfld.long 0x18 9. "RTDMS[9],Receiver mode during TDM time slot 9" "Inactive,Active" bitfld.long 0x18 8. "RTDMS[8],Receiver mode during TDM time slot 8" "Inactive,Active" bitfld.long 0x18 7. "RTDMS[7],Receiver mode during TDM time slot 7" "Inactive,Active" newline bitfld.long 0x18 6. "RTDMS[6],Receiver mode during TDM time slot 6" "Inactive,Active" bitfld.long 0x18 5. "RTDMS[5],Receiver mode during TDM time slot 5" "Inactive,Active" bitfld.long 0x18 4. "RTDMS[4],Receiver mode during TDM time slot 4" "Inactive,Active" newline bitfld.long 0x18 3. "RTDMS[3],Receiver mode during TDM time slot 3" "Inactive,Active" bitfld.long 0x18 2. "RTDMS[2],Receiver mode during TDM time slot 2" "Inactive,Active" bitfld.long 0x18 1. "RTDMS[1],Receiver mode during TDM time slot 1" "Inactive,Active" newline bitfld.long 0x18 0. "RTDMS[0],Receiver mode during TDM time slot 0" "Inactive,Active" line.long 0x1C "RINTCTL,Receiver Interrupt Control Register" bitfld.long 0x1C 7. "RSTAFRM,Receive start of frame interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 5. "RDATA,Receive data ready interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 4. "RLAST,Receive last slot interrupt enable" "Disabled,Enabled" newline bitfld.long 0x1C 3. "RDMAERR,Receive DMA error interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 2. "RCKFAIL,Receive clock failure interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 1. "RSYNCERR,Unexpected receive frame sync interrupt enable" "Disabled,Enabled" newline bitfld.long 0x1C 0. "ROVRN,Receiver overrun interrupt enable" "Disabled,Enabled" line.long 0x20 "RSTAT,Receiver Status Register" bitfld.long 0x20 8. "RERR,Receiver error flag" "Not occured,Occured" bitfld.long 0x20 7. "RDMAERR,Receive DMA error flag" "Not occured,Occured" bitfld.long 0x20 6. "RSTAFRM,Receive start of frame flag" "Not received,Received" newline bitfld.long 0x20 5. "RDATA,Receive data ready flag" "Not received,Received" bitfld.long 0x20 4. "RLAST,Receive last slot flag" "Not received,Received" bitfld.long 0x20 3. "RTDMSLOT,Returns the LSB of RSLOT" "Odd,Even" newline bitfld.long 0x20 2. "RCKFAIL,Receive clock failure flag" "Not received,Received" bitfld.long 0x20 1. "RSYNCERR,Unexpected receive frame sync flag" "Not occured,Occured" bitfld.long 0x20 0. "ROVRN,Receiver overrun flag" "No overrun,Overrun" rgroup.long 0x84++0x03 line.long 0x00 "RSLOT,Current Receive TDM Time Slot Register" hexmask.long.word 0x00 0.--8. 1. "RSLOTCNT,Current receive time slot count" group.long 0x88++0x07 line.long 0x00 "RCLKCHK,Receive Clock Check Control Register" hexmask.long.byte 0x00 24.--31. 1. "RCNT,Receive clock count value (from previous measurement)" hexmask.long.byte 0x00 16.--23. 1. "RMAX,Receive clock maximum boundary" hexmask.long.byte 0x00 8.--15. 1. "RMIN,Receive clock minimum boundary" newline bitfld.long 0x00 0.--3. "RPS,Receive clock check prescaler value" "/1,/2,/4,/8,/16,/32,/64,/128,/256,?..." line.long 0x04 "REVTCTL,Receiver DMA Event Control Register" bitfld.long 0x04 0. "RDATDMA,Receive data DMA request enable bit" "Enabled,?..." group.long 0xA0++0x23 line.long 0x00 "XGBLCTL,Transmitter Global Control Register" bitfld.long 0x00 12. "XFRST,Transmit frame sync generator reset enable" "Disabled,Enabled" bitfld.long 0x00 11. "XSMRST,Transmit state machine reset enable" "Disabled,Enabled" bitfld.long 0x00 10. "XSRCLR,Transmit serializer clear enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "XHCLKRST,Transmit high-frequency clock divider reset enable" "Disabled,Enabled" bitfld.long 0x00 8. "XCLKRST,Transmit clock divider reset enable" "Disabled,Enabled" rbitfld.long 0x00 4. "RFRST,Receive frame sync generator reset enable" "Disabled,Enabled" newline rbitfld.long 0x00 3. "RSMRST,Receive state machine reset enable" "Disabled,Enabled" rbitfld.long 0x00 2. "RSRCLR,Receive serializer clear enable" "Disabled,Enabled" rbitfld.long 0x00 1. "RHCLKRST,Receive high-frequency clock divider reset enable" "Disabled,Enabled" newline rbitfld.long 0x00 0. "RCLKRST,Receive clock divider reset enable" "Disabled,Enabled" line.long 0x04 "XMASK,Transmit Format Unit Bit Mask Register" bitfld.long 0x04 31. "XMASK[31],Transmit data mask 31 disable" "No,Yes" bitfld.long 0x04 30. "XMASK[30],Transmit data mask 30 disable" "No,Yes" bitfld.long 0x04 29. "XMASK[29],Transmit data mask 29 disable" "No,Yes" newline bitfld.long 0x04 28. "XMASK[28],Transmit data mask 28 disable" "No,Yes" bitfld.long 0x04 27. "XMASK[27],Transmit data mask 27 disable" "No,Yes" bitfld.long 0x04 26. "XMASK[26],Transmit data mask 26 disable" "No,Yes" newline bitfld.long 0x04 25. "XMASK[25],Transmit data mask 25 disable" "No,Yes" bitfld.long 0x04 24. "XMASK[24],Transmit data mask 24 disable" "No,Yes" bitfld.long 0x04 23. "XMASK[23],Transmit data mask 23 disable" "No,Yes" newline bitfld.long 0x04 22. "XMASK[22],Transmit data mask 22 disable" "No,Yes" bitfld.long 0x04 21. "XMASK[21],Transmit data mask 21 disable" "No,Yes" bitfld.long 0x04 20. "XMASK[20],Transmit data mask 20 disable" "No,Yes" newline bitfld.long 0x04 19. "XMASK[19],Transmit data mask 19 disable" "No,Yes" bitfld.long 0x04 18. "XMASK[18],Transmit data mask 18 disable" "No,Yes" bitfld.long 0x04 17. "XMASK[17],Transmit data mask 17 disable" "No,Yes" newline bitfld.long 0x04 16. "XMASK[16],Transmit data mask 16 disable" "No,Yes" bitfld.long 0x04 15. "XMASK[15],Transmit data mask 15 disable" "No,Yes" bitfld.long 0x04 14. "XMASK[14],Transmit data mask 14 disable" "No,Yes" newline bitfld.long 0x04 12. "XMASK[12],Transmit data mask 12 disable" "No,Yes" bitfld.long 0x04 11. "XMASK[11],Transmit data mask 11 disable" "No,Yes" bitfld.long 0x04 10. "XMASK[10],Transmit data mask 10 disable" "No,Yes" newline bitfld.long 0x04 9. "XMASK[9],Transmit data mask 9 disable" "No,Yes" bitfld.long 0x04 8. "XMASK[8],Transmit data mask 8 disable" "No,Yes" bitfld.long 0x04 7. "XMASK[7],Transmit data mask 7 disable" "No,Yes" newline bitfld.long 0x04 6. "XMASK[6],Transmit data mask 6 disable" "No,Yes" bitfld.long 0x04 5. "XMASK[5],Transmit data mask 5 disable" "No,Yes" bitfld.long 0x04 4. "XMASK[4],Transmit data mask 4 disable" "No,Yes" newline bitfld.long 0x04 3. "XMASK[3],Transmit data mask 3 disable" "No,Yes" bitfld.long 0x04 2. "XMASK[2],Transmit data mask 2 disable" "No,Yes" bitfld.long 0x04 1. "XMASK[1],Transmit data mask 1 disable" "No,Yes" newline bitfld.long 0x04 0. "XMASK[0],Transmit data mask 0 disable" "No,Yes" line.long 0x08 "XFMT,Transmit Bit Stream Format Register" bitfld.long 0x08 16.--17. "XDATDLY,Transmit sync bit delay" "0 bit,1 bit,2 bit,?..." bitfld.long 0x08 15. "XRVRS,Transmit serial bitstream order" "LSB,MSB" bitfld.long 0x08 13.--14. "XPAD,Pad value for extra bits in slot not belonging to the word" "0,1,XPBIT,?..." newline bitfld.long 0x08 8.--12. "XPBIT,Determines which bit is used to pad the extra bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 4.--7. "XSSZ,Transmit slot size" ",,,8 bits,,12 bits,,16 bits,,20 bits,,24 bits,,28 bits,,32 bits" bitfld.long 0x08 3. "XBUSEL,Selects whether reads from serializer buffer XRBUF[n] originate from the configuration bus (CFG) or the data (DAT) port" "Data port,Configuration bus" newline bitfld.long 0x08 0.--2. "XROT,Right-rotation value for rransmit rotate right format unit" "No rotation,4,8,12,16,20,24,28" line.long 0x0C "AFSXCTL,Transmit Frame Sync Control Register" hexmask.long.word 0x0C 7.--15. 1. "XMOD,Transmit frame sync mode select" bitfld.long 0x0C 4. "FXWID,Transmit frame sync width" "Single bit,Single word" bitfld.long 0x0C 1. "FSXM,Transmit frame sync generation select" "External,Internal" newline bitfld.long 0x0C 0. "FSXP,Transmit frame sync polarity select" "Falling edge,Rising edge" line.long 0x10 "ACLKXCTL,Transmit Clock Control Register" bitfld.long 0x10 7. "CLKXP,Transmit bitstream clock polarity select" "Falling edge,Rising edge" bitfld.long 0x10 6. "ASYNC,Transmit/receive operation asynchronous" "Synchronous,Asynchronous" bitfld.long 0x10 5. "CLKXM,Transmit bit clock source" "External,Internal" newline bitfld.long 0x10 0.--4. "CLKXDIV,Transmit bit clock divide ratio" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" line.long 0x14 "AHCLKXCTL,Transmit High-Frequency Clock Control Register" bitfld.long 0x14 15. "HCLKXM,Transmit high-frequency clock source" "External,Internal" bitfld.long 0x14 14. "HCLKXP,Transmit bitstream high-frequency clock polarity select" "Not inverted,Inverted" hexmask.long.word 0x14 0.--11. 1. "HCLKXDIV,Transmit high-frequency clock divide ratio" line.long 0x18 "XTDM,Transmit TDM Time Slot 0-31 Register" bitfld.long 0x18 31. "XTDMS[31],Transmitter mode during TDM time slot 31" "Inactive,Active" bitfld.long 0x18 30. "XTDMS[30],Transmitter mode during TDM time slot 30" "Inactive,Active" bitfld.long 0x18 29. "XTDMS[29],Transmitter mode during TDM time slot 29" "Inactive,Active" newline bitfld.long 0x18 28. "XTDMS[28],Transmitter mode during TDM time slot 28" "Inactive,Active" bitfld.long 0x18 27. "XTDMS[27],Transmitter mode during TDM time slot 27" "Inactive,Active" bitfld.long 0x18 26. "XTDMS[26],Transmitter mode during TDM time slot 26" "Inactive,Active" newline bitfld.long 0x18 25. "XTDMS[25],Transmitter mode during TDM time slot 25" "Inactive,Active" bitfld.long 0x18 24. "XTDMS[24],Transmitter mode during TDM time slot 24" "Inactive,Active" bitfld.long 0x18 23. "XTDMS[23],Transmitter mode during TDM time slot 23" "Inactive,Active" newline bitfld.long 0x18 22. "XTDMS[22],Transmitter mode during TDM time slot 22" "Inactive,Active" bitfld.long 0x18 21. "XTDMS[21],Transmitter mode during TDM time slot 21" "Inactive,Active" bitfld.long 0x18 20. "XTDMS[20],Transmitter mode during TDM time slot 20" "Inactive,Active" newline bitfld.long 0x18 19. "XTDMS[19],Transmitter mode during TDM time slot 19" "Inactive,Active" bitfld.long 0x18 18. "XTDMS[18],Transmitter mode during TDM time slot 18" "Inactive,Active" bitfld.long 0x18 17. "XTDMS[17],Transmitter mode during TDM time slot 17" "Inactive,Active" newline bitfld.long 0x18 16. "XTDMS[16],Transmitter mode during TDM time slot 16" "Inactive,Active" bitfld.long 0x18 15. "XTDMS[15],Transmitter mode during TDM time slot 15" "Inactive,Active" bitfld.long 0x18 14. "XTDMS[14],Transmitter mode during TDM time slot 14" "Inactive,Active" newline bitfld.long 0x18 12. "XTDMS[12],Transmitter mode during TDM time slot 12" "Inactive,Active" bitfld.long 0x18 11. "XTDMS[11],Transmitter mode during TDM time slot 11" "Inactive,Active" bitfld.long 0x18 10. "XTDMS[10],Transmitter mode during TDM time slot 10" "Inactive,Active" newline bitfld.long 0x18 9. "XTDMS[9],Transmitter mode during TDM time slot 9" "Inactive,Active" bitfld.long 0x18 8. "XTDMS[8],Transmitter mode during TDM time slot 8" "Inactive,Active" bitfld.long 0x18 7. "XTDMS[7],Transmitter mode during TDM time slot 7" "Inactive,Active" newline bitfld.long 0x18 6. "XTDMS[6],Transmitter mode during TDM time slot 6" "Inactive,Active" bitfld.long 0x18 5. "XTDMS[5],Transmitter mode during TDM time slot 5" "Inactive,Active" bitfld.long 0x18 4. "XTDMS[4],Transmitter mode during TDM time slot 4" "Inactive,Active" newline bitfld.long 0x18 3. "XTDMS[3],Transmitter mode during TDM time slot 3" "Inactive,Active" bitfld.long 0x18 2. "XTDMS[2],Transmitter mode during TDM time slot 2" "Inactive,Active" bitfld.long 0x18 1. "XTDMS[1],Transmitter mode during TDM time slot 1" "Inactive,Active" newline bitfld.long 0x18 0. "XTDMS[0],Transmitter mode during TDM time slot 0" "Inactive,Active" line.long 0x1C "XINTCTL,Transmitter Interrupt Control Register" bitfld.long 0x1C 7. "XSTAFRM,Transmit start of frame interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 5. "XDATA,Transmit data ready interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 4. "XLAST,Transmit last slot interrupt enable" "Disabled,Enabled" newline bitfld.long 0x1C 3. "XDMAERR,Transmit DMA error interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 2. "XCKFAIL,Transmit clock failure interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 1. "XSYNCERR,Unexpected transmit frame sync interrupt enable" "Disabled,Enabled" newline bitfld.long 0x1C 0. "XUNDRN,Transmit overrun interrupt enable" "Disabled,Enabled" line.long 0x20 "XSTAT,Transmitter Status Register" bitfld.long 0x20 8. "XERR,Transmit error flag" "Not occured,Occured" bitfld.long 0x20 7. "XDMAERR,Transmit DMA error flag" "Not occured,Occured" bitfld.long 0x20 6. "XSTAFRM,Transmit start of frame flag" "Not detected,Detected" newline bitfld.long 0x20 5. "XDATA,Transmit data ready flag" "Not ready,Ready" bitfld.long 0x20 4. "XLAST,Transmit last slot flag" "Not last,Last" bitfld.long 0x20 3. "XTDMSLOT,Returns the LSB of RSLOT" "Odd,Even" newline bitfld.long 0x20 2. "XCKFAIL,Transmit clock failure flag" "Not occured,Occured" bitfld.long 0x20 1. "XSYNCERR,Unexpected transmit frame sync flag" "Not occured,Occured" bitfld.long 0x20 0. "XUNDRN,Transmit underrun flag" "Not occured,Occured" rgroup.long 0xC4++0x03 line.long 0x00 "XSLOT,Current Transmit TDM Time Slot Register" hexmask.long.word 0x00 0.--9. 1. "XSLOTCNT,Current transmit time slot count" group.long 0xC8++0x07 line.long 0x00 "XCLKCHK,Transmit Clock Check Control Register" hexmask.long.byte 0x00 24.--31. 1. "XCNT,Transmit clock count value (from previous measurement)" hexmask.long.byte 0x00 16.--23. 1. "XMAX,Transmit clock maximum boundary" hexmask.long.byte 0x00 8.--15. 1. "XMIN,Transmit clock minimum boundary" newline bitfld.long 0x00 0.--3. "XPS,Transmit clock check prescaler value" "/1,/2,/4,/8,/16,/32,/64,/128,/256,?..." line.long 0x04 "XEVTCTL,Transmitter DMA Event Control Register" bitfld.long 0x04 0. "XDATDMA,Transmit data DMA request enable bit" "Enabled,?..." group.long 0x100++0x03 line.long 0x00 "DITCSRA_0,Left (Even TDM Time Slot) Channel Status Register" group.long (0x100+0x18)++0x03 line.long 0x00 "DITCSRB_0,Right (Odd TDM Time Slot) Channel Status Register" group.long (0x100+0x30)++0x03 line.long 0x00 "DITUDRA_0,Left (Even TDM Time Slot) Channel User Data Register" group.long (0x100+0x48)++0x03 line.long 0x00 "DITUDRB_0,Right (Odd TDM Time Slot) Channel User Data Register" group.long (0x100+0x80)++0x03 line.long 0x00 "SRCTL_0,Serializer Control Register" rbitfld.long 0x00 5. "RRDY,Receive buffer ready" "Empty,Not empty" rbitfld.long 0x00 4. "XRDY,Transmit buffer ready" "Not empty,Empty" bitfld.long 0x00 2.--3. "DISMOD,Serializer pin drive mode" "3-state,,Low,high" newline bitfld.long 0x00 0.--1. "SRMOD,Serializer mode" "Inactive,Transmitter,Receiver,?..." group.long (0x100+0x100)++0x03 line.long 0x00 "XBUF0,Transmit Buffer Register for Serializers" group.long (0x100+0x180)++0x03 line.long 0x00 "RBUF0,Transmit Receive Register for Serializers" group.long 0x104++0x03 line.long 0x00 "DITCSRA_1,Left (Even TDM Time Slot) Channel Status Register" group.long (0x104+0x18)++0x03 line.long 0x00 "DITCSRB_1,Right (Odd TDM Time Slot) Channel Status Register" group.long (0x104+0x30)++0x03 line.long 0x00 "DITUDRA_1,Left (Even TDM Time Slot) Channel User Data Register" group.long (0x104+0x48)++0x03 line.long 0x00 "DITUDRB_1,Right (Odd TDM Time Slot) Channel User Data Register" group.long (0x104+0x80)++0x03 line.long 0x00 "SRCTL_1,Serializer Control Register" rbitfld.long 0x00 5. "RRDY,Receive buffer ready" "Empty,Not empty" rbitfld.long 0x00 4. "XRDY,Transmit buffer ready" "Not empty,Empty" bitfld.long 0x00 2.--3. "DISMOD,Serializer pin drive mode" "3-state,,Low,high" newline bitfld.long 0x00 0.--1. "SRMOD,Serializer mode" "Inactive,Transmitter,Receiver,?..." group.long (0x104+0x100)++0x03 line.long 0x00 "XBUF1,Transmit Buffer Register for Serializers" group.long (0x104+0x180)++0x03 line.long 0x00 "RBUF1,Transmit Receive Register for Serializers" group.long 0x108++0x03 line.long 0x00 "DITCSRA_2,Left (Even TDM Time Slot) Channel Status Register" group.long (0x108+0x18)++0x03 line.long 0x00 "DITCSRB_2,Right (Odd TDM Time Slot) Channel Status Register" group.long (0x108+0x30)++0x03 line.long 0x00 "DITUDRA_2,Left (Even TDM Time Slot) Channel User Data Register" group.long (0x108+0x48)++0x03 line.long 0x00 "DITUDRB_2,Right (Odd TDM Time Slot) Channel User Data Register" group.long (0x108+0x80)++0x03 line.long 0x00 "SRCTL_2,Serializer Control Register" rbitfld.long 0x00 5. "RRDY,Receive buffer ready" "Empty,Not empty" rbitfld.long 0x00 4. "XRDY,Transmit buffer ready" "Not empty,Empty" bitfld.long 0x00 2.--3. "DISMOD,Serializer pin drive mode" "3-state,,Low,high" newline bitfld.long 0x00 0.--1. "SRMOD,Serializer mode" "Inactive,Transmitter,Receiver,?..." group.long (0x108+0x100)++0x03 line.long 0x00 "XBUF2,Transmit Buffer Register for Serializers" group.long (0x108+0x180)++0x03 line.long 0x00 "RBUF2,Transmit Receive Register for Serializers" group.long 0x10C++0x03 line.long 0x00 "DITCSRA_3,Left (Even TDM Time Slot) Channel Status Register" group.long (0x10C+0x18)++0x03 line.long 0x00 "DITCSRB_3,Right (Odd TDM Time Slot) Channel Status Register" group.long (0x10C+0x30)++0x03 line.long 0x00 "DITUDRA_3,Left (Even TDM Time Slot) Channel User Data Register" group.long (0x10C+0x48)++0x03 line.long 0x00 "DITUDRB_3,Right (Odd TDM Time Slot) Channel User Data Register" group.long (0x10C+0x80)++0x03 line.long 0x00 "SRCTL_3,Serializer Control Register" rbitfld.long 0x00 5. "RRDY,Receive buffer ready" "Empty,Not empty" rbitfld.long 0x00 4. "XRDY,Transmit buffer ready" "Not empty,Empty" bitfld.long 0x00 2.--3. "DISMOD,Serializer pin drive mode" "3-state,,Low,high" newline bitfld.long 0x00 0.--1. "SRMOD,Serializer mode" "Inactive,Transmitter,Receiver,?..." group.long (0x10C+0x100)++0x03 line.long 0x00 "XBUF3,Transmit Buffer Register for Serializers" group.long (0x10C+0x180)++0x03 line.long 0x00 "RBUF3,Transmit Receive Register for Serializers" group.long 0x110++0x03 line.long 0x00 "DITCSRA_4,Left (Even TDM Time Slot) Channel Status Register" group.long (0x110+0x18)++0x03 line.long 0x00 "DITCSRB_4,Right (Odd TDM Time Slot) Channel Status Register" group.long (0x110+0x30)++0x03 line.long 0x00 "DITUDRA_4,Left (Even TDM Time Slot) Channel User Data Register" group.long (0x110+0x48)++0x03 line.long 0x00 "DITUDRB_4,Right (Odd TDM Time Slot) Channel User Data Register" group.long (0x110+0x80)++0x03 line.long 0x00 "SRCTL_4,Serializer Control Register" rbitfld.long 0x00 5. "RRDY,Receive buffer ready" "Empty,Not empty" rbitfld.long 0x00 4. "XRDY,Transmit buffer ready" "Not empty,Empty" bitfld.long 0x00 2.--3. "DISMOD,Serializer pin drive mode" "3-state,,Low,high" newline bitfld.long 0x00 0.--1. "SRMOD,Serializer mode" "Inactive,Transmitter,Receiver,?..." group.long (0x110+0x100)++0x03 line.long 0x00 "XBUF4,Transmit Buffer Register for Serializers" group.long (0x110+0x180)++0x03 line.long 0x00 "RBUF4,Transmit Receive Register for Serializers" group.long 0x114++0x03 line.long 0x00 "DITCSRA_5,Left (Even TDM Time Slot) Channel Status Register" group.long (0x114+0x18)++0x03 line.long 0x00 "DITCSRB_5,Right (Odd TDM Time Slot) Channel Status Register" group.long (0x114+0x30)++0x03 line.long 0x00 "DITUDRA_5,Left (Even TDM Time Slot) Channel User Data Register" group.long (0x114+0x48)++0x03 line.long 0x00 "DITUDRB_5,Right (Odd TDM Time Slot) Channel User Data Register" group.long (0x114+0x80)++0x03 line.long 0x00 "SRCTL_5,Serializer Control Register" rbitfld.long 0x00 5. "RRDY,Receive buffer ready" "Empty,Not empty" rbitfld.long 0x00 4. "XRDY,Transmit buffer ready" "Not empty,Empty" bitfld.long 0x00 2.--3. "DISMOD,Serializer pin drive mode" "3-state,,Low,high" newline bitfld.long 0x00 0.--1. "SRMOD,Serializer mode" "Inactive,Transmitter,Receiver,?..." group.long (0x114+0x100)++0x03 line.long 0x00 "XBUF5,Transmit Buffer Register for Serializers" group.long (0x114+0x180)++0x03 line.long 0x00 "RBUF5,Transmit Receive Register for Serializers" group.long 0x1000++0x03 line.long 0x00 "WFIFOCTL,Write FIFO Control Register" bitfld.long 0x00 16. "WENA,Write FIFO enable" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. "WNUMEVT,Write word count per DMA event" hexmask.long.byte 0x00 0.--7. 1. "WNUMDMA,Write word count per transfer" rgroup.long 0x1004++0x03 line.long 0x00 "WFIFOSTS,Write FIFO Status Register" hexmask.long.byte 0x00 0.--7. 1. "WLVL,Write level" group.long 0x100C++0x03 line.long 0x00 "RFIFOCTL,Read FIFO Control Register" bitfld.long 0x00 16. "RENA,Read FIFO enable" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. "RNUMEVT,Read word count per DMA event" hexmask.long.byte 0x00 0.--7. 1. "RNUMDMA,Read word count per transfer" rgroup.long 0x1004++0x03 line.long 0x00 "RFIFOSTS,Read FIFO Status Register" hexmask.long.byte 0x00 0.--7. 1. "RLVL,Read level" tree.end tree.end sif !cpuis("AM3351-CM3") tree "DCAN (Controller Area Network)" tree "DCAN0" base ad:0x481CC000 group.long 0x00++0x03 line.long 0x00 "CTL,CAN Control Register" bitfld.long 0x00 25. "WUBA,Automatic wake up on bus activity" "No wake up,Wake up" bitfld.long 0x00 24. "PDR,Request for local low power-down mode" "Not requested,Requested" bitfld.long 0x00 20. "DE3,DMA enable for IF3" "Disabled,Enabled" newline bitfld.long 0x00 19. "DE2,DMA enable for IF2" "Disabled,Enabled" bitfld.long 0x00 18. "DE1,DMA enable for IF1" "Disabled,Enabled" bitfld.long 0x00 17. "IE1,DCAN1INT interrupt enable" "Disabled,Enabled" newline rbitfld.long 0x00 16. "INITDBG,Internal init state while debug access" "Not entered,Entered" bitfld.long 0x00 15. "SWR,SW reset enable" "Disabled,Enabled" bitfld.long 0x00 10.--13. "PMD,Parity on/off" "Enabled,Enabled,Enabled,Enabled,Enabled,Disabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled" newline bitfld.long 0x00 9. "ABO,Auto bus on enable" "Disabled,Enabled" bitfld.long 0x00 8. "IDS,Interruption debug support enable" "Disabled,Enabled" bitfld.long 0x00 7. "TEST,Test mode enable" "Disabled,Enabled" newline bitfld.long 0x00 6. "CCE,Configuration change enable" "Disabled,Enabled" bitfld.long 0x00 5. "DAR,Disable automatic retransmission" "Enabled,Disabled" bitfld.long 0x00 3. "EIE,Error interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 2. "SIE,Status interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. "IE0,Interrupt line 0 enable" "Disabled,Enabled" bitfld.long 0x00 0. "INIT,Initialization" "Normal,Initialization" hgroup.long 0x04++0x03 hide.long 0x00 "ES,Error And Status Register" in rgroup.long 0x08++0x03 line.long 0x00 "ERRC,Error Counter Register" bitfld.long 0x00 15. "RP,Receive error passive" "No error,Error" hexmask.long.byte 0x00 8.--14. 1. "REC[6:0],Receive error counter" hexmask.long.byte 0x00 0.--7. 1. "TEC[7:0],Transmit error counter" if (((d.l(ad:0x481CC000))&0x41)==0x41) group.long 0x0C++0x03 line.long 0x00 "BTR,Bit Timing Register" rbitfld.long 0x00 16.--19. "BRPE,Baud rate prescaler extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--14. "TSEG2,The time segment after the sample point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--11. "TSEG1,The time segment before the sample point" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 6.--7. "SJW,Synchronization jump width" "0,1,2,3" bitfld.long 0x00 0.--5. "BRP,Baud rate prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else rgroup.long 0x0C++0x03 line.long 0x00 "BTR,Bit Timing Register" bitfld.long 0x00 16.--19. "BRPE,Baud rate prescaler extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--14. "TSEG2,The time segment after the sample point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--11. "TSEG1,The time segment before the sample point" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 6.--7. "SJW,Synchronization jump width" "0,1,2,3" bitfld.long 0x00 0.--5. "BRP,Baud rate prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif rgroup.long 0x10++0x03 line.long 0x00 "INT,Interrupt Register" hexmask.long.byte 0x00 16.--23. 1. "INT1ID[23:16],Interrupt 1 identifier" hexmask.long.word 0x00 0.--15. 1. "INT0ID[15:0],Interrupt identifier" if (((d.l(ad:0x481CC000))&0x80)==0x80) group.long 0x14++0x03 line.long 0x00 "TEST,Test Register" bitfld.long 0x00 9. "RDA,RAM direct access enable" "Normal,Direct access" bitfld.long 0x00 8. "EXL,External loop back mode" "Disabled,Enabled" rbitfld.long 0x00 7. "RX,Receive pin" "Dominant,Recessive" newline bitfld.long 0x00 5.--6. "TX[1:0],Control of CAN_TX pin" "Normal,Monitored,Dominant,Recessive" bitfld.long 0x00 4. "LBACK,Loop back mode" "Disabled,Enabled" bitfld.long 0x00 3. "SILENT,Silent mode" "Disabled,Enabled" else rgroup.long 0x14++0x03 line.long 0x00 "TEST,Test Register" bitfld.long 0x00 9. "RDA,RAM direct access enable" "Normal,Direct access" bitfld.long 0x00 8. "EXL,External loop back mode" "Disabled,Enabled" bitfld.long 0x00 7. "RX,Receive pin" "Dominant,Recessive" newline bitfld.long 0x00 5.--6. "TX[1:0],Control of CAN_TX pin" "Normal,Monitored,Dominant,Recessive" bitfld.long 0x00 4. "LBACK,Loop back mode" "Disabled,Enabled" bitfld.long 0x00 3. "SILENT,Silent mode" "Disabled,Enabled" endif rgroup.long 0x1C++0x03 line.long 0x00 "PERR,Parity Error Code Register" bitfld.long 0x00 8.--10. "WORD_NUMBER,Word number" ",1,2,3,4,5,?..." hexmask.long.byte 0x00 0.--7. 1. "MESSAGE_NUMBER,Message number" group.long 0x80++0x03 line.long 0x00 "ABOTR,Auto Bus On Time Register" rgroup.long 0x84++0x4F line.long 0x00 "TXRQX,Transmission Request X Register" bitfld.long 0x00 14.--15. "TXRQSTREG8,Transmission request X 8" "0,1,2,3" bitfld.long 0x00 12.--13. "TXRQSTREG7,Transmission request X 7" "0,1,2,3" bitfld.long 0x00 10.--11. "TXRQSTREG6,Transmission request X 6" "0,1,2,3" newline bitfld.long 0x00 8.--9. "TXRQSTREG5,Transmission request X 5" "0,1,2,3" bitfld.long 0x00 6.--7. "TXRQSTREG4,Transmission request X 4" "0,1,2,3" bitfld.long 0x00 4.--5. "TXRQSTREG3,Transmission request X 3" "0,1,2,3" newline bitfld.long 0x00 2.--3. "TXRQSTREG2,Transmission request X 2" "0,1,2,3" bitfld.long 0x00 0.--1. "TXRQSTREG1,Transmission request X 1" "0,1,2,3" line.long 0x04 "TXRQ12,Transmission Request Register 12" bitfld.long 0x04 31. "TXRQS[32],Transmission request bit 32" "Not requested,Requested" bitfld.long 0x04 30. "TXRQS[31],Transmission request bit 31" "Not requested,Requested" bitfld.long 0x04 29. "TXRQS[30],Transmission request bit 30" "Not requested,Requested" newline bitfld.long 0x04 28. "TXRQS[29],Transmission request bit 29" "Not requested,Requested" bitfld.long 0x04 27. "TXRQS[28],Transmission request bit 28" "Not requested,Requested" bitfld.long 0x04 26. "TXRQS[27],Transmission request bit 27" "Not requested,Requested" newline bitfld.long 0x04 25. "TXRQS[26],Transmission request bit 26" "Not requested,Requested" bitfld.long 0x04 24. "TXRQS[25],Transmission request bit 25" "Not requested,Requested" bitfld.long 0x04 23. "TXRQS[24],Transmission request bit 24" "Not requested,Requested" newline bitfld.long 0x04 22. "TXRQS[23],Transmission request bit 23" "Not requested,Requested" bitfld.long 0x04 21. "TXRQS[22],Transmission request bit 22" "Not requested,Requested" bitfld.long 0x04 20. "TXRQS[21],Transmission request bit 21" "Not requested,Requested" newline bitfld.long 0x04 19. "TXRQS[20],Transmission request bit 20" "Not requested,Requested" bitfld.long 0x04 18. "TXRQS[19],Transmission request bit 19" "Not requested,Requested" bitfld.long 0x04 17. "TXRQS[18],Transmission request bit 18" "Not requested,Requested" newline bitfld.long 0x04 16. "TXRQS[17],Transmission request bit 17" "Not requested,Requested" bitfld.long 0x04 15. "TXRQS[16],Transmission request bit 16" "Not requested,Requested" bitfld.long 0x04 14. "TXRQS[15],Transmission request bit 15" "Not requested,Requested" newline bitfld.long 0x04 13. "TXRQS[14],Transmission request bit 14" "Not requested,Requested" bitfld.long 0x04 12. "TXRQS[13],Transmission request bit 13" "Not requested,Requested" bitfld.long 0x04 11. "TXRQS[12],Transmission request bit 12" "Not requested,Requested" newline bitfld.long 0x04 10. "TXRQS[11],Transmission request bit 11" "Not requested,Requested" bitfld.long 0x04 9. "TXRQS[10],Transmission request bit 10" "Not requested,Requested" bitfld.long 0x04 8. "TXRQS[9],Transmission request bit 9" "Not requested,Requested" newline bitfld.long 0x04 7. "TXRQS[8],Transmission request bit 8" "Not requested,Requested" bitfld.long 0x04 6. "TXRQS[7],Transmission request bit 7" "Not requested,Requested" bitfld.long 0x04 5. "TXRQS[6],Transmission request bit 6" "Not requested,Requested" newline bitfld.long 0x04 4. "TXRQS[5],Transmission request bit 5" "Not requested,Requested" bitfld.long 0x04 3. "TXRQS[4],Transmission request bit 4" "Not requested,Requested" bitfld.long 0x04 2. "TXRQS[3],Transmission request bit 3" "Not requested,Requested" newline bitfld.long 0x04 1. "TXRQS[2],Transmission request bit 2" "Not requested,Requested" bitfld.long 0x04 0. "TXRQS[1],Transmission request bit 1" "Not requested,Requested" line.long 0x08 "TXRQ34,Transmission Request Register 34" bitfld.long 0x08 31. "TXRQS64,Transmission request bit 64" "Not requested,Requested" bitfld.long 0x08 30. "TXRQS[63],Transmission request bit 63" "Not requested,Requested" bitfld.long 0x08 29. "TXRQS[62],Transmission request bit 62" "Not requested,Requested" newline bitfld.long 0x08 28. "TXRQS[61],Transmission request bit 61" "Not requested,Requested" bitfld.long 0x08 27. "TXRQS[60],Transmission request bit 60" "Not requested,Requested" bitfld.long 0x08 26. "TXRQS[59],Transmission request bit 59" "Not requested,Requested" newline bitfld.long 0x08 25. "TXRQS[58],Transmission request bit 58" "Not requested,Requested" bitfld.long 0x08 24. "TXRQS[57],Transmission request bit 57" "Not requested,Requested" bitfld.long 0x08 23. "TXRQS[56],Transmission request bit 56" "Not requested,Requested" newline bitfld.long 0x08 22. "TXRQS[55],Transmission request bit 55" "Not requested,Requested" bitfld.long 0x08 21. "TXRQS[54],Transmission request bit 54" "Not requested,Requested" bitfld.long 0x08 20. "TXRQS[53],Transmission request bit 53" "Not requested,Requested" newline bitfld.long 0x08 19. "TXRQS[52],Transmission request bit 52" "Not requested,Requested" bitfld.long 0x08 18. "TXRQS[51],Transmission request bit 51" "Not requested,Requested" bitfld.long 0x08 17. "TXRQS[50],Transmission request bit 50" "Not requested,Requested" newline bitfld.long 0x08 16. "TXRQS[49],Transmission request bit 49" "Not requested,Requested" bitfld.long 0x08 15. "TXRQS[48],Transmission request bit 48" "Not requested,Requested" bitfld.long 0x08 14. "TXRQS[47],Transmission request bit 47" "Not requested,Requested" newline bitfld.long 0x08 13. "TXRQS[46],Transmission request bit 46" "Not requested,Requested" bitfld.long 0x08 12. "TXRQS[45],Transmission request bit 45" "Not requested,Requested" bitfld.long 0x08 11. "TXRQS[44],Transmission request bit 44" "Not requested,Requested" newline bitfld.long 0x08 10. "TXRQS[43],Transmission request bit 43" "Not requested,Requested" bitfld.long 0x08 9. "TXRQS[42],Transmission request bit 42" "Not requested,Requested" bitfld.long 0x08 8. "TXRQS[41],Transmission request bit 41" "Not requested,Requested" newline bitfld.long 0x08 7. "TXRQS[40],Transmission request bit 40" "Not requested,Requested" bitfld.long 0x08 6. "TXRQS[39],Transmission request bit 39" "Not requested,Requested" bitfld.long 0x08 5. "TXRQS[38],Transmission request bit 38" "Not requested,Requested" newline bitfld.long 0x08 4. "TXRQS[37],Transmission request bit 37" "Not requested,Requested" bitfld.long 0x08 3. "TXRQS[36],Transmission request bit 36" "Not requested,Requested" bitfld.long 0x08 2. "TXRQS[35],Transmission request bit 35" "Not requested,Requested" newline bitfld.long 0x08 1. "TXRQS[34],Transmission request bit 34" "Not requested,Requested" bitfld.long 0x08 0. "TXRQS[33],Transmission request bit 33" "Not requested,Requested" line.long 0x0C "TXRQ56,Transmission Request Register 56" bitfld.long 0x0C 31. "TXRQS[96],Transmission request bit 96" "Not requested,Requested" bitfld.long 0x0C 30. "TXRQS[95],Transmission request bit 95" "Not requested,Requested" bitfld.long 0x0C 29. "TXRQS[94],Transmission request bit 94" "Not requested,Requested" newline bitfld.long 0x0C 28. "TXRQS[93],Transmission request bit 93" "Not requested,Requested" bitfld.long 0x0C 27. "TXRQS[92],Transmission request bit 92" "Not requested,Requested" bitfld.long 0x0C 26. "TXRQS[91],Transmission request bit 91" "Not requested,Requested" newline bitfld.long 0x0C 25. "TXRQS[90],Transmission request bit 90" "Not requested,Requested" bitfld.long 0x0C 24. "TXRQS[89],Transmission request bit 89" "Not requested,Requested" bitfld.long 0x0C 23. "TXRQS[88],Transmission request bit 88" "Not requested,Requested" newline bitfld.long 0x0C 22. "TXRQS[87],Transmission request bit 87" "Not requested,Requested" bitfld.long 0x0C 21. "TXRQS[86],Transmission request bit 86" "Not requested,Requested" bitfld.long 0x0C 20. "TXRQS[85],Transmission request bit 85" "Not requested,Requested" newline bitfld.long 0x0C 19. "TXRQS[84],Transmission request bit 84" "Not requested,Requested" bitfld.long 0x0C 18. "TXRQS[83],Transmission request bit 83" "Not requested,Requested" bitfld.long 0x0C 17. "TXRQS[82],Transmission request bit 82" "Not requested,Requested" newline bitfld.long 0x0C 16. "TXRQS[81],Transmission request bit 81" "Not requested,Requested" bitfld.long 0x0C 15. "TXRQS[80],Transmission request bit 80" "Not requested,Requested" bitfld.long 0x0C 14. "TXRQS[79],Transmission request bit 79" "Not requested,Requested" newline bitfld.long 0x0C 13. "TXRQS[78],Transmission request bit 78" "Not requested,Requested" bitfld.long 0x0C 12. "TXRQS[77],Transmission request bit 77" "Not requested,Requested" bitfld.long 0x0C 11. "TXRQS[76],Transmission request bit 76" "Not requested,Requested" newline bitfld.long 0x0C 10. "TXRQS[75],Transmission request bit 75" "Not requested,Requested" bitfld.long 0x0C 9. "TXRQS[74],Transmission request bit 74" "Not requested,Requested" bitfld.long 0x0C 8. "TXRQS[73],Transmission request bit 73" "Not requested,Requested" newline bitfld.long 0x0C 7. "TXRQS[72],Transmission request bit 72" "Not requested,Requested" bitfld.long 0x0C 6. "TXRQS[71],Transmission request bit 71" "Not requested,Requested" bitfld.long 0x0C 5. "TXRQS[70],Transmission request bit 70" "Not requested,Requested" newline bitfld.long 0x0C 4. "TXRQS[69],Transmission request bit 69" "Not requested,Requested" bitfld.long 0x0C 3. "TXRQS[68],Transmission request bit 68" "Not requested,Requested" bitfld.long 0x0C 2. "TXRQS[67],Transmission request bit 67" "Not requested,Requested" newline bitfld.long 0x0C 1. "TXRQS[66],Transmission request bit 66" "Not requested,Requested" bitfld.long 0x0C 0. "TXRQS[65],Transmission request bit 65" "Not requested,Requested" line.long 0x10 "TXRQ78,Transmission Request Register 78" bitfld.long 0x10 31. "TXRQS[128],Transmission request bit 128" "Not requested,Requested" bitfld.long 0x10 30. "TXRQS[127],Transmission request bit 127" "Not requested,Requested" bitfld.long 0x10 29. "TXRQS[126],Transmission request bit 126" "Not requested,Requested" newline bitfld.long 0x10 28. "TXRQS[125],Transmission request bit 125" "Not requested,Requested" bitfld.long 0x10 27. "TXRQS[124],Transmission request bit 124" "Not requested,Requested" bitfld.long 0x10 26. "TXRQS[123],Transmission request bit 123" "Not requested,Requested" newline bitfld.long 0x10 25. "TXRQS[122],Transmission request bit 122" "Not requested,Requested" bitfld.long 0x10 24. "TXRQS[121],Transmission request bit 121" "Not requested,Requested" bitfld.long 0x10 23. "TXRQS[120],Transmission request bit 120" "Not requested,Requested" newline bitfld.long 0x10 22. "TXRQS[119],Transmission request bit 119" "Not requested,Requested" bitfld.long 0x10 21. "TXRQS[118],Transmission request bit 118" "Not requested,Requested" bitfld.long 0x10 20. "TXRQS[117],Transmission request bit 117" "Not requested,Requested" newline bitfld.long 0x10 19. "TXRQS[116],Transmission request bit 116" "Not requested,Requested" bitfld.long 0x10 18. "TXRQS[115],Transmission request bit 115" "Not requested,Requested" bitfld.long 0x10 17. "TXRQS[114],Transmission request bit 114" "Not requested,Requested" newline bitfld.long 0x10 16. "TXRQS[113],Transmission request bit 113" "Not requested,Requested" bitfld.long 0x10 15. "TXRQS[112],Transmission request bit 112" "Not requested,Requested" bitfld.long 0x10 14. "TXRQS[111],Transmission request bit 111" "Not requested,Requested" newline bitfld.long 0x10 13. "TXRQS[110],Transmission request bit 110" "Not requested,Requested" bitfld.long 0x10 12. "TXRQS[109],Transmission request bit 109" "Not requested,Requested" bitfld.long 0x10 11. "TXRQS[108],Transmission request bit 108" "Not requested,Requested" newline bitfld.long 0x10 10. "TXRQS[107],Transmission request bit 107" "Not requested,Requested" bitfld.long 0x10 9. "TXRQS[106],Transmission request bit 106" "Not requested,Requested" bitfld.long 0x10 8. "TXRQS[105],Transmission request bit 105" "Not requested,Requested" newline bitfld.long 0x10 7. "TXRQS[104],Transmission request bit 104" "Not requested,Requested" bitfld.long 0x10 6. "TXRQS[103],Transmission request bit 103" "Not requested,Requested" bitfld.long 0x10 5. "TXRQS[102],Transmission request bit 102" "Not requested,Requested" newline bitfld.long 0x10 4. "TXRQS[101],Transmission request bit 101" "Not requested,Requested" bitfld.long 0x10 3. "TXRQS[100],Transmission request bit 100" "Not requested,Requested" bitfld.long 0x10 2. "TXRQS[99],Transmission request bit 99" "Not requested,Requested" newline bitfld.long 0x10 1. "TXRQS[98],Transmission request bit 98" "Not requested,Requested" bitfld.long 0x10 0. "TXRQS[97],Transmission request bit 97" "Not requested,Requested" line.long 0x14 "NWDAT_X,New Data X Register" bitfld.long 0x14 14.--15. "NEWDATREG8,New data X 8" "0,1,2,3" bitfld.long 0x14 12.--13. "NEWDATREG7,New data X 7" "0,1,2,3" bitfld.long 0x14 10.--11. "NEWDATREG6,New data X 6" "0,1,2,3" newline bitfld.long 0x14 8.--9. "NEWDATREG5,New data X 5" "0,1,2,3" bitfld.long 0x14 6.--7. "NEWDATREG4,New data X 4" "0,1,2,3" bitfld.long 0x14 4.--5. "NEWDATREG3,New data X 3" "0,1,2,3" newline bitfld.long 0x14 2.--3. "NEWDATREG2,New data X 2" "0,1,2,3" bitfld.long 0x14 0.--1. "NEWDATREG1,New data X 1" "0,1,2,3" line.long 0x18 "NWDAT12,New Data Register 12" bitfld.long 0x18 31. "NEWDAT[32],New data bit 32" "Not written,Written" bitfld.long 0x18 30. "NEWDAT[31],New data bit 31" "Not written,Written" bitfld.long 0x18 29. "NEWDAT[30],New data bit 30" "Not written,Written" newline bitfld.long 0x18 28. "NEWDAT[29],New data bit 29" "Not written,Written" bitfld.long 0x18 27. "NEWDAT[28],New data bit 28" "Not written,Written" bitfld.long 0x18 26. "NEWDAT[27],New data bit 27" "Not written,Written" newline bitfld.long 0x18 25. "NEWDAT[26],New data bit 26" "Not written,Written" bitfld.long 0x18 24. "NEWDAT[25],New data bit 25" "Not written,Written" bitfld.long 0x18 23. "NEWDAT[24],New data bit 24" "Not written,Written" newline bitfld.long 0x18 22. "NEWDAT[23],New data bit 23" "Not written,Written" bitfld.long 0x18 21. "NEWDAT[22],New data bit 22" "Not written,Written" bitfld.long 0x18 20. "NEWDAT[21],New data bit 21" "Not written,Written" newline bitfld.long 0x18 19. "NEWDAT[20],New data bit 20" "Not written,Written" bitfld.long 0x18 18. "NEWDAT[19],New data bit 19" "Not written,Written" bitfld.long 0x18 17. "NEWDAT[18],New data bit 18" "Not written,Written" newline bitfld.long 0x18 16. "NEWDAT[17],New data bit 17" "Not written,Written" bitfld.long 0x18 15. "NEWDAT[16],New data bit 16" "Not written,Written" bitfld.long 0x18 14. "NEWDAT[15],New data bit 15" "Not written,Written" newline bitfld.long 0x18 13. "NEWDAT[14],New data bit 14" "Not written,Written" bitfld.long 0x18 12. "NEWDAT[13],New data bit 13" "Not written,Written" bitfld.long 0x18 11. "NEWDAT[12],New data bit 12" "Not written,Written" newline bitfld.long 0x18 10. "NEWDAT[11],New data bit 11" "Not written,Written" bitfld.long 0x18 9. "NEWDAT[10],New data bit 10" "Not written,Written" bitfld.long 0x18 8. "NEWDAT[9],New data bit 9" "Not written,Written" newline bitfld.long 0x18 7. "NEWDAT[8],New data bit 8" "Not written,Written" bitfld.long 0x18 6. "NEWDAT[7],New data bit 7" "Not written,Written" bitfld.long 0x18 5. "NEWDAT[6],New data bit 6" "Not written,Written" newline bitfld.long 0x18 4. "NEWDAT[5],New data bit 5" "Not written,Written" bitfld.long 0x18 3. "NEWDAT[4],New data bit 4" "Not written,Written" bitfld.long 0x18 2. "NEWDAT[3],New data bit 3" "Not written,Written" newline bitfld.long 0x18 1. "NEWDAT[2],New data bit 2" "Not written,Written" bitfld.long 0x18 0. "NEWDAT[1],New data bit 1" "Not written,Written" line.long 0x1C "NWDAT34,New Data Register 34" bitfld.long 0x1C 31. "NEWDAT[64],New data bit 64" "Not written,Written" bitfld.long 0x1C 30. "NEWDAT[63],New data bit 63" "Not written,Written" bitfld.long 0x1C 29. "NEWDAT[62],New data bit 62" "Not written,Written" newline bitfld.long 0x1C 28. "NEWDAT[61],New data bit 61" "Not written,Written" bitfld.long 0x1C 27. "NEWDAT[60],New data bit 60" "Not written,Written" bitfld.long 0x1C 26. "NEWDAT[59],New data bit 59" "Not written,Written" newline bitfld.long 0x1C 25. "NEWDAT[58],New data bit 58" "Not written,Written" bitfld.long 0x1C 24. "NEWDAT[57],New data bit 57" "Not written,Written" bitfld.long 0x1C 23. "NEWDAT[56],New data bit 56" "Not written,Written" newline bitfld.long 0x1C 22. "NEWDAT[55],New data bit 55" "Not written,Written" bitfld.long 0x1C 21. "NEWDAT[54],New data bit 54" "Not written,Written" bitfld.long 0x1C 20. "NEWDAT[53],New data bit 53" "Not written,Written" newline bitfld.long 0x1C 19. "NEWDAT[52],New data bit 52" "Not written,Written" bitfld.long 0x1C 18. "NEWDAT[51],New data bit 51" "Not written,Written" bitfld.long 0x1C 17. "NEWDAT[50],New data bit 50" "Not written,Written" newline bitfld.long 0x1C 16. "NEWDAT[49],New data bit 49" "Not written,Written" bitfld.long 0x1C 15. "NEWDAT[48],New data bit 48" "Not written,Written" bitfld.long 0x1C 14. "NEWDAT[47],New data bit 47" "Not written,Written" newline bitfld.long 0x1C 13. "NEWDAT[46],New data bit 46" "Not written,Written" bitfld.long 0x1C 12. "NEWDAT[45],New data bit 45" "Not written,Written" bitfld.long 0x1C 11. "NEWDAT[44],New data bit 44" "Not written,Written" newline bitfld.long 0x1C 10. "NEWDAT[43],New data bit 43" "Not written,Written" bitfld.long 0x1C 9. "NEWDAT[42],New data bit 42" "Not written,Written" bitfld.long 0x1C 8. "NEWDAT[41],New data bit 41" "Not written,Written" newline bitfld.long 0x1C 7. "NEWDAT[40],New data bit 40" "Not written,Written" bitfld.long 0x1C 6. "NEWDAT[39],New data bit 39" "Not written,Written" bitfld.long 0x1C 5. "NEWDAT[38],New data bit 38" "Not written,Written" newline bitfld.long 0x1C 4. "NEWDAT[37],New data bit 37" "Not written,Written" bitfld.long 0x1C 3. "NEWDAT[36],New data bit 36" "Not written,Written" bitfld.long 0x1C 2. "NEWDAT[35],New data bit 35" "Not written,Written" newline bitfld.long 0x1C 1. "NEWDAT[34],New data bit 34" "Not written,Written" bitfld.long 0x1C 0. "NEWDAT[33],New data bit 33" "Not written,Written" line.long 0x20 "NWDAT56,New Data Register 56" bitfld.long 0x20 31. "NEWDAT[96],New data bit 96" "Not written,Written" bitfld.long 0x20 30. "NEWDAT[95],New data bit 95" "Not written,Written" bitfld.long 0x20 29. "NEWDAT[94],New data bit 94" "Not written,Written" newline bitfld.long 0x20 28. "NEWDAT[93],New data bit 93" "Not written,Written" bitfld.long 0x20 27. "NEWDAT[92],New data bit 92" "Not written,Written" bitfld.long 0x20 26. "NEWDAT[91],New data bit 91" "Not written,Written" newline bitfld.long 0x20 25. "NEWDAT[90],New data bit 90" "Not written,Written" bitfld.long 0x20 24. "NEWDAT[89],New data bit 89" "Not written,Written" bitfld.long 0x20 23. "NEWDAT[88],New data bit 88" "Not written,Written" newline bitfld.long 0x20 22. "NEWDAT[87],New data bit 87" "Not written,Written" bitfld.long 0x20 21. "NEWDAT[86],New data bit 86" "Not written,Written" bitfld.long 0x20 20. "NEWDAT[85],New data bit 85" "Not written,Written" newline bitfld.long 0x20 19. "NEWDAT[84],New data bit 84" "Not written,Written" bitfld.long 0x20 18. "NEWDAT[83],New data bit 83" "Not written,Written" bitfld.long 0x20 17. "NEWDAT[82],New data bit 82" "Not written,Written" newline bitfld.long 0x20 16. "NEWDAT[81],New data bit 81" "Not written,Written" bitfld.long 0x20 15. "NEWDAT[80],New data bit 80" "Not written,Written" bitfld.long 0x20 14. "NEWDAT[79],New data bit 79" "Not written,Written" newline bitfld.long 0x20 13. "NEWDAT[78],New data bit 78" "Not written,Written" bitfld.long 0x20 12. "NEWDAT[77],New data bit 77" "Not written,Written" bitfld.long 0x20 11. "NEWDAT[76],New data bit 76" "Not written,Written" newline bitfld.long 0x20 10. "NEWDAT[75],New data bit 75" "Not written,Written" bitfld.long 0x20 9. "NEWDAT[74],New data bit 74" "Not written,Written" bitfld.long 0x20 8. "NEWDAT[73],New data bit 73" "Not written,Written" newline bitfld.long 0x20 7. "NEWDAT[72],New data bit 72" "Not written,Written" bitfld.long 0x20 6. "NEWDAT[71],New data bit 71" "Not written,Written" bitfld.long 0x20 5. "NEWDAT[70],New data bit 70" "Not written,Written" newline bitfld.long 0x20 4. "NEWDAT[69],New data bit 69" "Not written,Written" bitfld.long 0x20 3. "NEWDAT[68],New data bit 68" "Not written,Written" bitfld.long 0x20 2. "NEWDAT[67],New data bit 67" "Not written,Written" newline bitfld.long 0x20 1. "NEWDAT[66],New data bit 66" "Not written,Written" bitfld.long 0x20 0. "NEWDAT[65],New data bit 65" "Not written,Written" line.long 0x24 "NWDAT78,New Data Register 78" bitfld.long 0x24 31. "NEWDAT[128],New data bit 128" "Not written,Written" bitfld.long 0x24 30. "NEWDAT[127],New data bit 127" "Not written,Written" bitfld.long 0x24 29. "NEWDAT[126],New data bit 126" "Not written,Written" newline bitfld.long 0x24 28. "NEWDAT[125],New data bit 125" "Not written,Written" bitfld.long 0x24 27. "NEWDAT[124],New data bit 124" "Not written,Written" bitfld.long 0x24 26. "NEWDAT[123],New data bit 123" "Not written,Written" newline bitfld.long 0x24 25. "NEWDAT[122],New data bit 122" "Not written,Written" bitfld.long 0x24 24. "NEWDAT[121],New data bit 121" "Not written,Written" bitfld.long 0x24 23. "NEWDAT[120],New data bit 120" "Not written,Written" newline bitfld.long 0x24 22. "NEWDAT[119],New data bit 119" "Not written,Written" bitfld.long 0x24 21. "NEWDAT[118],New data bit 118" "Not written,Written" bitfld.long 0x24 20. "NEWDAT[117],New data bit 117" "Not written,Written" newline bitfld.long 0x24 19. "NEWDAT[116],New data bit 116" "Not written,Written" bitfld.long 0x24 18. "NEWDAT[115],New data bit 115" "Not written,Written" bitfld.long 0x24 17. "NEWDAT[114],New data bit 114" "Not written,Written" newline bitfld.long 0x24 16. "NEWDAT[113],New data bit 113" "Not written,Written" bitfld.long 0x24 15. "NEWDAT[112],New data bit 112" "Not written,Written" bitfld.long 0x24 14. "NEWDAT[111],New data bit 111" "Not written,Written" newline bitfld.long 0x24 13. "NEWDAT[110],New data bit 110" "Not written,Written" bitfld.long 0x24 12. "NEWDAT[109],New data bit 109" "Not written,Written" bitfld.long 0x24 11. "NEWDAT[108],New data bit 108" "Not written,Written" newline bitfld.long 0x24 10. "NEWDAT[107],New data bit 107" "Not written,Written" bitfld.long 0x24 9. "NEWDAT[106],New data bit 106" "Not written,Written" bitfld.long 0x24 8. "NEWDAT[105],New data bit 105" "Not written,Written" newline bitfld.long 0x24 7. "NEWDAT[104],New data bit 104" "Not written,Written" bitfld.long 0x24 6. "NEWDAT[103],New data bit 103" "Not written,Written" bitfld.long 0x24 5. "NEWDAT[102],New data bit 102" "Not written,Written" newline bitfld.long 0x24 4. "NEWDAT[101],New data bit 101" "Not written,Written" bitfld.long 0x24 3. "NEWDAT[100],New data bit 100" "Not written,Written" bitfld.long 0x24 2. "NEWDAT[99],New data bit 99" "Not written,Written" newline bitfld.long 0x24 1. "NEWDAT[98],New data bit 98" "Not written,Written" bitfld.long 0x24 0. "NEWDAT[97],New data bit 97" "Not written,Written" line.long 0x28 "INTPND_X,Interrupt Pending X Register" bitfld.long 0x28 14.--15. "INTPNDREG8,Interrupt pending X register 8" "0,1,2,3" bitfld.long 0x28 12.--13. "INTPNDREG7,Interrupt pending X register 7" "0,1,2,3" bitfld.long 0x28 10.--11. "INTPNDREG6,Interrupt pending X register 6" "0,1,2,3" newline bitfld.long 0x28 8.--9. "INTPNDREG5,Interrupt pending X register 5" "0,1,2,3" bitfld.long 0x28 6.--7. "INTPNDREG4,Interrupt pending X register 4" "0,1,2,3" bitfld.long 0x28 4.--5. "INTPNDREG3,Interrupt pending X register 3" "0,1,2,3" newline bitfld.long 0x28 2.--3. "INTPNDREG2,Interrupt pending X register 2" "0,1,2,3" bitfld.long 0x28 0.--1. "INTPNDREG1,Interrupt pending X register 1" "0,1,2,3" line.long 0x2C "INTPND12,Interrupt Pending Register 12" bitfld.long 0x2C 31. "INTPND[32],Interrupt pending bit 32" "Not pending,Pending" bitfld.long 0x2C 30. "INTPND[31],Interrupt pending bit 31" "Not pending,Pending" bitfld.long 0x2C 29. "INTPND[30],Interrupt pending bit 30" "Not pending,Pending" newline bitfld.long 0x2C 28. "INTPND[29],Interrupt pending bit 29" "Not pending,Pending" bitfld.long 0x2C 27. "INTPND[28],Interrupt pending bit 28" "Not pending,Pending" bitfld.long 0x2C 26. "INTPND[27],Interrupt pending bit 27" "Not pending,Pending" newline bitfld.long 0x2C 25. "INTPND[26],Interrupt pending bit 26" "Not pending,Pending" bitfld.long 0x2C 24. "INTPND[25],Interrupt pending bit 25" "Not pending,Pending" bitfld.long 0x2C 23. "INTPND[24],Interrupt pending bit 24" "Not pending,Pending" newline bitfld.long 0x2C 22. "INTPND[23],Interrupt pending bit 23" "Not pending,Pending" bitfld.long 0x2C 21. "INTPND[22],Interrupt pending bit 22" "Not pending,Pending" bitfld.long 0x2C 20. "INTPND[21],Interrupt pending bit 21" "Not pending,Pending" newline bitfld.long 0x2C 19. "INTPND[20],Interrupt pending bit 20" "Not pending,Pending" bitfld.long 0x2C 18. "INTPND[19],Interrupt pending bit 19" "Not pending,Pending" bitfld.long 0x2C 17. "INTPND[18],Interrupt pending bit 18" "Not pending,Pending" newline bitfld.long 0x2C 16. "INTPND[17],Interrupt pending bit 17" "Not pending,Pending" bitfld.long 0x2C 15. "INTPND[16],Interrupt pending bit 16" "Not pending,Pending" bitfld.long 0x2C 14. "INTPND[15],Interrupt pending bit 15" "Not pending,Pending" newline bitfld.long 0x2C 13. "INTPND[14],Interrupt pending bit 14" "Not pending,Pending" bitfld.long 0x2C 12. "INTPND[13],Interrupt pending bit 13" "Not pending,Pending" bitfld.long 0x2C 11. "INTPND[12],Interrupt pending bit 12" "Not pending,Pending" newline bitfld.long 0x2C 10. "INTPND[11],Interrupt pending bit 11" "Not pending,Pending" bitfld.long 0x2C 9. "INTPND[10],Interrupt pending bit 10" "Not pending,Pending" bitfld.long 0x2C 8. "INTPND[9],Interrupt pending bit 9" "Not pending,Pending" newline bitfld.long 0x2C 7. "INTPND[8],Interrupt pending bit 8" "Not pending,Pending" bitfld.long 0x2C 6. "INTPND[7],Interrupt pending bit 7" "Not pending,Pending" bitfld.long 0x2C 5. "INTPND[6],Interrupt pending bit 6" "Not pending,Pending" newline bitfld.long 0x2C 4. "INTPND[5],Interrupt pending bit 5" "Not pending,Pending" bitfld.long 0x2C 3. "INTPND[4],Interrupt pending bit 4" "Not pending,Pending" bitfld.long 0x2C 2. "INTPND[3],Interrupt pending bit 3" "Not pending,Pending" newline bitfld.long 0x2C 1. "INTPND[2],Interrupt pending bit 2" "Not pending,Pending" bitfld.long 0x2C 0. "INTPND[1],Interrupt pending bit 1" "Not pending,Pending" line.long 0x30 "INTPND34,Interrupt Pending Register 34" bitfld.long 0x30 31. "INTPND[64],Interrupt pending bit 64" "Not pending,Pending" bitfld.long 0x30 30. "INTPND[63],Interrupt pending bit 63" "Not pending,Pending" bitfld.long 0x30 29. "INTPND[62],Interrupt pending bit 62" "Not pending,Pending" newline bitfld.long 0x30 28. "INTPND[61],Interrupt pending bit 61" "Not pending,Pending" bitfld.long 0x30 27. "INTPND[60],Interrupt pending bit 60" "Not pending,Pending" bitfld.long 0x30 26. "INTPND[59],Interrupt pending bit 59" "Not pending,Pending" newline bitfld.long 0x30 25. "INTPND[58],Interrupt pending bit 58" "Not pending,Pending" bitfld.long 0x30 24. "INTPND[57],Interrupt pending bit 57" "Not pending,Pending" bitfld.long 0x30 23. "INTPND[56],Interrupt pending bit 56" "Not pending,Pending" newline bitfld.long 0x30 22. "INTPND[55],Interrupt pending bit 55" "Not pending,Pending" bitfld.long 0x30 21. "INTPND[54],Interrupt pending bit 54" "Not pending,Pending" bitfld.long 0x30 20. "INTPND[53],Interrupt pending bit 53" "Not pending,Pending" newline bitfld.long 0x30 19. "INTPND[52],Interrupt pending bit 52" "Not pending,Pending" bitfld.long 0x30 18. "INTPND[51],Interrupt pending bit 51" "Not pending,Pending" bitfld.long 0x30 17. "INTPND[50],Interrupt pending bit 50" "Not pending,Pending" newline bitfld.long 0x30 16. "INTPND[49],Interrupt pending bit 49" "Not pending,Pending" bitfld.long 0x30 15. "INTPND[48],Interrupt pending bit 48" "Not pending,Pending" bitfld.long 0x30 14. "INTPND[47],Interrupt pending bit 47" "Not pending,Pending" newline bitfld.long 0x30 13. "INTPND[46],Interrupt pending bit 46" "Not pending,Pending" bitfld.long 0x30 12. "INTPND[45],Interrupt pending bit 45" "Not pending,Pending" bitfld.long 0x30 11. "INTPND[44],Interrupt pending bit 44" "Not pending,Pending" newline bitfld.long 0x30 10. "INTPND[43],Interrupt pending bit 43" "Not pending,Pending" bitfld.long 0x30 9. "INTPND[42],Interrupt pending bit 42" "Not pending,Pending" bitfld.long 0x30 8. "INTPND[41],Interrupt pending bit 41" "Not pending,Pending" newline bitfld.long 0x30 7. "INTPND[40],Interrupt pending bit 40" "Not pending,Pending" bitfld.long 0x30 6. "INTPND[39],Interrupt pending bit 39" "Not pending,Pending" bitfld.long 0x30 5. "INTPND[38],Interrupt pending bit 38" "Not pending,Pending" newline bitfld.long 0x30 4. "INTPND[37],Interrupt pending bit 37" "Not pending,Pending" bitfld.long 0x30 3. "INTPND[36],Interrupt pending bit 36" "Not pending,Pending" bitfld.long 0x30 2. "INTPND[35],Interrupt pending bit 35" "Not pending,Pending" newline bitfld.long 0x30 1. "INTPND[34],Interrupt pending bit 34" "Not pending,Pending" bitfld.long 0x30 0. "INTPND[33],Interrupt pending bit 33" "Not pending,Pending" line.long 0x34 "INTPND56,Interrupt Pending Register 56" bitfld.long 0x34 31. "INTPND[96],Interrupt pending bit 96" "Not pending,Pending" bitfld.long 0x34 30. "INTPND[95],Interrupt pending bit 95" "Not pending,Pending" bitfld.long 0x34 29. "INTPND[94],Interrupt pending bit 94" "Not pending,Pending" newline bitfld.long 0x34 28. "INTPND[93],Interrupt pending bit 93" "Not pending,Pending" bitfld.long 0x34 27. "INTPND[92],Interrupt pending bit 92" "Not pending,Pending" bitfld.long 0x34 26. "INTPND[91],Interrupt pending bit 91" "Not pending,Pending" newline bitfld.long 0x34 25. "INTPND[90],Interrupt pending bit 90" "Not pending,Pending" bitfld.long 0x34 24. "INTPND[89],Interrupt pending bit 89" "Not pending,Pending" bitfld.long 0x34 23. "INTPND[88],Interrupt pending bit 88" "Not pending,Pending" newline bitfld.long 0x34 22. "INTPND[87],Interrupt pending bit 87" "Not pending,Pending" bitfld.long 0x34 21. "INTPND[86],Interrupt pending bit 86" "Not pending,Pending" bitfld.long 0x34 20. "INTPND[85],Interrupt pending bit 85" "Not pending,Pending" newline bitfld.long 0x34 19. "INTPND[84],Interrupt pending bit 84" "Not pending,Pending" bitfld.long 0x34 18. "INTPND[83],Interrupt pending bit 83" "Not pending,Pending" bitfld.long 0x34 17. "INTPND[82],Interrupt pending bit 82" "Not pending,Pending" newline bitfld.long 0x34 16. "INTPND[81],Interrupt pending bit 81" "Not pending,Pending" bitfld.long 0x34 15. "INTPND[80],Interrupt pending bit 80" "Not pending,Pending" bitfld.long 0x34 14. "INTPND[79],Interrupt pending bit 79" "Not pending,Pending" newline bitfld.long 0x34 13. "INTPND[78],Interrupt pending bit 78" "Not pending,Pending" bitfld.long 0x34 12. "INTPND[77],Interrupt pending bit 77" "Not pending,Pending" bitfld.long 0x34 11. "INTPND[76],Interrupt pending bit 76" "Not pending,Pending" newline bitfld.long 0x34 10. "INTPND[75],Interrupt pending bit 75" "Not pending,Pending" bitfld.long 0x34 9. "INTPND[74],Interrupt pending bit 74" "Not pending,Pending" bitfld.long 0x34 8. "INTPND[73],Interrupt pending bit 73" "Not pending,Pending" newline bitfld.long 0x34 7. "INTPND[72],Interrupt pending bit 72" "Not pending,Pending" bitfld.long 0x34 6. "INTPND[71],Interrupt pending bit 71" "Not pending,Pending" bitfld.long 0x34 5. "INTPND[70],Interrupt pending bit 70" "Not pending,Pending" newline bitfld.long 0x34 4. "INTPND[69],Interrupt pending bit 69" "Not pending,Pending" bitfld.long 0x34 3. "INTPND[68],Interrupt pending bit 68" "Not pending,Pending" bitfld.long 0x34 2. "INTPND[67],Interrupt pending bit 67" "Not pending,Pending" newline bitfld.long 0x34 1. "INTPND[66],Interrupt pending bit 66" "Not pending,Pending" bitfld.long 0x34 0. "INTPND[65],Interrupt pending bit 65" "Not pending,Pending" line.long 0x38 "INTPND78,Interrupt Pending Register 78" bitfld.long 0x38 31. "INTPND[128],Interrupt pending bit 128" "Not pending,Pending" bitfld.long 0x38 30. "INTPND[127],Interrupt pending bit 127" "Not pending,Pending" bitfld.long 0x38 29. "INTPND[126],Interrupt pending bit 126" "Not pending,Pending" newline bitfld.long 0x38 28. "INTPND[125],Interrupt pending bit 125" "Not pending,Pending" bitfld.long 0x38 27. "INTPND[124],Interrupt pending bit 124" "Not pending,Pending" bitfld.long 0x38 26. "INTPND[123],Interrupt pending bit 123" "Not pending,Pending" newline bitfld.long 0x38 25. "INTPND[122],Interrupt pending bit 122" "Not pending,Pending" bitfld.long 0x38 24. "INTPND[121],Interrupt pending bit 121" "Not pending,Pending" bitfld.long 0x38 23. "INTPND[120],Interrupt pending bit 120" "Not pending,Pending" newline bitfld.long 0x38 22. "INTPND[119],Interrupt pending bit 119" "Not pending,Pending" bitfld.long 0x38 21. "INTPND[118],Interrupt pending bit 118" "Not pending,Pending" bitfld.long 0x38 20. "INTPND[117],Interrupt pending bit 117" "Not pending,Pending" newline bitfld.long 0x38 19. "INTPND[116],Interrupt pending bit 116" "Not pending,Pending" bitfld.long 0x38 18. "INTPND[115],Interrupt pending bit 115" "Not pending,Pending" bitfld.long 0x38 17. "INTPND[114],Interrupt pending bit 114" "Not pending,Pending" newline bitfld.long 0x38 16. "INTPND[113],Interrupt pending bit 113" "Not pending,Pending" bitfld.long 0x38 15. "INTPND[112],Interrupt pending bit 112" "Not pending,Pending" bitfld.long 0x38 14. "INTPND[111],Interrupt pending bit 111" "Not pending,Pending" newline bitfld.long 0x38 13. "INTPND[110],Interrupt pending bit 110" "Not pending,Pending" bitfld.long 0x38 12. "INTPND[109],Interrupt pending bit 109" "Not pending,Pending" bitfld.long 0x38 11. "INTPND[108],Interrupt pending bit 108" "Not pending,Pending" newline bitfld.long 0x38 10. "INTPND[107],Interrupt pending bit 107" "Not pending,Pending" bitfld.long 0x38 9. "INTPND[106],Interrupt pending bit 106" "Not pending,Pending" bitfld.long 0x38 8. "INTPND[105],Interrupt pending bit 105" "Not pending,Pending" newline bitfld.long 0x38 7. "INTPND[104],Interrupt pending bit 104" "Not pending,Pending" bitfld.long 0x38 6. "INTPND[103],Interrupt pending bit 103" "Not pending,Pending" bitfld.long 0x38 5. "INTPND[102],Interrupt pending bit 102" "Not pending,Pending" newline bitfld.long 0x38 4. "INTPND[101],Interrupt pending bit 101" "Not pending,Pending" bitfld.long 0x38 3. "INTPND[100],Interrupt pending bit 100" "Not pending,Pending" bitfld.long 0x38 2. "INTPND[99],Interrupt pending bit 99" "Not pending,Pending" newline bitfld.long 0x38 1. "INTPND[98],Interrupt pending bit 98" "Not pending,Pending" bitfld.long 0x38 0. "INTPND[97],Interrupt pending bit 97" "Not pending,Pending" line.long 0x3C "MSGVAL_X,Message Valid X Register" bitfld.long 0x3C 14.--15. "MSGVALREG8,Message valid X register 8" "0,1,2,3" bitfld.long 0x3C 12.--13. "MSGVALREG7,Message valid X register 7" "0,1,2,3" bitfld.long 0x3C 10.--11. "MSGVALREG6,Message valid X register 6" "0,1,2,3" newline bitfld.long 0x3C 8.--9. "MSGVALREG5,Message valid X register 5" "0,1,2,3" bitfld.long 0x3C 6.--7. "MSGVALREG4,Message valid X register 4" "0,1,2,3" bitfld.long 0x3C 4.--5. "MSGVALREG3,Message valid X register 3" "0,1,2,3" newline bitfld.long 0x3C 2.--3. "MSGVALREG2,Message valid X register 2" "0,1,2,3" bitfld.long 0x3C 0.--1. "MSGVALREG1,Message valid X register 1" "0,1,2,3" line.long 0x40 "MSGVAL12,Message Valid Register 12" bitfld.long 0x40 31. "MSGVAL[32],Message valid bit 32" "Ignored,Not ignored" bitfld.long 0x40 30. "MSGVAL[31],Message valid bit 31" "Ignored,Not ignored" bitfld.long 0x40 29. "MSGVAL[30],Message valid bit 30" "Ignored,Not ignored" newline bitfld.long 0x40 28. "MSGVAL[29],Message valid bit 29" "Ignored,Not ignored" bitfld.long 0x40 27. "MSGVAL[28],Message valid bit 28" "Ignored,Not ignored" bitfld.long 0x40 26. "MSGVAL[27],Message valid bit 27" "Ignored,Not ignored" newline bitfld.long 0x40 25. "MSGVAL[26],Message valid bit 26" "Ignored,Not ignored" bitfld.long 0x40 24. "MSGVAL[25],Message valid bit 25" "Ignored,Not ignored" bitfld.long 0x40 23. "MSGVAL[24],Message valid bit 24" "Ignored,Not ignored" newline bitfld.long 0x40 22. "MSGVAL[23],Message valid bit 23" "Ignored,Not ignored" bitfld.long 0x40 21. "MSGVAL[22],Message valid bit 22" "Ignored,Not ignored" bitfld.long 0x40 20. "MSGVAL[21],Message valid bit 21" "Ignored,Not ignored" newline bitfld.long 0x40 19. "MSGVAL[20],Message valid bit 20" "Ignored,Not ignored" bitfld.long 0x40 18. "MSGVAL[19],Message valid bit 19" "Ignored,Not ignored" bitfld.long 0x40 17. "MSGVAL[18],Message valid bit 18" "Ignored,Not ignored" newline bitfld.long 0x40 16. "MSGVAL[17],Message valid bit 17" "Ignored,Not ignored" bitfld.long 0x40 15. "MSGVAL[16],Message valid bit 16" "Ignored,Not ignored" bitfld.long 0x40 14. "MSGVAL[15],Message valid bit 15" "Ignored,Not ignored" newline bitfld.long 0x40 13. "MSGVAL[14],Message valid bit 14" "Ignored,Not ignored" bitfld.long 0x40 12. "MSGVAL[13],Message valid bit 13" "Ignored,Not ignored" bitfld.long 0x40 11. "MSGVAL[12],Message valid bit 12" "Ignored,Not ignored" newline bitfld.long 0x40 10. "MSGVAL[11],Message valid bit 11" "Ignored,Not ignored" bitfld.long 0x40 9. "MSGVAL[10],Message valid bit 10" "Ignored,Not ignored" bitfld.long 0x40 8. "MSGVAL[9],Message valid bit 9" "Ignored,Not ignored" newline bitfld.long 0x40 7. "MSGVAL[8],Message valid bit 8" "Ignored,Not ignored" bitfld.long 0x40 6. "MSGVAL[7],Message valid bit 7" "Ignored,Not ignored" bitfld.long 0x40 5. "MSGVAL[6],Message valid bit 6" "Ignored,Not ignored" newline bitfld.long 0x40 4. "MSGVAL[5],Message valid bit 5" "Ignored,Not ignored" bitfld.long 0x40 3. "MSGVAL[4],Message valid bit 4" "Ignored,Not ignored" bitfld.long 0x40 2. "MSGVAL[3],Message valid bit 3" "Ignored,Not ignored" newline bitfld.long 0x40 1. "MSGVAL[2],Message valid bit 2" "Ignored,Not ignored" bitfld.long 0x40 0. "MSGVAL[1],Message valid bit 1" "Ignored,Not ignored" line.long 0x44 "MSGVAL34,Message Valid Register 34" bitfld.long 0x44 31. "MSGVAL[64],Message valid bit 64" "Ignored,Not ignored" bitfld.long 0x44 30. "MSGVAL[63],Message valid bit 63" "Ignored,Not ignored" bitfld.long 0x44 29. "MSGVAL[62],Message valid bit 62" "Ignored,Not ignored" newline bitfld.long 0x44 28. "MSGVAL[61],Message valid bit 61" "Ignored,Not ignored" bitfld.long 0x44 27. "MSGVAL[60],Message valid bit 60" "Ignored,Not ignored" bitfld.long 0x44 26. "MSGVAL[59],Message valid bit 59" "Ignored,Not ignored" newline bitfld.long 0x44 25. "MSGVAL[58],Message valid bit 58" "Ignored,Not ignored" bitfld.long 0x44 24. "MSGVAL[57],Message valid bit 57" "Ignored,Not ignored" bitfld.long 0x44 23. "MSGVAL[56],Message valid bit 56" "Ignored,Not ignored" newline bitfld.long 0x44 22. "MSGVAL[55],Message valid bit 55" "Ignored,Not ignored" bitfld.long 0x44 21. "MSGVAL[54],Message valid bit 54" "Ignored,Not ignored" bitfld.long 0x44 20. "MSGVAL[53],Message valid bit 53" "Ignored,Not ignored" newline bitfld.long 0x44 19. "MSGVAL[52],Message valid bit 52" "Ignored,Not ignored" bitfld.long 0x44 18. "MSGVAL[51],Message valid bit 51" "Ignored,Not ignored" bitfld.long 0x44 17. "MSGVAL[50],Message valid bit 50" "Ignored,Not ignored" newline bitfld.long 0x44 16. "MSGVAL[49],Message valid bit 49" "Ignored,Not ignored" bitfld.long 0x44 15. "MSGVAL[48],Message valid bit 48" "Ignored,Not ignored" bitfld.long 0x44 14. "MSGVAL[47],Message valid bit 47" "Ignored,Not ignored" newline bitfld.long 0x44 13. "MSGVAL[46],Message valid bit 46" "Ignored,Not ignored" bitfld.long 0x44 12. "MSGVAL[45],Message valid bit 45" "Ignored,Not ignored" bitfld.long 0x44 11. "MSGVAL[44],Message valid bit 44" "Ignored,Not ignored" newline bitfld.long 0x44 10. "MSGVAL[43],Message valid bit 43" "Ignored,Not ignored" bitfld.long 0x44 9. "MSGVAL[42],Message valid bit 42" "Ignored,Not ignored" bitfld.long 0x44 8. "MSGVAL[41],Message valid bit 41" "Ignored,Not ignored" newline bitfld.long 0x44 7. "MSGVAL[40],Message valid bit 40" "Ignored,Not ignored" bitfld.long 0x44 6. "MSGVAL[39],Message valid bit 39" "Ignored,Not ignored" bitfld.long 0x44 5. "MSGVAL[38],Message valid bit 38" "Ignored,Not ignored" newline bitfld.long 0x44 4. "MSGVAL[37],Message valid bit 37" "Ignored,Not ignored" bitfld.long 0x44 3. "MSGVAL[36],Message valid bit 36" "Ignored,Not ignored" bitfld.long 0x44 2. "MSGVAL[35],Message valid bit 35" "Ignored,Not ignored" newline bitfld.long 0x44 1. "MSGVAL[34],Message valid bit 34" "Ignored,Not ignored" bitfld.long 0x44 0. "MSGVAL[33],Message valid bit 33" "Ignored,Not ignored" line.long 0x48 "MSGVAL56,Message Valid Register 56" bitfld.long 0x48 31. "MSGVAL[96],Message valid bit 96" "Ignored,Not ignored" bitfld.long 0x48 30. "MSGVAL[95],Message valid bit 95" "Ignored,Not ignored" bitfld.long 0x48 29. "MSGVAL[94],Message valid bit 94" "Ignored,Not ignored" newline bitfld.long 0x48 28. "MSGVAL[93],Message valid bit 93" "Ignored,Not ignored" bitfld.long 0x48 27. "MSGVAL[92],Message valid bit 92" "Ignored,Not ignored" bitfld.long 0x48 26. "MSGVAL[91],Message valid bit 91" "Ignored,Not ignored" newline bitfld.long 0x48 25. "MSGVAL[90],Message valid bit 90" "Ignored,Not ignored" bitfld.long 0x48 24. "MSGVAL[89],Message valid bit 89" "Ignored,Not ignored" bitfld.long 0x48 23. "MSGVAL[88],Message valid bit 88" "Ignored,Not ignored" newline bitfld.long 0x48 22. "MSGVAL[87],Message valid bit 87" "Ignored,Not ignored" bitfld.long 0x48 21. "MSGVAL[86],Message valid bit 86" "Ignored,Not ignored" bitfld.long 0x48 20. "MSGVAL[85],Message valid bit 85" "Ignored,Not ignored" newline bitfld.long 0x48 19. "MSGVAL[84],Message valid bit 84" "Ignored,Not ignored" bitfld.long 0x48 18. "MSGVAL[83],Message valid bit 83" "Ignored,Not ignored" bitfld.long 0x48 17. "MSGVAL[82],Message valid bit 82" "Ignored,Not ignored" newline bitfld.long 0x48 16. "MSGVAL[81],Message valid bit 81" "Ignored,Not ignored" bitfld.long 0x48 15. "MSGVAL[80],Message valid bit 80" "Ignored,Not ignored" bitfld.long 0x48 14. "MSGVAL[79],Message valid bit 79" "Ignored,Not ignored" newline bitfld.long 0x48 13. "MSGVAL[78],Message valid bit 78" "Ignored,Not ignored" bitfld.long 0x48 12. "MSGVAL[77],Message valid bit 77" "Ignored,Not ignored" bitfld.long 0x48 11. "MSGVAL[76],Message valid bit 76" "Ignored,Not ignored" newline bitfld.long 0x48 10. "MSGVAL[75],Message valid bit 75" "Ignored,Not ignored" bitfld.long 0x48 9. "MSGVAL[74],Message valid bit 74" "Ignored,Not ignored" bitfld.long 0x48 8. "MSGVAL[73],Message valid bit 73" "Ignored,Not ignored" newline bitfld.long 0x48 7. "MSGVAL[72],Message valid bit 72" "Ignored,Not ignored" bitfld.long 0x48 6. "MSGVAL[71],Message valid bit 71" "Ignored,Not ignored" bitfld.long 0x48 5. "MSGVAL[70],Message valid bit 70" "Ignored,Not ignored" newline bitfld.long 0x48 4. "MSGVAL[69],Message valid bit 69" "Ignored,Not ignored" bitfld.long 0x48 3. "MSGVAL[68],Message valid bit 68" "Ignored,Not ignored" bitfld.long 0x48 2. "MSGVAL[67],Message valid bit 67" "Ignored,Not ignored" newline bitfld.long 0x48 1. "MSGVAL[66],Message valid bit 66" "Ignored,Not ignored" bitfld.long 0x48 0. "MSGVAL[65],Message valid bit 65" "Ignored,Not ignored" line.long 0x4C "MSGVAL78,Message Valid Register 78" bitfld.long 0x4C 31. "MSGVAL[128],Message valid bit 128" "Ignored,Not ignored" bitfld.long 0x4C 30. "MSGVAL[127],Message valid bit 127" "Ignored,Not ignored" bitfld.long 0x4C 29. "MSGVAL[126],Message valid bit 126" "Ignored,Not ignored" newline bitfld.long 0x4C 28. "MSGVAL[125],Message valid bit 125" "Ignored,Not ignored" bitfld.long 0x4C 27. "MSGVAL[124],Message valid bit 124" "Ignored,Not ignored" bitfld.long 0x4C 26. "MSGVAL[123],Message valid bit 123" "Ignored,Not ignored" newline bitfld.long 0x4C 25. "MSGVAL[122],Message valid bit 122" "Ignored,Not ignored" bitfld.long 0x4C 24. "MSGVAL[121],Message valid bit 121" "Ignored,Not ignored" bitfld.long 0x4C 23. "MSGVAL[120],Message valid bit 120" "Ignored,Not ignored" newline bitfld.long 0x4C 22. "MSGVAL[119],Message valid bit 119" "Ignored,Not ignored" bitfld.long 0x4C 21. "MSGVAL[118],Message valid bit 118" "Ignored,Not ignored" bitfld.long 0x4C 20. "MSGVAL[117],Message valid bit 117" "Ignored,Not ignored" newline bitfld.long 0x4C 19. "MSGVAL[116],Message valid bit 116" "Ignored,Not ignored" bitfld.long 0x4C 18. "MSGVAL[115],Message valid bit 115" "Ignored,Not ignored" bitfld.long 0x4C 17. "MSGVAL[114],Message valid bit 114" "Ignored,Not ignored" newline bitfld.long 0x4C 16. "MSGVAL[113],Message valid bit 113" "Ignored,Not ignored" bitfld.long 0x4C 15. "MSGVAL[112],Message valid bit 112" "Ignored,Not ignored" bitfld.long 0x4C 14. "MSGVAL[111],Message valid bit 111" "Ignored,Not ignored" newline bitfld.long 0x4C 13. "MSGVAL[110],Message valid bit 110" "Ignored,Not ignored" bitfld.long 0x4C 12. "MSGVAL[109],Message valid bit 109" "Ignored,Not ignored" bitfld.long 0x4C 11. "MSGVAL[108],Message valid bit 108" "Ignored,Not ignored" newline bitfld.long 0x4C 10. "MSGVAL[107],Message valid bit 107" "Ignored,Not ignored" bitfld.long 0x4C 9. "MSGVAL[106],Message valid bit 106" "Ignored,Not ignored" bitfld.long 0x4C 8. "MSGVAL[105],Message valid bit 105" "Ignored,Not ignored" newline bitfld.long 0x4C 7. "MSGVAL[104],Message valid bit 104" "Ignored,Not ignored" bitfld.long 0x4C 6. "MSGVAL[103],Message valid bit 103" "Ignored,Not ignored" bitfld.long 0x4C 5. "MSGVAL[102],Message valid bit 102" "Ignored,Not ignored" newline bitfld.long 0x4C 4. "MSGVAL[101],Message valid bit 101" "Ignored,Not ignored" bitfld.long 0x4C 3. "MSGVAL[100],Message valid bit 100" "Ignored,Not ignored" bitfld.long 0x4C 2. "MSGVAL[99],Message valid bit 99" "Ignored,Not ignored" newline bitfld.long 0x4C 1. "MSGVAL[98],Message valid bit 98" "Ignored,Not ignored" bitfld.long 0x4C 0. "MSGVAL[97],Message valid bit 97" "Ignored,Not ignored" group.long 0xD8++0x0F line.long 0x00 "INTMUX12,Interrupt Multiplexer Register 12" bitfld.long 0x00 31. "INTMUX[32],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 30. "INTMUX[31],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 29. "INTMUX[30],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 28. "INTMUX[29],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 27. "INTMUX[28],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 26. "INTMUX[27],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 25. "INTMUX[26],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 24. "INTMUX[25],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 23. "INTMUX[24],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 22. "INTMUX[23],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 21. "INTMUX[22],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 20. "INTMUX[21],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 19. "INTMUX[20],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 18. "INTMUX[19],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 17. "INTMUX[18],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 16. "INTMUX[17],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 15. "INTMUX[16],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 14. "INTMUX[15],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 13. "INTMUX[14],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 12. "INTMUX[13],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 11. "INTMUX[12],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 10. "INTMUX[11],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 9. "INTMUX[10],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 8. "INTMUX[9],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 7. "INTMUX[8],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 6. "INTMUX[7],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 5. "INTMUX[6],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 4. "INTMUX[5],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 3. "INTMUX[4],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 2. "INTMUX[3],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 1. "INTMUX[2],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 0. "INTMUX[1],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" line.long 0x04 "INTMUX34,Interrupt Multiplexer Register 34" bitfld.long 0x04 31. "INTMUX[64],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 30. "INTMUX[63],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 29. "INTMUX[62],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 28. "INTMUX[61],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 27. "INTMUX[60],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 26. "INTMUX[59],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 25. "INTMUX[58],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 24. "INTMUX[57],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 23. "INTMUX[56],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 22. "INTMUX[55],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 21. "INTMUX[54],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 20. "INTMUX[53],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 19. "INTMUX[52],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 18. "INTMUX[51],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 17. "INTMUX[50],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 16. "INTMUX[49],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 15. "INTMUX[48],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 14. "INTMUX[47],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 13. "INTMUX[46],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 12. "INTMUX[45],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 11. "INTMUX[44],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 10. "INTMUX[43],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 9. "INTMUX[42],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 8. "INTMUX[41],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 7. "INTMUX[40],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 6. "INTMUX[39],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 5. "INTMUX[38],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 4. "INTMUX[37],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 3. "INTMUX[36],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 2. "INTMUX[35],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 1. "INTMUX[34],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 0. "INTMUX[33],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" line.long 0x08 "INTMUX56,Interrupt Multiplexer Register 56" bitfld.long 0x08 31. "INTMUX[96],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 30. "INTMUX[95],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 29. "INTMUX[94],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 28. "INTMUX[93],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 27. "INTMUX[92],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 26. "INTMUX[91],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 25. "INTMUX[9]0,Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 24. "INTMUX[89],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 23. "INTMUX[88],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 22. "INTMUX[87],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 21. "INTMUX[86],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 20. "INTMUX[85],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 19. "INTMUX[84],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 18. "INTMUX[83],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 17. "INTMUX[82],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 16. "INTMUX[81],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 15. "INTMUX[80],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 14. "INTMUX[79],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 13. "INTMUX[78],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 12. "INTMUX[77],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 11. "INTMUX[76],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 10. "INTMUX[75],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 9. "INTMUX[74],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 8. "INTMUX[73],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 7. "INTMUX[72],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 6. "INTMUX[71],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 5. "INTMUX[70],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 4. "INTMUX[69],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 3. "INTMUX[68],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 2. "INTMUX[67],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 1. "INTMUX[66],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 0. "INTMUX[65],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" line.long 0x0C "INTMUX78,Interrupt Multiplexer Register 78" bitfld.long 0x0C 31. "INTMUX[128],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 30. "INTMUX[127],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 29. "INTMUX[126],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 28. "INTMUX[125],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 27. "INTMUX[124,Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 26. "INTMUX[123,Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 25. "INTMUX[122],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 24. "INTMUX[121],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 23. "INTMUX[120],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 22. "INTMUX[119],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 21. "INTMUX[118],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 20. "INTMUX[117],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 19. "INTMUX[116],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 18. "INTMUX[115],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 17. "INTMUX[114],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 16. "INTMUX[113],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 15. "INTMUX[112],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 14. "INTMUX[111],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 13. "INTMUX[110],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 12. "INTMUX[109],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 11. "INTMUX[108],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 10. "INTMUX[107],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 9. "INTMUX[106],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 8. "INTMUX[105],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 7. "INTMUX[104],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 6. "INTMUX[103],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 5. "INTMUX[102],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 4. "INTMUX[101],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 3. "INTMUX[100],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 2. "INTMUX[99],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 1. "INTMUX[98],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 0. "INTMUX[97],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" if (1==3) group.long 0x100++0x03 line.long 0x00 "IF3OBS,IF3 Observation Register" rbitfld.long 0x00 15. "IF3_UPD,IF3 update data" "Not updated,Updated" rbitfld.long 0x00 12. "IF3_SDB,IF3 status of data B read access" "Read out,Not all readed" rbitfld.long 0x00 11. "IF3_SDA,IF3 status of data A read access" "Read out,Not all readed" newline rbitfld.long 0x00 10. "IF3_SC,IF3 status of control bits read access" "Read out,Not all readed" rbitfld.long 0x00 9. "IF3_SA,IF3 status of arbitration data read access" "Read out,Not all readed" rbitfld.long 0x00 8. "IF3_SA,IF3 status of mask data read access" "Read out,Not all readed" newline bitfld.long 0x00 4. "DATAB,Data B read observation" "Not read,Read" bitfld.long 0x00 3. "DATAA,Data A read observation" "Not read,Read" bitfld.long 0x00 2. "CTRL,Ctrl read observation" "Not read,Read" newline bitfld.long 0x00 1. "ARB,Arbitration data read observation" "Not read,Read" bitfld.long 0x00 0. "MASK,Mask data read observation" "Not read,Read" else if (((d.l(ad:0x481CC000+0x100))&0x8000)==0x8000) group.long 0x100++0x03 line.long 0x00 "IF1CMD,IF1 Command Register" rbitfld.long 0x00 23. "WR_RD,Write/read" "Read,Write" rbitfld.long 0x00 22. "MASK,Access mask bits" "Unchanged,Transfered" rbitfld.long 0x00 21. "ARB,Access arbitration bits" "Unchanged,Transfered" newline rbitfld.long 0x00 20. "CONTROL,Access control bits" "Unchanged,Transfered" rbitfld.long 0x00 19. "CLRINTPND,Clear interrupt pending bit" "Not cleared,Cleared" rbitfld.long 0x00 18. "TXRQST/NEWDAT,Access transmission request bit" "Cleared,Set" newline rbitfld.long 0x00 17. "DATA_A,Access data bytes 0-3" "Unchanged,Transfered" rbitfld.long 0x00 16. "DATA_B,Access data bytes 4-7" "Unchanged,Transfered" bitfld.long 0x00 15. "BUSY,Busy flag" "Not busy,Busy" newline rbitfld.long 0x00 14. "DMAACTIVE,Activation of DMA feature for subsequent internal IF1/2 update" "Not active,Active" hexmask.long.byte 0x00 0.--7. 1. "MESSAGE_NUMBER,Message number" else group.long 0x100++0x03 line.long 0x00 "IF1CMD,IF1 Command Register" bitfld.long 0x00 23. "WR_RD,Write/read" "Read,Write" bitfld.long 0x00 22. "MASK,Access mask bits" "Unchanged,Transfered" bitfld.long 0x00 21. "ARB,Access arbitration bits" "Unchanged,Transfered" newline bitfld.long 0x00 20. "CONTROL,Access control bits" "Unchanged,Transfered" bitfld.long 0x00 19. "CLRINTPND,Clear interrupt pending bit" "Not cleared,Cleared" bitfld.long 0x00 18. "TXRQST/NEWDAT,Access transmission request bit" "Cleared,Set" newline bitfld.long 0x00 17. "DATA_A,Access data bytes 0-3" "Unchanged,Transfered" bitfld.long 0x00 16. "DATA_B,Access data bytes 4-7" "Unchanged,Transfered" bitfld.long 0x00 15. "BUSY,Busy flag" "Not busy,Busy" newline bitfld.long 0x00 14. "DMAACTIVE,Activation of DMA feature for subsequent internal IF1/2 update" "Not active,Active" hexmask.long.byte 0x00 0.--7. 1. "MESSAGE_NUMBER,Message number" endif endif if ((((d.l(ad:0x481CC000+0x100))&0x8000)==0x8000)&&(((d.l(ad:0x481CC000+0x100+0x08))&0x40000000)==0x40000000)) rgroup.long (0x100+0x04)++0x03 line.long 0x00 "IF1MSK,IF1 Mask Register" bitfld.long 0x00 31. "MXTD,Mask extended identifier" "Disabled,Enabled" bitfld.long 0x00 30. "MDIR,Mask message direction" "Disabled,Enabled" bitfld.long 0x00 28. "MSK[28],Identifier mask 28" "Not used,Used" newline bitfld.long 0x00 27. "MSK[27],Identifier mask 27" "Not used,Used" bitfld.long 0x00 26. "MSK[26],Identifier mask 26" "Not used,Used" bitfld.long 0x00 25. "MSK[25],Identifier mask 25" "Not used,Used" newline bitfld.long 0x00 24. "MSK[24],Identifier mask 24" "Not used,Used" bitfld.long 0x00 23. "MSK[23],Identifier mask 23" "Not used,Used" bitfld.long 0x00 22. "MSK[22],Identifier mask 22" "Not used,Used" newline bitfld.long 0x00 21. "MSK[21],Identifier mask 21" "Not used,Used" bitfld.long 0x00 20. "MSK[20],Identifier mask 20" "Not used,Used" bitfld.long 0x00 19. "MSK[19],Identifier mask 19" "Not used,Used" newline bitfld.long 0x00 18. "MSK[18],Identifier mask 18" "Not used,Used" bitfld.long 0x00 17. "MSK[17],Identifier mask 17" "Not used,Used" bitfld.long 0x00 16. "MSK[16],Identifier mask 16" "Not used,Used" newline bitfld.long 0x00 15. "MSK[15],Identifier mask 15" "Not used,Used" bitfld.long 0x00 14. "MSK[14],Identifier mask 14" "Not used,Used" bitfld.long 0x00 13. "MSK[13],Identifier mask 13" "Not used,Used" newline bitfld.long 0x00 12. "MSK[12],Identifier mask 12" "Not used,Used" bitfld.long 0x00 11. "MSK[11],Identifier mask 11" "Not used,Used" bitfld.long 0x00 10. "MSK[10],Identifier mask 10" "Not used,Used" newline bitfld.long 0x00 9. "MSK[9],Identifier mask 9" "Not used,Used" bitfld.long 0x00 8. "MSK[8],Identifier mask 8" "Not used,Used" bitfld.long 0x00 7. "MSK[7],Identifier mask 7" "Not used,Used" newline bitfld.long 0x00 6. "MSK[6],Identifier mask 6" "Not used,Used" bitfld.long 0x00 5. "MSK[5],Identifier mask 5" "Not used,Used" bitfld.long 0x00 4. "MSK[4],Identifier mask 4" "Not used,Used" newline bitfld.long 0x00 3. "MSK[3],Identifier mask 3" "Not used,Used" bitfld.long 0x00 2. "MSK[2],Identifier mask 2" "Not used,Used" bitfld.long 0x00 1. "MSK[1],Identifier mask 1" "Not used,Used" newline bitfld.long 0x00 0. "MSK[0],Identifier mask 0" "Not used,Used" elif ((((d.l(ad:0x481CC000+0x100))&0x8000)==0x00)&&(((d.l(ad:0x481CC000+0x100+0x08))&0x40000000)==0x40000000)) group.long (0x100+0x04)++0x03 line.long 0x00 "IF1MSK,IF1 Mask Register" bitfld.long 0x00 31. "MXTD,Mask extended identifier" "Disabled,Enabled" bitfld.long 0x00 30. "MDIR,Mask message direction" "Disabled,Enabled" bitfld.long 0x00 28. "MSK[28],Identifier mask 28" "Not used,Used" newline bitfld.long 0x00 27. "MSK[27],Identifier mask 27" "Not used,Used" bitfld.long 0x00 26. "MSK[26],Identifier mask 26" "Not used,Used" bitfld.long 0x00 25. "MSK[25],Identifier mask 25" "Not used,Used" newline bitfld.long 0x00 24. "MSK[24],Identifier mask 24" "Not used,Used" bitfld.long 0x00 23. "MSK[23],Identifier mask 23" "Not used,Used" bitfld.long 0x00 22. "MSK[22],Identifier mask 22" "Not used,Used" newline bitfld.long 0x00 21. "MSK[21],Identifier mask 21" "Not used,Used" bitfld.long 0x00 20. "MSK[20],Identifier mask 20" "Not used,Used" bitfld.long 0x00 19. "MSK[19],Identifier mask 19" "Not used,Used" newline bitfld.long 0x00 18. "MSK[18],Identifier mask 18" "Not used,Used" bitfld.long 0x00 17. "MSK[17],Identifier mask 17" "Not used,Used" bitfld.long 0x00 16. "MSK[16],Identifier mask 16" "Not used,Used" newline bitfld.long 0x00 15. "MSK[15],Identifier mask 15" "Not used,Used" bitfld.long 0x00 14. "MSK[14],Identifier mask 14" "Not used,Used" bitfld.long 0x00 13. "MSK[13],Identifier mask 13" "Not used,Used" newline bitfld.long 0x00 12. "MSK[12],Identifier mask 12" "Not used,Used" bitfld.long 0x00 11. "MSK[11],Identifier mask 11" "Not used,Used" bitfld.long 0x00 10. "MSK[10],Identifier mask 10" "Not used,Used" newline bitfld.long 0x00 9. "MSK[9],Identifier mask 9" "Not used,Used" bitfld.long 0x00 8. "MSK[8],Identifier mask 8" "Not used,Used" bitfld.long 0x00 7. "MSK[7],Identifier mask 7" "Not used,Used" newline bitfld.long 0x00 6. "MSK[6],Identifier mask 6" "Not used,Used" bitfld.long 0x00 5. "MSK[5],Identifier mask 5" "Not used,Used" bitfld.long 0x00 4. "MSK[4],Identifier mask 4" "Not used,Used" newline bitfld.long 0x00 3. "MSK[3],Identifier mask 3" "Not used,Used" bitfld.long 0x00 2. "MSK[2],Identifier mask 2" "Not used,Used" bitfld.long 0x00 1. "MSK[1],Identifier mask 1" "Not used,Used" newline bitfld.long 0x00 0. "MSK[0],Identifier mask 0" "Not used,Used" elif ((((d.l(ad:0x481CC000+0x100))&0x8000)==0x8000)&&(((d.l(ad:0x481CC000+0x100+0x08))&0x40000000)==0x00)) rgroup.long (0x100+0x04)++0x03 line.long 0x00 "IF1MSK,IF1 Mask Register" bitfld.long 0x00 31. "MXTD,Mask extended identifier" "Disabled,Enabled" bitfld.long 0x00 30. "MDIR,Mask message direction" "Disabled,Enabled" bitfld.long 0x00 28. "MSK[28],Identifier mask 28" "Not used,Used" newline bitfld.long 0x00 27. "MSK[27],Identifier mask 27" "Not used,Used" bitfld.long 0x00 26. "MSK[26],Identifier mask 26" "Not used,Used" bitfld.long 0x00 25. "MSK[25],Identifier mask 25" "Not used,Used" newline bitfld.long 0x00 24. "MSK[24],Identifier mask 24" "Not used,Used" bitfld.long 0x00 23. "MSK[23],Identifier mask 23" "Not used,Used" bitfld.long 0x00 22. "MSK[22],Identifier mask 22" "Not used,Used" newline bitfld.long 0x00 21. "MSK[21],Identifier mask 21" "Not used,Used" bitfld.long 0x00 20. "MSK[20],Identifier mask 20" "Not used,Used" bitfld.long 0x00 19. "MSK[19],Identifier mask 19" "Not used,Used" newline bitfld.long 0x00 18. "MSK[18],Identifier mask 18" "Not used,Used" else group.long (0x100+0x04)++0x03 line.long 0x00 "IF1MSK,IF1 Mask Register" bitfld.long 0x00 31. "MXTD,Mask extended identifier" "Disabled,Enabled" bitfld.long 0x00 30. "MDIR,Mask message direction" "Disabled,Enabled" bitfld.long 0x00 28. "MSK[28],Identifier mask 28" "Not used,Used" newline bitfld.long 0x00 27. "MSK[27],Identifier mask 27" "Not used,Used" bitfld.long 0x00 26. "MSK[26],Identifier mask 26" "Not used,Used" bitfld.long 0x00 25. "MSK[25],Identifier mask 25" "Not used,Used" newline bitfld.long 0x00 24. "MSK[24],Identifier mask 24" "Not used,Used" bitfld.long 0x00 23. "MSK[23],Identifier mask 23" "Not used,Used" bitfld.long 0x00 22. "MSK[22],Identifier mask 22" "Not used,Used" newline bitfld.long 0x00 21. "MSK[21],Identifier mask 21" "Not used,Used" bitfld.long 0x00 20. "MSK[20],Identifier mask 20" "Not used,Used" bitfld.long 0x00 19. "MSK[19],Identifier mask 19" "Not used,Used" newline bitfld.long 0x00 18. "MSK[18],Identifier mask 18" "Not used,Used" endif if ((((d.l(ad:0x481CC000+0x100))&0x8000)==0x8000)&&(((d.l(ad:0x481CC000+0x100+0x08))&0x40000000)==0x40000000)) rgroup.long (0x100+0x08)++0x03 line.long 0x00 "IF1ARB,IF1 Arbitation Register" bitfld.long 0x00 31. "MSGVAL,Message valid" "Not valid,Valid" bitfld.long 0x00 30. "XTD,Extended identifier" "Standard,Extended" bitfld.long 0x00 29. "DIR,Message direction" "Receive,Transmit" newline hexmask.long 0x00 0.--28. 1. "ID28-0,Message identifier 29-bit identifier" elif ((((d.l(ad:0x481CC000+0x100))&0x8000)==0x00)&&(((d.l(ad:0x481CC000+0x100+0x08))&0x40000000)==0x40000000)) group.long (0x100+0x08)++0x03 line.long 0x00 "IF1ARB,IF1 Arbitation Register" bitfld.long 0x00 31. "MSGVAL,Message valid" "Not valid,Valid" bitfld.long 0x00 30. "XTD,Extended identifier" "Standard,Extended" bitfld.long 0x00 29. "DIR,Message direction" "Receive,Transmit" newline hexmask.long 0x00 0.--28. 1. "ID28-0,Message identifier 29-bit identifier" elif ((((d.l(ad:0x481CC000+0x100))&0x8000)==0x00)&&(((d.l(ad:0x481CC000+0x100+0x08))&0x40000000)==0x00)) group.long (0x100+0x08)++0x03 line.long 0x00 "IF1ARB,IF1 Arbitation Register" bitfld.long 0x00 31. "MSGVAL,Message valid" "Not valid,Valid" bitfld.long 0x00 30. "XTD,Extended identifier" "Standard,Extended" bitfld.long 0x00 29. "DIR,Message direction" "Receive,Transmit" newline hexmask.long.word 0x00 18.--28. 1. "ID28-18,Message identifier 11-bit identifier" else rgroup.long (0x100+0x08)++0x03 line.long 0x00 "IF1ARB,IF1 Arbitation Register" bitfld.long 0x00 31. "MSGVAL,Message valid" "Not valid,Valid" bitfld.long 0x00 30. "XTD,Extended identifier" "Standard,Extended" bitfld.long 0x00 29. "DIR,Message direction" "Receive,Transmit" newline hexmask.long.word 0x00 18.--28. 1. "ID28-18,Message identifier 11-bit identifier" endif if (((d.l(ad:0x481CC000+0x100))&0x8000)==0x8000) rgroup.long (0x100+0x0C)++0x03 line.long 0x00 "IF1MCTL,IF1 Message Control Register" bitfld.long 0x00 15. "NEWDAT,New data" "Not written,Written" bitfld.long 0x00 14. "MSGLST,Message lost" "Not lost,Lost" bitfld.long 0x00 13. "INTPND,Interrupt pending" "Not pending,Pending" newline bitfld.long 0x00 12. "UMASK,Use acceptance mask" "Not used,Used" bitfld.long 0x00 11. "TXIE,Transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. "RXIE,Receive interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "RMTEN,Remote enable" "Disabled,Enabled" bitfld.long 0x00 8. "TXRQST,Transmit request" "Not requested,Requested" bitfld.long 0x00 7. "EOB,End of block" "Not end,End" newline bitfld.long 0x00 0.--3. "DLC,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" else group.long (0x100+0x0C)++0x03 line.long 0x00 "IF1MCTL,IF1 Message Control Register" bitfld.long 0x00 15. "NEWDAT,New data" "Not written,Written" bitfld.long 0x00 14. "MSGLST,Message lost" "Not lost,Lost" bitfld.long 0x00 13. "INTPND,Interrupt pending" "Not pending,Pending" newline bitfld.long 0x00 12. "UMASK,Use acceptance mask" "Not used,Used" bitfld.long 0x00 11. "TXIE,Transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. "RXIE,Receive interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "RMTEN,Remote enable" "Disabled,Enabled" bitfld.long 0x00 8. "TXRQST,Transmit request" "Not requested,Requested" bitfld.long 0x00 7. "EOB,End of block" "Not end,End" newline bitfld.long 0x00 0.--3. "DLC,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" endif if (1==3) rgroup.long (0x100+0x10)++0x07 line.long 0x00 "IF1DATA,IF1 Data A Register" hexmask.long.byte 0x00 24.--31. 1. "DATA_3,Data 3 value" hexmask.long.byte 0x00 16.--23. 1. "DATA_2,Data 2 value" hexmask.long.byte 0x00 8.--15. 1. "DATA_1,Data 1 value" newline hexmask.long.byte 0x00 0.--7. 1. "DATA_0,Data 0 value" line.long 0x04 "IF1DATB,IF1 Data B Register" hexmask.long.byte 0x04 24.--31. 1. "DATA_7,Data 7 value" hexmask.long.byte 0x04 16.--23. 1. "DATA_6,Data 6 value" hexmask.long.byte 0x04 8.--15. 1. "DATA_5,Data 5 value" newline hexmask.long.byte 0x04 0.--7. 1. "DATA_4,Data 4 value" else group.long (0x100+0x10)++0x07 line.long 0x00 "IF1DATA,IF1 Data A Register" hexmask.long.byte 0x00 24.--31. 1. "DATA_3,Data 3 value" hexmask.long.byte 0x00 16.--23. 1. "DATA_2,Data 2 value" hexmask.long.byte 0x00 8.--15. 1. "DATA_1,Data 1 value" newline hexmask.long.byte 0x00 0.--7. 1. "DATA_0,Data 0 value" line.long 0x04 "IF1DATB,IF1 Data B Register" hexmask.long.byte 0x04 24.--31. 1. "DATA_7,Data 7 value" hexmask.long.byte 0x04 16.--23. 1. "DATA_6,Data 6 value" hexmask.long.byte 0x04 8.--15. 1. "DATA_5,Data 5 value" newline hexmask.long.byte 0x04 0.--7. 1. "DATA_4,Data 4 value" endif if (2==3) group.long 0x120++0x03 line.long 0x00 "IF3OBS,IF3 Observation Register" rbitfld.long 0x00 15. "IF3_UPD,IF3 update data" "Not updated,Updated" rbitfld.long 0x00 12. "IF3_SDB,IF3 status of data B read access" "Read out,Not all readed" rbitfld.long 0x00 11. "IF3_SDA,IF3 status of data A read access" "Read out,Not all readed" newline rbitfld.long 0x00 10. "IF3_SC,IF3 status of control bits read access" "Read out,Not all readed" rbitfld.long 0x00 9. "IF3_SA,IF3 status of arbitration data read access" "Read out,Not all readed" rbitfld.long 0x00 8. "IF3_SA,IF3 status of mask data read access" "Read out,Not all readed" newline bitfld.long 0x00 4. "DATAB,Data B read observation" "Not read,Read" bitfld.long 0x00 3. "DATAA,Data A read observation" "Not read,Read" bitfld.long 0x00 2. "CTRL,Ctrl read observation" "Not read,Read" newline bitfld.long 0x00 1. "ARB,Arbitration data read observation" "Not read,Read" bitfld.long 0x00 0. "MASK,Mask data read observation" "Not read,Read" else if (((d.l(ad:0x481CC000+0x120))&0x8000)==0x8000) group.long 0x120++0x03 line.long 0x00 "IF2CMD,IF2 Command Register" rbitfld.long 0x00 23. "WR_RD,Write/read" "Read,Write" rbitfld.long 0x00 22. "MASK,Access mask bits" "Unchanged,Transfered" rbitfld.long 0x00 21. "ARB,Access arbitration bits" "Unchanged,Transfered" newline rbitfld.long 0x00 20. "CONTROL,Access control bits" "Unchanged,Transfered" rbitfld.long 0x00 19. "CLRINTPND,Clear interrupt pending bit" "Not cleared,Cleared" rbitfld.long 0x00 18. "TXRQST/NEWDAT,Access transmission request bit" "Cleared,Set" newline rbitfld.long 0x00 17. "DATA_A,Access data bytes 0-3" "Unchanged,Transfered" rbitfld.long 0x00 16. "DATA_B,Access data bytes 4-7" "Unchanged,Transfered" bitfld.long 0x00 15. "BUSY,Busy flag" "Not busy,Busy" newline rbitfld.long 0x00 14. "DMAACTIVE,Activation of DMA feature for subsequent internal IF1/2 update" "Not active,Active" hexmask.long.byte 0x00 0.--7. 1. "MESSAGE_NUMBER,Message number" else group.long 0x120++0x03 line.long 0x00 "IF2CMD,IF2 Command Register" bitfld.long 0x00 23. "WR_RD,Write/read" "Read,Write" bitfld.long 0x00 22. "MASK,Access mask bits" "Unchanged,Transfered" bitfld.long 0x00 21. "ARB,Access arbitration bits" "Unchanged,Transfered" newline bitfld.long 0x00 20. "CONTROL,Access control bits" "Unchanged,Transfered" bitfld.long 0x00 19. "CLRINTPND,Clear interrupt pending bit" "Not cleared,Cleared" bitfld.long 0x00 18. "TXRQST/NEWDAT,Access transmission request bit" "Cleared,Set" newline bitfld.long 0x00 17. "DATA_A,Access data bytes 0-3" "Unchanged,Transfered" bitfld.long 0x00 16. "DATA_B,Access data bytes 4-7" "Unchanged,Transfered" bitfld.long 0x00 15. "BUSY,Busy flag" "Not busy,Busy" newline bitfld.long 0x00 14. "DMAACTIVE,Activation of DMA feature for subsequent internal IF1/2 update" "Not active,Active" hexmask.long.byte 0x00 0.--7. 1. "MESSAGE_NUMBER,Message number" endif endif if ((((d.l(ad:0x481CC000+0x120))&0x8000)==0x8000)&&(((d.l(ad:0x481CC000+0x120+0x08))&0x40000000)==0x40000000)) rgroup.long (0x120+0x04)++0x03 line.long 0x00 "IF2MSK,IF2 Mask Register" bitfld.long 0x00 31. "MXTD,Mask extended identifier" "Disabled,Enabled" bitfld.long 0x00 30. "MDIR,Mask message direction" "Disabled,Enabled" bitfld.long 0x00 28. "MSK[28],Identifier mask 28" "Not used,Used" newline bitfld.long 0x00 27. "MSK[27],Identifier mask 27" "Not used,Used" bitfld.long 0x00 26. "MSK[26],Identifier mask 26" "Not used,Used" bitfld.long 0x00 25. "MSK[25],Identifier mask 25" "Not used,Used" newline bitfld.long 0x00 24. "MSK[24],Identifier mask 24" "Not used,Used" bitfld.long 0x00 23. "MSK[23],Identifier mask 23" "Not used,Used" bitfld.long 0x00 22. "MSK[22],Identifier mask 22" "Not used,Used" newline bitfld.long 0x00 21. "MSK[21],Identifier mask 21" "Not used,Used" bitfld.long 0x00 20. "MSK[20],Identifier mask 20" "Not used,Used" bitfld.long 0x00 19. "MSK[19],Identifier mask 19" "Not used,Used" newline bitfld.long 0x00 18. "MSK[18],Identifier mask 18" "Not used,Used" bitfld.long 0x00 17. "MSK[17],Identifier mask 17" "Not used,Used" bitfld.long 0x00 16. "MSK[16],Identifier mask 16" "Not used,Used" newline bitfld.long 0x00 15. "MSK[15],Identifier mask 15" "Not used,Used" bitfld.long 0x00 14. "MSK[14],Identifier mask 14" "Not used,Used" bitfld.long 0x00 13. "MSK[13],Identifier mask 13" "Not used,Used" newline bitfld.long 0x00 12. "MSK[12],Identifier mask 12" "Not used,Used" bitfld.long 0x00 11. "MSK[11],Identifier mask 11" "Not used,Used" bitfld.long 0x00 10. "MSK[10],Identifier mask 10" "Not used,Used" newline bitfld.long 0x00 9. "MSK[9],Identifier mask 9" "Not used,Used" bitfld.long 0x00 8. "MSK[8],Identifier mask 8" "Not used,Used" bitfld.long 0x00 7. "MSK[7],Identifier mask 7" "Not used,Used" newline bitfld.long 0x00 6. "MSK[6],Identifier mask 6" "Not used,Used" bitfld.long 0x00 5. "MSK[5],Identifier mask 5" "Not used,Used" bitfld.long 0x00 4. "MSK[4],Identifier mask 4" "Not used,Used" newline bitfld.long 0x00 3. "MSK[3],Identifier mask 3" "Not used,Used" bitfld.long 0x00 2. "MSK[2],Identifier mask 2" "Not used,Used" bitfld.long 0x00 1. "MSK[1],Identifier mask 1" "Not used,Used" newline bitfld.long 0x00 0. "MSK[0],Identifier mask 0" "Not used,Used" elif ((((d.l(ad:0x481CC000+0x120))&0x8000)==0x00)&&(((d.l(ad:0x481CC000+0x120+0x08))&0x40000000)==0x40000000)) group.long (0x120+0x04)++0x03 line.long 0x00 "IF2MSK,IF2 Mask Register" bitfld.long 0x00 31. "MXTD,Mask extended identifier" "Disabled,Enabled" bitfld.long 0x00 30. "MDIR,Mask message direction" "Disabled,Enabled" bitfld.long 0x00 28. "MSK[28],Identifier mask 28" "Not used,Used" newline bitfld.long 0x00 27. "MSK[27],Identifier mask 27" "Not used,Used" bitfld.long 0x00 26. "MSK[26],Identifier mask 26" "Not used,Used" bitfld.long 0x00 25. "MSK[25],Identifier mask 25" "Not used,Used" newline bitfld.long 0x00 24. "MSK[24],Identifier mask 24" "Not used,Used" bitfld.long 0x00 23. "MSK[23],Identifier mask 23" "Not used,Used" bitfld.long 0x00 22. "MSK[22],Identifier mask 22" "Not used,Used" newline bitfld.long 0x00 21. "MSK[21],Identifier mask 21" "Not used,Used" bitfld.long 0x00 20. "MSK[20],Identifier mask 20" "Not used,Used" bitfld.long 0x00 19. "MSK[19],Identifier mask 19" "Not used,Used" newline bitfld.long 0x00 18. "MSK[18],Identifier mask 18" "Not used,Used" bitfld.long 0x00 17. "MSK[17],Identifier mask 17" "Not used,Used" bitfld.long 0x00 16. "MSK[16],Identifier mask 16" "Not used,Used" newline bitfld.long 0x00 15. "MSK[15],Identifier mask 15" "Not used,Used" bitfld.long 0x00 14. "MSK[14],Identifier mask 14" "Not used,Used" bitfld.long 0x00 13. "MSK[13],Identifier mask 13" "Not used,Used" newline bitfld.long 0x00 12. "MSK[12],Identifier mask 12" "Not used,Used" bitfld.long 0x00 11. "MSK[11],Identifier mask 11" "Not used,Used" bitfld.long 0x00 10. "MSK[10],Identifier mask 10" "Not used,Used" newline bitfld.long 0x00 9. "MSK[9],Identifier mask 9" "Not used,Used" bitfld.long 0x00 8. "MSK[8],Identifier mask 8" "Not used,Used" bitfld.long 0x00 7. "MSK[7],Identifier mask 7" "Not used,Used" newline bitfld.long 0x00 6. "MSK[6],Identifier mask 6" "Not used,Used" bitfld.long 0x00 5. "MSK[5],Identifier mask 5" "Not used,Used" bitfld.long 0x00 4. "MSK[4],Identifier mask 4" "Not used,Used" newline bitfld.long 0x00 3. "MSK[3],Identifier mask 3" "Not used,Used" bitfld.long 0x00 2. "MSK[2],Identifier mask 2" "Not used,Used" bitfld.long 0x00 1. "MSK[1],Identifier mask 1" "Not used,Used" newline bitfld.long 0x00 0. "MSK[0],Identifier mask 0" "Not used,Used" elif ((((d.l(ad:0x481CC000+0x120))&0x8000)==0x8000)&&(((d.l(ad:0x481CC000+0x120+0x08))&0x40000000)==0x00)) rgroup.long (0x120+0x04)++0x03 line.long 0x00 "IF2MSK,IF2 Mask Register" bitfld.long 0x00 31. "MXTD,Mask extended identifier" "Disabled,Enabled" bitfld.long 0x00 30. "MDIR,Mask message direction" "Disabled,Enabled" bitfld.long 0x00 28. "MSK[28],Identifier mask 28" "Not used,Used" newline bitfld.long 0x00 27. "MSK[27],Identifier mask 27" "Not used,Used" bitfld.long 0x00 26. "MSK[26],Identifier mask 26" "Not used,Used" bitfld.long 0x00 25. "MSK[25],Identifier mask 25" "Not used,Used" newline bitfld.long 0x00 24. "MSK[24],Identifier mask 24" "Not used,Used" bitfld.long 0x00 23. "MSK[23],Identifier mask 23" "Not used,Used" bitfld.long 0x00 22. "MSK[22],Identifier mask 22" "Not used,Used" newline bitfld.long 0x00 21. "MSK[21],Identifier mask 21" "Not used,Used" bitfld.long 0x00 20. "MSK[20],Identifier mask 20" "Not used,Used" bitfld.long 0x00 19. "MSK[19],Identifier mask 19" "Not used,Used" newline bitfld.long 0x00 18. "MSK[18],Identifier mask 18" "Not used,Used" else group.long (0x120+0x04)++0x03 line.long 0x00 "IF2MSK,IF2 Mask Register" bitfld.long 0x00 31. "MXTD,Mask extended identifier" "Disabled,Enabled" bitfld.long 0x00 30. "MDIR,Mask message direction" "Disabled,Enabled" bitfld.long 0x00 28. "MSK[28],Identifier mask 28" "Not used,Used" newline bitfld.long 0x00 27. "MSK[27],Identifier mask 27" "Not used,Used" bitfld.long 0x00 26. "MSK[26],Identifier mask 26" "Not used,Used" bitfld.long 0x00 25. "MSK[25],Identifier mask 25" "Not used,Used" newline bitfld.long 0x00 24. "MSK[24],Identifier mask 24" "Not used,Used" bitfld.long 0x00 23. "MSK[23],Identifier mask 23" "Not used,Used" bitfld.long 0x00 22. "MSK[22],Identifier mask 22" "Not used,Used" newline bitfld.long 0x00 21. "MSK[21],Identifier mask 21" "Not used,Used" bitfld.long 0x00 20. "MSK[20],Identifier mask 20" "Not used,Used" bitfld.long 0x00 19. "MSK[19],Identifier mask 19" "Not used,Used" newline bitfld.long 0x00 18. "MSK[18],Identifier mask 18" "Not used,Used" endif if ((((d.l(ad:0x481CC000+0x120))&0x8000)==0x8000)&&(((d.l(ad:0x481CC000+0x120+0x08))&0x40000000)==0x40000000)) rgroup.long (0x120+0x08)++0x03 line.long 0x00 "IF2ARB,IF2 Arbitation Register" bitfld.long 0x00 31. "MSGVAL,Message valid" "Not valid,Valid" bitfld.long 0x00 30. "XTD,Extended identifier" "Standard,Extended" bitfld.long 0x00 29. "DIR,Message direction" "Receive,Transmit" newline hexmask.long 0x00 0.--28. 1. "ID28-0,Message identifier 29-bit identifier" elif ((((d.l(ad:0x481CC000+0x120))&0x8000)==0x00)&&(((d.l(ad:0x481CC000+0x120+0x08))&0x40000000)==0x40000000)) group.long (0x120+0x08)++0x03 line.long 0x00 "IF2ARB,IF2 Arbitation Register" bitfld.long 0x00 31. "MSGVAL,Message valid" "Not valid,Valid" bitfld.long 0x00 30. "XTD,Extended identifier" "Standard,Extended" bitfld.long 0x00 29. "DIR,Message direction" "Receive,Transmit" newline hexmask.long 0x00 0.--28. 1. "ID28-0,Message identifier 29-bit identifier" elif ((((d.l(ad:0x481CC000+0x120))&0x8000)==0x00)&&(((d.l(ad:0x481CC000+0x120+0x08))&0x40000000)==0x00)) group.long (0x120+0x08)++0x03 line.long 0x00 "IF2ARB,IF2 Arbitation Register" bitfld.long 0x00 31. "MSGVAL,Message valid" "Not valid,Valid" bitfld.long 0x00 30. "XTD,Extended identifier" "Standard,Extended" bitfld.long 0x00 29. "DIR,Message direction" "Receive,Transmit" newline hexmask.long.word 0x00 18.--28. 1. "ID28-18,Message identifier 11-bit identifier" else rgroup.long (0x120+0x08)++0x03 line.long 0x00 "IF2ARB,IF2 Arbitation Register" bitfld.long 0x00 31. "MSGVAL,Message valid" "Not valid,Valid" bitfld.long 0x00 30. "XTD,Extended identifier" "Standard,Extended" bitfld.long 0x00 29. "DIR,Message direction" "Receive,Transmit" newline hexmask.long.word 0x00 18.--28. 1. "ID28-18,Message identifier 11-bit identifier" endif if (((d.l(ad:0x481CC000+0x120))&0x8000)==0x8000) rgroup.long (0x120+0x0C)++0x03 line.long 0x00 "IF2MCTL,IF2 Message Control Register" bitfld.long 0x00 15. "NEWDAT,New data" "Not written,Written" bitfld.long 0x00 14. "MSGLST,Message lost" "Not lost,Lost" bitfld.long 0x00 13. "INTPND,Interrupt pending" "Not pending,Pending" newline bitfld.long 0x00 12. "UMASK,Use acceptance mask" "Not used,Used" bitfld.long 0x00 11. "TXIE,Transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. "RXIE,Receive interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "RMTEN,Remote enable" "Disabled,Enabled" bitfld.long 0x00 8. "TXRQST,Transmit request" "Not requested,Requested" bitfld.long 0x00 7. "EOB,End of block" "Not end,End" newline bitfld.long 0x00 0.--3. "DLC,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" else group.long (0x120+0x0C)++0x03 line.long 0x00 "IF2MCTL,IF2 Message Control Register" bitfld.long 0x00 15. "NEWDAT,New data" "Not written,Written" bitfld.long 0x00 14. "MSGLST,Message lost" "Not lost,Lost" bitfld.long 0x00 13. "INTPND,Interrupt pending" "Not pending,Pending" newline bitfld.long 0x00 12. "UMASK,Use acceptance mask" "Not used,Used" bitfld.long 0x00 11. "TXIE,Transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. "RXIE,Receive interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "RMTEN,Remote enable" "Disabled,Enabled" bitfld.long 0x00 8. "TXRQST,Transmit request" "Not requested,Requested" bitfld.long 0x00 7. "EOB,End of block" "Not end,End" newline bitfld.long 0x00 0.--3. "DLC,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" endif if (2==3) rgroup.long (0x120+0x10)++0x07 line.long 0x00 "IF2DATA,IF2 Data A Register" hexmask.long.byte 0x00 24.--31. 1. "DATA_3,Data 3 value" hexmask.long.byte 0x00 16.--23. 1. "DATA_2,Data 2 value" hexmask.long.byte 0x00 8.--15. 1. "DATA_1,Data 1 value" newline hexmask.long.byte 0x00 0.--7. 1. "DATA_0,Data 0 value" line.long 0x04 "IF2DATB,IF2 Data B Register" hexmask.long.byte 0x04 24.--31. 1. "DATA_7,Data 7 value" hexmask.long.byte 0x04 16.--23. 1. "DATA_6,Data 6 value" hexmask.long.byte 0x04 8.--15. 1. "DATA_5,Data 5 value" newline hexmask.long.byte 0x04 0.--7. 1. "DATA_4,Data 4 value" else group.long (0x120+0x10)++0x07 line.long 0x00 "IF2DATA,IF2 Data A Register" hexmask.long.byte 0x00 24.--31. 1. "DATA_3,Data 3 value" hexmask.long.byte 0x00 16.--23. 1. "DATA_2,Data 2 value" hexmask.long.byte 0x00 8.--15. 1. "DATA_1,Data 1 value" newline hexmask.long.byte 0x00 0.--7. 1. "DATA_0,Data 0 value" line.long 0x04 "IF2DATB,IF2 Data B Register" hexmask.long.byte 0x04 24.--31. 1. "DATA_7,Data 7 value" hexmask.long.byte 0x04 16.--23. 1. "DATA_6,Data 6 value" hexmask.long.byte 0x04 8.--15. 1. "DATA_5,Data 5 value" newline hexmask.long.byte 0x04 0.--7. 1. "DATA_4,Data 4 value" endif if (3==3) group.long 0x140++0x03 line.long 0x00 "IF3OBS,IF3 Observation Register" rbitfld.long 0x00 15. "IF3_UPD,IF3 update data" "Not updated,Updated" rbitfld.long 0x00 12. "IF3_SDB,IF3 status of data B read access" "Read out,Not all readed" rbitfld.long 0x00 11. "IF3_SDA,IF3 status of data A read access" "Read out,Not all readed" newline rbitfld.long 0x00 10. "IF3_SC,IF3 status of control bits read access" "Read out,Not all readed" rbitfld.long 0x00 9. "IF3_SA,IF3 status of arbitration data read access" "Read out,Not all readed" rbitfld.long 0x00 8. "IF3_SA,IF3 status of mask data read access" "Read out,Not all readed" newline bitfld.long 0x00 4. "DATAB,Data B read observation" "Not read,Read" bitfld.long 0x00 3. "DATAA,Data A read observation" "Not read,Read" bitfld.long 0x00 2. "CTRL,Ctrl read observation" "Not read,Read" newline bitfld.long 0x00 1. "ARB,Arbitration data read observation" "Not read,Read" bitfld.long 0x00 0. "MASK,Mask data read observation" "Not read,Read" else if (((d.l(ad:0x481CC000+0x140))&0x8000)==0x8000) group.long 0x140++0x03 line.long 0x00 "IF3CMD,IF3 Command Register" rbitfld.long 0x00 23. "WR_RD,Write/read" "Read,Write" rbitfld.long 0x00 22. "MASK,Access mask bits" "Unchanged,Transfered" rbitfld.long 0x00 21. "ARB,Access arbitration bits" "Unchanged,Transfered" newline rbitfld.long 0x00 20. "CONTROL,Access control bits" "Unchanged,Transfered" rbitfld.long 0x00 19. "CLRINTPND,Clear interrupt pending bit" "Not cleared,Cleared" rbitfld.long 0x00 18. "TXRQST/NEWDAT,Access transmission request bit" "Cleared,Set" newline rbitfld.long 0x00 17. "DATA_A,Access data bytes 0-3" "Unchanged,Transfered" rbitfld.long 0x00 16. "DATA_B,Access data bytes 4-7" "Unchanged,Transfered" bitfld.long 0x00 15. "BUSY,Busy flag" "Not busy,Busy" newline rbitfld.long 0x00 14. "DMAACTIVE,Activation of DMA feature for subsequent internal IF1/2 update" "Not active,Active" hexmask.long.byte 0x00 0.--7. 1. "MESSAGE_NUMBER,Message number" else group.long 0x140++0x03 line.long 0x00 "IF3CMD,IF3 Command Register" bitfld.long 0x00 23. "WR_RD,Write/read" "Read,Write" bitfld.long 0x00 22. "MASK,Access mask bits" "Unchanged,Transfered" bitfld.long 0x00 21. "ARB,Access arbitration bits" "Unchanged,Transfered" newline bitfld.long 0x00 20. "CONTROL,Access control bits" "Unchanged,Transfered" bitfld.long 0x00 19. "CLRINTPND,Clear interrupt pending bit" "Not cleared,Cleared" bitfld.long 0x00 18. "TXRQST/NEWDAT,Access transmission request bit" "Cleared,Set" newline bitfld.long 0x00 17. "DATA_A,Access data bytes 0-3" "Unchanged,Transfered" bitfld.long 0x00 16. "DATA_B,Access data bytes 4-7" "Unchanged,Transfered" bitfld.long 0x00 15. "BUSY,Busy flag" "Not busy,Busy" newline bitfld.long 0x00 14. "DMAACTIVE,Activation of DMA feature for subsequent internal IF1/2 update" "Not active,Active" hexmask.long.byte 0x00 0.--7. 1. "MESSAGE_NUMBER,Message number" endif endif rgroup.long (0x140+0x04)++0x03 line.long 0x00 "IF3MSK,IF3 Mask Register" bitfld.long 0x00 31. "MXTD,Mask extended identifier" "Disabled,Enabled" bitfld.long 0x00 30. "MDIR,Mask message direction" "Disabled,Enabled" bitfld.long 0x00 28. "MSK[28],Identifier mask 28" "Not used,Used" newline bitfld.long 0x00 27. "MSK[27],Identifier mask 27" "Not used,Used" bitfld.long 0x00 26. "MSK[26],Identifier mask 26" "Not used,Used" bitfld.long 0x00 25. "MSK[25],Identifier mask 25" "Not used,Used" newline bitfld.long 0x00 24. "MSK[24],Identifier mask 24" "Not used,Used" bitfld.long 0x00 23. "MSK[23],Identifier mask 23" "Not used,Used" bitfld.long 0x00 22. "MSK[22],Identifier mask 22" "Not used,Used" newline bitfld.long 0x00 21. "MSK[21],Identifier mask 21" "Not used,Used" bitfld.long 0x00 20. "MSK[20],Identifier mask 20" "Not used,Used" bitfld.long 0x00 19. "MSK[19],Identifier mask 19" "Not used,Used" newline bitfld.long 0x00 18. "MSK[18],Identifier mask 18" "Not used,Used" bitfld.long 0x00 17. "MSK[17],Identifier mask 17" "Not used,Used" bitfld.long 0x00 16. "MSK[16],Identifier mask 16" "Not used,Used" newline bitfld.long 0x00 15. "MSK[15],Identifier mask 15" "Not used,Used" bitfld.long 0x00 14. "MSK[14],Identifier mask 14" "Not used,Used" bitfld.long 0x00 13. "MSK[13],Identifier mask 13" "Not used,Used" newline bitfld.long 0x00 12. "MSK[12],Identifier mask 12" "Not used,Used" bitfld.long 0x00 11. "MSK[11],Identifier mask 11" "Not used,Used" bitfld.long 0x00 10. "MSK[10],Identifier mask 10" "Not used,Used" newline bitfld.long 0x00 9. "MSK[9],Identifier mask 9" "Not used,Used" bitfld.long 0x00 8. "MSK[8],Identifier mask 8" "Not used,Used" bitfld.long 0x00 7. "MSK[7],Identifier mask 7" "Not used,Used" newline bitfld.long 0x00 6. "MSK[6],Identifier mask 6" "Not used,Used" bitfld.long 0x00 5. "MSK[5],Identifier mask 5" "Not used,Used" bitfld.long 0x00 4. "MSK[4],Identifier mask 4" "Not used,Used" newline bitfld.long 0x00 3. "MSK[3],Identifier mask 3" "Not used,Used" bitfld.long 0x00 2. "MSK[2],Identifier mask 2" "Not used,Used" bitfld.long 0x00 1. "MSK[1],Identifier mask 1" "Not used,Used" newline bitfld.long 0x00 0. "MSK[0],Identifier mask 0" "Not used,Used" rgroup.long (0x140+0x08)++0x03 line.long 0x00 "IF3ARB,IF3 Arbitation Register" bitfld.long 0x00 31. "MSGVAL,Message valid" "Not valid,Valid" bitfld.long 0x00 30. "XTD,Extended identifier" "Standard,Extended" bitfld.long 0x00 29. "DIR,Message direction" "Receive,Transmit" newline hexmask.long 0x00 0.--28. 1. "ID28-0,Message identifier 29-bit identifier" rgroup.long (0x140+0x0C)++0x03 line.long 0x00 "IF3MCTL,IF3 Message Control Register" bitfld.long 0x00 15. "NEWDAT,New data" "Not written,Written" bitfld.long 0x00 14. "MSGLST,Message lost" "Not lost,Lost" bitfld.long 0x00 13. "INTPND,Interrupt pending" "Not pending,Pending" newline bitfld.long 0x00 12. "UMASK,Use acceptance mask" "Not used,Used" bitfld.long 0x00 11. "TXIE,Transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. "RXIE,Receive interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "RMTEN,Remote enable" "Disabled,Enabled" bitfld.long 0x00 8. "TXRQST,Transmit request" "Not requested,Requested" bitfld.long 0x00 7. "EOB,End of block" "Not end,End" newline bitfld.long 0x00 0.--3. "DLC,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" if (3==3) rgroup.long (0x140+0x10)++0x07 line.long 0x00 "IF3DATA,IF3 Data A Register" hexmask.long.byte 0x00 24.--31. 1. "DATA_3,Data 3 value" hexmask.long.byte 0x00 16.--23. 1. "DATA_2,Data 2 value" hexmask.long.byte 0x00 8.--15. 1. "DATA_1,Data 1 value" newline hexmask.long.byte 0x00 0.--7. 1. "DATA_0,Data 0 value" line.long 0x04 "IF3DATB,IF3 Data B Register" hexmask.long.byte 0x04 24.--31. 1. "DATA_7,Data 7 value" hexmask.long.byte 0x04 16.--23. 1. "DATA_6,Data 6 value" hexmask.long.byte 0x04 8.--15. 1. "DATA_5,Data 5 value" newline hexmask.long.byte 0x04 0.--7. 1. "DATA_4,Data 4 value" else group.long (0x140+0x10)++0x07 line.long 0x00 "IF3DATA,IF3 Data A Register" hexmask.long.byte 0x00 24.--31. 1. "DATA_3,Data 3 value" hexmask.long.byte 0x00 16.--23. 1. "DATA_2,Data 2 value" hexmask.long.byte 0x00 8.--15. 1. "DATA_1,Data 1 value" newline hexmask.long.byte 0x00 0.--7. 1. "DATA_0,Data 0 value" line.long 0x04 "IF3DATB,IF3 Data B Register" hexmask.long.byte 0x04 24.--31. 1. "DATA_7,Data 7 value" hexmask.long.byte 0x04 16.--23. 1. "DATA_6,Data 6 value" hexmask.long.byte 0x04 8.--15. 1. "DATA_5,Data 5 value" newline hexmask.long.byte 0x04 0.--7. 1. "DATA_4,Data 4 value" endif group.long 0x160++0x0F line.long 0x00 "IF3UPD12,IF3 Update Enable Register 12" bitfld.long 0x00 31. "IF3UPDATEEN[32],IF3 update enabled 32" "Disabled,Enabled" bitfld.long 0x00 30. "IF3UPDATEEN[31],IF3 update enabled 31" "Disabled,Enabled" bitfld.long 0x00 29. "IF3UPDATEEN[30],IF3 update enabled 30" "Disabled,Enabled" newline bitfld.long 0x00 28. "IF3UPDATEEN[29],IF3 update enabled 29" "Disabled,Enabled" bitfld.long 0x00 27. "IF3UPDATEEN[28],IF3 update enabled 28" "Disabled,Enabled" bitfld.long 0x00 26. "IF3UPDATEEN[27],IF3 update enabled 27" "Disabled,Enabled" newline bitfld.long 0x00 25. "IF3UPDATEEN[26],IF3 update enabled 26" "Disabled,Enabled" bitfld.long 0x00 24. "IF3UPDATEEN[25],IF3 update enabled 25" "Disabled,Enabled" bitfld.long 0x00 23. "IF3UPDATEEN[24],IF3 update enabled 24" "Disabled,Enabled" newline bitfld.long 0x00 22. "IF3UPDATEEN[23],IF3 update enabled 23" "Disabled,Enabled" bitfld.long 0x00 21. "IF3UPDATEEN[22],IF3 update enabled 22" "Disabled,Enabled" bitfld.long 0x00 20. "IF3UPDATEEN[21],IF3 update enabled 21" "Disabled,Enabled" newline bitfld.long 0x00 19. "IF3UPDATEEN[20],IF3 update enabled 20" "Disabled,Enabled" bitfld.long 0x00 18. "IF3UPDATEEN[19],IF3 update enabled 19" "Disabled,Enabled" bitfld.long 0x00 17. "IF3UPDATEEN[18],IF3 update enabled 18" "Disabled,Enabled" newline bitfld.long 0x00 16. "IF3UPDATEEN[17],IF3 update enabled 17" "Disabled,Enabled" bitfld.long 0x00 15. "IF3UPDATEEN[16],IF3 update enabled 16" "Disabled,Enabled" bitfld.long 0x00 14. "IF3UPDATEEN[15],IF3 update enabled 15" "Disabled,Enabled" newline bitfld.long 0x00 13. "IF3UPDATEEN[14],IF3 update enabled 14" "Disabled,Enabled" bitfld.long 0x00 12. "IF3UPDATEEN[13],IF3 update enabled 13" "Disabled,Enabled" bitfld.long 0x00 11. "IF3UPDATEEN[12],IF3 update enabled 12" "Disabled,Enabled" newline bitfld.long 0x00 10. "IF3UPDATEEN[11],IF3 update enabled 11" "Disabled,Enabled" bitfld.long 0x00 9. "IF3UPDATEEN[10],IF3 update enabled 10" "Disabled,Enabled" bitfld.long 0x00 8. "IF3UPDATEEN[9],IF3 update enabled 9" "Disabled,Enabled" newline bitfld.long 0x00 7. "IF3UPDATEEN[8],IF3 update enabled 8" "Disabled,Enabled" bitfld.long 0x00 6. "IF3UPDATEEN[7],IF3 update enabled 7" "Disabled,Enabled" bitfld.long 0x00 5. "IF3UPDATEEN[6],IF3 update enabled 6" "Disabled,Enabled" newline bitfld.long 0x00 4. "IF3UPDATEEN[5],IF3 update enabled 5" "Disabled,Enabled" bitfld.long 0x00 3. "IF3UPDATEEN[4],IF3 update enabled 4" "Disabled,Enabled" bitfld.long 0x00 2. "IF3UPDATEEN[3],IF3 update enabled 3" "Disabled,Enabled" newline bitfld.long 0x00 1. "IF3UPDATEEN[2],IF3 update enabled 2" "Disabled,Enabled" bitfld.long 0x00 0. "IF3UPDATEEN[1],IF3 update enabled 1" "Disabled,Enabled" line.long 0x04 "IF3UPD34,IF3 Update Enable Register 34" bitfld.long 0x04 31. "IF3UPDATEEN[64],IF3 update enabled 64" "Disabled,Enabled" bitfld.long 0x04 30. "IF3UPDATEEN[63],IF3 update enabled 63" "Disabled,Enabled" bitfld.long 0x04 29. "IF3UPDATEEN[62],IF3 update enabled 62" "Disabled,Enabled" newline bitfld.long 0x04 28. "IF3UPDATEEN[61],IF3 update enabled 61" "Disabled,Enabled" bitfld.long 0x04 27. "IF3UPDATEEN[60],IF3 update enabled 60" "Disabled,Enabled" bitfld.long 0x04 26. "IF3UPDATEEN[59],IF3 update enabled 59" "Disabled,Enabled" newline bitfld.long 0x04 25. "IF3UPDATEEN[58],IF3 update enabled 58" "Disabled,Enabled" bitfld.long 0x04 24. "IF3UPDATEEN[57],IF3 update enabled 57" "Disabled,Enabled" bitfld.long 0x04 23. "IF3UPDATEEN[56],IF3 update enabled 56" "Disabled,Enabled" newline bitfld.long 0x04 22. "IF3UPDATEEN[55],IF3 update enabled 55" "Disabled,Enabled" bitfld.long 0x04 21. "IF3UPDATEEN[54],IF3 update enabled 54" "Disabled,Enabled" bitfld.long 0x04 20. "IF3UPDATEEN[53],IF3 update enabled 53" "Disabled,Enabled" newline bitfld.long 0x04 19. "IF3UPDATEEN[52],IF3 update enabled 52" "Disabled,Enabled" bitfld.long 0x04 18. "IF3UPDATEEN[51],IF3 update enabled 51" "Disabled,Enabled" bitfld.long 0x04 17. "IF3UPDATEEN[50],IF3 update enabled 50" "Disabled,Enabled" newline bitfld.long 0x04 16. "IF3UPDATEEN[49],IF3 update enabled 49" "Disabled,Enabled" bitfld.long 0x04 15. "IF3UPDATEEN[48],IF3 update enabled 48" "Disabled,Enabled" bitfld.long 0x04 14. "IF3UPDATEEN[47],IF3 update enabled 47" "Disabled,Enabled" newline bitfld.long 0x04 13. "IF3UPDATEEN[46],IF3 update enabled 46" "Disabled,Enabled" bitfld.long 0x04 12. "IF3UPDATEEN[45],IF3 update enabled 45" "Disabled,Enabled" bitfld.long 0x04 11. "IF3UPDATEEN[44],IF3 update enabled 44" "Disabled,Enabled" newline bitfld.long 0x04 10. "IF3UPDATEEN[43],IF3 update enabled 43" "Disabled,Enabled" bitfld.long 0x04 9. "IF3UPDATEEN[42],IF3 update enabled 42" "Disabled,Enabled" bitfld.long 0x04 8. "IF3UPDATEEN[41],IF3 update enabled 41" "Disabled,Enabled" newline bitfld.long 0x04 7. "IF3UPDATEEN[40],IF3 update enabled 40" "Disabled,Enabled" bitfld.long 0x04 6. "IF3UPDATEEN[39],IF3 update enabled 39" "Disabled,Enabled" bitfld.long 0x04 5. "IF3UPDATEEN[38],IF3 update enabled 38" "Disabled,Enabled" newline bitfld.long 0x04 4. "IF3UPDATEEN[37],IF3 update enabled 37" "Disabled,Enabled" bitfld.long 0x04 3. "IF3UPDATEEN[36],IF3 update enabled 36" "Disabled,Enabled" bitfld.long 0x04 2. "IF3UPDATEEN[35],IF3 update enabled 35" "Disabled,Enabled" newline bitfld.long 0x04 1. "IF3UPDATEEN[34],IF3 update enabled 34" "Disabled,Enabled" bitfld.long 0x04 0. "IF3UPDATEEN[33],IF3 update enabled 33" "Disabled,Enabled" line.long 0x08 "IF3UPD56,IF3 Update Enable Register 56" bitfld.long 0x08 31. "IF3UPDATEEN[96],IF3 update enabled 96" "Disabled,Enabled" bitfld.long 0x08 30. "IF3UPDATEEN[95],IF3 update enabled 95" "Disabled,Enabled" bitfld.long 0x08 29. "IF3UPDATEEN[94],IF3 update enabled 94" "Disabled,Enabled" newline bitfld.long 0x08 28. "IF3UPDATEEN[93],IF3 update enabled 93" "Disabled,Enabled" bitfld.long 0x08 27. "IF3UPDATEEN[92],IF3 update enabled 92" "Disabled,Enabled" bitfld.long 0x08 26. "IF3UPDATEEN[91],IF3 update enabled 91" "Disabled,Enabled" newline bitfld.long 0x08 25. "IF3UPDATEEN[90],IF3 update enabled 90" "Disabled,Enabled" bitfld.long 0x08 24. "IF3UPDATEEN[89],IF3 update enabled 89" "Disabled,Enabled" bitfld.long 0x08 23. "IF3UPDATEEN[88],IF3 update enabled 88" "Disabled,Enabled" newline bitfld.long 0x08 22. "IF3UPDATEEN[87],IF3 update enabled 87" "Disabled,Enabled" bitfld.long 0x08 21. "IF3UPDATEEN[86],IF3 update enabled 86" "Disabled,Enabled" bitfld.long 0x08 20. "IF3UPDATEEN[85],IF3 update enabled 85" "Disabled,Enabled" newline bitfld.long 0x08 19. "IF3UPDATEEN[84],IF3 update enabled 84" "Disabled,Enabled" bitfld.long 0x08 18. "IF3UPDATEEN[83],IF3 update enabled 83" "Disabled,Enabled" bitfld.long 0x08 17. "IF3UPDATEEN[82],IF3 update enabled 82" "Disabled,Enabled" newline bitfld.long 0x08 16. "IF3UPDATEEN[81],IF3 update enabled 81" "Disabled,Enabled" bitfld.long 0x08 15. "IF3UPDATEEN[80],IF3 update enabled 80" "Disabled,Enabled" bitfld.long 0x08 14. "IF3UPDATEEN[79],IF3 update enabled 79" "Disabled,Enabled" newline bitfld.long 0x08 13. "IF3UPDATEEN[78],IF3 update enabled 78" "Disabled,Enabled" bitfld.long 0x08 12. "IF3UPDATEEN[77],IF3 update enabled 77" "Disabled,Enabled" bitfld.long 0x08 11. "IF3UPDATEEN[76],IF3 update enabled 76" "Disabled,Enabled" newline bitfld.long 0x08 10. "IF3UPDATEEN[75],IF3 update enabled 75" "Disabled,Enabled" bitfld.long 0x08 9. "IF3UPDATEEN[74],IF3 update enabled 74" "Disabled,Enabled" bitfld.long 0x08 8. "IF3UPDATEEN[73],IF3 update enabled 73" "Disabled,Enabled" newline bitfld.long 0x08 7. "IF3UPDATEEN[72],IF3 update enabled 72" "Disabled,Enabled" bitfld.long 0x08 6. "IF3UPDATEEN[71],IF3 update enabled 71" "Disabled,Enabled" bitfld.long 0x08 5. "IF3UPDATEEN[70],IF3 update enabled 70" "Disabled,Enabled" newline bitfld.long 0x08 4. "IF3UPDATEEN[69],IF3 update enabled 69" "Disabled,Enabled" bitfld.long 0x08 3. "IF3UPDATEEN[68],IF3 update enabled 68" "Disabled,Enabled" bitfld.long 0x08 2. "IF3UPDATEEN[67],IF3 update enabled 67" "Disabled,Enabled" newline bitfld.long 0x08 1. "IF3UPDATEEN[66],IF3 update enabled 66" "Disabled,Enabled" bitfld.long 0x08 0. "IF3UPDATEEN[65],IF3 update enabled 65" "Disabled,Enabled" line.long 0x0C "IF3UPD78,IF3 Update Enable Register 78" bitfld.long 0x0C 31. "IF3UPDATEEN[128],IF3 update enabled 128" "Disabled,Enabled" bitfld.long 0x0C 30. "IF3UPDATEEN[127],IF3 update enabled 127" "Disabled,Enabled" bitfld.long 0x0C 29. "IF3UPDATEEN[126],IF3 update enabled 126" "Disabled,Enabled" newline bitfld.long 0x0C 28. "IF3UPDATEEN[125],IF3 update enabled 125" "Disabled,Enabled" bitfld.long 0x0C 27. "IF3UPDATEEN[124],IF3 update enabled 124" "Disabled,Enabled" bitfld.long 0x0C 26. "IF3UPDATEEN[123],IF3 update enabled 123" "Disabled,Enabled" newline bitfld.long 0x0C 25. "IF3UPDATEEN[122],IF3 update enabled 122" "Disabled,Enabled" bitfld.long 0x0C 24. "IF3UPDATEEN[121],IF3 update enabled 121" "Disabled,Enabled" bitfld.long 0x0C 23. "IF3UPDATEEN[120],IF3 update enabled 120" "Disabled,Enabled" newline bitfld.long 0x0C 22. "IF3UPDATEEN[119],IF3 update enabled 119" "Disabled,Enabled" bitfld.long 0x0C 21. "IF3UPDATEEN[118],IF3 update enabled 118" "Disabled,Enabled" bitfld.long 0x0C 20. "IF3UPDATEEN[117],IF3 update enabled 117" "Disabled,Enabled" newline bitfld.long 0x0C 19. "IF3UPDATEEN[116],IF3 update enabled 116" "Disabled,Enabled" bitfld.long 0x0C 18. "IF3UPDATEEN[115],IF3 update enabled 115" "Disabled,Enabled" bitfld.long 0x0C 17. "IF3UPDATEEN[114],IF3 update enabled 114" "Disabled,Enabled" newline bitfld.long 0x0C 16. "IF3UPDATEEN[113],IF3 update enabled 113" "Disabled,Enabled" bitfld.long 0x0C 15. "IF3UPDATEEN[112],IF3 update enabled 112" "Disabled,Enabled" bitfld.long 0x0C 14. "IF3UPDATEEN[111],IF3 update enabled 111" "Disabled,Enabled" newline bitfld.long 0x0C 13. "IF3UPDATEEN[110],IF3 update enabled 110" "Disabled,Enabled" bitfld.long 0x0C 12. "IF3UPDATEEN[109],IF3 update enabled 109" "Disabled,Enabled" bitfld.long 0x0C 11. "IF3UPDATEEN[108],IF3 update enabled 108" "Disabled,Enabled" newline bitfld.long 0x0C 10. "IF3UPDATEEN[107],IF3 update enabled 107" "Disabled,Enabled" bitfld.long 0x0C 9. "IF3UPDATEEN[106],IF3 update enabled 106" "Disabled,Enabled" bitfld.long 0x0C 8. "IF3UPDATEEN[105],IF3 update enabled 105" "Disabled,Enabled" newline bitfld.long 0x0C 7. "IF3UPDATEEN[104],IF3 update enabled 104" "Disabled,Enabled" bitfld.long 0x0C 6. "IF3UPDATEEN[103],IF3 update enabled 103" "Disabled,Enabled" bitfld.long 0x0C 5. "IF3UPDATEEN[102],IF3 update enabled 102" "Disabled,Enabled" newline bitfld.long 0x0C 4. "IF3UPDATEEN[101],IF3 update enabled 101" "Disabled,Enabled" bitfld.long 0x0C 3. "IF3UPDATEEN[100],IF3 update enabled 100" "Disabled,Enabled" bitfld.long 0x0C 2. "IF3UPDATEEN[99],IF3 update enabled 99" "Disabled,Enabled" newline bitfld.long 0x0C 1. "IF3UPDATEEN[98],IF3 update enabled 98" "Disabled,Enabled" bitfld.long 0x0C 0. "IF3UPDATEEN[97],IF3 update enabled 97" "Disabled,Enabled" if (((d.l(ad:0x481CC000))&0x01)==0x01) group.long 0x1E0++0x07 line.long 0x00 "TIOC,TX IO Control Register" bitfld.long 0x00 18. "PU,Selection of pull direction" "Pull-down,Pull-up" bitfld.long 0x00 17. "PD,Pull disable" "Enabled,Disabled" bitfld.long 0x00 16. "OD,Open drain mode enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "FUNC,CAN_TX function" "GPIO,CAN" bitfld.long 0x00 2. "DIR,CAN_TX data direction" "Input,Output" bitfld.long 0x00 1. "OUT,CAN_TX data out write" "Low,High" newline rbitfld.long 0x00 0. "IN,CAN_TX data in" "Low,High" line.long 0x04 "RIOC,RX IO Control Register" bitfld.long 0x04 18. "PU,Selection of pull direction" "Pull-down,Pull-up" bitfld.long 0x04 17. "PD,Pull disable" "Enabled,Disabled" bitfld.long 0x04 16. "OD,Open drain mode enable" "Disabled,Enabled" newline bitfld.long 0x04 3. "FUNC,CAN_RX function" "GPIO,CAN" bitfld.long 0x04 2. "DIR,CAN_RX data direction" "Input,Output" bitfld.long 0x04 1. "OUT,CAN_RX data out write" "Low,High" newline bitfld.long 0x04 0. "IN,CAN_RX data in" "Low,High" else rgroup.long 0x1E0++0x07 line.long 0x00 "TIOC,TX IO Control Register" bitfld.long 0x00 18. "PU,Selection of pull direction" "Pull-down,Pull-up" bitfld.long 0x00 17. "PD,Pull disable" "Enabled,Disabled" bitfld.long 0x00 16. "OD,Open drain mode enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "FUNC,CAN_TX function" "GPIO,CAN" bitfld.long 0x00 2. "DIR,CAN_TX data direction" "Input,Output" bitfld.long 0x00 1. "OUT,CAN_TX data out write" "Low,High" newline bitfld.long 0x00 0. "IN,CAN_TX data in" "Low,High" line.long 0x04 "RIOC,RX IO Control Register" bitfld.long 0x04 18. "PU,Selection of pull direction" "Pull-down,Pull-up" bitfld.long 0x04 17. "PD,Pull disable" "Enabled,Disabled" bitfld.long 0x04 16. "OD,Open drain mode enable" "Disabled,Enabled" newline bitfld.long 0x04 3. "FUNC,CAN_RX function" "GPIO,CAN" bitfld.long 0x04 2. "DIR,CAN_RX data direction" "Input,Output" bitfld.long 0x04 1. "OUT,CAN_RX data out write" "Low,High" newline bitfld.long 0x04 0. "IN,CAN_RX data in" "Low,High" endif tree.end tree "DCAN1" base ad:0x481D0000 group.long 0x00++0x03 line.long 0x00 "CTL,CAN Control Register" bitfld.long 0x00 25. "WUBA,Automatic wake up on bus activity" "No wake up,Wake up" bitfld.long 0x00 24. "PDR,Request for local low power-down mode" "Not requested,Requested" bitfld.long 0x00 20. "DE3,DMA enable for IF3" "Disabled,Enabled" newline bitfld.long 0x00 19. "DE2,DMA enable for IF2" "Disabled,Enabled" bitfld.long 0x00 18. "DE1,DMA enable for IF1" "Disabled,Enabled" bitfld.long 0x00 17. "IE1,DCAN1INT interrupt enable" "Disabled,Enabled" newline rbitfld.long 0x00 16. "INITDBG,Internal init state while debug access" "Not entered,Entered" bitfld.long 0x00 15. "SWR,SW reset enable" "Disabled,Enabled" bitfld.long 0x00 10.--13. "PMD,Parity on/off" "Enabled,Enabled,Enabled,Enabled,Enabled,Disabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled" newline bitfld.long 0x00 9. "ABO,Auto bus on enable" "Disabled,Enabled" bitfld.long 0x00 8. "IDS,Interruption debug support enable" "Disabled,Enabled" bitfld.long 0x00 7. "TEST,Test mode enable" "Disabled,Enabled" newline bitfld.long 0x00 6. "CCE,Configuration change enable" "Disabled,Enabled" bitfld.long 0x00 5. "DAR,Disable automatic retransmission" "Enabled,Disabled" bitfld.long 0x00 3. "EIE,Error interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 2. "SIE,Status interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. "IE0,Interrupt line 0 enable" "Disabled,Enabled" bitfld.long 0x00 0. "INIT,Initialization" "Normal,Initialization" hgroup.long 0x04++0x03 hide.long 0x00 "ES,Error And Status Register" in rgroup.long 0x08++0x03 line.long 0x00 "ERRC,Error Counter Register" bitfld.long 0x00 15. "RP,Receive error passive" "No error,Error" hexmask.long.byte 0x00 8.--14. 1. "REC[6:0],Receive error counter" hexmask.long.byte 0x00 0.--7. 1. "TEC[7:0],Transmit error counter" if (((d.l(ad:0x481D0000))&0x41)==0x41) group.long 0x0C++0x03 line.long 0x00 "BTR,Bit Timing Register" rbitfld.long 0x00 16.--19. "BRPE,Baud rate prescaler extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--14. "TSEG2,The time segment after the sample point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--11. "TSEG1,The time segment before the sample point" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 6.--7. "SJW,Synchronization jump width" "0,1,2,3" bitfld.long 0x00 0.--5. "BRP,Baud rate prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else rgroup.long 0x0C++0x03 line.long 0x00 "BTR,Bit Timing Register" bitfld.long 0x00 16.--19. "BRPE,Baud rate prescaler extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--14. "TSEG2,The time segment after the sample point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--11. "TSEG1,The time segment before the sample point" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 6.--7. "SJW,Synchronization jump width" "0,1,2,3" bitfld.long 0x00 0.--5. "BRP,Baud rate prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif rgroup.long 0x10++0x03 line.long 0x00 "INT,Interrupt Register" hexmask.long.byte 0x00 16.--23. 1. "INT1ID[23:16],Interrupt 1 identifier" hexmask.long.word 0x00 0.--15. 1. "INT0ID[15:0],Interrupt identifier" if (((d.l(ad:0x481D0000))&0x80)==0x80) group.long 0x14++0x03 line.long 0x00 "TEST,Test Register" bitfld.long 0x00 9. "RDA,RAM direct access enable" "Normal,Direct access" bitfld.long 0x00 8. "EXL,External loop back mode" "Disabled,Enabled" rbitfld.long 0x00 7. "RX,Receive pin" "Dominant,Recessive" newline bitfld.long 0x00 5.--6. "TX[1:0],Control of CAN_TX pin" "Normal,Monitored,Dominant,Recessive" bitfld.long 0x00 4. "LBACK,Loop back mode" "Disabled,Enabled" bitfld.long 0x00 3. "SILENT,Silent mode" "Disabled,Enabled" else rgroup.long 0x14++0x03 line.long 0x00 "TEST,Test Register" bitfld.long 0x00 9. "RDA,RAM direct access enable" "Normal,Direct access" bitfld.long 0x00 8. "EXL,External loop back mode" "Disabled,Enabled" bitfld.long 0x00 7. "RX,Receive pin" "Dominant,Recessive" newline bitfld.long 0x00 5.--6. "TX[1:0],Control of CAN_TX pin" "Normal,Monitored,Dominant,Recessive" bitfld.long 0x00 4. "LBACK,Loop back mode" "Disabled,Enabled" bitfld.long 0x00 3. "SILENT,Silent mode" "Disabled,Enabled" endif rgroup.long 0x1C++0x03 line.long 0x00 "PERR,Parity Error Code Register" bitfld.long 0x00 8.--10. "WORD_NUMBER,Word number" ",1,2,3,4,5,?..." hexmask.long.byte 0x00 0.--7. 1. "MESSAGE_NUMBER,Message number" group.long 0x80++0x03 line.long 0x00 "ABOTR,Auto Bus On Time Register" rgroup.long 0x84++0x4F line.long 0x00 "TXRQX,Transmission Request X Register" bitfld.long 0x00 14.--15. "TXRQSTREG8,Transmission request X 8" "0,1,2,3" bitfld.long 0x00 12.--13. "TXRQSTREG7,Transmission request X 7" "0,1,2,3" bitfld.long 0x00 10.--11. "TXRQSTREG6,Transmission request X 6" "0,1,2,3" newline bitfld.long 0x00 8.--9. "TXRQSTREG5,Transmission request X 5" "0,1,2,3" bitfld.long 0x00 6.--7. "TXRQSTREG4,Transmission request X 4" "0,1,2,3" bitfld.long 0x00 4.--5. "TXRQSTREG3,Transmission request X 3" "0,1,2,3" newline bitfld.long 0x00 2.--3. "TXRQSTREG2,Transmission request X 2" "0,1,2,3" bitfld.long 0x00 0.--1. "TXRQSTREG1,Transmission request X 1" "0,1,2,3" line.long 0x04 "TXRQ12,Transmission Request Register 12" bitfld.long 0x04 31. "TXRQS[32],Transmission request bit 32" "Not requested,Requested" bitfld.long 0x04 30. "TXRQS[31],Transmission request bit 31" "Not requested,Requested" bitfld.long 0x04 29. "TXRQS[30],Transmission request bit 30" "Not requested,Requested" newline bitfld.long 0x04 28. "TXRQS[29],Transmission request bit 29" "Not requested,Requested" bitfld.long 0x04 27. "TXRQS[28],Transmission request bit 28" "Not requested,Requested" bitfld.long 0x04 26. "TXRQS[27],Transmission request bit 27" "Not requested,Requested" newline bitfld.long 0x04 25. "TXRQS[26],Transmission request bit 26" "Not requested,Requested" bitfld.long 0x04 24. "TXRQS[25],Transmission request bit 25" "Not requested,Requested" bitfld.long 0x04 23. "TXRQS[24],Transmission request bit 24" "Not requested,Requested" newline bitfld.long 0x04 22. "TXRQS[23],Transmission request bit 23" "Not requested,Requested" bitfld.long 0x04 21. "TXRQS[22],Transmission request bit 22" "Not requested,Requested" bitfld.long 0x04 20. "TXRQS[21],Transmission request bit 21" "Not requested,Requested" newline bitfld.long 0x04 19. "TXRQS[20],Transmission request bit 20" "Not requested,Requested" bitfld.long 0x04 18. "TXRQS[19],Transmission request bit 19" "Not requested,Requested" bitfld.long 0x04 17. "TXRQS[18],Transmission request bit 18" "Not requested,Requested" newline bitfld.long 0x04 16. "TXRQS[17],Transmission request bit 17" "Not requested,Requested" bitfld.long 0x04 15. "TXRQS[16],Transmission request bit 16" "Not requested,Requested" bitfld.long 0x04 14. "TXRQS[15],Transmission request bit 15" "Not requested,Requested" newline bitfld.long 0x04 13. "TXRQS[14],Transmission request bit 14" "Not requested,Requested" bitfld.long 0x04 12. "TXRQS[13],Transmission request bit 13" "Not requested,Requested" bitfld.long 0x04 11. "TXRQS[12],Transmission request bit 12" "Not requested,Requested" newline bitfld.long 0x04 10. "TXRQS[11],Transmission request bit 11" "Not requested,Requested" bitfld.long 0x04 9. "TXRQS[10],Transmission request bit 10" "Not requested,Requested" bitfld.long 0x04 8. "TXRQS[9],Transmission request bit 9" "Not requested,Requested" newline bitfld.long 0x04 7. "TXRQS[8],Transmission request bit 8" "Not requested,Requested" bitfld.long 0x04 6. "TXRQS[7],Transmission request bit 7" "Not requested,Requested" bitfld.long 0x04 5. "TXRQS[6],Transmission request bit 6" "Not requested,Requested" newline bitfld.long 0x04 4. "TXRQS[5],Transmission request bit 5" "Not requested,Requested" bitfld.long 0x04 3. "TXRQS[4],Transmission request bit 4" "Not requested,Requested" bitfld.long 0x04 2. "TXRQS[3],Transmission request bit 3" "Not requested,Requested" newline bitfld.long 0x04 1. "TXRQS[2],Transmission request bit 2" "Not requested,Requested" bitfld.long 0x04 0. "TXRQS[1],Transmission request bit 1" "Not requested,Requested" line.long 0x08 "TXRQ34,Transmission Request Register 34" bitfld.long 0x08 31. "TXRQS64,Transmission request bit 64" "Not requested,Requested" bitfld.long 0x08 30. "TXRQS[63],Transmission request bit 63" "Not requested,Requested" bitfld.long 0x08 29. "TXRQS[62],Transmission request bit 62" "Not requested,Requested" newline bitfld.long 0x08 28. "TXRQS[61],Transmission request bit 61" "Not requested,Requested" bitfld.long 0x08 27. "TXRQS[60],Transmission request bit 60" "Not requested,Requested" bitfld.long 0x08 26. "TXRQS[59],Transmission request bit 59" "Not requested,Requested" newline bitfld.long 0x08 25. "TXRQS[58],Transmission request bit 58" "Not requested,Requested" bitfld.long 0x08 24. "TXRQS[57],Transmission request bit 57" "Not requested,Requested" bitfld.long 0x08 23. "TXRQS[56],Transmission request bit 56" "Not requested,Requested" newline bitfld.long 0x08 22. "TXRQS[55],Transmission request bit 55" "Not requested,Requested" bitfld.long 0x08 21. "TXRQS[54],Transmission request bit 54" "Not requested,Requested" bitfld.long 0x08 20. "TXRQS[53],Transmission request bit 53" "Not requested,Requested" newline bitfld.long 0x08 19. "TXRQS[52],Transmission request bit 52" "Not requested,Requested" bitfld.long 0x08 18. "TXRQS[51],Transmission request bit 51" "Not requested,Requested" bitfld.long 0x08 17. "TXRQS[50],Transmission request bit 50" "Not requested,Requested" newline bitfld.long 0x08 16. "TXRQS[49],Transmission request bit 49" "Not requested,Requested" bitfld.long 0x08 15. "TXRQS[48],Transmission request bit 48" "Not requested,Requested" bitfld.long 0x08 14. "TXRQS[47],Transmission request bit 47" "Not requested,Requested" newline bitfld.long 0x08 13. "TXRQS[46],Transmission request bit 46" "Not requested,Requested" bitfld.long 0x08 12. "TXRQS[45],Transmission request bit 45" "Not requested,Requested" bitfld.long 0x08 11. "TXRQS[44],Transmission request bit 44" "Not requested,Requested" newline bitfld.long 0x08 10. "TXRQS[43],Transmission request bit 43" "Not requested,Requested" bitfld.long 0x08 9. "TXRQS[42],Transmission request bit 42" "Not requested,Requested" bitfld.long 0x08 8. "TXRQS[41],Transmission request bit 41" "Not requested,Requested" newline bitfld.long 0x08 7. "TXRQS[40],Transmission request bit 40" "Not requested,Requested" bitfld.long 0x08 6. "TXRQS[39],Transmission request bit 39" "Not requested,Requested" bitfld.long 0x08 5. "TXRQS[38],Transmission request bit 38" "Not requested,Requested" newline bitfld.long 0x08 4. "TXRQS[37],Transmission request bit 37" "Not requested,Requested" bitfld.long 0x08 3. "TXRQS[36],Transmission request bit 36" "Not requested,Requested" bitfld.long 0x08 2. "TXRQS[35],Transmission request bit 35" "Not requested,Requested" newline bitfld.long 0x08 1. "TXRQS[34],Transmission request bit 34" "Not requested,Requested" bitfld.long 0x08 0. "TXRQS[33],Transmission request bit 33" "Not requested,Requested" line.long 0x0C "TXRQ56,Transmission Request Register 56" bitfld.long 0x0C 31. "TXRQS[96],Transmission request bit 96" "Not requested,Requested" bitfld.long 0x0C 30. "TXRQS[95],Transmission request bit 95" "Not requested,Requested" bitfld.long 0x0C 29. "TXRQS[94],Transmission request bit 94" "Not requested,Requested" newline bitfld.long 0x0C 28. "TXRQS[93],Transmission request bit 93" "Not requested,Requested" bitfld.long 0x0C 27. "TXRQS[92],Transmission request bit 92" "Not requested,Requested" bitfld.long 0x0C 26. "TXRQS[91],Transmission request bit 91" "Not requested,Requested" newline bitfld.long 0x0C 25. "TXRQS[90],Transmission request bit 90" "Not requested,Requested" bitfld.long 0x0C 24. "TXRQS[89],Transmission request bit 89" "Not requested,Requested" bitfld.long 0x0C 23. "TXRQS[88],Transmission request bit 88" "Not requested,Requested" newline bitfld.long 0x0C 22. "TXRQS[87],Transmission request bit 87" "Not requested,Requested" bitfld.long 0x0C 21. "TXRQS[86],Transmission request bit 86" "Not requested,Requested" bitfld.long 0x0C 20. "TXRQS[85],Transmission request bit 85" "Not requested,Requested" newline bitfld.long 0x0C 19. "TXRQS[84],Transmission request bit 84" "Not requested,Requested" bitfld.long 0x0C 18. "TXRQS[83],Transmission request bit 83" "Not requested,Requested" bitfld.long 0x0C 17. "TXRQS[82],Transmission request bit 82" "Not requested,Requested" newline bitfld.long 0x0C 16. "TXRQS[81],Transmission request bit 81" "Not requested,Requested" bitfld.long 0x0C 15. "TXRQS[80],Transmission request bit 80" "Not requested,Requested" bitfld.long 0x0C 14. "TXRQS[79],Transmission request bit 79" "Not requested,Requested" newline bitfld.long 0x0C 13. "TXRQS[78],Transmission request bit 78" "Not requested,Requested" bitfld.long 0x0C 12. "TXRQS[77],Transmission request bit 77" "Not requested,Requested" bitfld.long 0x0C 11. "TXRQS[76],Transmission request bit 76" "Not requested,Requested" newline bitfld.long 0x0C 10. "TXRQS[75],Transmission request bit 75" "Not requested,Requested" bitfld.long 0x0C 9. "TXRQS[74],Transmission request bit 74" "Not requested,Requested" bitfld.long 0x0C 8. "TXRQS[73],Transmission request bit 73" "Not requested,Requested" newline bitfld.long 0x0C 7. "TXRQS[72],Transmission request bit 72" "Not requested,Requested" bitfld.long 0x0C 6. "TXRQS[71],Transmission request bit 71" "Not requested,Requested" bitfld.long 0x0C 5. "TXRQS[70],Transmission request bit 70" "Not requested,Requested" newline bitfld.long 0x0C 4. "TXRQS[69],Transmission request bit 69" "Not requested,Requested" bitfld.long 0x0C 3. "TXRQS[68],Transmission request bit 68" "Not requested,Requested" bitfld.long 0x0C 2. "TXRQS[67],Transmission request bit 67" "Not requested,Requested" newline bitfld.long 0x0C 1. "TXRQS[66],Transmission request bit 66" "Not requested,Requested" bitfld.long 0x0C 0. "TXRQS[65],Transmission request bit 65" "Not requested,Requested" line.long 0x10 "TXRQ78,Transmission Request Register 78" bitfld.long 0x10 31. "TXRQS[128],Transmission request bit 128" "Not requested,Requested" bitfld.long 0x10 30. "TXRQS[127],Transmission request bit 127" "Not requested,Requested" bitfld.long 0x10 29. "TXRQS[126],Transmission request bit 126" "Not requested,Requested" newline bitfld.long 0x10 28. "TXRQS[125],Transmission request bit 125" "Not requested,Requested" bitfld.long 0x10 27. "TXRQS[124],Transmission request bit 124" "Not requested,Requested" bitfld.long 0x10 26. "TXRQS[123],Transmission request bit 123" "Not requested,Requested" newline bitfld.long 0x10 25. "TXRQS[122],Transmission request bit 122" "Not requested,Requested" bitfld.long 0x10 24. "TXRQS[121],Transmission request bit 121" "Not requested,Requested" bitfld.long 0x10 23. "TXRQS[120],Transmission request bit 120" "Not requested,Requested" newline bitfld.long 0x10 22. "TXRQS[119],Transmission request bit 119" "Not requested,Requested" bitfld.long 0x10 21. "TXRQS[118],Transmission request bit 118" "Not requested,Requested" bitfld.long 0x10 20. "TXRQS[117],Transmission request bit 117" "Not requested,Requested" newline bitfld.long 0x10 19. "TXRQS[116],Transmission request bit 116" "Not requested,Requested" bitfld.long 0x10 18. "TXRQS[115],Transmission request bit 115" "Not requested,Requested" bitfld.long 0x10 17. "TXRQS[114],Transmission request bit 114" "Not requested,Requested" newline bitfld.long 0x10 16. "TXRQS[113],Transmission request bit 113" "Not requested,Requested" bitfld.long 0x10 15. "TXRQS[112],Transmission request bit 112" "Not requested,Requested" bitfld.long 0x10 14. "TXRQS[111],Transmission request bit 111" "Not requested,Requested" newline bitfld.long 0x10 13. "TXRQS[110],Transmission request bit 110" "Not requested,Requested" bitfld.long 0x10 12. "TXRQS[109],Transmission request bit 109" "Not requested,Requested" bitfld.long 0x10 11. "TXRQS[108],Transmission request bit 108" "Not requested,Requested" newline bitfld.long 0x10 10. "TXRQS[107],Transmission request bit 107" "Not requested,Requested" bitfld.long 0x10 9. "TXRQS[106],Transmission request bit 106" "Not requested,Requested" bitfld.long 0x10 8. "TXRQS[105],Transmission request bit 105" "Not requested,Requested" newline bitfld.long 0x10 7. "TXRQS[104],Transmission request bit 104" "Not requested,Requested" bitfld.long 0x10 6. "TXRQS[103],Transmission request bit 103" "Not requested,Requested" bitfld.long 0x10 5. "TXRQS[102],Transmission request bit 102" "Not requested,Requested" newline bitfld.long 0x10 4. "TXRQS[101],Transmission request bit 101" "Not requested,Requested" bitfld.long 0x10 3. "TXRQS[100],Transmission request bit 100" "Not requested,Requested" bitfld.long 0x10 2. "TXRQS[99],Transmission request bit 99" "Not requested,Requested" newline bitfld.long 0x10 1. "TXRQS[98],Transmission request bit 98" "Not requested,Requested" bitfld.long 0x10 0. "TXRQS[97],Transmission request bit 97" "Not requested,Requested" line.long 0x14 "NWDAT_X,New Data X Register" bitfld.long 0x14 14.--15. "NEWDATREG8,New data X 8" "0,1,2,3" bitfld.long 0x14 12.--13. "NEWDATREG7,New data X 7" "0,1,2,3" bitfld.long 0x14 10.--11. "NEWDATREG6,New data X 6" "0,1,2,3" newline bitfld.long 0x14 8.--9. "NEWDATREG5,New data X 5" "0,1,2,3" bitfld.long 0x14 6.--7. "NEWDATREG4,New data X 4" "0,1,2,3" bitfld.long 0x14 4.--5. "NEWDATREG3,New data X 3" "0,1,2,3" newline bitfld.long 0x14 2.--3. "NEWDATREG2,New data X 2" "0,1,2,3" bitfld.long 0x14 0.--1. "NEWDATREG1,New data X 1" "0,1,2,3" line.long 0x18 "NWDAT12,New Data Register 12" bitfld.long 0x18 31. "NEWDAT[32],New data bit 32" "Not written,Written" bitfld.long 0x18 30. "NEWDAT[31],New data bit 31" "Not written,Written" bitfld.long 0x18 29. "NEWDAT[30],New data bit 30" "Not written,Written" newline bitfld.long 0x18 28. "NEWDAT[29],New data bit 29" "Not written,Written" bitfld.long 0x18 27. "NEWDAT[28],New data bit 28" "Not written,Written" bitfld.long 0x18 26. "NEWDAT[27],New data bit 27" "Not written,Written" newline bitfld.long 0x18 25. "NEWDAT[26],New data bit 26" "Not written,Written" bitfld.long 0x18 24. "NEWDAT[25],New data bit 25" "Not written,Written" bitfld.long 0x18 23. "NEWDAT[24],New data bit 24" "Not written,Written" newline bitfld.long 0x18 22. "NEWDAT[23],New data bit 23" "Not written,Written" bitfld.long 0x18 21. "NEWDAT[22],New data bit 22" "Not written,Written" bitfld.long 0x18 20. "NEWDAT[21],New data bit 21" "Not written,Written" newline bitfld.long 0x18 19. "NEWDAT[20],New data bit 20" "Not written,Written" bitfld.long 0x18 18. "NEWDAT[19],New data bit 19" "Not written,Written" bitfld.long 0x18 17. "NEWDAT[18],New data bit 18" "Not written,Written" newline bitfld.long 0x18 16. "NEWDAT[17],New data bit 17" "Not written,Written" bitfld.long 0x18 15. "NEWDAT[16],New data bit 16" "Not written,Written" bitfld.long 0x18 14. "NEWDAT[15],New data bit 15" "Not written,Written" newline bitfld.long 0x18 13. "NEWDAT[14],New data bit 14" "Not written,Written" bitfld.long 0x18 12. "NEWDAT[13],New data bit 13" "Not written,Written" bitfld.long 0x18 11. "NEWDAT[12],New data bit 12" "Not written,Written" newline bitfld.long 0x18 10. "NEWDAT[11],New data bit 11" "Not written,Written" bitfld.long 0x18 9. "NEWDAT[10],New data bit 10" "Not written,Written" bitfld.long 0x18 8. "NEWDAT[9],New data bit 9" "Not written,Written" newline bitfld.long 0x18 7. "NEWDAT[8],New data bit 8" "Not written,Written" bitfld.long 0x18 6. "NEWDAT[7],New data bit 7" "Not written,Written" bitfld.long 0x18 5. "NEWDAT[6],New data bit 6" "Not written,Written" newline bitfld.long 0x18 4. "NEWDAT[5],New data bit 5" "Not written,Written" bitfld.long 0x18 3. "NEWDAT[4],New data bit 4" "Not written,Written" bitfld.long 0x18 2. "NEWDAT[3],New data bit 3" "Not written,Written" newline bitfld.long 0x18 1. "NEWDAT[2],New data bit 2" "Not written,Written" bitfld.long 0x18 0. "NEWDAT[1],New data bit 1" "Not written,Written" line.long 0x1C "NWDAT34,New Data Register 34" bitfld.long 0x1C 31. "NEWDAT[64],New data bit 64" "Not written,Written" bitfld.long 0x1C 30. "NEWDAT[63],New data bit 63" "Not written,Written" bitfld.long 0x1C 29. "NEWDAT[62],New data bit 62" "Not written,Written" newline bitfld.long 0x1C 28. "NEWDAT[61],New data bit 61" "Not written,Written" bitfld.long 0x1C 27. "NEWDAT[60],New data bit 60" "Not written,Written" bitfld.long 0x1C 26. "NEWDAT[59],New data bit 59" "Not written,Written" newline bitfld.long 0x1C 25. "NEWDAT[58],New data bit 58" "Not written,Written" bitfld.long 0x1C 24. "NEWDAT[57],New data bit 57" "Not written,Written" bitfld.long 0x1C 23. "NEWDAT[56],New data bit 56" "Not written,Written" newline bitfld.long 0x1C 22. "NEWDAT[55],New data bit 55" "Not written,Written" bitfld.long 0x1C 21. "NEWDAT[54],New data bit 54" "Not written,Written" bitfld.long 0x1C 20. "NEWDAT[53],New data bit 53" "Not written,Written" newline bitfld.long 0x1C 19. "NEWDAT[52],New data bit 52" "Not written,Written" bitfld.long 0x1C 18. "NEWDAT[51],New data bit 51" "Not written,Written" bitfld.long 0x1C 17. "NEWDAT[50],New data bit 50" "Not written,Written" newline bitfld.long 0x1C 16. "NEWDAT[49],New data bit 49" "Not written,Written" bitfld.long 0x1C 15. "NEWDAT[48],New data bit 48" "Not written,Written" bitfld.long 0x1C 14. "NEWDAT[47],New data bit 47" "Not written,Written" newline bitfld.long 0x1C 13. "NEWDAT[46],New data bit 46" "Not written,Written" bitfld.long 0x1C 12. "NEWDAT[45],New data bit 45" "Not written,Written" bitfld.long 0x1C 11. "NEWDAT[44],New data bit 44" "Not written,Written" newline bitfld.long 0x1C 10. "NEWDAT[43],New data bit 43" "Not written,Written" bitfld.long 0x1C 9. "NEWDAT[42],New data bit 42" "Not written,Written" bitfld.long 0x1C 8. "NEWDAT[41],New data bit 41" "Not written,Written" newline bitfld.long 0x1C 7. "NEWDAT[40],New data bit 40" "Not written,Written" bitfld.long 0x1C 6. "NEWDAT[39],New data bit 39" "Not written,Written" bitfld.long 0x1C 5. "NEWDAT[38],New data bit 38" "Not written,Written" newline bitfld.long 0x1C 4. "NEWDAT[37],New data bit 37" "Not written,Written" bitfld.long 0x1C 3. "NEWDAT[36],New data bit 36" "Not written,Written" bitfld.long 0x1C 2. "NEWDAT[35],New data bit 35" "Not written,Written" newline bitfld.long 0x1C 1. "NEWDAT[34],New data bit 34" "Not written,Written" bitfld.long 0x1C 0. "NEWDAT[33],New data bit 33" "Not written,Written" line.long 0x20 "NWDAT56,New Data Register 56" bitfld.long 0x20 31. "NEWDAT[96],New data bit 96" "Not written,Written" bitfld.long 0x20 30. "NEWDAT[95],New data bit 95" "Not written,Written" bitfld.long 0x20 29. "NEWDAT[94],New data bit 94" "Not written,Written" newline bitfld.long 0x20 28. "NEWDAT[93],New data bit 93" "Not written,Written" bitfld.long 0x20 27. "NEWDAT[92],New data bit 92" "Not written,Written" bitfld.long 0x20 26. "NEWDAT[91],New data bit 91" "Not written,Written" newline bitfld.long 0x20 25. "NEWDAT[90],New data bit 90" "Not written,Written" bitfld.long 0x20 24. "NEWDAT[89],New data bit 89" "Not written,Written" bitfld.long 0x20 23. "NEWDAT[88],New data bit 88" "Not written,Written" newline bitfld.long 0x20 22. "NEWDAT[87],New data bit 87" "Not written,Written" bitfld.long 0x20 21. "NEWDAT[86],New data bit 86" "Not written,Written" bitfld.long 0x20 20. "NEWDAT[85],New data bit 85" "Not written,Written" newline bitfld.long 0x20 19. "NEWDAT[84],New data bit 84" "Not written,Written" bitfld.long 0x20 18. "NEWDAT[83],New data bit 83" "Not written,Written" bitfld.long 0x20 17. "NEWDAT[82],New data bit 82" "Not written,Written" newline bitfld.long 0x20 16. "NEWDAT[81],New data bit 81" "Not written,Written" bitfld.long 0x20 15. "NEWDAT[80],New data bit 80" "Not written,Written" bitfld.long 0x20 14. "NEWDAT[79],New data bit 79" "Not written,Written" newline bitfld.long 0x20 13. "NEWDAT[78],New data bit 78" "Not written,Written" bitfld.long 0x20 12. "NEWDAT[77],New data bit 77" "Not written,Written" bitfld.long 0x20 11. "NEWDAT[76],New data bit 76" "Not written,Written" newline bitfld.long 0x20 10. "NEWDAT[75],New data bit 75" "Not written,Written" bitfld.long 0x20 9. "NEWDAT[74],New data bit 74" "Not written,Written" bitfld.long 0x20 8. "NEWDAT[73],New data bit 73" "Not written,Written" newline bitfld.long 0x20 7. "NEWDAT[72],New data bit 72" "Not written,Written" bitfld.long 0x20 6. "NEWDAT[71],New data bit 71" "Not written,Written" bitfld.long 0x20 5. "NEWDAT[70],New data bit 70" "Not written,Written" newline bitfld.long 0x20 4. "NEWDAT[69],New data bit 69" "Not written,Written" bitfld.long 0x20 3. "NEWDAT[68],New data bit 68" "Not written,Written" bitfld.long 0x20 2. "NEWDAT[67],New data bit 67" "Not written,Written" newline bitfld.long 0x20 1. "NEWDAT[66],New data bit 66" "Not written,Written" bitfld.long 0x20 0. "NEWDAT[65],New data bit 65" "Not written,Written" line.long 0x24 "NWDAT78,New Data Register 78" bitfld.long 0x24 31. "NEWDAT[128],New data bit 128" "Not written,Written" bitfld.long 0x24 30. "NEWDAT[127],New data bit 127" "Not written,Written" bitfld.long 0x24 29. "NEWDAT[126],New data bit 126" "Not written,Written" newline bitfld.long 0x24 28. "NEWDAT[125],New data bit 125" "Not written,Written" bitfld.long 0x24 27. "NEWDAT[124],New data bit 124" "Not written,Written" bitfld.long 0x24 26. "NEWDAT[123],New data bit 123" "Not written,Written" newline bitfld.long 0x24 25. "NEWDAT[122],New data bit 122" "Not written,Written" bitfld.long 0x24 24. "NEWDAT[121],New data bit 121" "Not written,Written" bitfld.long 0x24 23. "NEWDAT[120],New data bit 120" "Not written,Written" newline bitfld.long 0x24 22. "NEWDAT[119],New data bit 119" "Not written,Written" bitfld.long 0x24 21. "NEWDAT[118],New data bit 118" "Not written,Written" bitfld.long 0x24 20. "NEWDAT[117],New data bit 117" "Not written,Written" newline bitfld.long 0x24 19. "NEWDAT[116],New data bit 116" "Not written,Written" bitfld.long 0x24 18. "NEWDAT[115],New data bit 115" "Not written,Written" bitfld.long 0x24 17. "NEWDAT[114],New data bit 114" "Not written,Written" newline bitfld.long 0x24 16. "NEWDAT[113],New data bit 113" "Not written,Written" bitfld.long 0x24 15. "NEWDAT[112],New data bit 112" "Not written,Written" bitfld.long 0x24 14. "NEWDAT[111],New data bit 111" "Not written,Written" newline bitfld.long 0x24 13. "NEWDAT[110],New data bit 110" "Not written,Written" bitfld.long 0x24 12. "NEWDAT[109],New data bit 109" "Not written,Written" bitfld.long 0x24 11. "NEWDAT[108],New data bit 108" "Not written,Written" newline bitfld.long 0x24 10. "NEWDAT[107],New data bit 107" "Not written,Written" bitfld.long 0x24 9. "NEWDAT[106],New data bit 106" "Not written,Written" bitfld.long 0x24 8. "NEWDAT[105],New data bit 105" "Not written,Written" newline bitfld.long 0x24 7. "NEWDAT[104],New data bit 104" "Not written,Written" bitfld.long 0x24 6. "NEWDAT[103],New data bit 103" "Not written,Written" bitfld.long 0x24 5. "NEWDAT[102],New data bit 102" "Not written,Written" newline bitfld.long 0x24 4. "NEWDAT[101],New data bit 101" "Not written,Written" bitfld.long 0x24 3. "NEWDAT[100],New data bit 100" "Not written,Written" bitfld.long 0x24 2. "NEWDAT[99],New data bit 99" "Not written,Written" newline bitfld.long 0x24 1. "NEWDAT[98],New data bit 98" "Not written,Written" bitfld.long 0x24 0. "NEWDAT[97],New data bit 97" "Not written,Written" line.long 0x28 "INTPND_X,Interrupt Pending X Register" bitfld.long 0x28 14.--15. "INTPNDREG8,Interrupt pending X register 8" "0,1,2,3" bitfld.long 0x28 12.--13. "INTPNDREG7,Interrupt pending X register 7" "0,1,2,3" bitfld.long 0x28 10.--11. "INTPNDREG6,Interrupt pending X register 6" "0,1,2,3" newline bitfld.long 0x28 8.--9. "INTPNDREG5,Interrupt pending X register 5" "0,1,2,3" bitfld.long 0x28 6.--7. "INTPNDREG4,Interrupt pending X register 4" "0,1,2,3" bitfld.long 0x28 4.--5. "INTPNDREG3,Interrupt pending X register 3" "0,1,2,3" newline bitfld.long 0x28 2.--3. "INTPNDREG2,Interrupt pending X register 2" "0,1,2,3" bitfld.long 0x28 0.--1. "INTPNDREG1,Interrupt pending X register 1" "0,1,2,3" line.long 0x2C "INTPND12,Interrupt Pending Register 12" bitfld.long 0x2C 31. "INTPND[32],Interrupt pending bit 32" "Not pending,Pending" bitfld.long 0x2C 30. "INTPND[31],Interrupt pending bit 31" "Not pending,Pending" bitfld.long 0x2C 29. "INTPND[30],Interrupt pending bit 30" "Not pending,Pending" newline bitfld.long 0x2C 28. "INTPND[29],Interrupt pending bit 29" "Not pending,Pending" bitfld.long 0x2C 27. "INTPND[28],Interrupt pending bit 28" "Not pending,Pending" bitfld.long 0x2C 26. "INTPND[27],Interrupt pending bit 27" "Not pending,Pending" newline bitfld.long 0x2C 25. "INTPND[26],Interrupt pending bit 26" "Not pending,Pending" bitfld.long 0x2C 24. "INTPND[25],Interrupt pending bit 25" "Not pending,Pending" bitfld.long 0x2C 23. "INTPND[24],Interrupt pending bit 24" "Not pending,Pending" newline bitfld.long 0x2C 22. "INTPND[23],Interrupt pending bit 23" "Not pending,Pending" bitfld.long 0x2C 21. "INTPND[22],Interrupt pending bit 22" "Not pending,Pending" bitfld.long 0x2C 20. "INTPND[21],Interrupt pending bit 21" "Not pending,Pending" newline bitfld.long 0x2C 19. "INTPND[20],Interrupt pending bit 20" "Not pending,Pending" bitfld.long 0x2C 18. "INTPND[19],Interrupt pending bit 19" "Not pending,Pending" bitfld.long 0x2C 17. "INTPND[18],Interrupt pending bit 18" "Not pending,Pending" newline bitfld.long 0x2C 16. "INTPND[17],Interrupt pending bit 17" "Not pending,Pending" bitfld.long 0x2C 15. "INTPND[16],Interrupt pending bit 16" "Not pending,Pending" bitfld.long 0x2C 14. "INTPND[15],Interrupt pending bit 15" "Not pending,Pending" newline bitfld.long 0x2C 13. "INTPND[14],Interrupt pending bit 14" "Not pending,Pending" bitfld.long 0x2C 12. "INTPND[13],Interrupt pending bit 13" "Not pending,Pending" bitfld.long 0x2C 11. "INTPND[12],Interrupt pending bit 12" "Not pending,Pending" newline bitfld.long 0x2C 10. "INTPND[11],Interrupt pending bit 11" "Not pending,Pending" bitfld.long 0x2C 9. "INTPND[10],Interrupt pending bit 10" "Not pending,Pending" bitfld.long 0x2C 8. "INTPND[9],Interrupt pending bit 9" "Not pending,Pending" newline bitfld.long 0x2C 7. "INTPND[8],Interrupt pending bit 8" "Not pending,Pending" bitfld.long 0x2C 6. "INTPND[7],Interrupt pending bit 7" "Not pending,Pending" bitfld.long 0x2C 5. "INTPND[6],Interrupt pending bit 6" "Not pending,Pending" newline bitfld.long 0x2C 4. "INTPND[5],Interrupt pending bit 5" "Not pending,Pending" bitfld.long 0x2C 3. "INTPND[4],Interrupt pending bit 4" "Not pending,Pending" bitfld.long 0x2C 2. "INTPND[3],Interrupt pending bit 3" "Not pending,Pending" newline bitfld.long 0x2C 1. "INTPND[2],Interrupt pending bit 2" "Not pending,Pending" bitfld.long 0x2C 0. "INTPND[1],Interrupt pending bit 1" "Not pending,Pending" line.long 0x30 "INTPND34,Interrupt Pending Register 34" bitfld.long 0x30 31. "INTPND[64],Interrupt pending bit 64" "Not pending,Pending" bitfld.long 0x30 30. "INTPND[63],Interrupt pending bit 63" "Not pending,Pending" bitfld.long 0x30 29. "INTPND[62],Interrupt pending bit 62" "Not pending,Pending" newline bitfld.long 0x30 28. "INTPND[61],Interrupt pending bit 61" "Not pending,Pending" bitfld.long 0x30 27. "INTPND[60],Interrupt pending bit 60" "Not pending,Pending" bitfld.long 0x30 26. "INTPND[59],Interrupt pending bit 59" "Not pending,Pending" newline bitfld.long 0x30 25. "INTPND[58],Interrupt pending bit 58" "Not pending,Pending" bitfld.long 0x30 24. "INTPND[57],Interrupt pending bit 57" "Not pending,Pending" bitfld.long 0x30 23. "INTPND[56],Interrupt pending bit 56" "Not pending,Pending" newline bitfld.long 0x30 22. "INTPND[55],Interrupt pending bit 55" "Not pending,Pending" bitfld.long 0x30 21. "INTPND[54],Interrupt pending bit 54" "Not pending,Pending" bitfld.long 0x30 20. "INTPND[53],Interrupt pending bit 53" "Not pending,Pending" newline bitfld.long 0x30 19. "INTPND[52],Interrupt pending bit 52" "Not pending,Pending" bitfld.long 0x30 18. "INTPND[51],Interrupt pending bit 51" "Not pending,Pending" bitfld.long 0x30 17. "INTPND[50],Interrupt pending bit 50" "Not pending,Pending" newline bitfld.long 0x30 16. "INTPND[49],Interrupt pending bit 49" "Not pending,Pending" bitfld.long 0x30 15. "INTPND[48],Interrupt pending bit 48" "Not pending,Pending" bitfld.long 0x30 14. "INTPND[47],Interrupt pending bit 47" "Not pending,Pending" newline bitfld.long 0x30 13. "INTPND[46],Interrupt pending bit 46" "Not pending,Pending" bitfld.long 0x30 12. "INTPND[45],Interrupt pending bit 45" "Not pending,Pending" bitfld.long 0x30 11. "INTPND[44],Interrupt pending bit 44" "Not pending,Pending" newline bitfld.long 0x30 10. "INTPND[43],Interrupt pending bit 43" "Not pending,Pending" bitfld.long 0x30 9. "INTPND[42],Interrupt pending bit 42" "Not pending,Pending" bitfld.long 0x30 8. "INTPND[41],Interrupt pending bit 41" "Not pending,Pending" newline bitfld.long 0x30 7. "INTPND[40],Interrupt pending bit 40" "Not pending,Pending" bitfld.long 0x30 6. "INTPND[39],Interrupt pending bit 39" "Not pending,Pending" bitfld.long 0x30 5. "INTPND[38],Interrupt pending bit 38" "Not pending,Pending" newline bitfld.long 0x30 4. "INTPND[37],Interrupt pending bit 37" "Not pending,Pending" bitfld.long 0x30 3. "INTPND[36],Interrupt pending bit 36" "Not pending,Pending" bitfld.long 0x30 2. "INTPND[35],Interrupt pending bit 35" "Not pending,Pending" newline bitfld.long 0x30 1. "INTPND[34],Interrupt pending bit 34" "Not pending,Pending" bitfld.long 0x30 0. "INTPND[33],Interrupt pending bit 33" "Not pending,Pending" line.long 0x34 "INTPND56,Interrupt Pending Register 56" bitfld.long 0x34 31. "INTPND[96],Interrupt pending bit 96" "Not pending,Pending" bitfld.long 0x34 30. "INTPND[95],Interrupt pending bit 95" "Not pending,Pending" bitfld.long 0x34 29. "INTPND[94],Interrupt pending bit 94" "Not pending,Pending" newline bitfld.long 0x34 28. "INTPND[93],Interrupt pending bit 93" "Not pending,Pending" bitfld.long 0x34 27. "INTPND[92],Interrupt pending bit 92" "Not pending,Pending" bitfld.long 0x34 26. "INTPND[91],Interrupt pending bit 91" "Not pending,Pending" newline bitfld.long 0x34 25. "INTPND[90],Interrupt pending bit 90" "Not pending,Pending" bitfld.long 0x34 24. "INTPND[89],Interrupt pending bit 89" "Not pending,Pending" bitfld.long 0x34 23. "INTPND[88],Interrupt pending bit 88" "Not pending,Pending" newline bitfld.long 0x34 22. "INTPND[87],Interrupt pending bit 87" "Not pending,Pending" bitfld.long 0x34 21. "INTPND[86],Interrupt pending bit 86" "Not pending,Pending" bitfld.long 0x34 20. "INTPND[85],Interrupt pending bit 85" "Not pending,Pending" newline bitfld.long 0x34 19. "INTPND[84],Interrupt pending bit 84" "Not pending,Pending" bitfld.long 0x34 18. "INTPND[83],Interrupt pending bit 83" "Not pending,Pending" bitfld.long 0x34 17. "INTPND[82],Interrupt pending bit 82" "Not pending,Pending" newline bitfld.long 0x34 16. "INTPND[81],Interrupt pending bit 81" "Not pending,Pending" bitfld.long 0x34 15. "INTPND[80],Interrupt pending bit 80" "Not pending,Pending" bitfld.long 0x34 14. "INTPND[79],Interrupt pending bit 79" "Not pending,Pending" newline bitfld.long 0x34 13. "INTPND[78],Interrupt pending bit 78" "Not pending,Pending" bitfld.long 0x34 12. "INTPND[77],Interrupt pending bit 77" "Not pending,Pending" bitfld.long 0x34 11. "INTPND[76],Interrupt pending bit 76" "Not pending,Pending" newline bitfld.long 0x34 10. "INTPND[75],Interrupt pending bit 75" "Not pending,Pending" bitfld.long 0x34 9. "INTPND[74],Interrupt pending bit 74" "Not pending,Pending" bitfld.long 0x34 8. "INTPND[73],Interrupt pending bit 73" "Not pending,Pending" newline bitfld.long 0x34 7. "INTPND[72],Interrupt pending bit 72" "Not pending,Pending" bitfld.long 0x34 6. "INTPND[71],Interrupt pending bit 71" "Not pending,Pending" bitfld.long 0x34 5. "INTPND[70],Interrupt pending bit 70" "Not pending,Pending" newline bitfld.long 0x34 4. "INTPND[69],Interrupt pending bit 69" "Not pending,Pending" bitfld.long 0x34 3. "INTPND[68],Interrupt pending bit 68" "Not pending,Pending" bitfld.long 0x34 2. "INTPND[67],Interrupt pending bit 67" "Not pending,Pending" newline bitfld.long 0x34 1. "INTPND[66],Interrupt pending bit 66" "Not pending,Pending" bitfld.long 0x34 0. "INTPND[65],Interrupt pending bit 65" "Not pending,Pending" line.long 0x38 "INTPND78,Interrupt Pending Register 78" bitfld.long 0x38 31. "INTPND[128],Interrupt pending bit 128" "Not pending,Pending" bitfld.long 0x38 30. "INTPND[127],Interrupt pending bit 127" "Not pending,Pending" bitfld.long 0x38 29. "INTPND[126],Interrupt pending bit 126" "Not pending,Pending" newline bitfld.long 0x38 28. "INTPND[125],Interrupt pending bit 125" "Not pending,Pending" bitfld.long 0x38 27. "INTPND[124],Interrupt pending bit 124" "Not pending,Pending" bitfld.long 0x38 26. "INTPND[123],Interrupt pending bit 123" "Not pending,Pending" newline bitfld.long 0x38 25. "INTPND[122],Interrupt pending bit 122" "Not pending,Pending" bitfld.long 0x38 24. "INTPND[121],Interrupt pending bit 121" "Not pending,Pending" bitfld.long 0x38 23. "INTPND[120],Interrupt pending bit 120" "Not pending,Pending" newline bitfld.long 0x38 22. "INTPND[119],Interrupt pending bit 119" "Not pending,Pending" bitfld.long 0x38 21. "INTPND[118],Interrupt pending bit 118" "Not pending,Pending" bitfld.long 0x38 20. "INTPND[117],Interrupt pending bit 117" "Not pending,Pending" newline bitfld.long 0x38 19. "INTPND[116],Interrupt pending bit 116" "Not pending,Pending" bitfld.long 0x38 18. "INTPND[115],Interrupt pending bit 115" "Not pending,Pending" bitfld.long 0x38 17. "INTPND[114],Interrupt pending bit 114" "Not pending,Pending" newline bitfld.long 0x38 16. "INTPND[113],Interrupt pending bit 113" "Not pending,Pending" bitfld.long 0x38 15. "INTPND[112],Interrupt pending bit 112" "Not pending,Pending" bitfld.long 0x38 14. "INTPND[111],Interrupt pending bit 111" "Not pending,Pending" newline bitfld.long 0x38 13. "INTPND[110],Interrupt pending bit 110" "Not pending,Pending" bitfld.long 0x38 12. "INTPND[109],Interrupt pending bit 109" "Not pending,Pending" bitfld.long 0x38 11. "INTPND[108],Interrupt pending bit 108" "Not pending,Pending" newline bitfld.long 0x38 10. "INTPND[107],Interrupt pending bit 107" "Not pending,Pending" bitfld.long 0x38 9. "INTPND[106],Interrupt pending bit 106" "Not pending,Pending" bitfld.long 0x38 8. "INTPND[105],Interrupt pending bit 105" "Not pending,Pending" newline bitfld.long 0x38 7. "INTPND[104],Interrupt pending bit 104" "Not pending,Pending" bitfld.long 0x38 6. "INTPND[103],Interrupt pending bit 103" "Not pending,Pending" bitfld.long 0x38 5. "INTPND[102],Interrupt pending bit 102" "Not pending,Pending" newline bitfld.long 0x38 4. "INTPND[101],Interrupt pending bit 101" "Not pending,Pending" bitfld.long 0x38 3. "INTPND[100],Interrupt pending bit 100" "Not pending,Pending" bitfld.long 0x38 2. "INTPND[99],Interrupt pending bit 99" "Not pending,Pending" newline bitfld.long 0x38 1. "INTPND[98],Interrupt pending bit 98" "Not pending,Pending" bitfld.long 0x38 0. "INTPND[97],Interrupt pending bit 97" "Not pending,Pending" line.long 0x3C "MSGVAL_X,Message Valid X Register" bitfld.long 0x3C 14.--15. "MSGVALREG8,Message valid X register 8" "0,1,2,3" bitfld.long 0x3C 12.--13. "MSGVALREG7,Message valid X register 7" "0,1,2,3" bitfld.long 0x3C 10.--11. "MSGVALREG6,Message valid X register 6" "0,1,2,3" newline bitfld.long 0x3C 8.--9. "MSGVALREG5,Message valid X register 5" "0,1,2,3" bitfld.long 0x3C 6.--7. "MSGVALREG4,Message valid X register 4" "0,1,2,3" bitfld.long 0x3C 4.--5. "MSGVALREG3,Message valid X register 3" "0,1,2,3" newline bitfld.long 0x3C 2.--3. "MSGVALREG2,Message valid X register 2" "0,1,2,3" bitfld.long 0x3C 0.--1. "MSGVALREG1,Message valid X register 1" "0,1,2,3" line.long 0x40 "MSGVAL12,Message Valid Register 12" bitfld.long 0x40 31. "MSGVAL[32],Message valid bit 32" "Ignored,Not ignored" bitfld.long 0x40 30. "MSGVAL[31],Message valid bit 31" "Ignored,Not ignored" bitfld.long 0x40 29. "MSGVAL[30],Message valid bit 30" "Ignored,Not ignored" newline bitfld.long 0x40 28. "MSGVAL[29],Message valid bit 29" "Ignored,Not ignored" bitfld.long 0x40 27. "MSGVAL[28],Message valid bit 28" "Ignored,Not ignored" bitfld.long 0x40 26. "MSGVAL[27],Message valid bit 27" "Ignored,Not ignored" newline bitfld.long 0x40 25. "MSGVAL[26],Message valid bit 26" "Ignored,Not ignored" bitfld.long 0x40 24. "MSGVAL[25],Message valid bit 25" "Ignored,Not ignored" bitfld.long 0x40 23. "MSGVAL[24],Message valid bit 24" "Ignored,Not ignored" newline bitfld.long 0x40 22. "MSGVAL[23],Message valid bit 23" "Ignored,Not ignored" bitfld.long 0x40 21. "MSGVAL[22],Message valid bit 22" "Ignored,Not ignored" bitfld.long 0x40 20. "MSGVAL[21],Message valid bit 21" "Ignored,Not ignored" newline bitfld.long 0x40 19. "MSGVAL[20],Message valid bit 20" "Ignored,Not ignored" bitfld.long 0x40 18. "MSGVAL[19],Message valid bit 19" "Ignored,Not ignored" bitfld.long 0x40 17. "MSGVAL[18],Message valid bit 18" "Ignored,Not ignored" newline bitfld.long 0x40 16. "MSGVAL[17],Message valid bit 17" "Ignored,Not ignored" bitfld.long 0x40 15. "MSGVAL[16],Message valid bit 16" "Ignored,Not ignored" bitfld.long 0x40 14. "MSGVAL[15],Message valid bit 15" "Ignored,Not ignored" newline bitfld.long 0x40 13. "MSGVAL[14],Message valid bit 14" "Ignored,Not ignored" bitfld.long 0x40 12. "MSGVAL[13],Message valid bit 13" "Ignored,Not ignored" bitfld.long 0x40 11. "MSGVAL[12],Message valid bit 12" "Ignored,Not ignored" newline bitfld.long 0x40 10. "MSGVAL[11],Message valid bit 11" "Ignored,Not ignored" bitfld.long 0x40 9. "MSGVAL[10],Message valid bit 10" "Ignored,Not ignored" bitfld.long 0x40 8. "MSGVAL[9],Message valid bit 9" "Ignored,Not ignored" newline bitfld.long 0x40 7. "MSGVAL[8],Message valid bit 8" "Ignored,Not ignored" bitfld.long 0x40 6. "MSGVAL[7],Message valid bit 7" "Ignored,Not ignored" bitfld.long 0x40 5. "MSGVAL[6],Message valid bit 6" "Ignored,Not ignored" newline bitfld.long 0x40 4. "MSGVAL[5],Message valid bit 5" "Ignored,Not ignored" bitfld.long 0x40 3. "MSGVAL[4],Message valid bit 4" "Ignored,Not ignored" bitfld.long 0x40 2. "MSGVAL[3],Message valid bit 3" "Ignored,Not ignored" newline bitfld.long 0x40 1. "MSGVAL[2],Message valid bit 2" "Ignored,Not ignored" bitfld.long 0x40 0. "MSGVAL[1],Message valid bit 1" "Ignored,Not ignored" line.long 0x44 "MSGVAL34,Message Valid Register 34" bitfld.long 0x44 31. "MSGVAL[64],Message valid bit 64" "Ignored,Not ignored" bitfld.long 0x44 30. "MSGVAL[63],Message valid bit 63" "Ignored,Not ignored" bitfld.long 0x44 29. "MSGVAL[62],Message valid bit 62" "Ignored,Not ignored" newline bitfld.long 0x44 28. "MSGVAL[61],Message valid bit 61" "Ignored,Not ignored" bitfld.long 0x44 27. "MSGVAL[60],Message valid bit 60" "Ignored,Not ignored" bitfld.long 0x44 26. "MSGVAL[59],Message valid bit 59" "Ignored,Not ignored" newline bitfld.long 0x44 25. "MSGVAL[58],Message valid bit 58" "Ignored,Not ignored" bitfld.long 0x44 24. "MSGVAL[57],Message valid bit 57" "Ignored,Not ignored" bitfld.long 0x44 23. "MSGVAL[56],Message valid bit 56" "Ignored,Not ignored" newline bitfld.long 0x44 22. "MSGVAL[55],Message valid bit 55" "Ignored,Not ignored" bitfld.long 0x44 21. "MSGVAL[54],Message valid bit 54" "Ignored,Not ignored" bitfld.long 0x44 20. "MSGVAL[53],Message valid bit 53" "Ignored,Not ignored" newline bitfld.long 0x44 19. "MSGVAL[52],Message valid bit 52" "Ignored,Not ignored" bitfld.long 0x44 18. "MSGVAL[51],Message valid bit 51" "Ignored,Not ignored" bitfld.long 0x44 17. "MSGVAL[50],Message valid bit 50" "Ignored,Not ignored" newline bitfld.long 0x44 16. "MSGVAL[49],Message valid bit 49" "Ignored,Not ignored" bitfld.long 0x44 15. "MSGVAL[48],Message valid bit 48" "Ignored,Not ignored" bitfld.long 0x44 14. "MSGVAL[47],Message valid bit 47" "Ignored,Not ignored" newline bitfld.long 0x44 13. "MSGVAL[46],Message valid bit 46" "Ignored,Not ignored" bitfld.long 0x44 12. "MSGVAL[45],Message valid bit 45" "Ignored,Not ignored" bitfld.long 0x44 11. "MSGVAL[44],Message valid bit 44" "Ignored,Not ignored" newline bitfld.long 0x44 10. "MSGVAL[43],Message valid bit 43" "Ignored,Not ignored" bitfld.long 0x44 9. "MSGVAL[42],Message valid bit 42" "Ignored,Not ignored" bitfld.long 0x44 8. "MSGVAL[41],Message valid bit 41" "Ignored,Not ignored" newline bitfld.long 0x44 7. "MSGVAL[40],Message valid bit 40" "Ignored,Not ignored" bitfld.long 0x44 6. "MSGVAL[39],Message valid bit 39" "Ignored,Not ignored" bitfld.long 0x44 5. "MSGVAL[38],Message valid bit 38" "Ignored,Not ignored" newline bitfld.long 0x44 4. "MSGVAL[37],Message valid bit 37" "Ignored,Not ignored" bitfld.long 0x44 3. "MSGVAL[36],Message valid bit 36" "Ignored,Not ignored" bitfld.long 0x44 2. "MSGVAL[35],Message valid bit 35" "Ignored,Not ignored" newline bitfld.long 0x44 1. "MSGVAL[34],Message valid bit 34" "Ignored,Not ignored" bitfld.long 0x44 0. "MSGVAL[33],Message valid bit 33" "Ignored,Not ignored" line.long 0x48 "MSGVAL56,Message Valid Register 56" bitfld.long 0x48 31. "MSGVAL[96],Message valid bit 96" "Ignored,Not ignored" bitfld.long 0x48 30. "MSGVAL[95],Message valid bit 95" "Ignored,Not ignored" bitfld.long 0x48 29. "MSGVAL[94],Message valid bit 94" "Ignored,Not ignored" newline bitfld.long 0x48 28. "MSGVAL[93],Message valid bit 93" "Ignored,Not ignored" bitfld.long 0x48 27. "MSGVAL[92],Message valid bit 92" "Ignored,Not ignored" bitfld.long 0x48 26. "MSGVAL[91],Message valid bit 91" "Ignored,Not ignored" newline bitfld.long 0x48 25. "MSGVAL[90],Message valid bit 90" "Ignored,Not ignored" bitfld.long 0x48 24. "MSGVAL[89],Message valid bit 89" "Ignored,Not ignored" bitfld.long 0x48 23. "MSGVAL[88],Message valid bit 88" "Ignored,Not ignored" newline bitfld.long 0x48 22. "MSGVAL[87],Message valid bit 87" "Ignored,Not ignored" bitfld.long 0x48 21. "MSGVAL[86],Message valid bit 86" "Ignored,Not ignored" bitfld.long 0x48 20. "MSGVAL[85],Message valid bit 85" "Ignored,Not ignored" newline bitfld.long 0x48 19. "MSGVAL[84],Message valid bit 84" "Ignored,Not ignored" bitfld.long 0x48 18. "MSGVAL[83],Message valid bit 83" "Ignored,Not ignored" bitfld.long 0x48 17. "MSGVAL[82],Message valid bit 82" "Ignored,Not ignored" newline bitfld.long 0x48 16. "MSGVAL[81],Message valid bit 81" "Ignored,Not ignored" bitfld.long 0x48 15. "MSGVAL[80],Message valid bit 80" "Ignored,Not ignored" bitfld.long 0x48 14. "MSGVAL[79],Message valid bit 79" "Ignored,Not ignored" newline bitfld.long 0x48 13. "MSGVAL[78],Message valid bit 78" "Ignored,Not ignored" bitfld.long 0x48 12. "MSGVAL[77],Message valid bit 77" "Ignored,Not ignored" bitfld.long 0x48 11. "MSGVAL[76],Message valid bit 76" "Ignored,Not ignored" newline bitfld.long 0x48 10. "MSGVAL[75],Message valid bit 75" "Ignored,Not ignored" bitfld.long 0x48 9. "MSGVAL[74],Message valid bit 74" "Ignored,Not ignored" bitfld.long 0x48 8. "MSGVAL[73],Message valid bit 73" "Ignored,Not ignored" newline bitfld.long 0x48 7. "MSGVAL[72],Message valid bit 72" "Ignored,Not ignored" bitfld.long 0x48 6. "MSGVAL[71],Message valid bit 71" "Ignored,Not ignored" bitfld.long 0x48 5. "MSGVAL[70],Message valid bit 70" "Ignored,Not ignored" newline bitfld.long 0x48 4. "MSGVAL[69],Message valid bit 69" "Ignored,Not ignored" bitfld.long 0x48 3. "MSGVAL[68],Message valid bit 68" "Ignored,Not ignored" bitfld.long 0x48 2. "MSGVAL[67],Message valid bit 67" "Ignored,Not ignored" newline bitfld.long 0x48 1. "MSGVAL[66],Message valid bit 66" "Ignored,Not ignored" bitfld.long 0x48 0. "MSGVAL[65],Message valid bit 65" "Ignored,Not ignored" line.long 0x4C "MSGVAL78,Message Valid Register 78" bitfld.long 0x4C 31. "MSGVAL[128],Message valid bit 128" "Ignored,Not ignored" bitfld.long 0x4C 30. "MSGVAL[127],Message valid bit 127" "Ignored,Not ignored" bitfld.long 0x4C 29. "MSGVAL[126],Message valid bit 126" "Ignored,Not ignored" newline bitfld.long 0x4C 28. "MSGVAL[125],Message valid bit 125" "Ignored,Not ignored" bitfld.long 0x4C 27. "MSGVAL[124],Message valid bit 124" "Ignored,Not ignored" bitfld.long 0x4C 26. "MSGVAL[123],Message valid bit 123" "Ignored,Not ignored" newline bitfld.long 0x4C 25. "MSGVAL[122],Message valid bit 122" "Ignored,Not ignored" bitfld.long 0x4C 24. "MSGVAL[121],Message valid bit 121" "Ignored,Not ignored" bitfld.long 0x4C 23. "MSGVAL[120],Message valid bit 120" "Ignored,Not ignored" newline bitfld.long 0x4C 22. "MSGVAL[119],Message valid bit 119" "Ignored,Not ignored" bitfld.long 0x4C 21. "MSGVAL[118],Message valid bit 118" "Ignored,Not ignored" bitfld.long 0x4C 20. "MSGVAL[117],Message valid bit 117" "Ignored,Not ignored" newline bitfld.long 0x4C 19. "MSGVAL[116],Message valid bit 116" "Ignored,Not ignored" bitfld.long 0x4C 18. "MSGVAL[115],Message valid bit 115" "Ignored,Not ignored" bitfld.long 0x4C 17. "MSGVAL[114],Message valid bit 114" "Ignored,Not ignored" newline bitfld.long 0x4C 16. "MSGVAL[113],Message valid bit 113" "Ignored,Not ignored" bitfld.long 0x4C 15. "MSGVAL[112],Message valid bit 112" "Ignored,Not ignored" bitfld.long 0x4C 14. "MSGVAL[111],Message valid bit 111" "Ignored,Not ignored" newline bitfld.long 0x4C 13. "MSGVAL[110],Message valid bit 110" "Ignored,Not ignored" bitfld.long 0x4C 12. "MSGVAL[109],Message valid bit 109" "Ignored,Not ignored" bitfld.long 0x4C 11. "MSGVAL[108],Message valid bit 108" "Ignored,Not ignored" newline bitfld.long 0x4C 10. "MSGVAL[107],Message valid bit 107" "Ignored,Not ignored" bitfld.long 0x4C 9. "MSGVAL[106],Message valid bit 106" "Ignored,Not ignored" bitfld.long 0x4C 8. "MSGVAL[105],Message valid bit 105" "Ignored,Not ignored" newline bitfld.long 0x4C 7. "MSGVAL[104],Message valid bit 104" "Ignored,Not ignored" bitfld.long 0x4C 6. "MSGVAL[103],Message valid bit 103" "Ignored,Not ignored" bitfld.long 0x4C 5. "MSGVAL[102],Message valid bit 102" "Ignored,Not ignored" newline bitfld.long 0x4C 4. "MSGVAL[101],Message valid bit 101" "Ignored,Not ignored" bitfld.long 0x4C 3. "MSGVAL[100],Message valid bit 100" "Ignored,Not ignored" bitfld.long 0x4C 2. "MSGVAL[99],Message valid bit 99" "Ignored,Not ignored" newline bitfld.long 0x4C 1. "MSGVAL[98],Message valid bit 98" "Ignored,Not ignored" bitfld.long 0x4C 0. "MSGVAL[97],Message valid bit 97" "Ignored,Not ignored" group.long 0xD8++0x0F line.long 0x00 "INTMUX12,Interrupt Multiplexer Register 12" bitfld.long 0x00 31. "INTMUX[32],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 30. "INTMUX[31],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 29. "INTMUX[30],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 28. "INTMUX[29],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 27. "INTMUX[28],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 26. "INTMUX[27],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 25. "INTMUX[26],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 24. "INTMUX[25],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 23. "INTMUX[24],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 22. "INTMUX[23],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 21. "INTMUX[22],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 20. "INTMUX[21],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 19. "INTMUX[20],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 18. "INTMUX[19],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 17. "INTMUX[18],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 16. "INTMUX[17],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 15. "INTMUX[16],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 14. "INTMUX[15],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 13. "INTMUX[14],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 12. "INTMUX[13],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 11. "INTMUX[12],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 10. "INTMUX[11],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 9. "INTMUX[10],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 8. "INTMUX[9],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 7. "INTMUX[8],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 6. "INTMUX[7],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 5. "INTMUX[6],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 4. "INTMUX[5],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 3. "INTMUX[4],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 2. "INTMUX[3],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x00 1. "INTMUX[2],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x00 0. "INTMUX[1],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" line.long 0x04 "INTMUX34,Interrupt Multiplexer Register 34" bitfld.long 0x04 31. "INTMUX[64],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 30. "INTMUX[63],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 29. "INTMUX[62],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 28. "INTMUX[61],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 27. "INTMUX[60],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 26. "INTMUX[59],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 25. "INTMUX[58],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 24. "INTMUX[57],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 23. "INTMUX[56],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 22. "INTMUX[55],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 21. "INTMUX[54],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 20. "INTMUX[53],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 19. "INTMUX[52],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 18. "INTMUX[51],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 17. "INTMUX[50],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 16. "INTMUX[49],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 15. "INTMUX[48],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 14. "INTMUX[47],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 13. "INTMUX[46],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 12. "INTMUX[45],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 11. "INTMUX[44],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 10. "INTMUX[43],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 9. "INTMUX[42],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 8. "INTMUX[41],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 7. "INTMUX[40],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 6. "INTMUX[39],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 5. "INTMUX[38],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 4. "INTMUX[37],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 3. "INTMUX[36],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 2. "INTMUX[35],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x04 1. "INTMUX[34],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x04 0. "INTMUX[33],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" line.long 0x08 "INTMUX56,Interrupt Multiplexer Register 56" bitfld.long 0x08 31. "INTMUX[96],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 30. "INTMUX[95],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 29. "INTMUX[94],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 28. "INTMUX[93],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 27. "INTMUX[92],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 26. "INTMUX[91],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 25. "INTMUX[9]0,Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 24. "INTMUX[89],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 23. "INTMUX[88],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 22. "INTMUX[87],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 21. "INTMUX[86],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 20. "INTMUX[85],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 19. "INTMUX[84],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 18. "INTMUX[83],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 17. "INTMUX[82],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 16. "INTMUX[81],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 15. "INTMUX[80],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 14. "INTMUX[79],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 13. "INTMUX[78],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 12. "INTMUX[77],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 11. "INTMUX[76],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 10. "INTMUX[75],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 9. "INTMUX[74],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 8. "INTMUX[73],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 7. "INTMUX[72],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 6. "INTMUX[71],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 5. "INTMUX[70],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 4. "INTMUX[69],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 3. "INTMUX[68],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 2. "INTMUX[67],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x08 1. "INTMUX[66],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x08 0. "INTMUX[65],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" line.long 0x0C "INTMUX78,Interrupt Multiplexer Register 78" bitfld.long 0x0C 31. "INTMUX[128],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 30. "INTMUX[127],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 29. "INTMUX[126],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 28. "INTMUX[125],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 27. "INTMUX[124,Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 26. "INTMUX[123,Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 25. "INTMUX[122],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 24. "INTMUX[121],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 23. "INTMUX[120],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 22. "INTMUX[119],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 21. "INTMUX[118],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 20. "INTMUX[117],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 19. "INTMUX[116],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 18. "INTMUX[115],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 17. "INTMUX[114],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 16. "INTMUX[113],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 15. "INTMUX[112],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 14. "INTMUX[111],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 13. "INTMUX[110],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 12. "INTMUX[109],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 11. "INTMUX[108],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 10. "INTMUX[107],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 9. "INTMUX[106],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 8. "INTMUX[105],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 7. "INTMUX[104],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 6. "INTMUX[103],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 5. "INTMUX[102],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 4. "INTMUX[101],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 3. "INTMUX[100],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 2. "INTMUX[99],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" newline bitfld.long 0x0C 1. "INTMUX[98],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" bitfld.long 0x0C 0. "INTMUX[97],Multiplexes intpnd value to either DCAN0INT or DCAN1INT interrupt lines" "DCAN0INT,DCAN1INT" if (1==3) group.long 0x100++0x03 line.long 0x00 "IF3OBS,IF3 Observation Register" rbitfld.long 0x00 15. "IF3_UPD,IF3 update data" "Not updated,Updated" rbitfld.long 0x00 12. "IF3_SDB,IF3 status of data B read access" "Read out,Not all readed" rbitfld.long 0x00 11. "IF3_SDA,IF3 status of data A read access" "Read out,Not all readed" newline rbitfld.long 0x00 10. "IF3_SC,IF3 status of control bits read access" "Read out,Not all readed" rbitfld.long 0x00 9. "IF3_SA,IF3 status of arbitration data read access" "Read out,Not all readed" rbitfld.long 0x00 8. "IF3_SA,IF3 status of mask data read access" "Read out,Not all readed" newline bitfld.long 0x00 4. "DATAB,Data B read observation" "Not read,Read" bitfld.long 0x00 3. "DATAA,Data A read observation" "Not read,Read" bitfld.long 0x00 2. "CTRL,Ctrl read observation" "Not read,Read" newline bitfld.long 0x00 1. "ARB,Arbitration data read observation" "Not read,Read" bitfld.long 0x00 0. "MASK,Mask data read observation" "Not read,Read" else if (((d.l(ad:0x481D0000+0x100))&0x8000)==0x8000) group.long 0x100++0x03 line.long 0x00 "IF1CMD,IF1 Command Register" rbitfld.long 0x00 23. "WR_RD,Write/read" "Read,Write" rbitfld.long 0x00 22. "MASK,Access mask bits" "Unchanged,Transfered" rbitfld.long 0x00 21. "ARB,Access arbitration bits" "Unchanged,Transfered" newline rbitfld.long 0x00 20. "CONTROL,Access control bits" "Unchanged,Transfered" rbitfld.long 0x00 19. "CLRINTPND,Clear interrupt pending bit" "Not cleared,Cleared" rbitfld.long 0x00 18. "TXRQST/NEWDAT,Access transmission request bit" "Cleared,Set" newline rbitfld.long 0x00 17. "DATA_A,Access data bytes 0-3" "Unchanged,Transfered" rbitfld.long 0x00 16. "DATA_B,Access data bytes 4-7" "Unchanged,Transfered" bitfld.long 0x00 15. "BUSY,Busy flag" "Not busy,Busy" newline rbitfld.long 0x00 14. "DMAACTIVE,Activation of DMA feature for subsequent internal IF1/2 update" "Not active,Active" hexmask.long.byte 0x00 0.--7. 1. "MESSAGE_NUMBER,Message number" else group.long 0x100++0x03 line.long 0x00 "IF1CMD,IF1 Command Register" bitfld.long 0x00 23. "WR_RD,Write/read" "Read,Write" bitfld.long 0x00 22. "MASK,Access mask bits" "Unchanged,Transfered" bitfld.long 0x00 21. "ARB,Access arbitration bits" "Unchanged,Transfered" newline bitfld.long 0x00 20. "CONTROL,Access control bits" "Unchanged,Transfered" bitfld.long 0x00 19. "CLRINTPND,Clear interrupt pending bit" "Not cleared,Cleared" bitfld.long 0x00 18. "TXRQST/NEWDAT,Access transmission request bit" "Cleared,Set" newline bitfld.long 0x00 17. "DATA_A,Access data bytes 0-3" "Unchanged,Transfered" bitfld.long 0x00 16. "DATA_B,Access data bytes 4-7" "Unchanged,Transfered" bitfld.long 0x00 15. "BUSY,Busy flag" "Not busy,Busy" newline bitfld.long 0x00 14. "DMAACTIVE,Activation of DMA feature for subsequent internal IF1/2 update" "Not active,Active" hexmask.long.byte 0x00 0.--7. 1. "MESSAGE_NUMBER,Message number" endif endif if ((((d.l(ad:0x481D0000+0x100))&0x8000)==0x8000)&&(((d.l(ad:0x481D0000+0x100+0x08))&0x40000000)==0x40000000)) rgroup.long (0x100+0x04)++0x03 line.long 0x00 "IF1MSK,IF1 Mask Register" bitfld.long 0x00 31. "MXTD,Mask extended identifier" "Disabled,Enabled" bitfld.long 0x00 30. "MDIR,Mask message direction" "Disabled,Enabled" bitfld.long 0x00 28. "MSK[28],Identifier mask 28" "Not used,Used" newline bitfld.long 0x00 27. "MSK[27],Identifier mask 27" "Not used,Used" bitfld.long 0x00 26. "MSK[26],Identifier mask 26" "Not used,Used" bitfld.long 0x00 25. "MSK[25],Identifier mask 25" "Not used,Used" newline bitfld.long 0x00 24. "MSK[24],Identifier mask 24" "Not used,Used" bitfld.long 0x00 23. "MSK[23],Identifier mask 23" "Not used,Used" bitfld.long 0x00 22. "MSK[22],Identifier mask 22" "Not used,Used" newline bitfld.long 0x00 21. "MSK[21],Identifier mask 21" "Not used,Used" bitfld.long 0x00 20. "MSK[20],Identifier mask 20" "Not used,Used" bitfld.long 0x00 19. "MSK[19],Identifier mask 19" "Not used,Used" newline bitfld.long 0x00 18. "MSK[18],Identifier mask 18" "Not used,Used" bitfld.long 0x00 17. "MSK[17],Identifier mask 17" "Not used,Used" bitfld.long 0x00 16. "MSK[16],Identifier mask 16" "Not used,Used" newline bitfld.long 0x00 15. "MSK[15],Identifier mask 15" "Not used,Used" bitfld.long 0x00 14. "MSK[14],Identifier mask 14" "Not used,Used" bitfld.long 0x00 13. "MSK[13],Identifier mask 13" "Not used,Used" newline bitfld.long 0x00 12. "MSK[12],Identifier mask 12" "Not used,Used" bitfld.long 0x00 11. "MSK[11],Identifier mask 11" "Not used,Used" bitfld.long 0x00 10. "MSK[10],Identifier mask 10" "Not used,Used" newline bitfld.long 0x00 9. "MSK[9],Identifier mask 9" "Not used,Used" bitfld.long 0x00 8. "MSK[8],Identifier mask 8" "Not used,Used" bitfld.long 0x00 7. "MSK[7],Identifier mask 7" "Not used,Used" newline bitfld.long 0x00 6. "MSK[6],Identifier mask 6" "Not used,Used" bitfld.long 0x00 5. "MSK[5],Identifier mask 5" "Not used,Used" bitfld.long 0x00 4. "MSK[4],Identifier mask 4" "Not used,Used" newline bitfld.long 0x00 3. "MSK[3],Identifier mask 3" "Not used,Used" bitfld.long 0x00 2. "MSK[2],Identifier mask 2" "Not used,Used" bitfld.long 0x00 1. "MSK[1],Identifier mask 1" "Not used,Used" newline bitfld.long 0x00 0. "MSK[0],Identifier mask 0" "Not used,Used" elif ((((d.l(ad:0x481D0000+0x100))&0x8000)==0x00)&&(((d.l(ad:0x481D0000+0x100+0x08))&0x40000000)==0x40000000)) group.long (0x100+0x04)++0x03 line.long 0x00 "IF1MSK,IF1 Mask Register" bitfld.long 0x00 31. "MXTD,Mask extended identifier" "Disabled,Enabled" bitfld.long 0x00 30. "MDIR,Mask message direction" "Disabled,Enabled" bitfld.long 0x00 28. "MSK[28],Identifier mask 28" "Not used,Used" newline bitfld.long 0x00 27. "MSK[27],Identifier mask 27" "Not used,Used" bitfld.long 0x00 26. "MSK[26],Identifier mask 26" "Not used,Used" bitfld.long 0x00 25. "MSK[25],Identifier mask 25" "Not used,Used" newline bitfld.long 0x00 24. "MSK[24],Identifier mask 24" "Not used,Used" bitfld.long 0x00 23. "MSK[23],Identifier mask 23" "Not used,Used" bitfld.long 0x00 22. "MSK[22],Identifier mask 22" "Not used,Used" newline bitfld.long 0x00 21. "MSK[21],Identifier mask 21" "Not used,Used" bitfld.long 0x00 20. "MSK[20],Identifier mask 20" "Not used,Used" bitfld.long 0x00 19. "MSK[19],Identifier mask 19" "Not used,Used" newline bitfld.long 0x00 18. "MSK[18],Identifier mask 18" "Not used,Used" bitfld.long 0x00 17. "MSK[17],Identifier mask 17" "Not used,Used" bitfld.long 0x00 16. "MSK[16],Identifier mask 16" "Not used,Used" newline bitfld.long 0x00 15. "MSK[15],Identifier mask 15" "Not used,Used" bitfld.long 0x00 14. "MSK[14],Identifier mask 14" "Not used,Used" bitfld.long 0x00 13. "MSK[13],Identifier mask 13" "Not used,Used" newline bitfld.long 0x00 12. "MSK[12],Identifier mask 12" "Not used,Used" bitfld.long 0x00 11. "MSK[11],Identifier mask 11" "Not used,Used" bitfld.long 0x00 10. "MSK[10],Identifier mask 10" "Not used,Used" newline bitfld.long 0x00 9. "MSK[9],Identifier mask 9" "Not used,Used" bitfld.long 0x00 8. "MSK[8],Identifier mask 8" "Not used,Used" bitfld.long 0x00 7. "MSK[7],Identifier mask 7" "Not used,Used" newline bitfld.long 0x00 6. "MSK[6],Identifier mask 6" "Not used,Used" bitfld.long 0x00 5. "MSK[5],Identifier mask 5" "Not used,Used" bitfld.long 0x00 4. "MSK[4],Identifier mask 4" "Not used,Used" newline bitfld.long 0x00 3. "MSK[3],Identifier mask 3" "Not used,Used" bitfld.long 0x00 2. "MSK[2],Identifier mask 2" "Not used,Used" bitfld.long 0x00 1. "MSK[1],Identifier mask 1" "Not used,Used" newline bitfld.long 0x00 0. "MSK[0],Identifier mask 0" "Not used,Used" elif ((((d.l(ad:0x481D0000+0x100))&0x8000)==0x8000)&&(((d.l(ad:0x481D0000+0x100+0x08))&0x40000000)==0x00)) rgroup.long (0x100+0x04)++0x03 line.long 0x00 "IF1MSK,IF1 Mask Register" bitfld.long 0x00 31. "MXTD,Mask extended identifier" "Disabled,Enabled" bitfld.long 0x00 30. "MDIR,Mask message direction" "Disabled,Enabled" bitfld.long 0x00 28. "MSK[28],Identifier mask 28" "Not used,Used" newline bitfld.long 0x00 27. "MSK[27],Identifier mask 27" "Not used,Used" bitfld.long 0x00 26. "MSK[26],Identifier mask 26" "Not used,Used" bitfld.long 0x00 25. "MSK[25],Identifier mask 25" "Not used,Used" newline bitfld.long 0x00 24. "MSK[24],Identifier mask 24" "Not used,Used" bitfld.long 0x00 23. "MSK[23],Identifier mask 23" "Not used,Used" bitfld.long 0x00 22. "MSK[22],Identifier mask 22" "Not used,Used" newline bitfld.long 0x00 21. "MSK[21],Identifier mask 21" "Not used,Used" bitfld.long 0x00 20. "MSK[20],Identifier mask 20" "Not used,Used" bitfld.long 0x00 19. "MSK[19],Identifier mask 19" "Not used,Used" newline bitfld.long 0x00 18. "MSK[18],Identifier mask 18" "Not used,Used" else group.long (0x100+0x04)++0x03 line.long 0x00 "IF1MSK,IF1 Mask Register" bitfld.long 0x00 31. "MXTD,Mask extended identifier" "Disabled,Enabled" bitfld.long 0x00 30. "MDIR,Mask message direction" "Disabled,Enabled" bitfld.long 0x00 28. "MSK[28],Identifier mask 28" "Not used,Used" newline bitfld.long 0x00 27. "MSK[27],Identifier mask 27" "Not used,Used" bitfld.long 0x00 26. "MSK[26],Identifier mask 26" "Not used,Used" bitfld.long 0x00 25. "MSK[25],Identifier mask 25" "Not used,Used" newline bitfld.long 0x00 24. "MSK[24],Identifier mask 24" "Not used,Used" bitfld.long 0x00 23. "MSK[23],Identifier mask 23" "Not used,Used" bitfld.long 0x00 22. "MSK[22],Identifier mask 22" "Not used,Used" newline bitfld.long 0x00 21. "MSK[21],Identifier mask 21" "Not used,Used" bitfld.long 0x00 20. "MSK[20],Identifier mask 20" "Not used,Used" bitfld.long 0x00 19. "MSK[19],Identifier mask 19" "Not used,Used" newline bitfld.long 0x00 18. "MSK[18],Identifier mask 18" "Not used,Used" endif if ((((d.l(ad:0x481D0000+0x100))&0x8000)==0x8000)&&(((d.l(ad:0x481D0000+0x100+0x08))&0x40000000)==0x40000000)) rgroup.long (0x100+0x08)++0x03 line.long 0x00 "IF1ARB,IF1 Arbitation Register" bitfld.long 0x00 31. "MSGVAL,Message valid" "Not valid,Valid" bitfld.long 0x00 30. "XTD,Extended identifier" "Standard,Extended" bitfld.long 0x00 29. "DIR,Message direction" "Receive,Transmit" newline hexmask.long 0x00 0.--28. 1. "ID28-0,Message identifier 29-bit identifier" elif ((((d.l(ad:0x481D0000+0x100))&0x8000)==0x00)&&(((d.l(ad:0x481D0000+0x100+0x08))&0x40000000)==0x40000000)) group.long (0x100+0x08)++0x03 line.long 0x00 "IF1ARB,IF1 Arbitation Register" bitfld.long 0x00 31. "MSGVAL,Message valid" "Not valid,Valid" bitfld.long 0x00 30. "XTD,Extended identifier" "Standard,Extended" bitfld.long 0x00 29. "DIR,Message direction" "Receive,Transmit" newline hexmask.long 0x00 0.--28. 1. "ID28-0,Message identifier 29-bit identifier" elif ((((d.l(ad:0x481D0000+0x100))&0x8000)==0x00)&&(((d.l(ad:0x481D0000+0x100+0x08))&0x40000000)==0x00)) group.long (0x100+0x08)++0x03 line.long 0x00 "IF1ARB,IF1 Arbitation Register" bitfld.long 0x00 31. "MSGVAL,Message valid" "Not valid,Valid" bitfld.long 0x00 30. "XTD,Extended identifier" "Standard,Extended" bitfld.long 0x00 29. "DIR,Message direction" "Receive,Transmit" newline hexmask.long.word 0x00 18.--28. 1. "ID28-18,Message identifier 11-bit identifier" else rgroup.long (0x100+0x08)++0x03 line.long 0x00 "IF1ARB,IF1 Arbitation Register" bitfld.long 0x00 31. "MSGVAL,Message valid" "Not valid,Valid" bitfld.long 0x00 30. "XTD,Extended identifier" "Standard,Extended" bitfld.long 0x00 29. "DIR,Message direction" "Receive,Transmit" newline hexmask.long.word 0x00 18.--28. 1. "ID28-18,Message identifier 11-bit identifier" endif if (((d.l(ad:0x481D0000+0x100))&0x8000)==0x8000) rgroup.long (0x100+0x0C)++0x03 line.long 0x00 "IF1MCTL,IF1 Message Control Register" bitfld.long 0x00 15. "NEWDAT,New data" "Not written,Written" bitfld.long 0x00 14. "MSGLST,Message lost" "Not lost,Lost" bitfld.long 0x00 13. "INTPND,Interrupt pending" "Not pending,Pending" newline bitfld.long 0x00 12. "UMASK,Use acceptance mask" "Not used,Used" bitfld.long 0x00 11. "TXIE,Transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. "RXIE,Receive interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "RMTEN,Remote enable" "Disabled,Enabled" bitfld.long 0x00 8. "TXRQST,Transmit request" "Not requested,Requested" bitfld.long 0x00 7. "EOB,End of block" "Not end,End" newline bitfld.long 0x00 0.--3. "DLC,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" else group.long (0x100+0x0C)++0x03 line.long 0x00 "IF1MCTL,IF1 Message Control Register" bitfld.long 0x00 15. "NEWDAT,New data" "Not written,Written" bitfld.long 0x00 14. "MSGLST,Message lost" "Not lost,Lost" bitfld.long 0x00 13. "INTPND,Interrupt pending" "Not pending,Pending" newline bitfld.long 0x00 12. "UMASK,Use acceptance mask" "Not used,Used" bitfld.long 0x00 11. "TXIE,Transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. "RXIE,Receive interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "RMTEN,Remote enable" "Disabled,Enabled" bitfld.long 0x00 8. "TXRQST,Transmit request" "Not requested,Requested" bitfld.long 0x00 7. "EOB,End of block" "Not end,End" newline bitfld.long 0x00 0.--3. "DLC,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" endif if (1==3) rgroup.long (0x100+0x10)++0x07 line.long 0x00 "IF1DATA,IF1 Data A Register" hexmask.long.byte 0x00 24.--31. 1. "DATA_3,Data 3 value" hexmask.long.byte 0x00 16.--23. 1. "DATA_2,Data 2 value" hexmask.long.byte 0x00 8.--15. 1. "DATA_1,Data 1 value" newline hexmask.long.byte 0x00 0.--7. 1. "DATA_0,Data 0 value" line.long 0x04 "IF1DATB,IF1 Data B Register" hexmask.long.byte 0x04 24.--31. 1. "DATA_7,Data 7 value" hexmask.long.byte 0x04 16.--23. 1. "DATA_6,Data 6 value" hexmask.long.byte 0x04 8.--15. 1. "DATA_5,Data 5 value" newline hexmask.long.byte 0x04 0.--7. 1. "DATA_4,Data 4 value" else group.long (0x100+0x10)++0x07 line.long 0x00 "IF1DATA,IF1 Data A Register" hexmask.long.byte 0x00 24.--31. 1. "DATA_3,Data 3 value" hexmask.long.byte 0x00 16.--23. 1. "DATA_2,Data 2 value" hexmask.long.byte 0x00 8.--15. 1. "DATA_1,Data 1 value" newline hexmask.long.byte 0x00 0.--7. 1. "DATA_0,Data 0 value" line.long 0x04 "IF1DATB,IF1 Data B Register" hexmask.long.byte 0x04 24.--31. 1. "DATA_7,Data 7 value" hexmask.long.byte 0x04 16.--23. 1. "DATA_6,Data 6 value" hexmask.long.byte 0x04 8.--15. 1. "DATA_5,Data 5 value" newline hexmask.long.byte 0x04 0.--7. 1. "DATA_4,Data 4 value" endif if (2==3) group.long 0x120++0x03 line.long 0x00 "IF3OBS,IF3 Observation Register" rbitfld.long 0x00 15. "IF3_UPD,IF3 update data" "Not updated,Updated" rbitfld.long 0x00 12. "IF3_SDB,IF3 status of data B read access" "Read out,Not all readed" rbitfld.long 0x00 11. "IF3_SDA,IF3 status of data A read access" "Read out,Not all readed" newline rbitfld.long 0x00 10. "IF3_SC,IF3 status of control bits read access" "Read out,Not all readed" rbitfld.long 0x00 9. "IF3_SA,IF3 status of arbitration data read access" "Read out,Not all readed" rbitfld.long 0x00 8. "IF3_SA,IF3 status of mask data read access" "Read out,Not all readed" newline bitfld.long 0x00 4. "DATAB,Data B read observation" "Not read,Read" bitfld.long 0x00 3. "DATAA,Data A read observation" "Not read,Read" bitfld.long 0x00 2. "CTRL,Ctrl read observation" "Not read,Read" newline bitfld.long 0x00 1. "ARB,Arbitration data read observation" "Not read,Read" bitfld.long 0x00 0. "MASK,Mask data read observation" "Not read,Read" else if (((d.l(ad:0x481D0000+0x120))&0x8000)==0x8000) group.long 0x120++0x03 line.long 0x00 "IF2CMD,IF2 Command Register" rbitfld.long 0x00 23. "WR_RD,Write/read" "Read,Write" rbitfld.long 0x00 22. "MASK,Access mask bits" "Unchanged,Transfered" rbitfld.long 0x00 21. "ARB,Access arbitration bits" "Unchanged,Transfered" newline rbitfld.long 0x00 20. "CONTROL,Access control bits" "Unchanged,Transfered" rbitfld.long 0x00 19. "CLRINTPND,Clear interrupt pending bit" "Not cleared,Cleared" rbitfld.long 0x00 18. "TXRQST/NEWDAT,Access transmission request bit" "Cleared,Set" newline rbitfld.long 0x00 17. "DATA_A,Access data bytes 0-3" "Unchanged,Transfered" rbitfld.long 0x00 16. "DATA_B,Access data bytes 4-7" "Unchanged,Transfered" bitfld.long 0x00 15. "BUSY,Busy flag" "Not busy,Busy" newline rbitfld.long 0x00 14. "DMAACTIVE,Activation of DMA feature for subsequent internal IF1/2 update" "Not active,Active" hexmask.long.byte 0x00 0.--7. 1. "MESSAGE_NUMBER,Message number" else group.long 0x120++0x03 line.long 0x00 "IF2CMD,IF2 Command Register" bitfld.long 0x00 23. "WR_RD,Write/read" "Read,Write" bitfld.long 0x00 22. "MASK,Access mask bits" "Unchanged,Transfered" bitfld.long 0x00 21. "ARB,Access arbitration bits" "Unchanged,Transfered" newline bitfld.long 0x00 20. "CONTROL,Access control bits" "Unchanged,Transfered" bitfld.long 0x00 19. "CLRINTPND,Clear interrupt pending bit" "Not cleared,Cleared" bitfld.long 0x00 18. "TXRQST/NEWDAT,Access transmission request bit" "Cleared,Set" newline bitfld.long 0x00 17. "DATA_A,Access data bytes 0-3" "Unchanged,Transfered" bitfld.long 0x00 16. "DATA_B,Access data bytes 4-7" "Unchanged,Transfered" bitfld.long 0x00 15. "BUSY,Busy flag" "Not busy,Busy" newline bitfld.long 0x00 14. "DMAACTIVE,Activation of DMA feature for subsequent internal IF1/2 update" "Not active,Active" hexmask.long.byte 0x00 0.--7. 1. "MESSAGE_NUMBER,Message number" endif endif if ((((d.l(ad:0x481D0000+0x120))&0x8000)==0x8000)&&(((d.l(ad:0x481D0000+0x120+0x08))&0x40000000)==0x40000000)) rgroup.long (0x120+0x04)++0x03 line.long 0x00 "IF2MSK,IF2 Mask Register" bitfld.long 0x00 31. "MXTD,Mask extended identifier" "Disabled,Enabled" bitfld.long 0x00 30. "MDIR,Mask message direction" "Disabled,Enabled" bitfld.long 0x00 28. "MSK[28],Identifier mask 28" "Not used,Used" newline bitfld.long 0x00 27. "MSK[27],Identifier mask 27" "Not used,Used" bitfld.long 0x00 26. "MSK[26],Identifier mask 26" "Not used,Used" bitfld.long 0x00 25. "MSK[25],Identifier mask 25" "Not used,Used" newline bitfld.long 0x00 24. "MSK[24],Identifier mask 24" "Not used,Used" bitfld.long 0x00 23. "MSK[23],Identifier mask 23" "Not used,Used" bitfld.long 0x00 22. "MSK[22],Identifier mask 22" "Not used,Used" newline bitfld.long 0x00 21. "MSK[21],Identifier mask 21" "Not used,Used" bitfld.long 0x00 20. "MSK[20],Identifier mask 20" "Not used,Used" bitfld.long 0x00 19. "MSK[19],Identifier mask 19" "Not used,Used" newline bitfld.long 0x00 18. "MSK[18],Identifier mask 18" "Not used,Used" bitfld.long 0x00 17. "MSK[17],Identifier mask 17" "Not used,Used" bitfld.long 0x00 16. "MSK[16],Identifier mask 16" "Not used,Used" newline bitfld.long 0x00 15. "MSK[15],Identifier mask 15" "Not used,Used" bitfld.long 0x00 14. "MSK[14],Identifier mask 14" "Not used,Used" bitfld.long 0x00 13. "MSK[13],Identifier mask 13" "Not used,Used" newline bitfld.long 0x00 12. "MSK[12],Identifier mask 12" "Not used,Used" bitfld.long 0x00 11. "MSK[11],Identifier mask 11" "Not used,Used" bitfld.long 0x00 10. "MSK[10],Identifier mask 10" "Not used,Used" newline bitfld.long 0x00 9. "MSK[9],Identifier mask 9" "Not used,Used" bitfld.long 0x00 8. "MSK[8],Identifier mask 8" "Not used,Used" bitfld.long 0x00 7. "MSK[7],Identifier mask 7" "Not used,Used" newline bitfld.long 0x00 6. "MSK[6],Identifier mask 6" "Not used,Used" bitfld.long 0x00 5. "MSK[5],Identifier mask 5" "Not used,Used" bitfld.long 0x00 4. "MSK[4],Identifier mask 4" "Not used,Used" newline bitfld.long 0x00 3. "MSK[3],Identifier mask 3" "Not used,Used" bitfld.long 0x00 2. "MSK[2],Identifier mask 2" "Not used,Used" bitfld.long 0x00 1. "MSK[1],Identifier mask 1" "Not used,Used" newline bitfld.long 0x00 0. "MSK[0],Identifier mask 0" "Not used,Used" elif ((((d.l(ad:0x481D0000+0x120))&0x8000)==0x00)&&(((d.l(ad:0x481D0000+0x120+0x08))&0x40000000)==0x40000000)) group.long (0x120+0x04)++0x03 line.long 0x00 "IF2MSK,IF2 Mask Register" bitfld.long 0x00 31. "MXTD,Mask extended identifier" "Disabled,Enabled" bitfld.long 0x00 30. "MDIR,Mask message direction" "Disabled,Enabled" bitfld.long 0x00 28. "MSK[28],Identifier mask 28" "Not used,Used" newline bitfld.long 0x00 27. "MSK[27],Identifier mask 27" "Not used,Used" bitfld.long 0x00 26. "MSK[26],Identifier mask 26" "Not used,Used" bitfld.long 0x00 25. "MSK[25],Identifier mask 25" "Not used,Used" newline bitfld.long 0x00 24. "MSK[24],Identifier mask 24" "Not used,Used" bitfld.long 0x00 23. "MSK[23],Identifier mask 23" "Not used,Used" bitfld.long 0x00 22. "MSK[22],Identifier mask 22" "Not used,Used" newline bitfld.long 0x00 21. "MSK[21],Identifier mask 21" "Not used,Used" bitfld.long 0x00 20. "MSK[20],Identifier mask 20" "Not used,Used" bitfld.long 0x00 19. "MSK[19],Identifier mask 19" "Not used,Used" newline bitfld.long 0x00 18. "MSK[18],Identifier mask 18" "Not used,Used" bitfld.long 0x00 17. "MSK[17],Identifier mask 17" "Not used,Used" bitfld.long 0x00 16. "MSK[16],Identifier mask 16" "Not used,Used" newline bitfld.long 0x00 15. "MSK[15],Identifier mask 15" "Not used,Used" bitfld.long 0x00 14. "MSK[14],Identifier mask 14" "Not used,Used" bitfld.long 0x00 13. "MSK[13],Identifier mask 13" "Not used,Used" newline bitfld.long 0x00 12. "MSK[12],Identifier mask 12" "Not used,Used" bitfld.long 0x00 11. "MSK[11],Identifier mask 11" "Not used,Used" bitfld.long 0x00 10. "MSK[10],Identifier mask 10" "Not used,Used" newline bitfld.long 0x00 9. "MSK[9],Identifier mask 9" "Not used,Used" bitfld.long 0x00 8. "MSK[8],Identifier mask 8" "Not used,Used" bitfld.long 0x00 7. "MSK[7],Identifier mask 7" "Not used,Used" newline bitfld.long 0x00 6. "MSK[6],Identifier mask 6" "Not used,Used" bitfld.long 0x00 5. "MSK[5],Identifier mask 5" "Not used,Used" bitfld.long 0x00 4. "MSK[4],Identifier mask 4" "Not used,Used" newline bitfld.long 0x00 3. "MSK[3],Identifier mask 3" "Not used,Used" bitfld.long 0x00 2. "MSK[2],Identifier mask 2" "Not used,Used" bitfld.long 0x00 1. "MSK[1],Identifier mask 1" "Not used,Used" newline bitfld.long 0x00 0. "MSK[0],Identifier mask 0" "Not used,Used" elif ((((d.l(ad:0x481D0000+0x120))&0x8000)==0x8000)&&(((d.l(ad:0x481D0000+0x120+0x08))&0x40000000)==0x00)) rgroup.long (0x120+0x04)++0x03 line.long 0x00 "IF2MSK,IF2 Mask Register" bitfld.long 0x00 31. "MXTD,Mask extended identifier" "Disabled,Enabled" bitfld.long 0x00 30. "MDIR,Mask message direction" "Disabled,Enabled" bitfld.long 0x00 28. "MSK[28],Identifier mask 28" "Not used,Used" newline bitfld.long 0x00 27. "MSK[27],Identifier mask 27" "Not used,Used" bitfld.long 0x00 26. "MSK[26],Identifier mask 26" "Not used,Used" bitfld.long 0x00 25. "MSK[25],Identifier mask 25" "Not used,Used" newline bitfld.long 0x00 24. "MSK[24],Identifier mask 24" "Not used,Used" bitfld.long 0x00 23. "MSK[23],Identifier mask 23" "Not used,Used" bitfld.long 0x00 22. "MSK[22],Identifier mask 22" "Not used,Used" newline bitfld.long 0x00 21. "MSK[21],Identifier mask 21" "Not used,Used" bitfld.long 0x00 20. "MSK[20],Identifier mask 20" "Not used,Used" bitfld.long 0x00 19. "MSK[19],Identifier mask 19" "Not used,Used" newline bitfld.long 0x00 18. "MSK[18],Identifier mask 18" "Not used,Used" else group.long (0x120+0x04)++0x03 line.long 0x00 "IF2MSK,IF2 Mask Register" bitfld.long 0x00 31. "MXTD,Mask extended identifier" "Disabled,Enabled" bitfld.long 0x00 30. "MDIR,Mask message direction" "Disabled,Enabled" bitfld.long 0x00 28. "MSK[28],Identifier mask 28" "Not used,Used" newline bitfld.long 0x00 27. "MSK[27],Identifier mask 27" "Not used,Used" bitfld.long 0x00 26. "MSK[26],Identifier mask 26" "Not used,Used" bitfld.long 0x00 25. "MSK[25],Identifier mask 25" "Not used,Used" newline bitfld.long 0x00 24. "MSK[24],Identifier mask 24" "Not used,Used" bitfld.long 0x00 23. "MSK[23],Identifier mask 23" "Not used,Used" bitfld.long 0x00 22. "MSK[22],Identifier mask 22" "Not used,Used" newline bitfld.long 0x00 21. "MSK[21],Identifier mask 21" "Not used,Used" bitfld.long 0x00 20. "MSK[20],Identifier mask 20" "Not used,Used" bitfld.long 0x00 19. "MSK[19],Identifier mask 19" "Not used,Used" newline bitfld.long 0x00 18. "MSK[18],Identifier mask 18" "Not used,Used" endif if ((((d.l(ad:0x481D0000+0x120))&0x8000)==0x8000)&&(((d.l(ad:0x481D0000+0x120+0x08))&0x40000000)==0x40000000)) rgroup.long (0x120+0x08)++0x03 line.long 0x00 "IF2ARB,IF2 Arbitation Register" bitfld.long 0x00 31. "MSGVAL,Message valid" "Not valid,Valid" bitfld.long 0x00 30. "XTD,Extended identifier" "Standard,Extended" bitfld.long 0x00 29. "DIR,Message direction" "Receive,Transmit" newline hexmask.long 0x00 0.--28. 1. "ID28-0,Message identifier 29-bit identifier" elif ((((d.l(ad:0x481D0000+0x120))&0x8000)==0x00)&&(((d.l(ad:0x481D0000+0x120+0x08))&0x40000000)==0x40000000)) group.long (0x120+0x08)++0x03 line.long 0x00 "IF2ARB,IF2 Arbitation Register" bitfld.long 0x00 31. "MSGVAL,Message valid" "Not valid,Valid" bitfld.long 0x00 30. "XTD,Extended identifier" "Standard,Extended" bitfld.long 0x00 29. "DIR,Message direction" "Receive,Transmit" newline hexmask.long 0x00 0.--28. 1. "ID28-0,Message identifier 29-bit identifier" elif ((((d.l(ad:0x481D0000+0x120))&0x8000)==0x00)&&(((d.l(ad:0x481D0000+0x120+0x08))&0x40000000)==0x00)) group.long (0x120+0x08)++0x03 line.long 0x00 "IF2ARB,IF2 Arbitation Register" bitfld.long 0x00 31. "MSGVAL,Message valid" "Not valid,Valid" bitfld.long 0x00 30. "XTD,Extended identifier" "Standard,Extended" bitfld.long 0x00 29. "DIR,Message direction" "Receive,Transmit" newline hexmask.long.word 0x00 18.--28. 1. "ID28-18,Message identifier 11-bit identifier" else rgroup.long (0x120+0x08)++0x03 line.long 0x00 "IF2ARB,IF2 Arbitation Register" bitfld.long 0x00 31. "MSGVAL,Message valid" "Not valid,Valid" bitfld.long 0x00 30. "XTD,Extended identifier" "Standard,Extended" bitfld.long 0x00 29. "DIR,Message direction" "Receive,Transmit" newline hexmask.long.word 0x00 18.--28. 1. "ID28-18,Message identifier 11-bit identifier" endif if (((d.l(ad:0x481D0000+0x120))&0x8000)==0x8000) rgroup.long (0x120+0x0C)++0x03 line.long 0x00 "IF2MCTL,IF2 Message Control Register" bitfld.long 0x00 15. "NEWDAT,New data" "Not written,Written" bitfld.long 0x00 14. "MSGLST,Message lost" "Not lost,Lost" bitfld.long 0x00 13. "INTPND,Interrupt pending" "Not pending,Pending" newline bitfld.long 0x00 12. "UMASK,Use acceptance mask" "Not used,Used" bitfld.long 0x00 11. "TXIE,Transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. "RXIE,Receive interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "RMTEN,Remote enable" "Disabled,Enabled" bitfld.long 0x00 8. "TXRQST,Transmit request" "Not requested,Requested" bitfld.long 0x00 7. "EOB,End of block" "Not end,End" newline bitfld.long 0x00 0.--3. "DLC,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" else group.long (0x120+0x0C)++0x03 line.long 0x00 "IF2MCTL,IF2 Message Control Register" bitfld.long 0x00 15. "NEWDAT,New data" "Not written,Written" bitfld.long 0x00 14. "MSGLST,Message lost" "Not lost,Lost" bitfld.long 0x00 13. "INTPND,Interrupt pending" "Not pending,Pending" newline bitfld.long 0x00 12. "UMASK,Use acceptance mask" "Not used,Used" bitfld.long 0x00 11. "TXIE,Transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. "RXIE,Receive interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "RMTEN,Remote enable" "Disabled,Enabled" bitfld.long 0x00 8. "TXRQST,Transmit request" "Not requested,Requested" bitfld.long 0x00 7. "EOB,End of block" "Not end,End" newline bitfld.long 0x00 0.--3. "DLC,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" endif if (2==3) rgroup.long (0x120+0x10)++0x07 line.long 0x00 "IF2DATA,IF2 Data A Register" hexmask.long.byte 0x00 24.--31. 1. "DATA_3,Data 3 value" hexmask.long.byte 0x00 16.--23. 1. "DATA_2,Data 2 value" hexmask.long.byte 0x00 8.--15. 1. "DATA_1,Data 1 value" newline hexmask.long.byte 0x00 0.--7. 1. "DATA_0,Data 0 value" line.long 0x04 "IF2DATB,IF2 Data B Register" hexmask.long.byte 0x04 24.--31. 1. "DATA_7,Data 7 value" hexmask.long.byte 0x04 16.--23. 1. "DATA_6,Data 6 value" hexmask.long.byte 0x04 8.--15. 1. "DATA_5,Data 5 value" newline hexmask.long.byte 0x04 0.--7. 1. "DATA_4,Data 4 value" else group.long (0x120+0x10)++0x07 line.long 0x00 "IF2DATA,IF2 Data A Register" hexmask.long.byte 0x00 24.--31. 1. "DATA_3,Data 3 value" hexmask.long.byte 0x00 16.--23. 1. "DATA_2,Data 2 value" hexmask.long.byte 0x00 8.--15. 1. "DATA_1,Data 1 value" newline hexmask.long.byte 0x00 0.--7. 1. "DATA_0,Data 0 value" line.long 0x04 "IF2DATB,IF2 Data B Register" hexmask.long.byte 0x04 24.--31. 1. "DATA_7,Data 7 value" hexmask.long.byte 0x04 16.--23. 1. "DATA_6,Data 6 value" hexmask.long.byte 0x04 8.--15. 1. "DATA_5,Data 5 value" newline hexmask.long.byte 0x04 0.--7. 1. "DATA_4,Data 4 value" endif if (3==3) group.long 0x140++0x03 line.long 0x00 "IF3OBS,IF3 Observation Register" rbitfld.long 0x00 15. "IF3_UPD,IF3 update data" "Not updated,Updated" rbitfld.long 0x00 12. "IF3_SDB,IF3 status of data B read access" "Read out,Not all readed" rbitfld.long 0x00 11. "IF3_SDA,IF3 status of data A read access" "Read out,Not all readed" newline rbitfld.long 0x00 10. "IF3_SC,IF3 status of control bits read access" "Read out,Not all readed" rbitfld.long 0x00 9. "IF3_SA,IF3 status of arbitration data read access" "Read out,Not all readed" rbitfld.long 0x00 8. "IF3_SA,IF3 status of mask data read access" "Read out,Not all readed" newline bitfld.long 0x00 4. "DATAB,Data B read observation" "Not read,Read" bitfld.long 0x00 3. "DATAA,Data A read observation" "Not read,Read" bitfld.long 0x00 2. "CTRL,Ctrl read observation" "Not read,Read" newline bitfld.long 0x00 1. "ARB,Arbitration data read observation" "Not read,Read" bitfld.long 0x00 0. "MASK,Mask data read observation" "Not read,Read" else if (((d.l(ad:0x481D0000+0x140))&0x8000)==0x8000) group.long 0x140++0x03 line.long 0x00 "IF3CMD,IF3 Command Register" rbitfld.long 0x00 23. "WR_RD,Write/read" "Read,Write" rbitfld.long 0x00 22. "MASK,Access mask bits" "Unchanged,Transfered" rbitfld.long 0x00 21. "ARB,Access arbitration bits" "Unchanged,Transfered" newline rbitfld.long 0x00 20. "CONTROL,Access control bits" "Unchanged,Transfered" rbitfld.long 0x00 19. "CLRINTPND,Clear interrupt pending bit" "Not cleared,Cleared" rbitfld.long 0x00 18. "TXRQST/NEWDAT,Access transmission request bit" "Cleared,Set" newline rbitfld.long 0x00 17. "DATA_A,Access data bytes 0-3" "Unchanged,Transfered" rbitfld.long 0x00 16. "DATA_B,Access data bytes 4-7" "Unchanged,Transfered" bitfld.long 0x00 15. "BUSY,Busy flag" "Not busy,Busy" newline rbitfld.long 0x00 14. "DMAACTIVE,Activation of DMA feature for subsequent internal IF1/2 update" "Not active,Active" hexmask.long.byte 0x00 0.--7. 1. "MESSAGE_NUMBER,Message number" else group.long 0x140++0x03 line.long 0x00 "IF3CMD,IF3 Command Register" bitfld.long 0x00 23. "WR_RD,Write/read" "Read,Write" bitfld.long 0x00 22. "MASK,Access mask bits" "Unchanged,Transfered" bitfld.long 0x00 21. "ARB,Access arbitration bits" "Unchanged,Transfered" newline bitfld.long 0x00 20. "CONTROL,Access control bits" "Unchanged,Transfered" bitfld.long 0x00 19. "CLRINTPND,Clear interrupt pending bit" "Not cleared,Cleared" bitfld.long 0x00 18. "TXRQST/NEWDAT,Access transmission request bit" "Cleared,Set" newline bitfld.long 0x00 17. "DATA_A,Access data bytes 0-3" "Unchanged,Transfered" bitfld.long 0x00 16. "DATA_B,Access data bytes 4-7" "Unchanged,Transfered" bitfld.long 0x00 15. "BUSY,Busy flag" "Not busy,Busy" newline bitfld.long 0x00 14. "DMAACTIVE,Activation of DMA feature for subsequent internal IF1/2 update" "Not active,Active" hexmask.long.byte 0x00 0.--7. 1. "MESSAGE_NUMBER,Message number" endif endif rgroup.long (0x140+0x04)++0x03 line.long 0x00 "IF3MSK,IF3 Mask Register" bitfld.long 0x00 31. "MXTD,Mask extended identifier" "Disabled,Enabled" bitfld.long 0x00 30. "MDIR,Mask message direction" "Disabled,Enabled" bitfld.long 0x00 28. "MSK[28],Identifier mask 28" "Not used,Used" newline bitfld.long 0x00 27. "MSK[27],Identifier mask 27" "Not used,Used" bitfld.long 0x00 26. "MSK[26],Identifier mask 26" "Not used,Used" bitfld.long 0x00 25. "MSK[25],Identifier mask 25" "Not used,Used" newline bitfld.long 0x00 24. "MSK[24],Identifier mask 24" "Not used,Used" bitfld.long 0x00 23. "MSK[23],Identifier mask 23" "Not used,Used" bitfld.long 0x00 22. "MSK[22],Identifier mask 22" "Not used,Used" newline bitfld.long 0x00 21. "MSK[21],Identifier mask 21" "Not used,Used" bitfld.long 0x00 20. "MSK[20],Identifier mask 20" "Not used,Used" bitfld.long 0x00 19. "MSK[19],Identifier mask 19" "Not used,Used" newline bitfld.long 0x00 18. "MSK[18],Identifier mask 18" "Not used,Used" bitfld.long 0x00 17. "MSK[17],Identifier mask 17" "Not used,Used" bitfld.long 0x00 16. "MSK[16],Identifier mask 16" "Not used,Used" newline bitfld.long 0x00 15. "MSK[15],Identifier mask 15" "Not used,Used" bitfld.long 0x00 14. "MSK[14],Identifier mask 14" "Not used,Used" bitfld.long 0x00 13. "MSK[13],Identifier mask 13" "Not used,Used" newline bitfld.long 0x00 12. "MSK[12],Identifier mask 12" "Not used,Used" bitfld.long 0x00 11. "MSK[11],Identifier mask 11" "Not used,Used" bitfld.long 0x00 10. "MSK[10],Identifier mask 10" "Not used,Used" newline bitfld.long 0x00 9. "MSK[9],Identifier mask 9" "Not used,Used" bitfld.long 0x00 8. "MSK[8],Identifier mask 8" "Not used,Used" bitfld.long 0x00 7. "MSK[7],Identifier mask 7" "Not used,Used" newline bitfld.long 0x00 6. "MSK[6],Identifier mask 6" "Not used,Used" bitfld.long 0x00 5. "MSK[5],Identifier mask 5" "Not used,Used" bitfld.long 0x00 4. "MSK[4],Identifier mask 4" "Not used,Used" newline bitfld.long 0x00 3. "MSK[3],Identifier mask 3" "Not used,Used" bitfld.long 0x00 2. "MSK[2],Identifier mask 2" "Not used,Used" bitfld.long 0x00 1. "MSK[1],Identifier mask 1" "Not used,Used" newline bitfld.long 0x00 0. "MSK[0],Identifier mask 0" "Not used,Used" rgroup.long (0x140+0x08)++0x03 line.long 0x00 "IF3ARB,IF3 Arbitation Register" bitfld.long 0x00 31. "MSGVAL,Message valid" "Not valid,Valid" bitfld.long 0x00 30. "XTD,Extended identifier" "Standard,Extended" bitfld.long 0x00 29. "DIR,Message direction" "Receive,Transmit" newline hexmask.long 0x00 0.--28. 1. "ID28-0,Message identifier 29-bit identifier" rgroup.long (0x140+0x0C)++0x03 line.long 0x00 "IF3MCTL,IF3 Message Control Register" bitfld.long 0x00 15. "NEWDAT,New data" "Not written,Written" bitfld.long 0x00 14. "MSGLST,Message lost" "Not lost,Lost" bitfld.long 0x00 13. "INTPND,Interrupt pending" "Not pending,Pending" newline bitfld.long 0x00 12. "UMASK,Use acceptance mask" "Not used,Used" bitfld.long 0x00 11. "TXIE,Transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. "RXIE,Receive interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 9. "RMTEN,Remote enable" "Disabled,Enabled" bitfld.long 0x00 8. "TXRQST,Transmit request" "Not requested,Requested" bitfld.long 0x00 7. "EOB,End of block" "Not end,End" newline bitfld.long 0x00 0.--3. "DLC,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" if (3==3) rgroup.long (0x140+0x10)++0x07 line.long 0x00 "IF3DATA,IF3 Data A Register" hexmask.long.byte 0x00 24.--31. 1. "DATA_3,Data 3 value" hexmask.long.byte 0x00 16.--23. 1. "DATA_2,Data 2 value" hexmask.long.byte 0x00 8.--15. 1. "DATA_1,Data 1 value" newline hexmask.long.byte 0x00 0.--7. 1. "DATA_0,Data 0 value" line.long 0x04 "IF3DATB,IF3 Data B Register" hexmask.long.byte 0x04 24.--31. 1. "DATA_7,Data 7 value" hexmask.long.byte 0x04 16.--23. 1. "DATA_6,Data 6 value" hexmask.long.byte 0x04 8.--15. 1. "DATA_5,Data 5 value" newline hexmask.long.byte 0x04 0.--7. 1. "DATA_4,Data 4 value" else group.long (0x140+0x10)++0x07 line.long 0x00 "IF3DATA,IF3 Data A Register" hexmask.long.byte 0x00 24.--31. 1. "DATA_3,Data 3 value" hexmask.long.byte 0x00 16.--23. 1. "DATA_2,Data 2 value" hexmask.long.byte 0x00 8.--15. 1. "DATA_1,Data 1 value" newline hexmask.long.byte 0x00 0.--7. 1. "DATA_0,Data 0 value" line.long 0x04 "IF3DATB,IF3 Data B Register" hexmask.long.byte 0x04 24.--31. 1. "DATA_7,Data 7 value" hexmask.long.byte 0x04 16.--23. 1. "DATA_6,Data 6 value" hexmask.long.byte 0x04 8.--15. 1. "DATA_5,Data 5 value" newline hexmask.long.byte 0x04 0.--7. 1. "DATA_4,Data 4 value" endif group.long 0x160++0x0F line.long 0x00 "IF3UPD12,IF3 Update Enable Register 12" bitfld.long 0x00 31. "IF3UPDATEEN[32],IF3 update enabled 32" "Disabled,Enabled" bitfld.long 0x00 30. "IF3UPDATEEN[31],IF3 update enabled 31" "Disabled,Enabled" bitfld.long 0x00 29. "IF3UPDATEEN[30],IF3 update enabled 30" "Disabled,Enabled" newline bitfld.long 0x00 28. "IF3UPDATEEN[29],IF3 update enabled 29" "Disabled,Enabled" bitfld.long 0x00 27. "IF3UPDATEEN[28],IF3 update enabled 28" "Disabled,Enabled" bitfld.long 0x00 26. "IF3UPDATEEN[27],IF3 update enabled 27" "Disabled,Enabled" newline bitfld.long 0x00 25. "IF3UPDATEEN[26],IF3 update enabled 26" "Disabled,Enabled" bitfld.long 0x00 24. "IF3UPDATEEN[25],IF3 update enabled 25" "Disabled,Enabled" bitfld.long 0x00 23. "IF3UPDATEEN[24],IF3 update enabled 24" "Disabled,Enabled" newline bitfld.long 0x00 22. "IF3UPDATEEN[23],IF3 update enabled 23" "Disabled,Enabled" bitfld.long 0x00 21. "IF3UPDATEEN[22],IF3 update enabled 22" "Disabled,Enabled" bitfld.long 0x00 20. "IF3UPDATEEN[21],IF3 update enabled 21" "Disabled,Enabled" newline bitfld.long 0x00 19. "IF3UPDATEEN[20],IF3 update enabled 20" "Disabled,Enabled" bitfld.long 0x00 18. "IF3UPDATEEN[19],IF3 update enabled 19" "Disabled,Enabled" bitfld.long 0x00 17. "IF3UPDATEEN[18],IF3 update enabled 18" "Disabled,Enabled" newline bitfld.long 0x00 16. "IF3UPDATEEN[17],IF3 update enabled 17" "Disabled,Enabled" bitfld.long 0x00 15. "IF3UPDATEEN[16],IF3 update enabled 16" "Disabled,Enabled" bitfld.long 0x00 14. "IF3UPDATEEN[15],IF3 update enabled 15" "Disabled,Enabled" newline bitfld.long 0x00 13. "IF3UPDATEEN[14],IF3 update enabled 14" "Disabled,Enabled" bitfld.long 0x00 12. "IF3UPDATEEN[13],IF3 update enabled 13" "Disabled,Enabled" bitfld.long 0x00 11. "IF3UPDATEEN[12],IF3 update enabled 12" "Disabled,Enabled" newline bitfld.long 0x00 10. "IF3UPDATEEN[11],IF3 update enabled 11" "Disabled,Enabled" bitfld.long 0x00 9. "IF3UPDATEEN[10],IF3 update enabled 10" "Disabled,Enabled" bitfld.long 0x00 8. "IF3UPDATEEN[9],IF3 update enabled 9" "Disabled,Enabled" newline bitfld.long 0x00 7. "IF3UPDATEEN[8],IF3 update enabled 8" "Disabled,Enabled" bitfld.long 0x00 6. "IF3UPDATEEN[7],IF3 update enabled 7" "Disabled,Enabled" bitfld.long 0x00 5. "IF3UPDATEEN[6],IF3 update enabled 6" "Disabled,Enabled" newline bitfld.long 0x00 4. "IF3UPDATEEN[5],IF3 update enabled 5" "Disabled,Enabled" bitfld.long 0x00 3. "IF3UPDATEEN[4],IF3 update enabled 4" "Disabled,Enabled" bitfld.long 0x00 2. "IF3UPDATEEN[3],IF3 update enabled 3" "Disabled,Enabled" newline bitfld.long 0x00 1. "IF3UPDATEEN[2],IF3 update enabled 2" "Disabled,Enabled" bitfld.long 0x00 0. "IF3UPDATEEN[1],IF3 update enabled 1" "Disabled,Enabled" line.long 0x04 "IF3UPD34,IF3 Update Enable Register 34" bitfld.long 0x04 31. "IF3UPDATEEN[64],IF3 update enabled 64" "Disabled,Enabled" bitfld.long 0x04 30. "IF3UPDATEEN[63],IF3 update enabled 63" "Disabled,Enabled" bitfld.long 0x04 29. "IF3UPDATEEN[62],IF3 update enabled 62" "Disabled,Enabled" newline bitfld.long 0x04 28. "IF3UPDATEEN[61],IF3 update enabled 61" "Disabled,Enabled" bitfld.long 0x04 27. "IF3UPDATEEN[60],IF3 update enabled 60" "Disabled,Enabled" bitfld.long 0x04 26. "IF3UPDATEEN[59],IF3 update enabled 59" "Disabled,Enabled" newline bitfld.long 0x04 25. "IF3UPDATEEN[58],IF3 update enabled 58" "Disabled,Enabled" bitfld.long 0x04 24. "IF3UPDATEEN[57],IF3 update enabled 57" "Disabled,Enabled" bitfld.long 0x04 23. "IF3UPDATEEN[56],IF3 update enabled 56" "Disabled,Enabled" newline bitfld.long 0x04 22. "IF3UPDATEEN[55],IF3 update enabled 55" "Disabled,Enabled" bitfld.long 0x04 21. "IF3UPDATEEN[54],IF3 update enabled 54" "Disabled,Enabled" bitfld.long 0x04 20. "IF3UPDATEEN[53],IF3 update enabled 53" "Disabled,Enabled" newline bitfld.long 0x04 19. "IF3UPDATEEN[52],IF3 update enabled 52" "Disabled,Enabled" bitfld.long 0x04 18. "IF3UPDATEEN[51],IF3 update enabled 51" "Disabled,Enabled" bitfld.long 0x04 17. "IF3UPDATEEN[50],IF3 update enabled 50" "Disabled,Enabled" newline bitfld.long 0x04 16. "IF3UPDATEEN[49],IF3 update enabled 49" "Disabled,Enabled" bitfld.long 0x04 15. "IF3UPDATEEN[48],IF3 update enabled 48" "Disabled,Enabled" bitfld.long 0x04 14. "IF3UPDATEEN[47],IF3 update enabled 47" "Disabled,Enabled" newline bitfld.long 0x04 13. "IF3UPDATEEN[46],IF3 update enabled 46" "Disabled,Enabled" bitfld.long 0x04 12. "IF3UPDATEEN[45],IF3 update enabled 45" "Disabled,Enabled" bitfld.long 0x04 11. "IF3UPDATEEN[44],IF3 update enabled 44" "Disabled,Enabled" newline bitfld.long 0x04 10. "IF3UPDATEEN[43],IF3 update enabled 43" "Disabled,Enabled" bitfld.long 0x04 9. "IF3UPDATEEN[42],IF3 update enabled 42" "Disabled,Enabled" bitfld.long 0x04 8. "IF3UPDATEEN[41],IF3 update enabled 41" "Disabled,Enabled" newline bitfld.long 0x04 7. "IF3UPDATEEN[40],IF3 update enabled 40" "Disabled,Enabled" bitfld.long 0x04 6. "IF3UPDATEEN[39],IF3 update enabled 39" "Disabled,Enabled" bitfld.long 0x04 5. "IF3UPDATEEN[38],IF3 update enabled 38" "Disabled,Enabled" newline bitfld.long 0x04 4. "IF3UPDATEEN[37],IF3 update enabled 37" "Disabled,Enabled" bitfld.long 0x04 3. "IF3UPDATEEN[36],IF3 update enabled 36" "Disabled,Enabled" bitfld.long 0x04 2. "IF3UPDATEEN[35],IF3 update enabled 35" "Disabled,Enabled" newline bitfld.long 0x04 1. "IF3UPDATEEN[34],IF3 update enabled 34" "Disabled,Enabled" bitfld.long 0x04 0. "IF3UPDATEEN[33],IF3 update enabled 33" "Disabled,Enabled" line.long 0x08 "IF3UPD56,IF3 Update Enable Register 56" bitfld.long 0x08 31. "IF3UPDATEEN[96],IF3 update enabled 96" "Disabled,Enabled" bitfld.long 0x08 30. "IF3UPDATEEN[95],IF3 update enabled 95" "Disabled,Enabled" bitfld.long 0x08 29. "IF3UPDATEEN[94],IF3 update enabled 94" "Disabled,Enabled" newline bitfld.long 0x08 28. "IF3UPDATEEN[93],IF3 update enabled 93" "Disabled,Enabled" bitfld.long 0x08 27. "IF3UPDATEEN[92],IF3 update enabled 92" "Disabled,Enabled" bitfld.long 0x08 26. "IF3UPDATEEN[91],IF3 update enabled 91" "Disabled,Enabled" newline bitfld.long 0x08 25. "IF3UPDATEEN[90],IF3 update enabled 90" "Disabled,Enabled" bitfld.long 0x08 24. "IF3UPDATEEN[89],IF3 update enabled 89" "Disabled,Enabled" bitfld.long 0x08 23. "IF3UPDATEEN[88],IF3 update enabled 88" "Disabled,Enabled" newline bitfld.long 0x08 22. "IF3UPDATEEN[87],IF3 update enabled 87" "Disabled,Enabled" bitfld.long 0x08 21. "IF3UPDATEEN[86],IF3 update enabled 86" "Disabled,Enabled" bitfld.long 0x08 20. "IF3UPDATEEN[85],IF3 update enabled 85" "Disabled,Enabled" newline bitfld.long 0x08 19. "IF3UPDATEEN[84],IF3 update enabled 84" "Disabled,Enabled" bitfld.long 0x08 18. "IF3UPDATEEN[83],IF3 update enabled 83" "Disabled,Enabled" bitfld.long 0x08 17. "IF3UPDATEEN[82],IF3 update enabled 82" "Disabled,Enabled" newline bitfld.long 0x08 16. "IF3UPDATEEN[81],IF3 update enabled 81" "Disabled,Enabled" bitfld.long 0x08 15. "IF3UPDATEEN[80],IF3 update enabled 80" "Disabled,Enabled" bitfld.long 0x08 14. "IF3UPDATEEN[79],IF3 update enabled 79" "Disabled,Enabled" newline bitfld.long 0x08 13. "IF3UPDATEEN[78],IF3 update enabled 78" "Disabled,Enabled" bitfld.long 0x08 12. "IF3UPDATEEN[77],IF3 update enabled 77" "Disabled,Enabled" bitfld.long 0x08 11. "IF3UPDATEEN[76],IF3 update enabled 76" "Disabled,Enabled" newline bitfld.long 0x08 10. "IF3UPDATEEN[75],IF3 update enabled 75" "Disabled,Enabled" bitfld.long 0x08 9. "IF3UPDATEEN[74],IF3 update enabled 74" "Disabled,Enabled" bitfld.long 0x08 8. "IF3UPDATEEN[73],IF3 update enabled 73" "Disabled,Enabled" newline bitfld.long 0x08 7. "IF3UPDATEEN[72],IF3 update enabled 72" "Disabled,Enabled" bitfld.long 0x08 6. "IF3UPDATEEN[71],IF3 update enabled 71" "Disabled,Enabled" bitfld.long 0x08 5. "IF3UPDATEEN[70],IF3 update enabled 70" "Disabled,Enabled" newline bitfld.long 0x08 4. "IF3UPDATEEN[69],IF3 update enabled 69" "Disabled,Enabled" bitfld.long 0x08 3. "IF3UPDATEEN[68],IF3 update enabled 68" "Disabled,Enabled" bitfld.long 0x08 2. "IF3UPDATEEN[67],IF3 update enabled 67" "Disabled,Enabled" newline bitfld.long 0x08 1. "IF3UPDATEEN[66],IF3 update enabled 66" "Disabled,Enabled" bitfld.long 0x08 0. "IF3UPDATEEN[65],IF3 update enabled 65" "Disabled,Enabled" line.long 0x0C "IF3UPD78,IF3 Update Enable Register 78" bitfld.long 0x0C 31. "IF3UPDATEEN[128],IF3 update enabled 128" "Disabled,Enabled" bitfld.long 0x0C 30. "IF3UPDATEEN[127],IF3 update enabled 127" "Disabled,Enabled" bitfld.long 0x0C 29. "IF3UPDATEEN[126],IF3 update enabled 126" "Disabled,Enabled" newline bitfld.long 0x0C 28. "IF3UPDATEEN[125],IF3 update enabled 125" "Disabled,Enabled" bitfld.long 0x0C 27. "IF3UPDATEEN[124],IF3 update enabled 124" "Disabled,Enabled" bitfld.long 0x0C 26. "IF3UPDATEEN[123],IF3 update enabled 123" "Disabled,Enabled" newline bitfld.long 0x0C 25. "IF3UPDATEEN[122],IF3 update enabled 122" "Disabled,Enabled" bitfld.long 0x0C 24. "IF3UPDATEEN[121],IF3 update enabled 121" "Disabled,Enabled" bitfld.long 0x0C 23. "IF3UPDATEEN[120],IF3 update enabled 120" "Disabled,Enabled" newline bitfld.long 0x0C 22. "IF3UPDATEEN[119],IF3 update enabled 119" "Disabled,Enabled" bitfld.long 0x0C 21. "IF3UPDATEEN[118],IF3 update enabled 118" "Disabled,Enabled" bitfld.long 0x0C 20. "IF3UPDATEEN[117],IF3 update enabled 117" "Disabled,Enabled" newline bitfld.long 0x0C 19. "IF3UPDATEEN[116],IF3 update enabled 116" "Disabled,Enabled" bitfld.long 0x0C 18. "IF3UPDATEEN[115],IF3 update enabled 115" "Disabled,Enabled" bitfld.long 0x0C 17. "IF3UPDATEEN[114],IF3 update enabled 114" "Disabled,Enabled" newline bitfld.long 0x0C 16. "IF3UPDATEEN[113],IF3 update enabled 113" "Disabled,Enabled" bitfld.long 0x0C 15. "IF3UPDATEEN[112],IF3 update enabled 112" "Disabled,Enabled" bitfld.long 0x0C 14. "IF3UPDATEEN[111],IF3 update enabled 111" "Disabled,Enabled" newline bitfld.long 0x0C 13. "IF3UPDATEEN[110],IF3 update enabled 110" "Disabled,Enabled" bitfld.long 0x0C 12. "IF3UPDATEEN[109],IF3 update enabled 109" "Disabled,Enabled" bitfld.long 0x0C 11. "IF3UPDATEEN[108],IF3 update enabled 108" "Disabled,Enabled" newline bitfld.long 0x0C 10. "IF3UPDATEEN[107],IF3 update enabled 107" "Disabled,Enabled" bitfld.long 0x0C 9. "IF3UPDATEEN[106],IF3 update enabled 106" "Disabled,Enabled" bitfld.long 0x0C 8. "IF3UPDATEEN[105],IF3 update enabled 105" "Disabled,Enabled" newline bitfld.long 0x0C 7. "IF3UPDATEEN[104],IF3 update enabled 104" "Disabled,Enabled" bitfld.long 0x0C 6. "IF3UPDATEEN[103],IF3 update enabled 103" "Disabled,Enabled" bitfld.long 0x0C 5. "IF3UPDATEEN[102],IF3 update enabled 102" "Disabled,Enabled" newline bitfld.long 0x0C 4. "IF3UPDATEEN[101],IF3 update enabled 101" "Disabled,Enabled" bitfld.long 0x0C 3. "IF3UPDATEEN[100],IF3 update enabled 100" "Disabled,Enabled" bitfld.long 0x0C 2. "IF3UPDATEEN[99],IF3 update enabled 99" "Disabled,Enabled" newline bitfld.long 0x0C 1. "IF3UPDATEEN[98],IF3 update enabled 98" "Disabled,Enabled" bitfld.long 0x0C 0. "IF3UPDATEEN[97],IF3 update enabled 97" "Disabled,Enabled" if (((d.l(ad:0x481D0000))&0x01)==0x01) group.long 0x1E0++0x07 line.long 0x00 "TIOC,TX IO Control Register" bitfld.long 0x00 18. "PU,Selection of pull direction" "Pull-down,Pull-up" bitfld.long 0x00 17. "PD,Pull disable" "Enabled,Disabled" bitfld.long 0x00 16. "OD,Open drain mode enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "FUNC,CAN_TX function" "GPIO,CAN" bitfld.long 0x00 2. "DIR,CAN_TX data direction" "Input,Output" bitfld.long 0x00 1. "OUT,CAN_TX data out write" "Low,High" newline rbitfld.long 0x00 0. "IN,CAN_TX data in" "Low,High" line.long 0x04 "RIOC,RX IO Control Register" bitfld.long 0x04 18. "PU,Selection of pull direction" "Pull-down,Pull-up" bitfld.long 0x04 17. "PD,Pull disable" "Enabled,Disabled" bitfld.long 0x04 16. "OD,Open drain mode enable" "Disabled,Enabled" newline bitfld.long 0x04 3. "FUNC,CAN_RX function" "GPIO,CAN" bitfld.long 0x04 2. "DIR,CAN_RX data direction" "Input,Output" bitfld.long 0x04 1. "OUT,CAN_RX data out write" "Low,High" newline bitfld.long 0x04 0. "IN,CAN_RX data in" "Low,High" else rgroup.long 0x1E0++0x07 line.long 0x00 "TIOC,TX IO Control Register" bitfld.long 0x00 18. "PU,Selection of pull direction" "Pull-down,Pull-up" bitfld.long 0x00 17. "PD,Pull disable" "Enabled,Disabled" bitfld.long 0x00 16. "OD,Open drain mode enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "FUNC,CAN_TX function" "GPIO,CAN" bitfld.long 0x00 2. "DIR,CAN_TX data direction" "Input,Output" bitfld.long 0x00 1. "OUT,CAN_TX data out write" "Low,High" newline bitfld.long 0x00 0. "IN,CAN_TX data in" "Low,High" line.long 0x04 "RIOC,RX IO Control Register" bitfld.long 0x04 18. "PU,Selection of pull direction" "Pull-down,Pull-up" bitfld.long 0x04 17. "PD,Pull disable" "Enabled,Disabled" bitfld.long 0x04 16. "OD,Open drain mode enable" "Disabled,Enabled" newline bitfld.long 0x04 3. "FUNC,CAN_RX function" "GPIO,CAN" bitfld.long 0x04 2. "DIR,CAN_RX data direction" "Input,Output" bitfld.long 0x04 1. "OUT,CAN_RX data out write" "Low,High" newline bitfld.long 0x04 0. "IN,CAN_RX data in" "Low,High" endif tree.end tree.end endif tree "McSPI (Multichannel Serial Port Interface)" tree "McSPI0" base ad:0x48030000 rgroup.long 0x00++0x03 line.long 0x00 "MCSPI_REVISION,McSPI Revision Register" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between old Scheme and current" "Legacy scheme,Revision 0.8,?..." hexmask.long.word 0x00 16.--27. 1. "FUNC,Function indicates a software compatible module family" bitfld.long 0x00 11.--15. "R_RTL,RTL revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "X_MAJOR,Major revision" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "CUSTOM,Custom revision" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "Y_MINOR,Minor revision" group.long 0x110++0x07 line.long 0x00 "MCSPI_SYSCONFIG,McSPI System Configuration Register" bitfld.long 0x00 8.--9. "CLOCKACTIVITY,Clocks activity during wake-up mode period (OCP/Functional clock)" "Off/Off,On/Off,Off/On,On/On" bitfld.long 0x00 3.--4. "SIDLEMODE,Power management" "Inactive,Normal,Smart-idle,?..." bitfld.long 0x00 1. "SOFTRESET,Software reset" "Normal mode,Reset" newline bitfld.long 0x00 0. "AUTOIDLE,Internal OCP Clock gating strategy" "Free-running,Automatic OCP" line.long 0x04 "MCSPI_SYSSTATUS,McSPI System Status Register" bitfld.long 0x04 0. "RESETDONE,Internal Reset Monitoring" "On-going,Completed" if (((d.l(ad:0x48030000+0x134))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x128))&0x04)==0x04) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 3. "RX0_OVERFLOW,Receiver register overflow (slave mode only)" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" newline bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x128))&0x04)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x128))&0x04)==0x04) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 3. "RX0_OVERFLOW,Receiver register overflow (slave mode only)" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" newline bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x128))&0x04)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x128))&0x04)==0x04) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 3. "RX0_OVERFLOW,Receiver register overflow (slave mode only)" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" newline bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x128))&0x04)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x128))&0x04)==0x04) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 3. "RX0_OVERFLOW,Receiver register overflow (slave mode only)" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" newline bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x128))&0x04)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x128))&0x04)==0x04) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 3. "RX0_OVERFLOW,Receiver register overflow (slave mode only)" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" newline bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x128))&0x04)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x128))&0x04)==0x04) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 3. "RX0_OVERFLOW,Receiver register overflow (slave mode only)" "False,Pending" newline bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x128))&0x04)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x128))&0x04)==0x04) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 3. "RX0_OVERFLOW,Receiver register overflow (slave mode only)" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" newline bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x128))&0x04)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x128))&0x04)==0x04) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 3. "RX0_OVERFLOW,Receiver register overflow (slave mode only)" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" newline bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x128))&0x04)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x48030000+0x134))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x148))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x48030000+0x170))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" else group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" endif group.long 0x11C++0x03 line.long 0x00 "MCSPI_IRQENABLE,McSPI Interrupt Enable Register" bitfld.long 0x00 17. "EOWKE,End of word count interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. "RX3_FULL__ENABLE,MCSPI_RX3 receiver register full or almost full interrupt enable" "Disabled,Enabled" bitfld.long 0x00 13. "TX3_UNDERFLOW__ENABLE,MCSPI_TX3 transmitter register underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 12. "TX3_EMPTY__ENABLE,MCSPI_TX3 transmitter register empty or almost empty interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. "RX2_FULL__ENABLE,MCSPI_RX2 receiver register full or almost full interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. "TX2_UNDERFLOW__ENABLE,MCSPI_TX2 transmitter register underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 8. "TX2_EMPTY__ENABLE,MCSPI_TX2 transmitter register empty or almost empty interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. "RX1_FULL__ENABLE,MCSPI_RX1 receiver register full or almost full interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. "TX1_UNDERFLOW__ENABLE,MCSPI_TX1 transmitter register underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "TX1_EMPTY__ENABLE,MCSPI_TX1 transmitter register empty or almost empty interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. "RX0_OVERFLOW__ENABLE,MCSPI_RX0 receivier register overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. "RX0_FULL__ENABLE,MCSPI_RX0 receiver register full or almost full interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "TX0_UNDERFLOW__ENABLE,MCSPI_TX0 transmitter register underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. "TX0_EMPTY__ENABLE,MCSPI_TX0 transmitter register empty or almost empty interrupt enable" "Disabled,Enabled" group.long 0x124++0x03 line.long 0x00 "MCSPI_SYST,McSPI System Register" bitfld.long 0x00 11. "SSB,Set status bit" "No effect,Sets all status bits" bitfld.long 0x00 10. "SPIENDIR,Sets the direction of the SPIEN[3:0] lines and SPICLK line" "Output,Input" bitfld.long 0x00 9. "SPIDATDIR1,Sets the direction of the SPIDAT[1]" "Output,Input" newline bitfld.long 0x00 8. "SPIDATDIR0,Sets the direction of the SPIDAT[0]" "Output,Input" bitfld.long 0x00 6. "SPICLK,SPICLK line" "Output,Input" bitfld.long 0x00 5. "SPIDAT_1,SPIDAT 1 line" "Low,High" newline bitfld.long 0x00 4. "SPIDAT_0,SPIDAT 0 line" "Low,High" bitfld.long 0x00 3. "SPIEN_3,SPIEN 3 line" "Low,High" bitfld.long 0x00 2. "SPIEN_2,SPIEN 2 line" "Low,High" newline bitfld.long 0x00 1. "SPIEN_1,SPIEN 1 line" "Low,High" bitfld.long 0x00 0. "SPIEN_0,SPIEN 0 line" "Low,High" if (((d.l(ad:0x48030000+0x128))&0x04)==0x04) group.long 0x128++0x03 line.long 0x00 "MCSPI_MODULCTRL,McSPI Module Control Register" bitfld.long 0x00 8. "FDAA,FIFO DMA Address 256-bit aligned" "MCSPI TX/RX,MCSPI_DAF TX/RX" bitfld.long 0x00 7. "MOA,Multiple word ocp access" "Disabled,Enabled with FIFO" bitfld.long 0x00 4.--6. "INITDLY,Initial SPI delay for first transfer (SPI bus clock) " "No delay,4,8,16,32,?..." newline bitfld.long 0x00 3. "SYSTEM_TEST,Enables the system test mode" "Functional,System test" bitfld.long 0x00 2. "MS,Master/Slave" "Master,Slave" bitfld.long 0x00 1. "PIN34,SPIEN Pin mode selection " "Used,Not used" else group.long 0x128++0x03 line.long 0x00 "MCSPI_MODULCTRL,McSPI Module Control Register" bitfld.long 0x00 8. "FDAA,FIFO DMA Address 256-bit aligned" "MCSPI TX/RX,MCSPI_DAF TX/RX" bitfld.long 0x00 7. "MOA,Multiple word ocp access" "Disabled,Enabled" bitfld.long 0x00 4.--6. "INITDLY,Initial SPI delay for first transfer (SPI bus clock)" "No delay,4,8,16,32,?..." newline bitfld.long 0x00 3. "SYSTEM_TEST,Enables the system test mode" "Functional,System test" bitfld.long 0x00 2. "MS,Master/Slave" "Master,Slave" bitfld.long 0x00 1. "PIN34,SPIEN Pin mode selection " "Used,Not used" newline bitfld.long 0x00 0. "SINGLE,Single/Multi Channel" "Multi,Single" endif tree "Channel 0" if (((d.l(ad:0x48030000+0x128))&0x04)==0x04) group.long 0x12C++0x03 line.long 0x00 "MCSPI_CH0CONF,McSPI Channel 0 Configuration Register" bitfld.long 0x00 29. "CLKG,Clock divider granularity" "power of 2,1 clock cycle" bitfld.long 0x00 28. "FFER,FIFO enabled for receive" "Disabled,Enabled" bitfld.long 0x00 27. "FFEW,FIFO enabled for transmit" "Disabled,Enabled" newline bitfld.long 0x00 25.--26. "TCS,Chip select time control (clock cycles)" "0.5,1.5,2.5,3.5" bitfld.long 0x00 24. "SBPOL,Start bit polarity" "0 during SPI transfer,1 during SPI transfer" bitfld.long 0x00 23. "SBE,Start bit enable for SPI transfer" "Default SPI transfe,D/CX" newline bitfld.long 0x00 21.--22. "SPIENSLV,SPI slave select signal detection" "SPIEN[0],SPIEN[1],SPIEN[2],SPIEN[3]" bitfld.long 0x00 19. "TURBO,Turbo mode" "Deactivated,Activated" bitfld.long 0x00 18. "IS,Input select" "Data line 0,Data line 1" newline bitfld.long 0x00 17. "DPE1,Transmission enable for data line 1" "Line 1,No transmission" bitfld.long 0x00 16. "DPE0,Transmission enable for data line 0" "Line 0,No transmission" bitfld.long 0x00 15. "DMAR,DMA read request" "Disabled,Enabled" newline bitfld.long 0x00 14. "DMAW,DMA write request" "Disabled,Enabled" bitfld.long 0x00 12.--13. "TRM,Transmit/receive modes" "Transmit and receive,Receive,Transmit,?..." bitfld.long 0x00 7.--11. "WL,SPI word length" ",,,4-bits long,5-bits long,6-bits long,7-bits long,8-bits long,9-bits long,10-bits long,11-bits long,12-bits long,13-bits long,14-bits long,15-bits long,16-bits long,17-bits long,18-bits long,19-bits long,20-bits long,21-bits long,22-bits long,23-bits long,24-bits long,25-bits long,26-bits long,27-bits long,28-bits long,29-bits long,30-bits long,31-bits long,32-bits long" newline bitfld.long 0x00 6. "EPOL,SPIEN polarity(Active)" "High,Low" bitfld.long 0x00 2.--5. "CLKD,Frequency divider for SPICLK" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.long 0x00 1. "POL,SPICLK polarity during active state" "High,Low" newline bitfld.long 0x00 0. "PHA,SPICLK phase" "Odd,Even" else group.long 0x12C++0x03 line.long 0x00 "MCSPI_CH0CONF,McSPI Channel 0 Configuration Register" bitfld.long 0x00 29. "CLKG,Clock divider granularity" "Power of 2,1 clock cycle" bitfld.long 0x00 28. "FFER,FIFO enabled for receive" "Disabled,Enabled" bitfld.long 0x00 27. "FFEW,FIFO enabled for transmit" "Disabled,Enabled" newline bitfld.long 0x00 25.--26. "TCS,Chip select time control (clock cycles)" "0.5,1.5,2.5,3.5" bitfld.long 0x00 24. "SBPOL,Start bit polarity" "0 during SPI transfer,1 during SPI transfer" bitfld.long 0x00 23. "SBE,Start bit enable for SPI transfer" "Default SPI transfe,D/CX" newline bitfld.long 0x00 19. "TURBO,Turbo mode" "Deactivated,Activated" bitfld.long 0x00 18. "IS,Input select" "Data line 0,Data line 1" bitfld.long 0x00 17. "DPE1,Transmission enable for data line 1" "Line 1,No transmission" newline bitfld.long 0x00 16. "DPE0,Transmission enable for data line 0" "Line 0,No transmission" bitfld.long 0x00 15. "DMAR,DMA read request" "Disabled,Enabled" bitfld.long 0x00 14. "DMAW,DMA write request" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. "TRM,Transmit/receive modes" "Transmit and receive,Receive,Transmit,?..." bitfld.long 0x00 7.--11. "WL,SPI word length" ",,,4-bits long,5-bits long,6-bits long,7-bits long,8-bits long,9-bits long,10-bits long,11-bits long,12-bits long,13-bits long,14-bits long,15-bits long,16-bits long,17-bits long,18-bits long,19-bits long,20-bits long,21-bits long,22-bits long,23-bits long,24-bits long,25-bits long,26-bits long,27-bits long,28-bits long,29-bits long,30-bits long,31-bits long,32-bits long" bitfld.long 0x00 6. "EPOL,SPIEN polarity(Active)" "High,Low" newline bitfld.long 0x00 2.--5. "CLKD,Frequency divider for SPICLK" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.long 0x00 1. "POL,SPICLK polarity during active state" "High,Low" bitfld.long 0x00 0. "PHA,SPICLK phase" "Odd,Even" endif rgroup.long (0x12C+0x04)++0x03 line.long 0x00 "MCSPI_CH0STAT,McSPI channel 0 status register register" bitfld.long 0x00 6. "RXFFF,Channel 0 FIFO receive buffer full status" "No Full,Full" bitfld.long 0x00 5. "RXFFE,Channel 0 FIFO receive buffer empty status" "No empty,Empty" bitfld.long 0x00 4. "TXFFF,Channel 0 FIFO transmit buffer full status" "No Full,Full" newline bitfld.long 0x00 3. "TXFFE,Channel 0 FIFO transmit buffer empty status" "No empty,Empty" bitfld.long 0x00 2. "EOT,Channel 0 end-of-transfer status" "Not ended,Ended" bitfld.long 0x00 1. "TXS,Channel 0 transmitter register status" "Full,Empty" newline bitfld.long 0x00 0. "RXS,Channel 0 receiver register status" "Empty,Full" group.long (0x12C+0x08)++0x07 line.long 0x00 "MCSPI_CH0CTRL,Channel 0 Control Registert" hexmask.long.byte 0x00 8.--15. 1. "EXTCLK,Clock ratio extension" bitfld.long 0x00 0. "EN,Channel 0 enable" "Disabled,Enabled" line.long 0x04 "MCSPI_TX0,McSPI channel 0 FIFO transmit buffer register" hgroup.long (0x12C+0x10)++0x03 hide.long 0x00 "MCSPI_RX0,McSPI channel 0 FIFO receive buffer register" in tree.end tree "Channel 1" if (((d.l(ad:0x48030000+0x128))&0x05)==0x01) group.long 0x140++0x03 line.long 0x00 "MCSPI_CH1CONF,McSPI Channel 1 Configuration Register" bitfld.long 0x00 29. "CLKG,Clock divider granularity" "power of 2,1 clock cycle" bitfld.long 0x00 28. "FFER,FIFO enabled for receive" "Disabled,Enabled" bitfld.long 0x00 27. "FFEW,FIFO enabled for transmit" "Disabled,Enabled" newline bitfld.long 0x00 25.--26. "TCS,Chip select time control (clock cycles)" "0.5,1.5,2.5,3.5" bitfld.long 0x00 24. "SBPOL,Start bit polarity" "0 during SPI transfer,1 during SPI transfer" bitfld.long 0x00 23. "SBE,Start bit enable for SPI transfer" "Default SPI transfe,D/CX" newline bitfld.long 0x00 20. "FORCE,Manual SPIEN assertion to keep SPIEN active between SPI words" "Not asserted,Asserted" bitfld.long 0x00 19. "TURBO,Turbo mode" "Deactivated,Activated" bitfld.long 0x00 18. "IS,Input select" "Data line 0,Data line 1" newline bitfld.long 0x00 17. "DPE1,Transmission enable for data line 1" "Line 1,No transmission" bitfld.long 0x00 16. "DPE0,Transmission enable for data line 0" "Line 0,No transmission" bitfld.long 0x00 15. "DMAR,DMA read request" "Disabled,Enabled" newline bitfld.long 0x00 14. "DMAW,DMA write request" "Disabled,Enabled" bitfld.long 0x00 12.--13. "TRM,Transmit/receive modes" "Transmit and receive,Receive,Transmit,?..." bitfld.long 0x00 7.--11. "WL,SPI word length" ",,,4-bits long,5-bits long,6-bits long,7-bits long,8-bits long,9-bits long,10-bits long,11-bits long,12-bits long,13-bits long,14-bits long,15-bits long,16-bits long,17-bits long,18-bits long,19-bits long,20-bits long,21-bits long,22-bits long,23-bits long,24-bits long,25-bits long,26-bits long,27-bits long,28-bits long,29-bits long,30-bits long,31-bits long,32-bits long" newline bitfld.long 0x00 6. "EPOL,SPIEN polarity(Active)" "High,Low" bitfld.long 0x00 2.--5. "CLKD,Frequency divider for SPICLK" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.long 0x00 1. "POL,SPICLK polarity during active state" "High,Low" newline bitfld.long 0x00 0. "PHA,SPICLK phase" "Odd,Even" else group.long 0x140++0x03 line.long 0x00 "MCSPI_CH1CONF,McSPI Channel 1 Configuration Register" bitfld.long 0x00 29. "CLKG,Clock divider granularity" "Power of 2,1 clock cycle" bitfld.long 0x00 28. "FFER,FIFO enabled for receive" "Disabled,Enabled" bitfld.long 0x00 27. "FFEW,FIFO enabled for transmit" "Disabled,Enabled" newline bitfld.long 0x00 25.--26. "TCS,Chip select time control (clock cycles)" "0.5,1.5,2.5,3.5" bitfld.long 0x00 24. "SBPOL,Start bit polarity" "0 during SPI transfer,1 during SPI transfer" bitfld.long 0x00 23. "SBE,Start bit enable for SPI transfer" "Default SPI transfe,D/CX" newline bitfld.long 0x00 19. "TURBO,Turbo mode" "Deactivated,Activated" bitfld.long 0x00 18. "IS,Input select" "Data line 0,Data line 1" bitfld.long 0x00 17. "DPE1,Transmission enable for data line 1" "Line 1,No transmission" newline bitfld.long 0x00 16. "DPE0,Transmission enable for data line 0" "Line 0,No transmission" bitfld.long 0x00 15. "DMAR,DMA read request" "Disabled,Enabled" bitfld.long 0x00 14. "DMAW,DMA write request" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. "TRM,Transmit/receive modes" "Transmit and receive,Receive,Transmit,?..." bitfld.long 0x00 7.--11. "WL,SPI word length" ",,,4-bits long,5-bits long,6-bits long,7-bits long,8-bits long,9-bits long,10-bits long,11-bits long,12-bits long,13-bits long,14-bits long,15-bits long,16-bits long,17-bits long,18-bits long,19-bits long,20-bits long,21-bits long,22-bits long,23-bits long,24-bits long,25-bits long,26-bits long,27-bits long,28-bits long,29-bits long,30-bits long,31-bits long,32-bits long" bitfld.long 0x00 6. "EPOL,SPIEN polarity(Active)" "High,Low" newline bitfld.long 0x00 2.--5. "CLKD,Frequency divider for SPICLK" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.long 0x00 1. "POL,SPICLK polarity during active state" "High,Low" bitfld.long 0x00 0. "PHA,SPICLK phase" "Odd,Even" endif rgroup.long (0x140+0x04)++0x03 line.long 0x00 "MCSPI_CH1STAT,McSPI channel 1 status register register" bitfld.long 0x00 6. "RXFFF,Channel 1 FIFO receive buffer full status" "No Full,Full" bitfld.long 0x00 5. "RXFFE,Channel 1 FIFO receive buffer empty status" "No empty,Empty" bitfld.long 0x00 4. "TXFFF,Channel 1 FIFO transmit buffer full status" "No Full,Full" newline bitfld.long 0x00 3. "TXFFE,Channel 1 FIFO transmit buffer empty status" "No empty,Empty" bitfld.long 0x00 2. "EOT,Channel 1 end-of-transfer status" "Not ended,Ended" bitfld.long 0x00 1. "TXS,Channel 1 transmitter register status" "Full,Empty" newline bitfld.long 0x00 0. "RXS,Channel 1 receiver register status" "Empty,Full" group.long (0x140+0x08)++0x07 line.long 0x00 "MCSPI_CH1CTRL,Channel 1 Control Registert" hexmask.long.byte 0x00 8.--15. 1. "EXTCLK,Clock ratio extension" bitfld.long 0x00 0. "EN,Channel 1 enable" "Disabled,Enabled" line.long 0x04 "MCSPI_TX1,McSPI channel 1 FIFO transmit buffer register" hgroup.long (0x140+0x10)++0x03 hide.long 0x00 "MCSPI_RX1,McSPI channel 1 FIFO receive buffer register" in tree.end tree "Channel 2" if (((d.l(ad:0x48030000+0x128))&0x05)==0x01) group.long 0x154++0x03 line.long 0x00 "MCSPI_CH2CONF,McSPI Channel 2 Configuration Register" bitfld.long 0x00 29. "CLKG,Clock divider granularity" "power of 2,1 clock cycle" bitfld.long 0x00 28. "FFER,FIFO enabled for receive" "Disabled,Enabled" bitfld.long 0x00 27. "FFEW,FIFO enabled for transmit" "Disabled,Enabled" newline bitfld.long 0x00 25.--26. "TCS,Chip select time control (clock cycles)" "0.5,1.5,2.5,3.5" bitfld.long 0x00 24. "SBPOL,Start bit polarity" "0 during SPI transfer,1 during SPI transfer" bitfld.long 0x00 23. "SBE,Start bit enable for SPI transfer" "Default SPI transfe,D/CX" newline bitfld.long 0x00 20. "FORCE,Manual SPIEN assertion to keep SPIEN active between SPI words" "Not asserted,Asserted" bitfld.long 0x00 19. "TURBO,Turbo mode" "Deactivated,Activated" bitfld.long 0x00 18. "IS,Input select" "Data line 0,Data line 1" newline bitfld.long 0x00 17. "DPE1,Transmission enable for data line 1" "Line 1,No transmission" bitfld.long 0x00 16. "DPE0,Transmission enable for data line 0" "Line 0,No transmission" bitfld.long 0x00 15. "DMAR,DMA read request" "Disabled,Enabled" newline bitfld.long 0x00 14. "DMAW,DMA write request" "Disabled,Enabled" bitfld.long 0x00 12.--13. "TRM,Transmit/receive modes" "Transmit and receive,Receive,Transmit,?..." bitfld.long 0x00 7.--11. "WL,SPI word length" ",,,4-bits long,5-bits long,6-bits long,7-bits long,8-bits long,9-bits long,10-bits long,11-bits long,12-bits long,13-bits long,14-bits long,15-bits long,16-bits long,17-bits long,18-bits long,19-bits long,20-bits long,21-bits long,22-bits long,23-bits long,24-bits long,25-bits long,26-bits long,27-bits long,28-bits long,29-bits long,30-bits long,31-bits long,32-bits long" newline bitfld.long 0x00 6. "EPOL,SPIEN polarity(Active)" "High,Low" bitfld.long 0x00 2.--5. "CLKD,Frequency divider for SPICLK" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.long 0x00 1. "POL,SPICLK polarity during active state" "High,Low" newline bitfld.long 0x00 0. "PHA,SPICLK phase" "Odd,Even" else group.long 0x154++0x03 line.long 0x00 "MCSPI_CH2CONF,McSPI Channel 2 Configuration Register" bitfld.long 0x00 29. "CLKG,Clock divider granularity" "Power of 2,1 clock cycle" bitfld.long 0x00 28. "FFER,FIFO enabled for receive" "Disabled,Enabled" bitfld.long 0x00 27. "FFEW,FIFO enabled for transmit" "Disabled,Enabled" newline bitfld.long 0x00 25.--26. "TCS,Chip select time control (clock cycles)" "0.5,1.5,2.5,3.5" bitfld.long 0x00 24. "SBPOL,Start bit polarity" "0 during SPI transfer,1 during SPI transfer" bitfld.long 0x00 23. "SBE,Start bit enable for SPI transfer" "Default SPI transfe,D/CX" newline bitfld.long 0x00 19. "TURBO,Turbo mode" "Deactivated,Activated" bitfld.long 0x00 18. "IS,Input select" "Data line 0,Data line 1" bitfld.long 0x00 17. "DPE1,Transmission enable for data line 1" "Line 1,No transmission" newline bitfld.long 0x00 16. "DPE0,Transmission enable for data line 0" "Line 0,No transmission" bitfld.long 0x00 15. "DMAR,DMA read request" "Disabled,Enabled" bitfld.long 0x00 14. "DMAW,DMA write request" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. "TRM,Transmit/receive modes" "Transmit and receive,Receive,Transmit,?..." bitfld.long 0x00 7.--11. "WL,SPI word length" ",,,4-bits long,5-bits long,6-bits long,7-bits long,8-bits long,9-bits long,10-bits long,11-bits long,12-bits long,13-bits long,14-bits long,15-bits long,16-bits long,17-bits long,18-bits long,19-bits long,20-bits long,21-bits long,22-bits long,23-bits long,24-bits long,25-bits long,26-bits long,27-bits long,28-bits long,29-bits long,30-bits long,31-bits long,32-bits long" bitfld.long 0x00 6. "EPOL,SPIEN polarity(Active)" "High,Low" newline bitfld.long 0x00 2.--5. "CLKD,Frequency divider for SPICLK" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.long 0x00 1. "POL,SPICLK polarity during active state" "High,Low" bitfld.long 0x00 0. "PHA,SPICLK phase" "Odd,Even" endif rgroup.long (0x154+0x04)++0x03 line.long 0x00 "MCSPI_CH2STAT,McSPI channel 2 status register register" bitfld.long 0x00 6. "RXFFF,Channel 2 FIFO receive buffer full status" "No Full,Full" bitfld.long 0x00 5. "RXFFE,Channel 2 FIFO receive buffer empty status" "No empty,Empty" bitfld.long 0x00 4. "TXFFF,Channel 2 FIFO transmit buffer full status" "No Full,Full" newline bitfld.long 0x00 3. "TXFFE,Channel 2 FIFO transmit buffer empty status" "No empty,Empty" bitfld.long 0x00 2. "EOT,Channel 2 end-of-transfer status" "Not ended,Ended" bitfld.long 0x00 1. "TXS,Channel 2 transmitter register status" "Full,Empty" newline bitfld.long 0x00 0. "RXS,Channel 2 receiver register status" "Empty,Full" group.long (0x154+0x08)++0x07 line.long 0x00 "MCSPI_CH2CTRL,Channel 2 Control Registert" hexmask.long.byte 0x00 8.--15. 1. "EXTCLK,Clock ratio extension" bitfld.long 0x00 0. "EN,Channel 2 enable" "Disabled,Enabled" line.long 0x04 "MCSPI_TX2,McSPI channel 2 FIFO transmit buffer register" hgroup.long (0x154+0x10)++0x03 hide.long 0x00 "MCSPI_RX2,McSPI channel 2 FIFO receive buffer register" in tree.end tree "Channel 3" if (((d.l(ad:0x48030000+0x128))&0x05)==0x01) group.long 0x168++0x03 line.long 0x00 "MCSPI_CH3CONF,McSPI Channel 3 Configuration Register" bitfld.long 0x00 29. "CLKG,Clock divider granularity" "power of 2,1 clock cycle" bitfld.long 0x00 28. "FFER,FIFO enabled for receive" "Disabled,Enabled" bitfld.long 0x00 27. "FFEW,FIFO enabled for transmit" "Disabled,Enabled" newline bitfld.long 0x00 25.--26. "TCS,Chip select time control (clock cycles)" "0.5,1.5,2.5,3.5" bitfld.long 0x00 24. "SBPOL,Start bit polarity" "0 during SPI transfer,1 during SPI transfer" bitfld.long 0x00 23. "SBE,Start bit enable for SPI transfer" "Default SPI transfe,D/CX" newline bitfld.long 0x00 20. "FORCE,Manual SPIEN assertion to keep SPIEN active between SPI words" "Not asserted,Asserted" bitfld.long 0x00 19. "TURBO,Turbo mode" "Deactivated,Activated" bitfld.long 0x00 18. "IS,Input select" "Data line 0,Data line 1" newline bitfld.long 0x00 17. "DPE1,Transmission enable for data line 1" "Line 1,No transmission" bitfld.long 0x00 16. "DPE0,Transmission enable for data line 0" "Line 0,No transmission" bitfld.long 0x00 15. "DMAR,DMA read request" "Disabled,Enabled" newline bitfld.long 0x00 14. "DMAW,DMA write request" "Disabled,Enabled" bitfld.long 0x00 12.--13. "TRM,Transmit/receive modes" "Transmit and receive,Receive,Transmit,?..." bitfld.long 0x00 7.--11. "WL,SPI word length" ",,,4-bits long,5-bits long,6-bits long,7-bits long,8-bits long,9-bits long,10-bits long,11-bits long,12-bits long,13-bits long,14-bits long,15-bits long,16-bits long,17-bits long,18-bits long,19-bits long,20-bits long,21-bits long,22-bits long,23-bits long,24-bits long,25-bits long,26-bits long,27-bits long,28-bits long,29-bits long,30-bits long,31-bits long,32-bits long" newline bitfld.long 0x00 6. "EPOL,SPIEN polarity(Active)" "High,Low" bitfld.long 0x00 2.--5. "CLKD,Frequency divider for SPICLK" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.long 0x00 1. "POL,SPICLK polarity during active state" "High,Low" newline bitfld.long 0x00 0. "PHA,SPICLK phase" "Odd,Even" else group.long 0x168++0x03 line.long 0x00 "MCSPI_CH3CONF,McSPI Channel 3 Configuration Register" bitfld.long 0x00 29. "CLKG,Clock divider granularity" "Power of 2,1 clock cycle" bitfld.long 0x00 28. "FFER,FIFO enabled for receive" "Disabled,Enabled" bitfld.long 0x00 27. "FFEW,FIFO enabled for transmit" "Disabled,Enabled" newline bitfld.long 0x00 25.--26. "TCS,Chip select time control (clock cycles)" "0.5,1.5,2.5,3.5" bitfld.long 0x00 24. "SBPOL,Start bit polarity" "0 during SPI transfer,1 during SPI transfer" bitfld.long 0x00 23. "SBE,Start bit enable for SPI transfer" "Default SPI transfe,D/CX" newline bitfld.long 0x00 19. "TURBO,Turbo mode" "Deactivated,Activated" bitfld.long 0x00 18. "IS,Input select" "Data line 0,Data line 1" bitfld.long 0x00 17. "DPE1,Transmission enable for data line 1" "Line 1,No transmission" newline bitfld.long 0x00 16. "DPE0,Transmission enable for data line 0" "Line 0,No transmission" bitfld.long 0x00 15. "DMAR,DMA read request" "Disabled,Enabled" bitfld.long 0x00 14. "DMAW,DMA write request" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. "TRM,Transmit/receive modes" "Transmit and receive,Receive,Transmit,?..." bitfld.long 0x00 7.--11. "WL,SPI word length" ",,,4-bits long,5-bits long,6-bits long,7-bits long,8-bits long,9-bits long,10-bits long,11-bits long,12-bits long,13-bits long,14-bits long,15-bits long,16-bits long,17-bits long,18-bits long,19-bits long,20-bits long,21-bits long,22-bits long,23-bits long,24-bits long,25-bits long,26-bits long,27-bits long,28-bits long,29-bits long,30-bits long,31-bits long,32-bits long" bitfld.long 0x00 6. "EPOL,SPIEN polarity(Active)" "High,Low" newline bitfld.long 0x00 2.--5. "CLKD,Frequency divider for SPICLK" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.long 0x00 1. "POL,SPICLK polarity during active state" "High,Low" bitfld.long 0x00 0. "PHA,SPICLK phase" "Odd,Even" endif rgroup.long (0x168+0x04)++0x03 line.long 0x00 "MCSPI_CH3STAT,McSPI channel 3 status register register" bitfld.long 0x00 6. "RXFFF,Channel 3 FIFO receive buffer full status" "No Full,Full" bitfld.long 0x00 5. "RXFFE,Channel 3 FIFO receive buffer empty status" "No empty,Empty" bitfld.long 0x00 4. "TXFFF,Channel 3 FIFO transmit buffer full status" "No Full,Full" newline bitfld.long 0x00 3. "TXFFE,Channel 3 FIFO transmit buffer empty status" "No empty,Empty" bitfld.long 0x00 2. "EOT,Channel 3 end-of-transfer status" "Not ended,Ended" bitfld.long 0x00 1. "TXS,Channel 3 transmitter register status" "Full,Empty" newline bitfld.long 0x00 0. "RXS,Channel 3 receiver register status" "Empty,Full" group.long (0x168+0x08)++0x07 line.long 0x00 "MCSPI_CH3CTRL,Channel 3 Control Registert" hexmask.long.byte 0x00 8.--15. 1. "EXTCLK,Clock ratio extension" bitfld.long 0x00 0. "EN,Channel 3 enable" "Disabled,Enabled" line.long 0x04 "MCSPI_TX3,McSPI channel 3 FIFO transmit buffer register" hgroup.long (0x168+0x10)++0x03 hide.long 0x00 "MCSPI_RX3,McSPI channel 3 FIFO receive buffer register" in tree.end group.long 0x17C++0x07 line.long 0x00 "MCSPI_XFERLEVEL,McSPI Transfer Levels Register" hexmask.long.word 0x00 16.--31. 1. "WCNT,SPI word counter" hexmask.long.byte 0x00 8.--15. 1. "AFL,Buffer almost full" hexmask.long.byte 0x00 0.--7. 1. "AEL,Buffer almost empty" line.long 0x04 "MCSPI_DAFTX,Address Aligned FIFO Transmitter Register" hgroup.long 0x1A0++0x03 hide.long 0x00 "MCSPI_DAFRX,McSPI DMA address aligned FIFO receiver register" in tree.end tree "McSPI1" base ad:0x481A0000 rgroup.long 0x00++0x03 line.long 0x00 "MCSPI_REVISION,McSPI Revision Register" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between old Scheme and current" "Legacy scheme,Revision 0.8,?..." hexmask.long.word 0x00 16.--27. 1. "FUNC,Function indicates a software compatible module family" bitfld.long 0x00 11.--15. "R_RTL,RTL revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "X_MAJOR,Major revision" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "CUSTOM,Custom revision" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "Y_MINOR,Minor revision" group.long 0x110++0x07 line.long 0x00 "MCSPI_SYSCONFIG,McSPI System Configuration Register" bitfld.long 0x00 8.--9. "CLOCKACTIVITY,Clocks activity during wake-up mode period (OCP/Functional clock)" "Off/Off,On/Off,Off/On,On/On" bitfld.long 0x00 3.--4. "SIDLEMODE,Power management" "Inactive,Normal,Smart-idle,?..." bitfld.long 0x00 1. "SOFTRESET,Software reset" "Normal mode,Reset" newline bitfld.long 0x00 0. "AUTOIDLE,Internal OCP Clock gating strategy" "Free-running,Automatic OCP" line.long 0x04 "MCSPI_SYSSTATUS,McSPI System Status Register" bitfld.long 0x04 0. "RESETDONE,Internal Reset Monitoring" "On-going,Completed" if (((d.l(ad:0x481A0000+0x134))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x128))&0x04)==0x04) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 3. "RX0_OVERFLOW,Receiver register overflow (slave mode only)" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" newline bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x128))&0x04)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x128))&0x04)==0x04) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 3. "RX0_OVERFLOW,Receiver register overflow (slave mode only)" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" newline bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x128))&0x04)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x128))&0x04)==0x04) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 3. "RX0_OVERFLOW,Receiver register overflow (slave mode only)" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" newline bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x128))&0x04)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x128))&0x04)==0x04) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 3. "RX0_OVERFLOW,Receiver register overflow (slave mode only)" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" newline bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x128))&0x04)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x128))&0x04)==0x04) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 3. "RX0_OVERFLOW,Receiver register overflow (slave mode only)" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" newline bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x128))&0x04)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x128))&0x04)==0x04) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 3. "RX0_OVERFLOW,Receiver register overflow (slave mode only)" "False,Pending" newline bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x128))&0x04)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x128))&0x04)==0x04) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 3. "RX0_OVERFLOW,Receiver register overflow (slave mode only)" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" newline bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x128))&0x04)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x128))&0x04)==0x04) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 3. "RX0_OVERFLOW,Receiver register overflow (slave mode only)" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" newline bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x128))&0x04)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 2. "RX0_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 1. "TX0_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 0. "TX0_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 6. "RX1_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 5. "TX1_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 4. "TX1_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x01)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x00) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 10. "RX2_FULL,Receiver register full or almost full" "False,Pending" bitfld.long 0x00 9. "TX2_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 8. "TX2_EMPTY,Transmitter register empty or almost empty" "False,Pending" elif (((d.l(ad:0x481A0000+0x134))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x148))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x15C))&0x01)==0x00)&&(((d.l(ad:0x481A0000+0x170))&0x01)==0x01) group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" bitfld.long 0x00 14. "RX3_FULL,Receiver register is full or almost full" "False,Pending" bitfld.long 0x00 13. "TX3_UNDERFLOW,Transmitter register underflow" "False,Pending" newline bitfld.long 0x00 12. "TX3_EMPTY,Transmitter register is empty or almost empty" "False,Pending" else group.long 0x118++0x03 line.long 0x00 "MCSPI_IRQSTATUS,McSPI Interrupt Status Registerster" bitfld.long 0x00 17. "EOW,End of word count event" "False,Pending" endif group.long 0x11C++0x03 line.long 0x00 "MCSPI_IRQENABLE,McSPI Interrupt Enable Register" bitfld.long 0x00 17. "EOWKE,End of word count interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. "RX3_FULL__ENABLE,MCSPI_RX3 receiver register full or almost full interrupt enable" "Disabled,Enabled" bitfld.long 0x00 13. "TX3_UNDERFLOW__ENABLE,MCSPI_TX3 transmitter register underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 12. "TX3_EMPTY__ENABLE,MCSPI_TX3 transmitter register empty or almost empty interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. "RX2_FULL__ENABLE,MCSPI_RX2 receiver register full or almost full interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. "TX2_UNDERFLOW__ENABLE,MCSPI_TX2 transmitter register underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 8. "TX2_EMPTY__ENABLE,MCSPI_TX2 transmitter register empty or almost empty interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. "RX1_FULL__ENABLE,MCSPI_RX1 receiver register full or almost full interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. "TX1_UNDERFLOW__ENABLE,MCSPI_TX1 transmitter register underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "TX1_EMPTY__ENABLE,MCSPI_TX1 transmitter register empty or almost empty interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. "RX0_OVERFLOW__ENABLE,MCSPI_RX0 receivier register overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. "RX0_FULL__ENABLE,MCSPI_RX0 receiver register full or almost full interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "TX0_UNDERFLOW__ENABLE,MCSPI_TX0 transmitter register underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. "TX0_EMPTY__ENABLE,MCSPI_TX0 transmitter register empty or almost empty interrupt enable" "Disabled,Enabled" group.long 0x124++0x03 line.long 0x00 "MCSPI_SYST,McSPI System Register" bitfld.long 0x00 11. "SSB,Set status bit" "No effect,Sets all status bits" bitfld.long 0x00 10. "SPIENDIR,Sets the direction of the SPIEN[3:0] lines and SPICLK line" "Output,Input" bitfld.long 0x00 9. "SPIDATDIR1,Sets the direction of the SPIDAT[1]" "Output,Input" newline bitfld.long 0x00 8. "SPIDATDIR0,Sets the direction of the SPIDAT[0]" "Output,Input" bitfld.long 0x00 6. "SPICLK,SPICLK line" "Output,Input" bitfld.long 0x00 5. "SPIDAT_1,SPIDAT 1 line" "Low,High" newline bitfld.long 0x00 4. "SPIDAT_0,SPIDAT 0 line" "Low,High" bitfld.long 0x00 3. "SPIEN_3,SPIEN 3 line" "Low,High" bitfld.long 0x00 2. "SPIEN_2,SPIEN 2 line" "Low,High" newline bitfld.long 0x00 1. "SPIEN_1,SPIEN 1 line" "Low,High" bitfld.long 0x00 0. "SPIEN_0,SPIEN 0 line" "Low,High" if (((d.l(ad:0x481A0000+0x128))&0x04)==0x04) group.long 0x128++0x03 line.long 0x00 "MCSPI_MODULCTRL,McSPI Module Control Register" bitfld.long 0x00 8. "FDAA,FIFO DMA Address 256-bit aligned" "MCSPI TX/RX,MCSPI_DAF TX/RX" bitfld.long 0x00 7. "MOA,Multiple word ocp access" "Disabled,Enabled with FIFO" bitfld.long 0x00 4.--6. "INITDLY,Initial SPI delay for first transfer (SPI bus clock) " "No delay,4,8,16,32,?..." newline bitfld.long 0x00 3. "SYSTEM_TEST,Enables the system test mode" "Functional,System test" bitfld.long 0x00 2. "MS,Master/Slave" "Master,Slave" bitfld.long 0x00 1. "PIN34,SPIEN Pin mode selection " "Used,Not used" else group.long 0x128++0x03 line.long 0x00 "MCSPI_MODULCTRL,McSPI Module Control Register" bitfld.long 0x00 8. "FDAA,FIFO DMA Address 256-bit aligned" "MCSPI TX/RX,MCSPI_DAF TX/RX" bitfld.long 0x00 7. "MOA,Multiple word ocp access" "Disabled,Enabled" bitfld.long 0x00 4.--6. "INITDLY,Initial SPI delay for first transfer (SPI bus clock)" "No delay,4,8,16,32,?..." newline bitfld.long 0x00 3. "SYSTEM_TEST,Enables the system test mode" "Functional,System test" bitfld.long 0x00 2. "MS,Master/Slave" "Master,Slave" bitfld.long 0x00 1. "PIN34,SPIEN Pin mode selection " "Used,Not used" newline bitfld.long 0x00 0. "SINGLE,Single/Multi Channel" "Multi,Single" endif tree "Channel 0" if (((d.l(ad:0x481A0000+0x128))&0x04)==0x04) group.long 0x12C++0x03 line.long 0x00 "MCSPI_CH0CONF,McSPI Channel 0 Configuration Register" bitfld.long 0x00 29. "CLKG,Clock divider granularity" "power of 2,1 clock cycle" bitfld.long 0x00 28. "FFER,FIFO enabled for receive" "Disabled,Enabled" bitfld.long 0x00 27. "FFEW,FIFO enabled for transmit" "Disabled,Enabled" newline bitfld.long 0x00 25.--26. "TCS,Chip select time control (clock cycles)" "0.5,1.5,2.5,3.5" bitfld.long 0x00 24. "SBPOL,Start bit polarity" "0 during SPI transfer,1 during SPI transfer" bitfld.long 0x00 23. "SBE,Start bit enable for SPI transfer" "Default SPI transfe,D/CX" newline bitfld.long 0x00 21.--22. "SPIENSLV,SPI slave select signal detection" "SPIEN[0],SPIEN[1],SPIEN[2],SPIEN[3]" bitfld.long 0x00 19. "TURBO,Turbo mode" "Deactivated,Activated" bitfld.long 0x00 18. "IS,Input select" "Data line 0,Data line 1" newline bitfld.long 0x00 17. "DPE1,Transmission enable for data line 1" "Line 1,No transmission" bitfld.long 0x00 16. "DPE0,Transmission enable for data line 0" "Line 0,No transmission" bitfld.long 0x00 15. "DMAR,DMA read request" "Disabled,Enabled" newline bitfld.long 0x00 14. "DMAW,DMA write request" "Disabled,Enabled" bitfld.long 0x00 12.--13. "TRM,Transmit/receive modes" "Transmit and receive,Receive,Transmit,?..." bitfld.long 0x00 7.--11. "WL,SPI word length" ",,,4-bits long,5-bits long,6-bits long,7-bits long,8-bits long,9-bits long,10-bits long,11-bits long,12-bits long,13-bits long,14-bits long,15-bits long,16-bits long,17-bits long,18-bits long,19-bits long,20-bits long,21-bits long,22-bits long,23-bits long,24-bits long,25-bits long,26-bits long,27-bits long,28-bits long,29-bits long,30-bits long,31-bits long,32-bits long" newline bitfld.long 0x00 6. "EPOL,SPIEN polarity(Active)" "High,Low" bitfld.long 0x00 2.--5. "CLKD,Frequency divider for SPICLK" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.long 0x00 1. "POL,SPICLK polarity during active state" "High,Low" newline bitfld.long 0x00 0. "PHA,SPICLK phase" "Odd,Even" else group.long 0x12C++0x03 line.long 0x00 "MCSPI_CH0CONF,McSPI Channel 0 Configuration Register" bitfld.long 0x00 29. "CLKG,Clock divider granularity" "Power of 2,1 clock cycle" bitfld.long 0x00 28. "FFER,FIFO enabled for receive" "Disabled,Enabled" bitfld.long 0x00 27. "FFEW,FIFO enabled for transmit" "Disabled,Enabled" newline bitfld.long 0x00 25.--26. "TCS,Chip select time control (clock cycles)" "0.5,1.5,2.5,3.5" bitfld.long 0x00 24. "SBPOL,Start bit polarity" "0 during SPI transfer,1 during SPI transfer" bitfld.long 0x00 23. "SBE,Start bit enable for SPI transfer" "Default SPI transfe,D/CX" newline bitfld.long 0x00 19. "TURBO,Turbo mode" "Deactivated,Activated" bitfld.long 0x00 18. "IS,Input select" "Data line 0,Data line 1" bitfld.long 0x00 17. "DPE1,Transmission enable for data line 1" "Line 1,No transmission" newline bitfld.long 0x00 16. "DPE0,Transmission enable for data line 0" "Line 0,No transmission" bitfld.long 0x00 15. "DMAR,DMA read request" "Disabled,Enabled" bitfld.long 0x00 14. "DMAW,DMA write request" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. "TRM,Transmit/receive modes" "Transmit and receive,Receive,Transmit,?..." bitfld.long 0x00 7.--11. "WL,SPI word length" ",,,4-bits long,5-bits long,6-bits long,7-bits long,8-bits long,9-bits long,10-bits long,11-bits long,12-bits long,13-bits long,14-bits long,15-bits long,16-bits long,17-bits long,18-bits long,19-bits long,20-bits long,21-bits long,22-bits long,23-bits long,24-bits long,25-bits long,26-bits long,27-bits long,28-bits long,29-bits long,30-bits long,31-bits long,32-bits long" bitfld.long 0x00 6. "EPOL,SPIEN polarity(Active)" "High,Low" newline bitfld.long 0x00 2.--5. "CLKD,Frequency divider for SPICLK" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.long 0x00 1. "POL,SPICLK polarity during active state" "High,Low" bitfld.long 0x00 0. "PHA,SPICLK phase" "Odd,Even" endif rgroup.long (0x12C+0x04)++0x03 line.long 0x00 "MCSPI_CH0STAT,McSPI channel 0 status register register" bitfld.long 0x00 6. "RXFFF,Channel 0 FIFO receive buffer full status" "No Full,Full" bitfld.long 0x00 5. "RXFFE,Channel 0 FIFO receive buffer empty status" "No empty,Empty" bitfld.long 0x00 4. "TXFFF,Channel 0 FIFO transmit buffer full status" "No Full,Full" newline bitfld.long 0x00 3. "TXFFE,Channel 0 FIFO transmit buffer empty status" "No empty,Empty" bitfld.long 0x00 2. "EOT,Channel 0 end-of-transfer status" "Not ended,Ended" bitfld.long 0x00 1. "TXS,Channel 0 transmitter register status" "Full,Empty" newline bitfld.long 0x00 0. "RXS,Channel 0 receiver register status" "Empty,Full" group.long (0x12C+0x08)++0x07 line.long 0x00 "MCSPI_CH0CTRL,Channel 0 Control Registert" hexmask.long.byte 0x00 8.--15. 1. "EXTCLK,Clock ratio extension" bitfld.long 0x00 0. "EN,Channel 0 enable" "Disabled,Enabled" line.long 0x04 "MCSPI_TX0,McSPI channel 0 FIFO transmit buffer register" hgroup.long (0x12C+0x10)++0x03 hide.long 0x00 "MCSPI_RX0,McSPI channel 0 FIFO receive buffer register" in tree.end tree "Channel 1" if (((d.l(ad:0x481A0000+0x128))&0x05)==0x01) group.long 0x140++0x03 line.long 0x00 "MCSPI_CH1CONF,McSPI Channel 1 Configuration Register" bitfld.long 0x00 29. "CLKG,Clock divider granularity" "power of 2,1 clock cycle" bitfld.long 0x00 28. "FFER,FIFO enabled for receive" "Disabled,Enabled" bitfld.long 0x00 27. "FFEW,FIFO enabled for transmit" "Disabled,Enabled" newline bitfld.long 0x00 25.--26. "TCS,Chip select time control (clock cycles)" "0.5,1.5,2.5,3.5" bitfld.long 0x00 24. "SBPOL,Start bit polarity" "0 during SPI transfer,1 during SPI transfer" bitfld.long 0x00 23. "SBE,Start bit enable for SPI transfer" "Default SPI transfe,D/CX" newline bitfld.long 0x00 20. "FORCE,Manual SPIEN assertion to keep SPIEN active between SPI words" "Not asserted,Asserted" bitfld.long 0x00 19. "TURBO,Turbo mode" "Deactivated,Activated" bitfld.long 0x00 18. "IS,Input select" "Data line 0,Data line 1" newline bitfld.long 0x00 17. "DPE1,Transmission enable for data line 1" "Line 1,No transmission" bitfld.long 0x00 16. "DPE0,Transmission enable for data line 0" "Line 0,No transmission" bitfld.long 0x00 15. "DMAR,DMA read request" "Disabled,Enabled" newline bitfld.long 0x00 14. "DMAW,DMA write request" "Disabled,Enabled" bitfld.long 0x00 12.--13. "TRM,Transmit/receive modes" "Transmit and receive,Receive,Transmit,?..." bitfld.long 0x00 7.--11. "WL,SPI word length" ",,,4-bits long,5-bits long,6-bits long,7-bits long,8-bits long,9-bits long,10-bits long,11-bits long,12-bits long,13-bits long,14-bits long,15-bits long,16-bits long,17-bits long,18-bits long,19-bits long,20-bits long,21-bits long,22-bits long,23-bits long,24-bits long,25-bits long,26-bits long,27-bits long,28-bits long,29-bits long,30-bits long,31-bits long,32-bits long" newline bitfld.long 0x00 6. "EPOL,SPIEN polarity(Active)" "High,Low" bitfld.long 0x00 2.--5. "CLKD,Frequency divider for SPICLK" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.long 0x00 1. "POL,SPICLK polarity during active state" "High,Low" newline bitfld.long 0x00 0. "PHA,SPICLK phase" "Odd,Even" else group.long 0x140++0x03 line.long 0x00 "MCSPI_CH1CONF,McSPI Channel 1 Configuration Register" bitfld.long 0x00 29. "CLKG,Clock divider granularity" "Power of 2,1 clock cycle" bitfld.long 0x00 28. "FFER,FIFO enabled for receive" "Disabled,Enabled" bitfld.long 0x00 27. "FFEW,FIFO enabled for transmit" "Disabled,Enabled" newline bitfld.long 0x00 25.--26. "TCS,Chip select time control (clock cycles)" "0.5,1.5,2.5,3.5" bitfld.long 0x00 24. "SBPOL,Start bit polarity" "0 during SPI transfer,1 during SPI transfer" bitfld.long 0x00 23. "SBE,Start bit enable for SPI transfer" "Default SPI transfe,D/CX" newline bitfld.long 0x00 19. "TURBO,Turbo mode" "Deactivated,Activated" bitfld.long 0x00 18. "IS,Input select" "Data line 0,Data line 1" bitfld.long 0x00 17. "DPE1,Transmission enable for data line 1" "Line 1,No transmission" newline bitfld.long 0x00 16. "DPE0,Transmission enable for data line 0" "Line 0,No transmission" bitfld.long 0x00 15. "DMAR,DMA read request" "Disabled,Enabled" bitfld.long 0x00 14. "DMAW,DMA write request" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. "TRM,Transmit/receive modes" "Transmit and receive,Receive,Transmit,?..." bitfld.long 0x00 7.--11. "WL,SPI word length" ",,,4-bits long,5-bits long,6-bits long,7-bits long,8-bits long,9-bits long,10-bits long,11-bits long,12-bits long,13-bits long,14-bits long,15-bits long,16-bits long,17-bits long,18-bits long,19-bits long,20-bits long,21-bits long,22-bits long,23-bits long,24-bits long,25-bits long,26-bits long,27-bits long,28-bits long,29-bits long,30-bits long,31-bits long,32-bits long" bitfld.long 0x00 6. "EPOL,SPIEN polarity(Active)" "High,Low" newline bitfld.long 0x00 2.--5. "CLKD,Frequency divider for SPICLK" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.long 0x00 1. "POL,SPICLK polarity during active state" "High,Low" bitfld.long 0x00 0. "PHA,SPICLK phase" "Odd,Even" endif rgroup.long (0x140+0x04)++0x03 line.long 0x00 "MCSPI_CH1STAT,McSPI channel 1 status register register" bitfld.long 0x00 6. "RXFFF,Channel 1 FIFO receive buffer full status" "No Full,Full" bitfld.long 0x00 5. "RXFFE,Channel 1 FIFO receive buffer empty status" "No empty,Empty" bitfld.long 0x00 4. "TXFFF,Channel 1 FIFO transmit buffer full status" "No Full,Full" newline bitfld.long 0x00 3. "TXFFE,Channel 1 FIFO transmit buffer empty status" "No empty,Empty" bitfld.long 0x00 2. "EOT,Channel 1 end-of-transfer status" "Not ended,Ended" bitfld.long 0x00 1. "TXS,Channel 1 transmitter register status" "Full,Empty" newline bitfld.long 0x00 0. "RXS,Channel 1 receiver register status" "Empty,Full" group.long (0x140+0x08)++0x07 line.long 0x00 "MCSPI_CH1CTRL,Channel 1 Control Registert" hexmask.long.byte 0x00 8.--15. 1. "EXTCLK,Clock ratio extension" bitfld.long 0x00 0. "EN,Channel 1 enable" "Disabled,Enabled" line.long 0x04 "MCSPI_TX1,McSPI channel 1 FIFO transmit buffer register" hgroup.long (0x140+0x10)++0x03 hide.long 0x00 "MCSPI_RX1,McSPI channel 1 FIFO receive buffer register" in tree.end tree "Channel 2" if (((d.l(ad:0x481A0000+0x128))&0x05)==0x01) group.long 0x154++0x03 line.long 0x00 "MCSPI_CH2CONF,McSPI Channel 2 Configuration Register" bitfld.long 0x00 29. "CLKG,Clock divider granularity" "power of 2,1 clock cycle" bitfld.long 0x00 28. "FFER,FIFO enabled for receive" "Disabled,Enabled" bitfld.long 0x00 27. "FFEW,FIFO enabled for transmit" "Disabled,Enabled" newline bitfld.long 0x00 25.--26. "TCS,Chip select time control (clock cycles)" "0.5,1.5,2.5,3.5" bitfld.long 0x00 24. "SBPOL,Start bit polarity" "0 during SPI transfer,1 during SPI transfer" bitfld.long 0x00 23. "SBE,Start bit enable for SPI transfer" "Default SPI transfe,D/CX" newline bitfld.long 0x00 20. "FORCE,Manual SPIEN assertion to keep SPIEN active between SPI words" "Not asserted,Asserted" bitfld.long 0x00 19. "TURBO,Turbo mode" "Deactivated,Activated" bitfld.long 0x00 18. "IS,Input select" "Data line 0,Data line 1" newline bitfld.long 0x00 17. "DPE1,Transmission enable for data line 1" "Line 1,No transmission" bitfld.long 0x00 16. "DPE0,Transmission enable for data line 0" "Line 0,No transmission" bitfld.long 0x00 15. "DMAR,DMA read request" "Disabled,Enabled" newline bitfld.long 0x00 14. "DMAW,DMA write request" "Disabled,Enabled" bitfld.long 0x00 12.--13. "TRM,Transmit/receive modes" "Transmit and receive,Receive,Transmit,?..." bitfld.long 0x00 7.--11. "WL,SPI word length" ",,,4-bits long,5-bits long,6-bits long,7-bits long,8-bits long,9-bits long,10-bits long,11-bits long,12-bits long,13-bits long,14-bits long,15-bits long,16-bits long,17-bits long,18-bits long,19-bits long,20-bits long,21-bits long,22-bits long,23-bits long,24-bits long,25-bits long,26-bits long,27-bits long,28-bits long,29-bits long,30-bits long,31-bits long,32-bits long" newline bitfld.long 0x00 6. "EPOL,SPIEN polarity(Active)" "High,Low" bitfld.long 0x00 2.--5. "CLKD,Frequency divider for SPICLK" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.long 0x00 1. "POL,SPICLK polarity during active state" "High,Low" newline bitfld.long 0x00 0. "PHA,SPICLK phase" "Odd,Even" else group.long 0x154++0x03 line.long 0x00 "MCSPI_CH2CONF,McSPI Channel 2 Configuration Register" bitfld.long 0x00 29. "CLKG,Clock divider granularity" "Power of 2,1 clock cycle" bitfld.long 0x00 28. "FFER,FIFO enabled for receive" "Disabled,Enabled" bitfld.long 0x00 27. "FFEW,FIFO enabled for transmit" "Disabled,Enabled" newline bitfld.long 0x00 25.--26. "TCS,Chip select time control (clock cycles)" "0.5,1.5,2.5,3.5" bitfld.long 0x00 24. "SBPOL,Start bit polarity" "0 during SPI transfer,1 during SPI transfer" bitfld.long 0x00 23. "SBE,Start bit enable for SPI transfer" "Default SPI transfe,D/CX" newline bitfld.long 0x00 19. "TURBO,Turbo mode" "Deactivated,Activated" bitfld.long 0x00 18. "IS,Input select" "Data line 0,Data line 1" bitfld.long 0x00 17. "DPE1,Transmission enable for data line 1" "Line 1,No transmission" newline bitfld.long 0x00 16. "DPE0,Transmission enable for data line 0" "Line 0,No transmission" bitfld.long 0x00 15. "DMAR,DMA read request" "Disabled,Enabled" bitfld.long 0x00 14. "DMAW,DMA write request" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. "TRM,Transmit/receive modes" "Transmit and receive,Receive,Transmit,?..." bitfld.long 0x00 7.--11. "WL,SPI word length" ",,,4-bits long,5-bits long,6-bits long,7-bits long,8-bits long,9-bits long,10-bits long,11-bits long,12-bits long,13-bits long,14-bits long,15-bits long,16-bits long,17-bits long,18-bits long,19-bits long,20-bits long,21-bits long,22-bits long,23-bits long,24-bits long,25-bits long,26-bits long,27-bits long,28-bits long,29-bits long,30-bits long,31-bits long,32-bits long" bitfld.long 0x00 6. "EPOL,SPIEN polarity(Active)" "High,Low" newline bitfld.long 0x00 2.--5. "CLKD,Frequency divider for SPICLK" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.long 0x00 1. "POL,SPICLK polarity during active state" "High,Low" bitfld.long 0x00 0. "PHA,SPICLK phase" "Odd,Even" endif rgroup.long (0x154+0x04)++0x03 line.long 0x00 "MCSPI_CH2STAT,McSPI channel 2 status register register" bitfld.long 0x00 6. "RXFFF,Channel 2 FIFO receive buffer full status" "No Full,Full" bitfld.long 0x00 5. "RXFFE,Channel 2 FIFO receive buffer empty status" "No empty,Empty" bitfld.long 0x00 4. "TXFFF,Channel 2 FIFO transmit buffer full status" "No Full,Full" newline bitfld.long 0x00 3. "TXFFE,Channel 2 FIFO transmit buffer empty status" "No empty,Empty" bitfld.long 0x00 2. "EOT,Channel 2 end-of-transfer status" "Not ended,Ended" bitfld.long 0x00 1. "TXS,Channel 2 transmitter register status" "Full,Empty" newline bitfld.long 0x00 0. "RXS,Channel 2 receiver register status" "Empty,Full" group.long (0x154+0x08)++0x07 line.long 0x00 "MCSPI_CH2CTRL,Channel 2 Control Registert" hexmask.long.byte 0x00 8.--15. 1. "EXTCLK,Clock ratio extension" bitfld.long 0x00 0. "EN,Channel 2 enable" "Disabled,Enabled" line.long 0x04 "MCSPI_TX2,McSPI channel 2 FIFO transmit buffer register" hgroup.long (0x154+0x10)++0x03 hide.long 0x00 "MCSPI_RX2,McSPI channel 2 FIFO receive buffer register" in tree.end tree "Channel 3" if (((d.l(ad:0x481A0000+0x128))&0x05)==0x01) group.long 0x168++0x03 line.long 0x00 "MCSPI_CH3CONF,McSPI Channel 3 Configuration Register" bitfld.long 0x00 29. "CLKG,Clock divider granularity" "power of 2,1 clock cycle" bitfld.long 0x00 28. "FFER,FIFO enabled for receive" "Disabled,Enabled" bitfld.long 0x00 27. "FFEW,FIFO enabled for transmit" "Disabled,Enabled" newline bitfld.long 0x00 25.--26. "TCS,Chip select time control (clock cycles)" "0.5,1.5,2.5,3.5" bitfld.long 0x00 24. "SBPOL,Start bit polarity" "0 during SPI transfer,1 during SPI transfer" bitfld.long 0x00 23. "SBE,Start bit enable for SPI transfer" "Default SPI transfe,D/CX" newline bitfld.long 0x00 20. "FORCE,Manual SPIEN assertion to keep SPIEN active between SPI words" "Not asserted,Asserted" bitfld.long 0x00 19. "TURBO,Turbo mode" "Deactivated,Activated" bitfld.long 0x00 18. "IS,Input select" "Data line 0,Data line 1" newline bitfld.long 0x00 17. "DPE1,Transmission enable for data line 1" "Line 1,No transmission" bitfld.long 0x00 16. "DPE0,Transmission enable for data line 0" "Line 0,No transmission" bitfld.long 0x00 15. "DMAR,DMA read request" "Disabled,Enabled" newline bitfld.long 0x00 14. "DMAW,DMA write request" "Disabled,Enabled" bitfld.long 0x00 12.--13. "TRM,Transmit/receive modes" "Transmit and receive,Receive,Transmit,?..." bitfld.long 0x00 7.--11. "WL,SPI word length" ",,,4-bits long,5-bits long,6-bits long,7-bits long,8-bits long,9-bits long,10-bits long,11-bits long,12-bits long,13-bits long,14-bits long,15-bits long,16-bits long,17-bits long,18-bits long,19-bits long,20-bits long,21-bits long,22-bits long,23-bits long,24-bits long,25-bits long,26-bits long,27-bits long,28-bits long,29-bits long,30-bits long,31-bits long,32-bits long" newline bitfld.long 0x00 6. "EPOL,SPIEN polarity(Active)" "High,Low" bitfld.long 0x00 2.--5. "CLKD,Frequency divider for SPICLK" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.long 0x00 1. "POL,SPICLK polarity during active state" "High,Low" newline bitfld.long 0x00 0. "PHA,SPICLK phase" "Odd,Even" else group.long 0x168++0x03 line.long 0x00 "MCSPI_CH3CONF,McSPI Channel 3 Configuration Register" bitfld.long 0x00 29. "CLKG,Clock divider granularity" "Power of 2,1 clock cycle" bitfld.long 0x00 28. "FFER,FIFO enabled for receive" "Disabled,Enabled" bitfld.long 0x00 27. "FFEW,FIFO enabled for transmit" "Disabled,Enabled" newline bitfld.long 0x00 25.--26. "TCS,Chip select time control (clock cycles)" "0.5,1.5,2.5,3.5" bitfld.long 0x00 24. "SBPOL,Start bit polarity" "0 during SPI transfer,1 during SPI transfer" bitfld.long 0x00 23. "SBE,Start bit enable for SPI transfer" "Default SPI transfe,D/CX" newline bitfld.long 0x00 19. "TURBO,Turbo mode" "Deactivated,Activated" bitfld.long 0x00 18. "IS,Input select" "Data line 0,Data line 1" bitfld.long 0x00 17. "DPE1,Transmission enable for data line 1" "Line 1,No transmission" newline bitfld.long 0x00 16. "DPE0,Transmission enable for data line 0" "Line 0,No transmission" bitfld.long 0x00 15. "DMAR,DMA read request" "Disabled,Enabled" bitfld.long 0x00 14. "DMAW,DMA write request" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. "TRM,Transmit/receive modes" "Transmit and receive,Receive,Transmit,?..." bitfld.long 0x00 7.--11. "WL,SPI word length" ",,,4-bits long,5-bits long,6-bits long,7-bits long,8-bits long,9-bits long,10-bits long,11-bits long,12-bits long,13-bits long,14-bits long,15-bits long,16-bits long,17-bits long,18-bits long,19-bits long,20-bits long,21-bits long,22-bits long,23-bits long,24-bits long,25-bits long,26-bits long,27-bits long,28-bits long,29-bits long,30-bits long,31-bits long,32-bits long" bitfld.long 0x00 6. "EPOL,SPIEN polarity(Active)" "High,Low" newline bitfld.long 0x00 2.--5. "CLKD,Frequency divider for SPICLK" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.long 0x00 1. "POL,SPICLK polarity during active state" "High,Low" bitfld.long 0x00 0. "PHA,SPICLK phase" "Odd,Even" endif rgroup.long (0x168+0x04)++0x03 line.long 0x00 "MCSPI_CH3STAT,McSPI channel 3 status register register" bitfld.long 0x00 6. "RXFFF,Channel 3 FIFO receive buffer full status" "No Full,Full" bitfld.long 0x00 5. "RXFFE,Channel 3 FIFO receive buffer empty status" "No empty,Empty" bitfld.long 0x00 4. "TXFFF,Channel 3 FIFO transmit buffer full status" "No Full,Full" newline bitfld.long 0x00 3. "TXFFE,Channel 3 FIFO transmit buffer empty status" "No empty,Empty" bitfld.long 0x00 2. "EOT,Channel 3 end-of-transfer status" "Not ended,Ended" bitfld.long 0x00 1. "TXS,Channel 3 transmitter register status" "Full,Empty" newline bitfld.long 0x00 0. "RXS,Channel 3 receiver register status" "Empty,Full" group.long (0x168+0x08)++0x07 line.long 0x00 "MCSPI_CH3CTRL,Channel 3 Control Registert" hexmask.long.byte 0x00 8.--15. 1. "EXTCLK,Clock ratio extension" bitfld.long 0x00 0. "EN,Channel 3 enable" "Disabled,Enabled" line.long 0x04 "MCSPI_TX3,McSPI channel 3 FIFO transmit buffer register" hgroup.long (0x168+0x10)++0x03 hide.long 0x00 "MCSPI_RX3,McSPI channel 3 FIFO receive buffer register" in tree.end group.long 0x17C++0x07 line.long 0x00 "MCSPI_XFERLEVEL,McSPI Transfer Levels Register" hexmask.long.word 0x00 16.--31. 1. "WCNT,SPI word counter" hexmask.long.byte 0x00 8.--15. 1. "AFL,Buffer almost full" hexmask.long.byte 0x00 0.--7. 1. "AEL,Buffer almost empty" line.long 0x04 "MCSPI_DAFTX,Address Aligned FIFO Transmitter Register" hgroup.long 0x1A0++0x03 hide.long 0x00 "MCSPI_DAFRX,McSPI DMA address aligned FIFO receiver register" in tree.end tree.end tree "GPIO (General-Purpose Input/Output)" tree "GPIO0" base ad:0x44E07000 rgroup.long 0x00++0x03 line.long 0x00 "GPIO_REVISION,GPIO Revision Register" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between old scheme and current" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "FUNC,Functional number" bitfld.long 0x00 11.--15. "RTL,RTL version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "MAJOR,Major revision" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "CUSTOM,Custom revision" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "MINOR,Minor revision" group.long 0x10++0x03 line.long 0x00 "GPIO_SYSCONFIG,GPIO Sysconfig Register" bitfld.long 0x00 3.--4. "IDLEMODE,Select IDLE mode" "Force-idle,No-idle,Smart-idle,Smart-Idle wakeup" bitfld.long 0x00 2. "ENAWAKEUP,Wakeup enable" "Disabled,Enabled" bitfld.long 0x00 1. "SOFTRESET,Software reset mode" "Normal,Reset" newline bitfld.long 0x00 0. "AUTOIDLE,Internal interface clock gating strategy" "Free-running,Gated" group.long 0x20++0x03 line.long 0x00 "GPIO_EOI,GPIO_EOI Register Provides Software End Of Interrupt" bitfld.long 0x00 0. "DMAEVENT_ACK,DMA event completion acknowledgement" "Acknowledged,Not acknowledged" group.long 0x24++0x03 line.long 0x00 "GPIO_IRQSTATUS_RAW_0,Status Raw Register For Interrupt 0" bitfld.long 0x00 31. "INTLINE[31],Interrupt 31 status" "No effect,Triggered" bitfld.long 0x00 30. "INTLINE[30],Interrupt 30 status" "No effect,Triggered" bitfld.long 0x00 29. "INTLINE[29],Interrupt 29 status" "No effect,Triggered" newline bitfld.long 0x00 28. "INTLINE[28],Interrupt 28 status" "No effect,Triggered" bitfld.long 0x00 27. "INTLINE[27],Interrupt 27 status" "No effect,Triggered" bitfld.long 0x00 26. "INTLINE[26],Interrupt 26 status" "No effect,Triggered" newline bitfld.long 0x00 25. "INTLINE[25],Interrupt 25 status" "No effect,Triggered" bitfld.long 0x00 24. "INTLINE[24],Interrupt 24 status" "No effect,Triggered" bitfld.long 0x00 23. "INTLINE[23],Interrupt 23 status" "No effect,Triggered" newline bitfld.long 0x00 22. "INTLINE[22],Interrupt 22 status" "No effect,Triggered" bitfld.long 0x00 21. "INTLINE[21],Interrupt 21 status" "No effect,Triggered" bitfld.long 0x00 20. "INTLINE[20],Interrupt 20 status" "No effect,Triggered" newline bitfld.long 0x00 19. "INTLINE[19],Interrupt 19 status" "No effect,Triggered" bitfld.long 0x00 18. "INTLINE[18],Interrupt 18 status" "No effect,Triggered" bitfld.long 0x00 17. "INTLINE[17],Interrupt 17 status" "No effect,Triggered" newline bitfld.long 0x00 16. "INTLINE[16],Interrupt 16 status" "No effect,Triggered" bitfld.long 0x00 15. "INTLINE[15],Interrupt 15 status" "No effect,Triggered" bitfld.long 0x00 14. "INTLINE[14],Interrupt 14 status" "No effect,Triggered" newline bitfld.long 0x00 13. "INTLINE[13],Interrupt 13 status" "No effect,Triggered" bitfld.long 0x00 12. "INTLINE[12],Interrupt 12 status" "No effect,Triggered" bitfld.long 0x00 11. "INTLINE[11],Interrupt 11 status" "No effect,Triggered" newline bitfld.long 0x00 10. "INTLINE[10],Interrupt 10 status" "No effect,Triggered" bitfld.long 0x00 9. "INTLINE[9],Interrupt 9 status" "No effect,Triggered" bitfld.long 0x00 8. "INTLINE[8],Interrupt 8 status" "No effect,Triggered" newline bitfld.long 0x00 7. "INTLINE[7],Interrupt 7 status" "No effect,Triggered" bitfld.long 0x00 6. "INTLINE[6],Interrupt 6 status" "No effect,Triggered" bitfld.long 0x00 5. "INTLINE[5],Interrupt 5 status" "No effect,Triggered" newline bitfld.long 0x00 4. "INTLINE[4],Interrupt 4 status" "No effect,Triggered" bitfld.long 0x00 3. "INTLINE[3],Interrupt 3 status" "No effect,Triggered" bitfld.long 0x00 2. "INTLINE[2],Interrupt 2 status" "No effect,Triggered" newline bitfld.long 0x00 1. "INTLINE[1],Interrupt 1 status" "No effect,Triggered" bitfld.long 0x00 0. "INTLINE[0],Interrupt 0 status" "No effect,Triggered" group.long (0x24+0x08)++0x03 line.long 0x00 "GPIO_IRQSTATUS_0_SET/CLR,GPIO_IRQSTATUS_0 Register Provides Core Status Information For The Interrupt Handling" setclrfld.long 0x00 31. 0x08 31. 0x10 31. "INTLINE[31],Interrupt 31 status" "No effect,Triggered" setclrfld.long 0x00 30. 0x08 30. 0x10 30. "INTLINE[30],Interrupt 30 status" "No effect,Triggered" setclrfld.long 0x00 29. 0x08 29. 0x10 29. "INTLINE[29],Interrupt 29 status" "No effect,Triggered" newline setclrfld.long 0x00 28. 0x08 28. 0x10 28. "INTLINE[28],Interrupt 28 status" "No effect,Triggered" setclrfld.long 0x00 27. 0x08 27. 0x10 27. "INTLINE[27],Interrupt 27 status" "No effect,Triggered" setclrfld.long 0x00 26. 0x08 26. 0x10 26. "INTLINE[26],Interrupt 26 status" "No effect,Triggered" newline setclrfld.long 0x00 25. 0x08 25. 0x10 25. "INTLINE[25],Interrupt 25 status" "No effect,Triggered" setclrfld.long 0x00 24. 0x08 24. 0x10 24. "INTLINE[24],Interrupt 24 status" "No effect,Triggered" setclrfld.long 0x00 23. 0x08 23. 0x10 23. "INTLINE[23],Interrupt 23 status" "No effect,Triggered" newline setclrfld.long 0x00 22. 0x08 22. 0x10 22. "INTLINE[22],Interrupt 22 status" "No effect,Triggered" setclrfld.long 0x00 21. 0x08 21. 0x10 21. "INTLINE[21],Interrupt 21 status" "No effect,Triggered" setclrfld.long 0x00 20. 0x08 20. 0x10 20. "INTLINE[20],Interrupt 20 status" "No effect,Triggered" newline setclrfld.long 0x00 19. 0x08 19. 0x10 19. "INTLINE[19],Interrupt 19 status" "No effect,Triggered" setclrfld.long 0x00 18. 0x08 18. 0x10 18. "INTLINE[18],Interrupt 18 status" "No effect,Triggered" setclrfld.long 0x00 17. 0x08 17. 0x10 17. "INTLINE[17],Interrupt 17 status" "No effect,Triggered" newline setclrfld.long 0x00 16. 0x08 16. 0x10 16. "INTLINE[16],Interrupt 16 status" "No effect,Triggered" setclrfld.long 0x00 15. 0x08 15. 0x10 15. "INTLINE[15],Interrupt 15 status" "No effect,Triggered" setclrfld.long 0x00 14. 0x08 14. 0x10 14. "INTLINE[14],Interrupt 14 status" "No effect,Triggered" newline setclrfld.long 0x00 13. 0x08 13. 0x10 13. "INTLINE[13],Interrupt 13 status" "No effect,Triggered" setclrfld.long 0x00 12. 0x08 12. 0x10 12. "INTLINE[12],Interrupt 12 status" "No effect,Triggered" setclrfld.long 0x00 11. 0x08 11. 0x10 11. "INTLINE[11],Interrupt 11 status" "No effect,Triggered" newline setclrfld.long 0x00 10. 0x08 10. 0x10 10. "INTLINE[10],Interrupt 10 status" "No effect,Triggered" setclrfld.long 0x00 9. 0x08 9. 0x10 9. "INTLINE[9],Interrupt 9 status" "No effect,Triggered" setclrfld.long 0x00 8. 0x08 8. 0x10 8. "INTLINE[8],Interrupt 8 status" "No effect,Triggered" newline setclrfld.long 0x00 7. 0x08 7. 0x10 7. "INTLINE[7],Interrupt 7 status" "No effect,Triggered" setclrfld.long 0x00 6. 0x08 6. 0x10 6. "INTLINE[6],Interrupt 6 status" "No effect,Triggered" setclrfld.long 0x00 5. 0x08 5. 0x10 5. "INTLINE[5],Interrupt 5 status" "No effect,Triggered" newline setclrfld.long 0x00 4. 0x08 4. 0x10 4. "INTLINE[4],Interrupt 4 status" "No effect,Triggered" setclrfld.long 0x00 3. 0x08 3. 0x10 3. "INTLINE[3],Interrupt 3 status" "No effect,Triggered" setclrfld.long 0x00 2. 0x08 2. 0x10 2. "INTLINE[2],Interrupt 2 status" "No effect,Triggered" newline setclrfld.long 0x00 1. 0x08 1. 0x10 1. "INTLINE[1],Interrupt 1 status" "No effect,Triggered" setclrfld.long 0x00 0. 0x08 0. 0x10 0. "INTLINE[0],Interrupt 0 status" "No effect,Triggered" group.long (0x24+0x20)++0x03 line.long 0x00 "GPIO_IRQWAKEN_0,GPIO_IRQWAKEN_0 Per-event Wakeup Enable Vector Register" bitfld.long 0x00 31. "INTLINE[31],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 30. "INTLINE[30],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 29. "INTLINE[29],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 28. "INTLINE[28],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 27. "INTLINE[27],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 26. "INTLINE[26],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 25. "INTLINE[25],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 24. "INTLINE[24],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 23. "INTLINE[23],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 22. "INTLINE[22],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 21. "INTLINE[21],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 20. "INTLINE[20],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 19. "INTLINE[19],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 18. "INTLINE[18],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 17. "INTLINE[17],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 16. "INTLINE[16],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 15. "INTLINE[15],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 14. "INTLINE[14],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 13. "INTLINE[13],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 12. "INTLINE[12],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 11. "INTLINE[11],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 10. "INTLINE[10],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 9. "INTLINE[9],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 8. "INTLINE[8],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 7. "INTLINE[7],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 6. "INTLINE[6],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 5. "INTLINE[5],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 4. "INTLINE[4],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 3. "INTLINE[3],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 2. "INTLINE[2],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 1. "INTLINE[1],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 0. "INTLINE[0],Wakeup enable for interrupt line" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "GPIO_IRQSTATUS_RAW_1,Status Raw Register For Interrupt 1" bitfld.long 0x00 31. "INTLINE[31],Interrupt 31 status" "No effect,Triggered" bitfld.long 0x00 30. "INTLINE[30],Interrupt 30 status" "No effect,Triggered" bitfld.long 0x00 29. "INTLINE[29],Interrupt 29 status" "No effect,Triggered" newline bitfld.long 0x00 28. "INTLINE[28],Interrupt 28 status" "No effect,Triggered" bitfld.long 0x00 27. "INTLINE[27],Interrupt 27 status" "No effect,Triggered" bitfld.long 0x00 26. "INTLINE[26],Interrupt 26 status" "No effect,Triggered" newline bitfld.long 0x00 25. "INTLINE[25],Interrupt 25 status" "No effect,Triggered" bitfld.long 0x00 24. "INTLINE[24],Interrupt 24 status" "No effect,Triggered" bitfld.long 0x00 23. "INTLINE[23],Interrupt 23 status" "No effect,Triggered" newline bitfld.long 0x00 22. "INTLINE[22],Interrupt 22 status" "No effect,Triggered" bitfld.long 0x00 21. "INTLINE[21],Interrupt 21 status" "No effect,Triggered" bitfld.long 0x00 20. "INTLINE[20],Interrupt 20 status" "No effect,Triggered" newline bitfld.long 0x00 19. "INTLINE[19],Interrupt 19 status" "No effect,Triggered" bitfld.long 0x00 18. "INTLINE[18],Interrupt 18 status" "No effect,Triggered" bitfld.long 0x00 17. "INTLINE[17],Interrupt 17 status" "No effect,Triggered" newline bitfld.long 0x00 16. "INTLINE[16],Interrupt 16 status" "No effect,Triggered" bitfld.long 0x00 15. "INTLINE[15],Interrupt 15 status" "No effect,Triggered" bitfld.long 0x00 14. "INTLINE[14],Interrupt 14 status" "No effect,Triggered" newline bitfld.long 0x00 13. "INTLINE[13],Interrupt 13 status" "No effect,Triggered" bitfld.long 0x00 12. "INTLINE[12],Interrupt 12 status" "No effect,Triggered" bitfld.long 0x00 11. "INTLINE[11],Interrupt 11 status" "No effect,Triggered" newline bitfld.long 0x00 10. "INTLINE[10],Interrupt 10 status" "No effect,Triggered" bitfld.long 0x00 9. "INTLINE[9],Interrupt 9 status" "No effect,Triggered" bitfld.long 0x00 8. "INTLINE[8],Interrupt 8 status" "No effect,Triggered" newline bitfld.long 0x00 7. "INTLINE[7],Interrupt 7 status" "No effect,Triggered" bitfld.long 0x00 6. "INTLINE[6],Interrupt 6 status" "No effect,Triggered" bitfld.long 0x00 5. "INTLINE[5],Interrupt 5 status" "No effect,Triggered" newline bitfld.long 0x00 4. "INTLINE[4],Interrupt 4 status" "No effect,Triggered" bitfld.long 0x00 3. "INTLINE[3],Interrupt 3 status" "No effect,Triggered" bitfld.long 0x00 2. "INTLINE[2],Interrupt 2 status" "No effect,Triggered" newline bitfld.long 0x00 1. "INTLINE[1],Interrupt 1 status" "No effect,Triggered" bitfld.long 0x00 0. "INTLINE[0],Interrupt 0 status" "No effect,Triggered" group.long (0x28+0x08)++0x03 line.long 0x00 "GPIO_IRQSTATUS_1_SET/CLR,GPIO_IRQSTATUS_1 Register Provides Core Status Information For The Interrupt Handling" setclrfld.long 0x00 31. 0x08 31. 0x10 31. "INTLINE[31],Interrupt 31 status" "No effect,Triggered" setclrfld.long 0x00 30. 0x08 30. 0x10 30. "INTLINE[30],Interrupt 30 status" "No effect,Triggered" setclrfld.long 0x00 29. 0x08 29. 0x10 29. "INTLINE[29],Interrupt 29 status" "No effect,Triggered" newline setclrfld.long 0x00 28. 0x08 28. 0x10 28. "INTLINE[28],Interrupt 28 status" "No effect,Triggered" setclrfld.long 0x00 27. 0x08 27. 0x10 27. "INTLINE[27],Interrupt 27 status" "No effect,Triggered" setclrfld.long 0x00 26. 0x08 26. 0x10 26. "INTLINE[26],Interrupt 26 status" "No effect,Triggered" newline setclrfld.long 0x00 25. 0x08 25. 0x10 25. "INTLINE[25],Interrupt 25 status" "No effect,Triggered" setclrfld.long 0x00 24. 0x08 24. 0x10 24. "INTLINE[24],Interrupt 24 status" "No effect,Triggered" setclrfld.long 0x00 23. 0x08 23. 0x10 23. "INTLINE[23],Interrupt 23 status" "No effect,Triggered" newline setclrfld.long 0x00 22. 0x08 22. 0x10 22. "INTLINE[22],Interrupt 22 status" "No effect,Triggered" setclrfld.long 0x00 21. 0x08 21. 0x10 21. "INTLINE[21],Interrupt 21 status" "No effect,Triggered" setclrfld.long 0x00 20. 0x08 20. 0x10 20. "INTLINE[20],Interrupt 20 status" "No effect,Triggered" newline setclrfld.long 0x00 19. 0x08 19. 0x10 19. "INTLINE[19],Interrupt 19 status" "No effect,Triggered" setclrfld.long 0x00 18. 0x08 18. 0x10 18. "INTLINE[18],Interrupt 18 status" "No effect,Triggered" setclrfld.long 0x00 17. 0x08 17. 0x10 17. "INTLINE[17],Interrupt 17 status" "No effect,Triggered" newline setclrfld.long 0x00 16. 0x08 16. 0x10 16. "INTLINE[16],Interrupt 16 status" "No effect,Triggered" setclrfld.long 0x00 15. 0x08 15. 0x10 15. "INTLINE[15],Interrupt 15 status" "No effect,Triggered" setclrfld.long 0x00 14. 0x08 14. 0x10 14. "INTLINE[14],Interrupt 14 status" "No effect,Triggered" newline setclrfld.long 0x00 13. 0x08 13. 0x10 13. "INTLINE[13],Interrupt 13 status" "No effect,Triggered" setclrfld.long 0x00 12. 0x08 12. 0x10 12. "INTLINE[12],Interrupt 12 status" "No effect,Triggered" setclrfld.long 0x00 11. 0x08 11. 0x10 11. "INTLINE[11],Interrupt 11 status" "No effect,Triggered" newline setclrfld.long 0x00 10. 0x08 10. 0x10 10. "INTLINE[10],Interrupt 10 status" "No effect,Triggered" setclrfld.long 0x00 9. 0x08 9. 0x10 9. "INTLINE[9],Interrupt 9 status" "No effect,Triggered" setclrfld.long 0x00 8. 0x08 8. 0x10 8. "INTLINE[8],Interrupt 8 status" "No effect,Triggered" newline setclrfld.long 0x00 7. 0x08 7. 0x10 7. "INTLINE[7],Interrupt 7 status" "No effect,Triggered" setclrfld.long 0x00 6. 0x08 6. 0x10 6. "INTLINE[6],Interrupt 6 status" "No effect,Triggered" setclrfld.long 0x00 5. 0x08 5. 0x10 5. "INTLINE[5],Interrupt 5 status" "No effect,Triggered" newline setclrfld.long 0x00 4. 0x08 4. 0x10 4. "INTLINE[4],Interrupt 4 status" "No effect,Triggered" setclrfld.long 0x00 3. 0x08 3. 0x10 3. "INTLINE[3],Interrupt 3 status" "No effect,Triggered" setclrfld.long 0x00 2. 0x08 2. 0x10 2. "INTLINE[2],Interrupt 2 status" "No effect,Triggered" newline setclrfld.long 0x00 1. 0x08 1. 0x10 1. "INTLINE[1],Interrupt 1 status" "No effect,Triggered" setclrfld.long 0x00 0. 0x08 0. 0x10 0. "INTLINE[0],Interrupt 0 status" "No effect,Triggered" group.long (0x28+0x20)++0x03 line.long 0x00 "GPIO_IRQWAKEN_1,GPIO_IRQWAKEN_1 Per-event Wakeup Enable Vector Register" bitfld.long 0x00 31. "INTLINE[31],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 30. "INTLINE[30],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 29. "INTLINE[29],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 28. "INTLINE[28],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 27. "INTLINE[27],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 26. "INTLINE[26],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 25. "INTLINE[25],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 24. "INTLINE[24],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 23. "INTLINE[23],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 22. "INTLINE[22],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 21. "INTLINE[21],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 20. "INTLINE[20],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 19. "INTLINE[19],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 18. "INTLINE[18],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 17. "INTLINE[17],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 16. "INTLINE[16],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 15. "INTLINE[15],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 14. "INTLINE[14],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 13. "INTLINE[13],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 12. "INTLINE[12],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 11. "INTLINE[11],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 10. "INTLINE[10],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 9. "INTLINE[9],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 8. "INTLINE[8],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 7. "INTLINE[7],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 6. "INTLINE[6],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 5. "INTLINE[5],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 4. "INTLINE[4],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 3. "INTLINE[3],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 2. "INTLINE[2],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 1. "INTLINE[1],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 0. "INTLINE[0],Wakeup enable for interrupt line" "Disabled,Enabled" group.long 0x114++0x03 line.long 0x00 "GPIO_SYSSTATUS,System Status Register" bitfld.long 0x00 0. "RESETDONE,Reset status information" "On-going,Completed" group.long 0x130++0x07 line.long 0x00 "GPIO_CTRL,Module Control Register" bitfld.long 0x00 1.--2. "GATINGRATIO,Controls the clock gating for the event detection logic (Divider)" "/1,/2,/4,/8" bitfld.long 0x00 0. "DISABLEMODULE,Module disable" "No,Yes" line.long 0x04 "GPIO_OE,GPIO Output Enable Register" bitfld.long 0x04 31. "OUTPUTEN[31],GPIO 31 output data enable" "Output,Input" bitfld.long 0x04 30. "OUTPUTEN[30],GPIO 30 output data enable" "Output,Input" bitfld.long 0x04 29. "OUTPUTEN[29],GPIO 29 output data enable" "Output,Input" newline bitfld.long 0x04 28. "OUTPUTEN[28],GPIO 28 output data enable" "Output,Input" bitfld.long 0x04 27. "OUTPUTEN[27],GPIO 27 output data enable" "Output,Input" bitfld.long 0x04 26. "OUTPUTEN[26],GPIO 26 output data enable" "Output,Input" newline bitfld.long 0x04 25. "OUTPUTEN[25],GPIO 25 output data enable" "Output,Input" bitfld.long 0x04 24. "OUTPUTEN[24],GPIO 24 output data enable" "Output,Input" bitfld.long 0x04 23. "OUTPUTEN[23],GPIO 23 output data enable" "Output,Input" newline bitfld.long 0x04 22. "OUTPUTEN[22],GPIO 22 output data enable" "Output,Input" bitfld.long 0x04 21. "OUTPUTEN[21],GPIO 21 output data enable" "Output,Input" bitfld.long 0x04 20. "OUTPUTEN[20],GPIO 20 output data enable" "Output,Input" newline bitfld.long 0x04 19. "OUTPUTEN[19],GPIO 19 output data enable" "Output,Input" bitfld.long 0x04 18. "OUTPUTEN[18],GPIO 18 output data enable" "Output,Input" bitfld.long 0x04 17. "OUTPUTEN[17],GPIO 17 output data enable" "Output,Input" newline bitfld.long 0x04 16. "OUTPUTEN[16],GPIO 16 output data enable" "Output,Input" bitfld.long 0x04 15. "OUTPUTEN[15],GPIO 15 output data enable" "Output,Input" bitfld.long 0x04 14. "OUTPUTEN[14],GPIO 14 output data enable" "Output,Input" newline bitfld.long 0x04 13. "OUTPUTEN[13],GPIO 13 output data enable" "Output,Input" bitfld.long 0x04 12. "OUTPUTEN[12],GPIO 12 output data enable" "Output,Input" bitfld.long 0x04 11. "OUTPUTEN[11],GPIO 11 output data enable" "Output,Input" newline bitfld.long 0x04 10. "OUTPUTEN[10],GPIO 10 output data enable" "Output,Input" bitfld.long 0x04 9. "OUTPUTEN[9],GPIO 9 output data enable" "Output,Input" bitfld.long 0x04 8. "OUTPUTEN[8],GPIO 8 output data enable" "Output,Input" newline bitfld.long 0x04 7. "OUTPUTEN[7],GPIO 7 output data enable" "Output,Input" bitfld.long 0x04 6. "OUTPUTEN[6],GPIO 6 output data enable" "Output,Input" bitfld.long 0x04 5. "OUTPUTEN[5],GPIO 5 output data enable" "Output,Input" newline bitfld.long 0x04 4. "OUTPUTEN[4],GPIO 4 output data enable" "Output,Input" bitfld.long 0x04 3. "OUTPUTEN[3],GPIO 3 output data enable" "Output,Input" bitfld.long 0x04 2. "OUTPUTEN[2],GPIO 2 output data enable" "Output,Input" newline bitfld.long 0x04 1. "OUTPUTEN[1],GPIO 1 output data enable" "Output,Input" bitfld.long 0x04 0. "OUTPUTEN[0],GPIO 0 output data enable" "Output,Input" rgroup.long 0x138++0x03 line.long 0x00 "GPIO_DATAIN,Sampled Input Data" group.long 0x13C++0x03 line.long 0x00 "GPIO_DATAOUT_SET/CLR,Data To Set On Output Pins" setclrfld.long 0x00 31. 0x58 31. 0x54 31. "DATAOUT[31],Set/clear data 31 output register" "Set,Clear" setclrfld.long 0x00 30. 0x58 30. 0x54 30. "DATAOUT[30],Set/clear data 30 output register" "Set,Clear" setclrfld.long 0x00 29. 0x58 29. 0x54 29. "DATAOUT[29],Set/clear data 29 output register" "Set,Clear" newline setclrfld.long 0x00 28. 0x58 28. 0x54 28. "DATAOUT[28],Set/clear data 28 output register" "Set,Clear" setclrfld.long 0x00 27. 0x58 27. 0x54 27. "DATAOUT[27],Set/clear data 27 output register" "Set,Clear" setclrfld.long 0x00 26. 0x58 26. 0x54 26. "DATAOUT[26],Set/clear data 26 output register" "Set,Clear" newline setclrfld.long 0x00 25. 0x58 25. 0x54 25. "DATAOUT[25],Set/clear data 25 output register" "Set,Clear" setclrfld.long 0x00 24. 0x58 24. 0x54 24. "DATAOUT[24],Set/clear data 24 output register" "Set,Clear" setclrfld.long 0x00 23. 0x58 23. 0x54 23. "DATAOUT[23],Set/clear data 23 output register" "Set,Clear" newline setclrfld.long 0x00 22. 0x58 22. 0x54 22. "DATAOUT[22],Set/clear data 22 output register" "Set,Clear" setclrfld.long 0x00 21. 0x58 21. 0x54 21. "DATAOUT[21],Set/clear data 21 output register" "Set,Clear" setclrfld.long 0x00 20. 0x58 20. 0x54 20. "DATAOUT[20],Set/clear data 20 output register" "Set,Clear" newline setclrfld.long 0x00 19. 0x58 19. 0x54 19. "DATAOUT[19],Set/clear data output 19 register" "Set,Clear" setclrfld.long 0x00 18. 0x58 18. 0x54 18. "DATAOUT[18],Set/clear data 18 output register" "Set,Clear" setclrfld.long 0x00 17. 0x58 17. 0x54 17. "DATAOUT[17],Set/clear data 17 output register" "Set,Clear" newline setclrfld.long 0x00 16. 0x58 16. 0x54 16. "DATAOUT[16],Set/clear data 16 output register" "Set,Clear" setclrfld.long 0x00 15. 0x58 15. 0x54 15. "DATAOUT[15],Set/clear data 15 output register" "Set,Clear" setclrfld.long 0x00 14. 0x58 14. 0x54 14. "DATAOUT[14],Set/clear data 14 output register" "Set,Clear" newline setclrfld.long 0x00 13. 0x58 13. 0x54 13. "DATAOUT[13],Set/clear data 13 output register" "Set,Clear" setclrfld.long 0x00 12. 0x58 12. 0x54 12. "DATAOUT[12],Set/clear data 12 output register" "Set,Clear" setclrfld.long 0x00 11. 0x58 11. 0x54 11. "DATAOUT[11],Set/clear data 11 output register" "Set,Clear" newline setclrfld.long 0x00 10. 0x58 10. 0x54 10. "DATAOUT[10],Set/clear data 10 output register" "Set,Clear" setclrfld.long 0x00 9. 0x58 9. 0x54 9. "DATAOUT[9],Set/clear data output 9 register" "Set,Clear" setclrfld.long 0x00 8. 0x58 8. 0x54 8. "DATAOUT[8],Set/clear data 8 output register" "Set,Clear" newline setclrfld.long 0x00 7. 0x58 7. 0x54 7. "DATAOUT[7],Set/clear data 7 output register" "Set,Clear" setclrfld.long 0x00 6. 0x58 6. 0x54 6. "DATAOUT[6],Set/clear data 6 output register" "Set,Clear" setclrfld.long 0x00 5. 0x58 5. 0x54 5. "DATAOUT[5],Set/clear data 5 output register" "Set,Clear" newline setclrfld.long 0x00 4. 0x58 4. 0x54 4. "DATAOUT[4],Set/clear data 4 output register" "Set,Clear" setclrfld.long 0x00 3. 0x58 3. 0x54 3. "DATAOUT[3],Set/clear data 3 output register" "Set,Clear" setclrfld.long 0x00 2. 0x58 2. 0x54 2. "DATAOUT[2],Set/clear data 2 output register" "Set,Clear" newline setclrfld.long 0x00 1. 0x58 1. 0x54 1. "DATAOUT[1],Set/clear data 1 output register" "Set,Clear" setclrfld.long 0x00 0. 0x58 0. 0x54 0. "DATAOUT[0],Set/clear data 0 output register" "Set,Clear" group.long 0x13C++0x03 line.long 0x00 "GPIO_LEVELDETECT0,Low-level Detection To Be Used For The Interrupt Request Generation" bitfld.long 0x00 31. "LEVELDETECT0[31],LEVELDETECT0[31] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. "LEVELDETECT0[30],LEVELDETECT0[30] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 29. "LEVELDETECT0[29],LEVELDETECT0[29] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 28. "LEVELDETECT0[28],LEVELDETECT0[28] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 27. "LEVELDETECT0[27],LEVELDETECT0[27] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 26. "LEVELDETECT0[26],LEVELDETECT0[26] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 25. "LEVELDETECT0[25],LEVELDETECT0[25] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 24. "LEVELDETECT0[24],LEVELDETECT0[24] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 23. "LEVELDETECT0[23],LEVELDETECT0[23] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 22. "LEVELDETECT0[22],LEVELDETECT0[22] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 21. "LEVELDETECT0[21],LEVELDETECT0[21] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 20. "LEVELDETECT0[20],LEVELDETECT0[20] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "LEVELDETECT0[19],LEVELDETECT0[19] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 18. "LEVELDETECT0[18],LEVELDETECT0[18] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 17. "LEVELDETECT0[17],LEVELDETECT0[17] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "LEVELDETECT0[16],LEVELDETECT0[16] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 15. "LEVELDETECT0[15],LEVELDETECT0[15] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 14. "LEVELDETECT0[14],LEVELDETECT0[14] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 13. "LEVELDETECT0[13],LEVELDETECT0[13] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 12. "LEVELDETECT0[12],LEVELDETECT0[12] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 11. "LEVELDETECT0[11],LEVELDETECT0[11] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 10. "LEVELDETECT0[10],LEVELDETECT0[10] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 9. "LEVELDETECT0[9],LEVELDETECT0[9] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 8. "LEVELDETECT0[8],LEVELDETECT0[8] Low low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "LEVELDETECT0[7],LEVELDETECT0[7] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 6. "LEVELDETECT0[6],LEVELDETECT0[6] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 5. "LEVELDETECT0[5],LEVELDETECT0[5] Low low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "LEVELDETECT0[4],LEVELDETECT0[4] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 3. "LEVELDETECT0[3],LEVELDETECT0[3] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 2. "LEVELDETECT0[2],LEVELDETECT0[2] Low low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "LEVELDETECT0[1],LEVELDETECT0[1] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 0. "LEVELDETECT0[0],LEVELDETECT0[0] Low low level interrupt 31 enable" "Disabled,Enabled" group.long 0x140++0x03 line.long 0x00 "GPIO_LEVELDETECT1,High-level Detection To Be Used For The Interrupt Request Generation" bitfld.long 0x00 31. "LEVELDETECT0[31],LEVELDETECT0[31] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. "LEVELDETECT0[30],LEVELDETECT0[30] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 29. "LEVELDETECT0[29],LEVELDETECT0[29] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 28. "LEVELDETECT0[28],LEVELDETECT0[28] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 27. "LEVELDETECT0[27],LEVELDETECT0[27] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 26. "LEVELDETECT0[26],LEVELDETECT0[26] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 25. "LEVELDETECT0[25],LEVELDETECT0[25] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 24. "LEVELDETECT0[24],LEVELDETECT0[24] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 23. "LEVELDETECT0[23],LEVELDETECT0[23] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 22. "LEVELDETECT0[22],LEVELDETECT0[22] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 21. "LEVELDETECT0[21],LEVELDETECT0[21] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 20. "LEVELDETECT0[20],LEVELDETECT0[20] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "LEVELDETECT0[19],LEVELDETECT0[19] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 18. "LEVELDETECT0[18],LEVELDETECT0[18] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 17. "LEVELDETECT0[17],LEVELDETECT0[17] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "LEVELDETECT0[16],LEVELDETECT0[16] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 15. "LEVELDETECT0[15],LEVELDETECT0[15] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 14. "LEVELDETECT0[14],LEVELDETECT0[14] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 13. "LEVELDETECT0[13],LEVELDETECT0[13] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 12. "LEVELDETECT0[12],LEVELDETECT0[12] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 11. "LEVELDETECT0[11],LEVELDETECT0[11] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 10. "LEVELDETECT0[10],LEVELDETECT0[10] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 9. "LEVELDETECT0[9],LEVELDETECT0[9] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 8. "LEVELDETECT0[8],LEVELDETECT0[8] High low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "LEVELDETECT0[7],LEVELDETECT0[7] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 6. "LEVELDETECT0[6],LEVELDETECT0[6] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 5. "LEVELDETECT0[5],LEVELDETECT0[5] High low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "LEVELDETECT0[4],LEVELDETECT0[4] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 3. "LEVELDETECT0[3],LEVELDETECT0[3] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 2. "LEVELDETECT0[2],LEVELDETECT0[2] High low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "LEVELDETECT0[1],LEVELDETECT0[1] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 0. "LEVELDETECT0[0],LEVELDETECT0[0] High low level interrupt 31 enable" "Disabled,Enabled" group.long 0x148++0x07 line.long 0x00 "GPIO_RISINGDETECT,rising-edge Detection To Be Used For The Interrupt Request Generation" bitfld.long 0x00 31. "RISINGDETECT31,Rising edge interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. "RISINGDETECT30,Rising edge interrupt 30 enable" "Disabled,Enabled" bitfld.long 0x00 29. "RISINGDETECT29,Rising edge interrupt 29 enable" "Disabled,Enabled" newline bitfld.long 0x00 28. "RISINGDETECT28,Rising edge interrupt 28 enable" "Disabled,Enabled" bitfld.long 0x00 27. "RISINGDETECT27,Rising edge interrupt 27 enable" "Disabled,Enabled" bitfld.long 0x00 26. "RISINGDETECT26,Rising edge interrupt 26 enable" "Disabled,Enabled" newline bitfld.long 0x00 25. "RISINGDETECT25,Rising edge interrupt 25 enable" "Disabled,Enabled" bitfld.long 0x00 24. "RISINGDETECT24,Rising edge interrupt 24 enable" "Disabled,Enabled" bitfld.long 0x00 23. "RISINGDETECT23,Rising edge interrupt 23 enable" "Disabled,Enabled" newline bitfld.long 0x00 22. "RISINGDETECT22,Rising edge interrupt 22 enable" "Disabled,Enabled" bitfld.long 0x00 21. "RISINGDETECT21,Rising edge interrupt 21 enable" "Disabled,Enabled" bitfld.long 0x00 20. "RISINGDETECT20,Rising edge interrupt 20 enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "RISINGDETECT19,Rising edge interrupt 19 enable" "Disabled,Enabled" bitfld.long 0x00 18. "RISINGDETECT18,Rising edge interrupt 18 enable" "Disabled,Enabled" bitfld.long 0x00 17. "RISINGDETECT17,Rising edge interrupt 17 enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "RISINGDETECT16,Rising edge interrupt 16 enable" "Disabled,Enabled" bitfld.long 0x00 15. "RISINGDETECT15,Rising edge interrupt 15 enable" "Disabled,Enabled" bitfld.long 0x00 14. "RISINGDETECT14,Rising edge interrupt 14 enable" "Disabled,Enabled" newline bitfld.long 0x00 13. "RISINGDETECT13,Rising edge interrupt 13 enable" "Disabled,Enabled" bitfld.long 0x00 12. "RISINGDETECT12,Rising edge interrupt 12 enable" "Disabled,Enabled" bitfld.long 0x00 11. "RISINGDETECT11,Rising edge interrupt 11 enable" "Disabled,Enabled" newline bitfld.long 0x00 10. "RISINGDETECT10,Rising edge interrupt 10 enable" "Disabled,Enabled" bitfld.long 0x00 9. "RISINGDETECT9,Rising edge interrupt 9 enable" "Disabled,Enabled" bitfld.long 0x00 8. "RISINGDETECT8,Rising edge interrupt 8 enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "RISINGDETECT7,Rising edge interrupt 7 enable" "Disabled,Enabled" bitfld.long 0x00 6. "RISINGDETECT6,Rising edge interrupt 6 enable" "Disabled,Enabled" bitfld.long 0x00 5. "RISINGDETECT5,Rising edge interrupt 5 enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "RISINGDETECT4,Rising edge interrupt 4 enable" "Disabled,Enabled" bitfld.long 0x00 3. "RISINGDETECT3,Rising edge interrupt 3 enable" "Disabled,Enabled" bitfld.long 0x00 2. "RISINGDETECT2,Rising edge interrupt 2 enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "RISINGDETECT1,Rising edge interrupt 1 enable" "Disabled,Enabled" bitfld.long 0x00 0. "RISINGDETECT0,Rising edge interrupt 0 enable" "Disabled,Enabled" line.long 0x04 "GPIO_FALLINGDETECT,Falling-edge Detection To Be Used For The Interrupt Request Generation" bitfld.long 0x04 31. "FALLINGDETECT31,Falling-edge detection 31" "Disabled,Enabled" bitfld.long 0x04 30. "FALLINGDETECT30,Falling-edge detection 30" "Disabled,Enabled" bitfld.long 0x04 29. "FALLINGDETECT29,Falling-edge detection 29" "Disabled,Enabled" newline bitfld.long 0x04 28. "FALLINGDETECT28,Falling-edge detection 28" "Disabled,Enabled" bitfld.long 0x04 27. "FALLINGDETECT27,Falling-edge detection 27" "Disabled,Enabled" bitfld.long 0x04 26. "FALLINGDETECT26,Falling-edge detection 26" "Disabled,Enabled" newline bitfld.long 0x04 25. "FALLINGDETECT25,Falling-edge detection 25" "Disabled,Enabled" bitfld.long 0x04 24. "FALLINGDETECT24,Falling-edge detection 24" "Disabled,Enabled" bitfld.long 0x04 23. "FALLINGDETECT23,Falling-edge detection 23" "Disabled,Enabled" newline bitfld.long 0x04 22. "FALLINGDETECT22,Falling-edge detection 22" "Disabled,Enabled" bitfld.long 0x04 21. "FALLINGDETECT21,Falling-edge detection 21" "Disabled,Enabled" bitfld.long 0x04 20. "FALLINGDETECT20,Falling-edge detection 20" "Disabled,Enabled" newline bitfld.long 0x04 19. "FALLINGDETECT19,Falling-edge detection 19" "Disabled,Enabled" bitfld.long 0x04 18. "FALLINGDETECT18,Falling-edge detection 18" "Disabled,Enabled" bitfld.long 0x04 17. "FALLINGDETECT17,Falling-edge detection 17" "Disabled,Enabled" newline bitfld.long 0x04 16. "FALLINGDETECT16,Falling-edge detection 16" "Disabled,Enabled" bitfld.long 0x04 15. "FALLINGDETECT15,Falling-edge detection 15" "Disabled,Enabled" bitfld.long 0x04 14. "FALLINGDETECT14,Falling-edge detection 14" "Disabled,Enabled" newline bitfld.long 0x04 13. "FALLINGDETECT13,Falling-edge detection 13" "Disabled,Enabled" bitfld.long 0x04 12. "FALLINGDETECT12,Falling-edge detection 12" "Disabled,Enabled" bitfld.long 0x04 11. "FALLINGDETECT11,Falling-edge detection 11" "Disabled,Enabled" newline bitfld.long 0x04 10. "FALLINGDETECT10,Falling-edge detection 10" "Disabled,Enabled" bitfld.long 0x04 9. "FALLINGDETECT9,Falling-edge detection 9" "Disabled,Enabled" bitfld.long 0x04 8. "FALLINGDETECT8,Falling-edge detection 8" "Disabled,Enabled" newline bitfld.long 0x04 7. "FALLINGDETECT7,Falling-edge detection 7" "Disabled,Enabled" bitfld.long 0x04 6. "FALLINGDETECT6,Falling-edge detection 6" "Disabled,Enabled" bitfld.long 0x04 5. "FALLINGDETECT5,Falling-edge detection 5" "Disabled,Enabled" newline bitfld.long 0x04 4. "FALLINGDETECT4,Falling-edge detection 4" "Disabled,Enabled" bitfld.long 0x04 3. "FALLINGDETECT3,Falling-edge detection 3" "Disabled,Enabled" bitfld.long 0x04 2. "FALLINGDETECT2,Falling-edge detection 2" "Disabled,Enabled" newline bitfld.long 0x04 1. "FALLINGDETECT1,Falling-edge detection 1" "Disabled,Enabled" bitfld.long 0x04 0. "FALLINGDETECT0,Falling-edge detection 0" "Disabled,Enabled" group.long 0x150++0x07 line.long 0x00 "GPIO_DEBOUNCENABLE,Input Debounce Enable Register" bitfld.long 0x00 31. "DEBOUNCEENABLE[31],Input 31 debounce enable" "Disabled,Enabled" bitfld.long 0x00 30. "DEBOUNCEENABLE[30],Input 30 debounce enable" "Disabled,Enabled" bitfld.long 0x00 29. "DEBOUNCEENABLE[29],Input 29 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 28. "DEBOUNCEENABLE[28],Input 28 debounce enable" "Disabled,Enabled" bitfld.long 0x00 27. "DEBOUNCEENABLE[27],Input 27 debounce enable" "Disabled,Enabled" bitfld.long 0x00 26. "DEBOUNCEENABLE[26],Input 26 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 25. "DEBOUNCEENABLE[25],Input 25 debounce enable" "Disabled,Enabled" bitfld.long 0x00 24. "DEBOUNCEENABLE[24],Input 24 debounce enable" "Disabled,Enabled" bitfld.long 0x00 23. "DEBOUNCEENABLE[23],Input 23 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 22. "DEBOUNCEENABLE[22],Input 22 debounce enable" "Disabled,Enabled" bitfld.long 0x00 21. "DEBOUNCEENABLE[21],Input 21 debounce enable" "Disabled,Enabled" bitfld.long 0x00 20. "DEBOUNCEENABLE[20],Input 20 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "DEBOUNCEENABLE[19],Input 19 debounce enable" "Disabled,Enabled" bitfld.long 0x00 18. "DEBOUNCEENABLE[18],Input 18 debounce enable" "Disabled,Enabled" bitfld.long 0x00 17. "DEBOUNCEENABLE[17],Input 17 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "DEBOUNCEENABLE[16],Input 16 debounce enable" "Disabled,Enabled" bitfld.long 0x00 15. "DEBOUNCEENABLE[15],Input 15 debounce enable" "Disabled,Enabled" bitfld.long 0x00 14. "DEBOUNCEENABLE[14],Input 14 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 13. "DEBOUNCEENABLE[13],Input 13 debounce enable" "Disabled,Enabled" bitfld.long 0x00 12. "DEBOUNCEENABLE[12],Input 12 debounce enable" "Disabled,Enabled" bitfld.long 0x00 11. "DEBOUNCEENABLE[11],Input 11 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 10. "DEBOUNCEENABLE[10],Input 10 debounce enable" "Disabled,Enabled" bitfld.long 0x00 9. "DEBOUNCEENABLE[9],Input 9 debounce enable" "Disabled,Enabled" bitfld.long 0x00 8. "DEBOUNCEENABLE[8],Input 8 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "DEBOUNCEENABLE[7],Input 7 debounce enable" "Disabled,Enabled" bitfld.long 0x00 6. "DEBOUNCEENABLE[6],Input 6 debounce enable" "Disabled,Enabled" bitfld.long 0x00 5. "DEBOUNCEENABLE[5],Input 5 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "DEBOUNCEENABLE[4],Input 4 debounce enable" "Disabled,Enabled" bitfld.long 0x00 3. "DEBOUNCEENABLE[3],Input 3 debounce enable" "Disabled,Enabled" bitfld.long 0x00 2. "DEBOUNCEENABLE[2],Input 2 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "DEBOUNCEENABLE[1],Input 1 debounce enable" "Disabled,Enabled" bitfld.long 0x00 0. "DEBOUNCEENABLE[0],Input 0 debounce enable" "Disabled,Enabled" line.long 0x04 "GPIO_DEBOUNCINGTIME,GPIO Debouncing Time Register" hexmask.long.byte 0x04 0.--7. 1. "DEBOUNCETIME,Input debouncing value in 31 microsecond steps" tree.end tree "GPIO1" base ad:0x4804C000 rgroup.long 0x00++0x03 line.long 0x00 "GPIO_REVISION,GPIO Revision Register" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between old scheme and current" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "FUNC,Functional number" bitfld.long 0x00 11.--15. "RTL,RTL version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "MAJOR,Major revision" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "CUSTOM,Custom revision" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "MINOR,Minor revision" group.long 0x10++0x03 line.long 0x00 "GPIO_SYSCONFIG,GPIO Sysconfig Register" bitfld.long 0x00 3.--4. "IDLEMODE,Select IDLE mode" "Force-idle,No-idle,Smart-idle,?..." bitfld.long 0x00 2. "ENAWAKEUP,Wakeup enable" "Disabled,Enabled" bitfld.long 0x00 1. "SOFTRESET,Software reset mode" "Normal,Reset" newline bitfld.long 0x00 0. "AUTOIDLE,Internal interface clock gating strategy" "Free-running,Gated" group.long 0x20++0x03 line.long 0x00 "GPIO_EOI,GPIO_EOI Register Provides Software End Of Interrupt" bitfld.long 0x00 0. "DMAEVENT_ACK,DMA event completion acknowledgement" "Acknowledged,Not acknowledged" group.long 0x24++0x03 line.long 0x00 "GPIO_IRQSTATUS_RAW_0,Status Raw Register For Interrupt 0" bitfld.long 0x00 31. "INTLINE[31],Interrupt 31 status" "No effect,Triggered" bitfld.long 0x00 30. "INTLINE[30],Interrupt 30 status" "No effect,Triggered" bitfld.long 0x00 29. "INTLINE[29],Interrupt 29 status" "No effect,Triggered" newline bitfld.long 0x00 28. "INTLINE[28],Interrupt 28 status" "No effect,Triggered" bitfld.long 0x00 27. "INTLINE[27],Interrupt 27 status" "No effect,Triggered" bitfld.long 0x00 26. "INTLINE[26],Interrupt 26 status" "No effect,Triggered" newline bitfld.long 0x00 25. "INTLINE[25],Interrupt 25 status" "No effect,Triggered" bitfld.long 0x00 24. "INTLINE[24],Interrupt 24 status" "No effect,Triggered" bitfld.long 0x00 23. "INTLINE[23],Interrupt 23 status" "No effect,Triggered" newline bitfld.long 0x00 22. "INTLINE[22],Interrupt 22 status" "No effect,Triggered" bitfld.long 0x00 21. "INTLINE[21],Interrupt 21 status" "No effect,Triggered" bitfld.long 0x00 20. "INTLINE[20],Interrupt 20 status" "No effect,Triggered" newline bitfld.long 0x00 19. "INTLINE[19],Interrupt 19 status" "No effect,Triggered" bitfld.long 0x00 18. "INTLINE[18],Interrupt 18 status" "No effect,Triggered" bitfld.long 0x00 17. "INTLINE[17],Interrupt 17 status" "No effect,Triggered" newline bitfld.long 0x00 16. "INTLINE[16],Interrupt 16 status" "No effect,Triggered" bitfld.long 0x00 15. "INTLINE[15],Interrupt 15 status" "No effect,Triggered" bitfld.long 0x00 14. "INTLINE[14],Interrupt 14 status" "No effect,Triggered" newline bitfld.long 0x00 13. "INTLINE[13],Interrupt 13 status" "No effect,Triggered" bitfld.long 0x00 12. "INTLINE[12],Interrupt 12 status" "No effect,Triggered" bitfld.long 0x00 11. "INTLINE[11],Interrupt 11 status" "No effect,Triggered" newline bitfld.long 0x00 10. "INTLINE[10],Interrupt 10 status" "No effect,Triggered" bitfld.long 0x00 9. "INTLINE[9],Interrupt 9 status" "No effect,Triggered" bitfld.long 0x00 8. "INTLINE[8],Interrupt 8 status" "No effect,Triggered" newline bitfld.long 0x00 7. "INTLINE[7],Interrupt 7 status" "No effect,Triggered" bitfld.long 0x00 6. "INTLINE[6],Interrupt 6 status" "No effect,Triggered" bitfld.long 0x00 5. "INTLINE[5],Interrupt 5 status" "No effect,Triggered" newline bitfld.long 0x00 4. "INTLINE[4],Interrupt 4 status" "No effect,Triggered" bitfld.long 0x00 3. "INTLINE[3],Interrupt 3 status" "No effect,Triggered" bitfld.long 0x00 2. "INTLINE[2],Interrupt 2 status" "No effect,Triggered" newline bitfld.long 0x00 1. "INTLINE[1],Interrupt 1 status" "No effect,Triggered" bitfld.long 0x00 0. "INTLINE[0],Interrupt 0 status" "No effect,Triggered" group.long (0x24+0x08)++0x03 line.long 0x00 "GPIO_IRQSTATUS_0_SET/CLR,GPIO_IRQSTATUS_0 Register Provides Core Status Information For The Interrupt Handling" setclrfld.long 0x00 31. 0x08 31. 0x10 31. "INTLINE[31],Interrupt 31 status" "No effect,Triggered" setclrfld.long 0x00 30. 0x08 30. 0x10 30. "INTLINE[30],Interrupt 30 status" "No effect,Triggered" setclrfld.long 0x00 29. 0x08 29. 0x10 29. "INTLINE[29],Interrupt 29 status" "No effect,Triggered" newline setclrfld.long 0x00 28. 0x08 28. 0x10 28. "INTLINE[28],Interrupt 28 status" "No effect,Triggered" setclrfld.long 0x00 27. 0x08 27. 0x10 27. "INTLINE[27],Interrupt 27 status" "No effect,Triggered" setclrfld.long 0x00 26. 0x08 26. 0x10 26. "INTLINE[26],Interrupt 26 status" "No effect,Triggered" newline setclrfld.long 0x00 25. 0x08 25. 0x10 25. "INTLINE[25],Interrupt 25 status" "No effect,Triggered" setclrfld.long 0x00 24. 0x08 24. 0x10 24. "INTLINE[24],Interrupt 24 status" "No effect,Triggered" setclrfld.long 0x00 23. 0x08 23. 0x10 23. "INTLINE[23],Interrupt 23 status" "No effect,Triggered" newline setclrfld.long 0x00 22. 0x08 22. 0x10 22. "INTLINE[22],Interrupt 22 status" "No effect,Triggered" setclrfld.long 0x00 21. 0x08 21. 0x10 21. "INTLINE[21],Interrupt 21 status" "No effect,Triggered" setclrfld.long 0x00 20. 0x08 20. 0x10 20. "INTLINE[20],Interrupt 20 status" "No effect,Triggered" newline setclrfld.long 0x00 19. 0x08 19. 0x10 19. "INTLINE[19],Interrupt 19 status" "No effect,Triggered" setclrfld.long 0x00 18. 0x08 18. 0x10 18. "INTLINE[18],Interrupt 18 status" "No effect,Triggered" setclrfld.long 0x00 17. 0x08 17. 0x10 17. "INTLINE[17],Interrupt 17 status" "No effect,Triggered" newline setclrfld.long 0x00 16. 0x08 16. 0x10 16. "INTLINE[16],Interrupt 16 status" "No effect,Triggered" setclrfld.long 0x00 15. 0x08 15. 0x10 15. "INTLINE[15],Interrupt 15 status" "No effect,Triggered" setclrfld.long 0x00 14. 0x08 14. 0x10 14. "INTLINE[14],Interrupt 14 status" "No effect,Triggered" newline setclrfld.long 0x00 13. 0x08 13. 0x10 13. "INTLINE[13],Interrupt 13 status" "No effect,Triggered" setclrfld.long 0x00 12. 0x08 12. 0x10 12. "INTLINE[12],Interrupt 12 status" "No effect,Triggered" setclrfld.long 0x00 11. 0x08 11. 0x10 11. "INTLINE[11],Interrupt 11 status" "No effect,Triggered" newline setclrfld.long 0x00 10. 0x08 10. 0x10 10. "INTLINE[10],Interrupt 10 status" "No effect,Triggered" setclrfld.long 0x00 9. 0x08 9. 0x10 9. "INTLINE[9],Interrupt 9 status" "No effect,Triggered" setclrfld.long 0x00 8. 0x08 8. 0x10 8. "INTLINE[8],Interrupt 8 status" "No effect,Triggered" newline setclrfld.long 0x00 7. 0x08 7. 0x10 7. "INTLINE[7],Interrupt 7 status" "No effect,Triggered" setclrfld.long 0x00 6. 0x08 6. 0x10 6. "INTLINE[6],Interrupt 6 status" "No effect,Triggered" setclrfld.long 0x00 5. 0x08 5. 0x10 5. "INTLINE[5],Interrupt 5 status" "No effect,Triggered" newline setclrfld.long 0x00 4. 0x08 4. 0x10 4. "INTLINE[4],Interrupt 4 status" "No effect,Triggered" setclrfld.long 0x00 3. 0x08 3. 0x10 3. "INTLINE[3],Interrupt 3 status" "No effect,Triggered" setclrfld.long 0x00 2. 0x08 2. 0x10 2. "INTLINE[2],Interrupt 2 status" "No effect,Triggered" newline setclrfld.long 0x00 1. 0x08 1. 0x10 1. "INTLINE[1],Interrupt 1 status" "No effect,Triggered" setclrfld.long 0x00 0. 0x08 0. 0x10 0. "INTLINE[0],Interrupt 0 status" "No effect,Triggered" group.long (0x24+0x20)++0x03 line.long 0x00 "GPIO_IRQWAKEN_0,GPIO_IRQWAKEN_0 Per-event Wakeup Enable Vector Register" bitfld.long 0x00 31. "INTLINE[31],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 30. "INTLINE[30],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 29. "INTLINE[29],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 28. "INTLINE[28],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 27. "INTLINE[27],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 26. "INTLINE[26],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 25. "INTLINE[25],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 24. "INTLINE[24],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 23. "INTLINE[23],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 22. "INTLINE[22],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 21. "INTLINE[21],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 20. "INTLINE[20],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 19. "INTLINE[19],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 18. "INTLINE[18],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 17. "INTLINE[17],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 16. "INTLINE[16],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 15. "INTLINE[15],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 14. "INTLINE[14],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 13. "INTLINE[13],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 12. "INTLINE[12],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 11. "INTLINE[11],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 10. "INTLINE[10],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 9. "INTLINE[9],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 8. "INTLINE[8],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 7. "INTLINE[7],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 6. "INTLINE[6],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 5. "INTLINE[5],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 4. "INTLINE[4],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 3. "INTLINE[3],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 2. "INTLINE[2],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 1. "INTLINE[1],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 0. "INTLINE[0],Wakeup enable for interrupt line" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "GPIO_IRQSTATUS_RAW_1,Status Raw Register For Interrupt 1" bitfld.long 0x00 31. "INTLINE[31],Interrupt 31 status" "No effect,Triggered" bitfld.long 0x00 30. "INTLINE[30],Interrupt 30 status" "No effect,Triggered" bitfld.long 0x00 29. "INTLINE[29],Interrupt 29 status" "No effect,Triggered" newline bitfld.long 0x00 28. "INTLINE[28],Interrupt 28 status" "No effect,Triggered" bitfld.long 0x00 27. "INTLINE[27],Interrupt 27 status" "No effect,Triggered" bitfld.long 0x00 26. "INTLINE[26],Interrupt 26 status" "No effect,Triggered" newline bitfld.long 0x00 25. "INTLINE[25],Interrupt 25 status" "No effect,Triggered" bitfld.long 0x00 24. "INTLINE[24],Interrupt 24 status" "No effect,Triggered" bitfld.long 0x00 23. "INTLINE[23],Interrupt 23 status" "No effect,Triggered" newline bitfld.long 0x00 22. "INTLINE[22],Interrupt 22 status" "No effect,Triggered" bitfld.long 0x00 21. "INTLINE[21],Interrupt 21 status" "No effect,Triggered" bitfld.long 0x00 20. "INTLINE[20],Interrupt 20 status" "No effect,Triggered" newline bitfld.long 0x00 19. "INTLINE[19],Interrupt 19 status" "No effect,Triggered" bitfld.long 0x00 18. "INTLINE[18],Interrupt 18 status" "No effect,Triggered" bitfld.long 0x00 17. "INTLINE[17],Interrupt 17 status" "No effect,Triggered" newline bitfld.long 0x00 16. "INTLINE[16],Interrupt 16 status" "No effect,Triggered" bitfld.long 0x00 15. "INTLINE[15],Interrupt 15 status" "No effect,Triggered" bitfld.long 0x00 14. "INTLINE[14],Interrupt 14 status" "No effect,Triggered" newline bitfld.long 0x00 13. "INTLINE[13],Interrupt 13 status" "No effect,Triggered" bitfld.long 0x00 12. "INTLINE[12],Interrupt 12 status" "No effect,Triggered" bitfld.long 0x00 11. "INTLINE[11],Interrupt 11 status" "No effect,Triggered" newline bitfld.long 0x00 10. "INTLINE[10],Interrupt 10 status" "No effect,Triggered" bitfld.long 0x00 9. "INTLINE[9],Interrupt 9 status" "No effect,Triggered" bitfld.long 0x00 8. "INTLINE[8],Interrupt 8 status" "No effect,Triggered" newline bitfld.long 0x00 7. "INTLINE[7],Interrupt 7 status" "No effect,Triggered" bitfld.long 0x00 6. "INTLINE[6],Interrupt 6 status" "No effect,Triggered" bitfld.long 0x00 5. "INTLINE[5],Interrupt 5 status" "No effect,Triggered" newline bitfld.long 0x00 4. "INTLINE[4],Interrupt 4 status" "No effect,Triggered" bitfld.long 0x00 3. "INTLINE[3],Interrupt 3 status" "No effect,Triggered" bitfld.long 0x00 2. "INTLINE[2],Interrupt 2 status" "No effect,Triggered" newline bitfld.long 0x00 1. "INTLINE[1],Interrupt 1 status" "No effect,Triggered" bitfld.long 0x00 0. "INTLINE[0],Interrupt 0 status" "No effect,Triggered" group.long (0x28+0x08)++0x03 line.long 0x00 "GPIO_IRQSTATUS_1_SET/CLR,GPIO_IRQSTATUS_1 Register Provides Core Status Information For The Interrupt Handling" setclrfld.long 0x00 31. 0x08 31. 0x10 31. "INTLINE[31],Interrupt 31 status" "No effect,Triggered" setclrfld.long 0x00 30. 0x08 30. 0x10 30. "INTLINE[30],Interrupt 30 status" "No effect,Triggered" setclrfld.long 0x00 29. 0x08 29. 0x10 29. "INTLINE[29],Interrupt 29 status" "No effect,Triggered" newline setclrfld.long 0x00 28. 0x08 28. 0x10 28. "INTLINE[28],Interrupt 28 status" "No effect,Triggered" setclrfld.long 0x00 27. 0x08 27. 0x10 27. "INTLINE[27],Interrupt 27 status" "No effect,Triggered" setclrfld.long 0x00 26. 0x08 26. 0x10 26. "INTLINE[26],Interrupt 26 status" "No effect,Triggered" newline setclrfld.long 0x00 25. 0x08 25. 0x10 25. "INTLINE[25],Interrupt 25 status" "No effect,Triggered" setclrfld.long 0x00 24. 0x08 24. 0x10 24. "INTLINE[24],Interrupt 24 status" "No effect,Triggered" setclrfld.long 0x00 23. 0x08 23. 0x10 23. "INTLINE[23],Interrupt 23 status" "No effect,Triggered" newline setclrfld.long 0x00 22. 0x08 22. 0x10 22. "INTLINE[22],Interrupt 22 status" "No effect,Triggered" setclrfld.long 0x00 21. 0x08 21. 0x10 21. "INTLINE[21],Interrupt 21 status" "No effect,Triggered" setclrfld.long 0x00 20. 0x08 20. 0x10 20. "INTLINE[20],Interrupt 20 status" "No effect,Triggered" newline setclrfld.long 0x00 19. 0x08 19. 0x10 19. "INTLINE[19],Interrupt 19 status" "No effect,Triggered" setclrfld.long 0x00 18. 0x08 18. 0x10 18. "INTLINE[18],Interrupt 18 status" "No effect,Triggered" setclrfld.long 0x00 17. 0x08 17. 0x10 17. "INTLINE[17],Interrupt 17 status" "No effect,Triggered" newline setclrfld.long 0x00 16. 0x08 16. 0x10 16. "INTLINE[16],Interrupt 16 status" "No effect,Triggered" setclrfld.long 0x00 15. 0x08 15. 0x10 15. "INTLINE[15],Interrupt 15 status" "No effect,Triggered" setclrfld.long 0x00 14. 0x08 14. 0x10 14. "INTLINE[14],Interrupt 14 status" "No effect,Triggered" newline setclrfld.long 0x00 13. 0x08 13. 0x10 13. "INTLINE[13],Interrupt 13 status" "No effect,Triggered" setclrfld.long 0x00 12. 0x08 12. 0x10 12. "INTLINE[12],Interrupt 12 status" "No effect,Triggered" setclrfld.long 0x00 11. 0x08 11. 0x10 11. "INTLINE[11],Interrupt 11 status" "No effect,Triggered" newline setclrfld.long 0x00 10. 0x08 10. 0x10 10. "INTLINE[10],Interrupt 10 status" "No effect,Triggered" setclrfld.long 0x00 9. 0x08 9. 0x10 9. "INTLINE[9],Interrupt 9 status" "No effect,Triggered" setclrfld.long 0x00 8. 0x08 8. 0x10 8. "INTLINE[8],Interrupt 8 status" "No effect,Triggered" newline setclrfld.long 0x00 7. 0x08 7. 0x10 7. "INTLINE[7],Interrupt 7 status" "No effect,Triggered" setclrfld.long 0x00 6. 0x08 6. 0x10 6. "INTLINE[6],Interrupt 6 status" "No effect,Triggered" setclrfld.long 0x00 5. 0x08 5. 0x10 5. "INTLINE[5],Interrupt 5 status" "No effect,Triggered" newline setclrfld.long 0x00 4. 0x08 4. 0x10 4. "INTLINE[4],Interrupt 4 status" "No effect,Triggered" setclrfld.long 0x00 3. 0x08 3. 0x10 3. "INTLINE[3],Interrupt 3 status" "No effect,Triggered" setclrfld.long 0x00 2. 0x08 2. 0x10 2. "INTLINE[2],Interrupt 2 status" "No effect,Triggered" newline setclrfld.long 0x00 1. 0x08 1. 0x10 1. "INTLINE[1],Interrupt 1 status" "No effect,Triggered" setclrfld.long 0x00 0. 0x08 0. 0x10 0. "INTLINE[0],Interrupt 0 status" "No effect,Triggered" group.long (0x28+0x20)++0x03 line.long 0x00 "GPIO_IRQWAKEN_1,GPIO_IRQWAKEN_1 Per-event Wakeup Enable Vector Register" bitfld.long 0x00 31. "INTLINE[31],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 30. "INTLINE[30],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 29. "INTLINE[29],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 28. "INTLINE[28],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 27. "INTLINE[27],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 26. "INTLINE[26],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 25. "INTLINE[25],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 24. "INTLINE[24],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 23. "INTLINE[23],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 22. "INTLINE[22],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 21. "INTLINE[21],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 20. "INTLINE[20],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 19. "INTLINE[19],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 18. "INTLINE[18],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 17. "INTLINE[17],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 16. "INTLINE[16],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 15. "INTLINE[15],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 14. "INTLINE[14],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 13. "INTLINE[13],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 12. "INTLINE[12],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 11. "INTLINE[11],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 10. "INTLINE[10],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 9. "INTLINE[9],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 8. "INTLINE[8],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 7. "INTLINE[7],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 6. "INTLINE[6],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 5. "INTLINE[5],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 4. "INTLINE[4],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 3. "INTLINE[3],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 2. "INTLINE[2],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 1. "INTLINE[1],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 0. "INTLINE[0],Wakeup enable for interrupt line" "Disabled,Enabled" group.long 0x114++0x03 line.long 0x00 "GPIO_SYSSTATUS,System Status Register" bitfld.long 0x00 0. "RESETDONE,Reset status information" "On-going,Completed" group.long 0x130++0x07 line.long 0x00 "GPIO_CTRL,Module Control Register" bitfld.long 0x00 1.--2. "GATINGRATIO,Controls the clock gating for the event detection logic (Divider)" "/1,/2,/4,/8" bitfld.long 0x00 0. "DISABLEMODULE,Module disable" "No,Yes" line.long 0x04 "GPIO_OE,GPIO Output Enable Register" bitfld.long 0x04 31. "OUTPUTEN[31],GPIO 31 output data enable" "Output,Input" bitfld.long 0x04 30. "OUTPUTEN[30],GPIO 30 output data enable" "Output,Input" bitfld.long 0x04 29. "OUTPUTEN[29],GPIO 29 output data enable" "Output,Input" newline bitfld.long 0x04 28. "OUTPUTEN[28],GPIO 28 output data enable" "Output,Input" bitfld.long 0x04 27. "OUTPUTEN[27],GPIO 27 output data enable" "Output,Input" bitfld.long 0x04 26. "OUTPUTEN[26],GPIO 26 output data enable" "Output,Input" newline bitfld.long 0x04 25. "OUTPUTEN[25],GPIO 25 output data enable" "Output,Input" bitfld.long 0x04 24. "OUTPUTEN[24],GPIO 24 output data enable" "Output,Input" bitfld.long 0x04 23. "OUTPUTEN[23],GPIO 23 output data enable" "Output,Input" newline bitfld.long 0x04 22. "OUTPUTEN[22],GPIO 22 output data enable" "Output,Input" bitfld.long 0x04 21. "OUTPUTEN[21],GPIO 21 output data enable" "Output,Input" bitfld.long 0x04 20. "OUTPUTEN[20],GPIO 20 output data enable" "Output,Input" newline bitfld.long 0x04 19. "OUTPUTEN[19],GPIO 19 output data enable" "Output,Input" bitfld.long 0x04 18. "OUTPUTEN[18],GPIO 18 output data enable" "Output,Input" bitfld.long 0x04 17. "OUTPUTEN[17],GPIO 17 output data enable" "Output,Input" newline bitfld.long 0x04 16. "OUTPUTEN[16],GPIO 16 output data enable" "Output,Input" bitfld.long 0x04 15. "OUTPUTEN[15],GPIO 15 output data enable" "Output,Input" bitfld.long 0x04 14. "OUTPUTEN[14],GPIO 14 output data enable" "Output,Input" newline bitfld.long 0x04 13. "OUTPUTEN[13],GPIO 13 output data enable" "Output,Input" bitfld.long 0x04 12. "OUTPUTEN[12],GPIO 12 output data enable" "Output,Input" bitfld.long 0x04 11. "OUTPUTEN[11],GPIO 11 output data enable" "Output,Input" newline bitfld.long 0x04 10. "OUTPUTEN[10],GPIO 10 output data enable" "Output,Input" bitfld.long 0x04 9. "OUTPUTEN[9],GPIO 9 output data enable" "Output,Input" bitfld.long 0x04 8. "OUTPUTEN[8],GPIO 8 output data enable" "Output,Input" newline bitfld.long 0x04 7. "OUTPUTEN[7],GPIO 7 output data enable" "Output,Input" bitfld.long 0x04 6. "OUTPUTEN[6],GPIO 6 output data enable" "Output,Input" bitfld.long 0x04 5. "OUTPUTEN[5],GPIO 5 output data enable" "Output,Input" newline bitfld.long 0x04 4. "OUTPUTEN[4],GPIO 4 output data enable" "Output,Input" bitfld.long 0x04 3. "OUTPUTEN[3],GPIO 3 output data enable" "Output,Input" bitfld.long 0x04 2. "OUTPUTEN[2],GPIO 2 output data enable" "Output,Input" newline bitfld.long 0x04 1. "OUTPUTEN[1],GPIO 1 output data enable" "Output,Input" bitfld.long 0x04 0. "OUTPUTEN[0],GPIO 0 output data enable" "Output,Input" rgroup.long 0x138++0x03 line.long 0x00 "GPIO_DATAIN,Sampled Input Data" group.long 0x13C++0x03 line.long 0x00 "GPIO_DATAOUT_SET/CLR,Data To Set On Output Pins" setclrfld.long 0x00 31. 0x58 31. 0x54 31. "DATAOUT[31],Set/clear data 31 output register" "Set,Clear" setclrfld.long 0x00 30. 0x58 30. 0x54 30. "DATAOUT[30],Set/clear data 30 output register" "Set,Clear" setclrfld.long 0x00 29. 0x58 29. 0x54 29. "DATAOUT[29],Set/clear data 29 output register" "Set,Clear" newline setclrfld.long 0x00 28. 0x58 28. 0x54 28. "DATAOUT[28],Set/clear data 28 output register" "Set,Clear" setclrfld.long 0x00 27. 0x58 27. 0x54 27. "DATAOUT[27],Set/clear data 27 output register" "Set,Clear" setclrfld.long 0x00 26. 0x58 26. 0x54 26. "DATAOUT[26],Set/clear data 26 output register" "Set,Clear" newline setclrfld.long 0x00 25. 0x58 25. 0x54 25. "DATAOUT[25],Set/clear data 25 output register" "Set,Clear" setclrfld.long 0x00 24. 0x58 24. 0x54 24. "DATAOUT[24],Set/clear data 24 output register" "Set,Clear" setclrfld.long 0x00 23. 0x58 23. 0x54 23. "DATAOUT[23],Set/clear data 23 output register" "Set,Clear" newline setclrfld.long 0x00 22. 0x58 22. 0x54 22. "DATAOUT[22],Set/clear data 22 output register" "Set,Clear" setclrfld.long 0x00 21. 0x58 21. 0x54 21. "DATAOUT[21],Set/clear data 21 output register" "Set,Clear" setclrfld.long 0x00 20. 0x58 20. 0x54 20. "DATAOUT[20],Set/clear data 20 output register" "Set,Clear" newline setclrfld.long 0x00 19. 0x58 19. 0x54 19. "DATAOUT[19],Set/clear data output 19 register" "Set,Clear" setclrfld.long 0x00 18. 0x58 18. 0x54 18. "DATAOUT[18],Set/clear data 18 output register" "Set,Clear" setclrfld.long 0x00 17. 0x58 17. 0x54 17. "DATAOUT[17],Set/clear data 17 output register" "Set,Clear" newline setclrfld.long 0x00 16. 0x58 16. 0x54 16. "DATAOUT[16],Set/clear data 16 output register" "Set,Clear" setclrfld.long 0x00 15. 0x58 15. 0x54 15. "DATAOUT[15],Set/clear data 15 output register" "Set,Clear" setclrfld.long 0x00 14. 0x58 14. 0x54 14. "DATAOUT[14],Set/clear data 14 output register" "Set,Clear" newline setclrfld.long 0x00 13. 0x58 13. 0x54 13. "DATAOUT[13],Set/clear data 13 output register" "Set,Clear" setclrfld.long 0x00 12. 0x58 12. 0x54 12. "DATAOUT[12],Set/clear data 12 output register" "Set,Clear" setclrfld.long 0x00 11. 0x58 11. 0x54 11. "DATAOUT[11],Set/clear data 11 output register" "Set,Clear" newline setclrfld.long 0x00 10. 0x58 10. 0x54 10. "DATAOUT[10],Set/clear data 10 output register" "Set,Clear" setclrfld.long 0x00 9. 0x58 9. 0x54 9. "DATAOUT[9],Set/clear data output 9 register" "Set,Clear" setclrfld.long 0x00 8. 0x58 8. 0x54 8. "DATAOUT[8],Set/clear data 8 output register" "Set,Clear" newline setclrfld.long 0x00 7. 0x58 7. 0x54 7. "DATAOUT[7],Set/clear data 7 output register" "Set,Clear" setclrfld.long 0x00 6. 0x58 6. 0x54 6. "DATAOUT[6],Set/clear data 6 output register" "Set,Clear" setclrfld.long 0x00 5. 0x58 5. 0x54 5. "DATAOUT[5],Set/clear data 5 output register" "Set,Clear" newline setclrfld.long 0x00 4. 0x58 4. 0x54 4. "DATAOUT[4],Set/clear data 4 output register" "Set,Clear" setclrfld.long 0x00 3. 0x58 3. 0x54 3. "DATAOUT[3],Set/clear data 3 output register" "Set,Clear" setclrfld.long 0x00 2. 0x58 2. 0x54 2. "DATAOUT[2],Set/clear data 2 output register" "Set,Clear" newline setclrfld.long 0x00 1. 0x58 1. 0x54 1. "DATAOUT[1],Set/clear data 1 output register" "Set,Clear" setclrfld.long 0x00 0. 0x58 0. 0x54 0. "DATAOUT[0],Set/clear data 0 output register" "Set,Clear" group.long 0x13C++0x03 line.long 0x00 "GPIO_LEVELDETECT0,Low-level Detection To Be Used For The Interrupt Request Generation" bitfld.long 0x00 31. "LEVELDETECT0[31],LEVELDETECT0[31] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. "LEVELDETECT0[30],LEVELDETECT0[30] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 29. "LEVELDETECT0[29],LEVELDETECT0[29] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 28. "LEVELDETECT0[28],LEVELDETECT0[28] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 27. "LEVELDETECT0[27],LEVELDETECT0[27] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 26. "LEVELDETECT0[26],LEVELDETECT0[26] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 25. "LEVELDETECT0[25],LEVELDETECT0[25] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 24. "LEVELDETECT0[24],LEVELDETECT0[24] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 23. "LEVELDETECT0[23],LEVELDETECT0[23] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 22. "LEVELDETECT0[22],LEVELDETECT0[22] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 21. "LEVELDETECT0[21],LEVELDETECT0[21] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 20. "LEVELDETECT0[20],LEVELDETECT0[20] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "LEVELDETECT0[19],LEVELDETECT0[19] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 18. "LEVELDETECT0[18],LEVELDETECT0[18] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 17. "LEVELDETECT0[17],LEVELDETECT0[17] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "LEVELDETECT0[16],LEVELDETECT0[16] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 15. "LEVELDETECT0[15],LEVELDETECT0[15] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 14. "LEVELDETECT0[14],LEVELDETECT0[14] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 13. "LEVELDETECT0[13],LEVELDETECT0[13] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 12. "LEVELDETECT0[12],LEVELDETECT0[12] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 11. "LEVELDETECT0[11],LEVELDETECT0[11] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 10. "LEVELDETECT0[10],LEVELDETECT0[10] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 9. "LEVELDETECT0[9],LEVELDETECT0[9] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 8. "LEVELDETECT0[8],LEVELDETECT0[8] Low low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "LEVELDETECT0[7],LEVELDETECT0[7] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 6. "LEVELDETECT0[6],LEVELDETECT0[6] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 5. "LEVELDETECT0[5],LEVELDETECT0[5] Low low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "LEVELDETECT0[4],LEVELDETECT0[4] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 3. "LEVELDETECT0[3],LEVELDETECT0[3] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 2. "LEVELDETECT0[2],LEVELDETECT0[2] Low low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "LEVELDETECT0[1],LEVELDETECT0[1] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 0. "LEVELDETECT0[0],LEVELDETECT0[0] Low low level interrupt 31 enable" "Disabled,Enabled" group.long 0x140++0x03 line.long 0x00 "GPIO_LEVELDETECT1,High-level Detection To Be Used For The Interrupt Request Generation" bitfld.long 0x00 31. "LEVELDETECT0[31],LEVELDETECT0[31] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. "LEVELDETECT0[30],LEVELDETECT0[30] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 29. "LEVELDETECT0[29],LEVELDETECT0[29] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 28. "LEVELDETECT0[28],LEVELDETECT0[28] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 27. "LEVELDETECT0[27],LEVELDETECT0[27] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 26. "LEVELDETECT0[26],LEVELDETECT0[26] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 25. "LEVELDETECT0[25],LEVELDETECT0[25] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 24. "LEVELDETECT0[24],LEVELDETECT0[24] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 23. "LEVELDETECT0[23],LEVELDETECT0[23] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 22. "LEVELDETECT0[22],LEVELDETECT0[22] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 21. "LEVELDETECT0[21],LEVELDETECT0[21] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 20. "LEVELDETECT0[20],LEVELDETECT0[20] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "LEVELDETECT0[19],LEVELDETECT0[19] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 18. "LEVELDETECT0[18],LEVELDETECT0[18] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 17. "LEVELDETECT0[17],LEVELDETECT0[17] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "LEVELDETECT0[16],LEVELDETECT0[16] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 15. "LEVELDETECT0[15],LEVELDETECT0[15] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 14. "LEVELDETECT0[14],LEVELDETECT0[14] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 13. "LEVELDETECT0[13],LEVELDETECT0[13] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 12. "LEVELDETECT0[12],LEVELDETECT0[12] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 11. "LEVELDETECT0[11],LEVELDETECT0[11] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 10. "LEVELDETECT0[10],LEVELDETECT0[10] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 9. "LEVELDETECT0[9],LEVELDETECT0[9] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 8. "LEVELDETECT0[8],LEVELDETECT0[8] High low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "LEVELDETECT0[7],LEVELDETECT0[7] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 6. "LEVELDETECT0[6],LEVELDETECT0[6] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 5. "LEVELDETECT0[5],LEVELDETECT0[5] High low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "LEVELDETECT0[4],LEVELDETECT0[4] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 3. "LEVELDETECT0[3],LEVELDETECT0[3] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 2. "LEVELDETECT0[2],LEVELDETECT0[2] High low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "LEVELDETECT0[1],LEVELDETECT0[1] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 0. "LEVELDETECT0[0],LEVELDETECT0[0] High low level interrupt 31 enable" "Disabled,Enabled" group.long 0x148++0x07 line.long 0x00 "GPIO_RISINGDETECT,rising-edge Detection To Be Used For The Interrupt Request Generation" bitfld.long 0x00 31. "RISINGDETECT31,Rising edge interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. "RISINGDETECT30,Rising edge interrupt 30 enable" "Disabled,Enabled" bitfld.long 0x00 29. "RISINGDETECT29,Rising edge interrupt 29 enable" "Disabled,Enabled" newline bitfld.long 0x00 28. "RISINGDETECT28,Rising edge interrupt 28 enable" "Disabled,Enabled" bitfld.long 0x00 27. "RISINGDETECT27,Rising edge interrupt 27 enable" "Disabled,Enabled" bitfld.long 0x00 26. "RISINGDETECT26,Rising edge interrupt 26 enable" "Disabled,Enabled" newline bitfld.long 0x00 25. "RISINGDETECT25,Rising edge interrupt 25 enable" "Disabled,Enabled" bitfld.long 0x00 24. "RISINGDETECT24,Rising edge interrupt 24 enable" "Disabled,Enabled" bitfld.long 0x00 23. "RISINGDETECT23,Rising edge interrupt 23 enable" "Disabled,Enabled" newline bitfld.long 0x00 22. "RISINGDETECT22,Rising edge interrupt 22 enable" "Disabled,Enabled" bitfld.long 0x00 21. "RISINGDETECT21,Rising edge interrupt 21 enable" "Disabled,Enabled" bitfld.long 0x00 20. "RISINGDETECT20,Rising edge interrupt 20 enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "RISINGDETECT19,Rising edge interrupt 19 enable" "Disabled,Enabled" bitfld.long 0x00 18. "RISINGDETECT18,Rising edge interrupt 18 enable" "Disabled,Enabled" bitfld.long 0x00 17. "RISINGDETECT17,Rising edge interrupt 17 enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "RISINGDETECT16,Rising edge interrupt 16 enable" "Disabled,Enabled" bitfld.long 0x00 15. "RISINGDETECT15,Rising edge interrupt 15 enable" "Disabled,Enabled" bitfld.long 0x00 14. "RISINGDETECT14,Rising edge interrupt 14 enable" "Disabled,Enabled" newline bitfld.long 0x00 13. "RISINGDETECT13,Rising edge interrupt 13 enable" "Disabled,Enabled" bitfld.long 0x00 12. "RISINGDETECT12,Rising edge interrupt 12 enable" "Disabled,Enabled" bitfld.long 0x00 11. "RISINGDETECT11,Rising edge interrupt 11 enable" "Disabled,Enabled" newline bitfld.long 0x00 10. "RISINGDETECT10,Rising edge interrupt 10 enable" "Disabled,Enabled" bitfld.long 0x00 9. "RISINGDETECT9,Rising edge interrupt 9 enable" "Disabled,Enabled" bitfld.long 0x00 8. "RISINGDETECT8,Rising edge interrupt 8 enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "RISINGDETECT7,Rising edge interrupt 7 enable" "Disabled,Enabled" bitfld.long 0x00 6. "RISINGDETECT6,Rising edge interrupt 6 enable" "Disabled,Enabled" bitfld.long 0x00 5. "RISINGDETECT5,Rising edge interrupt 5 enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "RISINGDETECT4,Rising edge interrupt 4 enable" "Disabled,Enabled" bitfld.long 0x00 3. "RISINGDETECT3,Rising edge interrupt 3 enable" "Disabled,Enabled" bitfld.long 0x00 2. "RISINGDETECT2,Rising edge interrupt 2 enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "RISINGDETECT1,Rising edge interrupt 1 enable" "Disabled,Enabled" bitfld.long 0x00 0. "RISINGDETECT0,Rising edge interrupt 0 enable" "Disabled,Enabled" line.long 0x04 "GPIO_FALLINGDETECT,Falling-edge Detection To Be Used For The Interrupt Request Generation" bitfld.long 0x04 31. "FALLINGDETECT31,Falling-edge detection 31" "Disabled,Enabled" bitfld.long 0x04 30. "FALLINGDETECT30,Falling-edge detection 30" "Disabled,Enabled" bitfld.long 0x04 29. "FALLINGDETECT29,Falling-edge detection 29" "Disabled,Enabled" newline bitfld.long 0x04 28. "FALLINGDETECT28,Falling-edge detection 28" "Disabled,Enabled" bitfld.long 0x04 27. "FALLINGDETECT27,Falling-edge detection 27" "Disabled,Enabled" bitfld.long 0x04 26. "FALLINGDETECT26,Falling-edge detection 26" "Disabled,Enabled" newline bitfld.long 0x04 25. "FALLINGDETECT25,Falling-edge detection 25" "Disabled,Enabled" bitfld.long 0x04 24. "FALLINGDETECT24,Falling-edge detection 24" "Disabled,Enabled" bitfld.long 0x04 23. "FALLINGDETECT23,Falling-edge detection 23" "Disabled,Enabled" newline bitfld.long 0x04 22. "FALLINGDETECT22,Falling-edge detection 22" "Disabled,Enabled" bitfld.long 0x04 21. "FALLINGDETECT21,Falling-edge detection 21" "Disabled,Enabled" bitfld.long 0x04 20. "FALLINGDETECT20,Falling-edge detection 20" "Disabled,Enabled" newline bitfld.long 0x04 19. "FALLINGDETECT19,Falling-edge detection 19" "Disabled,Enabled" bitfld.long 0x04 18. "FALLINGDETECT18,Falling-edge detection 18" "Disabled,Enabled" bitfld.long 0x04 17. "FALLINGDETECT17,Falling-edge detection 17" "Disabled,Enabled" newline bitfld.long 0x04 16. "FALLINGDETECT16,Falling-edge detection 16" "Disabled,Enabled" bitfld.long 0x04 15. "FALLINGDETECT15,Falling-edge detection 15" "Disabled,Enabled" bitfld.long 0x04 14. "FALLINGDETECT14,Falling-edge detection 14" "Disabled,Enabled" newline bitfld.long 0x04 13. "FALLINGDETECT13,Falling-edge detection 13" "Disabled,Enabled" bitfld.long 0x04 12. "FALLINGDETECT12,Falling-edge detection 12" "Disabled,Enabled" bitfld.long 0x04 11. "FALLINGDETECT11,Falling-edge detection 11" "Disabled,Enabled" newline bitfld.long 0x04 10. "FALLINGDETECT10,Falling-edge detection 10" "Disabled,Enabled" bitfld.long 0x04 9. "FALLINGDETECT9,Falling-edge detection 9" "Disabled,Enabled" bitfld.long 0x04 8. "FALLINGDETECT8,Falling-edge detection 8" "Disabled,Enabled" newline bitfld.long 0x04 7. "FALLINGDETECT7,Falling-edge detection 7" "Disabled,Enabled" bitfld.long 0x04 6. "FALLINGDETECT6,Falling-edge detection 6" "Disabled,Enabled" bitfld.long 0x04 5. "FALLINGDETECT5,Falling-edge detection 5" "Disabled,Enabled" newline bitfld.long 0x04 4. "FALLINGDETECT4,Falling-edge detection 4" "Disabled,Enabled" bitfld.long 0x04 3. "FALLINGDETECT3,Falling-edge detection 3" "Disabled,Enabled" bitfld.long 0x04 2. "FALLINGDETECT2,Falling-edge detection 2" "Disabled,Enabled" newline bitfld.long 0x04 1. "FALLINGDETECT1,Falling-edge detection 1" "Disabled,Enabled" bitfld.long 0x04 0. "FALLINGDETECT0,Falling-edge detection 0" "Disabled,Enabled" group.long 0x150++0x07 line.long 0x00 "GPIO_DEBOUNCENABLE,Input Debounce Enable Register" bitfld.long 0x00 31. "DEBOUNCEENABLE[31],Input 31 debounce enable" "Disabled,Enabled" bitfld.long 0x00 30. "DEBOUNCEENABLE[30],Input 30 debounce enable" "Disabled,Enabled" bitfld.long 0x00 29. "DEBOUNCEENABLE[29],Input 29 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 28. "DEBOUNCEENABLE[28],Input 28 debounce enable" "Disabled,Enabled" bitfld.long 0x00 27. "DEBOUNCEENABLE[27],Input 27 debounce enable" "Disabled,Enabled" bitfld.long 0x00 26. "DEBOUNCEENABLE[26],Input 26 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 25. "DEBOUNCEENABLE[25],Input 25 debounce enable" "Disabled,Enabled" bitfld.long 0x00 24. "DEBOUNCEENABLE[24],Input 24 debounce enable" "Disabled,Enabled" bitfld.long 0x00 23. "DEBOUNCEENABLE[23],Input 23 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 22. "DEBOUNCEENABLE[22],Input 22 debounce enable" "Disabled,Enabled" bitfld.long 0x00 21. "DEBOUNCEENABLE[21],Input 21 debounce enable" "Disabled,Enabled" bitfld.long 0x00 20. "DEBOUNCEENABLE[20],Input 20 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "DEBOUNCEENABLE[19],Input 19 debounce enable" "Disabled,Enabled" bitfld.long 0x00 18. "DEBOUNCEENABLE[18],Input 18 debounce enable" "Disabled,Enabled" bitfld.long 0x00 17. "DEBOUNCEENABLE[17],Input 17 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "DEBOUNCEENABLE[16],Input 16 debounce enable" "Disabled,Enabled" bitfld.long 0x00 15. "DEBOUNCEENABLE[15],Input 15 debounce enable" "Disabled,Enabled" bitfld.long 0x00 14. "DEBOUNCEENABLE[14],Input 14 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 13. "DEBOUNCEENABLE[13],Input 13 debounce enable" "Disabled,Enabled" bitfld.long 0x00 12. "DEBOUNCEENABLE[12],Input 12 debounce enable" "Disabled,Enabled" bitfld.long 0x00 11. "DEBOUNCEENABLE[11],Input 11 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 10. "DEBOUNCEENABLE[10],Input 10 debounce enable" "Disabled,Enabled" bitfld.long 0x00 9. "DEBOUNCEENABLE[9],Input 9 debounce enable" "Disabled,Enabled" bitfld.long 0x00 8. "DEBOUNCEENABLE[8],Input 8 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "DEBOUNCEENABLE[7],Input 7 debounce enable" "Disabled,Enabled" bitfld.long 0x00 6. "DEBOUNCEENABLE[6],Input 6 debounce enable" "Disabled,Enabled" bitfld.long 0x00 5. "DEBOUNCEENABLE[5],Input 5 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "DEBOUNCEENABLE[4],Input 4 debounce enable" "Disabled,Enabled" bitfld.long 0x00 3. "DEBOUNCEENABLE[3],Input 3 debounce enable" "Disabled,Enabled" bitfld.long 0x00 2. "DEBOUNCEENABLE[2],Input 2 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "DEBOUNCEENABLE[1],Input 1 debounce enable" "Disabled,Enabled" bitfld.long 0x00 0. "DEBOUNCEENABLE[0],Input 0 debounce enable" "Disabled,Enabled" line.long 0x04 "GPIO_DEBOUNCINGTIME,GPIO Debouncing Time Register" hexmask.long.byte 0x04 0.--7. 1. "DEBOUNCETIME,Input debouncing value in 31 microsecond steps" tree.end tree "GPIO2" base ad:0x481AC000 rgroup.long 0x00++0x03 line.long 0x00 "GPIO_REVISION,GPIO Revision Register" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between old scheme and current" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "FUNC,Functional number" bitfld.long 0x00 11.--15. "RTL,RTL version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "MAJOR,Major revision" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "CUSTOM,Custom revision" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "MINOR,Minor revision" group.long 0x10++0x03 line.long 0x00 "GPIO_SYSCONFIG,GPIO Sysconfig Register" bitfld.long 0x00 3.--4. "IDLEMODE,Select IDLE mode" "Force-idle,No-idle,Smart-idle,?..." bitfld.long 0x00 2. "ENAWAKEUP,Wakeup enable" "Disabled,Enabled" bitfld.long 0x00 1. "SOFTRESET,Software reset mode" "Normal,Reset" newline bitfld.long 0x00 0. "AUTOIDLE,Internal interface clock gating strategy" "Free-running,Gated" group.long 0x20++0x03 line.long 0x00 "GPIO_EOI,GPIO_EOI Register Provides Software End Of Interrupt" bitfld.long 0x00 0. "DMAEVENT_ACK,DMA event completion acknowledgement" "Acknowledged,Not acknowledged" group.long 0x24++0x03 line.long 0x00 "GPIO_IRQSTATUS_RAW_0,Status Raw Register For Interrupt 0" bitfld.long 0x00 31. "INTLINE[31],Interrupt 31 status" "No effect,Triggered" bitfld.long 0x00 30. "INTLINE[30],Interrupt 30 status" "No effect,Triggered" bitfld.long 0x00 29. "INTLINE[29],Interrupt 29 status" "No effect,Triggered" newline bitfld.long 0x00 28. "INTLINE[28],Interrupt 28 status" "No effect,Triggered" bitfld.long 0x00 27. "INTLINE[27],Interrupt 27 status" "No effect,Triggered" bitfld.long 0x00 26. "INTLINE[26],Interrupt 26 status" "No effect,Triggered" newline bitfld.long 0x00 25. "INTLINE[25],Interrupt 25 status" "No effect,Triggered" bitfld.long 0x00 24. "INTLINE[24],Interrupt 24 status" "No effect,Triggered" bitfld.long 0x00 23. "INTLINE[23],Interrupt 23 status" "No effect,Triggered" newline bitfld.long 0x00 22. "INTLINE[22],Interrupt 22 status" "No effect,Triggered" bitfld.long 0x00 21. "INTLINE[21],Interrupt 21 status" "No effect,Triggered" bitfld.long 0x00 20. "INTLINE[20],Interrupt 20 status" "No effect,Triggered" newline bitfld.long 0x00 19. "INTLINE[19],Interrupt 19 status" "No effect,Triggered" bitfld.long 0x00 18. "INTLINE[18],Interrupt 18 status" "No effect,Triggered" bitfld.long 0x00 17. "INTLINE[17],Interrupt 17 status" "No effect,Triggered" newline bitfld.long 0x00 16. "INTLINE[16],Interrupt 16 status" "No effect,Triggered" bitfld.long 0x00 15. "INTLINE[15],Interrupt 15 status" "No effect,Triggered" bitfld.long 0x00 14. "INTLINE[14],Interrupt 14 status" "No effect,Triggered" newline bitfld.long 0x00 13. "INTLINE[13],Interrupt 13 status" "No effect,Triggered" bitfld.long 0x00 12. "INTLINE[12],Interrupt 12 status" "No effect,Triggered" bitfld.long 0x00 11. "INTLINE[11],Interrupt 11 status" "No effect,Triggered" newline bitfld.long 0x00 10. "INTLINE[10],Interrupt 10 status" "No effect,Triggered" bitfld.long 0x00 9. "INTLINE[9],Interrupt 9 status" "No effect,Triggered" bitfld.long 0x00 8. "INTLINE[8],Interrupt 8 status" "No effect,Triggered" newline bitfld.long 0x00 7. "INTLINE[7],Interrupt 7 status" "No effect,Triggered" bitfld.long 0x00 6. "INTLINE[6],Interrupt 6 status" "No effect,Triggered" bitfld.long 0x00 5. "INTLINE[5],Interrupt 5 status" "No effect,Triggered" newline bitfld.long 0x00 4. "INTLINE[4],Interrupt 4 status" "No effect,Triggered" bitfld.long 0x00 3. "INTLINE[3],Interrupt 3 status" "No effect,Triggered" bitfld.long 0x00 2. "INTLINE[2],Interrupt 2 status" "No effect,Triggered" newline bitfld.long 0x00 1. "INTLINE[1],Interrupt 1 status" "No effect,Triggered" bitfld.long 0x00 0. "INTLINE[0],Interrupt 0 status" "No effect,Triggered" group.long (0x24+0x08)++0x03 line.long 0x00 "GPIO_IRQSTATUS_0_SET/CLR,GPIO_IRQSTATUS_0 Register Provides Core Status Information For The Interrupt Handling" setclrfld.long 0x00 31. 0x08 31. 0x10 31. "INTLINE[31],Interrupt 31 status" "No effect,Triggered" setclrfld.long 0x00 30. 0x08 30. 0x10 30. "INTLINE[30],Interrupt 30 status" "No effect,Triggered" setclrfld.long 0x00 29. 0x08 29. 0x10 29. "INTLINE[29],Interrupt 29 status" "No effect,Triggered" newline setclrfld.long 0x00 28. 0x08 28. 0x10 28. "INTLINE[28],Interrupt 28 status" "No effect,Triggered" setclrfld.long 0x00 27. 0x08 27. 0x10 27. "INTLINE[27],Interrupt 27 status" "No effect,Triggered" setclrfld.long 0x00 26. 0x08 26. 0x10 26. "INTLINE[26],Interrupt 26 status" "No effect,Triggered" newline setclrfld.long 0x00 25. 0x08 25. 0x10 25. "INTLINE[25],Interrupt 25 status" "No effect,Triggered" setclrfld.long 0x00 24. 0x08 24. 0x10 24. "INTLINE[24],Interrupt 24 status" "No effect,Triggered" setclrfld.long 0x00 23. 0x08 23. 0x10 23. "INTLINE[23],Interrupt 23 status" "No effect,Triggered" newline setclrfld.long 0x00 22. 0x08 22. 0x10 22. "INTLINE[22],Interrupt 22 status" "No effect,Triggered" setclrfld.long 0x00 21. 0x08 21. 0x10 21. "INTLINE[21],Interrupt 21 status" "No effect,Triggered" setclrfld.long 0x00 20. 0x08 20. 0x10 20. "INTLINE[20],Interrupt 20 status" "No effect,Triggered" newline setclrfld.long 0x00 19. 0x08 19. 0x10 19. "INTLINE[19],Interrupt 19 status" "No effect,Triggered" setclrfld.long 0x00 18. 0x08 18. 0x10 18. "INTLINE[18],Interrupt 18 status" "No effect,Triggered" setclrfld.long 0x00 17. 0x08 17. 0x10 17. "INTLINE[17],Interrupt 17 status" "No effect,Triggered" newline setclrfld.long 0x00 16. 0x08 16. 0x10 16. "INTLINE[16],Interrupt 16 status" "No effect,Triggered" setclrfld.long 0x00 15. 0x08 15. 0x10 15. "INTLINE[15],Interrupt 15 status" "No effect,Triggered" setclrfld.long 0x00 14. 0x08 14. 0x10 14. "INTLINE[14],Interrupt 14 status" "No effect,Triggered" newline setclrfld.long 0x00 13. 0x08 13. 0x10 13. "INTLINE[13],Interrupt 13 status" "No effect,Triggered" setclrfld.long 0x00 12. 0x08 12. 0x10 12. "INTLINE[12],Interrupt 12 status" "No effect,Triggered" setclrfld.long 0x00 11. 0x08 11. 0x10 11. "INTLINE[11],Interrupt 11 status" "No effect,Triggered" newline setclrfld.long 0x00 10. 0x08 10. 0x10 10. "INTLINE[10],Interrupt 10 status" "No effect,Triggered" setclrfld.long 0x00 9. 0x08 9. 0x10 9. "INTLINE[9],Interrupt 9 status" "No effect,Triggered" setclrfld.long 0x00 8. 0x08 8. 0x10 8. "INTLINE[8],Interrupt 8 status" "No effect,Triggered" newline setclrfld.long 0x00 7. 0x08 7. 0x10 7. "INTLINE[7],Interrupt 7 status" "No effect,Triggered" setclrfld.long 0x00 6. 0x08 6. 0x10 6. "INTLINE[6],Interrupt 6 status" "No effect,Triggered" setclrfld.long 0x00 5. 0x08 5. 0x10 5. "INTLINE[5],Interrupt 5 status" "No effect,Triggered" newline setclrfld.long 0x00 4. 0x08 4. 0x10 4. "INTLINE[4],Interrupt 4 status" "No effect,Triggered" setclrfld.long 0x00 3. 0x08 3. 0x10 3. "INTLINE[3],Interrupt 3 status" "No effect,Triggered" setclrfld.long 0x00 2. 0x08 2. 0x10 2. "INTLINE[2],Interrupt 2 status" "No effect,Triggered" newline setclrfld.long 0x00 1. 0x08 1. 0x10 1. "INTLINE[1],Interrupt 1 status" "No effect,Triggered" setclrfld.long 0x00 0. 0x08 0. 0x10 0. "INTLINE[0],Interrupt 0 status" "No effect,Triggered" group.long (0x24+0x20)++0x03 line.long 0x00 "GPIO_IRQWAKEN_0,GPIO_IRQWAKEN_0 Per-event Wakeup Enable Vector Register" bitfld.long 0x00 31. "INTLINE[31],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 30. "INTLINE[30],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 29. "INTLINE[29],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 28. "INTLINE[28],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 27. "INTLINE[27],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 26. "INTLINE[26],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 25. "INTLINE[25],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 24. "INTLINE[24],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 23. "INTLINE[23],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 22. "INTLINE[22],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 21. "INTLINE[21],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 20. "INTLINE[20],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 19. "INTLINE[19],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 18. "INTLINE[18],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 17. "INTLINE[17],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 16. "INTLINE[16],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 15. "INTLINE[15],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 14. "INTLINE[14],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 13. "INTLINE[13],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 12. "INTLINE[12],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 11. "INTLINE[11],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 10. "INTLINE[10],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 9. "INTLINE[9],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 8. "INTLINE[8],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 7. "INTLINE[7],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 6. "INTLINE[6],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 5. "INTLINE[5],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 4. "INTLINE[4],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 3. "INTLINE[3],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 2. "INTLINE[2],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 1. "INTLINE[1],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 0. "INTLINE[0],Wakeup enable for interrupt line" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "GPIO_IRQSTATUS_RAW_1,Status Raw Register For Interrupt 1" bitfld.long 0x00 31. "INTLINE[31],Interrupt 31 status" "No effect,Triggered" bitfld.long 0x00 30. "INTLINE[30],Interrupt 30 status" "No effect,Triggered" bitfld.long 0x00 29. "INTLINE[29],Interrupt 29 status" "No effect,Triggered" newline bitfld.long 0x00 28. "INTLINE[28],Interrupt 28 status" "No effect,Triggered" bitfld.long 0x00 27. "INTLINE[27],Interrupt 27 status" "No effect,Triggered" bitfld.long 0x00 26. "INTLINE[26],Interrupt 26 status" "No effect,Triggered" newline bitfld.long 0x00 25. "INTLINE[25],Interrupt 25 status" "No effect,Triggered" bitfld.long 0x00 24. "INTLINE[24],Interrupt 24 status" "No effect,Triggered" bitfld.long 0x00 23. "INTLINE[23],Interrupt 23 status" "No effect,Triggered" newline bitfld.long 0x00 22. "INTLINE[22],Interrupt 22 status" "No effect,Triggered" bitfld.long 0x00 21. "INTLINE[21],Interrupt 21 status" "No effect,Triggered" bitfld.long 0x00 20. "INTLINE[20],Interrupt 20 status" "No effect,Triggered" newline bitfld.long 0x00 19. "INTLINE[19],Interrupt 19 status" "No effect,Triggered" bitfld.long 0x00 18. "INTLINE[18],Interrupt 18 status" "No effect,Triggered" bitfld.long 0x00 17. "INTLINE[17],Interrupt 17 status" "No effect,Triggered" newline bitfld.long 0x00 16. "INTLINE[16],Interrupt 16 status" "No effect,Triggered" bitfld.long 0x00 15. "INTLINE[15],Interrupt 15 status" "No effect,Triggered" bitfld.long 0x00 14. "INTLINE[14],Interrupt 14 status" "No effect,Triggered" newline bitfld.long 0x00 13. "INTLINE[13],Interrupt 13 status" "No effect,Triggered" bitfld.long 0x00 12. "INTLINE[12],Interrupt 12 status" "No effect,Triggered" bitfld.long 0x00 11. "INTLINE[11],Interrupt 11 status" "No effect,Triggered" newline bitfld.long 0x00 10. "INTLINE[10],Interrupt 10 status" "No effect,Triggered" bitfld.long 0x00 9. "INTLINE[9],Interrupt 9 status" "No effect,Triggered" bitfld.long 0x00 8. "INTLINE[8],Interrupt 8 status" "No effect,Triggered" newline bitfld.long 0x00 7. "INTLINE[7],Interrupt 7 status" "No effect,Triggered" bitfld.long 0x00 6. "INTLINE[6],Interrupt 6 status" "No effect,Triggered" bitfld.long 0x00 5. "INTLINE[5],Interrupt 5 status" "No effect,Triggered" newline bitfld.long 0x00 4. "INTLINE[4],Interrupt 4 status" "No effect,Triggered" bitfld.long 0x00 3. "INTLINE[3],Interrupt 3 status" "No effect,Triggered" bitfld.long 0x00 2. "INTLINE[2],Interrupt 2 status" "No effect,Triggered" newline bitfld.long 0x00 1. "INTLINE[1],Interrupt 1 status" "No effect,Triggered" bitfld.long 0x00 0. "INTLINE[0],Interrupt 0 status" "No effect,Triggered" group.long (0x28+0x08)++0x03 line.long 0x00 "GPIO_IRQSTATUS_1_SET/CLR,GPIO_IRQSTATUS_1 Register Provides Core Status Information For The Interrupt Handling" setclrfld.long 0x00 31. 0x08 31. 0x10 31. "INTLINE[31],Interrupt 31 status" "No effect,Triggered" setclrfld.long 0x00 30. 0x08 30. 0x10 30. "INTLINE[30],Interrupt 30 status" "No effect,Triggered" setclrfld.long 0x00 29. 0x08 29. 0x10 29. "INTLINE[29],Interrupt 29 status" "No effect,Triggered" newline setclrfld.long 0x00 28. 0x08 28. 0x10 28. "INTLINE[28],Interrupt 28 status" "No effect,Triggered" setclrfld.long 0x00 27. 0x08 27. 0x10 27. "INTLINE[27],Interrupt 27 status" "No effect,Triggered" setclrfld.long 0x00 26. 0x08 26. 0x10 26. "INTLINE[26],Interrupt 26 status" "No effect,Triggered" newline setclrfld.long 0x00 25. 0x08 25. 0x10 25. "INTLINE[25],Interrupt 25 status" "No effect,Triggered" setclrfld.long 0x00 24. 0x08 24. 0x10 24. "INTLINE[24],Interrupt 24 status" "No effect,Triggered" setclrfld.long 0x00 23. 0x08 23. 0x10 23. "INTLINE[23],Interrupt 23 status" "No effect,Triggered" newline setclrfld.long 0x00 22. 0x08 22. 0x10 22. "INTLINE[22],Interrupt 22 status" "No effect,Triggered" setclrfld.long 0x00 21. 0x08 21. 0x10 21. "INTLINE[21],Interrupt 21 status" "No effect,Triggered" setclrfld.long 0x00 20. 0x08 20. 0x10 20. "INTLINE[20],Interrupt 20 status" "No effect,Triggered" newline setclrfld.long 0x00 19. 0x08 19. 0x10 19. "INTLINE[19],Interrupt 19 status" "No effect,Triggered" setclrfld.long 0x00 18. 0x08 18. 0x10 18. "INTLINE[18],Interrupt 18 status" "No effect,Triggered" setclrfld.long 0x00 17. 0x08 17. 0x10 17. "INTLINE[17],Interrupt 17 status" "No effect,Triggered" newline setclrfld.long 0x00 16. 0x08 16. 0x10 16. "INTLINE[16],Interrupt 16 status" "No effect,Triggered" setclrfld.long 0x00 15. 0x08 15. 0x10 15. "INTLINE[15],Interrupt 15 status" "No effect,Triggered" setclrfld.long 0x00 14. 0x08 14. 0x10 14. "INTLINE[14],Interrupt 14 status" "No effect,Triggered" newline setclrfld.long 0x00 13. 0x08 13. 0x10 13. "INTLINE[13],Interrupt 13 status" "No effect,Triggered" setclrfld.long 0x00 12. 0x08 12. 0x10 12. "INTLINE[12],Interrupt 12 status" "No effect,Triggered" setclrfld.long 0x00 11. 0x08 11. 0x10 11. "INTLINE[11],Interrupt 11 status" "No effect,Triggered" newline setclrfld.long 0x00 10. 0x08 10. 0x10 10. "INTLINE[10],Interrupt 10 status" "No effect,Triggered" setclrfld.long 0x00 9. 0x08 9. 0x10 9. "INTLINE[9],Interrupt 9 status" "No effect,Triggered" setclrfld.long 0x00 8. 0x08 8. 0x10 8. "INTLINE[8],Interrupt 8 status" "No effect,Triggered" newline setclrfld.long 0x00 7. 0x08 7. 0x10 7. "INTLINE[7],Interrupt 7 status" "No effect,Triggered" setclrfld.long 0x00 6. 0x08 6. 0x10 6. "INTLINE[6],Interrupt 6 status" "No effect,Triggered" setclrfld.long 0x00 5. 0x08 5. 0x10 5. "INTLINE[5],Interrupt 5 status" "No effect,Triggered" newline setclrfld.long 0x00 4. 0x08 4. 0x10 4. "INTLINE[4],Interrupt 4 status" "No effect,Triggered" setclrfld.long 0x00 3. 0x08 3. 0x10 3. "INTLINE[3],Interrupt 3 status" "No effect,Triggered" setclrfld.long 0x00 2. 0x08 2. 0x10 2. "INTLINE[2],Interrupt 2 status" "No effect,Triggered" newline setclrfld.long 0x00 1. 0x08 1. 0x10 1. "INTLINE[1],Interrupt 1 status" "No effect,Triggered" setclrfld.long 0x00 0. 0x08 0. 0x10 0. "INTLINE[0],Interrupt 0 status" "No effect,Triggered" group.long (0x28+0x20)++0x03 line.long 0x00 "GPIO_IRQWAKEN_1,GPIO_IRQWAKEN_1 Per-event Wakeup Enable Vector Register" bitfld.long 0x00 31. "INTLINE[31],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 30. "INTLINE[30],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 29. "INTLINE[29],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 28. "INTLINE[28],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 27. "INTLINE[27],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 26. "INTLINE[26],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 25. "INTLINE[25],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 24. "INTLINE[24],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 23. "INTLINE[23],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 22. "INTLINE[22],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 21. "INTLINE[21],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 20. "INTLINE[20],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 19. "INTLINE[19],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 18. "INTLINE[18],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 17. "INTLINE[17],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 16. "INTLINE[16],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 15. "INTLINE[15],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 14. "INTLINE[14],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 13. "INTLINE[13],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 12. "INTLINE[12],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 11. "INTLINE[11],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 10. "INTLINE[10],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 9. "INTLINE[9],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 8. "INTLINE[8],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 7. "INTLINE[7],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 6. "INTLINE[6],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 5. "INTLINE[5],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 4. "INTLINE[4],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 3. "INTLINE[3],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 2. "INTLINE[2],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 1. "INTLINE[1],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 0. "INTLINE[0],Wakeup enable for interrupt line" "Disabled,Enabled" group.long 0x114++0x03 line.long 0x00 "GPIO_SYSSTATUS,System Status Register" bitfld.long 0x00 0. "RESETDONE,Reset status information" "On-going,Completed" group.long 0x130++0x07 line.long 0x00 "GPIO_CTRL,Module Control Register" bitfld.long 0x00 1.--2. "GATINGRATIO,Controls the clock gating for the event detection logic (Divider)" "/1,/2,/4,/8" bitfld.long 0x00 0. "DISABLEMODULE,Module disable" "No,Yes" line.long 0x04 "GPIO_OE,GPIO Output Enable Register" bitfld.long 0x04 31. "OUTPUTEN[31],GPIO 31 output data enable" "Output,Input" bitfld.long 0x04 30. "OUTPUTEN[30],GPIO 30 output data enable" "Output,Input" bitfld.long 0x04 29. "OUTPUTEN[29],GPIO 29 output data enable" "Output,Input" newline bitfld.long 0x04 28. "OUTPUTEN[28],GPIO 28 output data enable" "Output,Input" bitfld.long 0x04 27. "OUTPUTEN[27],GPIO 27 output data enable" "Output,Input" bitfld.long 0x04 26. "OUTPUTEN[26],GPIO 26 output data enable" "Output,Input" newline bitfld.long 0x04 25. "OUTPUTEN[25],GPIO 25 output data enable" "Output,Input" bitfld.long 0x04 24. "OUTPUTEN[24],GPIO 24 output data enable" "Output,Input" bitfld.long 0x04 23. "OUTPUTEN[23],GPIO 23 output data enable" "Output,Input" newline bitfld.long 0x04 22. "OUTPUTEN[22],GPIO 22 output data enable" "Output,Input" bitfld.long 0x04 21. "OUTPUTEN[21],GPIO 21 output data enable" "Output,Input" bitfld.long 0x04 20. "OUTPUTEN[20],GPIO 20 output data enable" "Output,Input" newline bitfld.long 0x04 19. "OUTPUTEN[19],GPIO 19 output data enable" "Output,Input" bitfld.long 0x04 18. "OUTPUTEN[18],GPIO 18 output data enable" "Output,Input" bitfld.long 0x04 17. "OUTPUTEN[17],GPIO 17 output data enable" "Output,Input" newline bitfld.long 0x04 16. "OUTPUTEN[16],GPIO 16 output data enable" "Output,Input" bitfld.long 0x04 15. "OUTPUTEN[15],GPIO 15 output data enable" "Output,Input" bitfld.long 0x04 14. "OUTPUTEN[14],GPIO 14 output data enable" "Output,Input" newline bitfld.long 0x04 13. "OUTPUTEN[13],GPIO 13 output data enable" "Output,Input" bitfld.long 0x04 12. "OUTPUTEN[12],GPIO 12 output data enable" "Output,Input" bitfld.long 0x04 11. "OUTPUTEN[11],GPIO 11 output data enable" "Output,Input" newline bitfld.long 0x04 10. "OUTPUTEN[10],GPIO 10 output data enable" "Output,Input" bitfld.long 0x04 9. "OUTPUTEN[9],GPIO 9 output data enable" "Output,Input" bitfld.long 0x04 8. "OUTPUTEN[8],GPIO 8 output data enable" "Output,Input" newline bitfld.long 0x04 7. "OUTPUTEN[7],GPIO 7 output data enable" "Output,Input" bitfld.long 0x04 6. "OUTPUTEN[6],GPIO 6 output data enable" "Output,Input" bitfld.long 0x04 5. "OUTPUTEN[5],GPIO 5 output data enable" "Output,Input" newline bitfld.long 0x04 4. "OUTPUTEN[4],GPIO 4 output data enable" "Output,Input" bitfld.long 0x04 3. "OUTPUTEN[3],GPIO 3 output data enable" "Output,Input" bitfld.long 0x04 2. "OUTPUTEN[2],GPIO 2 output data enable" "Output,Input" newline bitfld.long 0x04 1. "OUTPUTEN[1],GPIO 1 output data enable" "Output,Input" bitfld.long 0x04 0. "OUTPUTEN[0],GPIO 0 output data enable" "Output,Input" rgroup.long 0x138++0x03 line.long 0x00 "GPIO_DATAIN,Sampled Input Data" group.long 0x13C++0x03 line.long 0x00 "GPIO_DATAOUT_SET/CLR,Data To Set On Output Pins" setclrfld.long 0x00 31. 0x58 31. 0x54 31. "DATAOUT[31],Set/clear data 31 output register" "Set,Clear" setclrfld.long 0x00 30. 0x58 30. 0x54 30. "DATAOUT[30],Set/clear data 30 output register" "Set,Clear" setclrfld.long 0x00 29. 0x58 29. 0x54 29. "DATAOUT[29],Set/clear data 29 output register" "Set,Clear" newline setclrfld.long 0x00 28. 0x58 28. 0x54 28. "DATAOUT[28],Set/clear data 28 output register" "Set,Clear" setclrfld.long 0x00 27. 0x58 27. 0x54 27. "DATAOUT[27],Set/clear data 27 output register" "Set,Clear" setclrfld.long 0x00 26. 0x58 26. 0x54 26. "DATAOUT[26],Set/clear data 26 output register" "Set,Clear" newline setclrfld.long 0x00 25. 0x58 25. 0x54 25. "DATAOUT[25],Set/clear data 25 output register" "Set,Clear" setclrfld.long 0x00 24. 0x58 24. 0x54 24. "DATAOUT[24],Set/clear data 24 output register" "Set,Clear" setclrfld.long 0x00 23. 0x58 23. 0x54 23. "DATAOUT[23],Set/clear data 23 output register" "Set,Clear" newline setclrfld.long 0x00 22. 0x58 22. 0x54 22. "DATAOUT[22],Set/clear data 22 output register" "Set,Clear" setclrfld.long 0x00 21. 0x58 21. 0x54 21. "DATAOUT[21],Set/clear data 21 output register" "Set,Clear" setclrfld.long 0x00 20. 0x58 20. 0x54 20. "DATAOUT[20],Set/clear data 20 output register" "Set,Clear" newline setclrfld.long 0x00 19. 0x58 19. 0x54 19. "DATAOUT[19],Set/clear data output 19 register" "Set,Clear" setclrfld.long 0x00 18. 0x58 18. 0x54 18. "DATAOUT[18],Set/clear data 18 output register" "Set,Clear" setclrfld.long 0x00 17. 0x58 17. 0x54 17. "DATAOUT[17],Set/clear data 17 output register" "Set,Clear" newline setclrfld.long 0x00 16. 0x58 16. 0x54 16. "DATAOUT[16],Set/clear data 16 output register" "Set,Clear" setclrfld.long 0x00 15. 0x58 15. 0x54 15. "DATAOUT[15],Set/clear data 15 output register" "Set,Clear" setclrfld.long 0x00 14. 0x58 14. 0x54 14. "DATAOUT[14],Set/clear data 14 output register" "Set,Clear" newline setclrfld.long 0x00 13. 0x58 13. 0x54 13. "DATAOUT[13],Set/clear data 13 output register" "Set,Clear" setclrfld.long 0x00 12. 0x58 12. 0x54 12. "DATAOUT[12],Set/clear data 12 output register" "Set,Clear" setclrfld.long 0x00 11. 0x58 11. 0x54 11. "DATAOUT[11],Set/clear data 11 output register" "Set,Clear" newline setclrfld.long 0x00 10. 0x58 10. 0x54 10. "DATAOUT[10],Set/clear data 10 output register" "Set,Clear" setclrfld.long 0x00 9. 0x58 9. 0x54 9. "DATAOUT[9],Set/clear data output 9 register" "Set,Clear" setclrfld.long 0x00 8. 0x58 8. 0x54 8. "DATAOUT[8],Set/clear data 8 output register" "Set,Clear" newline setclrfld.long 0x00 7. 0x58 7. 0x54 7. "DATAOUT[7],Set/clear data 7 output register" "Set,Clear" setclrfld.long 0x00 6. 0x58 6. 0x54 6. "DATAOUT[6],Set/clear data 6 output register" "Set,Clear" setclrfld.long 0x00 5. 0x58 5. 0x54 5. "DATAOUT[5],Set/clear data 5 output register" "Set,Clear" newline setclrfld.long 0x00 4. 0x58 4. 0x54 4. "DATAOUT[4],Set/clear data 4 output register" "Set,Clear" setclrfld.long 0x00 3. 0x58 3. 0x54 3. "DATAOUT[3],Set/clear data 3 output register" "Set,Clear" setclrfld.long 0x00 2. 0x58 2. 0x54 2. "DATAOUT[2],Set/clear data 2 output register" "Set,Clear" newline setclrfld.long 0x00 1. 0x58 1. 0x54 1. "DATAOUT[1],Set/clear data 1 output register" "Set,Clear" setclrfld.long 0x00 0. 0x58 0. 0x54 0. "DATAOUT[0],Set/clear data 0 output register" "Set,Clear" group.long 0x13C++0x03 line.long 0x00 "GPIO_LEVELDETECT0,Low-level Detection To Be Used For The Interrupt Request Generation" bitfld.long 0x00 31. "LEVELDETECT0[31],LEVELDETECT0[31] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. "LEVELDETECT0[30],LEVELDETECT0[30] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 29. "LEVELDETECT0[29],LEVELDETECT0[29] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 28. "LEVELDETECT0[28],LEVELDETECT0[28] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 27. "LEVELDETECT0[27],LEVELDETECT0[27] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 26. "LEVELDETECT0[26],LEVELDETECT0[26] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 25. "LEVELDETECT0[25],LEVELDETECT0[25] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 24. "LEVELDETECT0[24],LEVELDETECT0[24] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 23. "LEVELDETECT0[23],LEVELDETECT0[23] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 22. "LEVELDETECT0[22],LEVELDETECT0[22] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 21. "LEVELDETECT0[21],LEVELDETECT0[21] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 20. "LEVELDETECT0[20],LEVELDETECT0[20] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "LEVELDETECT0[19],LEVELDETECT0[19] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 18. "LEVELDETECT0[18],LEVELDETECT0[18] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 17. "LEVELDETECT0[17],LEVELDETECT0[17] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "LEVELDETECT0[16],LEVELDETECT0[16] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 15. "LEVELDETECT0[15],LEVELDETECT0[15] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 14. "LEVELDETECT0[14],LEVELDETECT0[14] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 13. "LEVELDETECT0[13],LEVELDETECT0[13] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 12. "LEVELDETECT0[12],LEVELDETECT0[12] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 11. "LEVELDETECT0[11],LEVELDETECT0[11] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 10. "LEVELDETECT0[10],LEVELDETECT0[10] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 9. "LEVELDETECT0[9],LEVELDETECT0[9] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 8. "LEVELDETECT0[8],LEVELDETECT0[8] Low low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "LEVELDETECT0[7],LEVELDETECT0[7] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 6. "LEVELDETECT0[6],LEVELDETECT0[6] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 5. "LEVELDETECT0[5],LEVELDETECT0[5] Low low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "LEVELDETECT0[4],LEVELDETECT0[4] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 3. "LEVELDETECT0[3],LEVELDETECT0[3] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 2. "LEVELDETECT0[2],LEVELDETECT0[2] Low low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "LEVELDETECT0[1],LEVELDETECT0[1] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 0. "LEVELDETECT0[0],LEVELDETECT0[0] Low low level interrupt 31 enable" "Disabled,Enabled" group.long 0x140++0x03 line.long 0x00 "GPIO_LEVELDETECT1,High-level Detection To Be Used For The Interrupt Request Generation" bitfld.long 0x00 31. "LEVELDETECT0[31],LEVELDETECT0[31] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. "LEVELDETECT0[30],LEVELDETECT0[30] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 29. "LEVELDETECT0[29],LEVELDETECT0[29] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 28. "LEVELDETECT0[28],LEVELDETECT0[28] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 27. "LEVELDETECT0[27],LEVELDETECT0[27] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 26. "LEVELDETECT0[26],LEVELDETECT0[26] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 25. "LEVELDETECT0[25],LEVELDETECT0[25] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 24. "LEVELDETECT0[24],LEVELDETECT0[24] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 23. "LEVELDETECT0[23],LEVELDETECT0[23] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 22. "LEVELDETECT0[22],LEVELDETECT0[22] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 21. "LEVELDETECT0[21],LEVELDETECT0[21] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 20. "LEVELDETECT0[20],LEVELDETECT0[20] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "LEVELDETECT0[19],LEVELDETECT0[19] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 18. "LEVELDETECT0[18],LEVELDETECT0[18] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 17. "LEVELDETECT0[17],LEVELDETECT0[17] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "LEVELDETECT0[16],LEVELDETECT0[16] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 15. "LEVELDETECT0[15],LEVELDETECT0[15] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 14. "LEVELDETECT0[14],LEVELDETECT0[14] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 13. "LEVELDETECT0[13],LEVELDETECT0[13] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 12. "LEVELDETECT0[12],LEVELDETECT0[12] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 11. "LEVELDETECT0[11],LEVELDETECT0[11] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 10. "LEVELDETECT0[10],LEVELDETECT0[10] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 9. "LEVELDETECT0[9],LEVELDETECT0[9] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 8. "LEVELDETECT0[8],LEVELDETECT0[8] High low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "LEVELDETECT0[7],LEVELDETECT0[7] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 6. "LEVELDETECT0[6],LEVELDETECT0[6] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 5. "LEVELDETECT0[5],LEVELDETECT0[5] High low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "LEVELDETECT0[4],LEVELDETECT0[4] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 3. "LEVELDETECT0[3],LEVELDETECT0[3] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 2. "LEVELDETECT0[2],LEVELDETECT0[2] High low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "LEVELDETECT0[1],LEVELDETECT0[1] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 0. "LEVELDETECT0[0],LEVELDETECT0[0] High low level interrupt 31 enable" "Disabled,Enabled" group.long 0x148++0x07 line.long 0x00 "GPIO_RISINGDETECT,rising-edge Detection To Be Used For The Interrupt Request Generation" bitfld.long 0x00 31. "RISINGDETECT31,Rising edge interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. "RISINGDETECT30,Rising edge interrupt 30 enable" "Disabled,Enabled" bitfld.long 0x00 29. "RISINGDETECT29,Rising edge interrupt 29 enable" "Disabled,Enabled" newline bitfld.long 0x00 28. "RISINGDETECT28,Rising edge interrupt 28 enable" "Disabled,Enabled" bitfld.long 0x00 27. "RISINGDETECT27,Rising edge interrupt 27 enable" "Disabled,Enabled" bitfld.long 0x00 26. "RISINGDETECT26,Rising edge interrupt 26 enable" "Disabled,Enabled" newline bitfld.long 0x00 25. "RISINGDETECT25,Rising edge interrupt 25 enable" "Disabled,Enabled" bitfld.long 0x00 24. "RISINGDETECT24,Rising edge interrupt 24 enable" "Disabled,Enabled" bitfld.long 0x00 23. "RISINGDETECT23,Rising edge interrupt 23 enable" "Disabled,Enabled" newline bitfld.long 0x00 22. "RISINGDETECT22,Rising edge interrupt 22 enable" "Disabled,Enabled" bitfld.long 0x00 21. "RISINGDETECT21,Rising edge interrupt 21 enable" "Disabled,Enabled" bitfld.long 0x00 20. "RISINGDETECT20,Rising edge interrupt 20 enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "RISINGDETECT19,Rising edge interrupt 19 enable" "Disabled,Enabled" bitfld.long 0x00 18. "RISINGDETECT18,Rising edge interrupt 18 enable" "Disabled,Enabled" bitfld.long 0x00 17. "RISINGDETECT17,Rising edge interrupt 17 enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "RISINGDETECT16,Rising edge interrupt 16 enable" "Disabled,Enabled" bitfld.long 0x00 15. "RISINGDETECT15,Rising edge interrupt 15 enable" "Disabled,Enabled" bitfld.long 0x00 14. "RISINGDETECT14,Rising edge interrupt 14 enable" "Disabled,Enabled" newline bitfld.long 0x00 13. "RISINGDETECT13,Rising edge interrupt 13 enable" "Disabled,Enabled" bitfld.long 0x00 12. "RISINGDETECT12,Rising edge interrupt 12 enable" "Disabled,Enabled" bitfld.long 0x00 11. "RISINGDETECT11,Rising edge interrupt 11 enable" "Disabled,Enabled" newline bitfld.long 0x00 10. "RISINGDETECT10,Rising edge interrupt 10 enable" "Disabled,Enabled" bitfld.long 0x00 9. "RISINGDETECT9,Rising edge interrupt 9 enable" "Disabled,Enabled" bitfld.long 0x00 8. "RISINGDETECT8,Rising edge interrupt 8 enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "RISINGDETECT7,Rising edge interrupt 7 enable" "Disabled,Enabled" bitfld.long 0x00 6. "RISINGDETECT6,Rising edge interrupt 6 enable" "Disabled,Enabled" bitfld.long 0x00 5. "RISINGDETECT5,Rising edge interrupt 5 enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "RISINGDETECT4,Rising edge interrupt 4 enable" "Disabled,Enabled" bitfld.long 0x00 3. "RISINGDETECT3,Rising edge interrupt 3 enable" "Disabled,Enabled" bitfld.long 0x00 2. "RISINGDETECT2,Rising edge interrupt 2 enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "RISINGDETECT1,Rising edge interrupt 1 enable" "Disabled,Enabled" bitfld.long 0x00 0. "RISINGDETECT0,Rising edge interrupt 0 enable" "Disabled,Enabled" line.long 0x04 "GPIO_FALLINGDETECT,Falling-edge Detection To Be Used For The Interrupt Request Generation" bitfld.long 0x04 31. "FALLINGDETECT31,Falling-edge detection 31" "Disabled,Enabled" bitfld.long 0x04 30. "FALLINGDETECT30,Falling-edge detection 30" "Disabled,Enabled" bitfld.long 0x04 29. "FALLINGDETECT29,Falling-edge detection 29" "Disabled,Enabled" newline bitfld.long 0x04 28. "FALLINGDETECT28,Falling-edge detection 28" "Disabled,Enabled" bitfld.long 0x04 27. "FALLINGDETECT27,Falling-edge detection 27" "Disabled,Enabled" bitfld.long 0x04 26. "FALLINGDETECT26,Falling-edge detection 26" "Disabled,Enabled" newline bitfld.long 0x04 25. "FALLINGDETECT25,Falling-edge detection 25" "Disabled,Enabled" bitfld.long 0x04 24. "FALLINGDETECT24,Falling-edge detection 24" "Disabled,Enabled" bitfld.long 0x04 23. "FALLINGDETECT23,Falling-edge detection 23" "Disabled,Enabled" newline bitfld.long 0x04 22. "FALLINGDETECT22,Falling-edge detection 22" "Disabled,Enabled" bitfld.long 0x04 21. "FALLINGDETECT21,Falling-edge detection 21" "Disabled,Enabled" bitfld.long 0x04 20. "FALLINGDETECT20,Falling-edge detection 20" "Disabled,Enabled" newline bitfld.long 0x04 19. "FALLINGDETECT19,Falling-edge detection 19" "Disabled,Enabled" bitfld.long 0x04 18. "FALLINGDETECT18,Falling-edge detection 18" "Disabled,Enabled" bitfld.long 0x04 17. "FALLINGDETECT17,Falling-edge detection 17" "Disabled,Enabled" newline bitfld.long 0x04 16. "FALLINGDETECT16,Falling-edge detection 16" "Disabled,Enabled" bitfld.long 0x04 15. "FALLINGDETECT15,Falling-edge detection 15" "Disabled,Enabled" bitfld.long 0x04 14. "FALLINGDETECT14,Falling-edge detection 14" "Disabled,Enabled" newline bitfld.long 0x04 13. "FALLINGDETECT13,Falling-edge detection 13" "Disabled,Enabled" bitfld.long 0x04 12. "FALLINGDETECT12,Falling-edge detection 12" "Disabled,Enabled" bitfld.long 0x04 11. "FALLINGDETECT11,Falling-edge detection 11" "Disabled,Enabled" newline bitfld.long 0x04 10. "FALLINGDETECT10,Falling-edge detection 10" "Disabled,Enabled" bitfld.long 0x04 9. "FALLINGDETECT9,Falling-edge detection 9" "Disabled,Enabled" bitfld.long 0x04 8. "FALLINGDETECT8,Falling-edge detection 8" "Disabled,Enabled" newline bitfld.long 0x04 7. "FALLINGDETECT7,Falling-edge detection 7" "Disabled,Enabled" bitfld.long 0x04 6. "FALLINGDETECT6,Falling-edge detection 6" "Disabled,Enabled" bitfld.long 0x04 5. "FALLINGDETECT5,Falling-edge detection 5" "Disabled,Enabled" newline bitfld.long 0x04 4. "FALLINGDETECT4,Falling-edge detection 4" "Disabled,Enabled" bitfld.long 0x04 3. "FALLINGDETECT3,Falling-edge detection 3" "Disabled,Enabled" bitfld.long 0x04 2. "FALLINGDETECT2,Falling-edge detection 2" "Disabled,Enabled" newline bitfld.long 0x04 1. "FALLINGDETECT1,Falling-edge detection 1" "Disabled,Enabled" bitfld.long 0x04 0. "FALLINGDETECT0,Falling-edge detection 0" "Disabled,Enabled" group.long 0x150++0x07 line.long 0x00 "GPIO_DEBOUNCENABLE,Input Debounce Enable Register" bitfld.long 0x00 31. "DEBOUNCEENABLE[31],Input 31 debounce enable" "Disabled,Enabled" bitfld.long 0x00 30. "DEBOUNCEENABLE[30],Input 30 debounce enable" "Disabled,Enabled" bitfld.long 0x00 29. "DEBOUNCEENABLE[29],Input 29 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 28. "DEBOUNCEENABLE[28],Input 28 debounce enable" "Disabled,Enabled" bitfld.long 0x00 27. "DEBOUNCEENABLE[27],Input 27 debounce enable" "Disabled,Enabled" bitfld.long 0x00 26. "DEBOUNCEENABLE[26],Input 26 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 25. "DEBOUNCEENABLE[25],Input 25 debounce enable" "Disabled,Enabled" bitfld.long 0x00 24. "DEBOUNCEENABLE[24],Input 24 debounce enable" "Disabled,Enabled" bitfld.long 0x00 23. "DEBOUNCEENABLE[23],Input 23 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 22. "DEBOUNCEENABLE[22],Input 22 debounce enable" "Disabled,Enabled" bitfld.long 0x00 21. "DEBOUNCEENABLE[21],Input 21 debounce enable" "Disabled,Enabled" bitfld.long 0x00 20. "DEBOUNCEENABLE[20],Input 20 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "DEBOUNCEENABLE[19],Input 19 debounce enable" "Disabled,Enabled" bitfld.long 0x00 18. "DEBOUNCEENABLE[18],Input 18 debounce enable" "Disabled,Enabled" bitfld.long 0x00 17. "DEBOUNCEENABLE[17],Input 17 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "DEBOUNCEENABLE[16],Input 16 debounce enable" "Disabled,Enabled" bitfld.long 0x00 15. "DEBOUNCEENABLE[15],Input 15 debounce enable" "Disabled,Enabled" bitfld.long 0x00 14. "DEBOUNCEENABLE[14],Input 14 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 13. "DEBOUNCEENABLE[13],Input 13 debounce enable" "Disabled,Enabled" bitfld.long 0x00 12. "DEBOUNCEENABLE[12],Input 12 debounce enable" "Disabled,Enabled" bitfld.long 0x00 11. "DEBOUNCEENABLE[11],Input 11 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 10. "DEBOUNCEENABLE[10],Input 10 debounce enable" "Disabled,Enabled" bitfld.long 0x00 9. "DEBOUNCEENABLE[9],Input 9 debounce enable" "Disabled,Enabled" bitfld.long 0x00 8. "DEBOUNCEENABLE[8],Input 8 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "DEBOUNCEENABLE[7],Input 7 debounce enable" "Disabled,Enabled" bitfld.long 0x00 6. "DEBOUNCEENABLE[6],Input 6 debounce enable" "Disabled,Enabled" bitfld.long 0x00 5. "DEBOUNCEENABLE[5],Input 5 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "DEBOUNCEENABLE[4],Input 4 debounce enable" "Disabled,Enabled" bitfld.long 0x00 3. "DEBOUNCEENABLE[3],Input 3 debounce enable" "Disabled,Enabled" bitfld.long 0x00 2. "DEBOUNCEENABLE[2],Input 2 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "DEBOUNCEENABLE[1],Input 1 debounce enable" "Disabled,Enabled" bitfld.long 0x00 0. "DEBOUNCEENABLE[0],Input 0 debounce enable" "Disabled,Enabled" line.long 0x04 "GPIO_DEBOUNCINGTIME,GPIO Debouncing Time Register" hexmask.long.byte 0x04 0.--7. 1. "DEBOUNCETIME,Input debouncing value in 31 microsecond steps" tree.end tree "GPIO3" base ad:0x481AE000 rgroup.long 0x00++0x03 line.long 0x00 "GPIO_REVISION,GPIO Revision Register" bitfld.long 0x00 30.--31. "SCHEME,Used to distinguish between old scheme and current" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. "FUNC,Functional number" bitfld.long 0x00 11.--15. "RTL,RTL version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 8.--10. "MAJOR,Major revision" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "CUSTOM,Custom revision" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "MINOR,Minor revision" group.long 0x10++0x03 line.long 0x00 "GPIO_SYSCONFIG,GPIO Sysconfig Register" bitfld.long 0x00 3.--4. "IDLEMODE,Select IDLE mode" "Force-idle,No-idle,Smart-idle,?..." bitfld.long 0x00 2. "ENAWAKEUP,Wakeup enable" "Disabled,Enabled" bitfld.long 0x00 1. "SOFTRESET,Software reset mode" "Normal,Reset" newline bitfld.long 0x00 0. "AUTOIDLE,Internal interface clock gating strategy" "Free-running,Gated" group.long 0x20++0x03 line.long 0x00 "GPIO_EOI,GPIO_EOI Register Provides Software End Of Interrupt" bitfld.long 0x00 0. "DMAEVENT_ACK,DMA event completion acknowledgement" "Acknowledged,Not acknowledged" group.long 0x24++0x03 line.long 0x00 "GPIO_IRQSTATUS_RAW_0,Status Raw Register For Interrupt 0" bitfld.long 0x00 31. "INTLINE[31],Interrupt 31 status" "No effect,Triggered" bitfld.long 0x00 30. "INTLINE[30],Interrupt 30 status" "No effect,Triggered" bitfld.long 0x00 29. "INTLINE[29],Interrupt 29 status" "No effect,Triggered" newline bitfld.long 0x00 28. "INTLINE[28],Interrupt 28 status" "No effect,Triggered" bitfld.long 0x00 27. "INTLINE[27],Interrupt 27 status" "No effect,Triggered" bitfld.long 0x00 26. "INTLINE[26],Interrupt 26 status" "No effect,Triggered" newline bitfld.long 0x00 25. "INTLINE[25],Interrupt 25 status" "No effect,Triggered" bitfld.long 0x00 24. "INTLINE[24],Interrupt 24 status" "No effect,Triggered" bitfld.long 0x00 23. "INTLINE[23],Interrupt 23 status" "No effect,Triggered" newline bitfld.long 0x00 22. "INTLINE[22],Interrupt 22 status" "No effect,Triggered" bitfld.long 0x00 21. "INTLINE[21],Interrupt 21 status" "No effect,Triggered" bitfld.long 0x00 20. "INTLINE[20],Interrupt 20 status" "No effect,Triggered" newline bitfld.long 0x00 19. "INTLINE[19],Interrupt 19 status" "No effect,Triggered" bitfld.long 0x00 18. "INTLINE[18],Interrupt 18 status" "No effect,Triggered" bitfld.long 0x00 17. "INTLINE[17],Interrupt 17 status" "No effect,Triggered" newline bitfld.long 0x00 16. "INTLINE[16],Interrupt 16 status" "No effect,Triggered" bitfld.long 0x00 15. "INTLINE[15],Interrupt 15 status" "No effect,Triggered" bitfld.long 0x00 14. "INTLINE[14],Interrupt 14 status" "No effect,Triggered" newline bitfld.long 0x00 13. "INTLINE[13],Interrupt 13 status" "No effect,Triggered" bitfld.long 0x00 12. "INTLINE[12],Interrupt 12 status" "No effect,Triggered" bitfld.long 0x00 11. "INTLINE[11],Interrupt 11 status" "No effect,Triggered" newline bitfld.long 0x00 10. "INTLINE[10],Interrupt 10 status" "No effect,Triggered" bitfld.long 0x00 9. "INTLINE[9],Interrupt 9 status" "No effect,Triggered" bitfld.long 0x00 8. "INTLINE[8],Interrupt 8 status" "No effect,Triggered" newline bitfld.long 0x00 7. "INTLINE[7],Interrupt 7 status" "No effect,Triggered" bitfld.long 0x00 6. "INTLINE[6],Interrupt 6 status" "No effect,Triggered" bitfld.long 0x00 5. "INTLINE[5],Interrupt 5 status" "No effect,Triggered" newline bitfld.long 0x00 4. "INTLINE[4],Interrupt 4 status" "No effect,Triggered" bitfld.long 0x00 3. "INTLINE[3],Interrupt 3 status" "No effect,Triggered" bitfld.long 0x00 2. "INTLINE[2],Interrupt 2 status" "No effect,Triggered" newline bitfld.long 0x00 1. "INTLINE[1],Interrupt 1 status" "No effect,Triggered" bitfld.long 0x00 0. "INTLINE[0],Interrupt 0 status" "No effect,Triggered" group.long (0x24+0x08)++0x03 line.long 0x00 "GPIO_IRQSTATUS_0_SET/CLR,GPIO_IRQSTATUS_0 Register Provides Core Status Information For The Interrupt Handling" setclrfld.long 0x00 31. 0x08 31. 0x10 31. "INTLINE[31],Interrupt 31 status" "No effect,Triggered" setclrfld.long 0x00 30. 0x08 30. 0x10 30. "INTLINE[30],Interrupt 30 status" "No effect,Triggered" setclrfld.long 0x00 29. 0x08 29. 0x10 29. "INTLINE[29],Interrupt 29 status" "No effect,Triggered" newline setclrfld.long 0x00 28. 0x08 28. 0x10 28. "INTLINE[28],Interrupt 28 status" "No effect,Triggered" setclrfld.long 0x00 27. 0x08 27. 0x10 27. "INTLINE[27],Interrupt 27 status" "No effect,Triggered" setclrfld.long 0x00 26. 0x08 26. 0x10 26. "INTLINE[26],Interrupt 26 status" "No effect,Triggered" newline setclrfld.long 0x00 25. 0x08 25. 0x10 25. "INTLINE[25],Interrupt 25 status" "No effect,Triggered" setclrfld.long 0x00 24. 0x08 24. 0x10 24. "INTLINE[24],Interrupt 24 status" "No effect,Triggered" setclrfld.long 0x00 23. 0x08 23. 0x10 23. "INTLINE[23],Interrupt 23 status" "No effect,Triggered" newline setclrfld.long 0x00 22. 0x08 22. 0x10 22. "INTLINE[22],Interrupt 22 status" "No effect,Triggered" setclrfld.long 0x00 21. 0x08 21. 0x10 21. "INTLINE[21],Interrupt 21 status" "No effect,Triggered" setclrfld.long 0x00 20. 0x08 20. 0x10 20. "INTLINE[20],Interrupt 20 status" "No effect,Triggered" newline setclrfld.long 0x00 19. 0x08 19. 0x10 19. "INTLINE[19],Interrupt 19 status" "No effect,Triggered" setclrfld.long 0x00 18. 0x08 18. 0x10 18. "INTLINE[18],Interrupt 18 status" "No effect,Triggered" setclrfld.long 0x00 17. 0x08 17. 0x10 17. "INTLINE[17],Interrupt 17 status" "No effect,Triggered" newline setclrfld.long 0x00 16. 0x08 16. 0x10 16. "INTLINE[16],Interrupt 16 status" "No effect,Triggered" setclrfld.long 0x00 15. 0x08 15. 0x10 15. "INTLINE[15],Interrupt 15 status" "No effect,Triggered" setclrfld.long 0x00 14. 0x08 14. 0x10 14. "INTLINE[14],Interrupt 14 status" "No effect,Triggered" newline setclrfld.long 0x00 13. 0x08 13. 0x10 13. "INTLINE[13],Interrupt 13 status" "No effect,Triggered" setclrfld.long 0x00 12. 0x08 12. 0x10 12. "INTLINE[12],Interrupt 12 status" "No effect,Triggered" setclrfld.long 0x00 11. 0x08 11. 0x10 11. "INTLINE[11],Interrupt 11 status" "No effect,Triggered" newline setclrfld.long 0x00 10. 0x08 10. 0x10 10. "INTLINE[10],Interrupt 10 status" "No effect,Triggered" setclrfld.long 0x00 9. 0x08 9. 0x10 9. "INTLINE[9],Interrupt 9 status" "No effect,Triggered" setclrfld.long 0x00 8. 0x08 8. 0x10 8. "INTLINE[8],Interrupt 8 status" "No effect,Triggered" newline setclrfld.long 0x00 7. 0x08 7. 0x10 7. "INTLINE[7],Interrupt 7 status" "No effect,Triggered" setclrfld.long 0x00 6. 0x08 6. 0x10 6. "INTLINE[6],Interrupt 6 status" "No effect,Triggered" setclrfld.long 0x00 5. 0x08 5. 0x10 5. "INTLINE[5],Interrupt 5 status" "No effect,Triggered" newline setclrfld.long 0x00 4. 0x08 4. 0x10 4. "INTLINE[4],Interrupt 4 status" "No effect,Triggered" setclrfld.long 0x00 3. 0x08 3. 0x10 3. "INTLINE[3],Interrupt 3 status" "No effect,Triggered" setclrfld.long 0x00 2. 0x08 2. 0x10 2. "INTLINE[2],Interrupt 2 status" "No effect,Triggered" newline setclrfld.long 0x00 1. 0x08 1. 0x10 1. "INTLINE[1],Interrupt 1 status" "No effect,Triggered" setclrfld.long 0x00 0. 0x08 0. 0x10 0. "INTLINE[0],Interrupt 0 status" "No effect,Triggered" group.long (0x24+0x20)++0x03 line.long 0x00 "GPIO_IRQWAKEN_0,GPIO_IRQWAKEN_0 Per-event Wakeup Enable Vector Register" bitfld.long 0x00 31. "INTLINE[31],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 30. "INTLINE[30],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 29. "INTLINE[29],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 28. "INTLINE[28],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 27. "INTLINE[27],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 26. "INTLINE[26],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 25. "INTLINE[25],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 24. "INTLINE[24],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 23. "INTLINE[23],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 22. "INTLINE[22],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 21. "INTLINE[21],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 20. "INTLINE[20],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 19. "INTLINE[19],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 18. "INTLINE[18],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 17. "INTLINE[17],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 16. "INTLINE[16],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 15. "INTLINE[15],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 14. "INTLINE[14],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 13. "INTLINE[13],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 12. "INTLINE[12],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 11. "INTLINE[11],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 10. "INTLINE[10],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 9. "INTLINE[9],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 8. "INTLINE[8],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 7. "INTLINE[7],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 6. "INTLINE[6],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 5. "INTLINE[5],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 4. "INTLINE[4],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 3. "INTLINE[3],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 2. "INTLINE[2],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 1. "INTLINE[1],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 0. "INTLINE[0],Wakeup enable for interrupt line" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "GPIO_IRQSTATUS_RAW_1,Status Raw Register For Interrupt 1" bitfld.long 0x00 31. "INTLINE[31],Interrupt 31 status" "No effect,Triggered" bitfld.long 0x00 30. "INTLINE[30],Interrupt 30 status" "No effect,Triggered" bitfld.long 0x00 29. "INTLINE[29],Interrupt 29 status" "No effect,Triggered" newline bitfld.long 0x00 28. "INTLINE[28],Interrupt 28 status" "No effect,Triggered" bitfld.long 0x00 27. "INTLINE[27],Interrupt 27 status" "No effect,Triggered" bitfld.long 0x00 26. "INTLINE[26],Interrupt 26 status" "No effect,Triggered" newline bitfld.long 0x00 25. "INTLINE[25],Interrupt 25 status" "No effect,Triggered" bitfld.long 0x00 24. "INTLINE[24],Interrupt 24 status" "No effect,Triggered" bitfld.long 0x00 23. "INTLINE[23],Interrupt 23 status" "No effect,Triggered" newline bitfld.long 0x00 22. "INTLINE[22],Interrupt 22 status" "No effect,Triggered" bitfld.long 0x00 21. "INTLINE[21],Interrupt 21 status" "No effect,Triggered" bitfld.long 0x00 20. "INTLINE[20],Interrupt 20 status" "No effect,Triggered" newline bitfld.long 0x00 19. "INTLINE[19],Interrupt 19 status" "No effect,Triggered" bitfld.long 0x00 18. "INTLINE[18],Interrupt 18 status" "No effect,Triggered" bitfld.long 0x00 17. "INTLINE[17],Interrupt 17 status" "No effect,Triggered" newline bitfld.long 0x00 16. "INTLINE[16],Interrupt 16 status" "No effect,Triggered" bitfld.long 0x00 15. "INTLINE[15],Interrupt 15 status" "No effect,Triggered" bitfld.long 0x00 14. "INTLINE[14],Interrupt 14 status" "No effect,Triggered" newline bitfld.long 0x00 13. "INTLINE[13],Interrupt 13 status" "No effect,Triggered" bitfld.long 0x00 12. "INTLINE[12],Interrupt 12 status" "No effect,Triggered" bitfld.long 0x00 11. "INTLINE[11],Interrupt 11 status" "No effect,Triggered" newline bitfld.long 0x00 10. "INTLINE[10],Interrupt 10 status" "No effect,Triggered" bitfld.long 0x00 9. "INTLINE[9],Interrupt 9 status" "No effect,Triggered" bitfld.long 0x00 8. "INTLINE[8],Interrupt 8 status" "No effect,Triggered" newline bitfld.long 0x00 7. "INTLINE[7],Interrupt 7 status" "No effect,Triggered" bitfld.long 0x00 6. "INTLINE[6],Interrupt 6 status" "No effect,Triggered" bitfld.long 0x00 5. "INTLINE[5],Interrupt 5 status" "No effect,Triggered" newline bitfld.long 0x00 4. "INTLINE[4],Interrupt 4 status" "No effect,Triggered" bitfld.long 0x00 3. "INTLINE[3],Interrupt 3 status" "No effect,Triggered" bitfld.long 0x00 2. "INTLINE[2],Interrupt 2 status" "No effect,Triggered" newline bitfld.long 0x00 1. "INTLINE[1],Interrupt 1 status" "No effect,Triggered" bitfld.long 0x00 0. "INTLINE[0],Interrupt 0 status" "No effect,Triggered" group.long (0x28+0x08)++0x03 line.long 0x00 "GPIO_IRQSTATUS_1_SET/CLR,GPIO_IRQSTATUS_1 Register Provides Core Status Information For The Interrupt Handling" setclrfld.long 0x00 31. 0x08 31. 0x10 31. "INTLINE[31],Interrupt 31 status" "No effect,Triggered" setclrfld.long 0x00 30. 0x08 30. 0x10 30. "INTLINE[30],Interrupt 30 status" "No effect,Triggered" setclrfld.long 0x00 29. 0x08 29. 0x10 29. "INTLINE[29],Interrupt 29 status" "No effect,Triggered" newline setclrfld.long 0x00 28. 0x08 28. 0x10 28. "INTLINE[28],Interrupt 28 status" "No effect,Triggered" setclrfld.long 0x00 27. 0x08 27. 0x10 27. "INTLINE[27],Interrupt 27 status" "No effect,Triggered" setclrfld.long 0x00 26. 0x08 26. 0x10 26. "INTLINE[26],Interrupt 26 status" "No effect,Triggered" newline setclrfld.long 0x00 25. 0x08 25. 0x10 25. "INTLINE[25],Interrupt 25 status" "No effect,Triggered" setclrfld.long 0x00 24. 0x08 24. 0x10 24. "INTLINE[24],Interrupt 24 status" "No effect,Triggered" setclrfld.long 0x00 23. 0x08 23. 0x10 23. "INTLINE[23],Interrupt 23 status" "No effect,Triggered" newline setclrfld.long 0x00 22. 0x08 22. 0x10 22. "INTLINE[22],Interrupt 22 status" "No effect,Triggered" setclrfld.long 0x00 21. 0x08 21. 0x10 21. "INTLINE[21],Interrupt 21 status" "No effect,Triggered" setclrfld.long 0x00 20. 0x08 20. 0x10 20. "INTLINE[20],Interrupt 20 status" "No effect,Triggered" newline setclrfld.long 0x00 19. 0x08 19. 0x10 19. "INTLINE[19],Interrupt 19 status" "No effect,Triggered" setclrfld.long 0x00 18. 0x08 18. 0x10 18. "INTLINE[18],Interrupt 18 status" "No effect,Triggered" setclrfld.long 0x00 17. 0x08 17. 0x10 17. "INTLINE[17],Interrupt 17 status" "No effect,Triggered" newline setclrfld.long 0x00 16. 0x08 16. 0x10 16. "INTLINE[16],Interrupt 16 status" "No effect,Triggered" setclrfld.long 0x00 15. 0x08 15. 0x10 15. "INTLINE[15],Interrupt 15 status" "No effect,Triggered" setclrfld.long 0x00 14. 0x08 14. 0x10 14. "INTLINE[14],Interrupt 14 status" "No effect,Triggered" newline setclrfld.long 0x00 13. 0x08 13. 0x10 13. "INTLINE[13],Interrupt 13 status" "No effect,Triggered" setclrfld.long 0x00 12. 0x08 12. 0x10 12. "INTLINE[12],Interrupt 12 status" "No effect,Triggered" setclrfld.long 0x00 11. 0x08 11. 0x10 11. "INTLINE[11],Interrupt 11 status" "No effect,Triggered" newline setclrfld.long 0x00 10. 0x08 10. 0x10 10. "INTLINE[10],Interrupt 10 status" "No effect,Triggered" setclrfld.long 0x00 9. 0x08 9. 0x10 9. "INTLINE[9],Interrupt 9 status" "No effect,Triggered" setclrfld.long 0x00 8. 0x08 8. 0x10 8. "INTLINE[8],Interrupt 8 status" "No effect,Triggered" newline setclrfld.long 0x00 7. 0x08 7. 0x10 7. "INTLINE[7],Interrupt 7 status" "No effect,Triggered" setclrfld.long 0x00 6. 0x08 6. 0x10 6. "INTLINE[6],Interrupt 6 status" "No effect,Triggered" setclrfld.long 0x00 5. 0x08 5. 0x10 5. "INTLINE[5],Interrupt 5 status" "No effect,Triggered" newline setclrfld.long 0x00 4. 0x08 4. 0x10 4. "INTLINE[4],Interrupt 4 status" "No effect,Triggered" setclrfld.long 0x00 3. 0x08 3. 0x10 3. "INTLINE[3],Interrupt 3 status" "No effect,Triggered" setclrfld.long 0x00 2. 0x08 2. 0x10 2. "INTLINE[2],Interrupt 2 status" "No effect,Triggered" newline setclrfld.long 0x00 1. 0x08 1. 0x10 1. "INTLINE[1],Interrupt 1 status" "No effect,Triggered" setclrfld.long 0x00 0. 0x08 0. 0x10 0. "INTLINE[0],Interrupt 0 status" "No effect,Triggered" group.long (0x28+0x20)++0x03 line.long 0x00 "GPIO_IRQWAKEN_1,GPIO_IRQWAKEN_1 Per-event Wakeup Enable Vector Register" bitfld.long 0x00 31. "INTLINE[31],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 30. "INTLINE[30],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 29. "INTLINE[29],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 28. "INTLINE[28],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 27. "INTLINE[27],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 26. "INTLINE[26],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 25. "INTLINE[25],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 24. "INTLINE[24],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 23. "INTLINE[23],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 22. "INTLINE[22],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 21. "INTLINE[21],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 20. "INTLINE[20],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 19. "INTLINE[19],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 18. "INTLINE[18],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 17. "INTLINE[17],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 16. "INTLINE[16],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 15. "INTLINE[15],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 14. "INTLINE[14],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 13. "INTLINE[13],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 12. "INTLINE[12],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 11. "INTLINE[11],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 10. "INTLINE[10],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 9. "INTLINE[9],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 8. "INTLINE[8],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 7. "INTLINE[7],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 6. "INTLINE[6],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 5. "INTLINE[5],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 4. "INTLINE[4],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 3. "INTLINE[3],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 2. "INTLINE[2],Wakeup enable for interrupt line" "Disabled,Enabled" newline bitfld.long 0x00 1. "INTLINE[1],Wakeup enable for interrupt line" "Disabled,Enabled" bitfld.long 0x00 0. "INTLINE[0],Wakeup enable for interrupt line" "Disabled,Enabled" group.long 0x114++0x03 line.long 0x00 "GPIO_SYSSTATUS,System Status Register" bitfld.long 0x00 0. "RESETDONE,Reset status information" "On-going,Completed" group.long 0x130++0x07 line.long 0x00 "GPIO_CTRL,Module Control Register" bitfld.long 0x00 1.--2. "GATINGRATIO,Controls the clock gating for the event detection logic (Divider)" "/1,/2,/4,/8" bitfld.long 0x00 0. "DISABLEMODULE,Module disable" "No,Yes" line.long 0x04 "GPIO_OE,GPIO Output Enable Register" bitfld.long 0x04 31. "OUTPUTEN[31],GPIO 31 output data enable" "Output,Input" bitfld.long 0x04 30. "OUTPUTEN[30],GPIO 30 output data enable" "Output,Input" bitfld.long 0x04 29. "OUTPUTEN[29],GPIO 29 output data enable" "Output,Input" newline bitfld.long 0x04 28. "OUTPUTEN[28],GPIO 28 output data enable" "Output,Input" bitfld.long 0x04 27. "OUTPUTEN[27],GPIO 27 output data enable" "Output,Input" bitfld.long 0x04 26. "OUTPUTEN[26],GPIO 26 output data enable" "Output,Input" newline bitfld.long 0x04 25. "OUTPUTEN[25],GPIO 25 output data enable" "Output,Input" bitfld.long 0x04 24. "OUTPUTEN[24],GPIO 24 output data enable" "Output,Input" bitfld.long 0x04 23. "OUTPUTEN[23],GPIO 23 output data enable" "Output,Input" newline bitfld.long 0x04 22. "OUTPUTEN[22],GPIO 22 output data enable" "Output,Input" bitfld.long 0x04 21. "OUTPUTEN[21],GPIO 21 output data enable" "Output,Input" bitfld.long 0x04 20. "OUTPUTEN[20],GPIO 20 output data enable" "Output,Input" newline bitfld.long 0x04 19. "OUTPUTEN[19],GPIO 19 output data enable" "Output,Input" bitfld.long 0x04 18. "OUTPUTEN[18],GPIO 18 output data enable" "Output,Input" bitfld.long 0x04 17. "OUTPUTEN[17],GPIO 17 output data enable" "Output,Input" newline bitfld.long 0x04 16. "OUTPUTEN[16],GPIO 16 output data enable" "Output,Input" bitfld.long 0x04 15. "OUTPUTEN[15],GPIO 15 output data enable" "Output,Input" bitfld.long 0x04 14. "OUTPUTEN[14],GPIO 14 output data enable" "Output,Input" newline bitfld.long 0x04 13. "OUTPUTEN[13],GPIO 13 output data enable" "Output,Input" bitfld.long 0x04 12. "OUTPUTEN[12],GPIO 12 output data enable" "Output,Input" bitfld.long 0x04 11. "OUTPUTEN[11],GPIO 11 output data enable" "Output,Input" newline bitfld.long 0x04 10. "OUTPUTEN[10],GPIO 10 output data enable" "Output,Input" bitfld.long 0x04 9. "OUTPUTEN[9],GPIO 9 output data enable" "Output,Input" bitfld.long 0x04 8. "OUTPUTEN[8],GPIO 8 output data enable" "Output,Input" newline bitfld.long 0x04 7. "OUTPUTEN[7],GPIO 7 output data enable" "Output,Input" bitfld.long 0x04 6. "OUTPUTEN[6],GPIO 6 output data enable" "Output,Input" bitfld.long 0x04 5. "OUTPUTEN[5],GPIO 5 output data enable" "Output,Input" newline bitfld.long 0x04 4. "OUTPUTEN[4],GPIO 4 output data enable" "Output,Input" bitfld.long 0x04 3. "OUTPUTEN[3],GPIO 3 output data enable" "Output,Input" bitfld.long 0x04 2. "OUTPUTEN[2],GPIO 2 output data enable" "Output,Input" newline bitfld.long 0x04 1. "OUTPUTEN[1],GPIO 1 output data enable" "Output,Input" bitfld.long 0x04 0. "OUTPUTEN[0],GPIO 0 output data enable" "Output,Input" rgroup.long 0x138++0x03 line.long 0x00 "GPIO_DATAIN,Sampled Input Data" group.long 0x13C++0x03 line.long 0x00 "GPIO_DATAOUT_SET/CLR,Data To Set On Output Pins" setclrfld.long 0x00 31. 0x58 31. 0x54 31. "DATAOUT[31],Set/clear data 31 output register" "Set,Clear" setclrfld.long 0x00 30. 0x58 30. 0x54 30. "DATAOUT[30],Set/clear data 30 output register" "Set,Clear" setclrfld.long 0x00 29. 0x58 29. 0x54 29. "DATAOUT[29],Set/clear data 29 output register" "Set,Clear" newline setclrfld.long 0x00 28. 0x58 28. 0x54 28. "DATAOUT[28],Set/clear data 28 output register" "Set,Clear" setclrfld.long 0x00 27. 0x58 27. 0x54 27. "DATAOUT[27],Set/clear data 27 output register" "Set,Clear" setclrfld.long 0x00 26. 0x58 26. 0x54 26. "DATAOUT[26],Set/clear data 26 output register" "Set,Clear" newline setclrfld.long 0x00 25. 0x58 25. 0x54 25. "DATAOUT[25],Set/clear data 25 output register" "Set,Clear" setclrfld.long 0x00 24. 0x58 24. 0x54 24. "DATAOUT[24],Set/clear data 24 output register" "Set,Clear" setclrfld.long 0x00 23. 0x58 23. 0x54 23. "DATAOUT[23],Set/clear data 23 output register" "Set,Clear" newline setclrfld.long 0x00 22. 0x58 22. 0x54 22. "DATAOUT[22],Set/clear data 22 output register" "Set,Clear" setclrfld.long 0x00 21. 0x58 21. 0x54 21. "DATAOUT[21],Set/clear data 21 output register" "Set,Clear" setclrfld.long 0x00 20. 0x58 20. 0x54 20. "DATAOUT[20],Set/clear data 20 output register" "Set,Clear" newline setclrfld.long 0x00 19. 0x58 19. 0x54 19. "DATAOUT[19],Set/clear data output 19 register" "Set,Clear" setclrfld.long 0x00 18. 0x58 18. 0x54 18. "DATAOUT[18],Set/clear data 18 output register" "Set,Clear" setclrfld.long 0x00 17. 0x58 17. 0x54 17. "DATAOUT[17],Set/clear data 17 output register" "Set,Clear" newline setclrfld.long 0x00 16. 0x58 16. 0x54 16. "DATAOUT[16],Set/clear data 16 output register" "Set,Clear" setclrfld.long 0x00 15. 0x58 15. 0x54 15. "DATAOUT[15],Set/clear data 15 output register" "Set,Clear" setclrfld.long 0x00 14. 0x58 14. 0x54 14. "DATAOUT[14],Set/clear data 14 output register" "Set,Clear" newline setclrfld.long 0x00 13. 0x58 13. 0x54 13. "DATAOUT[13],Set/clear data 13 output register" "Set,Clear" setclrfld.long 0x00 12. 0x58 12. 0x54 12. "DATAOUT[12],Set/clear data 12 output register" "Set,Clear" setclrfld.long 0x00 11. 0x58 11. 0x54 11. "DATAOUT[11],Set/clear data 11 output register" "Set,Clear" newline setclrfld.long 0x00 10. 0x58 10. 0x54 10. "DATAOUT[10],Set/clear data 10 output register" "Set,Clear" setclrfld.long 0x00 9. 0x58 9. 0x54 9. "DATAOUT[9],Set/clear data output 9 register" "Set,Clear" setclrfld.long 0x00 8. 0x58 8. 0x54 8. "DATAOUT[8],Set/clear data 8 output register" "Set,Clear" newline setclrfld.long 0x00 7. 0x58 7. 0x54 7. "DATAOUT[7],Set/clear data 7 output register" "Set,Clear" setclrfld.long 0x00 6. 0x58 6. 0x54 6. "DATAOUT[6],Set/clear data 6 output register" "Set,Clear" setclrfld.long 0x00 5. 0x58 5. 0x54 5. "DATAOUT[5],Set/clear data 5 output register" "Set,Clear" newline setclrfld.long 0x00 4. 0x58 4. 0x54 4. "DATAOUT[4],Set/clear data 4 output register" "Set,Clear" setclrfld.long 0x00 3. 0x58 3. 0x54 3. "DATAOUT[3],Set/clear data 3 output register" "Set,Clear" setclrfld.long 0x00 2. 0x58 2. 0x54 2. "DATAOUT[2],Set/clear data 2 output register" "Set,Clear" newline setclrfld.long 0x00 1. 0x58 1. 0x54 1. "DATAOUT[1],Set/clear data 1 output register" "Set,Clear" setclrfld.long 0x00 0. 0x58 0. 0x54 0. "DATAOUT[0],Set/clear data 0 output register" "Set,Clear" group.long 0x13C++0x03 line.long 0x00 "GPIO_LEVELDETECT0,Low-level Detection To Be Used For The Interrupt Request Generation" bitfld.long 0x00 31. "LEVELDETECT0[31],LEVELDETECT0[31] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. "LEVELDETECT0[30],LEVELDETECT0[30] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 29. "LEVELDETECT0[29],LEVELDETECT0[29] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 28. "LEVELDETECT0[28],LEVELDETECT0[28] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 27. "LEVELDETECT0[27],LEVELDETECT0[27] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 26. "LEVELDETECT0[26],LEVELDETECT0[26] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 25. "LEVELDETECT0[25],LEVELDETECT0[25] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 24. "LEVELDETECT0[24],LEVELDETECT0[24] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 23. "LEVELDETECT0[23],LEVELDETECT0[23] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 22. "LEVELDETECT0[22],LEVELDETECT0[22] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 21. "LEVELDETECT0[21],LEVELDETECT0[21] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 20. "LEVELDETECT0[20],LEVELDETECT0[20] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "LEVELDETECT0[19],LEVELDETECT0[19] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 18. "LEVELDETECT0[18],LEVELDETECT0[18] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 17. "LEVELDETECT0[17],LEVELDETECT0[17] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "LEVELDETECT0[16],LEVELDETECT0[16] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 15. "LEVELDETECT0[15],LEVELDETECT0[15] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 14. "LEVELDETECT0[14],LEVELDETECT0[14] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 13. "LEVELDETECT0[13],LEVELDETECT0[13] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 12. "LEVELDETECT0[12],LEVELDETECT0[12] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 11. "LEVELDETECT0[11],LEVELDETECT0[11] Low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 10. "LEVELDETECT0[10],LEVELDETECT0[10] Low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 9. "LEVELDETECT0[9],LEVELDETECT0[9] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 8. "LEVELDETECT0[8],LEVELDETECT0[8] Low low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "LEVELDETECT0[7],LEVELDETECT0[7] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 6. "LEVELDETECT0[6],LEVELDETECT0[6] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 5. "LEVELDETECT0[5],LEVELDETECT0[5] Low low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "LEVELDETECT0[4],LEVELDETECT0[4] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 3. "LEVELDETECT0[3],LEVELDETECT0[3] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 2. "LEVELDETECT0[2],LEVELDETECT0[2] Low low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "LEVELDETECT0[1],LEVELDETECT0[1] Low low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 0. "LEVELDETECT0[0],LEVELDETECT0[0] Low low level interrupt 31 enable" "Disabled,Enabled" group.long 0x140++0x03 line.long 0x00 "GPIO_LEVELDETECT1,High-level Detection To Be Used For The Interrupt Request Generation" bitfld.long 0x00 31. "LEVELDETECT0[31],LEVELDETECT0[31] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. "LEVELDETECT0[30],LEVELDETECT0[30] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 29. "LEVELDETECT0[29],LEVELDETECT0[29] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 28. "LEVELDETECT0[28],LEVELDETECT0[28] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 27. "LEVELDETECT0[27],LEVELDETECT0[27] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 26. "LEVELDETECT0[26],LEVELDETECT0[26] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 25. "LEVELDETECT0[25],LEVELDETECT0[25] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 24. "LEVELDETECT0[24],LEVELDETECT0[24] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 23. "LEVELDETECT0[23],LEVELDETECT0[23] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 22. "LEVELDETECT0[22],LEVELDETECT0[22] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 21. "LEVELDETECT0[21],LEVELDETECT0[21] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 20. "LEVELDETECT0[20],LEVELDETECT0[20] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "LEVELDETECT0[19],LEVELDETECT0[19] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 18. "LEVELDETECT0[18],LEVELDETECT0[18] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 17. "LEVELDETECT0[17],LEVELDETECT0[17] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "LEVELDETECT0[16],LEVELDETECT0[16] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 15. "LEVELDETECT0[15],LEVELDETECT0[15] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 14. "LEVELDETECT0[14],LEVELDETECT0[14] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 13. "LEVELDETECT0[13],LEVELDETECT0[13] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 12. "LEVELDETECT0[12],LEVELDETECT0[12] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 11. "LEVELDETECT0[11],LEVELDETECT0[11] High level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 10. "LEVELDETECT0[10],LEVELDETECT0[10] High level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 9. "LEVELDETECT0[9],LEVELDETECT0[9] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 8. "LEVELDETECT0[8],LEVELDETECT0[8] High low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "LEVELDETECT0[7],LEVELDETECT0[7] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 6. "LEVELDETECT0[6],LEVELDETECT0[6] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 5. "LEVELDETECT0[5],LEVELDETECT0[5] High low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "LEVELDETECT0[4],LEVELDETECT0[4] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 3. "LEVELDETECT0[3],LEVELDETECT0[3] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 2. "LEVELDETECT0[2],LEVELDETECT0[2] High low level interrupt 31 enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "LEVELDETECT0[1],LEVELDETECT0[1] High low level interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 0. "LEVELDETECT0[0],LEVELDETECT0[0] High low level interrupt 31 enable" "Disabled,Enabled" group.long 0x148++0x07 line.long 0x00 "GPIO_RISINGDETECT,rising-edge Detection To Be Used For The Interrupt Request Generation" bitfld.long 0x00 31. "RISINGDETECT31,Rising edge interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. "RISINGDETECT30,Rising edge interrupt 30 enable" "Disabled,Enabled" bitfld.long 0x00 29. "RISINGDETECT29,Rising edge interrupt 29 enable" "Disabled,Enabled" newline bitfld.long 0x00 28. "RISINGDETECT28,Rising edge interrupt 28 enable" "Disabled,Enabled" bitfld.long 0x00 27. "RISINGDETECT27,Rising edge interrupt 27 enable" "Disabled,Enabled" bitfld.long 0x00 26. "RISINGDETECT26,Rising edge interrupt 26 enable" "Disabled,Enabled" newline bitfld.long 0x00 25. "RISINGDETECT25,Rising edge interrupt 25 enable" "Disabled,Enabled" bitfld.long 0x00 24. "RISINGDETECT24,Rising edge interrupt 24 enable" "Disabled,Enabled" bitfld.long 0x00 23. "RISINGDETECT23,Rising edge interrupt 23 enable" "Disabled,Enabled" newline bitfld.long 0x00 22. "RISINGDETECT22,Rising edge interrupt 22 enable" "Disabled,Enabled" bitfld.long 0x00 21. "RISINGDETECT21,Rising edge interrupt 21 enable" "Disabled,Enabled" bitfld.long 0x00 20. "RISINGDETECT20,Rising edge interrupt 20 enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "RISINGDETECT19,Rising edge interrupt 19 enable" "Disabled,Enabled" bitfld.long 0x00 18. "RISINGDETECT18,Rising edge interrupt 18 enable" "Disabled,Enabled" bitfld.long 0x00 17. "RISINGDETECT17,Rising edge interrupt 17 enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "RISINGDETECT16,Rising edge interrupt 16 enable" "Disabled,Enabled" bitfld.long 0x00 15. "RISINGDETECT15,Rising edge interrupt 15 enable" "Disabled,Enabled" bitfld.long 0x00 14. "RISINGDETECT14,Rising edge interrupt 14 enable" "Disabled,Enabled" newline bitfld.long 0x00 13. "RISINGDETECT13,Rising edge interrupt 13 enable" "Disabled,Enabled" bitfld.long 0x00 12. "RISINGDETECT12,Rising edge interrupt 12 enable" "Disabled,Enabled" bitfld.long 0x00 11. "RISINGDETECT11,Rising edge interrupt 11 enable" "Disabled,Enabled" newline bitfld.long 0x00 10. "RISINGDETECT10,Rising edge interrupt 10 enable" "Disabled,Enabled" bitfld.long 0x00 9. "RISINGDETECT9,Rising edge interrupt 9 enable" "Disabled,Enabled" bitfld.long 0x00 8. "RISINGDETECT8,Rising edge interrupt 8 enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "RISINGDETECT7,Rising edge interrupt 7 enable" "Disabled,Enabled" bitfld.long 0x00 6. "RISINGDETECT6,Rising edge interrupt 6 enable" "Disabled,Enabled" bitfld.long 0x00 5. "RISINGDETECT5,Rising edge interrupt 5 enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "RISINGDETECT4,Rising edge interrupt 4 enable" "Disabled,Enabled" bitfld.long 0x00 3. "RISINGDETECT3,Rising edge interrupt 3 enable" "Disabled,Enabled" bitfld.long 0x00 2. "RISINGDETECT2,Rising edge interrupt 2 enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "RISINGDETECT1,Rising edge interrupt 1 enable" "Disabled,Enabled" bitfld.long 0x00 0. "RISINGDETECT0,Rising edge interrupt 0 enable" "Disabled,Enabled" line.long 0x04 "GPIO_FALLINGDETECT,Falling-edge Detection To Be Used For The Interrupt Request Generation" bitfld.long 0x04 31. "FALLINGDETECT31,Falling-edge detection 31" "Disabled,Enabled" bitfld.long 0x04 30. "FALLINGDETECT30,Falling-edge detection 30" "Disabled,Enabled" bitfld.long 0x04 29. "FALLINGDETECT29,Falling-edge detection 29" "Disabled,Enabled" newline bitfld.long 0x04 28. "FALLINGDETECT28,Falling-edge detection 28" "Disabled,Enabled" bitfld.long 0x04 27. "FALLINGDETECT27,Falling-edge detection 27" "Disabled,Enabled" bitfld.long 0x04 26. "FALLINGDETECT26,Falling-edge detection 26" "Disabled,Enabled" newline bitfld.long 0x04 25. "FALLINGDETECT25,Falling-edge detection 25" "Disabled,Enabled" bitfld.long 0x04 24. "FALLINGDETECT24,Falling-edge detection 24" "Disabled,Enabled" bitfld.long 0x04 23. "FALLINGDETECT23,Falling-edge detection 23" "Disabled,Enabled" newline bitfld.long 0x04 22. "FALLINGDETECT22,Falling-edge detection 22" "Disabled,Enabled" bitfld.long 0x04 21. "FALLINGDETECT21,Falling-edge detection 21" "Disabled,Enabled" bitfld.long 0x04 20. "FALLINGDETECT20,Falling-edge detection 20" "Disabled,Enabled" newline bitfld.long 0x04 19. "FALLINGDETECT19,Falling-edge detection 19" "Disabled,Enabled" bitfld.long 0x04 18. "FALLINGDETECT18,Falling-edge detection 18" "Disabled,Enabled" bitfld.long 0x04 17. "FALLINGDETECT17,Falling-edge detection 17" "Disabled,Enabled" newline bitfld.long 0x04 16. "FALLINGDETECT16,Falling-edge detection 16" "Disabled,Enabled" bitfld.long 0x04 15. "FALLINGDETECT15,Falling-edge detection 15" "Disabled,Enabled" bitfld.long 0x04 14. "FALLINGDETECT14,Falling-edge detection 14" "Disabled,Enabled" newline bitfld.long 0x04 13. "FALLINGDETECT13,Falling-edge detection 13" "Disabled,Enabled" bitfld.long 0x04 12. "FALLINGDETECT12,Falling-edge detection 12" "Disabled,Enabled" bitfld.long 0x04 11. "FALLINGDETECT11,Falling-edge detection 11" "Disabled,Enabled" newline bitfld.long 0x04 10. "FALLINGDETECT10,Falling-edge detection 10" "Disabled,Enabled" bitfld.long 0x04 9. "FALLINGDETECT9,Falling-edge detection 9" "Disabled,Enabled" bitfld.long 0x04 8. "FALLINGDETECT8,Falling-edge detection 8" "Disabled,Enabled" newline bitfld.long 0x04 7. "FALLINGDETECT7,Falling-edge detection 7" "Disabled,Enabled" bitfld.long 0x04 6. "FALLINGDETECT6,Falling-edge detection 6" "Disabled,Enabled" bitfld.long 0x04 5. "FALLINGDETECT5,Falling-edge detection 5" "Disabled,Enabled" newline bitfld.long 0x04 4. "FALLINGDETECT4,Falling-edge detection 4" "Disabled,Enabled" bitfld.long 0x04 3. "FALLINGDETECT3,Falling-edge detection 3" "Disabled,Enabled" bitfld.long 0x04 2. "FALLINGDETECT2,Falling-edge detection 2" "Disabled,Enabled" newline bitfld.long 0x04 1. "FALLINGDETECT1,Falling-edge detection 1" "Disabled,Enabled" bitfld.long 0x04 0. "FALLINGDETECT0,Falling-edge detection 0" "Disabled,Enabled" group.long 0x150++0x07 line.long 0x00 "GPIO_DEBOUNCENABLE,Input Debounce Enable Register" bitfld.long 0x00 31. "DEBOUNCEENABLE[31],Input 31 debounce enable" "Disabled,Enabled" bitfld.long 0x00 30. "DEBOUNCEENABLE[30],Input 30 debounce enable" "Disabled,Enabled" bitfld.long 0x00 29. "DEBOUNCEENABLE[29],Input 29 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 28. "DEBOUNCEENABLE[28],Input 28 debounce enable" "Disabled,Enabled" bitfld.long 0x00 27. "DEBOUNCEENABLE[27],Input 27 debounce enable" "Disabled,Enabled" bitfld.long 0x00 26. "DEBOUNCEENABLE[26],Input 26 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 25. "DEBOUNCEENABLE[25],Input 25 debounce enable" "Disabled,Enabled" bitfld.long 0x00 24. "DEBOUNCEENABLE[24],Input 24 debounce enable" "Disabled,Enabled" bitfld.long 0x00 23. "DEBOUNCEENABLE[23],Input 23 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 22. "DEBOUNCEENABLE[22],Input 22 debounce enable" "Disabled,Enabled" bitfld.long 0x00 21. "DEBOUNCEENABLE[21],Input 21 debounce enable" "Disabled,Enabled" bitfld.long 0x00 20. "DEBOUNCEENABLE[20],Input 20 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "DEBOUNCEENABLE[19],Input 19 debounce enable" "Disabled,Enabled" bitfld.long 0x00 18. "DEBOUNCEENABLE[18],Input 18 debounce enable" "Disabled,Enabled" bitfld.long 0x00 17. "DEBOUNCEENABLE[17],Input 17 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "DEBOUNCEENABLE[16],Input 16 debounce enable" "Disabled,Enabled" bitfld.long 0x00 15. "DEBOUNCEENABLE[15],Input 15 debounce enable" "Disabled,Enabled" bitfld.long 0x00 14. "DEBOUNCEENABLE[14],Input 14 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 13. "DEBOUNCEENABLE[13],Input 13 debounce enable" "Disabled,Enabled" bitfld.long 0x00 12. "DEBOUNCEENABLE[12],Input 12 debounce enable" "Disabled,Enabled" bitfld.long 0x00 11. "DEBOUNCEENABLE[11],Input 11 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 10. "DEBOUNCEENABLE[10],Input 10 debounce enable" "Disabled,Enabled" bitfld.long 0x00 9. "DEBOUNCEENABLE[9],Input 9 debounce enable" "Disabled,Enabled" bitfld.long 0x00 8. "DEBOUNCEENABLE[8],Input 8 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "DEBOUNCEENABLE[7],Input 7 debounce enable" "Disabled,Enabled" bitfld.long 0x00 6. "DEBOUNCEENABLE[6],Input 6 debounce enable" "Disabled,Enabled" bitfld.long 0x00 5. "DEBOUNCEENABLE[5],Input 5 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "DEBOUNCEENABLE[4],Input 4 debounce enable" "Disabled,Enabled" bitfld.long 0x00 3. "DEBOUNCEENABLE[3],Input 3 debounce enable" "Disabled,Enabled" bitfld.long 0x00 2. "DEBOUNCEENABLE[2],Input 2 debounce enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "DEBOUNCEENABLE[1],Input 1 debounce enable" "Disabled,Enabled" bitfld.long 0x00 0. "DEBOUNCEENABLE[0],Input 0 debounce enable" "Disabled,Enabled" line.long 0x04 "GPIO_DEBOUNCINGTIME,GPIO Debouncing Time Register" hexmask.long.byte 0x04 0.--7. 1. "DEBOUNCETIME,Input debouncing value in 31 microsecond steps" tree.end tree.end tree "Debug Subsystem" tree "DebugSS_DRM (Debug Resource Manager)" base ad:0x4B160000 if (((d.b(ad:0x4B160000+0x200))&0x09)==0x01) group.byte 0x200++0x00 line.byte 0x00 "WATCHDOG_TIMER_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x200))&0x08)==0x08) group.byte 0x200++0x00 line.byte 0x00 "WATCHDOG_TIMER_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x200++0x00 line.byte 0x00 "WATCHDOG_TIMER_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x204))&0x09)==0x01) group.byte 0x204++0x00 line.byte 0x00 "DMTIMER_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x204))&0x08)==0x08) group.byte 0x204++0x00 line.byte 0x00 "DMTIMER_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x204++0x00 line.byte 0x00 "DMTIMER_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x208))&0x09)==0x01) group.byte 0x208++0x00 line.byte 0x00 "DMTIMER_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x208))&0x08)==0x08) group.byte 0x208++0x00 line.byte 0x00 "DMTIMER_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x208++0x00 line.byte 0x00 "DMTIMER_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x20C))&0x09)==0x01) group.byte 0x20C++0x00 line.byte 0x00 "DMTIMER_2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x20C))&0x08)==0x08) group.byte 0x20C++0x00 line.byte 0x00 "DMTIMER_2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x20C++0x00 line.byte 0x00 "DMTIMER_2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x210))&0x09)==0x01) group.byte 0x210++0x00 line.byte 0x00 "DMTIMER_3_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x210))&0x08)==0x08) group.byte 0x210++0x00 line.byte 0x00 "DMTIMER_3_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x210++0x00 line.byte 0x00 "DMTIMER_3_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x214))&0x09)==0x01) group.byte 0x214++0x00 line.byte 0x00 "DMTIMER_4_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x214))&0x08)==0x08) group.byte 0x214++0x00 line.byte 0x00 "DMTIMER_4_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x214++0x00 line.byte 0x00 "DMTIMER_4_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x218))&0x09)==0x01) group.byte 0x218++0x00 line.byte 0x00 "DMTIMER_5_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x218))&0x08)==0x08) group.byte 0x218++0x00 line.byte 0x00 "DMTIMER_5_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x218++0x00 line.byte 0x00 "DMTIMER_5_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x21C))&0x09)==0x01) group.byte 0x21C++0x00 line.byte 0x00 "DMTIMER_6_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x21C))&0x08)==0x08) group.byte 0x21C++0x00 line.byte 0x00 "DMTIMER_6_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x21C++0x00 line.byte 0x00 "DMTIMER_6_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x220))&0x09)==0x01) group.byte 0x220++0x00 line.byte 0x00 "EMAC_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x220))&0x08)==0x08) group.byte 0x220++0x00 line.byte 0x00 "EMAC_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x220++0x00 line.byte 0x00 "EMAC_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x224))&0x09)==0x01) group.byte 0x224++0x00 line.byte 0x00 "USB2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x224))&0x08)==0x08) group.byte 0x224++0x00 line.byte 0x00 "USB2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x224++0x00 line.byte 0x00 "USB2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x228))&0x09)==0x01) group.byte 0x228++0x00 line.byte 0x00 "I2C_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x228))&0x08)==0x08) group.byte 0x228++0x00 line.byte 0x00 "I2C_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x228++0x00 line.byte 0x00 "I2C_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x22C))&0x09)==0x01) group.byte 0x22C++0x00 line.byte 0x00 "I2C_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x22C))&0x08)==0x08) group.byte 0x22C++0x00 line.byte 0x00 "I2C_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x22C++0x00 line.byte 0x00 "I2C_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x230))&0x09)==0x01) group.byte 0x230++0x00 line.byte 0x00 "I2C_2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x230))&0x08)==0x08) group.byte 0x230++0x00 line.byte 0x00 "I2C_2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x230++0x00 line.byte 0x00 "I2C_2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x234))&0x09)==0x01) group.byte 0x234++0x00 line.byte 0x00 "EHRPWM_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x234))&0x08)==0x08) group.byte 0x234++0x00 line.byte 0x00 "EHRPWM_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x234++0x00 line.byte 0x00 "EHRPWM_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x238))&0x09)==0x01) group.byte 0x238++0x00 line.byte 0x00 "EHRPWM_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x238))&0x08)==0x08) group.byte 0x238++0x00 line.byte 0x00 "EHRPWM_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x238++0x00 line.byte 0x00 "EHRPWM_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x23C))&0x09)==0x01) group.byte 0x23C++0x00 line.byte 0x00 "EHRPWM_2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x23C))&0x08)==0x08) group.byte 0x23C++0x00 line.byte 0x00 "EHRPWM_2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x23C++0x00 line.byte 0x00 "EHRPWM_2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x240))&0x09)==0x01) group.byte 0x240++0x00 line.byte 0x00 "CAN_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x240))&0x08)==0x08) group.byte 0x240++0x00 line.byte 0x00 "CAN_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x240++0x00 line.byte 0x00 "CAN_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x244))&0x09)==0x01) group.byte 0x244++0x00 line.byte 0x00 "CAN_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x244))&0x08)==0x08) group.byte 0x244++0x00 line.byte 0x00 "CAN_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x244++0x00 line.byte 0x00 "CAN_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x248))&0x09)==0x01) group.byte 0x248++0x00 line.byte 0x00 "PRU_ICSS_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x248))&0x08)==0x08) group.byte 0x248++0x00 line.byte 0x00 "PRU_ICSS_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x248++0x00 line.byte 0x00 "PRU_ICSS_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x24C))&0x09)==0x01) group.byte 0x24C++0x00 line.byte 0x00 "DMTIMER_7_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x24C))&0x08)==0x08) group.byte 0x24C++0x00 line.byte 0x00 "DMTIMER_7_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x24C++0x00 line.byte 0x00 "DMTIMER_7_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B160000+0x260))&0x09)==0x01) group.byte 0x260++0x00 line.byte 0x00 "DMTIMER_7_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B160000+0x200))&0x08)==0x08) group.byte 0x260++0x00 line.byte 0x00 "DMTIMER_7_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x260++0x00 line.byte 0x00 "DMTIMER_7_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif tree.end tree "DebugSS_ETB (Embedded Trace Buffer)" base ad:0x4B162000 if (((d.b(ad:0x4B162000+0x200))&0x09)==0x01) group.byte 0x200++0x00 line.byte 0x00 "WATCHDOG_TIMER_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x200))&0x08)==0x08) group.byte 0x200++0x00 line.byte 0x00 "WATCHDOG_TIMER_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x200++0x00 line.byte 0x00 "WATCHDOG_TIMER_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x204))&0x09)==0x01) group.byte 0x204++0x00 line.byte 0x00 "DMTIMER_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x204))&0x08)==0x08) group.byte 0x204++0x00 line.byte 0x00 "DMTIMER_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x204++0x00 line.byte 0x00 "DMTIMER_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x208))&0x09)==0x01) group.byte 0x208++0x00 line.byte 0x00 "DMTIMER_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x208))&0x08)==0x08) group.byte 0x208++0x00 line.byte 0x00 "DMTIMER_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x208++0x00 line.byte 0x00 "DMTIMER_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x20C))&0x09)==0x01) group.byte 0x20C++0x00 line.byte 0x00 "DMTIMER_2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x20C))&0x08)==0x08) group.byte 0x20C++0x00 line.byte 0x00 "DMTIMER_2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x20C++0x00 line.byte 0x00 "DMTIMER_2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x210))&0x09)==0x01) group.byte 0x210++0x00 line.byte 0x00 "DMTIMER_3_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x210))&0x08)==0x08) group.byte 0x210++0x00 line.byte 0x00 "DMTIMER_3_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x210++0x00 line.byte 0x00 "DMTIMER_3_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x214))&0x09)==0x01) group.byte 0x214++0x00 line.byte 0x00 "DMTIMER_4_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x214))&0x08)==0x08) group.byte 0x214++0x00 line.byte 0x00 "DMTIMER_4_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x214++0x00 line.byte 0x00 "DMTIMER_4_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x218))&0x09)==0x01) group.byte 0x218++0x00 line.byte 0x00 "DMTIMER_5_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x218))&0x08)==0x08) group.byte 0x218++0x00 line.byte 0x00 "DMTIMER_5_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x218++0x00 line.byte 0x00 "DMTIMER_5_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x21C))&0x09)==0x01) group.byte 0x21C++0x00 line.byte 0x00 "DMTIMER_6_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x21C))&0x08)==0x08) group.byte 0x21C++0x00 line.byte 0x00 "DMTIMER_6_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x21C++0x00 line.byte 0x00 "DMTIMER_6_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x220))&0x09)==0x01) group.byte 0x220++0x00 line.byte 0x00 "EMAC_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x220))&0x08)==0x08) group.byte 0x220++0x00 line.byte 0x00 "EMAC_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x220++0x00 line.byte 0x00 "EMAC_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x224))&0x09)==0x01) group.byte 0x224++0x00 line.byte 0x00 "USB2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x224))&0x08)==0x08) group.byte 0x224++0x00 line.byte 0x00 "USB2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x224++0x00 line.byte 0x00 "USB2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x228))&0x09)==0x01) group.byte 0x228++0x00 line.byte 0x00 "I2C_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x228))&0x08)==0x08) group.byte 0x228++0x00 line.byte 0x00 "I2C_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x228++0x00 line.byte 0x00 "I2C_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x22C))&0x09)==0x01) group.byte 0x22C++0x00 line.byte 0x00 "I2C_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x22C))&0x08)==0x08) group.byte 0x22C++0x00 line.byte 0x00 "I2C_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x22C++0x00 line.byte 0x00 "I2C_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x230))&0x09)==0x01) group.byte 0x230++0x00 line.byte 0x00 "I2C_2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x230))&0x08)==0x08) group.byte 0x230++0x00 line.byte 0x00 "I2C_2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x230++0x00 line.byte 0x00 "I2C_2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x234))&0x09)==0x01) group.byte 0x234++0x00 line.byte 0x00 "EHRPWM_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x234))&0x08)==0x08) group.byte 0x234++0x00 line.byte 0x00 "EHRPWM_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x234++0x00 line.byte 0x00 "EHRPWM_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x238))&0x09)==0x01) group.byte 0x238++0x00 line.byte 0x00 "EHRPWM_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x238))&0x08)==0x08) group.byte 0x238++0x00 line.byte 0x00 "EHRPWM_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x238++0x00 line.byte 0x00 "EHRPWM_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x23C))&0x09)==0x01) group.byte 0x23C++0x00 line.byte 0x00 "EHRPWM_2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x23C))&0x08)==0x08) group.byte 0x23C++0x00 line.byte 0x00 "EHRPWM_2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x23C++0x00 line.byte 0x00 "EHRPWM_2_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x240))&0x09)==0x01) group.byte 0x240++0x00 line.byte 0x00 "CAN_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x240))&0x08)==0x08) group.byte 0x240++0x00 line.byte 0x00 "CAN_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x240++0x00 line.byte 0x00 "CAN_0_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x244))&0x09)==0x01) group.byte 0x244++0x00 line.byte 0x00 "CAN_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x244))&0x08)==0x08) group.byte 0x244++0x00 line.byte 0x00 "CAN_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x244++0x00 line.byte 0x00 "CAN_1_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x248))&0x09)==0x01) group.byte 0x248++0x00 line.byte 0x00 "PRU_ICSS_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x248))&0x08)==0x08) group.byte 0x248++0x00 line.byte 0x00 "PRU_ICSS_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x248++0x00 line.byte 0x00 "PRU_ICSS_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x24C))&0x09)==0x01) group.byte 0x24C++0x00 line.byte 0x00 "DMTIMER_7_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x24C))&0x08)==0x08) group.byte 0x24C++0x00 line.byte 0x00 "DMTIMER_7_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x24C++0x00 line.byte 0x00 "DMTIMER_7_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif if (((d.b(ad:0x4B162000+0x260))&0x09)==0x01) group.byte 0x260++0x00 line.byte 0x00 "DMTIMER_7_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 4.--7. "SUSPEND_SEL,Suspend signal selection" "Cortex-A8,?..." newline bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" elif (((d.b(ad:0x4B162000+0x200))&0x08)==0x08) group.byte 0x260++0x00 line.byte 0x00 "DMTIMER_7_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" else group.byte 0x260++0x00 line.byte 0x00 "DMTIMER_7_SUSPEND_CONTROL,Watchdog Timer Suspend Control Register" bitfld.byte 0x00 3. "SUSPEND_DEFAULT_OVERRIDE,Override value in SUSPEND_SEL disable" "No,Yes" newline bitfld.byte 0x00 0. "SENSCTRL,Sensitivity Control for suspend signals" "Not sensitive,Sensitive" endif tree.end tree.end endif autoindent.off newline