; -------------------------------------------------------------------------------- ; @Title: ARM720T on chip peripherals ; @Props: ; @Author: - ; @Changelog: ; @Manufacturer: ; @Doc: ; @Core: ; @Chiplist: ARM720T, ARM720TR4 ; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: pera720t.per 16305 2023-06-28 11:47:37Z pegold $ config 16. 8. width 8. ASSERT VERSION.BUILD.BASE()>=80109. sif PER.isNOTIFICATION() base AVM:0x00000000 wgroup AVM:0x00++0 textline " Peripheral File Notification - " button "show missing files" "DIALOG.MESSAGE ""Please check your installation for the possibly missing files:""+CONV.CHAR(0xa)+PER.NOTIFICATION.MISSINGFILES()" textline " ---------------------------------------------------------------" textline " The peripheral file for this SoC cannot be displayed. " textline " Possible reasons are: " textline " - it is missing in the local installation or under development " textline " - it is confidential " textline " " textline " As fallback only the core registers are shown. " textline " Please check www.lauterbach.com/scripts.html " textline " or contact support@lauterbach.com . " textline " " endif ;begin include file arm/mmu720.ph ;parameters: group c15:0x0--0x0 "CP15" line.long 0x0 "ID,ID Register" group c15:0x1--0x1 line.long 0x0 "CR,Control Register" bitfld.long 0x0 0x9 " R ,ROM Protection" "off,on" bitfld.long 0x0 0x8 " S ,System Protection" "off,on" bitfld.long 0x0 0x7 " B ,Endianism" "little,big" textline " " bitfld.long 0x0 0x3 "W ,Write Buffer" "disable,enable" bitfld.long 0x0 0x2 " C ,Cache" "disable,enable" bitfld.long 0x0 0x1 " A ,Alignment Fault" "disable,enable" bitfld.long 0x0 0x0 " M ,MMU" "disable,enable" group c15:0x2--0x2 line.long 0x0 "TTB,Translation Table Base Register" hexmask.long 0x0 14.--31. 0x4000 "TTBA ,Translation Table Base Address" group c15:0x3--0x3 line.long 0x0 "DAC,Domain Access Control Register" bitfld.long 0x0 30.--31. "D15 ,Domain Access 15" "no access,client,reserved,manager" bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "no access,client,reserved,manager" bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "no access,client,reserved,manager" bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "no access,client,reserved,manager" textline " " bitfld.long 0x0 22.--23. "D11 ,Domain Access 11" "no access,client,reserved,manager" bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "no access,client,reserved,manager" bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "no access,client,reserved,manager" bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "no access,client,reserved,manager" textline " " bitfld.long 0x0 14.--15. "D7 ,Domain Access 7" "no access,client,reserved,manager" bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "no access,client,reserved,manager" bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "no access,client,reserved,manager" bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "no access,client,reserved,manager" textline " " bitfld.long 0x0 6.--7. "D3 ,Domain Access 3" "no access,client,reserved,manager" bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "no access,client,reserved,manager" bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "no access,client,reserved,manager" bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "no access,client,reserved,manager" group c15:0x5--0x5 line.long 0x0 "FS,Fault Status Register" bitfld.long 0x0 0x4--0x7 "DOM ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0x0--0x3 " STA ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page" group c15:0x6--0x6 line.long 0x0 "FA,Fault Address Registerr" group c15:0x7--0x7 line.long 0x0 "CACHEOP,Cache Operations Register" group c15:0x8--0x8 line.long 0x0 "TLBOP,TLB Operations Register" group c15:0x0d--0x0d line.long 0x0 "PID,Process Identifier" ;end include file arm/mmu720.ph ;begin include file arm/icebreaker.ph ;parameters: tree "ICEBreaker" group ice:0x8--0x8 "Watchpoint 0" line.long 0x0 "AV,Address Value" group ice:0x9--0x9 line.long 0x0 "AM,Address Mask" group ice:0x0a--0x0a line.long 0x0 "DV,Data Value" group ice:0x0b--0x0b line.long 0x0 "DM,Data Mask" group ice:0x0c--0x0c line.long 0x0 "CV,Control Value" bitfld.long 0x0 0x8 "ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA" bitfld.long 0x0 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1" bitfld.long 0x0 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1" bitfld.long 0x0 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1" bitfld.long 0x0 0x4 " nTRANS ,CPU Mode" "User,notU" bitfld.long 0x0 0x3 " nOPC ,Op Fetch" "Inst,Data" bitfld.long 0x0 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res" bitfld.long 0x0 0x0 " nRW ,Read/Write" "R ,W" group ice:0x0d--0x0d line.long 0x0 "CM,Control Mask" bitfld.long 0x0 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS" bitfld.long 0x0 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS" bitfld.long 0x0 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS" bitfld.long 0x0 0x4 " nTRANS ,CPU Mode" "ENA ,DIS" bitfld.long 0x0 0x3 " nOPC ,Op Fetch" "ENA ,DIS" bitfld.long 0x0 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS" bitfld.long 0x0 0x0 " nRW ,Read/Write" "ENA,DIS" group ice:0x10--0x10 "Watchpoint 1" line.long 0x0 "AV,Address Value" group ice:0x11--0x11 line.long 0x0 "AM,Address Mask" group ice:0x12--0x12 line.long 0x0 "DV,Data Value" group ice:0x13--0x13 line.long 0x0 "DM,Data Mask" group ice:0x14--0x14 line.long 0x0 "CV,Control Value" bitfld.long 0x0 0x8 "ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA" bitfld.long 0x0 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1" bitfld.long 0x0 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1" bitfld.long 0x0 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1" bitfld.long 0x0 0x4 " nTRANS ,CPU Mode" "User,notU" bitfld.long 0x0 0x3 " nOPC ,Op Fetch" "Inst,Data" bitfld.long 0x0 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res" bitfld.long 0x0 0x0 " nRW ,Read/Write" "R ,W" group ice:0x15--0x15 line.long 0x0 "CM,Control Mask" bitfld.long 0x0 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS" bitfld.long 0x0 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS" bitfld.long 0x0 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS" bitfld.long 0x0 0x4 " nTRANS ,CPU Mode" "ENA ,DIS" bitfld.long 0x0 0x3 " nOPC ,Op Fetch" "ENA ,DIS" bitfld.long 0x0 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS" bitfld.long 0x0 0x0 " nRW ,Read/Write" "ENA,DIS" tree.end ;end include file arm/icebreaker.ph