; --------------------------------------------------------------------------------
; @Title: TMS570LS11XX Specific Menu
; @Props: Released
; @Author: MKR
; @Changelog: 2013-03-15 MKR
; @Manufacturer: TI - Texas Instruments
; @Core: Cortex-R4F
; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: mentms570ls11xx.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
popup "[:chip]Core Registers (Cortex-R4F)"
(
menuitem "[:chip]ID Registers"                      "per , ""Core Registers (Cortex-R4F),ID Registers"""
menuitem "[:chip]System Control and Configuration"  "per , ""Core Registers (Cortex-R4F),System Control and Configuration"""
menuitem "[:chip]MPU Control and Configuration"     "per , ""Core Registers (Cortex-R4F),MPU Control and Configuration"""
menuitem "[:chip]Cache Control and Configuration"   "per , ""Core Registers (Cortex-R4F),Cache Control and Configuration"""
menuitem "[:chip]TCM Control and Configuration"     "per , ""Core Registers (Cortex-R4F),TCM Control and Configuration"""
menuitem "[:chip]System Performance Monitor"        "per , ""Core Registers (Cortex-R4F),System Performance Monitor"""
separator
menuitem "[:chip]Debug Registers"                   "per , ""Core Registers (Cortex-R4F),Debug Registers"""
menuitem "[:chip]Breakpoint Registers"              "per , ""Core Registers (Cortex-R4F),Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers"      "per , ""Core Registers (Cortex-R4F),Watchpoint Control Registers"""
)
separator
menuitem "SYS"                                  "per , ""SYS (System and Peripheral Control Registers)"""
menuitem "PMM"                                  "per , ""PMM (Power Management Module)"""
menuitem "IOMM"                                 "per , ""IOMM (I/O Multiplexing and Control Module)"""
menuitem "F021"                                 "per , ""F021 (Flash Module Controller)"""
menuitem "TCRAM"                                "per , ""TCRAM (Tightly-Coupled RAM)"""
menuitem "PBIST"                                "per , ""PBIST (Programmable Built-In Self-Test)"""
menuitem "CCM-R4"                               "per , ""CCM-R4 (CPU Compare Module for Cortex-R4)"""
menuitem "STC"                                  "per , ""STC (Self-Test Controller)"""
menuitem "PLL"                                  "per , ""PLL (Phase-Locked Loop)"""
menuitem "LPOCLKDET"                            "per , ""LPOCLKDET (Low-Power Oscillator and Clock Detect)"""
menuitem "DCC"                                  "per , ""DCC (Dual-Clock Comparator)"""
menuitem "ESM"                                  "per , ""ESM (Error Signaling Module)"""
menuitem "RTI"                                  "per , ""RTI (Real-Time Interrupt)"""
menuitem "CRC"                                  "per , ""CRC (Cyclic Redundancy Check)"""
menuitem "VIM"                                  "per , ""VIM (Vectored Interrupt Manager Module)"""
menuitem "DMA"                                  "per , ""DMA (Direct Memory Access Controller Module)"""
menuitem "EMIF"                                 "per , ""EMIF (External Memory Interface)"""
menuitem "POM"                                  "per , ""POM (Parameter Overlay Module)"""
menuitem "ePWM"                                 "per , ""ePWM (Enhanced Pulse Width Modulator)"""
menuitem "eCAP"                                 "per , ""eCAP (Enhanced Capture Module)"""
menuitem "eQEP"                                 "per , ""eQEP (Enhanced QEP Module)"""
menuitem "ADC"                                  "per , ""ADC (Analog To Digital Converter Module)"""
menuitem "N2HET"                                "per , ""N2HET (High-End Timer Module)"""
menuitem "HTU"                                  "per , ""HTU (High-End Timer Transfer Unit Module)"""
menuitem "GIO"                                  "per , ""GIO (General Purpose Input/Output Module)"""
if (!cpuis("TMS570LS1114*"))
(
menuitem "FlexRay"                          "per , ""Flexray Module"""
)
menuitem "DCAN"                                 "per , ""DCAN (Controller Area Network Module)"""
menuitem "MibSPI"                               "per , ""MibSPI (Multi-Buffered Serial Peripheral Interface Module)"""
menuitem "SCI/LIN"                              "per , ""SCI/LIN (Serial Communications Interface/Local Interconnect Network Module)"""
menuitem "SCI"                                  "per , ""SCI (Serial Communication Interface Module)"""
menuitem "I2C"                                  "per , ""I2C (Inter-Integrated Circuit Module)"""
if (cpuis("TMS570LS1117*"))
(
menuitem "EMAC"                             "per , ""EMAC (EMAC/MDIO Module)"""
)
menuitem "eFuse"                                "per , ""eFuse (Enhanced Fuse Controller)"""
)
)