; --------------------------------------------------------------------------------
; @Title: S32G3 Specific Menu
; @Props: Released
; @Author: KWI, NEJ, DAB, JON, KRZ
; @Changelog: 2023-02-21 KRZ
; @Manufacturer: NXP - NXP Semiconductors
; @Core: Cortex-A53, Cortex-M7F
; @Chip: S32G338M, S32G339M, S32G358A, S32G359A, S32G378A, S32G379A,
;        S32G398A, S32G399A
; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: mens32g3.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
if (CORENAME()=="CORTEXA53")
(
popup "[:chip]Core Registers (Cortex-A53)"
(
menuitem "[:chip]ID Registers[AArch64]"                                     "per , ""Core Registers (Cortex-A53),AArch64,ID Registers"""
menuitem "[:chip]System Control and Configuration[AArch64]"                 "per , ""Core Registers (Cortex-A53),AArch64,System Control and Configuration"""
menuitem "[:chip]Memory Management Unit[AArch64]"                           "per , ""Core Registers (Cortex-A53),AArch64,Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions[AArch64]"                        "per , ""Core Registers (Cortex-A53),AArch64,Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration[AArch64]"                  "per , ""Core Registers (Cortex-A53),AArch64,Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor[AArch64]"                       "per , ""Core Registers (Cortex-A53),AArch64,System Performance Monitor"""
menuitem "[:chip]System Timer Registers[AArch64]"                           "per , ""Core Registers (Cortex-A53),AArch64,System Timer Registers"""
menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch64]"       "per , ""Core Registers (Cortex-A53),AArch64,Generic Interrupt Controller CPU Interface"""
separator
menuitem "[:chip]Debug Registers[AArch64]"                                  "per , ""Core Registers (Cortex-A53),AArch64,Debug Registers"""
separator
menuitem "[:chip]Breakpoint Registers[AArch64]"                             "per , ""Core Registers (Cortex-A53),AArch64,Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers[AArch64]"                     "per , ""Core Registers (Cortex-A53),AArch64,Watchpoint Control Registers"""
separator
menuitem "[:chip]ID Registers[AArch32]"                                     "per , ""Core Registers (Cortex-A53),AArch32,ID Registers"""
menuitem "[:chip]System Control and Configuration[AArch32]"                 "per , ""Core Registers (Cortex-A53),AArch32,System Control and Configuration"""
menuitem "[:chip]Memory Management Unit[AArch32]"                           "per , ""Core Registers (Cortex-A53),AArch32,Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions[AArch32]"                        "per , ""Core Registers (Cortex-A53),AArch32,Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration[AArch32]"                  "per , ""Core Registers (Cortex-A53),AArch32,Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor[AArch32]"                       "per , ""Core Registers (Cortex-A53),AArch32,System Performance Monitor"""
menuitem "[:chip]System Timer Registers[AArch32]"                           "per , ""Core Registers (Cortex-A53),AArch32,System Timer Registers"""
menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch32]"       "per , ""Core Registers (Cortex-A53),AArch32,Generic Interrupt Controller CPU Interface"""
separator
menuitem "[:chip]Debug Registers[AArch32]"                                  "per , ""Core Registers (Cortex-A53),AArch32,Debug Registers"""
separator
menuitem "[:chip]Breakpoint Registers[AArch32]"                             "per , ""Core Registers (Cortex-A53),AArch32,Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers[AArch32]"                     "per , ""Core Registers (Cortex-A53),AArch32,Watchpoint Control Registers"""
separator
menuitem "[:chip]Interrupt Controller (GIC-500)"                            "per , ""Core Registers (Cortex-A53),Interrupt Controller (GIC-500)"""
)
)
else if (CORENAME()=="CORTEXM7F")
(
popup "[:chip]Core Registers (Cortex-M7F)"
(
menuitem "[:chip]System Control"                                "per , ""Core Registers (Cortex-M7F),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit"                    "per , ""Core Registers (Cortex-M7F),Memory Protection Unit (MPU)"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller"     "per , ""Core Registers (Cortex-M7F),Nested Vectored Interrupt Controller (NVIC)"""
menuitem "[:chip]FPU;Floating-point Unit"                       "per , ""Core Registers (Cortex-M7F),Floating-point Unit (FPU)"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                "per , ""Core Registers (Cortex-M7F),Debug,Core Debug"""
menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit"       "per , ""Core Registers (Cortex-M7F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"        "per , ""Core Registers (Cortex-M7F),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
)
separator
popup "IVT Table (QSPI)"
(
menuitem "IVT (QSPI)"                                           "per , ""IVT Table,IVT (QSPI)"""
menuitem "DCD"                                                  "per , ""IVT Table,IVT (QSPI),DCD Registers"""
menuitem "DCD Self-Test"                                        "per , ""IVT Table,IVT (QSPI),DCD Self-Test Registers"""
menuitem "BOOT"                                                 "per , ""IVT Table,IVT (QSPI),BOOT Registers"""
)
separator
menuitem "A53_GPR;A53_CLUSTER_GPR"                          "per , ""A53_GPR (A53_CLUSTER_GPR)"""
popup "ADC;SAR_ADC"
(
menuitem "ADC_0"                                        "per , ""ADC (SAR_ADC),ADC_0"""
menuitem "ADC_1"                                        "per , ""ADC (SAR_ADC),ADC_1"""
)
menuitem "ATP"                                              "per , ""ATP"""
menuitem "BOOT_CC;Boot"                                     "per , ""BOOT (Boot)"""
popup "CAIU;Coherent agent interface unit (CAIU)"
(
menuitem "CAIU0"                                        "per , ""CAIU (Coherent agent interface unit (CAIU)),CAIU0"""
menuitem "CAIU1"                                        "per , ""CAIU (Coherent agent interface unit (CAIU)),CAIU1"""
)
menuitem "CAIU0_QOSGENERATOR;CAIU Qos generator"            "per , ""CAIU0_QOSGENERATOR (CAIU Qos generator)"""
menuitem "CAIU1_QOSGENERATOR;CAIU Qos generator"            "per , ""CAIU1_QOSGENERATOR (CAIU Qos generator)"""
menuitem "CCTI_FAULT_CTRL;CCTI fault controller"            "per , ""CCTI_FAULT_CTRL (CCTI fault controller)"""
popup "CM7_GPR;CM7_CLUSTER_GPR"
(
menuitem "CM7_GPR_0"                                    "per , ""CM7_GPR (CM7_CLUSTER_GPR),CM7_GPR_0"""
menuitem "CM7_GPR_1"                                    "per , ""CM7_GPR (CM7_CLUSTER_GPR),CM7_GPR_1"""
menuitem "CM7_GPR_2"                                    "per , ""CM7_GPR (CM7_CLUSTER_GPR),CM7_GPR_2"""
menuitem "CM7_GPR_3"                                    "per , ""CM7_GPR (CM7_CLUSTER_GPR),CM7_GPR_3"""
)
menuitem "CMIU;Coherent memory interface unit (CMIU)"       "per , ""CMIU (Coherent memory interface unit (CMIU))"""
popup "CMU_FC"
(
menuitem "CMU_FC_0"                                     "per , ""CMU_FC,CMU_FC_0"""
menuitem "CMU_FC_5"                                     "per , ""CMU_FC,CMU_FC_5"""
menuitem "CMU_FC_6"                                     "per , ""CMU_FC,CMU_FC_6"""
menuitem "CMU_FC_7"                                     "per , ""CMU_FC,CMU_FC_7"""
menuitem "CMU_FC_8"                                     "per , ""CMU_FC,CMU_FC_8"""
menuitem "CMU_FC_9"                                     "per , ""CMU_FC,CMU_FC_9"""
menuitem "CMU_FC_10"                                    "per , ""CMU_FC,CMU_FC_10"""
menuitem "CMU_FC_11"                                    "per , ""CMU_FC,CMU_FC_11"""
menuitem "CMU_FC_12"                                    "per , ""CMU_FC,CMU_FC_12"""
menuitem "CMU_FC_13"                                    "per , ""CMU_FC,CMU_FC_13"""
menuitem "CMU_FC_14"                                    "per , ""CMU_FC,CMU_FC_14"""
menuitem "CMU_FC_15"                                    "per , ""CMU_FC,CMU_FC_15"""
menuitem "CMU_FC_16"                                    "per , ""CMU_FC,CMU_FC_16"""
menuitem "CMU_FC_17"                                    "per , ""CMU_FC,CMU_FC_17"""
menuitem "CMU_FC_18"                                    "per , ""CMU_FC,CMU_FC_18"""
menuitem "CMU_FC_20"                                    "per , ""CMU_FC,CMU_FC_20"""
menuitem "CMU_FC_21"                                    "per , ""CMU_FC,CMU_FC_21"""
menuitem "CMU_FC_22"                                    "per , ""CMU_FC,CMU_FC_22"""
menuitem "CMU_FC_24"                                    "per , ""CMU_FC,CMU_FC_24"""
menuitem "CMU_FC_27"                                    "per , ""CMU_FC,CMU_FC_27"""
menuitem "CMU_FC_28"                                    "per , ""CMU_FC,CMU_FC_28"""
menuitem "CMU_FC_39"                                    "per , ""CMU_FC,CMU_FC_39"""
menuitem "CMU_FC_46"                                    "per , ""CMU_FC,CMU_FC_46"""
menuitem "CMU_FC_47"                                    "per , ""CMU_FC,CMU_FC_47"""
menuitem "CMU_FC_48"                                    "per , ""CMU_FC,CMU_FC_48"""
menuitem "CMU_FC_49"                                    "per , ""CMU_FC,CMU_FC_49"""
menuitem "CMU_FC_50"                                    "per , ""CMU_FC,CMU_FC_50"""
menuitem "CMU_FC_51"                                    "per , ""CMU_FC,CMU_FC_51"""
)
popup "CMU_FM"
(
menuitem "CMU_FM_1"                                     "per , ""CMU_FM,CMU_FM_1"""
menuitem "CMU_FM_2"                                     "per , ""CMU_FM,CMU_FM_2"""
menuitem "CMU_FM_3"                                     "per , ""CMU_FM,CMU_FM_3"""
menuitem "CMU_FM_4"                                     "per , ""CMU_FM,CMU_FM_4"""
)
menuitem "CRC_0;CRC"                                        "per , ""CRC"""
menuitem "CSR;Coherent subsystem (CSR)"                     "per , ""CSR (Coherent subsystem (CSR))"""
menuitem "CTU"                                              "per , ""CTU"""
menuitem "DDR_GPR"                                          "per , ""DDR_GPR"""
menuitem "DDR_SUBSYSTEM;Subsystem"                          "per , ""DDR_SUBSYSTEM (Subsystem)"""
popup "DFS"
(
menuitem "CORE_DFS"                                     "per , ""DFS,CORE_DFS"""
menuitem "PERIPH_DFS"                                   "per , ""DFS,PERIPH_DFS"""
)
popup "DIRU;Directory unit (DIRU)"
(
menuitem "DIRU_0"                                       "per , ""DIRU (Directory unit (DIRU)),DIRU_0"""
menuitem "DIRU_1"                                       "per , ""DIRU (Directory unit (DIRU)),DIRU_1"""
)
popup "DMA;DMA MP"
(
menuitem "EDMA_0_MP"                                    "per , ""DMA (DMA MP),EDMA_0_MP"""
menuitem "EDMA_1_MP"                                    "per , ""DMA (DMA MP),EDMA_1_MP"""
)
popup "DMA_CRC"
(
menuitem "DMA_CRC_0"                                    "per , ""DMA_CRC,DMA_CRC_0"""
menuitem "DMA_CRC_1"                                    "per , ""DMA_CRC,DMA_CRC_1"""
)
popup "DMA_TCD;DMA TCD"
(
menuitem "EDMA_0_TCD"                                   "per , ""DMA_TCD (DMA TCD),EDMA_0_TCD"""
menuitem "EDMA_1_TCD"                                   "per , ""DMA_TCD (DMA TCD),EDMA_1_TCD"""
)
popup "DMAMUX"
(
menuitem "DMAMUX_0"                                     "per , ""DMAMUX,DMAMUX_0"""
menuitem "DMAMUX_1"                                     "per , ""DMAMUX,DMAMUX_1"""
menuitem "DMAMUX_2"                                     "per , ""DMAMUX,DMAMUX_2"""
menuitem "DMAMUX_3"                                     "per , ""DMAMUX,DMAMUX_3"""
)
popup "EIM"
(
menuitem "EIM"                                          "per , ""EIM,EIM"""
menuitem "EIM_0"                                        "per , ""EIM,EIM_0"""
menuitem "EIM_1"                                        "per , ""EIM,EIM_1"""
menuitem "EIM_2"                                        "per , ""EIM,EIM_2"""
menuitem "EIM_3"                                        "per , ""EIM,EIM_3"""
menuitem "EIM_4"                                        "per , ""EIM,EIM_4"""
menuitem "EIM_LLCE0"                                    "per , ""EIM,EIM_LLCE0"""
menuitem "EIM_LLCE1"                                    "per , ""EIM,EIM_LLCE1"""
menuitem "EIM_MISC"                                     "per , ""EIM,EIM_MISC"""
menuitem "EIM_PFE0"                                     "per , ""EIM,EIM_PFE0"""
menuitem "EIM_PFE1"                                     "per , ""EIM,EIM_PFE1"""
menuitem "EIM_PFE2"                                     "per , ""EIM,EIM_PFE2"""
menuitem "EIM_PFE3"                                     "per , ""EIM,EIM_PFE3"""
menuitem "EIM_PFE4"                                     "per , ""EIM,EIM_PFE4"""
menuitem "EIM_PFE5"                                     "per , ""EIM,EIM_PFE5"""
menuitem "EIM_PFE6"                                     "per , ""EIM,EIM_PFE6"""
)
popup "ERM"
(
menuitem "ERM_CPU0"                                     "per , ""ERM,ERM_CPU0"""
menuitem "ERM_CPU1"                                     "per , ""ERM,ERM_CPU1"""
menuitem "ERM_CPU2"                                     "per , ""ERM,ERM_CPU2"""
menuitem "ERM_CPU3"                                     "per , ""ERM,ERM_CPU3"""
menuitem "ERM_EDMA0"                                    "per , ""ERM,ERM_EDMA0"""
menuitem "ERM_EDMA1"                                    "per , ""ERM,ERM_EDMA1"""
menuitem "ERM_LLCE"                                     "per , ""ERM,ERM_LLCE"""
menuitem "ERM_PER"                                      "per , ""ERM,ERM_PER"""
menuitem "ERM_PFE0"                                     "per , ""ERM,ERM_PFE0"""
menuitem "ERM_PFE1"                                     "per , ""ERM,ERM_PFE1"""
menuitem "ERM_PFE2"                                     "per , ""ERM,ERM_PFE2"""
menuitem "ERM_PFE3"                                     "per , ""ERM,ERM_PFE3"""
menuitem "ERM_PFE4"                                     "per , ""ERM,ERM_PFE4"""
menuitem "ERM_PFE5"                                     "per , ""ERM,ERM_PFE5"""
menuitem "ERM_PFE6"                                     "per , ""ERM,ERM_PFE6"""
menuitem "ERM_PFE7"                                     "per , ""ERM,ERM_PFE7"""
menuitem "ERM_PFE8"                                     "per , ""ERM,ERM_PFE8"""
menuitem "ERM_PFE9"                                     "per , ""ERM,ERM_PFE9"""
menuitem "ERM_PFE10"                                    "per , ""ERM,ERM_PFE10"""
menuitem "ERM_PFE11"                                    "per , ""ERM,ERM_PFE11"""
menuitem "ERM_PFE12"                                    "per , ""ERM,ERM_PFE12"""
menuitem "ERM_PFE13"                                    "per , ""ERM,ERM_PFE13"""
menuitem "ERM_PFE14"                                    "per , ""ERM,ERM_PFE14"""
menuitem "ERM_PFE15"                                    "per , ""ERM,ERM_PFE15"""
menuitem "ERM_STDBY_SRAM"                               "per , ""ERM,ERM_STDBY_SRAM"""
)
menuitem "FCCU"                                             "per , ""FCCU"""
popup "FLEXCAN;CAN"
(
menuitem "CAN_0"                                        "per , ""FLEXCAN (CAN),CAN_0"""
menuitem "CAN_1"                                        "per , ""FLEXCAN (CAN),CAN_1"""
menuitem "CAN_2"                                        "per , ""FLEXCAN (CAN),CAN_2"""
menuitem "CAN_3"                                        "per , ""FLEXCAN (CAN),CAN_3"""
)
menuitem "FR_0;FlexRay"                                     "per , ""FLEXRAY (FlexRay)"""
popup "FLEXTIMER;FTM"
(
menuitem "FTM_0"                                        "per , ""FLEXTIMER (FTM),FTM_0"""
menuitem "FTM_1"                                        "per , ""FLEXTIMER (FTM),FTM_1"""
)
menuitem "FSC;Functional safety controller (FSC)"           "per , ""FSC (Functional safety controller (FSC))"""
menuitem "FXOSC"                                            "per , ""FXOSC"""
menuitem "GMAC_0;GMAC"                                      "per , ""GMAC"""
popup "I2C;Inter-Integrated Circuit"
(
menuitem "I2C_0"                                        "per , ""I2C (Inter-Integrated Circuit),I2C_0"""
menuitem "I2C_1"                                        "per , ""I2C (Inter-Integrated Circuit),I2C_1"""
menuitem "I2C_2"                                        "per , ""I2C (Inter-Integrated Circuit),I2C_2"""
menuitem "I2C_3"                                        "per , ""I2C (Inter-Integrated Circuit),I2C_3"""
menuitem "I2C_4"                                        "per , ""I2C (Inter-Integrated Circuit),I2C_4"""
)
menuitem "JDC"                                              "per , ""JDC"""
popup "LINFLEXD;LINFlexD"
(
menuitem "LINFLEXD_0"                                   "per , ""LINFLEXD (LINFlexD),LINFLEXD_0"""
menuitem "LINFLEXD_1"                                   "per , ""LINFLEXD (LINFlexD),LINFLEXD_1"""
menuitem "LINFLEXD_2"                                   "per , ""LINFLEXD (LINFlexD),LINFLEXD_2"""
)
menuitem "LLCE_CORE_TO_CORE;Core-to-core"                   "per , ""LLCE_CORE_TO_CORE (Core-to-core)"""
menuitem "LLCE_SYSCTRL;LLCE"                                "per , ""LLCE_SYSCTRL (LLCE)"""
popup "MC_CGM"
(
menuitem "MC_CGM_0"                                     "per , ""MC_CGM,MC_CGM_0"""
menuitem "MC_CGM_1"                                     "per , ""MC_CGM,MC_CGM_1"""
menuitem "MC_CGM_2"                                     "per , ""MC_CGM,MC_CGM_2"""
menuitem "MC_CGM_5"                                     "per , ""MC_CGM,MC_CGM_5"""
menuitem "MC_CGM_6"                                     "per , ""MC_CGM,MC_CGM_6"""
)
menuitem "MC_ME"                                            "per , ""MC_ME"""
menuitem "MC_RGM"                                           "per , ""MC_RGM"""
menuitem "MCM"                                              "per , ""MCM"""
menuitem "MDM_AP"                                           "per , ""MDM_AP"""
menuitem "MSCM"                                             "per , ""MSCM"""
popup "MU;Messaging Unit"
(
menuitem "MU0__MUA"                                     "per , ""MU (Messaging Unit),MU0__MUA"""
menuitem "MU0__MUB"                                     "per , ""MU (Messaging Unit),MU0__MUB"""
menuitem "MU1__MUA"                                     "per , ""MU (Messaging Unit),MU1__MUA"""
menuitem "MU1__MUB"                                     "per , ""MU (Messaging Unit),MU1__MUB"""
menuitem "MU2__MUA"                                     "per , ""MU (Messaging Unit),MU2__MUA"""
menuitem "MU2__MUB"                                     "per , ""MU (Messaging Unit),MU2__MUB"""
menuitem "MU3__MUA"                                     "per , ""MU (Messaging Unit),MU3__MUA"""
menuitem "MU3__MUB"                                     "per , ""MU (Messaging Unit),MU3__MUB"""
)
popup "NCBUID_RESET_VALUE;Non-coherent bridge unit (NCBU)"
(
menuitem "NCBU0"                                        "per , ""NCBUID_RESET_VALUE (Non-coherent bridge unit (NCBU)),NCBU0"""
menuitem "NCBU1"                                        "per , ""NCBUID_RESET_VALUE (Non-coherent bridge unit (NCBU)),NCBU1"""
)
menuitem "OCOTP_1;OCOTP"                                    "per , ""OCOTP"""
menuitem "OCOTP_GPR;Boot"                                   "per , ""OCOTP_GPR (Boot)"""
menuitem "PCIE_DMA"                                         "per , ""PCIE_DMA"""
menuitem "PCIE_EP"                                          "per , ""PCIE_EP"""
menuitem "PCIE_RC"                                          "per , ""PCIE_RC"""
menuitem "PERF_REGISTERS;Performance monitor"               "per , ""PERF_REGISTERS (Performance monitor)"""
popup "PIT"
(
menuitem "PIT_0"                                        "per , ""PIT,PIT_0"""
menuitem "PIT_1"                                        "per , ""PIT,PIT_1"""
)
popup "PLLDIG"
(
menuitem "ACCEL_PLL"                                    "per , ""PLLDIG,ACCEL_PLL"""
menuitem "CORE_PLL"                                     "per , ""PLLDIG,CORE_PLL"""
menuitem "DDR_PLL"                                      "per , ""PLLDIG,DDR_PLL"""
menuitem "PERIPH_PLL"                                   "per , ""PLLDIG,PERIPH_PLL"""
)
menuitem "PMC"                                              "per , ""PMC"""
menuitem "PMUEVENTOBSERVER;PMUEVENT observer"               "per , ""PMUEVENTOBSERVER (PMUEVENT observer)"""
menuitem "QUADSPI;QuadSPI"                                  "per , ""QUADSPI (QuadSPI)"""
menuitem "QUADSPI_ARDB;ARDB"                                "per , ""QUADSPI_ARDB (ARDB)"""
menuitem "RDC;Reset Domain Controller (RDC)"                "per , ""RESET (Reset Control)"""
menuitem "RTC"                                              "per , ""RTC (Real-time Counter)"""
menuitem "S32G_GPR;SRC"                                     "per , ""S32G_GPR (SRC)"""
menuitem "S32G_STDBY_GPR"                                   "per , ""S32G_STDBY_GPR"""
menuitem "SBSW"                                             "per , ""SBSW"""
menuitem "SECURITY_CC;Security subsystem"                   "per , ""SECURITY (Security subsystem)"""
popup "SELFTEST_GPR"
(
menuitem "SELFTEST_GPR_CHIPTOP"                         "per , ""SELFTEST_GPR,SELFTEST_GPR_CHIPTOP"""
menuitem "SELFTEST_GPR_CLUSTER0_CPU0"                   "per , ""SELFTEST_GPR,SELFTEST_GPR_CLUSTER0_CPU0"""
menuitem "SELFTEST_GPR_CLUSTER0_CPU1"                   "per , ""SELFTEST_GPR,SELFTEST_GPR_CLUSTER0_CPU1"""
menuitem "SELFTEST_GPR_CLUSTER0_CPU2"                   "per , ""SELFTEST_GPR,SELFTEST_GPR_CLUSTER0_CPU2"""
menuitem "SELFTEST_GPR_CLUSTER0_CPU3"                   "per , ""SELFTEST_GPR,SELFTEST_GPR_CLUSTER0_CPU3"""
menuitem "SELFTEST_GPR_CLUSTER0_GIC0"                   "per , ""SELFTEST_GPR,SELFTEST_GPR_CLUSTER0_GIC0"""
menuitem "SELFTEST_GPR_CLUSTER1_CPU0"                   "per , ""SELFTEST_GPR,SELFTEST_GPR_CLUSTER1_CPU0"""
menuitem "SELFTEST_GPR_CLUSTER1_CPU1"                   "per , ""SELFTEST_GPR,SELFTEST_GPR_CLUSTER1_CPU1"""
menuitem "SELFTEST_GPR_CLUSTER1_CPU2"                   "per , ""SELFTEST_GPR,SELFTEST_GPR_CLUSTER1_CPU2"""
menuitem "SELFTEST_GPR_CLUSTER1_CPU3"                   "per , ""SELFTEST_GPR,SELFTEST_GPR_CLUSTER1_CPU3"""
menuitem "SELFTEST_GPR_CLUSTER1_GIC1"                   "per , ""SELFTEST_GPR,SELFTEST_GPR_CLUSTER1_GIC1"""
menuitem "SELFTEST_GPR_CM7_CLUSTER_0"                   "per , ""SELFTEST_GPR,SELFTEST_GPR_CM7_CLUSTER_0"""
menuitem "SELFTEST_GPR_CM7_CLUSTER_1"                   "per , ""SELFTEST_GPR,SELFTEST_GPR_CM7_CLUSTER_1"""
menuitem "SELFTEST_GPR_CM7_CLUSTER_2"                   "per , ""SELFTEST_GPR,SELFTEST_GPR_CM7_CLUSTER_2"""
menuitem "SELFTEST_GPR_CM7_CLUSTER_3"                   "per , ""SELFTEST_GPR,SELFTEST_GPR_CM7_CLUSTER_3"""
menuitem "SELFTEST_GPR_DDR"                             "per , ""SELFTEST_GPR,SELFTEST_GPR_DDR"""
menuitem "SELFTEST_GPR_DDR0"                            "per , ""SELFTEST_GPR,SELFTEST_GPR_DDR0"""
menuitem "SELFTEST_GPR_DDR_SS"                          "per , ""SELFTEST_GPR,SELFTEST_GPR_DDR_SS"""
menuitem "SELFTEST_GPR_DDR_SS1"                         "per , ""SELFTEST_GPR,SELFTEST_GPR_DDR_SS1"""
menuitem "SELFTEST_GPR_DDR_SS2"                         "per , ""SELFTEST_GPR,SELFTEST_GPR_DDR_SS2"""
menuitem "SELFTEST_GPR_FULL_CHECKER"                    "per , ""SELFTEST_GPR,SELFTEST_GPR_FULL_CHECKER"""
menuitem "SELFTEST_GPR_FULL_HYBRID"                     "per , ""SELFTEST_GPR,SELFTEST_GPR_FULL_HYBRID"""
menuitem "SELFTEST_GPR_FULL_OFFCC"                      "per , ""SELFTEST_GPR,SELFTEST_GPR_FULL_OFFCC"""
menuitem "SELFTEST_GPR_FULL_PRIME"                      "per , ""SELFTEST_GPR,SELFTEST_GPR_FULL_PRIME"""
menuitem "SELFTEST_GPR_HSE_LLCE"                        "per , ""SELFTEST_GPR,SELFTEST_GPR_HSE_LLCE"""
menuitem "SELFTEST_GPR_HSE_RUN"                         "per , ""SELFTEST_GPR,SELFTEST_GPR_HSE_RUN"""
menuitem "SELFTEST_GPR_HSIO_ENET"                       "per , ""SELFTEST_GPR,SELFTEST_GPR_HSIO_ENET"""
menuitem "SELFTEST_GPR_HSIO_SDHCQSPI"                   "per , ""SELFTEST_GPR,SELFTEST_GPR_HSIO_SDHCQSPI"""
menuitem "SELFTEST_GPR_HYBRID_SCAN"                     "per , ""SELFTEST_GPR,SELFTEST_GPR_HYBRID_SCAN"""
menuitem "SELFTEST_GPR_LLCE_LBIST"                      "per , ""SELFTEST_GPR,SELFTEST_GPR_LLCE_LBIST"""
menuitem "SELFTEST_GPR_LLCE_PART1"                      "per , ""SELFTEST_GPR,SELFTEST_GPR_LLCE_PART1"""
menuitem "SELFTEST_GPR_LLCE_PART2"                      "per , ""SELFTEST_GPR,SELFTEST_GPR_LLCE_PART2"""
menuitem "SELFTEST_GPR_LS_CHECKER"                      "per , ""SELFTEST_GPR,SELFTEST_GPR_LS_CHECKER"""
menuitem "SELFTEST_GPR_LS_HYBRID"                       "per , ""SELFTEST_GPR,SELFTEST_GPR_LS_HYBRID"""
menuitem "SELFTEST_GPR_LS_PRIME"                        "per , ""SELFTEST_GPR,SELFTEST_GPR_LS_PRIME"""
menuitem "SELFTEST_GPR_MEM_NOC_0"                       "per , ""SELFTEST_GPR,SELFTEST_GPR_MEM_NOC_0"""
menuitem "SELFTEST_GPR_MEM_NOC_1"                       "per , ""SELFTEST_GPR,SELFTEST_GPR_MEM_NOC_1"""
menuitem "SELFTEST_GPR_MEM_NOC_2"                       "per , ""SELFTEST_GPR,SELFTEST_GPR_MEM_NOC_2"""
menuitem "SELFTEST_GPR_MEM_NOC_3"                       "per , ""SELFTEST_GPR,SELFTEST_GPR_MEM_NOC_3"""
menuitem "SELFTEST_GPR_MISC"                            "per , ""SELFTEST_GPR,SELFTEST_GPR_MISC"""
menuitem "SELFTEST_GPR_NCORE_0"                         "per , ""SELFTEST_GPR,SELFTEST_GPR_NCORE_0"""
menuitem "SELFTEST_GPR_NCORE_1"                         "per , ""SELFTEST_GPR,SELFTEST_GPR_NCORE_1"""
menuitem "SELFTEST_GPR_NIU"                             "per , ""SELFTEST_GPR,SELFTEST_GPR_NIU"""
menuitem "SELFTEST_GPR_NOC0_HYBRID"                     "per , ""SELFTEST_GPR,SELFTEST_GPR_NOC0_HYBRID"""
menuitem "SELFTEST_GPR_NOC0_LBIST"                      "per , ""SELFTEST_GPR,SELFTEST_GPR_NOC0_LBIST"""
menuitem "SELFTEST_GPR_NOC1_HYBRID"                     "per , ""SELFTEST_GPR,SELFTEST_GPR_NOC1_HYBRID"""
menuitem "SELFTEST_GPR_NOC1_LBIST"                      "per , ""SELFTEST_GPR,SELFTEST_GPR_NOC1_LBIST"""
menuitem "SELFTEST_GPR_NOC2_HYBRID"                     "per , ""SELFTEST_GPR,SELFTEST_GPR_NOC2_HYBRID"""
menuitem "SELFTEST_GPR_NOC2_LBIST"                      "per , ""SELFTEST_GPR,SELFTEST_GPR_NOC2_LBIST"""
menuitem "SELFTEST_GPR_NOC3_HYBRID"                     "per , ""SELFTEST_GPR,SELFTEST_GPR_NOC3_HYBRID"""
menuitem "SELFTEST_GPR_NOC3_LBIST"                      "per , ""SELFTEST_GPR,SELFTEST_GPR_NOC3_LBIST"""
menuitem "SELFTEST_GPR_NOC_PART1"                       "per , ""SELFTEST_GPR,SELFTEST_GPR_NOC_PART1"""
menuitem "SELFTEST_GPR_NOC_PART2"                       "per , ""SELFTEST_GPR,SELFTEST_GPR_NOC_PART2"""
menuitem "SELFTEST_GPR_NOC_PART3"                       "per , ""SELFTEST_GPR,SELFTEST_GPR_NOC_PART3"""
menuitem "SELFTEST_GPR_NOC_PART4"                       "per , ""SELFTEST_GPR,SELFTEST_GPR_NOC_PART4"""
menuitem "SELFTEST_GPR_PCIE"                            "per , ""SELFTEST_GPR,SELFTEST_GPR_PCIE"""
menuitem "SELFTEST_GPR_PCIE_SS"                         "per , ""SELFTEST_GPR,SELFTEST_GPR_PCIE_SS"""
menuitem "SELFTEST_GPR_PFE_PART1"                       "per , ""SELFTEST_GPR,SELFTEST_GPR_PFE_PART1"""
menuitem "SELFTEST_GPR_PFE_PART2"                       "per , ""SELFTEST_GPR,SELFTEST_GPR_PFE_PART2"""
menuitem "SELFTEST_GPR_PFE_PART3"                       "per , ""SELFTEST_GPR,SELFTEST_GPR_PFE_PART3"""
menuitem "SELFTEST_GPR_REST"                            "per , ""SELFTEST_GPR,SELFTEST_GPR_REST"""
menuitem "SELFTEST_GPR_REST_CHECKER"                    "per , ""SELFTEST_GPR,SELFTEST_GPR_REST_CHECKER"""
menuitem "SELFTEST_GPR_REST_LBIST"                      "per , ""SELFTEST_GPR,SELFTEST_GPR_REST_LBIST"""
menuitem "SELFTEST_GPR_SAFE_FULL_DOMAIN_PARTITION"      "per , ""SELFTEST_GPR,SELFTEST_GPR_SAFE_FULL_DOMAIN_PARTITION"""
)
menuitem "SELFTEST_GPR_TOP"                                 "per , ""SELFTEST_GPR_TOP"""
menuitem "SEMA42"                                           "per , ""SEMA42"""
menuitem "SERDES_DMA_PCIE_1;PCIE_DMA"                       "per , ""SERDES_DMA_PCIE_1 (PCIE_DMA)"""
menuitem "SERDES_EP_PCIE_1;PCIE_EP"                         "per , ""SERDES_EP_PCIE_1 (PCIE_EP)"""
popup "SERDES_GPR"
(
menuitem "SERDES_0_GPR"                                 "per , ""SERDES_GPR,SERDES_0_GPR"""
menuitem "SERDES_1_GPR"                                 "per , ""SERDES_GPR,SERDES_1_GPR"""
)
menuitem "SERDES_PHY;SerDes_PHY"                            "per , ""SERDES_PHY (SerDes_PHY)"""
menuitem "SERDES_PHY_PCIE_1;SerDes_PHY"                     "per , ""SERDES_PHY_PCIE_1 (SerDes_PHY)"""
menuitem "SERDES_RC_PCIE_1;PCIE_RC"                         "per , ""SERDES_RC_PCIE_1 (PCIE_RC)"""
menuitem "SERDES_SS;SerDes_SS"                              "per , ""SERDES_SS (SerDes_SS)"""
menuitem "SERDES_SS_PCIE_1;SerDes_SS"                       "per , ""SERDES_SS_PCIE_1 (SerDes_SS)"""
menuitem "SERDES_XPCS_0;SerDes_XPCS"                        "per , ""SERDES_XPCS_0 (SerDes_XPCS)"""
menuitem "SERDES_XPCS_0_PCIE_1;SerDes_XPCS"                 "per , ""SERDES_XPCS_0_PCIE_1 (SerDes_XPCS)"""
menuitem "SERDES_XPCS_1;SerDes_XPCS"                        "per , ""SERDES_XPCS_1 (SerDes_XPCS)"""
menuitem "SERDES_XPCS_1_PCIE_1;SerDes_XPCS"                 "per , ""SERDES_XPCS_1_PCIE_1 (SerDes_XPCS)"""
popup "SIUL2"
(
menuitem "SIUL2_0"                                      "per , ""SIUL2,SIUL2_0"""
menuitem "SIUL2_1"                                      "per , ""SIUL2,SIUL2_1"""
)
popup "SPI"
(
menuitem "SPI_0"                                        "per , ""SPI,SPI_0"""
menuitem "SPI_1"                                        "per , ""SPI,SPI_1"""
menuitem "SPI_2"                                        "per , ""SPI,SPI_2"""
menuitem "SPI_3"                                        "per , ""SPI,SPI_3"""
menuitem "SPI_4"                                        "per , ""SPI,SPI_4"""
menuitem "SPI_5"                                        "per , ""SPI,SPI_5"""
)
popup "SRAMC"
(
menuitem "SRAMC"                                        "per , ""SRAMC,SRAMC"""
menuitem "SRAMC_1"                                      "per , ""SRAMC,SRAMC_1"""
menuitem "SRAMC_2"                                      "per , ""SRAMC,SRAMC_2"""
menuitem "SRAMC_3"                                      "per , ""SRAMC,SRAMC_3"""
menuitem "STDBY_SRAM_CFG"                               "per , ""SRAMC,STDBY_SRAM_CFG"""
)
menuitem "SRC"                                              "per , ""SRC (System Reset Controller)"""
menuitem "SRC_GPR;SRC_GPR_TOP"                              "per , ""SRC_GPR (SRC_GPR_TOP)"""
menuitem "STCU2"                                            "per , ""STCU2"""
popup "STM;System Timer"
(
menuitem "STM_0"                                        "per , ""STM (System Timer),STM_0"""
menuitem "STM_1"                                        "per , ""STM (System Timer),STM_1"""
menuitem "STM_2"                                        "per , ""STM (System Timer),STM_2"""
menuitem "STM_3"                                        "per , ""STM (System Timer),STM_3"""
menuitem "STM_4"                                        "per , ""STM (System Timer),STM_4"""
menuitem "STM_5"                                        "per , ""STM (System Timer),STM_5"""
menuitem "STM_6"                                        "per , ""STM (System Timer),STM_6"""
menuitem "STM_7"                                        "per , ""STM (System Timer),STM_7"""
menuitem "STM_8"                                        "per , ""STM (System Timer),STM_8"""
menuitem "STM_9"                                        "per , ""STM (System Timer),STM_9"""
menuitem "STM_10"                                       "per , ""STM (System Timer),STM_10"""
menuitem "STM_11"                                       "per , ""STM (System Timer),STM_11"""
menuitem "STM_TS"                                       "per , ""STM (System Timer),STM_TS"""
)
popup "SWT"
(
menuitem "SWT_0"                                        "per , ""SWT,SWT_0"""
menuitem "SWT_1"                                        "per , ""SWT,SWT_1"""
menuitem "SWT_2"                                        "per , ""SWT,SWT_2"""
menuitem "SWT_3"                                        "per , ""SWT,SWT_3"""
menuitem "SWT_4"                                        "per , ""SWT,SWT_4"""
menuitem "SWT_5"                                        "per , ""SWT,SWT_5"""
menuitem "SWT_6"                                        "per , ""SWT,SWT_6"""
menuitem "SWT_7"                                        "per , ""SWT,SWT_7"""
menuitem "SWT_8"                                        "per , ""SWT,SWT_8"""
menuitem "SWT_9"                                        "per , ""SWT,SWT_9"""
menuitem "SWT_10"                                       "per , ""SWT,SWT_10"""
menuitem "SWT_11"                                       "per , ""SWT,SWT_11"""
)
menuitem "TMU"                                              "per , ""TMU (Thermal Monitoring Unit)"""
menuitem "UMCTL2_MP"                                        "per , ""UMCTL2_MP"""
menuitem "UMCTL2_REGS"                                      "per , ""UMCTL2_REGS"""
menuitem "UOTG;Core"                                        "per , ""UOTG (Core)"""
menuitem "UOTGNC;Non-core"                                  "per , ""UOTGNC (Non-core)"""
menuitem "USDHC;uSDHC"                                      "per , ""USDHC (Ultra Secured Digital Host Controller)"""
menuitem "WKPU"                                             "per , ""WKPU"""
menuitem "XRDC_0"                                           "per , ""XRDC_0"""
menuitem "XRDC_1"                                           "per , ""XRDC_1"""
)
)