; --------------------------------------------------------------------------------
; @Title: RZ11 Specific Menu
; @Props: Released
; @Author: PID, ROK
; @Changelog: 2019-01-31 PID
; @Manufacturer: RENESAS - Renesas Technology, Corp.
; @Core: Cortex-R4, Cortex-M3
; @Copyright: (C) 1989-2019 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menrzt1.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
if (corename()=="CORTEXM3")
(
popup "[:chip]Core Registers (Cortex-M3)"
(
menuitem "[:chip]System Control"                                "per , ""Core Registers (Cortex-M3),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit"                    "per , ""Core Registers (Cortex-M3),Memory Protection Unit"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller"     "per , ""Core Registers (Cortex-M3),Nested Vectored Interrupt Controller"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                "per , ""Core Registers (Cortex-M3),Debug,Core Debug"""
menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit"       "per , ""Core Registers (Cortex-M3),Debug,Flash Patch and Breakpoint Unit (FPB)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"        "per , ""Core Registers (Cortex-M3),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
)
else if (corename()=="CORTEXR4F")
(
popup "[:chip]Core Registers (Cortex-R4F)"
(
menuitem "[:chip]ID Registers"                      "per , ""Core Registers (Cortex-R4F),ID Registers"""
menuitem "[:chip]System Control and Configuration"  "per , ""Core Registers (Cortex-R4F),System Control and Configuration"""
menuitem "[:chip]MPU Control and Configuration"     "per , ""Core Registers (Cortex-R4F),MPU Control and Configuration"""
menuitem "[:chip]Cache Control and Configuration"   "per , ""Core Registers (Cortex-R4F),Cache Control and Configuration"""
menuitem "[:chip]TCM Control and Configuration"     "per , ""Core Registers (Cortex-R4F),TCM Control and Configuration"""
menuitem "[:chip]System Performance Monitor"        "per , ""Core Registers (Cortex-R4F),System Performance Monitor"""
separator
menuitem "[:chip]Debug Registers"                   "per , ""Core Registers (Cortex-R4F),Debug Registers"""
menuitem "[:chip]Breakpoint Registers"              "per , ""Core Registers (Cortex-R4F),Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers"      "per , ""Core Registers (Cortex-R4F),Watchpoint Control Registers"""
)
)
menuitem "CPU Registers"                                " per , ""CPU-R (CPU Registers)"""
menuitem "Operating Modes Registers"                    " per , ""OMR (Operating Modes Registers)"""
menuitem "Reset Registers"                              " per , ""RST (Reset Registers)"""
menuitem "Clock Generation Circuit Registers"           " per , ""CGC (Clock Generation Circuit Registers)"""
popup "Clock Monitor Circuit"
(
menuitem "CLMA0"                                    " per , ""CLMA (Clock Monitor Circuit),CLMA0"""
menuitem "CLMA1"                                    " per , ""CLMA (Clock Monitor Circuit),CLMA1"""
menuitem "CLMA2"                                    " per , ""CLMA (Clock Monitor Circuit),CLMA2"""
)
menuitem "Low-Power Consumption Function"               " per , ""LPCF (Low-Power Consumption Function)"""
menuitem "Debugging Interface"                          " per , ""DI (Debugging Interface)"""
menuitem "Register Write Protection Function"           " per , ""RWPF (Register Write Protection Function)"""
if cpuis("R7S910015-CR4")||cpuis("R7S910016-CR4")||cpuis("R7S910017-CR4")||cpuis("R7S910018-CR4")||cpuis("R7S910115-CR4")||cpuis("R7S910116-CR4")||cpuis("R7S910117-CR4")||cpuis("R7S910118-CR4")
(
popup "ICUA"
(
menuitem "ICUA"                                     " per , ""ICUA (Interrupt Controller"""
menuitem "R4VIC"                                " per , ""ICUA (Interrupt Controller,R4VIC (Cortex-R4 Vector Interrupt Controller)"""
)
)
else
(
menuitem "ICUA"                                     " per , ""ICUA (Interrupt Controller"""
)
menuitem "Bus State Controller"                         " per , ""BSC (Bus State Controller)"""
popup "DMAC"
(
menuitem "DMAC0"                                    " per , ""DMAC (Direct Memory Address Controller),DMAC 0"""
menuitem "DMAC1"                                    " per , ""DMAC (Direct Memory Address Controller),DMAC 1"""
menuitem "Common"                                   " per , ""DMAC (Direct Memory Address Controller),Common"""
)
menuitem "ELC"                                          " per , ""ELC (Event Link Controller"""
menuitem "I/O Ports Registers"                          " per , ""I/O (Input/Output Ports Registers)"""
menuitem "MPC"                                          " per , ""MPC (Multi-Function Pin Controller"""
popup "MTU3a"
(
menuitem "Channel 0"                                " per , ""MTU3a (Multi-Function Timer Pulse Unit),Channel 0"""
menuitem "Channel 1"                                " per , ""MTU3a (Multi-Function Timer Pulse Unit),Channel 1"""
menuitem "Channel 2"                                " per , ""MTU3a (Multi-Function Timer Pulse Unit),Channel 2"""
menuitem "Channel 3"                                " per , ""MTU3a (Multi-Function Timer Pulse Unit),Channel 3"""
menuitem "Channel 4"                                " per , ""MTU3a (Multi-Function Timer Pulse Unit),Channel 4"""
menuitem "Channel 5"                                " per , ""MTU3a (Multi-Function Timer Pulse Unit),Channel 5"""
menuitem "Channel 6"                                " per , ""MTU3a (Multi-Function Timer Pulse Unit),Channel 6"""
menuitem "Channel 7"                                " per , ""MTU3a (Multi-Function Timer Pulse Unit),Channel 7"""
menuitem "Channel 8"                                " per , ""MTU3a (Multi-Function Timer Pulse Unit),Channel 8"""
menuitem "Channel 9"                                " per , ""MTU3a (Multi-Function Timer Pulse Unit),Channel 9"""
menuitem "Common"                                   " per , ""MTU3a (Multi-Function Timer Pulse Unit),Common"""
)
menuitem "POE3"                                         " per , ""POE3 (Port Output Enable 3)"""
menuitem "GPTa"                                         " per , ""GPTa (General PWM Timer)"""
popup "TPU"
(
menuitem "Unit 0"                                          " per , ""TPU (16-bit Timer Pulse Unit),Unit 0"""
if !cpuis("R7S910001")&&!cpuis("R7S910101")
(
menuitem "Unit 1"                                          " per , ""TPU (16-bit Timer Pulse Unit),Unit 1"""
)
menuitem "Common Registers"                                          " per , ""TPU (16-bit Timer Pulse Unit),Common Registers"""
)
popup "PPG"
(
menuitem "PPG0"                                          " per , ""PPG (Programmable Pulse Generator),PPG0"""
menuitem "PPG1"                                          " per , ""PPG (Programmable Pulse Generator),PPG1"""
)
popup "CMT"
(
menuitem "Unit 0"                                   " per , ""CMT (Compare Match Timer),Unit 0"""
menuitem "Unit 1"                                   " per , ""CMT (Compare Match Timer),Unit 1"""
menuitem "Unit 2"                                   " per , ""CMT (Compare Match Timer),Unit 2"""
)
popup "CMTW"
(
menuitem "CMTW0"                                    " per , ""CMTW (Compare Match Timer W),CMTW0"""
menuitem "CMTW1"                                    " per , ""CMTW (Compare Match Timer W),CMTW1"""
menuitem "Common"                                   " per , ""CMTW (Compare Match Timer W),Common"""
)
popup "WDT"
(
menuitem "WDT 0"                                    " per , ""WDT (Watchdog Timer),WDT 0"""
menuitem "WDT 1"                                    " per , ""WDT (Watchdog Timer),WDT 1"""
)
menuitem "IWDT"                                         " per , ""IWDT (Independent Watchdog Timer)"""
popup "ETHERC"
(
menuitem "Ethernet Interface Selection Registers"   " per , ""ETHERC (Ethernet MAC),Ethernet Interface Selection Registers"""
menuitem "Ethernet MAC Control Registers"           " per , ""ETHERC (Ethernet MAC),Ethernet MAC Control Registers"""
menuitem "Hardware Function Call Register"          " per , ""ETHERC (Ethernet MAC),Hardware Function Call Register"""
)
popup "Ethernet Switch"
(
menuitem "Operating Mode Setting Register"          " per , ""ETHSW (Ethernet Switch),Operating Mode Setting Register"""
menuitem "Switch Configuration Registers"           " per , ""ETHSW (Ethernet Switch),Switch Configuration Registers"""
menuitem "Learning Interface Registers"             " per , ""ETHSW (Ethernet Switch),Learning Interface Registers"""
menuitem "MAC Port Registers"                       " per , ""ETHSW (Ethernet Switch),MAC Port Registers"""
menuitem "Timer Module Registers"                   " per , ""ETHSW (Ethernet Switch),Timer Module Registers"""
menuitem "DLR Module Registers"                     " per , ""ETHSW (Ethernet Switch),DLR Module Registers"""
)
if !cpuis("R7S91000?")&&!cpuis("R7S91010?")&&!cpuis("R7S910011")&&!cpuis("R7S910013")&&!cpuis("R7S910111")&&!cpuis("R7S910113")
(
menuitem "ESC"                                      " per , ""ESC (EtherCAT Slave Controller"""
)
popup "USBh"
(
menuitem "OHCI"                                     " per , ""USBh (USB 2.0 HS Host Module),OHCI Operational Registers"""
menuitem "EHCI"                                     " per , ""USBh (USB 2.0 HS Host Module),EHCI Operational Registers"""
menuitem "PCI Configuration Registers For OHCI"     " per , ""USBh (USB 2.0 HS Host Module),PCI Configuration Registers For OHCI"""
menuitem "PCI Configuration Registers For EHC"      " per , ""USBh (USB 2.0 HS Host Module),PCI Configuration Registers For EHCI"""
menuitem "AHB-PCI 1"                                " per , ""USBh (USB 2.0 HS Host Module),AHB-PCI Bridge Configuration 1"""
menuitem "AHB-PCI 2"                                " per , ""USBh (USB 2.0 HS Host Module),AHB-PCI Bridge Communication 2"""
)
menuitem "USBf"                                         " per , ""USBf (USB 2.0 HS Function Module)"""
menuitem "SCIFA"                                        " per , ""SCIFA (Serial Communication Interface With FIFO)"""
popup "RIICa"
(
menuitem "RIIC0"                                    " per , ""RIICa (I2C Bus Interface),RIIC0"""
menuitem "RIIC1"                                    " per , ""RIICa (I2C Bus Interface),RIIC1"""
)
menuitem "RS-CAN"                                       " per , ""RS-CAN (CAN Interface)"""
popup "RSPIa"
(
menuitem "RSPI0"                                    " per , ""RSPIa (Serial Peripheral Interface),RSPI0"""
menuitem "RSPI1"                                    " per , ""RSPIa (Serial Peripheral Interface),RSPI1"""
menuitem "RSPI2"                                    " per , ""RSPIa (Serial Peripheral Interface),RSPI2"""
menuitem "RSPI3"                                    " per , ""RSPIa (Serial Peripheral Interface),RSPI3"""
)
menuitem "SPIBSC"                                       " per , ""SPIBSC (SPI Multi I/O Bus Controller)"""
menuitem "CRC"                                          " per , ""CRC (CRC Operation Units)"""
menuitem "SSI"                                          " per , ""SSI (Serial Sound Interface)"""
menuitem "DSMIF"                                        " per , ""DSMIF (Delta-Sigma Interface)"""
menuitem "ECM"                                          " per , ""ECM (Error Control Module)"""
popup "S12ADC"
(
menuitem "S12ADC 0"                                 " per , ""S12ADC (12-Bit A/D Converter),S12ADC 0"""
menuitem "S12ADC 1"                                 " per , ""S12ADC (12-Bit A/D Converter),S12ADC 1"""
)
menuitem "Temperature Sensor Registers"                 " per , ""Temperature Sensor Registers"""
menuitem "DOC"                                          " per , ""DOC (Data Operation Circuit)"""
menuitem "RAM Registers"                                " per , ""RAM Registers"""
)
)