; --------------------------------------------------------------------------------
; @Title: CY8C4XXX-BL Specific Menu
; @Props: Released
; @Author: TRJ
; @Changelog: 2017-05-31 TRJ
; @Manufacturer: CYPRESS - Cypress Semiconductor Corporation
; @Core: Cortex-M0
; @Chip: CY8C4127FNI-BL483, CY8C4127FNI-BL493, CY8C4127LQI-BL453, CY8C4127LQI-BL473
;        CY8C4127LQI-BL483, CY8C4127LQI-BL493, CY8C4128FNI-BL443, CY8C4128FNI-BL453
;        CY8C4128FNI-BL473, CY8C4128FNI-BL483, CY8C4128FNI-BL493, CY8C4128FNI-BL543
;        CY8C4128FNI-BL553, CY8C4128FNI-BL563, CY8C4128FNI-BL573, CY8C4128FNI-BL583
;        CY8C4128FNI-BL593, CY8C4128LQI-BL443, CY8C4128LQI-BL453, CY8C4128LQI-BL473
;        CY8C4128LQI-BL483, CY8C4128LQI-BL493, CY8C4128LQI-BL543, CY8C4128LQI-BL553
;        CY8C4128LQI-BL563, CY8C4128LQI-BL573, CY8C4128LQI-BL583, CY8C4128LQI-BL593
;        CY8C4247FNI-BL483, CY8C4247FNI-BL493, CY8C4247LQI-BL453, CY8C4247LQI-BL463
;        CY8C4247LQI-BL473, CY8C4247LQI-BL483, CY8C4247LQI-BL493, CY8C4248FLI-BL483
;        CY8C4248FLI-BL583, CY8C4248FNI-BL453, CY8C4248FNI-BL463, CY8C4248FNI-BL473
;        CY8C4248FNI-BL483, CY8C4248FNI-BL493, CY8C4248FNI-BL543, CY8C4248FNI-BL553
;        CY8C4248FNI-BL563, CY8C4248FNI-BL573, CY8C4248FNI-BL583, CY8C4248FNI-BL593
;        CY8C4248FNQ-BL583
; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menpsoc4xx8ble.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
popup "[:chip]Core Registers (Cortex-M0)"
(
menuitem "[:chip]System Control"                                 "per , ""Core Registers (Cortex-M0),System Control"""
menuitem "[:chip]Nested Vectored Interrupt Controller"           "per , ""Core Registers (Cortex-M0),Nested Vectored Interrupt Controller (NVIC)"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                  "per , ""Core Registers (Cortex-M0),Debug,Core Debug"""
menuitem "[:chip]BPU;Breakpoint Unit"                         "per , ""Core Registers (Cortex-M0),Debug,Breakpoint Unit (BPU)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"          "per , ""Core Registers (Cortex-M0),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
separator
if (cpuis("CY8C42*-BL*"))
(
menuitem "BCTL"                                             "per , ""BCTL (UDB Array Bank Control)"""
)
menuitem "BLELL"                                                "per , ""BLELL (BLE Link Layer)"""
menuitem "BLERD"                                                "per , ""BLERD (BLE Radio)"""
menuitem "BLESS"                                                "per , ""BLESS (BLE Sub System)"""
menuitem "BLESS2"                                               "per , ""BLESS2 (BLE Sub System Version 2)"""
popup "CNT"
(
menuitem "CNT 0"                                            "per , ""CNT (TCPWM - Individual Counter),CNT 0"""
menuitem "CNT 1"                                            "per , ""CNT (TCPWM - Individual Counter),CNT 1"""
menuitem "CNT 2"                                            "per , ""CNT (TCPWM - Individual Counter),CNT 2"""
menuitem "CNT 3"                                            "per , ""CNT (TCPWM - Individual Counter),CNT 3"""
)
menuitem "SRSS"                                                 "per , ""SRSS (System Resources Sub System)"""
menuitem "CPUSS"                                                "per , ""CPUSS (CPU Sub System)"""
menuitem "DMAC"                                                 "per , ""DMAC (DMA Controller)"""
menuitem "DMAD"                                                 "per , ""DMAD (DMA Descriptor)"""
if (cpuis("CY8C4*-BL453")||cpuis("CY8C4*-BL483")||cpuis("CY8C4*-BL493"))
(
menuitem "CSD"                                              "per , ""CSD (CapSense Sigma Delta)"""
)
if (!cpuis("CY8C4*-BL443"))
(
if (cpuis("CY8C41*-BL*"))
(
menuitem "CTBM"                                         "per , ""CTBM (Continuous Time Block Mini)"""
)
if (cpuis("CY8C42*-BL*"))
(
popup "CTBM"
(
menuitem "CTBM0"                                    "per , ""CTBM (Continuous Time Block Mini),CTBM0"""
menuitem "CTBM1"                                    "per , ""CTBM (Continuous Time Block Mini),CTBM1"""
)
)
)
menuitem "DSAB"                                                 "per , ""DSAB (Deep Sleep Amplifier Bias)"""
if (cpuis("CY8C42*-BL*"))
(
menuitem "DSI"                                              "per , ""DSI (Digital System Interconnect)"""
)
popup "GPIO"
(
menuitem "GPIO"                                             "per , ""GPIO (General Purpose Input/Output)"""
popup "GPIO - PS"
(
menuitem "PRT0"                                         "per , ""GPIO (General Purpose Input/Output),Port Specific,PRT0"""
menuitem "PRT1"                                         "per , ""GPIO (General Purpose Input/Output),Port Specific,PRT1"""
menuitem "PRT2"                                         "per , ""GPIO (General Purpose Input/Output),Port Specific,PRT2"""
menuitem "PRT3"                                         "per , ""GPIO (General Purpose Input/Output),Port Specific,PRT3"""
menuitem "PRT4"                                         "per , ""GPIO (General Purpose Input/Output),Port Specific,PRT4"""
menuitem "PRT5"                                         "per , ""GPIO (General Purpose Input/Output),Port Specific,PRT5"""
menuitem "PRT6"                                         "per , ""GPIO (General Purpose Input/Output),Port Specific,PRT6"""
)
)
popup "HSIOM"
(
menuitem "HSIOM"                                            "per , ""HSIOM (High Speed IO Matrix),HSIOM"""
menuitem "HSIOM - Port Specific"                            "per , ""HSIOM (High Speed IO Matrix),HSIOM - Port Specific"""
)
if (cpuis("CY8C4*-BL463")||cpuis("CY8C4*-BL483")||cpuis("CY8C4*-BL493"))
(
menuitem "LCD"                                              "per , ""LCD (Liquid Crystal Display)"""
)
if (!cpuis("CY8C4128LQI-BL443")&&!cpuis("CY8C4128FNI-BL443"))
(
menuitem "LPCOMP"                                           "per , ""LPCOMP (Low Power Comparator)"""
)
if (cpuis("CY8C42*-BL*"))
(
menuitem "PA"                                               "per , ""PA (Port Adaptor)"""
)
menuitem "PASS MMIO"                                            "per , ""PASS MMIO (Programmable Analog Sub System MMIO)"""
menuitem "PERI"                                                 "per , ""PERI (Peripheral Interconnect)"""
menuitem "ROM"                                                  "per , ""ROM Table"""
if (cpuis("CY8C42*-BL*"))
(
popup "ROUTE"
(
menuitem "ROUTE0"                                       "per , ""ROUTE,ROUTE0"""
menuitem "ROUTE1"                                       "per , ""ROUTE,ROUTE1"""
)
)
menuitem "SAR"                                                  "per , ""SAR (Successive Approximation Register)"""
popup "SCB"
(
menuitem "SCB0"                                             "per , ""SCB (Serial Communication Block),SCB0"""
menuitem "SCB1"                                             "per , ""SCB (Serial Communication Block),SCB1"""
)
menuitem "SFLASH"                                               "per , ""SFLASH (Supervisory Flash)"""
menuitem "SPCIF"                                                "per , ""SPCIF (SPC Interface)"""
menuitem "TCPWM"                                                "per , ""(Timer Counter PWM)"""
menuitem "TST"                                                  "per , ""TST (Test)"""
if (cpuis("CY8C42*-BL*"))
(
menuitem "UDBIF"                                            "per , ""UDBIF (UDB Interface)"""
menuitem "UDB"                                              "per , ""UDB (Universal Digital Block)"""
popup "UDBSNG"
(
menuitem "UDB P0 U0"                                    "per , ""UDBSNG (Single UDB),UDB P0 U0"""
menuitem "UDB P0 U1"                                    "per , ""UDBSNG (Single UDB),UDB P0 U1"""
menuitem "UDB P1 U0"                                    "per , ""UDBSNG (Single UDB),UDB P1 U0"""
menuitem "UDB P1 U1"                                    "per , ""UDBSNG (Single UDB),UDB P1 U1"""
)
menuitem "WRK8"                                             "per , ""WRK8 (UDB 8-Bit Working)"""
menuitem "WRK16CAT"                                         "per , ""WRK16CAT (UDB 16-bit Concatenated Working)"""
menuitem "WRK16DEF"                                         "per , ""WRK16DEF (UDB 16-bit Working)"""
menuitem "WRK32"                                            "per , ""WRK32 (UDB 32-bit Working)"""
)
)
)