; --------------------------------------------------------------------------------
; @Title: MAX32620 Specific Menu
; @Props: Released
; @Author: ASK, KWI, ADR
; @Changelog: 2015-03-26 ASK
;             2020-12-18 KWI
;             2021-01-26 ADR
; @Manufacturer: MAXIM - Maxim Integrated Products, Inc.
; @Core: Cortex-M4F
; @Chip: MAX32620, MAX32625, MAX32626
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menmax32620.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
popup "[:chip]Core Registers (Cortex-M4F)"
(
menuitem "[:chip]System Control"                                "per , ""Core Registers (Cortex-M4F),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit"                    "per , ""Core Registers (Cortex-M4F),Memory Protection Unit"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller"     "per , ""Core Registers (Cortex-M4F),Nested Vectored Interrupt Controller"""
menuitem "[:chip]FPU;Floating-point Unit"                       "per , ""Core Registers (Cortex-M4F),Floating-point Unit"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                "per , ""Core Registers (Cortex-M4F),Debug,Core Debug"""
menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit"       "per , ""Core Registers (Cortex-M4F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"        "per , ""Core Registers (Cortex-M4F),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
separator
menuitem "OWM"          "per , ""1-WIRE_MASTER (1-Wire Master Interface)"""
menuitem "ADC"          "per , ""ADC (ADC / AFE),ADC"""
menuitem "AES"          "per , ""AES (AES Cryptographic Engine)"""
menuitem "CRC"          "per , ""CRC (CRC-16/CRC-32 Engine)"""
menuitem "FLC"          "per , ""FLC (Flash Controller)"""
popup "I2C_MASTER (I2C Master 0 Interface)"
(
menuitem "I2CM0"    "per , ""I2C_MASTER (I2C Master 0 Interface),I2CM0"""
menuitem "I2CM1"    "per , ""I2C_MASTER (I2C Master 0 Interface),I2CM1"""
menuitem "I2CM2"    "per , ""I2C_MASTER (I2C Master 0 Interface),I2CM2"""
)
menuitem "I2CS"         "per , ""I2C_SLAVE (I2C Slave Interface)"""
menuitem "ICC"          "per , ""ICC (Instruction Cache Controller)"""
popup "IO (General Purpose I/O Ports (GPIO))"
(
menuitem "GPIO"     "per , ""IO (General Purpose I/O Ports (GPIO)),GPIO"""
menuitem "IOMAN"    "per , ""IO (General Purpose I/O Ports (GPIO)),IOMAN"""
)
menuitem "MAA"          "per , ""MAA (MAA Cryptographic Engine)"""
popup "PMU (Program Memory Unit)"
(
menuitem "PMU0"     "per , ""PMU (Program Memory Unit),PMU0"""
menuitem "PMU1"     "per , ""PMU (Program Memory Unit),PMU1"""
menuitem "PMU2"     "per , ""PMU (Program Memory Unit),PMU2"""
menuitem "PMU3"     "per , ""PMU (Program Memory Unit),PMU3"""
menuitem "PMU4"     "per , ""PMU (Program Memory Unit),PMU4"""
menuitem "PMU5"     "per , ""PMU (Program Memory Unit),PMU5"""
)
popup "POWER_MANAGER (System Power Manager)"
(
menuitem "PWRMAN"   "per , ""POWER_MANAGER (System Power Manager),PWRMAN"""
menuitem "PWRSEQ"   "per , ""POWER_MANAGER (System Power Manager),PWRSEQ"""
)
popup "PULSE_TRAIN (Pulse Train Generation)"
(
menuitem "PT0"      "per , ""PULSE_TRAIN (Pulse Train Generation),PT0"""
menuitem "PT1"      "per , ""PULSE_TRAIN (Pulse Train Generation),PT1"""
menuitem "PT2"      "per , ""PULSE_TRAIN (Pulse Train Generation),PT2"""
menuitem "PT3"      "per , ""PULSE_TRAIN (Pulse Train Generation),PT3"""
menuitem "PT4"      "per , ""PULSE_TRAIN (Pulse Train Generation),PT4"""
menuitem "PT5"      "per , ""PULSE_TRAIN (Pulse Train Generation),PT5"""
menuitem "PT6"      "per , ""PULSE_TRAIN (Pulse Train Generation),PT6"""
menuitem "PT7"      "per , ""PULSE_TRAIN (Pulse Train Generation),PT7"""
menuitem "PT8"      "per , ""PULSE_TRAIN (Pulse Train Generation),PT8"""
menuitem "PT9"      "per , ""PULSE_TRAIN (Pulse Train Generation),PT9"""
menuitem "PT10"     "per , ""PULSE_TRAIN (Pulse Train Generation),PT10"""
menuitem "PT11"     "per , ""PULSE_TRAIN (Pulse Train Generation),PT11"""
menuitem "PT12"     "per , ""PULSE_TRAIN (Pulse Train Generation),PT12"""
menuitem "PT13"     "per , ""PULSE_TRAIN (Pulse Train Generation),PT13"""
menuitem "PT14"     "per , ""PULSE_TRAIN (Pulse Train Generation),PT14"""
menuitem "PT15"     "per , ""PULSE_TRAIN (Pulse Train Generation),PT15"""
menuitem "PTG"      "per , ""PULSE_TRAIN (Pulse Train Generation),PTG"""
)
popup "REAL-TIME_CLOCK (RTC Configuration Register)"
(
menuitem "RTCCFG"   "per , ""REAL-TIME_CLOCK (RTC Configuration Register),RTCCFG"""
menuitem "RTCTMR"   "per , ""REAL-TIME_CLOCK (RTC Configuration Register),RTCTMR"""
)
popup "SPI_MASTER (SPI Master Interface)"
(
menuitem "SPIM0"    "per , ""SPI_MASTER (SPI Master Interface),SPIM0"""
menuitem "SPIM1"    "per , ""SPI_MASTER (SPI Master Interface),SPIM1"""
menuitem "SPIM2"    "per , ""SPI_MASTER (SPI Master Interface),SPIM2"""
)
if (cpuis("MAX32625")||cpuis("MAX32626"))
(
menuitem "SPIS"     "per , ""SPI_SLAVE (SPI Slave Interface),SPIS"""
)
menuitem "SPIX"         "per , ""SPI_XIP (SPI XIP Interface)"""
menuitem "CLKMAN"       "per , ""SYSTEM_CLOCK_MANAGER (System Clock Manager)"""
popup "TIMERS (16/32 bit Timer/Counters)"
(
menuitem "TMR0"     "per , ""TIMERS (16/32 bit Timer/Counters),TMR0"""
menuitem "TMR1"     "per , ""TIMERS (16/32 bit Timer/Counters),TMR1"""
menuitem "TMR2"     "per , ""TIMERS (16/32 bit Timer/Counters),TMR2"""
menuitem "TMR3"     "per , ""TIMERS (16/32 bit Timer/Counters),TMR3"""
menuitem "TMR4"     "per , ""TIMERS (16/32 bit Timer/Counters),TMR4"""
menuitem "TMR5"     "per , ""TIMERS (16/32 bit Timer/Counters),TMR5"""
)
menuitem "TPU"          "per , ""TPU (Trust Protection Unit (TPU))"""
menuitem "TPU_TSR"      "per , ""TPU_TSR (Trust Protection Unit (TPU))"""
popup "UARTS (UART / Serial Port Interface)"
(
menuitem "UART0"    "per , ""UARTS (UART / Serial Port Interface),UART0"""
menuitem "UART1"    "per , ""UARTS (UART / Serial Port Interface),UART1"""
menuitem "UART2"    "per , ""UARTS (UART / Serial Port Interface),UART2"""
menuitem "UART3"    "per , ""UARTS (UART / Serial Port Interface),UART3"""
)
menuitem "USB"          "per , ""USB (Universal Serial Bus)"""
popup "WATCH_DOG_TIMERS (Watchdog Timers)"
(
menuitem "WDT0"     "per , ""WATCH_DOG_TIMERS (Watchdog Timers),WDT0"""
menuitem "WDT1"     "per , ""WATCH_DOG_TIMERS (Watchdog Timers),WDT1"""
)
)
)