; --------------------------------------------------------------------------------
; @Title: LS10xx Specific Menu
; @Props: Released
; @Author: SEB, MKK, GAJ, ADP, KOL, MRO, BCA, DPR, DOR, STY, JUS, DAM
; @Changelog: 2016-09-06 ADP
;             2018-01-12 KOL
;             2018-07-27 BCA
;             2019-06-13 KMB
;             2020-03-06 DAM
; @Manufacturer: FREESCALE - Freescale Semiconductor, Inc.
; @Chip: LS1046A, LS1026A, LS1043A, LS1023A, LS1088A, LS1048A, LS1084A, LS1044A
;        LS1012A
; @Core: Cortex-A72, Cortex-A53
; @Copyright: (C) 1989-2020 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menls10xx.men 17811 2024-04-23 14:07:55Z kwisniewski $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
if (cpuis("LS1012*")||cpuis("LS1023*")||cpuis("LS1043*"))
(
popup "[:chip]Core Registers (Cortex-A53)"
(
menuitem "[:chip]ID Registers[AArch64]"                                     "per , ""Core Registers (Cortex-A53),AArch64,ID Registers"""
menuitem "[:chip]System Control and Configuration[AArch64]"                 "per , ""Core Registers (Cortex-A53),AArch64,System Control and Configuration"""
menuitem "[:chip]Memory Management Unit[AArch64]"                           "per , ""Core Registers (Cortex-A53),AArch64,Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions[AArch64]"                        "per , ""Core Registers (Cortex-A53),AArch64,Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration[AArch64]"                  "per , ""Core Registers (Cortex-A53),AArch64,Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor[AArch64]"                       "per , ""Core Registers (Cortex-A53),AArch64,System Performance Monitor"""
menuitem "[:chip]System Timer Registers[AArch64]"                           "per , ""Core Registers (Cortex-A53),AArch64,System Timer Registers"""
menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch64]"       "per , ""Core Registers (Cortex-A53),AArch64,Generic Interrupt Controller CPU Interface"""
separator
menuitem "[:chip]Debug Registers[AArch64]"                                  "per , ""Core Registers (Cortex-A53),AArch64,Debug Registers"""
separator
menuitem "[:chip]Breakpoint Registers[AArch64]"                             "per , ""Core Registers (Cortex-A53),AArch64,Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers[AArch64]"                     "per , ""Core Registers (Cortex-A53),AArch64,Watchpoint Control Registers"""
separator
menuitem "[:chip]ID Registers[AArch32]"                                     "per , ""Core Registers (Cortex-A53),AArch32,ID Registers"""
menuitem "[:chip]System Control and Configuration[AArch32]"                 "per , ""Core Registers (Cortex-A53),AArch32,System Control and Configuration"""
menuitem "[:chip]Memory Management Unit[AArch32]"                           "per , ""Core Registers (Cortex-A53),AArch32,Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions[AArch32]"                        "per , ""Core Registers (Cortex-A53),AArch32,Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration[AArch32]"                  "per , ""Core Registers (Cortex-A53),AArch32,Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor[AArch32]"                       "per , ""Core Registers (Cortex-A53),AArch32,System Performance Monitor"""
menuitem "[:chip]System Timer Registers[AArch32]"                           "per , ""Core Registers (Cortex-A53),AArch32,System Timer Registers"""
menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch32]"       "per , ""Core Registers (Cortex-A53),AArch32,Generic Interrupt Controller CPU Interface"""
separator
menuitem "[:chip]Debug Registers[AArch32]"                                  "per , ""Core Registers (Cortex-A53),AArch32,Debug Registers"""
separator
menuitem "[:chip]Breakpoint Registers[AArch32]"                             "per , ""Core Registers (Cortex-A53),AArch32,Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers[AArch32]"                     "per , ""Core Registers (Cortex-A53),AArch32,Watchpoint Control Registers"""
separator
menuitem "[:chip]Interrupt Controller (GIC-400)"                            "per , ""Core Registers (Cortex-A53),Interrupt Controller (GIC-400)"""
)
)
else if (cpuis("LS1026*")||cpuis("LS1046*"))
(
popup "[:chip]Core Registers (Cortex-A72)"
(
menuitem "[:chip]ID Registers[AArch64]"                               "per , ""Core Registers (Cortex-A72),AArch64,ID Registers"""
menuitem "[:chip]System Control and Configuration[AArch64]"           "per , ""Core Registers (Cortex-A72),AArch64,System Control and Configuration"""
menuitem "[:chip]Memory Management Unit[AArch64]"                     "per , ""Core Registers (Cortex-A72),AArch64,Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions[AArch64]"                  "per , ""Core Registers (Cortex-A72),AArch64,Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration[AArch64]"            "per , ""Core Registers (Cortex-A72),AArch64,Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor[AArch64]"                 "per , ""Core Registers (Cortex-A72),AArch64,System Performance Monitor"""
menuitem "[:chip]System Timer Registers[AArch64]"                     "per , ""Core Registers (Cortex-A72),AArch64,System Timer Registers"""
menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch64]" "per , ""Core Registers (Cortex-A72),AArch64,Generic Interrupt Controller CPU Interface"""
separator
menuitem "[:chip]Debug Registers[AArch64]"                            "per , ""Core Registers (Cortex-A72),AArch64,Debug Registers"""
separator
menuitem "[:chip]Breakpoint Registers[AArch64]"                       "per , ""Core Registers (Cortex-A72),AArch64,Breakpoint Registers"""
menuitem "[:chip]Watchpoint Registers[AArch64]"                       "per , ""Core Registers (Cortex-A72),AArch64,Watchpoint Control Registers"""
separator
menuitem "[:chip]ID Registers[AArch32]"                               "per , ""Core Registers (Cortex-A72),AArch32,ID Registers"""
menuitem "[:chip]System Control and Configuration[AArch32]"           "per , ""Core Registers (Cortex-A72),AArch32,System Control and Configuration"""
menuitem "[:chip]Memory Management Unit[AArch32]"                     "per , ""Core Registers (Cortex-A72),AArch32,Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions[AArch32]"                  "per , ""Core Registers (Cortex-A72),AArch32,Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration[AArch32]"            "per , ""Core Registers (Cortex-A72),AArch32,Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor[AArch32]"                 "per , ""Core Registers (Cortex-A72),AArch32,System Performance Monitor"""
menuitem "[:chip]System Timer Registers[AArch32]"                     "per , ""Core Registers (Cortex-A72),AArch32,System Timer Registers"""
menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch32]" "per , ""Core Registers (Cortex-A72),AArch32,Generic Interrupt Controller CPU Interface"""
separator
menuitem "[:chip]Debug Registers[AArch32]"                            "per , ""Core Registers (Cortex-A72),AArch32,Debug Registers"""
separator
menuitem "[:chip]Breakpoint Registers[AArch32]"                       "per , ""Core Registers (Cortex-A72),AArch32,Breakpoint Registers"""
menuitem "[:chip]Watchpoint Registers[AArch32]"                       "per , ""Core Registers (Cortex-A72),AArch32,Watchpoint Control Registers"""
separator
menuitem "[:chip]Interrupt Controller (GIC-400)"                      "per , ""Core Registers (Cortex-A72),Interrupt Controller (GIC-400)"""
)
)
else if (cpuis("LS1044*")||cpuis("LS1048*")||cpuis("LS1084*")||cpuis("LS1088*"))
(
popup "[:chip]Core Registers (Cortex-A53)"
(
menuitem "[:chip]ID Registers[AArch64]"                                     "per , ""Core Registers (Cortex-A53),AArch64,ID Registers"""
menuitem "[:chip]System Control and Configuration[AArch64]"                 "per , ""Core Registers (Cortex-A53),AArch64,System Control and Configuration"""
menuitem "[:chip]Memory Management Unit[AArch64]"                           "per , ""Core Registers (Cortex-A53),AArch64,Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions[AArch64]"                        "per , ""Core Registers (Cortex-A53),AArch64,Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration[AArch64]"                  "per , ""Core Registers (Cortex-A53),AArch64,Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor[AArch64]"                       "per , ""Core Registers (Cortex-A53),AArch64,System Performance Monitor"""
menuitem "[:chip]System Timer Registers[AArch64]"                           "per , ""Core Registers (Cortex-A53),AArch64,System Timer Registers"""
menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch64]"       "per , ""Core Registers (Cortex-A53),AArch64,Generic Interrupt Controller CPU Interface"""
separator
menuitem "[:chip]Debug Registers[AArch64]"                                  "per , ""Core Registers (Cortex-A53),AArch64,Debug Registers"""
separator
menuitem "[:chip]Breakpoint Registers[AArch64]"                             "per , ""Core Registers (Cortex-A53),AArch64,Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers[AArch64]"                     "per , ""Core Registers (Cortex-A53),AArch64,Watchpoint Control Registers"""
separator
menuitem "[:chip]ID Registers[AArch32]"                                     "per , ""Core Registers (Cortex-A53),AArch32,ID Registers"""
menuitem "[:chip]System Control and Configuration[AArch32]"                 "per , ""Core Registers (Cortex-A53),AArch32,System Control and Configuration"""
menuitem "[:chip]Memory Management Unit[AArch32]"                           "per , ""Core Registers (Cortex-A53),AArch32,Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions[AArch32]"                        "per , ""Core Registers (Cortex-A53),AArch32,Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration[AArch32]"                  "per , ""Core Registers (Cortex-A53),AArch32,Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor[AArch32]"                       "per , ""Core Registers (Cortex-A53),AArch32,System Performance Monitor"""
menuitem "[:chip]System Timer Registers[AArch32]"                           "per , ""Core Registers (Cortex-A53),AArch32,System Timer Registers"""
menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch32]"       "per , ""Core Registers (Cortex-A53),AArch32,Generic Interrupt Controller CPU Interface"""
separator
menuitem "[:chip]Debug Registers[AArch32]"                                  "per , ""Core Registers (Cortex-A53),AArch32,Debug Registers"""
separator
menuitem "[:chip]Breakpoint Registers[AArch32]"                             "per , ""Core Registers (Cortex-A53),AArch32,Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers[AArch32]"                     "per , ""Core Registers (Cortex-A53),AArch32,Watchpoint Control Registers"""
separator
menuitem "[:chip]Interrupt Controller (GIC-500)"                            "per , ""Core Registers (Cortex-A53),Interrupt Controller (GIC-500)"""
)
)
separator
if cpuis("LS1088*")||cpuis("LS1084*")||cpuis("LS1048*")||cpuis("LS1044*")
(
menuitem "Reset"                                                                                            "per , ""Reset"""
)
menuitem "Clocking"                                                                                             "per , ""Clocking"""
if cpuis("LS10?6*")||cpuis("LS1012A")||cpuis("LS10?3*")
(
menuitem "System Counter"                                                                                   "per , ""System Counter"""
)
if cpuis("LS10?3*")
(
menuitem "IF;Interconnect Fabric"                                                                           "per , ""IF (Interconnect Fabric)"""
)
menuitem "CCI-400;Cache Coherent Interconnect"                                                                  "per , ""CCI-400 (Cache Coherent Interconnect)"""
if cpuis("LS1088*")||cpuis("LS1084*")||cpuis("LS1048*")||cpuis("LS1044*")||cpuis("LS10?6A")
(
menuitem "TZC-400;TrustZone Address Space Controller"                                                       "per , ""TZC-400 (TrustZone Address Space Controller)"""
)
else if cpuis("LS1012A")||cpuis("LS10?3A")
(
menuitem "TZC-380;TrustZone Address Space Controller"                                                       "per , ""TZC-380 (TrustZone Address Space Controller)"""
)
if cpuis("LS1088*")||cpuis("LS1084*")||cpuis("LS1048*")||cpuis("LS1044*")
(
menuitem "TZPC;TrustZone Protection Controller"                                                             "per , ""TZPC (TrustZone Protection Controller)"""
)
menuitem "SFP;Security Fuse Processor"                                                                          "per , ""SFP (Security Fuse Processor)"""
menuitem "SECMON;Security Monitor"                                                                              "per , ""SECMON (Security Monitor)"""
if cpuis("LS1012*")||cpuis("LS10?3*")||cpuis("LS10?6*")
(
menuitem "CSU;Central Security Unit"                                                                        "per , ""CSU (Central Security Unit)"""
)
if !cpuis("LS1088*")&&!cpuis("LS1084*")&&!cpuis("LS1048*")&&!cpuis("LS1044*")
(
menuitem "MSCM;Miscellaneous System Control Module"                                                         "per , ""MSCM (Miscellaneous System Control Module)"""
)
if cpuis("LS10?6*")||cpuis("LS10?3*")||cpuis("LS1012A")
(
menuitem "SCFG;Supplemental Configuration Unit"                                                             "per , ""SCFG (Supplemental Configuration Unit)"""
)
menuitem "DCFG;Device Configuration and Pin Control"                                                            "per , ""DCFG (Device Configuration and Pin Control)"""
if cpuis("LS1012A")||cpuis("LS10?3A")||cpuis("LS10?6A")
(
menuitem "RCPM;Run Control and Power Management"                                                            "per , ""RCPM (Run Control and Power Management)"""
)
if cpuis("LS10?3A")||cpuis("LS10?4A")||cpuis("LS10?8A")
(
menuitem "QE;QUICC Engine"                                                                                  "per , ""QE (QUICC Engine)"""
)
if cpuis("LS10?3A")||cpuis("LS10?6A")
(
popup "DPAA;Data Path Acceleration Architecture"
(
menuitem "QMan;Queue Manager"                                                                           "per , ""DPAA (Data Path Acceleration Architecture),QMan (Queue Manager)"""
menuitem "BMan;Buffer Manager"                                                                          "per , ""DPAA (Data Path Acceleration Architecture),BMan (Buffer Manager)"""
menuitem "FMan;Frame Manager"                                                                           "per , ""DPAA (Data Path Acceleration Architecture),FMan (Frame Manager)"""
)
)
if cpuis("LS10?6A")||cpuis("LS10?3A")||cpuis("LS1012*")
(
menuitem "SEC;Security And Encryption Engine"                                                               "per , ""SEC (Security And Encryption Engine)"""
)
if !cpuis("LS1012*")
(
menuitem "DDR;DDR Memory Controller"                                                                        "per , ""DDR (DDR Memory Controller)"""
)
if !cpuis("LS1088*")&&!cpuis("LS1084*")&&!cpuis("LS1048*")&&!cpuis("LS1044*")
(
popup "DMAMUX;Direct Memory Access Multiplexer"
(
menuitem "DMAMUX_1"                                                                                     "per , ""DMAMUX (Direct Memory Access Multiplexer),DMAMUX_1"""
menuitem "DMAMUX_2"                                                                                     "per , ""DMAMUX (Direct Memory Access Multiplexer),DMAMUX_2"""
)
)
popup "DUART;Dual Universal Asynchronous Receiver/Transmitters"
(
popup "DUART_1"
(
menuitem "UART_1"                                                                                       "per , ""DUART (Dual Universal Asynchronous Receiver/Transmitters),DUART_1,UART_1"""
menuitem "UART_2"                                                                                       "per , ""DUART (Dual Universal Asynchronous Receiver/Transmitters),DUART_1,UART_2"""
)
if !cpuis("LS1012*")
(
popup "DUART_2"
(
menuitem "UART_3"                                                                                   "per , ""DUART (Dual Universal Asynchronous Receiver/Transmitters),DUART_2,UART_3"""
menuitem "UART_4"                                                                                   "per , ""DUART (Dual Universal Asynchronous Receiver/Transmitters),DUART_2,UART_4"""
)
)
)
if !cpuis("LS1088*")&&!cpuis("LS1084*")&&!cpuis("LS1048*")&&!cpuis("LS1044*")
(
menuitem "eDMA;Enhanced Direct Memory Access"                                                               "per , ""eDMA (Enhanced Direct Memory Access)"""
)
if cpuis("LS1012*")
(
popup "eSDHC;Enhanced Secured Digital Host Controller"
(
menuitem "eSDHC 1"                                                                                      "per , ""eSDHC (Enhanced Secured Digital Host Controller),eSDHC 1"""
menuitem "eSDHC 2"                                                                                      "per , ""eSDHC (Enhanced Secured Digital Host Controller),eSDHC 2"""
)
)
else
(
menuitem "eSDHC;Enhanced Secured Digital Host Controller"                                                   "per , ""eSDHC (Enhanced Secured Digital Host Controller)"""
)
popup "FTM;FlexTimer Module"
(
menuitem "FTM_1"                                                                                            "per , ""FTM (FlexTimer Module),FTM_1"""
menuitem "FTM_2"                                                                                            "per , ""FTM (FlexTimer Module),FTM_2"""
if !cpuis("LS1012*")
(
menuitem "FTM_3"                                                                                        "per , ""FTM (FlexTimer Module),FTM_3"""
menuitem "FTM_4"                                                                                        "per , ""FTM (FlexTimer Module),FTM_4"""
if !cpuis("LS1088*")&&!cpuis("LS1084*")&&!cpuis("LS1048*")&&!cpuis("LS1044*")
(
menuitem "FTM_5"                                                                                    "per , ""FTM (FlexTimer Module),FTM_5"""
menuitem "FTM_6"                                                                                    "per , ""FTM (FlexTimer Module),FTM_6"""
menuitem "FTM_7"                                                                                    "per , ""FTM (FlexTimer Module),FTM_7"""
menuitem "FTM_8"                                                                                    "per , ""FTM (FlexTimer Module),FTM_8"""
)
)
)
popup "GPIO;General Purpose I/O"
(
menuitem "GPIO_1"                                                                                           "per , ""GPIO (General Purpose I/O),GPIO_1"""
menuitem "GPIO_2"                                                                                           "per , ""GPIO (General Purpose I/O),GPIO_2"""
if !cpuis("LS1012A")
(
menuitem "GPIO_3"                                                                                           "per , ""GPIO (General Purpose I/O),GPIO_3"""
menuitem "GPIO_4"                                                                                           "per , ""GPIO (General Purpose I/O),GPIO_4"""
)
)
if cpuis("LS10?3A")||cpuis("LS10?6A")||cpuis("LS1088*")||cpuis("LS1084*")||cpuis("LS1048*")||cpuis("LS1044*")
(
menuitem "IFC;Integrated Flash Controller"                                                                  "per , ""IFC (Integrated Flash Controller)"""
)
popup "I2C;Inter-Integrated Circuit"
(
menuitem "I2C_1"                                                                                            "per , ""I2C (Inter-Integrated Circuit),I2C_1"""
menuitem "I2C_2"                                                                                            "per , ""I2C (Inter-Integrated Circuit),I2C_2"""
if !cpuis("LS1012*")
(
menuitem "I2C_3"                                                                                            "per , ""I2C (Inter-Integrated Circuit),I2C_3"""
menuitem "I2C_4"                                                                                            "per , ""I2C (Inter-Integrated Circuit),I2C_4"""
)
)
if cpuis("LS10?3A")||cpuis("LS10?6A")
(
popup "LPUART;Low Power Universal Asynchronous Receiver/Transmitter"
(
menuitem "LPUART_1"                                                                                     "per , ""LPUART (Low Power Universal Asynchronous Receiver/Transmitter),LPUART_1"""
menuitem "LPUART_2"                                                                                     "per , ""LPUART (Low Power Universal Asynchronous Receiver/Transmitter),LPUART_2"""
menuitem "LPUART_3"                                                                                     "per , ""LPUART (Low Power Universal Asynchronous Receiver/Transmitter),LPUART_3"""
menuitem "LPUART_4"                                                                                     "per , ""LPUART (Low Power Universal Asynchronous Receiver/Transmitter),LPUART_4"""
menuitem "LPUART_5"                                                                                     "per , ""LPUART (Low Power Universal Asynchronous Receiver/Transmitter),LPUART_5"""
menuitem "LPUART_6"                                                                                     "per , ""LPUART (Low Power Universal Asynchronous Receiver/Transmitter),LPUART_6"""
)
)
if cpuis("LS1012A")
(
menuitem "MMDC;Multi Mode DDR Controller"                                                                   "per , ""MMDC (Multi Mode DDR Controller)"""
)
if cpuis("LS1012*")
(
popup "I2S/SAI;Integrated Interchip Sound/Synchronous Audio Interface"
(
menuitem "SAI1"                                                                                         "per , ""I2S/SAI (Integrated Interchip Sound/Synchronous Audio Interface),SAI1"""
menuitem "SAI2"                                                                                         "per , ""I2S/SAI (Integrated Interchip Sound/Synchronous Audio Interface),SAI2"""
menuitem "SAI3"                                                                                         "per , ""I2S/SAI (Integrated Interchip Sound/Synchronous Audio Interface),SAI3"""
menuitem "SAI4"                                                                                         "per , ""I2S/SAI (Integrated Interchip Sound/Synchronous Audio Interface),SAI4"""
menuitem "SAI5"                                                                                         "per , ""I2S/SAI (Integrated Interchip Sound/Synchronous Audio Interface),SAI5"""
)
)
popup "PCI-E;PCI Express"
(
menuitem "PCI_1"                                                                                            "per , ""PCI-E (PCI Express),PCI_1"""
if !cpuis("LS1012*")
(
menuitem "PCI_2"                                                                                            "per , ""PCI-E (PCI Express),PCI_2"""
menuitem "PCI_3"                                                                                            "per , ""PCI-E (PCI Express),PCI_3"""
)
)
if cpuis("LS1088*")||cpuis("LS1084*")||cpuis("LS1048*")||cpuis("LS1044*")
(
popup "PMU;Power Management Unit"
(
menuitem "PMU_ARM"                                                                                      "per , ""PMU (Power Management Unit),PMU_ARM"""
menuitem "PMU_SOC"                                                                                      "per , ""PMU (Power Management Unit),PMU_SOC"""
menuitem "DP_PMU_PPC"                                                                                   "per , ""PMU (Power Management Unit),DP_PMU_PPC"""
)
)
menuitem "QuadSPI;Quad Serial Peripheral Interface"                                                             "per , ""QuadSPI (Quad Serial Peripheral Interface)"""
if cpuis("LS10?3*")||cpuis("LS10?6*")
(
menuitem "qDMA;Queue Direct Memory Access"                                                                  "per , ""qDMA (Queue Direct Memory Access)"""
)
if !cpuis("LS1088*")&&!cpuis("LS1084*")&&!cpuis("LS1048*")&&!cpuis("LS1044*")
(
menuitem "SATA 3.0 AHCI;Advanced Host Controller Interface for Serial Advanced Technology Attachment 3.0"   "per , ""SATA 3.0 AHCI (Advanced Host Controller Interface for Serial Advanced Technology Attachment 3.0)"""
)
else
(
popup "SATA 3.0 AHCI;Advanced Host Controller Interface for Serial Advanced Technology Attachment 3.0"
(
menuitem "SATA 1"                                                                                       "per , ""SATA 3.0 AHCI (Advanced Host Controller Interface for Serial Advanced Technology Attachment 3.0),SATA 1"""
menuitem "SATA 2"                                                                                       "per , ""SATA 3.0 AHCI (Advanced Host Controller Interface for Serial Advanced Technology Attachment 3.0),SATA 2"""
)
)
popup "SerDes"
(
menuitem "SerDes 1"                                                                                         "per , ""SerDes,SerDes 1"""
if !cpuis("LS1012*")&&!cpuis("LS10?3*")
(
menuitem "SerDes 2"                                                                                     "per , ""SerDes,SerDes 2"""
)
)
menuitem "SPI;Serial Peripheral Interface"                                                                      "per , ""SPI (Serial Peripheral Interface)"""
menuitem "TMU;Thermal Monitoring Unit"                                                                          "per , ""TMU (Thermal Monitoring Unit)"""
if cpuis("LS1012*")
(
menuitem "USB 2.0;Universal Serial Bus Interface 2.0"                                                       "per , ""USB 2.0 (Universal Serial Bus Interface 2.0)"""
)
popup "USB 3.0;Universal Serial Bus Interface 3.0"
(
menuitem "USB 1"                                                                                            "per , ""USB 3.0 (Universal Serial Bus Interface 3.0),USB 1"""
if !cpuis("LS1012*")&&!cpuis("LS10?6*")
(
menuitem "USB 2"                                                                                        "per , ""USB 3.0 (Universal Serial Bus Interface 3.0),USB 2"""
if !cpuis("LS1088*")&&!cpuis("LS1084*")&&!cpuis("LS1048*")&&!cpuis("LS1044*")
(
menuitem "USB 3"                                                                                    "per , ""USB 3.0 (Universal Serial Bus Interface 3.0),USB 3"""
)
)
)
popup "USB PHY SuperSpeed"
(
menuitem "USB3 PHY 1"                                                                                       "per , ""USB PHY SuperSpeed,USB3 PHY 1"""
if !cpuis("LS1012*")&&!cpuis("LS10?6*")
(
menuitem "USB3 PHY 2"                                                                                   "per , ""USB PHY SuperSpeed,USB3 PHY 2"""
if !cpuis("LS1088*")&&!cpuis("LS1084*")&&!cpuis("LS1048*")&&!cpuis("LS1044*")
(
menuitem "USB3 PHY 3"                                                                               "per , ""USB PHY SuperSpeed,USB3 PHY 3"""
)
)
)
popup "WDOG;Watchdog Timer"
(
menuitem "WDOG_1"                                                                                           "per , ""WDOG (Watchdog Timer),WDOG_1"""
if !cpuis("LS1012*")&&!cpuis("LS10?6*")
(
menuitem "WDOG_2"                                                                                       "per , ""WDOG (Watchdog Timer),WDOG_2"""
menuitem "WDOG_3"                                                                                       "per , ""WDOG (Watchdog Timer),WDOG_3"""
menuitem "WDOG_4"                                                                                       "per , ""WDOG (Watchdog Timer),WDOG_4"""
menuitem "WDOG_5"                                                                                       "per , ""WDOG (Watchdog Timer),WDOG_5"""
if !cpuis("LS10?3*")
(
menuitem "WDOG_6"                                                                                   "per , ""WDOG (Watchdog Timer),WDOG_6"""
menuitem "WDOG_7"                                                                                   "per , ""WDOG (Watchdog Timer),WDOG_7"""
menuitem "WDOG_8"                                                                                   "per , ""WDOG (Watchdog Timer),WDOG_8"""
)
)
)
)
)