; @Title: KEAx Specific Menu
; @Props: Released
; @Author: BUJ, CIN, DAW, MAR, RAF, MAF
; @Changelog: 2011-06-20 MAR
;             2013-01-16 MAR
;             2017-01-04 MAF
; @Manufacturer: NXP - NXP Semiconductors
; @Core: Cortex-M0P
; @Chip: S9KEAZN8AMTG,  S9KEAZN8ACTG,  S9KEAZN8AMFK,   S9KEAZN8AVTG
;        S9KEAZN8ACFK,  S9KEAZ64ACLH,  S9KEAZ128AMLK,  S9KEAZN8AMFKR
;        S9KEAZ128AMLH, S9KEAZ64AMLH,  S9KEAZ128ACLH,  S9KEAZ128AVLH
;        S9KEAZ64AVLH,  S9KEAZN64ACLH, S9KEAZ128AVLHR, S9KEAZ64AMLK
;        S9KEAZN16AMLC, S9KEAZN32ACLC, S9KEAZN32AMLH,  S9KEAZN64AMLH
;        S9KEAZ128ACLK, S9KEAZ128AVLK, S9KEAZ64ACLK,   S9KEAZ64AVLK
;        S9KEAZN32AMLC, S9KEAZN64AMLC, S9KEAZN64ACLC,  S9KEAZN16ACLC
;        S9KEAZN32AVLC, S9KEAZN16ACLH, S9KEAZN32ACLH,  S9KEAZN16AMLH
; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menkinetisea.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
popup "[:chip]Core Registers (Cortex-M0+)"
(
menuitem "[:chip]System Control"                                  "per , ""Core Registers (Cortex-M0+),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit"                      "per , ""Core Registers (Cortex-M0+),Memory Protection Unit (MPU)"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller"       "per , ""Core Registers (Cortex-M0+),Nested Vectored Interrupt Controller (NVIC)"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                  "per , ""Core Registers (Cortex-M0+),Debug,Core Debug"""
menuitem "[:chip]BPU;Breakpoint Unit"                         "per , ""Core Registers (Cortex-M0+),Debug,Breakpoint Unit (BPU)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"          "per , ""Core Registers (Cortex-M0+),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
separator
menuitem "PORT"                                               "per , ""PORT (Port Control)"""
menuitem "SIM"                                                "per , ""SIM (System Integration Module)"""
menuitem "PMC"                                                "per , ""PMC (Power Management Controller)"""
menuitem "MCM"                                                "per , ""MCM (Miscellaneous Control Module)"""
menuitem "WDOG"                                               "per , ""WDOG (Watchdog Timer)"""
if cpuis("S9KEAZN8AMTG")||cpuis("S9KEAZN8ACTG")||cpuis("S9KEAZN8AMFK")||cpuis("S9KEAZN8ACFK")||cpuis("S9KEAZ128AMLH")||cpuis("S9KEAZ64AMLH")||cpuis("S9KEAZ128ACLH")||cpuis("S9KEAZ128AVLH")||cpuis("S9KEAZ64ACLH")||cpuis("S9KEAZ64AVLH")||cpuis("S9KEAZN64ACLH")||cpuis("S9KEAZ128AVLHR")||cpuis("S9KEAZ64AMLK")||cpuis("S9KEAZ128AMLK")||cpuis("S9KEAZ128ACLK")||cpuis("S9KEAZ128AVLK")||cpuis("S9KEAZ64ACLK")||cpuis("S9KEAZ64AVLK")
(
menuitem "FTMRE"                                              "per , ""FTMRE (Flash Memory Module)"""
)
else
(
menuitem "FTMRH"                                              "per , ""FTMRH (Flash Memory Module)"""
)
menuitem "ICS"                                                "per , ""ICS (Internal Clock Source)"""
menuitem "OSC"                                                "per , ""OSC (Oscillator)"""
menuitem "CRC"                                                "per , ""CRC (Cyclic Redundancy Check)"""
menuitem "IRQ"                                                "per , ""IRQ (Interrupt)"""
menuitem "ADC"                                                "per , ""ADC (A/C Control Registers)"""
menuitem "ACMP"                                               "per , ""ACMP (Analog Comparator)"""
menuitem "FTM"                                                "per , ""FTM (FlexTimer)"""
if CPUIS("S9KEAZN8AMTG")||CPUIS("S9KEAZN8ACTG")||CPUIS("S9KEAZN8AMFK")||CPUIS("S9KEAZN8ACFK")||CPUIS("S9KEAZ128AMLH")||CPUIS("S9KEAZ64AMLH")||CPUIS("S9KEAZ128ACLH")||CPUIS("S9KEAZ128AVLH")||CPUIS("S9KEAZ64ACLH")||CPUIS("S9KEAZ64AVLH")||CPUIS("S9KEAZN64ACLH")||CPUIS("S9KEAZ128AVLHR")||CPUIS("S9KEAZ64AMLK")||CPUIS("S9KEAZ128AMLK")||CPUIS("S9KEAZ128ACLK")||CPUIS("S9KEAZ128AVLK")||CPUIS("S9KEAZ64ACLK")||CPUIS("S9KEAZ64AVLK")
(
menuitem "PWT"                                                "per , ""PWT (Pulse Width Timer)"""
)
menuitem "PIT"                                                "per , ""PIT (Periodic Interrupt Timer)"""
menuitem "RTC"                                                "per , ""RTC (Real-Time Counter)"""
menuitem "SPI"                                                "per , ""SPI (Serial Peripheral Interface)"""
menuitem "I2C"                                                "per , ""I2C (Inter-Integrated Circuit)"""
if CPUIS("S9KEAZ128AMLH")||CPUIS("S9KEAZ64AMLH")||CPUIS("S9KEAZ128ACLH")||CPUIS("S9KEAZ128AVLH")||CPUIS("S9KEAZ64ACLH")||CPUIS("S9KEAZ64AVLH")||CPUIS("S9KEAZ128AVLHR")||CPUIS("S9KEAZ64AMLK")||CPUIS("S9KEAZ128AMLK")||CPUIS("S9KEAZ128ACLK")||CPUIS("S9KEAZ128AVLK")||CPUIS("S9KEAZ64ACLK")||CPUIS("S9KEAZ64AVLK")
(
menuitem "MSCAN"                                              "per , ""MSCAN (Scalable Controller Area Network)"""
)
menuitem "UART"                                               "per , ""UART (Universal Asynchronous Receiver/Transmitter)"""
menuitem "GPIO"                                               "per , ""GPIO (General-Purpose Input/Output)"""
menuitem "KBI"                                                "per , ""KBI (Keyboard Interrupts)"""
)
)