; --------------------------------------------------------------------------------
; @Title: GD32F10x Specific Menu
; @Props: Released
; @Author: KMB, ADR, DAB, KRZ
; @Changelog: 2021-08-12 KMB
;             2022-01-24 DAB
;             2023-02-22 KRZ
; @Manufacturer: GigaDevice - GigaDevice Semiconductor Inc.
; @Core: Cortex-M3
; @Chip: GD32F101V8, GD32F101VB, GD32F101VC, GD32F101VD, GD32F101VE,
;        GD32F101VF, GD32F101VG, GD32F101VI, GD32F101VK, GD32F101ZC,
;        GD32F101ZD, GD32F101ZE, GD32F101ZF, GD32F101ZG, GD32F101ZI,
;        GD32F101ZK, GD32F103V8, GD32F103VB, GD32F103VC, GD32F103VD,
;        GD32F103VE, GD32F103VF, GD32F103VG, GD32F103VI, GD32F103VK,
;        GD32F103ZC, GD32F103ZD, GD32F103ZE, GD32F103ZF, GD32F103ZG,
;        GD32F105V8, GD32F105VB, GD32F105VC, GD32F105VD, GD32F105VE,
;        GD32F105VF, GD32F105VG, GD32F105ZC, GD32F105ZD, GD32F105ZE,
;        GD32F105ZF, GD32F105ZG, GD32F107VB, GD32F107VC, GD32F107VD,
;        GD32F107VE, GD32F107VF, GD32F107VG, GD32F107ZC, GD32F107ZD,
;        GD32F107ZE, GD32F107ZF, GD32F107ZG, GD32F101C4, GD32F101C6,
;        GD32F101C8, GD32F101CB, GD32F101R4, GD32F101R6, GD32F101R8,
;        GD32F101RB, GD32F101RC, GD32F101RD, GD32F101RE, GD32F101RF,
;        GD32F101RG, GD32F101RI, GD32F101RK, GD32F101T4, GD32F101T6,
;        GD32F101T8, GD32F101TB, GD32F103C4, GD32F103C6, GD32F103C8,
;        GD32F103CB, GD32F103R4, GD32F103R6, GD32F103R8, GD32F103RB,
;        GD32F103RC, GD32F103RD, GD32F103RE, GD32F103RF, GD32F103RG,
;        GD32F103RI, GD32F103RK, GD32F103T4, GD32F103T6, GD32F103T8,
;        GD32F103TB, GD32F105R8, GD32F105RB, GD32F105RC, GD32F105RD,
;        GD32F105RE, GD32F105RF, GD32F105RG, GD32F107RB, GD32F107RC,
;        GD32F107RD, GD32F107RE, GD32F107RF, GD32F107RG, GD32F103ZI,
;        GD32F103ZK
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: mengd32f1.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
popup "[:chip]Core Registers (Cortex-M3)"
(
menuitem "[:chip]System Control"                                "per , ""Core Registers (Cortex-M3),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit"                    "per , ""Core Registers (Cortex-M3),Memory Protection Unit"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller"     "per , ""Core Registers (Cortex-M3),Nested Vectored Interrupt Controller"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                "per , ""Core Registers (Cortex-M3),Debug,Core Debug"""
menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit"       "per , ""Core Registers (Cortex-M3),Debug,Flash Patch and Breakpoint Unit (FPB)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"        "per , ""Core Registers (Cortex-M3),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
separator
popup "ADC (Analog to digital converter)"
(
menuitem "ADC0"                 "per , ""ADC (Analog to digital converter),ADC0"""
menuitem "ADC1"                 "per , ""ADC (Analog to digital converter),ADC1"""
if cpuis("GD32F101?C")||cpuis("GD32F101?D")||cpuis("GD32F101?E")||cpuis("GD32F103?C")||cpuis("GD32F103?D")||cpuis("GD32F103?E")||cpuis("GD32F101?F")||cpuis("GD32F101?G")||cpuis("GD32F101?I")||cpuis("GD32F101?K")||cpuis("GD32F103?F")||cpuis("GD32F103?G")||cpuis("GD32F103?I")||cpuis("GD32F103?K")
(
menuitem "ADC2"             "per , ""ADC (Analog to digital converter),ADC2"""
)
)
menuitem "AFIO"                     "per , ""AFIO (Alternate-function I/Os)"""
menuitem "BKP"                      "per , ""BKP (Backup registers)"""
popup "CAN (Controller area network)"
(
if cpuis("GD32F101?C")||cpuis("GD32F101?D")||cpuis("GD32F101?E")||cpuis("GD32F103?C")||cpuis("GD32F103?D")||cpuis("GD32F103?E")||cpuis("GD32F101?4")||cpuis("GD32F101?6")||cpuis("GD32F101?8")||cpuis("GD32F101?B")||cpuis("GD32F103?4")||cpuis("GD32F103?6")||cpuis("GD32F103?8")||cpuis("GD32F103?B")||cpuis("GD32F101?F")||cpuis("GD32F101?G")||cpuis("GD32F101?I")||cpuis("GD32F101?K")||cpuis("GD32F103?F")||cpuis("GD32F103?G")||cpuis("GD32F103?I")||cpuis("GD32F103?K")
(
menuitem "CAN"              "per , ""CAN (Controller area network),CAN"""
)
if cpuis("GD32F107*")||cpuis("GD32F105*")
(
menuitem "CAN0"             "per , ""CAN (Controller area network),CAN0"""
menuitem "CAN1"             "per , ""CAN (Controller area network),CAN1"""
)
)
menuitem "CRC"                      "per , ""CRC (cyclic redundancy check calculation unit)"""
menuitem "DAC"                      "per , ""DAC (Digital-to-analog converter)"""
menuitem "DBG"                      "per , ""DBG (Debug support)"""
popup "DMA (DMA controller)"
(
menuitem "DMA0"                 "per , ""DMA (DMA controller),DMA0"""
if cpuis("GD32F107*")||cpuis("GD32F105*")||cpuis("GD32F101?C")||cpuis("GD32F101?D")||cpuis("GD32F101?E")||cpuis("GD32F103?C")||cpuis("GD32F103?D")||cpuis("GD32F103?E")||cpuis("GD32F101?F")||cpuis("GD32F101?G")||cpuis("GD32F101?I")||cpuis("GD32F101?K")||cpuis("GD32F103?F")||cpuis("GD32F103?G")||cpuis("GD32F103?I")||cpuis("GD32F103?K")
(
menuitem "DMA1"             "per , ""DMA (DMA controller),DMA1"""
)
)
if cpuis("GD32F107*")||cpuis("GD32F105*")
(
popup "ENET (Ethernet MAC)"
(
menuitem "ENET_DMA"         "per , ""ENET (Ethernet MAC),ENET_DMA"""
menuitem "ENET_MAC"         "per , ""ENET (Ethernet MAC),ENET_MAC"""
menuitem "ENET_MAC_FCTH"    "per , ""ENET (Ethernet MAC),ENET_MAC_FCTH"""
menuitem "ENET_MSC"         "per , ""ENET (Ethernet MAC),ENET_MSC"""
menuitem "ENET_PTP"         "per , ""ENET (Ethernet MAC),ENET_PTP"""
)
)
menuitem "EXMC"                     "per , ""EXMC (External memory controller)"""
menuitem "EXTI"                     "per , ""EXTI (External interrupt/event controller)"""
menuitem "FMC"                      "per , ""FMC"""
menuitem "FWDGT"                    "per , ""FWDGT (free watchdog timer)"""
popup "GPIO (General Purpose I/O Ports And Peripheral I/O Lines)"
(
menuitem "GPIOA"                "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOA"""
menuitem "GPIOB"                "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOB"""
menuitem "GPIOC"                "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOC"""
menuitem "GPIOD"                "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOD"""
menuitem "GPIOE"                "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOE"""
menuitem "GPIOF"                "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOF"""
menuitem "GPIOG"                "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOG"""
)
popup "I2C (Inter-Integrated Circuit)"
(
menuitem "I2C0"                 "per , ""I2C (Inter-Integrated Circuit),I2C0"""
menuitem "I2C1"                 "per , ""I2C (Inter-Integrated Circuit),I2C1"""
)
menuitem "NVIC"                     "per , ""NVIC (Nested Vectored Interrupt Controller)"""
menuitem "PMU"                      "per , ""PMU (Program Memory Unit)"""
menuitem "RCU"                      "per , ""RCU (Reset and clock unit)"""
menuitem "RTC"                      "per , ""RTC (Real-time Counter)"""
if cpuis("GD32F101?C")||cpuis("GD32F101?D")||cpuis("GD32F101?E")||cpuis("GD32F103?C")||cpuis("GD32F103?D")||cpuis("GD32F103?E")||cpuis("GD32F101?F")||cpuis("GD32F101?G")||cpuis("GD32F101?I")||cpuis("GD32F101?K")||cpuis("GD32F103?F")||cpuis("GD32F103?G")||cpuis("GD32F103?I")||cpuis("GD32F103?K")
(
menuitem "SDIO"                 "per , ""SDIO (Secure digital input/output interface),SDIO"""
)
popup "SPI (Serial peripheral interface)"
(
menuitem "SPI0"                 "per , ""SPI (Serial peripheral interface),SPI0"""
menuitem "SPI1"                 "per , ""SPI (Serial peripheral interface),SPI1"""
if cpuis("GD32F107*")||cpuis("GD32F105*")||cpuis("GD32F101?C")||cpuis("GD32F101?D")||cpuis("GD32F101?E")||cpuis("GD32F103?C")||cpuis("GD32F103?D")||cpuis("GD32F103?E")||cpuis("GD32F101?F")||cpuis("GD32F101?G")||cpuis("GD32F101?I")||cpuis("GD32F101?K")||cpuis("GD32F103?F")||cpuis("GD32F103?G")||cpuis("GD32F103?I")||cpuis("GD32F103?K")
(
menuitem "SPI2"             "per , ""SPI (Serial peripheral interface),SPI2"""
)
)
popup "TIMER (Timer/Counter)"
(
menuitem "TIMER0"               "per , ""TIMER (Timer/Counter),TIMER0"""
menuitem "TIMER1"               "per , ""TIMER (Timer/Counter),TIMER1"""
menuitem "TIMER2"               "per , ""TIMER (Timer/Counter),TIMER2"""
menuitem "TIMER3"               "per , ""TIMER (Timer/Counter),TIMER3"""
if cpuis("GD32F107*")||cpuis("GD32F105*")||cpuis("GD32F101?C")||cpuis("GD32F101?D")||cpuis("GD32F101?E")||cpuis("GD32F103?C")||cpuis("GD32F103?D")||cpuis("GD32F103?E")||cpuis("GD32F101?F")||cpuis("GD32F101?G")||cpuis("GD32F101?I")||cpuis("GD32F101?K")||cpuis("GD32F103?F")||cpuis("GD32F103?G")||cpuis("GD32F103?I")||cpuis("GD32F103?K")
(
menuitem "TIMER4"           "per , ""TIMER (Timer/Counter),TIMER4"""
menuitem "TIMER5"           "per , ""TIMER (Timer/Counter),TIMER5"""
menuitem "TIMER6"           "per , ""TIMER (Timer/Counter),TIMER6"""
menuitem "TIMER7"           "per , ""TIMER (Timer/Counter),TIMER7"""
)
if cpuis("GD32F101?F")||cpuis("GD32F101?G")||cpuis("GD32F101?I")||cpuis("GD32F101?K")||cpuis("GD32F103?F")||cpuis("GD32F103?G")||cpuis("GD32F103?I")||cpuis("GD32F103?K")
(
menuitem "TIMER8"           "per , ""TIMER (Timer/Counter),TIMER8"""
menuitem "TIMER9"           "per , ""TIMER (Timer/Counter),TIMER9"""
menuitem "TIMER10"          "per , ""TIMER (Timer/Counter),TIMER10"""
menuitem "TIMER11"          "per , ""TIMER (Timer/Counter),TIMER11"""
menuitem "TIMER12"          "per , ""TIMER (Timer/Counter),TIMER12"""
menuitem "TIMER13"          "per , ""TIMER (Timer/Counter),TIMER13"""
)
)
if cpuis("GD32F107*")||cpuis("GD32F105*")||cpuis("GD32F101?C")||cpuis("GD32F101?D")||cpuis("GD32F101?E")||cpuis("GD32F103?C")||cpuis("GD32F103?D")||cpuis("GD32F103?E")||cpuis("GD32F101?F")||cpuis("GD32F101?G")||cpuis("GD32F101?I")||cpuis("GD32F101?K")||cpuis("GD32F103?F")||cpuis("GD32F103?G")||cpuis("GD32F103?I")||cpuis("GD32F103?K")
(
popup "UART (Universal Asynchronous Receiver/Transmitter)"
(
menuitem "UART3"            "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART3"""
menuitem "UART4"            "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART4"""
)
)
popup "USART (Universal synchronous asynchronous receiver transmitter)"
(
menuitem "USART0"               "per , ""USART (Universal synchronous asynchronous receiver transmitter),USART0"""
menuitem "USART1"               "per , ""USART (Universal synchronous asynchronous receiver transmitter),USART1"""
menuitem "USART2"               "per , ""USART (Universal synchronous asynchronous receiver transmitter),USART2"""
)
if cpuis("GD32F101?C")||cpuis("GD32F101?D")||cpuis("GD32F101?E")||cpuis("GD32F103?C")||cpuis("GD32F103?D")||cpuis("GD32F103?E")||cpuis("GD32F101?4")||cpuis("GD32F101?6")||cpuis("GD32F101?8")||cpuis("GD32F101?B")||cpuis("GD32F103?4")||cpuis("GD32F103?6")||cpuis("GD32F103?8")||cpuis("GD32F103?B")||cpuis("GD32F101?F")||cpuis("GD32F101?G")||cpuis("GD32F101?I")||cpuis("GD32F101?K")||cpuis("GD32F103?F")||cpuis("GD32F103?G")||cpuis("GD32F103?I")||cpuis("GD32F103?K")
(
menuitem "USBD"                 "per , ""USBD (Universal Serial Bus Device),USBD"""
)
if cpuis("GD32F107*")||cpuis("GD32F105*")
(
popup "USBFS (USB on the go full speed device)"
(
menuitem "USBFS_DEVICE"     "per , ""USBFS (USB on the go full speed device),USBFS_DEVICE"""
menuitem "USBFS_GLOBAL"     "per , ""USBFS (USB on the go full speed device),USBFS_GLOBAL"""
menuitem "USBFS_HOST"       "per , ""USBFS (USB on the go full speed device),USBFS_HOST"""
menuitem "USBFS_PWRCLK"     "per , ""USBFS (USB on the go full speed device),USBFS_PWRCLK"""
)
)
menuitem "WWDGT"                    "per , ""WWDGT (Window watchdog timer)"""
)
)