; --------------------------------------------------------------------------------
; @Title: BCM2835 Specific Menu
; @Props: Released
; @Author: JRK
; @Changelog: 2016-12-07 JRK
; @Manufacturer: BROADCOM - Broadcom Corporation
; @Chip: BCM2835
; @Core: ARM1176
; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menbcm2835.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
popup "[:chip]Core Registers (ARM1176)"
(
menuitem "[:chip]ID Registers"                          "per , ""Core Registers (ARM1176),ID Registers"""
menuitem "[:chip]System Control and Configuration"      "per , ""Core Registers (ARM1176),System Control and Configuration"""
menuitem "[:chip]MMU Control and Configuration"         "per , ""Core Registers (ARM1176),MMU Control and Configuration"""
menuitem "[:chip]Cache Control and Configuration"       "per , ""Core Registers (ARM1176),Cache Control and Configuration"""
menuitem "[:chip]TCM Control and Configuration"         "per , ""Core Registers (ARM1176),TCM Control and Configuration"""
menuitem "[:chip]DMA Control"                           "per , ""Core Registers (ARM1176),DMA Control"""
menuitem "[:chip]System Performance Monitor"            "per , ""Core Registers (ARM1176),System Performance Monitor"""
menuitem "[:chip]System Validation"                     "per , ""Core Registers (ARM1176),System Validation"""
separator
menuitem "[:chip]Debug Access to Caches and TLB"        "per , ""Core Registers (ARM1176),Debug Access to Caches and TLB"""
menuitem "[:chip]Debug"                                 "per , ""Core Registers (ARM1176),Debug"""
menuitem "[:chip]Breakpoints"                           "per , ""Core Registers (ARM1176),Breakpoints"""
menuitem "[:chip]Watchpoints"                           "per , ""Core Registers (ARM1176),Watchpoints"""
)
separator
menuitem "Auxiliaries"                              "per , ""Auxiliaries"""
popup "BSC (Broadcom Serial Controller)"
(
menuitem "BSC0"                                 "per , ""BSC (Broadcom Serial Controller),BSC0"""
menuitem "BSC1"                                 "per , ""BSC (Broadcom Serial Controller),BSC1"""
)
popup "DMA (Direct Memory Access)"
(
menuitem "DMA Channel 0"                        "per , ""DMA (Direct Memory Access),DMA Channel 0"""
menuitem "DMA Channel 1"                        "per , ""DMA (Direct Memory Access),DMA Channel 1"""
menuitem "DMA Channel 2"                        "per , ""DMA (Direct Memory Access),DMA Channel 2"""
menuitem "DMA Channel 3"                        "per , ""DMA (Direct Memory Access),DMA Channel 3"""
menuitem "DMA Channel 4"                        "per , ""DMA (Direct Memory Access),DMA Channel 4"""
menuitem "DMA Channel 5"                        "per , ""DMA (Direct Memory Access),DMA Channel 5"""
menuitem "DMA Channel 6"                        "per , ""DMA (Direct Memory Access),DMA Channel 6"""
menuitem "DMA Channel 7"                        "per , ""DMA (Direct Memory Access),DMA Channel 7"""
menuitem "DMA Channel 8"                        "per , ""DMA (Direct Memory Access),DMA Channel 8"""
menuitem "DMA Channel 9"                        "per , ""DMA (Direct Memory Access),DMA Channel 9"""
menuitem "DMA Channel 10"                       "per , ""DMA (Direct Memory Access),DMA Channel 10"""
menuitem "DMA Channel 11"                       "per , ""DMA (Direct Memory Access),DMA Channel 11"""
menuitem "DMA Channel 12"                       "per , ""DMA (Direct Memory Access),DMA Channel 12"""
menuitem "DMA Channel 13"                       "per , ""DMA (Direct Memory Access),DMA Channel 13"""
menuitem "DMA Channel 14"                       "per , ""DMA (Direct Memory Access),DMA Channel 14"""
menuitem "DMA Channel 15"                       "per , ""DMA (Direct Memory Access),DMA Channel 15"""
menuitem "DMA Global Registers"                 "per , ""DMA (Direct Memory Access),DMA Global Registers"""
)
menuitem "EMMC (External Mass Media Controller)"    "per , ""EMMC (External Mass Media Controller)"""
menuitem "GPIO (General Purpose I/O)"               "per , ""GPIO (General Purpose I/O)"""
menuitem "Interrupts"                               "per , ""Interrupts"""
menuitem "PCM / I2S Audio"                          "per , ""PCM / I2S Audio"""
menuitem "PWM (Pulse Width Modulator)"              "per , ""PWM (Pulse Width Modulator)"""
menuitem "SPI (Serial Peripheral Interface)"        "per , ""SPI (Serial Peripheral Interface)"""
menuitem "SPI/BSC SLAVE"                            "per , ""SPI/BSC SLAVE"""
menuitem "System Timer"                             "per , ""System Timer"""
menuitem "UART"                                     "per , ""UART (Universal Asynchronous Receiver/Transmitter)"""
menuitem "ARM Timer"                                "per , ""ARM Timer"""
menuitem "USB"                                      "per , ""USB"""
)
)