; --------------------------------------------------------------------------------
; @Title: AT91SAM3Sxx Specific Menu
; @Props: Released
; @Author: DAN, EMK
; @Changelog: 2010-04-01
; @Manufacturer: ATMEL - Atmel Corporation
; @Core: Cortex-M3
; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menat91sam3s.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
popup "[:chip]Core Registers (Cortex-M3)"
(
menuitem "[:chip]System Control"                                "per , ""Core Registers (Cortex-M3),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit"                    "per , ""Core Registers (Cortex-M3),Memory Protection Unit"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller"     "per , ""Core Registers (Cortex-M3),Nested Vectored Interrupt Controller"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                "per , ""Core Registers (Cortex-M3),Debug,Core Debug"""
menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit"       "per , ""Core Registers (Cortex-M3),Debug,Flash Patch and Breakpoint Unit (FPB)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"        "per , ""Core Registers (Cortex-M3),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
separator
menuitem "RSTC"                         "per , ""RSTC (Reset Controller)"""
menuitem "Real-time Timer"              "per , ""Real-time Timer"""
menuitem "RTC"                          "per , ""RTC (Real-time Clock)"""
menuitem "WDT"                          "per , ""WDT (Watchdog Timer)"""
menuitem "SUPC"                         "per , ""SUPC (Supply Controller)"""
menuitem "EEFC"                         "per , ""EEFC (Enhanced Embedded Flash Controller)"""
menuitem "CRCCU"                        "per , ""CRCCU (Cyclic Redundancy Check Calculation Unit)"""
menuitem "MATRIX"                       "per , ""MATRIX (Bus Matrix)"""
menuitem "SMC"                          "per , ""SMC (Static Memory Controller)"""
menuitem "PMC"                          "per , ""PMC (Power Management Controller)"""
menuitem "CHIPID"                       "per , ""CHIPID (Chip Identifier)"""
popup "PIO"
(
menuitem "Port A"                   "per , ""PIO (Parallel Input/Output),Port A"""
menuitem "Port B"                   "per , ""PIO (Parallel Input/Output),Port B"""
if (cpuis("AT91SAM3S*C")||cpuis("AT91SAM3S8B")||cpuis("AT91SAM3SD8B"))
(
menuitem "Port C"               "per , ""PIO (Parallel Input/Output),Port C"""
)
)
menuitem "SSC"                          "per , ""SSC (Synchronous Serial Controller)"""
menuitem "SPI"                          "per , ""SPI (Serial Peripheral Interface)"""
popup "TWI"
(
menuitem "TWI 0"                    "per , ""TWI (Two-wire Interface),TWI 0"""
menuitem "TWI 1"                    "per , ""TWI (Two-wire Interface),TWI 1"""
)
popup "UART"
(
menuitem "UART 0"                   "per , ""UART (Universal Asynchronous Receiver Transmitter),UART 0"""
menuitem "UART 1"                   "per , ""UART (Universal Asynchronous Receiver Transmitter),UART 1"""
)
menuitem "GPBR"                         "per , ""GPBR (General Purpose Backup Registers)"""
popup "USART"
(
menuitem "USART 0"                  "per , ""USART (Universal Synchronous Asynchronous Receiver Transmitter),USART 0"""
if ((cpuis("AT91SAM3S*B"))||(cpuis("AT91SAM3S*C")))
(
menuitem "USART 1"              "per , ""USART (Universal Synchronous Asynchronous Receiver Transmitter),USART 1"""
)
)
popup "TC"
(
menuitem "TC 0"                     "per , ""TC (Timer Counter),TC 0"""
menuitem "TC 1"                     "per , ""TC (Timer Counter),TC 1"""
)
if ((cpuis("AT91SAM3S*B"))||(cpuis("AT91SAM3S*C")))
(
menuitem "HSMCI"                    "per , ""HSMCI (High Speed MultiMedia Card Interface)"""
)
popup "PWM"
(
menuitem "Common Registers"         "per , ""PWM (Pulse Width Modulation Controller),Common Registers"""
menuitem "Comparison Registers"     "per , ""PWM (Pulse Width Modulation Controller),Comparison Registers"""
menuitem "Channel 0"                "per , ""PWM (Pulse Width Modulation Controller),Channel 0"""
menuitem "Channel 1"                "per , ""PWM (Pulse Width Modulation Controller),Channel 1"""
menuitem "Channel 2"                "per , ""PWM (Pulse Width Modulation Controller),Channel 2"""
menuitem "Channel 3"                "per , ""PWM (Pulse Width Modulation Controller),Channel 3"""
menuitem "PDC"                      "per , ""PWM (Pulse Width Modulation Controller),PDC (Peripheral DMA Controller)"""
)
menuitem "UDP"                          "per , ""UDP (USB Device Port)"""
menuitem "ACC"                          "per , ""ACC (Analog Comparator Controller)"""
menuitem "ADC"                          "per , ""ADC (Analog-to-Digital Converter)"""
menuitem "DACC"                         "per , ""DACC (Digital-to-Analog Converter Controller)"""
)
)