; -------------------------------------------------------------------------------- ; @Title: AM571x Specific Menu ; @Props: Released ; @Author: ASK, JON ; @Changelog: 2016-03-25 ASK ; 2016-10-11 ASK ; 2018-07-23 KOL ; 2022-05-24 JON ; @Manufacturer: TI - Texas Instruments ; @Core: Cortex-A15, Cortex-M4, ARM9, C646X, PRU ; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: menam571x.men 16339 2023-07-03 13:30:14Z pegold $ add menu ( if (!cpuis("AM571X-ICSS?")&&cpu()!="PRU") ( if (CPUFAMILY()=="C6000") ( popup "&CPU" ( after "FPU Registers" separator popup "[:cache]Cache" ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) popup "&Trace" ( IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("AET") ( menuitem "[:oconfig]AET settings..." "AET.state" ) ) popup "&Perf" ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) else ( IF SOFTWARE.BUILD.BASE()>=69655. ( popup "&CPU" ( separator IF CPU.FEATURE(MMU) ( popup "[:mmu]MMU" ( menuitem "[:mmureg]MMU Control" "MMU.view" separator menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable" menuitem "[:mmu]MMU Table List" "MMU.List.PageTable" separator IF CPU.FEATURE(ITLBDUMP) ( menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB" ) IF CPU.FEATURE(DTLBDUMP) ( menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB" ) IF CPU.FEATURE(TLB0DUMP) ( menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0" ) IF CPU.FEATURE(TLB1DUMP) ( menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1" ) ) ) IF COMPonent.AVAILable("SMMU") ( popup "[:mmu]SMMU" ( menuitem "[:chip]SMMU1 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU1 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.StreamMapTable &(name) ) IF COMPonent.AVAILable("SMMU2") ( separator menuitem "[:chip]SMMU2 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU2 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU3") ( separator menuitem "[:chip]SMMU3 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU3 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU4") ( separator menuitem "[:chip]SMMU4 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU4 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU5") ( separator menuitem "[:chip]SMMU5 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU5 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU6") ( separator menuitem "[:chip]SMMU6 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU6 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.StreamMapTable &(name) ) ) ) ) IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE) ( popup "[:cache]Cache" ( IF CPU.FEATURE(L1ICACHEDUMP) ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" ) IF CPU.FEATURE(L1DCACHEDUMP) ( separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" ) IF CPU.FEATURE(L2CACHEDUMP) ( separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) ) ) popup "&Trace" ( separator IF COMPonent.AVAILable("ITM") ( popup "ITM" ( default menuitem "[:oconfig]ITM settings..." "ITM.state" separator menuitem "[:alist]ITMTrace List" "ITMTrace.List" ) ) IF COMPonent.AVAILable("STM") ( popup "STM" ( default menuitem "[:oconfig]STM settings..." "STM.state" separator menuitem "[:alist]STMTrace List" "STMTrace.List" ) ) IF COMPonent.AVAILable("HTM") ( popup "HTM" ( default menuitem "[:oconfig]HTM settings..." "HTM.state" separator menuitem "[:alist]HTMTrace List" "HTMTrace.List" ) ) IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("ETR") ( menuitem "[:oconfig]ETR settings..." ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/embedded_trace_router/etr_utility.cmm" ) ) ) popup "&Misc" ( popup "Tools" ( IF CPUIS64BIT()||CPU.FEATURE("SPR") ( menuitem "ARM System Register Converter" ( DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm" ) ) IF CPU.FEATURE("C15") ( menuitem "ARM Coprocessor Converter" ( DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm" ) ) ) ) popup "&Perf" ( IF CPU.FEATURE(BMC) ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) ) ) popup "Peripherals" ( if cpuis("AM571X") ( popup "[:chip]Core Registers (Cortex-A15MPCore)" ( menuitem "[:chip]ID Registers" "per , ""Core Registers (Cortex-A15MPCore),ID Registers""" menuitem "[:chip]System Control and Configuration" "per , ""Core Registers (Cortex-A15MPCore),System Control and Configuration""" menuitem "[:chip]Memory Management Unit" "per , ""Core Registers (Cortex-A15MPCore),Memory Management Unit""" menuitem "[:chip]Virtualization Extensions" "per , ""Core Registers (Cortex-A15MPCore),Virtualization Extensions""" menuitem "[:chip]Cache Control and Configuration" "per , ""Core Registers (Cortex-A15MPCore),Cache Control and Configuration""" menuitem "[:chip]System Performance Monitor" "per , ""Core Registers (Cortex-A15MPCore),System Performance Monitor""" menuitem "[:chip]System Timer Register" "per , ""Core Registers (Cortex-A15MPCore),System Timer Register""" separator menuitem "[:chip]Debug Registers" "per , ""Core Registers (Cortex-A15MPCore),Debug Registers""" menuitem "[:chip]Breakpoint Registers" "per , ""Core Registers (Cortex-A15MPCore),Breakpoint Registers""" menuitem "[:chip]Watchpoint Control Registers" "per , ""Core Registers (Cortex-A15MPCore),Watchpoint Control Registers""" separator menuitem "[:chip]Interrupt Controller" "per , ""Core Registers (Cortex-A15MPCore),Interrupt Controller""" ) ) else if cpuis("AM571XIPU*") ( popup "[:chip]Core Registers (Cortex-M4)" ( menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M4),System Control""" menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M4),Memory Protection Unit""" menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M4),Nested Vectored Interrupt Controller""" popup "[:chip]Debug" ( menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M4),Debug,Core Debug""" menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M4),Debug,Flash Patch and Breakpoint Unit (FPB)""" menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M4),Debug,Data Watchpoint and Trace Unit (DWT)""" ) ) ) else if cpuis("AM571XDSP") ( popup "[:chip]Core Registers (c66x)" ( menuitem "[:chip]L1P;L1P Registers" "per , ""Core Registers (c66x),Cache,L1P Cache""" menuitem "[:chip]L1D;L1D Registers" "per , ""Core Registers (c66x),Cache,L1D Cache""" menuitem "[:chip]L2;L2 Registers" "per , ""Core Registers (c66x),Cache,L2 Cache""" menuitem "[:chip]IDMA;IDMA Registers" "per , ""Core Registers (c66x),IDMA (Internal Direct Memory Access Controller)""" menuitem "[:chip]XMC;XMC Registers" "per , ""Core Registers (c66x),XMC (Extended Memory Controller)""" menuitem "[:chip]BM;BM Registers" "per , ""Core Registers (c66x),Bandwith Management""" menuitem "[:chip]IC;IC Registers" "per , ""Core Registers (c66x),Interrupt Controller""" menuitem "[:chip]PD;PD Registers" "per , ""Core Registers (c66x),Power-Down Controller""" ) ) else if cpuis("AM571XIVA?") ( menuitem "[:chip]ARM966 Registers" "per , ""Core Registers (ARM966)""" ) separator menuitem "ALE" "per , ""ALE""" menuitem "ATL_TARG" "per , ""ATL_TARG""" menuitem "BB2D" "per , ""BB2D""" menuitem "BB2D_FW" "per , ""BB2D_FW""" menuitem "BB2D_TARG" "per , ""BB2D_TARG""" menuitem "CAL" "per , ""CAL""" menuitem "CAL_TARG" "per , ""CAL_TARG""" menuitem "CAM_PRM" "per , ""CAM_PRM""" menuitem "CAMERARX_CORE_0" "per , ""CAMERARX_CORE_0""" menuitem "CAMERARX_CORE_1" "per , ""CAMERARX_CORE_1""" menuitem "CFG_AP" "per , ""CFG_AP""" menuitem "CFG_IA_IP0" "per , ""CFG_IA_IP0""" menuitem "CFG_LA" "per , ""CFG_LA""" menuitem "CKGEN_PRM" "per , ""CKGEN_PRM""" menuitem "CLK1_2_BB2D_P1_BW_LIMITER" "per , ""CLK1_2_BB2D_P1_BW_LIMITER""" menuitem "CLK1_2_BB2D_P1_BW_REGULATOR" "per , ""CLK1_2_BB2D_P1_BW_REGULATOR""" menuitem "CLK1_2_BB2D_P2_BW_LIMITER" "per , ""CLK1_2_BB2D_P2_BW_LIMITER""" menuitem "CLK1_2_BB2D_P2_BW_REGULATOR" "per , ""CLK1_2_BB2D_P2_BW_REGULATOR""" menuitem "CLK1_2_DSP1_EDMA_BW_REGULATOR" "per , ""CLK1_2_DSP1_EDMA_BW_REGULATOR""" menuitem "CLK1_2_DSP1_MDMA_BW_REGULATOR" "per , ""CLK1_2_DSP1_MDMA_BW_REGULATOR""" menuitem "CLK1_2_GMAC_SW_BW_REGULATOR" "per , ""CLK1_2_GMAC_SW_BW_REGULATOR""" menuitem "CLK1_2_GPU_P1_BW_LIMITER" "per , ""CLK1_2_GPU_P1_BW_LIMITER""" menuitem "CLK1_2_GPU_P1_BW_REGULATOR" "per , ""CLK1_2_GPU_P1_BW_REGULATOR""" menuitem "CLK1_2_GPU_P2_BW_LIMITER" "per , ""CLK1_2_GPU_P2_BW_LIMITER""" menuitem "CLK1_2_GPU_P2_BW_REGULATOR" "per , ""CLK1_2_GPU_P2_BW_REGULATOR""" menuitem "CLK1_2_IVA_BW_REGULATOR" "per , ""CLK1_2_IVA_BW_REGULATOR""" menuitem "CLK1_2_MMU1_BW_LIMITER" "per , ""CLK1_2_MMU1_BW_LIMITER""" menuitem "CLK1_2_MMU2_BW_REGULATOR" "per , ""CLK1_2_MMU2_BW_REGULATOR""" menuitem "CLK1_2_PCIESS1_BW_REGULATOR" "per , ""CLK1_2_PCIESS1_BW_REGULATOR""" menuitem "CLK1_2_PCIESS2_BW_REGULATOR" "per , ""CLK1_2_PCIESS2_BW_REGULATOR""" menuitem "CLK1_2_TPTC1_RD_BW_LIMITER" "per , ""CLK1_2_TPTC1_RD_BW_LIMITER""" menuitem "CLK1_2_TPTC1_WR_BW_LIMITER" "per , ""CLK1_2_TPTC1_WR_BW_LIMITER""" menuitem "CLK1_2_TPTC2_RD_BW_LIMITER" "per , ""CLK1_2_TPTC2_RD_BW_LIMITER""" menuitem "CLK1_2_TPTC2_WR_BW_LIMITER" "per , ""CLK1_2_TPTC2_WR_BW_LIMITER""" menuitem "CLK1_2_VPE_P1_BW_LIMITER" "per , ""CLK1_2_VPE_P1_BW_LIMITER""" menuitem "CLK1_2_VPE_P2_BW_LIMITER" "per , ""CLK1_2_VPE_P2_BW_LIMITER""" menuitem "CLK1_FLAGMUX_CLK1" "per , ""CLK1_FLAGMUX_CLK1""" menuitem "CLK1_FLAGMUX_CLK1_1" "per , ""CLK1_FLAGMUX_CLK1_1""" menuitem "CLK1_FLAGMUX_CLK1_2" "per , ""CLK1_FLAGMUX_CLK1_2""" menuitem "CLK1_FLAGMUX_CLK1MERGE" "per , ""CLK1_FLAGMUX_CLK1MERGE""" menuitem "CLK1_HOST_CLK1_1" "per , ""CLK1_HOST_CLK1_1""" menuitem "CLK1_HOST_CLK1_2" "per , ""CLK1_HOST_CLK1_2""" menuitem "CLK2_FLAGMUX_CLK2" "per , ""CLK2_FLAGMUX_CLK2""" menuitem "CLK2_FLAGMUX_CLK2_1" "per , ""CLK2_FLAGMUX_CLK2_1""" menuitem "CLK2_FLAGMUX_STATCOLL" "per , ""CLK2_FLAGMUX_STATCOLL""" menuitem "CLK2_HOST_CLK2_1" "per , ""CLK2_HOST_CLK2_1""" menuitem "CLK2_STATCOLL2" "per , ""CLK2_STATCOLL2""" menuitem "CLK2_STATCOLL4" "per , ""CLK2_STATCOLL4""" menuitem "CLK2_STATCOLL6" "per , ""CLK2_STATCOLL6""" menuitem "CLK2_STATCOLL7" "per , ""CLK2_STATCOLL7""" menuitem "CLK2_STATCOLL8" "per , ""CLK2_STATCOLL8""" menuitem "CLK2_STATCOLL9" "per , ""CLK2_STATCOLL9""" menuitem "CLK2_STATCOLL0" "per , ""CLK2_STATCOLL0""" menuitem "CLK2_STATCOLL1" "per , ""CLK2_STATCOLL1""" menuitem "CLK2_STATCOLL5" "per , ""CLK2_STATCOLL5""" menuitem "CM_CORE__CAM" "per , ""CM_CORE__CAM""" menuitem "CM_CORE__CKGEN" "per , ""CM_CORE__CKGEN""" menuitem "CM_CORE__CORE" "per , ""CM_CORE__CORE""" menuitem "CM_CORE__COREAON" "per , ""CM_CORE__COREAON""" menuitem "CM_CORE__CUSTEFUSE" "per , ""CM_CORE__CUSTEFUSE""" menuitem "CM_CORE__DSS" "per , ""CM_CORE__DSS""" menuitem "CM_CORE__GPU" "per , ""CM_CORE__GPU""" menuitem "CM_CORE__IVA" "per , ""CM_CORE__IVA""" menuitem "CM_CORE__L3INIT" "per , ""CM_CORE__L3INIT""" menuitem "CM_CORE__L4PER" "per , ""CM_CORE__L4PER""" menuitem "CM_CORE__OCP_SOCKET" "per , ""CM_CORE__OCP_SOCKET""" menuitem "CM_CORE__RESTORE" "per , ""CM_CORE__RESTORE""" menuitem "CM_CORE_AON__CKGEN" "per , ""CM_CORE_AON__CKGEN""" menuitem "CM_CORE_AON__DSP1" "per , ""CM_CORE_AON__DSP1""" menuitem "CM_CORE_AON__DSP2" "per , ""CM_CORE_AON__DSP2""" menuitem "CM_CORE_AON__EVE1" "per , ""CM_CORE_AON__EVE1""" menuitem "CM_CORE_AON__EVE2" "per , ""CM_CORE_AON__EVE2""" menuitem "CM_CORE_AON__EVE3" "per , ""CM_CORE_AON__EVE3""" menuitem "CM_CORE_AON__EVE4" "per , ""CM_CORE_AON__EVE4""" menuitem "CM_CORE_AON__INSTR" "per , ""CM_CORE_AON__INSTR""" menuitem "CM_CORE_AON__IPU" "per , ""CM_CORE_AON__IPU""" menuitem "CM_CORE_AON__MPU" "per , ""CM_CORE_AON__MPU""" menuitem "CM_CORE_AON__OCP_SOCKET" "per , ""CM_CORE_AON__OCP_SOCKET""" menuitem "CM_CORE_AON__RESTORE" "per , ""CM_CORE_AON__RESTORE""" menuitem "CM_CORE_AON__RTC" "per , ""CM_CORE_AON__RTC""" menuitem "CM_CORE_AON__VPE" "per , ""CM_CORE_AON__VPE""" menuitem "CM_CORE_AON_TARG" "per , ""CM_CORE_AON_TARG""" menuitem "CM_CORE_TARG" "per , ""CM_CORE_TARG""" menuitem "CORE_PRM" "per , ""CORE_PRM""" menuitem "COREAON_PRM" "per , ""COREAON_PRM""" menuitem "COUNTER_32K_TARG" "per , ""COUNTER_32K_TARG""" menuitem "CPDMA" "per , ""CPDMA""" menuitem "CPTS" "per , ""CPTS""" menuitem "CTRL_MODULE_CORE" "per , ""CTRL_MODULE_CORE""" menuitem "CTRL_MODULE_CORE_TARG" "per , ""CTRL_MODULE_CORE_TARG""" menuitem "CTRL_MODULE_WKUP" "per , ""CTRL_MODULE_WKUP""" menuitem "CTRL_MODULE_WKUP_TARG" "per , ""CTRL_MODULE_WKUP_TARG""" menuitem "CUSTEFUSE_PRM" "per , ""CUSTEFUSE_PRM""" menuitem "DCAN1" "per , ""DCAN1""" menuitem "DCAN2" "per , ""DCAN2""" menuitem "DCAN1_TARG" "per , ""DCAN1_TARG""" menuitem "DCAN2_TARG" "per , ""DCAN2_TARG""" menuitem "DEBUGSS_CT_TBR_FW" "per , ""DEBUGSS_CT_TBR_FW""" menuitem "DEBUGSS_CT_TBR_FW_CFG_TARG" "per , ""DEBUGSS_CT_TBR_FW_CFG_TARG""" menuitem "DEBUGSS_CT_TBR_TARG" "per , ""DEBUGSS_CT_TBR_TARG""" menuitem "DEVICE_PRM" "per , ""DEVICE_PRM""" menuitem "DISPC" "per , ""DISPC""" menuitem "DMA_SYSTEM" "per , ""DMA_SYSTEM""" menuitem "DMA_SYSTEM_TARG" "per , ""DMA_SYSTEM_TARG""" menuitem "DMM" "per , ""DMM""" menuitem "DMM_P1_TARG" "per , ""DMM_P1_TARG""" menuitem "DMM_P2_TARG" "per , ""DMM_P2_TARG""" menuitem "DPLL_HDMI_L3_MAIN" "per , ""DPLL_HDMI_L3_MAIN""" menuitem "DPLL_HDMI_L4_CFG" "per , ""DPLL_HDMI_L4_CFG""" menuitem "DPLL_VIDEO1_L3_MAIN" "per , ""DPLL_VIDEO1_L3_MAIN""" menuitem "DPLL_VIDEO1_L4_CFG" "per , ""DPLL_VIDEO1_L4_CFG""" menuitem "DPLLCTRL_SATA" "per , ""DPLLCTRL_SATA""" menuitem "DPLLCTRL_USB_OTG_SS" "per , ""DPLLCTRL_USB_OTG_SS""" menuitem "DRM" "per , ""DRM""" menuitem "DSI1_A_L3_MAIN" "per , ""DSI1_A_L3_MAIN""" menuitem "DSP1_EDMA_CC" "per , ""DSP1_EDMA_CC""" menuitem "DSP1_EDMA_TC0" "per , ""DSP1_EDMA_TC0""" menuitem "DSP1_EDMA_TC1" "per , ""DSP1_EDMA_TC1""" menuitem "DSP1_FW_L2_NOC_CFG" "per , ""DSP1_FW_L2_NOC_CFG""" menuitem "DSP1_MMU0CFG" "per , ""DSP1_MMU0CFG""" menuitem "DSP1_MMU1CFG" "per , ""DSP1_MMU1CFG""" menuitem "DSP1_PRM" "per , ""DSP1_PRM""" menuitem "DSP1_SDMA_FW" "per , ""DSP1_SDMA_FW""" menuitem "DSP1_SDMA_FW_CFG_TARG" "per , ""DSP1_SDMA_FW_CFG_TARG""" menuitem "DSP1_SDMA_TARG" "per , ""DSP1_SDMA_TARG""" menuitem "DSP1_SYSTEM" "per , ""DSP1_SYSTEM""" menuitem "DSP2_PRM" "per , ""DSP2_PRM""" menuitem "DSS_FW" "per , ""DSS_FW""" menuitem "DSS_FW_CFG_TARG" "per , ""DSS_FW_CFG_TARG""" menuitem "DSS_L3_MAIN" "per , ""DSS_L3_MAIN""" menuitem "DSS_PRM" "per , ""DSS_PRM""" menuitem "DSS_TARG" "per , ""DSS_TARG""" menuitem "DWC_ahsata" "per , ""DWC_ahsata""" menuitem "EDMA_TPCC_FW" "per , ""EDMA_TPCC_FW""" menuitem "ELM" "per , ""ELM""" menuitem "ELM_TARG" "per , ""ELM_TARG""" menuitem "EMIF1" "per , ""EMIF1""" menuitem "EMIF_OCP_FW" "per , ""EMIF_OCP_FW""" menuitem "EMIF_OCP_FW_CFG_TARG" "per , ""EMIF_OCP_FW_CFG_TARG""" menuitem "EMU_CM" "per , ""EMU_CM""" menuitem "EMU_PRM" "per , ""EMU_PRM""" menuitem "EVE1_PRM" "per , ""EVE1_PRM""" menuitem "EVE2_PRM" "per , ""EVE2_PRM""" menuitem "EVE3_PRM" "per , ""EVE3_PRM""" menuitem "EVE4_PRM" "per , ""EVE4_PRM""" menuitem "GMAC_TARG" "per , ""GMAC_TARG""" menuitem "GPIO1" "per , ""GPIO1""" menuitem "GPIO2" "per , ""GPIO2""" menuitem "GPIO3" "per , ""GPIO3""" menuitem "GPIO4" "per , ""GPIO4""" menuitem "GPIO5" "per , ""GPIO5""" menuitem "GPIO6" "per , ""GPIO6""" menuitem "GPIO7" "per , ""GPIO7""" menuitem "GPIO8" "per , ""GPIO8""" menuitem "GPIO1_TARG" "per , ""GPIO1_TARG""" menuitem "GPIO2_TARG" "per , ""GPIO2_TARG""" menuitem "GPIO3_TARG" "per , ""GPIO3_TARG""" menuitem "GPIO4_TARG" "per , ""GPIO4_TARG""" menuitem "GPIO5_TARG" "per , ""GPIO5_TARG""" menuitem "GPIO6_TARG" "per , ""GPIO6_TARG""" menuitem "GPIO7_TARG" "per , ""GPIO7_TARG""" menuitem "GPIO8_TARG" "per , ""GPIO8_TARG""" menuitem "GPMC" "per , ""GPMC""" menuitem "GPMC_FW" "per , ""GPMC_FW""" menuitem "GPMC_FW_CFG_TARG" "per , ""GPMC_FW_CFG_TARG""" menuitem "GPMC_TARG" "per , ""GPMC_TARG""" menuitem "GPU_FW" "per , ""GPU_FW""" menuitem "GPU_FW_CFG_TARG" "per , ""GPU_FW_CFG_TARG""" menuitem "GPU_PRM" "per , ""GPU_PRM""" menuitem "GPU_TARG" "per , ""GPU_TARG""" menuitem "GPU_WRAPPER" "per , ""GPU_WRAPPER""" menuitem "HDMI_WP_L3_MAIN" "per , ""HDMI_WP_L3_MAIN""" menuitem "HDQ1W" "per , ""HDQ1W""" menuitem "HDQ1W_TARG" "per , ""HDQ1W_TARG""" menuitem "I2C1" "per , ""I2C1""" menuitem "I2C2" "per , ""I2C2""" menuitem "I2C3" "per , ""I2C3""" menuitem "I2C4" "per , ""I2C4""" menuitem "I2C5" "per , ""I2C5""" menuitem "I2C1_TARG" "per , ""I2C1_TARG""" menuitem "I2C2_TARG" "per , ""I2C2_TARG""" menuitem "I2C3_TARG" "per , ""I2C3_TARG""" menuitem "I2C4_TARG" "per , ""I2C4_TARG""" menuitem "I2C5_TARG" "per , ""I2C5_TARG""" menuitem "I2C6_TARG" "per , ""I2C6_TARG""" menuitem "INSTR_PRM" "per , ""INSTR_PRM""" menuitem "IODELAYCONFIG" "per , ""IODELAYCONFIG""" menuitem "IPU1_FW" "per , ""IPU1_FW""" menuitem "IPU1_FW_CFG_TARG" "per , ""IPU1_FW_CFG_TARG""" menuitem "IPU1_MMU" "per , ""IPU1_MMU""" menuitem "IPU1_TARG" "per , ""IPU1_TARG""" menuitem "IPU1_UNICACHE_CFG" "per , ""IPU1_UNICACHE_CFG""" menuitem "IPU1_UNICACHE_MMU" "per , ""IPU1_UNICACHE_MMU""" menuitem "IPU1_UNICACHE_SCTM" "per , ""IPU1_UNICACHE_SCTM""" menuitem "IPU1_WUGEN" "per , ""IPU1_WUGEN""" menuitem "IPU2_MMU" "per , ""IPU2_MMU""" menuitem "IPU2_WUGEN" "per , ""IPU2_WUGEN""" menuitem "IPU_PRM" "per , ""IPU_PRM""" menuitem "IVA_CONFIG_FW" "per , ""IVA_CONFIG_FW""" menuitem "IVA_CONFIG_FW_CFG_TARG" "per , ""IVA_CONFIG_FW_CFG_TARG""" menuitem "IVA_CONFIG_TARG" "per , ""IVA_CONFIG_TARG""" menuitem "IVA_MBOX" "per , ""IVA_MBOX""" menuitem "IVA_PRM" "per , ""IVA_PRM""" menuitem "IVA_SL2IF_FW" "per , ""IVA_SL2IF_FW""" menuitem "IVA_SL2IF_FW_CFG_TARG" "per , ""IVA_SL2IF_FW_CFG_TARG""" menuitem "IVA_SL2IF_TARG" "per , ""IVA_SL2IF_TARG""" menuitem "KBD" "per , ""KBD""" menuitem "KBD_TARG" "per , ""KBD_TARG""" menuitem "L3_INSTR" "per , ""L3_INSTR""" menuitem "L3_INSTR_FW" "per , ""L3_INSTR_FW""" menuitem "L3_INSTR_FW_CFG_TARG" "per , ""L3_INSTR_FW_CFG_TARG""" menuitem "L3INIT_PRM" "per , ""L3INIT_PRM""" menuitem "L4_CFG_TARG" "per , ""L4_CFG_TARG""" menuitem "L4_PER1_P1_TARG" "per , ""L4_PER1_P1_TARG""" menuitem "L4_PER1_P2_TARG" "per , ""L4_PER1_P2_TARG""" menuitem "L4_PER1_P3_TARG" "per , ""L4_PER1_P3_TARG""" menuitem "L4_PER2_P1_TARG" "per , ""L4_PER2_P1_TARG""" menuitem "L4_PER2_P2_TARG" "per , ""L4_PER2_P2_TARG""" menuitem "L4_PER2_P3_TARG" "per , ""L4_PER2_P3_TARG""" menuitem "L4_PER3_P1_TARG" "per , ""L4_PER3_P1_TARG""" menuitem "L4_PER3_P2_TARG" "per , ""L4_PER3_P2_TARG""" menuitem "L4_PER3_P3_TARG" "per , ""L4_PER3_P3_TARG""" menuitem "L4_WKUP_COUNTER_32K" "per , ""L4_WKUP_COUNTER_32K""" menuitem "L4_WKUP_TARG" "per , ""L4_WKUP_TARG""" menuitem "L4PER_PRM" "per , ""L4PER_PRM""" menuitem "MA_MPU_NTTP_FW" "per , ""MA_MPU_NTTP_FW""" menuitem "MA_MPU_NTTP_FW_CFG_TARG" "per , ""MA_MPU_NTTP_FW_CFG_TARG""" menuitem "MAILBOX10" "per , ""MAILBOX10""" menuitem "MAILBOX11" "per , ""MAILBOX11""" menuitem "MAILBOX12" "per , ""MAILBOX12""" menuitem "MAILBOX13" "per , ""MAILBOX13""" menuitem "MAILBOX2" "per , ""MAILBOX2""" menuitem "MAILBOX3" "per , ""MAILBOX3""" menuitem "MAILBOX4" "per , ""MAILBOX4""" menuitem "MAILBOX5" "per , ""MAILBOX5""" menuitem "MAILBOX6" "per , ""MAILBOX6""" menuitem "MAILBOX7" "per , ""MAILBOX7""" menuitem "MAILBOX8" "per , ""MAILBOX8""" menuitem "MAILBOX9" "per , ""MAILBOX9""" menuitem "MAILBOX1" "per , ""MAILBOX1""" menuitem "MAILBOX_TARG" "per , ""MAILBOX_TARG""" menuitem "MBX10_TARG" "per , ""MBX10_TARG""" menuitem "MBX11_TARG" "per , ""MBX11_TARG""" menuitem "MBX12_TARG" "per , ""MBX12_TARG""" menuitem "MBX13_TARG" "per , ""MBX13_TARG""" menuitem "MBX2_TARG" "per , ""MBX2_TARG""" menuitem "MBX3_TARG" "per , ""MBX3_TARG""" menuitem "MBX4_TARG" "per , ""MBX4_TARG""" menuitem "MBX5_TARG" "per , ""MBX5_TARG""" menuitem "MBX6_TARG" "per , ""MBX6_TARG""" menuitem "MBX7_TARG" "per , ""MBX7_TARG""" menuitem "MBX8_TARG" "per , ""MBX8_TARG""" menuitem "MBX9_TARG" "per , ""MBX9_TARG""" menuitem "MCASP1_AFIFO" "per , ""MCASP1_AFIFO""" menuitem "MCASP1_CFG" "per , ""MCASP1_CFG""" menuitem "MCASP1_CFG_TARG" "per , ""MCASP1_CFG_TARG""" menuitem "MCASP1_DAT" "per , ""MCASP1_DAT""" menuitem "MCASP1_FW" "per , ""MCASP1_FW""" menuitem "MCASP1_FW_CFG_TARG" "per , ""MCASP1_FW_CFG_TARG""" menuitem "MCASP1_TARG" "per , ""MCASP1_TARG""" menuitem "MCASP2_AFIFO" "per , ""MCASP2_AFIFO""" menuitem "MCASP2_CFG" "per , ""MCASP2_CFG""" menuitem "MCASP2_CFG_TARG" "per , ""MCASP2_CFG_TARG""" menuitem "MCASP2_DAT" "per , ""MCASP2_DAT""" menuitem "MCASP2_FW" "per , ""MCASP2_FW""" menuitem "MCASP2_FW_CFG_TARG" "per , ""MCASP2_FW_CFG_TARG""" menuitem "MCASP2_TARG" "per , ""MCASP2_TARG""" menuitem "MCASP3_AFIFO" "per , ""MCASP3_AFIFO""" menuitem "MCASP3_CFG" "per , ""MCASP3_CFG""" menuitem "MCASP3_CFG_TARG" "per , ""MCASP3_CFG_TARG""" menuitem "MCASP3_DAT" "per , ""MCASP3_DAT""" menuitem "MCASP3_FW" "per , ""MCASP3_FW""" menuitem "MCASP3_FW_CFG_TARG" "per , ""MCASP3_FW_CFG_TARG""" menuitem "MCASP3_TARG" "per , ""MCASP3_TARG""" menuitem "MCASP4_AFIFO" "per , ""MCASP4_AFIFO""" menuitem "MCASP4_CFG" "per , ""MCASP4_CFG""" menuitem "MCASP4_CFG_TARG" "per , ""MCASP4_CFG_TARG""" menuitem "MCASP4_DAT" "per , ""MCASP4_DAT""" menuitem "MCASP4_DAT_TARG" "per , ""MCASP4_DAT_TARG""" menuitem "MCASP5_AFIFO" "per , ""MCASP5_AFIFO""" menuitem "MCASP5_CFG" "per , ""MCASP5_CFG""" menuitem "MCASP5_CFG_TARG" "per , ""MCASP5_CFG_TARG""" menuitem "MCASP5_DAT" "per , ""MCASP5_DAT""" menuitem "MCASP5_DAT_TARG" "per , ""MCASP5_DAT_TARG""" menuitem "MCASP6_AFIFO" "per , ""MCASP6_AFIFO""" menuitem "MCASP6_CFG" "per , ""MCASP6_CFG""" menuitem "MCASP6_CFG_TARG" "per , ""MCASP6_CFG_TARG""" menuitem "MCASP6_DAT" "per , ""MCASP6_DAT""" menuitem "MCASP6_DAT_TARG" "per , ""MCASP6_DAT_TARG""" menuitem "MCASP7_AFIFO" "per , ""MCASP7_AFIFO""" menuitem "MCASP7_CFG" "per , ""MCASP7_CFG""" menuitem "MCASP7_CFG_TARG" "per , ""MCASP7_CFG_TARG""" menuitem "MCASP7_DAT" "per , ""MCASP7_DAT""" menuitem "MCASP7_DAT_TARG" "per , ""MCASP7_DAT_TARG""" menuitem "MCASP8_AFIFO" "per , ""MCASP8_AFIFO""" menuitem "MCASP8_CFG" "per , ""MCASP8_CFG""" menuitem "MCASP8_CFG_TARG" "per , ""MCASP8_CFG_TARG""" menuitem "MCASP8_DAT" "per , ""MCASP8_DAT""" menuitem "MCASP8_DAT_TARG" "per , ""MCASP8_DAT_TARG""" menuitem "MCSPI1" "per , ""MCSPI1""" menuitem "MCSPI2" "per , ""MCSPI2""" menuitem "MCSPI3" "per , ""MCSPI3""" menuitem "MCSPI4" "per , ""MCSPI4""" menuitem "MCSPI1_TARG" "per , ""MCSPI1_TARG""" menuitem "MCSPI2_TARG" "per , ""MCSPI2_TARG""" menuitem "MCSPI3_TARG" "per , ""MCSPI3_TARG""" menuitem "MCSPI4_TARG" "per , ""MCSPI4_TARG""" menuitem "MDIO" "per , ""MDIO""" menuitem "MLB_TARG" "per , ""MLB_TARG""" menuitem "MMC1" "per , ""MMC1""" menuitem "MMC2" "per , ""MMC2""" menuitem "MMC3" "per , ""MMC3""" menuitem "MMC4" "per , ""MMC4""" menuitem "MMC1_TARG" "per , ""MMC1_TARG""" menuitem "MMC2_TARG" "per , ""MMC2_TARG""" menuitem "MMC3_TARG" "per , ""MMC3_TARG""" menuitem "MMC4_TARG" "per , ""MMC4_TARG""" menuitem "MMU1_TARG" "per , ""MMU1_TARG""" menuitem "MMU1_TARG" "per , ""MMU1_TARG""" menuitem "MMU2_TARG" "per , ""MMU2_TARG""" menuitem "MMU2_TARG" "per , ""MMU2_TARG""" menuitem "MPU_AXI2OCP_MISC" "per , ""MPU_AXI2OCP_MISC""" menuitem "MPU_MA_WP" "per , ""MPU_MA_WP""" menuitem "MPU_PRCM_CM_C0" "per , ""MPU_PRCM_CM_C0""" menuitem "MPU_PRCM_DEVICE" "per , ""MPU_PRCM_DEVICE""" menuitem "MPU_PRCM_OCP_SOCKET" "per , ""MPU_PRCM_OCP_SOCKET""" menuitem "MPU_PRCM_PRM_C0" "per , ""MPU_PRCM_PRM_C0""" menuitem "MPU_PRM" "per , ""MPU_PRM""" menuitem "MPU_WD_TIMER" "per , ""MPU_WD_TIMER""" menuitem "MPU_WUGEN" "per , ""MPU_WUGEN""" menuitem "OCMC_RAM1" "per , ""OCMC_RAM1""" menuitem "OCMC_RAM1_FW" "per , ""OCMC_RAM1_FW""" menuitem "OCMC_RAM1_FW_CFG_TARG" "per , ""OCMC_RAM1_FW_CFG_TARG""" menuitem "OCMC_RAM1_TARG" "per , ""OCMC_RAM1_TARG""" menuitem "OCMC_RAM1_TARG" "per , ""OCMC_RAM1_TARG""" menuitem "OCP2SCP1" "per , ""OCP2SCP1""" menuitem "OCP2SCP3" "per , ""OCP2SCP3""" menuitem "OCP2SCP2_L4_CFG" "per , ""OCP2SCP2_L4_CFG""" menuitem "OCP2SCP3" "per , ""OCP2SCP3""" menuitem "OCP_SOCKET_PRM" "per , ""OCP_SOCKET_PRM""" menuitem "OCP_WP_NOC_TARG" "per , ""OCP_WP_NOC_TARG""" menuitem "PCIE1_FW" "per , ""PCIE1_FW""" menuitem "PCIe1_PHY_RX" "per , ""PCIe1_PHY_RX""" menuitem "PCIe1_PHY_TX" "per , ""PCIe1_PHY_TX""" menuitem "PCIE1_TARG" "per , ""PCIE1_TARG""" menuitem "PCIe2_PHY_RX" "per , ""PCIe2_PHY_RX""" menuitem "PCIe2_PHY_TX" "per , ""PCIe2_PHY_TX""" menuitem "PCIE2_TARG" "per , ""PCIE2_TARG""" menuitem "PCIe_SS1_EP_CFG_DBICS" "per , ""PCIe_SS1_EP_CFG_DBICS""" menuitem "PCIe_SS1_EP_CFG_DBICS2" "per , ""PCIe_SS1_EP_CFG_DBICS2""" menuitem "PCIe_SS1_EP_CFG_PCIe" "per , ""PCIe_SS1_EP_CFG_PCIe""" menuitem "PCIe_SS1_PL_CONF" "per , ""PCIe_SS1_PL_CONF""" menuitem "PCIe_SS1_RC_CFG_DBICS" "per , ""PCIe_SS1_RC_CFG_DBICS""" menuitem "PCIe_SS1_RC_CFG_DBICS2" "per , ""PCIe_SS1_RC_CFG_DBICS2""" menuitem "PCIe_SS1_TI_CONF" "per , ""PCIe_SS1_TI_CONF""" menuitem "PCIe_SS2_EP_CFG_DBICS" "per , ""PCIe_SS2_EP_CFG_DBICS""" menuitem "PCIe_SS2_EP_CFG_DBICS2" "per , ""PCIe_SS2_EP_CFG_DBICS2""" menuitem "PCIe_SS2_EP_CFG_PCIe" "per , ""PCIe_SS2_EP_CFG_PCIe""" menuitem "PCIe_SS2_PL_CONF" "per , ""PCIe_SS2_PL_CONF""" menuitem "PCIe_SS2_RC_CFG_DBICS" "per , ""PCIe_SS2_RC_CFG_DBICS""" menuitem "PCIe_SS2_RC_CFG_DBICS2" "per , ""PCIe_SS2_RC_CFG_DBICS2""" menuitem "PCIe_SS2_TI_CONF" "per , ""PCIe_SS2_TI_CONF""" menuitem "PCIESS1_FW_CFG_TARG" "per , ""PCIESS1_FW_CFG_TARG""" menuitem "PCIESS2_FW" "per , ""PCIESS2_FW""" menuitem "PCIESS2_FW_CFG_TARG" "per , ""PCIESS2_FW_CFG_TARG""" menuitem "PER1_AP" "per , ""PER1_AP""" menuitem "PER1_IA_IP0" "per , ""PER1_IA_IP0""" menuitem "PER1_IA_IP1" "per , ""PER1_IA_IP1""" menuitem "PER1_IA_IP2" "per , ""PER1_IA_IP2""" menuitem "PER1_LA" "per , ""PER1_LA""" menuitem "PER2_AP" "per , ""PER2_AP""" menuitem "PER2_IA_IP0" "per , ""PER2_IA_IP0""" menuitem "PER2_IA_IP1" "per , ""PER2_IA_IP1""" menuitem "PER2_IA_IP2" "per , ""PER2_IA_IP2""" menuitem "PER2_LA" "per , ""PER2_LA""" menuitem "PER3_AP" "per , ""PER3_AP""" menuitem "PER3_IA_IP0" "per , ""PER3_IA_IP0""" menuitem "PER3_IA_IP1" "per , ""PER3_IA_IP1""" menuitem "PER3_IA_IP2" "per , ""PER3_IA_IP2""" menuitem "PER3_LA" "per , ""PER3_LA""" menuitem "PORT" "per , ""PORT""" menuitem "PRM_TARG" "per , ""PRM_TARG""" menuitem "PRUSS1_CFG" "per , ""PRUSS1_CFG""" menuitem "PRUSS1_ECAP0" "per , ""PRUSS1_ECAP0""" menuitem "PRUSS1_FW" "per , ""PRUSS1_FW""" menuitem "PRUSS1_FW_CFG_TARG" "per , ""PRUSS1_FW_CFG_TARG""" menuitem "PRUSS1_IEP" "per , ""PRUSS1_IEP""" menuitem "PRUSS1_INTC" "per , ""PRUSS1_INTC""" menuitem "PRUSS1_MII_MDIO" "per , ""PRUSS1_MII_MDIO""" menuitem "PRUSS1_MII_RT" "per , ""PRUSS1_MII_RT""" menuitem "PRUSS1_PRU0_CTRL" "per , ""PRUSS1_PRU0_CTRL""" menuitem "PRUSS1_PRU0_DEBUG" "per , ""PRUSS1_PRU0_DEBUG""" menuitem "PRUSS1_PRU1_CTRL" "per , ""PRUSS1_PRU1_CTRL""" menuitem "PRUSS1_PRU1_DEBUG" "per , ""PRUSS1_PRU1_DEBUG""" menuitem "PRUSS1_TARG" "per , ""PRUSS1_TARG""" menuitem "PRUSS1_UART0" "per , ""PRUSS1_UART0""" menuitem "PRUSS2_CFG" "per , ""PRUSS2_CFG""" menuitem "PRUSS2_ECAP0" "per , ""PRUSS2_ECAP0""" menuitem "PRUSS2_FW" "per , ""PRUSS2_FW""" menuitem "PRUSS2_FW_CFG_TARG" "per , ""PRUSS2_FW_CFG_TARG""" menuitem "PRUSS2_IEP" "per , ""PRUSS2_IEP""" menuitem "PRUSS2_INTC" "per , ""PRUSS2_INTC""" menuitem "PRUSS2_MII_MDIO" "per , ""PRUSS2_MII_MDIO""" menuitem "PRUSS2_MII_RT" "per , ""PRUSS2_MII_RT""" menuitem "PRUSS2_PRU0_CTRL" "per , ""PRUSS2_PRU0_CTRL""" menuitem "PRUSS2_PRU0_DEBUG" "per , ""PRUSS2_PRU0_DEBUG""" menuitem "PRUSS2_PRU1_CTRL" "per , ""PRUSS2_PRU1_CTRL""" menuitem "PRUSS2_PRU1_DEBUG" "per , ""PRUSS2_PRU1_DEBUG""" menuitem "PRUSS2_TARG" "per , ""PRUSS2_TARG""" menuitem "PRUSS2_UART0" "per , ""PRUSS2_UART0""" menuitem "PWM1_TARG" "per , ""PWM1_TARG""" menuitem "PWM2_TARG" "per , ""PWM2_TARG""" menuitem "PWM3_TARG" "per , ""PWM3_TARG""" menuitem "PWMSS1_CFG" "per , ""PWMSS1_CFG""" menuitem "PWMSS1_ECAP" "per , ""PWMSS1_ECAP""" menuitem "PWMSS1_EPWM" "per , ""PWMSS1_EPWM""" menuitem "PWMSS1_EQEP" "per , ""PWMSS1_EQEP""" menuitem "PWMSS2_CFG" "per , ""PWMSS2_CFG""" menuitem "PWMSS2_ECAP" "per , ""PWMSS2_ECAP""" menuitem "PWMSS2_EPWM" "per , ""PWMSS2_EPWM""" menuitem "PWMSS2_EQEP" "per , ""PWMSS2_EQEP""" menuitem "PWMSS3_CFG" "per , ""PWMSS3_CFG""" menuitem "PWMSS3_ECAP" "per , ""PWMSS3_ECAP""" menuitem "PWMSS3_EPWM" "per , ""PWMSS3_EPWM""" menuitem "PWMSS3_EQEP" "per , ""PWMSS3_EQEP""" menuitem "QSPI" "per , ""QSPI""" menuitem "QSPI_FW" "per , ""QSPI_FW""" menuitem "QSPI_FW_CFG_TARG" "per , ""QSPI_FW_CFG_TARG""" menuitem "QSPI_TARG" "per , ""QSPI_TARG""" menuitem "RTC_PRM" "per , ""RTC_PRM""" menuitem "RTC_SS" "per , ""RTC_SS""" menuitem "RTC_TARG" "per , ""RTC_TARG""" menuitem "SATAMAC_wrapper" "per , ""SATAMAC_wrapper""" menuitem "SCP1_TARG" "per , ""SCP1_TARG""" menuitem "SCP2_TARG" "per , ""SCP2_TARG""" menuitem "SCP3_TARG" "per , ""SCP3_TARG""" menuitem "SL1" "per , ""SL1""" menuitem "SL2" "per , ""SL2""" menuitem "SMARTREFLEX_CORE" "per , ""SMARTREFLEX_CORE""" menuitem "SMARTREFLEX_DSPEVE" "per , ""SMARTREFLEX_DSPEVE""" menuitem "SMARTREFLEX_GPU" "per , ""SMARTREFLEX_GPU""" menuitem "SMARTREFLEX_IVA" "per , ""SMARTREFLEX_IVA""" menuitem "SMARTREFLEX_MPU" "per , ""SMARTREFLEX_MPU""" menuitem "SPF1" "per , ""SPF1""" menuitem "SPF2" "per , ""SPF2""" menuitem "Spinlock" "per , ""Spinlock""" menuitem "SPINLOCK_TARG" "per , ""SPINLOCK_TARG""" menuitem "SS" "per , ""SS""" menuitem "STATERAM" "per , ""STATERAM""" menuitem "STATS" "per , ""STATS""" menuitem "SYS_EDMA_TPCC" "per , ""SYS_EDMA_TPCC""" menuitem "SYS_EDMA_TPCC" "per , ""SYS_EDMA_TPCC""" menuitem "SYS_EDMA_TPTC0" "per , ""SYS_EDMA_TPTC0""" menuitem "SYS_EDMA_TPTC1" "per , ""SYS_EDMA_TPTC1""" menuitem "System_MMU1" "per , ""System_MMU1""" menuitem "System_MMU2" "per , ""System_MMU2""" menuitem "TIMER10_L4_PER1Interconnect" "per , ""TIMER10_L4_PER1Interconnect""" menuitem "TIMER10_TARG" "per , ""TIMER10_TARG""" menuitem "TIMER11_L4_PER1Interconnect" "per , ""TIMER11_L4_PER1Interconnect""" menuitem "TIMER11_TARG" "per , ""TIMER11_TARG""" menuitem "TIMER12_L4_WKUPInterconnect" "per , ""TIMER12_L4_WKUPInterconnect""" menuitem "TIMER12_TARG" "per , ""TIMER12_TARG""" menuitem "TIMER13_L4_PER3Interconnect" "per , ""TIMER13_L4_PER3Interconnect""" menuitem "TIMER13_TARG" "per , ""TIMER13_TARG""" menuitem "TIMER14_L4_PER3Interconnect" "per , ""TIMER14_L4_PER3Interconnect""" menuitem "TIMER14_TARG" "per , ""TIMER14_TARG""" menuitem "TIMER15_L4_PER3Interconnect" "per , ""TIMER15_L4_PER3Interconnect""" menuitem "TIMER15_TARG" "per , ""TIMER15_TARG""" menuitem "TIMER16_L4_PER3Interconnect" "per , ""TIMER16_L4_PER3Interconnect""" menuitem "TIMER16_TARG" "per , ""TIMER16_TARG""" menuitem "TIMER1_L4_WKUPInterconnect" "per , ""TIMER1_L4_WKUPInterconnect""" menuitem "TIMER1_TARG" "per , ""TIMER1_TARG""" menuitem "TIMER2_L4_PER1Interconnect" "per , ""TIMER2_L4_PER1Interconnect""" menuitem "TIMER2_TARG" "per , ""TIMER2_TARG""" menuitem "TIMER3_L4_PER1Interconnect" "per , ""TIMER3_L4_PER1Interconnect""" menuitem "TIMER3_TARG" "per , ""TIMER3_TARG""" menuitem "TIMER4_L4_PER1Interconnect" "per , ""TIMER4_L4_PER1Interconnect""" menuitem "TIMER4_TARG" "per , ""TIMER4_TARG""" menuitem "TIMER5_L4_PER3Interconnect" "per , ""TIMER5_L4_PER3Interconnect""" menuitem "TIMER5_TARG" "per , ""TIMER5_TARG""" menuitem "TIMER6_L4_PER3Interconnect" "per , ""TIMER6_L4_PER3Interconnect""" menuitem "TIMER6_TARG" "per , ""TIMER6_TARG""" menuitem "TIMER7_L4_PER3Interconnect" "per , ""TIMER7_L4_PER3Interconnect""" menuitem "TIMER7_TARG" "per , ""TIMER7_TARG""" menuitem "TIMER8_L4_PER3Interconnect" "per , ""TIMER8_L4_PER3Interconnect""" menuitem "TIMER8_TARG" "per , ""TIMER8_TARG""" menuitem "TIMER9_L4_PER1Interconnect" "per , ""TIMER9_L4_PER1Interconnect""" menuitem "TIMER9_TARG" "per , ""TIMER9_TARG""" menuitem "TPCC_FW_CFG_TARG" "per , ""TPCC_FW_CFG_TARG""" menuitem "TPCC_TARG" "per , ""TPCC_TARG""" menuitem "TPTC1_TARG" "per , ""TPTC1_TARG""" menuitem "TPTC2_TARG" "per , ""TPTC2_TARG""" menuitem "TPTC_FW" "per , ""TPTC_FW""" menuitem "TPTC_FW_CFG_TARG" "per , ""TPTC_FW_CFG_TARG""" menuitem "UART1" "per , ""UART1""" menuitem "UART10" "per , ""UART10""" menuitem "UART2" "per , ""UART2""" menuitem "UART3" "per , ""UART3""" menuitem "UART4" "per , ""UART4""" menuitem "UART5" "per , ""UART5""" menuitem "UART6" "per , ""UART6""" menuitem "UART7" "per , ""UART7""" menuitem "UART8" "per , ""UART8""" menuitem "UART9" "per , ""UART9""" menuitem "UART10_TARG" "per , ""UART10_TARG""" menuitem "UART1_TARG" "per , ""UART1_TARG""" menuitem "UART2_TARG" "per , ""UART2_TARG""" menuitem "UART3_TARG" "per , ""UART3_TARG""" menuitem "UART4_TARG" "per , ""UART4_TARG""" menuitem "UART5_TARG" "per , ""UART5_TARG""" menuitem "UART6_TARG" "per , ""UART6_TARG""" menuitem "UART7_TARG" "per , ""UART7_TARG""" menuitem "UART8_TARG" "per , ""UART8_TARG""" menuitem "UART9_TARG" "per , ""UART9_TARG""" menuitem "USB1_TARG" "per , ""USB1_TARG""" menuitem "USB2_TARG" "per , ""USB2_TARG""" menuitem "USB3_PHY_RX" "per , ""USB3_PHY_RX""" menuitem "USB3_PHY_TX" "per , ""USB3_PHY_TX""" menuitem "USB3_TARG" "per , ""USB3_TARG""" menuitem "VCP1_CFG_TARG" "per , ""VCP1_CFG_TARG""" menuitem "VCP1_FW" "per , ""VCP1_FW""" menuitem "VCP1_FW_CFG_TARG" "per , ""VCP1_FW_CFG_TARG""" menuitem "VCP1_TARG" "per , ""VCP1_TARG""" menuitem "VCP2_CFG_TARG" "per , ""VCP2_CFG_TARG""" menuitem "VCP2_FW" "per , ""VCP2_FW""" menuitem "VCP2_FW_CFG_TARG" "per , ""VCP2_FW_CFG_TARG""" menuitem "VCP2_TARG" "per , ""VCP2_TARG""" menuitem "VIP1_Slice0_csc" "per , ""VIP1_Slice0_csc""" menuitem "VIP1_Slice0_parser" "per , ""VIP1_Slice0_parser""" menuitem "VIP1_Slice0_sc" "per , ""VIP1_Slice0_sc""" menuitem "VIP1_Slice1_csc" "per , ""VIP1_Slice1_csc""" menuitem "VIP1_Slice1_parser" "per , ""VIP1_Slice1_parser""" menuitem "VIP1_Slice1_sc" "per , ""VIP1_Slice1_sc""" menuitem "VIP1_TARG" "per , ""VIP1_TARG""" menuitem "VIP1_top_level" "per , ""VIP1_top_level""" menuitem "VIP1_VPDMA" "per , ""VIP1_VPDMA""" menuitem "VPE_CHR_US_INST_0" "per , ""VPE_CHR_US_INST_0""" menuitem "VPE_CHR_US_INST_1" "per , ""VPE_CHR_US_INST_1""" menuitem "VPE_CHR_US_INST_2" "per , ""VPE_CHR_US_INST_2""" menuitem "VPE_CSC" "per , ""VPE_CSC""" menuitem "VPE_DEI" "per , ""VPE_DEI""" menuitem "VPE_PRM" "per , ""VPE_PRM""" menuitem "VPE_SC" "per , ""VPE_SC""" menuitem "VPE_TARG" "per , ""VPE_TARG""" menuitem "VPE_TOP_LEVEL" "per , ""VPE_TOP_LEVEL""" menuitem "VPE_VPDMA" "per , ""VPE_VPDMA""" menuitem "WD_TIMER2" "per , ""WD_TIMER2""" menuitem "WD_TIMER2_TARG" "per , ""WD_TIMER2_TARG""" menuitem "WKUP_AP" "per , ""WKUP_AP""" menuitem "WKUP_IA_IP0" "per , ""WKUP_IA_IP0""" menuitem "WKUP_LA" "per , ""WKUP_LA""" menuitem "WKUPAON_CM" "per , ""WKUPAON_CM""" menuitem "WKUPAON_PRM" "per , ""WKUPAON_PRM""" menuitem "WR" "per , ""WR""" ) ) else ( popup "AM571x-ICSS" ( popup "ICSS_0" ( menuitem "CFG" "per , ""ICSS_0,CFG""" menuitem "PRU0_CTRL" "per , ""ICSS_0,PRU0_CTRL""" menuitem "PRU1_CTRL" "per , ""ICSS_0,PRU1_CTRL""" menuitem "INTC" "per , ""ICSS_0,INTC""" menuitem "UART0" "per , ""ICSS_0,UART0""" menuitem "ECAP0" "per , ""ICSS_0,ECAP0""" menuitem "MII_RT" "per , ""ICSS_0,MII_RT""" menuitem "MII_MDIO" "per , ""ICSS_0,MII_MDIO""" menuitem "IEP" "per , ""ICSS_0,IEP""" menuitem "PRU1_DEBUG" "per , ""ICSS_0,PRU1_DEBUG""" menuitem "PRU2_DEBUG" "per , ""ICSS_0,PRU2_DEBUG""" ) popup "ICSS_1" ( menuitem "CFG" "per , ""ICSS_1,CFG""" menuitem "ECAP0" "per , ""ICSS_1,ECAP0""" menuitem "IEP" "per , ""ICSS_1,IEP""" menuitem "MII_MDIO" "per , ""ICSS_1,MII_MDIO""" menuitem "MII_RT" "per , ""ICSS_1,MII_RT""" menuitem "PRU0_CTRL" "per , ""ICSS_1,PRU0_CTRL""" menuitem "PRU1_CTRL" "per , ""ICSS_1,PRU1_CTRL""" menuitem "PRUSS1_DEBUG" "per , ""ICSS_1,PRUSS1_DEBUG""" menuitem "PRUSS2_DEBUG" "per , ""ICSS_1,PRUSS2_DEBUG""" menuitem "PRUSS_INTC" "per , ""ICSS_1,PRUSS_INTC""" menuitem "UART0" "per , ""ICSS_1,UART0""" ) ) ) )