; -------------------------------------------------------------------------------- ; @Title: Flash declaration for Cypress TraveoII series internal flash. ; @Description: ; Script arguments: ; DO traveo_ii [PREPAREONLY] [CPU=] [DUALPORT=<0|1>] [FIRMWARERAM] ; PREPAREONLY only declares flash but does not execute flash programming ; CPU= selects CPU derivative ; DUALPORT=<0|1> use dual port memory access, default 1 ; FIRMWARERAM preserve SRAM used by firmware during flash programming ; (use this only if access to firmware RAM is not protected) ; ; Example: ; DO ~~/demo/arm/flash/traveo_ii PREPAREONLY ; Note: ; This file must NOT be modified. ; This file is intended to stay within TRACE32 installation. ; Usage examples are available in the ~~/demo/arm/hardware/... subdirectories. ; ; List of TraveoII derivatives and their configuration: ; ; CPU-Type Code Flash Work Flash SRAM ; [Byte] [Byte] [Byte] ; -------------------------------------------------------------------------------- ; CYT2B5* 0x90000 0x10000 0x10000 ; CYT2B6* 0x90000 0x10000 0x10000 ; CYT2B7* 0x110000 0x18000 0x20000 ; CYT2B9* 0x210000 0x20000 0x40000 ; CYT2BL* 0x410000 0x20000 0x80000 ; CYT3BB* 0x410000 0x40000 0xC0000 ; CYT4BB* 0x410000 0x40000 0xC0000 ; CYT3DL* 0x410000 0x20000 0x60000 ; CYT4DN* 0x630000 0x20000 0xA0000 ; CYT4BF* 0x830000 0x40000 0x100000 ; CYT6BJ* 0x1060000 0x80000 0x200000 ; ; The range 0x17000000++0x7fff is guarded against modification. ; Modifications can be done using the FLASH.AUTO command with /CENSORSHIP option. ; ; @Author: AME ALI ; @Chip: CYT* ; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: traveo_ii.cmm 12286 2023-07-05 11:49:45Z alintner $ LOCAL ¶meters ¶m_prepareonly ¶m_cpu ¶m_dualport ¶m_firmwareram ENTRY %LINE ¶meters ¶m_prepareonly=(STRing.SCAN(STRing.UPpeR("¶meters"),"PREPAREONLY",0)!=-1) ¶m_cpu=STRing.SCANAndExtract(STRing.UPpeR("¶meters"),"CPU=","") ¶m_dualport=STRing.SCANAndExtract("¶meters","DUALPORT=","1") ¶m_firmwareram=(STRing.SCAN(STRing.UPpeR("¶meters"),"FIRMWARERAM",0)!=-1) ; ------------------------------------------------------------------------------ ; Prerequisites: IF CPUIS("TRAVEOII*") ( DIALOG.OK "Please select the appropriate CPU." END ) ; ------------------------------------------------------------------------------ ; Initialize and start the debugger IF !SYStem.Up() ( SYStem.RESet IF "¶m_cpu"!="" SYStem.CPU ¶m_cpu IF !CPUIS("CYT*") SYStem.CPU CYT* IF CABLE.TWOWIRE() SYStem.CONFIG DEBUGPORTTYPE SWD ELSE SYStem.CONFIG DEBUGPORTTYPE JTAG SYStem.JtagClock 10MHz ( ; assert reset line and do another debugger based reset ; -> M0+ should stop in BootROM/Supervisory Flash SYStem.Option EnReset ON SYStem.Option WaitIDCODE ON SYStem.Option CoreSightRESet ON ) IF CPUIS("*-CM4*") ( ; enter TESTMODE if flash programming is triggered via the CM4 core SYStem.Option CypressACQuire ON ) SYStem.Up SYStem.Option CypressACQuire OFF GOSUB WatchdogDisable ) ; ------------------------------------------------------------------------------ ; Flash declaration FLASH.RESet GOSUB FlashDeclaration ;Flash script ends here if called with parameter PREPAREONLY IF ¶m_prepareonly ENDDO PREPAREDONE ; ------------------------------------------------------------------------------ ; Flash programming example DIALOG.YESNO "Program flash memory?" LOCAL &progflash ENTRY &progflash IF &progflash ( FLASH.ReProgram ALL Data.LOAD.auto * FLASH.ReProgram OFF ; FLASH.AUTO 0x17000000++0x7fff /CENSORSHIP ; Data.LOAD. 0x17000000++0x7fff ; FLASH.AUTO OFF ; Reset device SYStem.Down SYStem.Up ) ENDDO ; ------------------------------------------------------------------------------ ; Subroutines WatchdogDisable: ;() ( ) ; -------------------------------------------------------------------------------- ; Flash declaration depending on selected CPU ; ; Please do NOT modify the TRACE32 flash declaration. ; ; Modifications can result in unpredictable behavior. ; Please contact support@lauterbach.com for any changes. FlashDeclaration: ( PRIVATE &nMainCodeLargeSectors &nMainCodeSmallSectors PRIVATE &nWorkFlashLargeSectors &nWorkFlashSmallSectors PRIVATE &nSRamBaseAddress &sFirmwareRam PRIVATE &nFlashBanks &nMainCodeLargeSectors=0. &nMainCodeSmallSectors=0. &nWorkFlashLargeSectors=0. &nWorkFlashSmallSectors=0. &sFirmwareRam="" &nSRamBaseAddress=0x08000000 &nFlashBanks=1. IF CPUIS("CYT3*")||CPUIS("CYT4*")||CPUIS("CYT6*") ( &nSRamBaseAddress=0x28000000 ) IF CPUIS("CYT??5*")||CPUIS("CYT??6*") ; 576kB/64kB ( // 576kB &nMainCodeLargeSectors=14. &nMainCodeSmallSectors=16. // 64kB &nWorkFlashLargeSectors=24. &nWorkFlashSmallSectors=128. &sFirmwareRam="0x0800f800++0x7ff" ) ELSE IF CPUIS("CYT??7*") ; 1088kB/96kB ( // 1088kB &nMainCodeLargeSectors=30. &nMainCodeSmallSectors=16. // 96kB &nWorkFlashLargeSectors=36. &nWorkFlashSmallSectors=192. &sFirmwareRam="0x0801f800++0x7ff" ) ELSE IF CPUIS("CYT??9*") ; 2112kB/128kB ( // 2016kB &nMainCodeLargeSectors=62. &nMainCodeSmallSectors=16. // 128kB &nWorkFlashLargeSectors=48. &nWorkFlashSmallSectors=256. &sFirmwareRam="0x0803f800++0x7ff" ) ELSE IF CPUIS("CYT??B*") ; 4160kB/256kB ( // 4160kB &nMainCodeLargeSectors=126. //32KB &nMainCodeSmallSectors=16. // 8KB // 256kB &nWorkFlashLargeSectors=96. //2KB &nWorkFlashSmallSectors=512. //128B &sFirmwareRam="0x280bf800++0x7ff" ) ELSE IF CPUIS("CYT??N*") ; 6336kB/128kB ( // 6336kB &nMainCodeLargeSectors=190. //32KB &nMainCodeSmallSectors=32. // 8KB // 128kB &nWorkFlashLargeSectors=48. //2KB &nWorkFlashSmallSectors=256. //128B &sFirmwareRam="0x2809f800++0x7ff" ) ELSE IF CPUIS("CYT??L*") ; 4160kB/128kB ( // 4160kB &nMainCodeLargeSectors=126. //32KB &nMainCodeSmallSectors=16. // 8KB // 128kB &nWorkFlashLargeSectors=48. //2KB &nWorkFlashSmallSectors=256. //128B &sFirmwareRam="0x2809f800++0x7ff" ) ELSE IF CPUIS("CYT??F*") ; 8384kB/256kB ( // 8384kB &nMainCodeLargeSectors=254. //32KB &nMainCodeSmallSectors=32. // 8KB // 256kB &nWorkFlashLargeSectors=96. //2KB &nWorkFlashSmallSectors=512. //128B &sFirmwareRam="0x280ff800++0x7ff" ) ELSE IF CPUIS("CYT??J*") ; 2 x 8384kB/256kB ( // 8384kB &nMainCodeLargeSectors=254. //32KB &nMainCodeSmallSectors=32. // 8KB // 256kB &nWorkFlashLargeSectors=96. //2KB &nWorkFlashSmallSectors=512. //128B &sFirmwareRam="0x281ff800++0x7ff" &nFlashBanks=2. ) ELSE ( PRINT %WARNING CPU()+" is not supported by "+OS.PPF() ENDDO ) ; IF TRUE() ( ; Single Bank ; large code FLASH.Create 1. (0x10000000)++(&nMainCodeLargeSectors*0x8000-0x1) 0x8000 TARGET LONG ; small code FLASH.Create 1. (0x10000000+&nMainCodeLargeSectors*0x8000)++(&nMainCodeSmallSectors*0x2000-0x1) 0x2000 TARGET LONG ) ELSE ( ; Dual Bank ; large code FLASH.Create 1. (0x10000000)++(&nMainCodeLargeSectors*0x8000/0x2-0x1) 0x8000 TARGET LONG ; small code FLASH.Create 1. (0x10000000+&nMainCodeLargeSectors*0x8000/0x2)++(&nMainCodeSmallSectors*0x2000/0x2-0x1) 0x2000 TARGET LONG ; large code FLASH.Create 1. (0x12000000)++(&nMainCodeLargeSectors*0x8000/0x2-0x1) 0x8000 TARGET LONG ; small code FLASH.Create 1. (0x12000000+&nMainCodeLargeSectors*0x8000/0x2)++(&nMainCodeSmallSectors*0x2000/0x2-0x1) 0x2000 TARGET LONG ) ; IF (&nFlashBanks>1.) ( ; IF TRUE() ( ; Single Bank ; large code FLASH.Create 4. (0x18000000)++(&nMainCodeLargeSectors*0x8000-0x1) 0x8000 TARGET LONG ; small code FLASH.Create 4. (0x18000000+&nMainCodeLargeSectors*0x8000)++(&nMainCodeSmallSectors*0x2000-0x1) 0x2000 TARGET LONG ) ELSE ( ; Dual Bank ; large code FLASH.Create 4. (0x18000000)++(&nMainCodeLargeSectors*0x8000/0x2-0x1) 0x8000 TARGET LONG ; small code FLASH.Create 4. (0x18000000+&nMainCodeLargeSectors*0x8000/0x2)++(&nMainCodeSmallSectors*0x2000/0x2-0x1) 0x2000 TARGET LONG ; large code FLASH.Create 4. (0x1A000000)++(&nMainCodeLargeSectors*0x8000/0x2-0x1) 0x8000 TARGET LONG ; small code FLASH.Create 4. (0x1A000000+&nMainCodeLargeSectors*0x8000/0x2)++(&nMainCodeSmallSectors*0x2000/0x2-0x1) 0x2000 TARGET LONG ) ; ) ; IF TRUE() ( ; Single Bank ; large FLASH.Create 2. (0x14000000)++(&nWorkFlashLargeSectors*0x800-0x1) 0x800 TARGET LONG ; small FLASH.Create 2. (0x14000000+&nWorkFlashLargeSectors*0x800)++(&nWorkFlashSmallSectors*0x80-0x1) 0x80 TARGET LONG ) ELSE ( ; Dual Bank ; large FLASH.Create 2. (0x14000000)++(&nWorkFlashLargeSectors*0x800/0x2-0x1) 0x800 TARGET LONG ; small FLASH.Create 2. (0x14000000+&nWorkFlashLargeSectors*0x800/0x2)++(&nWorkFlashSmallSectors*0x80/0x2-0x1) 0x80 TARGET LONG ; large FLASH.Create 2. (0x15000000)++(&nWorkFlashLargeSectors*0x800/0x2-0x1) 0x800 TARGET LONG ; small FLASH.Create 2. (0x15000000+&nWorkFlashLargeSectors*0x800/0x2)++(&nWorkFlashSmallSectors*0x80/0x2-0x1) 0x80 TARGET LONG ) ; IF (&nFlashBanks>1.) ( ; IF TRUE() ( ; Single Bank ; large FLASH.Create 5. (0x1C000000)++(&nWorkFlashLargeSectors*0x800-0x1) 0x800 TARGET LONG ; small FLASH.Create 5. (0x1C000000+&nWorkFlashLargeSectors*0x800)++(&nWorkFlashSmallSectors*0x80-0x1) 0x80 TARGET LONG ) ELSE ( ; Dual Bank ; large FLASH.Create 5. (0x1C000000)++(&nWorkFlashLargeSectors*0x800/0x2-0x1) 0x800 TARGET LONG ; small FLASH.Create 5. (0x1C000000+&nWorkFlashLargeSectors*0x800/0x2)++(&nWorkFlashSmallSectors*0x80/0x2-0x1) 0x80 TARGET LONG ; large FLASH.Create 5. (0x1D000000)++(&nWorkFlashLargeSectors*0x800/0x2-0x1) 0x800 TARGET LONG ; small FLASH.Create 5. (0x1D000000+&nWorkFlashLargeSectors*0x800/0x2)++(&nWorkFlashSmallSectors*0x80/0x2-0x1) 0x80 TARGET LONG ) ; ) ; PRIVATE &i &i=0. RePeaT 64. ( IF &i==(4.||5.||6.||7.||13.||50.||51.||52.||53.||54.||55.||59.||62.) ( FLASH.Create 3. (0x17000000+&i*0x200)++0x1ff 0x200 TARGET LONG /CENSORSHIP (0x17000000+&i*0x200)++0x1ff ) ELSE ( FLASH.Create 3. (0x17000000+&i*0x200)++0x1ff 0x200 NOP LONG /CENSORSHIP (0x17000000+&i*0x200)++0x1ff ) &i=&i+1. ) ; IF (¶m_firmwareram) &sFirmwareRam="/FirmwareRAM &(sFirmwareRam)" ELSE &sFirmwareRam="" IF (("¶m_dualport"!="1")||SYStem.ACCESS.DENIED()) FLASH.TARGET &nSRamBaseAddress+0x1000 &nSRamBaseAddress+0x2000 0x1000 ~~/demo/arm/flash/long/traveo_ii.bin /STACKSIZE 0x800 &sFirmwareRam ELSE FLASH.TARGET &nSRamBaseAddress+0x1000 E:&nSRamBaseAddress+0x2000 0x1000 ~~/demo/arm/flash/long/traveo_ii.bin /STACKSIZE 0x800 &sFirmwareRam /DUALPORT FLASH.CLOCK AUTO RETURN )