; --------------------------------------------------------------------------------
; @Title: R-CarH3-SiP, the Salvator-X board SPI FLASH Program script
; @Description:
; SPI FLASH Program script by the core (Cortex-A57) for the RCARH3 Evaluation
; The S25FL128 (Spansion, 64KB block non uniform) is on the SPI Multi I/O
; Bus controller
;
;   Prerequisites:
;       start description in here
;       &sysup_script="&pdd/hardware/<cpu_name>/
;                      <cpu_name>-ca53/<cpu_name>-ca53_sieve_sram.cmm"
;
;    * activate QSPI flash
;        SW1/SW2 = 1
;        SW3 = 0
;
; SRAM: 0xE6328000
; SPI Multi I/O Bus(controller) Base: 0xEE200000
; SPI Flash Mapped Address: 0x08000000
; !!!please do not dump the SPI area as /LONG width, but /BYTE or /QUAD is fine
; ex) Data.dump 0x08000000 /Quad
;
; @Author: jjeong
; @Chip: R8A77950
; @Keywords: S25FL128 Spansion Flash SPI Salvator RCARH3
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: rcarh3-ca53-spi.cmm 12742 2023-11-17 08:05:09Z mschaeffner $

PRIVATE &parameters
ENTRY %LINE &parameters

PRIVATE &param_prepareonly
&parameters=STRing.UPpeR("&parameters")
&param_prepareonly=(STRing.SCAN("&parameters","PREPAREONLY",0)!=-1)

LOCAL &pdd
&pdd=OS.PresentDemoDirectory()

&SPI_BASE=0xEE200000

; ------------------------------------------------------------------------------
; Setup CPU
RESet
SYStem.RESet
SYStem.CPU R8A77951
SYStem.JtagClock CTCK 10MHz
CORE.ASSIGN 1. // Cortex-A57
; CORE.ASSIGN 2. // Cortex-A53
Trace.DISable
SYStem.Up

; enable SRAM
Data.Set AD:0xE67F0018 %LE %Long 0x1

Register.Set I 0
Register.Set M 0x5 ;EL1h

GOSUB WDOG_DISABLE

; ------------------------------------------------------------------------------
; Flash Controller Power & Clock Enable

; ------------------------------------------------------------------------------
; Flash Pin Mux Configuration

; ------------------------------------------------------------------------------
; Flash Controller Init
Data.Set A:&QSPI_BASE       %LE %Long 0x01fff300  ;enable RPC AHB read
Data.Set A:&QSPI_BASE+0x010 %LE %Long (0x03<<16.) ;DRCMR, read 3byte address mode command
Data.Set A:&QSPI_BASE+0x01C %LE %Long 0x4700      ;DRENR, 24bit address mode, (24bit==0x4700)
Data.Set A:&QSPI_BASE+0x014 %LE %Long 0x0         ;DREAR, 24bit Extended External Address Valid Range, A[24:0] enabled
;Data.Set A:&QSPI_BASE+0x07C %LE %Long 0x80000260  ;PHYCNT

; ------------------------------------------------------------------------------
; Flash Read ID Test
GOSUB READ_ID_TEST

&pdd=OS.PresentDemoDirectory()

; ------------------------------------------------------------------------------
; Init SRAM (16KB) for the flash algorithm
Data.Set A:0xE67F0018 %Long 0x1
Data.Set A:0xE6260604 %Long 0x8

; ------------------------------------------------------------------------------
; Flash declaration
Break.RESet

FLASH.RESet
FLASH.Create 0x08000000++0x7FFF    0x01000 TARGET Byte
FLASH.Create 0x08008000++0x7FFF    0x08000 TARGET Byte
FLASH.Create 0x08010000--0x8FFFFFF 0x10000 TARGET Byte

FLASH.TARGET 0xE6328000 0xE632A000 0x2000   &pdd/flash/byte/snor3b_rcar3.bin

; Flash script ends here if called with parameter PREPAREONLY
IF &param_prepareonly
  ENDDO PREPAREDONE

; ------------------------------------------------------------------------------
; Flash programming example

DIALOG.YESNO "Program flash memory?"
LOCAL &progflash
ENTRY &progflash
IF &progflash
(
  FLASH.ReProgram.ALL
  Data.LOAD.auto *
  ;Data.LOAD.Binary * 0x08000000 
  FLASH.ReProgram.off

  ; Reset device
  PRINT "Please power-cycle the board after flash program is complete"
)

ENDDO

WDOG_DISABLE:
(
  //RCLK Watchdog Timer disable
  Data.Set EZAXI:0xE6020004 %Long  0xA5A5A500|0x00   ; Write 0 to the RCLK Watchdog Timer Control Register A
  Data.Set EZAXI:0xE6020008 %Long  0xA5A5A500|0x00   ; Write 0 to the RCLK Watchdog Timer Control Register B

  //System Watchdog Timer disable
  Data.Set EZAXI:0xE6030004 %Long  0xA5A5A500|0x00   ; Write 0 to the System Watchdog Timer Control Register A
  Data.Set EZAXI:0xE6030008 %Long  0xA5A5A500|0x00   ; Write 0 to the System Watchdog Timer Control Register B
  RETURN
)

READ_ID_TEST:
(
  &CMNCR=(&QSPI_BASE)
  &SMCR=(&QSPI_BASE+0x20)   ; SMCR_0  , SPI mode control
  &SMCMR=(&QSPI_BASE+0x24)   ; SMCMR_0  , SPI mode command setting register
  &SMADR=(&QSPI_BASE+0x28)    ;address
  &SMOPR=(&QSPI_BASE+0x2C)   ;option data setting
  &SMENR=(&QSPI_BASE+0x30)    ;enable setting
  &SMRDR=(&QSPI_BASE+0x38)
  &SMRDR1=(&QSPI_BASE+0x3C)
  &SMWDR=(&QSPI_BASE+0x40)
  &SMWDR1=(&QSPI_BASE+0x44)
  &SMDMCR=(&QSPI_BASE+0x60)    ;dummy cycle

  &regData=Data.Long(A:&CMNCR)
  Data.Set A:&CMNCR %Long 0x80000000|&regData  ;enable manual mode, disable AHB read

  Data.Set A:&SMCMR %Long (0x9f<<16.)   ;read-id cmd
  Data.Set A:&SMADR %Long 0x0    ;address 0x0
  Data.Set A:&SMOPR %Long 0x0    ;address 0x0
  ;Data.Set A:&SMDMCR %l 0x7    ; dummy 8 cycle number

  &smenr=(0x1<<14.)|0xF;  cmd enable, 4byte data read

  Data.Set A:&SMENR %Long &smenr

  //start spi transfer
  &smcr=0x1|(0x2<<1.)  ; spie and spire  , SPI Read data

  Data.Set A:&SMWDR %LE %Long 0x00000000 ; write Tx buffer init

  Data.Set A:&SMCR %Long &smcr

  &read_data=Data.Long(A:&SMRDR)

  PRINT "Read 1st: 0x" (&read_data)&0xFF   " (Manufacturer) "
  PRINT "Read 2nd: 0x" (&read_data>>8.)&0xFF " (Device) "
  PRINT "Read 3rd: 0x" (&read_data>>16.)&0xFF
  PRINT "Read 4th: 0x" (&read_data>>24.)&0xFF

  Data.Set A:&CMNCR  %Long  &regData  ;disable manual mode, enable AHB read

  RETURN
)