From e993fe9ce7aea22ce42236d2dc690f45ec18a03d Mon Sep 17 00:00:00 2001 From: woody Date: Wed, 17 Dec 2025 14:42:32 +0900 Subject: [PATCH] add --- .../rel/modules/all/include/All.h | 629 +++ .../rel/modules/all/include/All_Version.h | 86 + .../modules/all/make/renesas_all_check.mak | 21 + .../rel/modules/all/make/renesas_all_defs.mak | 33 + .../modules/all/make/renesas_all_rules.mak | 104 + .../V4M/include/arm/App_ALL_Device_Sample.h | 212 + .../V4M/src/arm/App_ALL_V4M_Sample.c | 319 ++ .../include/App_All_Common_Sample.h | 114 + .../make/arm/App_ALL_Common_Sample.mak | 140 + .../src/App_ALL_Common_Sample.c | 1081 +++++ .../rel/modules/all/src/All.c | 3963 +++++++++++++++++ .../rel/modules/all/src/All_Version.c | 218 + 12 files changed, 6920 insertions(+) create mode 100644 4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/include/All.h create mode 100644 4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/include/All_Version.h create mode 100644 4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/make/renesas_all_check.mak create mode 100644 4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/make/renesas_all_defs.mak create mode 100644 4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/make/renesas_all_rules.mak create mode 100644 4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/V4M/include/arm/App_ALL_Device_Sample.h create mode 100644 4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/V4M/src/arm/App_ALL_V4M_Sample.c create mode 100644 4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/include/App_All_Common_Sample.h create mode 100644 4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/make/arm/App_ALL_Common_Sample.mak create mode 100644 4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/src/App_ALL_Common_Sample.c create mode 100644 4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/src/All.c create mode 100644 4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/src/All_Version.c diff --git a/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/include/All.h b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/include/All.h new file mode 100644 index 0000000..2791b77 --- /dev/null +++ b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/include/All.h @@ -0,0 +1,629 @@ +/*============================================================================*/ +/* Project = R-Car Gen4 AR19-11 MCAL */ +/* Module = Can.h */ +/* SW-VERSION = 1.1.17 */ +/*============================================================================*/ +/* COPYRIGHT */ +/*============================================================================*/ +/* Copyright(c) 2021-2024 Renesas Electronics Corporation. */ +/*============================================================================*/ +/* Purpose: */ +/* Provision of external declaration of APIs and Service IDs. */ +/* */ +/*============================================================================*/ +/* */ +/* Unless otherwise agreed upon in writing between your company and */ +/* Renesas Electronics Corporation the following shall apply! */ +/* */ +/* Warranty Disclaimer */ +/* */ +/* There is no warranty of any kind whatsoever granted by Renesas. Any */ +/* warranty is expressly disclaimed and excluded by Renesas, either expressed */ +/* or implied, including but not limited to those for non-infringement of */ +/* intellectual property, merchantability and/or fitness for the particular */ +/* purpose. */ +/* */ +/* Renesas shall not have any obligation to maintain, service or provide bug */ +/* fixes for the supplied Product(s) and/or the Application. */ +/* */ +/* Each User is solely responsible for determining the appropriateness of */ +/* using the Product(s) and assumes all risks associated with its exercise */ +/* of rights under this Agreement, including, but not limited to the risks */ +/* and costs of program errors, compliance with applicable laws, damage to */ +/* or loss of data, programs or equipment, and unavailability or */ +/* interruption of operations. */ +/* */ +/* Limitation of Liability */ +/* */ +/* In no event shall Renesas be liable to the User for any incidental, */ +/* consequential, indirect, or punitive damage (including but not limited */ +/* to lost profits) regardless of whether such liability is based on breach */ +/* of contract, tort, strict liability, breach of warranties, failure of */ +/* essential purpose or otherwise and even if advised of the possibility of */ +/* such damages. Renesas shall not be liable for any services or products */ +/* provided by third party vendors, developers or consultants identified or */ +/* referred to the User by Renesas in connection with the Product(s) and/or */ +/* the Application. */ +/* */ +/*============================================================================*/ +/* Environment: */ +/* Devices: RCar S4, Rcar V4H, V4M */ +/*============================================================================*/ + +/******************************************************************************* +** Revision History ** +*******************************************************************************/ +/* + * 1.1.17:18/12/2023 : Update CAN_SW_PATCH_VERSION + * Increase software version to 1.1.17 + * 1.1.15:18/06/2023 : Update CAN_SW_PATCH_VERSION + * Increase software version to 1.1.15 + * 1.1.14:18/04/2023 : Update CAN_SW_PATCH_VERSION + * Increase software version to 1.1.14 + * 1.1.13:23/03/2023 : Update CAN_SW_PATCH_VERSION + * Increase software version to 1.1.13 + * 1.1.12:14/02/2023 : Update CAN_SW_PATCH_VERSION + * Increase software version to 1.1.12 + * 1.1.11:17/01/2023 : Update CAN_SW_PATCH_VERSION + * Increase software version to 1.1.11 + * 1.1.10:15/12/2022 : Update CAN_SW_PATCH_VERSION + * Increase software version to 1.1.10 + * 1.1.9: 15/11/2022 : Update CAN_SW_PATCH_VERSION + * : 04/11/2022 : Increase software version to 1.1.9 + * 1.1.8: 18/10/2022 : Update Misra-C rules messages + * 05/10/2022 : Increase software version to 1.1.8 + * 1.1.6: 20/08/2022 : Add new Can_TimeStampProtolType, + * CAN_TSCAP_RECEIVE_CALLOUT_FUNCTION and + * CAN_TSCAP_TRANSMIT_CALLOUT_FUNCTION to support + * Can Time Sync feature + * 08/08/2022 : Added declaration Can_RAMTest API. + * Increase software version to 1.0.5 + * Add service ID for Can_RAMTest + * Add service ID and declaration for new API + * Can_SetIcomConfiguration(). + * Add pointer element pIcomConfig in Can_ConfigType type. + * Add CWE rule ID to QA-C messages header. + * Add extern call-out function CAN_ICOM_CALLOUT_FUNCTION. + * 06/08/2022 : Update CWE Rule Violation + * 1.1.5: 08/07/2022 : Add service ID for API Can_SelfTestChannel. + * Add new data type Can_SelfTestType. + * Add declaration of API Can_SelfTestChannel. + * Increase software version to 1.0.4. + * 07/07/2022 : Added decalration of Can_SelfTestChannel API, + * new data type Can_SelfTestType and + * CAN_SELFTEST_CHANNEL_SID. + * 1.1.3: 22/06/2022 : Added decalration Can_RAMTest API. + * Change CAN_SW_PATCH_VERSION. + * 1.1.2: 08/04/2022 : Can_ConfigType change memclass from + * CAN_RSCAN_CONFIG_DATA into TYPEDEF for all VAR type. + * Change all memclass from CAN_RSCAN_APPL_DATA into + * AUTOMATIC for all API argument VAR type + * Add start, stop section PRIVATE_CODE + * for Can_CommonDetCheck + * Change memclass from CAN_RSCAN_PUBLIC_CONST into + * AUTOMATIC for argument P2CONST type in Can_Init + * Correct memclass of function Can_SetIcomConfiguration + * from PRIVATE_CODE to PUBLIC_CODE + * 1.1.1: 23/03/2022 : Change version of CAN_SW_PATCH_VERSION + * 1.1.0: 22/02/2022 : Added decalration Can_SetIcomConfiguration API and SID + * : Added Icom config pointer to Can_ConfigType + * 1.0.3: 22/12/2021 : Change CAN_SW_PATCH_VERSION + * 1.0.2: 29/11/2021 : Move declaration of schedule function to SchM_Can.h + * Correct declaration of Can_ChangeBaudrate API + * 26/11/2021 : Added Can_GetControllerTxErrorCounter and + * Can_GetControllerRxErrorCounter declaration + * 1.0.1: 10/09/2021 : Add AUTOSAR release version information AR1911. + * 1.0.0: 10/06/2021 : Initial version. + */ +/******************************************************************************/ +#ifndef CAN_H +#define CAN_H + +/******************************************************************************* +** Include Section ** +*******************************************************************************/ +/* Include standard Autosar Type */ +#include "Std_Types.h" +/* CAN Pre-compile configuration Header File */ +#include "Can_Cfg.h" +/* CAN Driver GeneralTypes Header File */ +#include "Can_GeneralTypes.h" +/* Register structure Header file */ +#include "Can_CommonRegStruct.h" + +#include "ComStack_Types.h" + +/******************************************************************************* +** Version Information ** +*******************************************************************************/ +#define CAN_VENDOR_ID CAN_VENDOR_ID_VALUE +#define CAN_MODULE_ID CAN_MODULE_ID_VALUE +#define CAN_INSTANCE_ID CAN_INSTANCE_ID_VALUE + +/* AUTOSAR release version information */ + +#define CAN_AR_422_VERSION 422 +#define CAN_AR_431_VERSION 431 +#define CAN_AR_1911_VERSION 450 + +#if (CAN_AR_VERSION == CAN_AR_422_VERSION) + +#define CAN_AR_RELEASE_MAJOR_VERSION 4U +#define CAN_AR_RELEASE_MINOR_VERSION 2U +#define CAN_AR_RELEASE_REVISION_VERSION 2U + +#elif (CAN_AR_VERSION == CAN_AR_431_VERSION) + +#define CAN_AR_RELEASE_MAJOR_VERSION 4U +#define CAN_AR_RELEASE_MINOR_VERSION 3U +/* MISRA Violation: START Msg(7:0791)-2 */ +#define CAN_AR_RELEASE_REVISION_VERSION 1U +/* END Msg(7:0791)-2 */ + +#elif (CAN_AR_VERSION == CAN_AR_1911_VERSION) + +#define CAN_AR_RELEASE_MAJOR_VERSION 4U +#define CAN_AR_RELEASE_MINOR_VERSION 5U +/* MISRA Violation: START Msg(7:0791)-2 */ +#define CAN_AR_RELEASE_REVISION_VERSION 0U +/* END Msg(7:0791)-2 */ + +#endif /* (CAN_AR_VERSION == CAN_AR_422_VERSION) */ + +/* Module Software version information */ +#define CAN_SW_MAJOR_VERSION 1U +#define CAN_SW_MINOR_VERSION 1U +#define CAN_SW_PATCH_VERSION 17U + +/******************************************************************************* +** MISRA C Rule Violations ** +*******************************************************************************/ + +/* 1. MISRA C RULE VIOLATION: */ +/* Message : (2:3684) Array declared with unknown size. */ +/* Rule : MISRA-C:2012 Rule-8.11, CERTCCM ARR02 */ +/* Justification : Arrays used are verified in the file which are only */ +/* declarations and size is configuration dependent. */ +/* Verification : However, part of the code is verified manually and it is */ +/* not having any impact. */ +/* Reference : Look for START Msg(2:3684)-1 and */ +/* END Msg(2:3684)-1 tags in the code. */ +/******************************************************************************/ + +/* 2. MISRA C RULE VIOLATION: */ +/* Message : (7:0791) [U] Macro identifier does not differ from other */ +/* macro identifier(s) (e.g. '') within the specified */ +/* number of significant characters. */ +/* Rule : MISRA-C:2012 Rule-5.4, CERTCCM DCL23 */ +/* Justification : This macro identifier is following AUTOSAR standard rule */ +/* (Symbolic Name or Published Macro's name), */ +/* so this is accepted. */ +/* Verification : However, part of the code is verified manually */ +/* and it is not having any impact. */ +/* Reference : Look for START Msg(7:0791)-2 and */ +/* END Msg(7:0791)-2 tags in the code. */ +/******************************************************************************/ + +/* 3. MISRA C RULE VIOLATION: */ +/* Message : (2:3432) Simple macro argument expression is not */ +/* parenthesized. */ +/* Rule : MISRA-C:2012 Rule-20.7, CWE-398, CWE-569 */ +/* Justification : Compiler keyword (macro) is defined and used followed */ +/* AUTOSAR standard rule. It is accepted. */ +/* Verification : However, part of the code is verified manually */ +/* and it is not having any impact. */ +/* Reference : Look for START Msg(2:3432)-3 and */ +/* END Msg(2:3432)-3 tags in the code. */ +/******************************************************************************/ + +/******************************************************************************/ +/** QAC warning **/ +/******************************************************************************/ + +/******************************************************************************* +** Global Symbols ** +*******************************************************************************/ +#if (CAN_AR_VERSION == CAN_AR_422_VERSION) + +#define Common_ReturnType Can_ReturnType +#define COMMON_OK CAN_OK +#define COMMON_NOT_OK CAN_NOT_OK + +#define Common_ControllerStateType Can_StateTransitionType +#define COMMON_STATE_UNINIT +#define COMMON_STATE_STARTED CAN_T_START +#define COMMON_STATE_STOPPED CAN_T_STOP +#define COMMON_STATE_SLEEP CAN_T_SLEEP +#define COMMON_STATE_WAKEUP CAN_T_WAKEUP +#define MAX_VALID_STATE_TRANSITION CAN_T_WAKEUP +#define COMMON_IF_STATE_STARTED CANIF_CS_STARTED +#define COMMON_IF_STATE_STOPPED CANIF_CS_STOPPED +#define COMMON_IF_STATE_SLEEP CANIF_CS_SLEEP + +#elif ((CAN_AR_VERSION == CAN_AR_431_VERSION) || \ + (CAN_AR_VERSION == CAN_AR_1911_VERSION)) + +#define Common_ReturnType Std_ReturnType +#define COMMON_OK E_OK +#define COMMON_NOT_OK E_NOT_OK + +#define Common_ControllerStateType Can_ControllerStateType +#define COMMON_STATE_UNINIT CAN_CS_UNINIT +#define COMMON_STATE_STARTED CAN_CS_STARTED +#define COMMON_STATE_STOPPED CAN_CS_STOPPED +#define COMMON_STATE_SLEEP CAN_CS_SLEEP +#define COMMON_STATE_WAKEUP +#define MAX_VALID_STATE_TRANSITION CAN_CS_SLEEP +#define COMMON_IF_STATE_STARTED CAN_CS_STARTED +#define COMMON_IF_STATE_STOPPED CAN_CS_STOPPED +#define COMMON_IF_STATE_SLEEP CAN_CS_SLEEP + +#endif /* (CAN_AR_VERSION == CAN_AR_422_VERSION) */ +/******************************************************************************* +** Service IDs ** +*******************************************************************************/ +/* Service ID for Can_Init */ +#define CAN_INIT_SID (uint8)0x00U +/* Service ID for Can_MainFunction_Write */ +#define CAN_MAIN_WRITE_SID (uint8)0x01U +/* Service ID for Can_SetControllerMode */ +#define CAN_SET_MODECNTRL_SID (uint8)0x03U +/* Service ID for Can_DisableControllerInterupts */ +#define CAN_DISABLE_CNTRL_INT_SID (uint8)0x04U +/* Service ID for Can_EnableControllerInterupts */ +#define CAN_ENABLE_CNTRL_INT_SID (uint8)0x05U +/* Service ID for Can_Write */ +#define CAN_WRITE_SID (uint8)0x06U +/* Service ID for Can_GetVersionInfo */ +#define CAN_GET_VERSIONINFO_SID (uint8)0x07U +/* Service ID for Can_MainFunction_Read */ +#define CAN_MAIN_READ_SID (uint8)0x08U +/* Service ID for Can_MainFunction_BusOff */ +#define CAN_MAIN_BUSOFF_SID (uint8)0x09U +/* Service ID for Can_MainFunction_Wakeup */ +#define CAN_MAIN_WAKEUP_SID (uint8)0x0AU +/* Service ID for Can_CheckWakeup */ +#define CAN_CHECK_WAKEUP_SID (uint8)0x0BU +/* Service ID for Can_MainFunction_Mode */ +#define CAN_MAIN_MODE_SID (uint8)0x0CU +/* Service ID for Can_ChangeBaudrate */ +#define CAN_CHANGE_BAUDRATE_SID (uint8)0x0DU +/* Service ID for Can_CheckBaudrate */ +#define CAN_CHECK_BAUDRATE_SID (uint8)0x0EU +/* Service ID for Can_SetBaudrate */ +#define CAN_SET_BAUDRATE_SID (uint8)0x0FU +/* Service ID for Can_DeInit */ +#define CAN_DEINIT_SID (uint8)0x10U +/* Service ID for Can_GetControllerErrorState */ +#define CAN_GET_ERRSTATECNTRL_SID (uint8)0x11U +/* Service ID for Can_GetControllerMode */ +#define CAN_GET_MODECNTRL_SID (uint8)0x12U +/* Service ID for Can_RxProcessing */ +#define CAN_RXPROCESSING_SID (uint8)0x13U +/* Service ID for Can_IcomRxProcessing */ +#define CAN_ICOM_RXPROCESSING_SID (uint8)0x16U +/* Service ID for Can_GetControllerRxErrorCounter */ +#define CAN_GET_CONTROLLER_RXERROR_COUNTER_SID (uint8)0x30U +/* Service ID for Can_GetControllerTxErrorCounter */ +#define CAN_GET_CONTROLLER_TXERROR_COUNTER_SID (uint8)0x31U +/* Service ID for Can_SetIcomConfiguration */ +#define CAN_SET_ICOM_CONFIGURATION_SID (uint8)0x21U +/* Service ID for Can_RAMTest */ +#define CAN_RAMTEST_SID (uint8)0x22U +/* Service ID for Can_SelfTestChannel */ +#define CAN_SELFTEST_CHANNEL_SID (uint8)0x23U + +/* DET ERRORS */ +/* API service called with null Pointer */ +#define CAN_E_PARAM_POINTER (uint8)0x01U +/* API service called with wrong Handle */ +#define CAN_E_PARAM_HANDLE (uint8)0x02U +/* API service called with wrong Controller Id */ +#define CAN_E_PARAM_CONTROLLER (uint8)0x04U +/* API service called with de-initialization */ +#define CAN_E_UNINIT (uint8)0x05U +/* API service called with wrong Transition */ +#define CAN_E_TRANSITION (uint8)0x06U + +#if (CAN_AR_VERSION == CAN_AR_422_VERSION) + +/* API service called with wrong DLC */ +#define CAN_E_PARAM_DLC (uint8)0x03U +/* Received CAN Message is lost */ +#define CAN_E_DATALOST (uint8)0x07U +/* API service called with invalid baudrate value */ +#define CAN_E_PARAM_BAUDRATE (uint8)0x08U +/* API service called with invalid ICOM configuration Id */ +#define CAN_E_ICOM_CONFIG_INVALID (uint8)0x09U +/* API service called with invalid configuration set selection */ +#define CAN_E_INIT_FAILED (uint8)0x0AU + +#elif ((CAN_AR_VERSION == CAN_AR_431_VERSION) || \ + (CAN_AR_VERSION == CAN_AR_1911_VERSION)) + +/* API service called with wrong Data length */ +#define CAN_E_PARAM_DATA_LENGTH (uint8)0x03U +/* Received CAN Message is lost */ +#define CAN_E_DATALOST (uint8)0x01U +/* API service called with invalid baudrate value */ +#define CAN_E_PARAM_BAUDRATE (uint8)0x07U +/* API service called with invalid ICOM configuration Id */ +#define CAN_E_ICOM_CONFIG_INVALID (uint8)0x08U +/* API service called with invalid configuration set selection */ +#define CAN_E_INIT_FAILED (uint8)0x09U +#endif + +/* API service called when CANFD is not in Global Stop mode */ +#define CAN_RAMTEST_E_INITIALIZED (uint8)0x0BU +/* API service called with BlockId is out of range */ +#define CAN_RAMTEST_E_OUT_OF_RANGE (uint8)0x0CU + +/* API service called with wrong database address */ +#define CAN_E_INVALID_DATABASE (uint8)0xEFU +/* Instance ID Value of CAN driver*/ +#define CAN_INSTANCE_ID_VALUE (uint8)0x00U + +/******************************************************************************* +** Global Data Types ** +*******************************************************************************/ +/* CAN Driver Initialization configuration */ +typedef struct STag_Can_ConfigType +{ + /* StartOfDbToc */ + VAR(uint32, TYPEDEF) ulStartOfDbToc; + /* Element number of HWUnitInfo */ + VAR(uint8, TYPEDEF) ucNoOfUnits; + /* Element number of pControllerPCConfig and pControllerPBConfig */ + VAR(uint8, TYPEDEF) ucNoOfControllers; + /* Element number of pHohConfig */ + VAR(uint16, TYPEDEF) usNoOfHohs; + /* Pointer to HWUnit configuration structures */ + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(void, TYPEDEF, CAN_RSCAN_CONFIG_DATA) pHWUnitInfo; + /* END Msg(2:3432)-3 */ + /* Pointer to Controller Pre-compile Configuration structures */ + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(void, TYPEDEF, CAN_RSCAN_CONFIG_DATA) + pControllerPCConfig; + /* END Msg(2:3432)-3 */ + /* Pointer to Controller Post-build Configuration structures */ + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(void, TYPEDEF, CAN_RSCAN_CONFIG_DATA) + pControllerPBConfig; + /* END Msg(2:3432)-3 */ + /* Pointer to HTH/HRH configuration structures */ + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(void, TYPEDEF, CAN_RSCAN_CONFIG_DATA) pHohConfig; + /* END Msg(2:3432)-3 */ + /* Pointer to ICom Configuration strutures */ + #if(CAN_PUBLIC_ICOM_SUPPORT == STD_ON) + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(void, TYPEDEF, CAN_RSCAN_CONFIG_DATA) pIcomConfig; + /* END Msg(2:3432)-3 */ + #endif + /* Lookup table to get index of Controller from physical number of Channel */ + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(uint8, TYPEDEF, CAN_RSCAN_CONFIG_DATA) pPhysicalControllerToIndex; + /* END Msg(2:3432)-3 */ +} Can_ConfigType; + +#if (STD_ON == CAN_SELFTEST_API) +/* Enum declaration for Can_SelfTest */ +typedef enum ETag_Can_SelfTestType +{ + /* Disable self-test */ + CAN_T_SELF_OFF = 0, + /* Self-test mode 0 (External loopback mode) */ + CAN_T_SELF_EXTERNAL, + /* Self-test mode 1 (Internal loopback mode) */ + CAN_T_SELF_INTERNAL +} Can_SelfTestType; +#endif + +#if (STD_ON == CAN_TIME_SYNC_CAPTURE_EN) +typedef enum ETag_Can_TimeStampProtolType +{ + /* Time Stamp is captured in gPTP standard */ + CAN_TIMESTAMP_GPTP = 0, + /* Time Stamp is captured in AVTP standard */ + CAN_TIMESTAMP_AVTP +} Can_TimeStampProtolType; +#endif +/******************************************************************************* +** Extern declarations for Global Data ** +*******************************************************************************/ +#define CAN_RSCAN_START_SEC_DBTOC_DATA_UNSPECIFIED +#include "Can_MemMap.h" +/* Global array for Config structure */ +/* MISRA Violation: START Msg(2:3684)-1 */ +extern CONST(Can_ConfigType, CAN_RSCAN_CONST) Can_GaaConfig[]; +/* END Msg(2:3684)-1 */ + +#define CAN_RSCAN_STOP_SEC_DBTOC_DATA_UNSPECIFIED +#include "Can_MemMap.h" + +/******************************************************************************* +** Function Prototypes ** +*******************************************************************************/ +#define CAN_RSCAN_START_SEC_PUBLIC_CODE +#include "Can_MemMap.h" + +/* API for global initialization */ +/* MISRA Violation: START Msg(2:3432)-3 */ +extern FUNC(void, CAN_RSCAN_PUBLIC_CODE) Can_Init( + P2CONST(Can_ConfigType, AUTOMATIC, CAN_RSCAN_APPL_DATA) Config); +/* END Msg(2:3432)-3 */ + +#if (CAN_AR_VERSION == CAN_AR_422_VERSION) +#if (CAN_CHANGE_BAUDRATE_API == STD_ON) +/* API for changing baudrate of the Controller */ +extern FUNC(Std_ReturnType, CAN_RSCAN_PUBLIC_CODE) Can_ChangeBaudrate( + VAR(uint8, AUTOMATIC) Controller, + VAR(uint16, AUTOMATIC) BaudRateConfigID); + +/* API for checking baudrates configured for the Controller */ +extern FUNC(Std_ReturnType, CAN_RSCAN_PUBLIC_CODE) Can_CheckBaudrate( + VAR(uint8, AUTOMATIC) Controller, + CONST(uint16, AUTOMATIC) Baudrate); +#endif +#endif + +#if (CAN_SET_BAUDRATE_API == STD_ON) +/* API for changing baudrate of the Controller by ID value */ +extern FUNC(Std_ReturnType, CAN_RSCAN_PUBLIC_CODE) Can_SetBaudrate( + VAR(uint8, AUTOMATIC) Controller, + VAR(uint16, AUTOMATIC) BaudRateConfigID); +#endif + +/* API for set Controller mode */ +extern FUNC(Common_ReturnType, CAN_RSCAN_PUBLIC_CODE) Can_SetControllerMode( + VAR(uint8, AUTOMATIC) Controller, + VAR(Common_ControllerStateType, AUTOMATIC) Transition); + +#if ((CAN_AR_VERSION == CAN_AR_431_VERSION) || \ + (CAN_AR_VERSION == CAN_AR_1911_VERSION)) + +/* API for global de-initialization */ +extern FUNC(void, CAN_RSCAN_PUBLIC_CODE) Can_DeInit(void); + +/* API for obtaining Controller error state */ +/* MISRA Violation: START Msg(2:3432)-3 */ +extern FUNC(Std_ReturnType, CAN_RSCAN_PUBLIC_CODE) Can_GetControllerErrorState( + VAR(uint8, AUTOMATIC) ControllerId, + P2VAR(Can_ErrorStateType, AUTOMATIC, CAN_RSCAN_APPL_DATA) ErrorStatePtr); +/* END Msg(2:3432)-3 */ + +/* API for obtaining Controller mode */ +/* MISRA Violation: START Msg(2:3432)-3 */ +extern FUNC(Std_ReturnType, CAN_RSCAN_PUBLIC_CODE) Can_GetControllerMode( + VAR(uint8, AUTOMATIC) Controller, + P2VAR(Can_ControllerStateType, AUTOMATIC, CAN_RSCAN_APPL_DATA) + ControllerModePtr); +/* END Msg(2:3432)-3 */ +#endif + +#if (STD_ON == CAN_SELFTEST_API) +/* API for Self-Test */ +extern FUNC(Std_ReturnType, CAN_RSCAN_PUBLIC_CODE) Can_SelfTestChannel( + VAR(uint8, AUTOMATIC) Controller, + VAR(Can_SelfTestType, AUTOMATIC) TestTransition); +#endif + +#if (CAN_AR_VERSION == CAN_AR_1911_VERSION) +/* MISRA Violation: START Msg(2:3432)-3 */ +extern FUNC(Std_ReturnType, CAN_RSCAN_PUBLIC_CODE) Can_GetControllerTxErrorCounter( + VAR(uint8, AUTOMATIC) ControllerId, + P2VAR(uint8, AUTOMATIC, CAN_RSCAN_APPL_DATA) TxErrorCounterPtr); +extern FUNC(Std_ReturnType, CAN_RSCAN_PUBLIC_CODE) Can_GetControllerRxErrorCounter( + VAR(uint8, AUTOMATIC) ControllerId, + P2VAR(uint8, AUTOMATIC, CAN_RSCAN_APPL_DATA) RxErrorCounterPtr); +/* END Msg(2:3432)-3 */ +#endif + +/* API for disabling Controller interrupt */ +extern FUNC(void, CAN_RSCAN_PUBLIC_CODE) Can_DisableControllerInterrupts( + VAR(uint8, AUTOMATIC) Controller); + +/* API for enabling Controller interrupt */ +extern FUNC(void, CAN_RSCAN_PUBLIC_CODE) Can_EnableControllerInterrupts( + VAR(uint8, AUTOMATIC) Controller); + +/* API for Can Write */ +/* MISRA Violation: START Msg(2:3432)-3 */ +extern FUNC(Common_ReturnType, CAN_RSCAN_PUBLIC_CODE) Can_Write( + VAR(Can_HwHandleType, AUTOMATIC) Hth, + P2CONST(Can_PduType, AUTOMATIC, CAN_RSCAN_APPL_DATA) PduInfo); +/* END Msg(2:3432)-3 */ + + +#if (CAN_VERSION_INFO_API == STD_ON) +/* API for getting version information */ +/* MISRA Violation: START Msg(2:3432)-3 */ +extern FUNC(void, CAN_RSCAN_PUBLIC_CODE) Can_GetVersionInfo( + P2VAR(Std_VersionInfoType, AUTOMATIC, CAN_RSCAN_APPL_DATA) versioninfo); +/* END Msg(2:3432)-3 */ +#endif + +#if (CAN_CHECK_WAKEUP_API == STD_ON) +/* API for getting wakeup status of a controller */ +extern FUNC(Common_ReturnType, CAN_RSCAN_PUBLIC_CODE) Can_CheckWakeup( + VAR(uint8, AUTOMATIC) Controller); +#endif + +/* API for activate or deactivate ICOM */ +#if (CAN_PUBLIC_ICOM_SUPPORT == STD_ON) +extern FUNC(Std_ReturnType, CAN_RSCAN_PUBLIC_CODE) Can_SetIcomConfiguration ( + uint8 Controller, IcomConfigIdType ConfigurationId); +#endif + +#if (CAN_RAMTEST_API == STD_ON) +extern FUNC(Std_ReturnType, CAN_RSCAN_PUBLIC_CODE) Can_RAMTest(uint8 LucUnit, uint16 LusPageID); +#endif + +#define CAN_RSCAN_STOP_SEC_PUBLIC_CODE +#include "Can_MemMap.h" + + +#define CAN_RSCAN_START_SEC_APPL_CODE +#include "Can_MemMap.h" + +#if defined(CAN_LPDU_RECEIVE_CALLOUT_FUNCTION) +/* API for reception callout function */ +extern FUNC(boolean, CAN_RSCAN_APPL_CODE) CAN_LPDU_RECEIVE_CALLOUT_FUNCTION( + VAR(uint16, AUTOMATIC) Hrh, + VAR(Can_IdType, AUTOMATIC) CanId, +#if (CAN_AR_VERSION == CAN_AR_422_VERSION) + VAR(uint8, AUTOMATIC) CanDlc, +#elif ((CAN_AR_VERSION == CAN_AR_431_VERSION) || \ + (CAN_AR_VERSION == CAN_AR_1911_VERSION)) + VAR(uint8, AUTOMATIC) CanDataLength, +#endif + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(uint8, AUTOMATIC, CAN_RSCAN_APPL_DATA) CanSduPtr); + /* END Msg(2:3432)-3 */ +#endif + +#if (CAN_TIME_SYNC_CAPTURE_EN == STD_ON) +/* Call out function to forware the captured timestamp of Received frame to upper layer */ +extern FUNC(void, CAN_RSCAN_APPL_CODE) CAN_TSCAP_RECEIVE_CALLOUT_FUNCTION( + VAR(Can_IdType, AUTOMATIC) LdCanId, + VAR(uint8, AUTOMATIC) LucControllerId, + VAR(uint32, AUTOMATIC) LulTimeStampL, + VAR(uint32, AUTOMATIC) LulTimeStampH, + VAR(Can_TimeStampProtolType, AUTOMATIC) LdProtolType); + +/* Call out function to forware the captured timestamp of Transmitted frame to upper layer */ +extern FUNC(void, CAN_RSCAN_APPL_CODE) CAN_TSCAP_TRANSMIT_CALLOUT_FUNCTION( + VAR(PduIdType, AUTOMATIC) CanTxPduId, + VAR(uint32, AUTOMATIC) LulTimeStampL, + VAR(uint32, AUTOMATIC) LulTimeStampH, + VAR(Can_TimeStampProtolType, AUTOMATIC) LdProtolType); + +#endif /* #if (CAN_TIME_SYNC_CAPTURE_EN == STD_ON) */ + +#if ((CAN_PUBLIC_ICOM_SUPPORT == STD_ON) && \ + (CAN_ICOM_PAYLOAD_LENGTH_ERROR_SUPPORT == STD_ON)) +extern FUNC(void, CAN_RSCAN_APPL_CODE) CAN_ICOM_CALLOUT_FUNCTION + (uint8 Controller, IcomConfigIdType ConfigurationId); +#endif + +#define CAN_RSCAN_STOP_SEC_APPL_CODE +#include "Can_MemMap.h" + +#define CAN_RSCAN_START_SEC_PRIVATE_CODE +#include "Can_MemMap.h" + +#if (CAN_DEV_ERROR_DETECT == STD_ON) +/* API for common DET validation */ +extern FUNC(Common_ReturnType, CAN_RSCAN_PRIVATE_CODE) Can_CommonDetCheck( + CONST(uint8, AUTOMATIC) LucSID, CONST(uint8, AUTOMATIC) LucController); +#endif + +#define CAN_RSCAN_STOP_SEC_PRIVATE_CODE +#include "Can_MemMap.h" + +#endif /* CAN_H */ + +/******************************************************************************* +** End of File ** +*******************************************************************************/ diff --git a/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/include/All_Version.h b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/include/All_Version.h new file mode 100644 index 0000000..f6e8bd6 --- /dev/null +++ b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/include/All_Version.h @@ -0,0 +1,86 @@ +/*============================================================================*/ +/* Project = R-Car Gen4 AR19-11 MCAL */ +/* Module = Can_Version.h */ +/* SW-VERSION = 1.1.17 */ +/*============================================================================*/ +/* COPYRIGHT */ +/*============================================================================*/ +/* Copyright(c) 2021-2023 Renesas Electronics Corporation. */ +/*============================================================================*/ +/* Purpose: */ +/* This file contains macros required for checking versions of modules */ +/* included by CAN Driver */ +/* */ +/*============================================================================*/ +/* */ +/* Unless otherwise agreed upon in writing between your company and */ +/* Renesas Electronics Corporation the following shall apply! */ +/* */ +/* Warranty Disclaimer */ +/* */ +/* There is no warranty of any kind whatsoever granted by Renesas. Any */ +/* warranty is expressly disclaimed and excluded by Renesas, either expressed */ +/* or implied, including but not limited to those for non-infringement of */ +/* intellectual property, merchantability and/or fitness for the particular */ +/* purpose. */ +/* */ +/* Renesas shall not have any obligation to maintain, service or provide bug */ +/* fixes for the supplied Product(s) and/or the Application. */ +/* */ +/* Each User is solely responsible for determining the appropriateness of */ +/* using the Product(s) and assumes all risks associated with its exercise */ +/* of rights under this Agreement, including, but not limited to the risks */ +/* and costs of program errors, compliance with applicable laws, damage to */ +/* or loss of data, programs or equipment, and unavailability or */ +/* interruption of operations. */ +/* */ +/* Limitation of Liability */ +/* */ +/* In no event shall Renesas be liable to the User for any incidental, */ +/* consequential, indirect, or punitive damage (including but not limited */ +/* to lost profits) regardless of whether such liability is based on breach */ +/* of contract, tort, strict liability, breach of warranties, failure of */ +/* essential purpose or otherwise and even if advised of the possibility of */ +/* such damages. Renesas shall not be liable for any services or products */ +/* provided by third party vendors, developers or consultants identified or */ +/* referred to the User by Renesas in connection with the Product(s) and/or */ +/* the Application. */ +/* */ +/*============================================================================*/ +/* Environment: */ +/* Devices: RCar S4, Rcar V4H, V4M */ +/*============================================================================*/ + +/******************************************************************************* +** Revision History ** +*******************************************************************************/ +/* + * 1.1.14: 18/04/2023 : Support V4M device. + * 1.0.1: 21/01/2022 : Support V4H device. + * 1.0.0: 10/06/2021 : Initial version. + */ +/******************************************************************************/ +#ifndef CAN_VERSION_H +#define CAN_VERSION_H + +/******************************************************************************* +** Include Section ** +*******************************************************************************/ + +/******************************************************************************* +** Version Information ** +*******************************************************************************/ +/* AUTOSAR Release version information */ +#define CAN_VERSION_AR_RELEASE_MAJOR_VERSION CAN_AR_RELEASE_MAJOR_VERSION +#define CAN_VERSION_AR_RELEASE_MINOR_VERSION CAN_AR_RELEASE_MINOR_VERSION +#define CAN_VERSION_AR_RELEASE_REVISION_VERSION CAN_AR_RELEASE_REVISION_VERSION + +/* Module Software version information */ +#define CAN_VERSION_SW_MAJOR_VERSION CAN_SW_MAJOR_VERSION +#define CAN_VERSION_SW_MINOR_VERSION CAN_SW_MINOR_VERSION + +#endif /* CAN_VERSION_H */ + +/******************************************************************************* +** End of File ** +*******************************************************************************/ diff --git a/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/make/renesas_all_check.mak b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/make/renesas_all_check.mak new file mode 100644 index 0000000..b7116df --- /dev/null +++ b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/make/renesas_all_check.mak @@ -0,0 +1,21 @@ +############################################################################### +# REGISTRY +# +PREPARE_CONFIGURATION_INTERFACE += CAN_MODULE_DBASE_REQ + +CHECK_VARS_WHICH_ARE_REQUIRED += CAN_MODULE_DBASE_REQ + +############################################################################### +# SPECIFIC +# +ifneq ($(CAN_MODULE_DBASE_REQ),yes) +ifneq ($(CAN_MODULE_DBASE_REQ),no) +$(error The value of the variable CAN_MODULE_DBASE_REQ is not valid. \ + Please specify whether database is required or not ) +endif +endif + +ifeq ($(MCU_CONFIG_FILE),no) +$(error The value of the variable MCU_CONFIG_FILE is not valid. \ + Please specify which MCU configuration file is used ) +endif diff --git a/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/make/renesas_all_defs.mak b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/make/renesas_all_defs.mak new file mode 100644 index 0000000..a6aa754 --- /dev/null +++ b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/make/renesas_all_defs.mak @@ -0,0 +1,33 @@ +############################################################################### +# INTERNAL REQUIRED CONFIGURATION +# + +############################################################################### +# REQUIRED (in base_make) +# + +############################################################################### +# SPECIFIC +# + +ifneq ( $(CAN_MODULE_CONFIG_PATH), ) +CAN_MODULE_PROJECT_PATH = $(CAN_MODULE_CONFIG_PATH) +else +CAN_MODULE_PROJECT_PATH = $(CAN_MODULE_CORE_PATH)\Cfg1 +endif + +############################################################################### +# REGISTRY +# +SSC_PLUGINS += renesas_can +renesas_can_DEPENDENT_PLUGINS = + +CC_INCLUDE_PATH += $(CAN_MODULE_CORE_PATH)\include \ + $(CAN_MODULE_CORE_PATH)\include\$(MICRO_VARIANT) \ + $(CAN_MODULE_PROJECT_PATH)\include +CC_SRC_PATH += $(CAN_MODULE_CORE_PATH)\src \ + $(CAN_MODULE_PROJECT_PATH)\src +CPP_INCLUDE_PATH += $(CAN_MODULE_CORE_PATH)\include \ + $(CAN_MODULE_PROJECT_PATH)\include +ASM_INCLUDE_PATH += +PREPROCESSOR_DEFINES += diff --git a/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/make/renesas_all_rules.mak b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/make/renesas_all_rules.mak new file mode 100644 index 0000000..d844874 --- /dev/null +++ b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/make/renesas_all_rules.mak @@ -0,0 +1,104 @@ +############################################################################### +# REGISTRY +# + +LIBRARIES_TO_BUILD += renesas_canlib + +ifeq ($(MICRO_SUB_VARIANT), S4) +renesas_canlib_FILES = \ + $(CAN_MODULE_CORE_PATH)\src\Can.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_MainServ.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_ModeCntrl.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Irq.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Write.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Ram.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Icom.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_RamTest.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_TSCapture.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Version.c + + +CC_FILES_TO_BUILD += \ + $(CAN_MODULE_CORE_PATH)\src\Can.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_MainServ.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_ModeCntrl.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Irq.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Write.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Ram.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Icom.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_RamTest.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_TSCapture.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Version.c +else +renesas_canlib_FILES = \ + $(CAN_MODULE_CORE_PATH)\src\Can.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_MainServ.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_ModeCntrl.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Irq.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Write.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Ram.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Icom.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_RamTest.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Version.c + + +CC_FILES_TO_BUILD += \ + $(CAN_MODULE_CORE_PATH)\src\Can.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_MainServ.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_ModeCntrl.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Irq.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Write.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Ram.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Icom.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_RamTest.c \ + $(CAN_MODULE_CORE_PATH)\src\Can_Version.c +endif + +OBJECTS_LINK_ONLY += + +ifeq ($(CAN_MODULE_DBASE_REQ),yes) +GENERATED_SOURCE_FILES += \ + $(CAN_MODULE_PROJECT_PATH)\src\Can_PBcfg.c \ + $(CAN_MODULE_PROJECT_PATH)\src\Can_Lcfg.c +endif + +MAKE_CLEAN_RULES += can_clean_generated_files +MAKE_GENERATE_RULES += generate_can_config +MAKE_DEBUG_RULES += debug_can_makefile +MAKE_CONFIG_RULES += generate_can_config + +can_clean_generated_files: + @if exist $(CAN_MODULE_PROJECT_PATH)\src\*.c del /Q $(CAN_MODULE_PROJECT_PATH)\src\*.c + @if exist $(CAN_MODULE_PROJECT_PATH)\include\*.h del /Q $(CAN_MODULE_PROJECT_PATH)\include\*.h + @if exist $(CAN_MODULE_PROJECT_PATH)\*.log del /Q $(CAN_MODULE_PROJECT_PATH)\*.log + +############################################################################### +# Command to print debug information # +############################################################################### +debug_can_makefile: + @echo CAN_MODULE_PROJECT_PATH = $(CAN_MODULE_PROJECT_PATH) + @echo CAN_MODULE_CORE_PATH = $(CAN_MODULE_CORE_PATH) + @echo CAN_MODULE_CONFIG_PATH = $(CAN_MODULE_CONFIG_PATH) + @echo CAN_MODULE_CONFIG_FILE = $(CAN_MODULE_CONFIG_FILE) + @echo CAN_MODULE_DBASE_REQ = $(CAN_MODULE_DBASE_REQ) + @echo TRXML_CONFIG_FILE = $(TRXML_CONFIG_FILE) + + @echo CAN_MODULE_BSWMDT_CONFIG_FILE = $(CAN_MODULE_BSWMDT_CONFIG_FILE) + @echo CAN_DEM_CONFIG_FILE = $(CAN_DEM_CONFIG_FILE) + @echo CAN_OS_CONFIG_FILE = $(CAN_OS_CONFIG_FILE) + @echo CAN_ECUM_CONFIG_FILE = $(CAN_ECUM_CONFIG_FILE) + @echo MCU_CONFIG_FILE = $(MCU_CONFIG_FILE) + +############################################################################### +# Command to trigger the tool and generate configuration files # +############################################################################### +generate_can_config: + $(COMMON_TOOL_FILE) -m $(CAN_MODULE_NAME) \ + -o $(CAN_MODULE_PROJECT_PATH) \ + $(CAN_MODULE_CONFIG_FILE) \ + $(TRXML_CONFIG_FILE) \ + $(CAN_MODULE_BSWMDT_CONFIG_FILE) \ + $(MCU_CONFIG_FILE) \ + $(CAN_DEM_CONFIG_FILE) \ + $(CAN_ECUM_CONFIG_FILE) \ + $(CAN_OS_CONFIG_FILE) diff --git a/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/V4M/include/arm/App_ALL_Device_Sample.h b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/V4M/include/arm/App_ALL_Device_Sample.h new file mode 100644 index 0000000..40da44b --- /dev/null +++ b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/V4M/include/arm/App_ALL_Device_Sample.h @@ -0,0 +1,212 @@ +/*============================================================================*/ +/* Project = R-Car Gen4 AR19-11 MCAL */ +/* Module = App_CAN_Device_Sample.h */ +/* SW-VERSION = 1.1.17 */ +/*============================================================================*/ +/* COPYRIGHT */ +/*============================================================================*/ +/* Copyright(c) 2023 Renesas Electronics Corporation. */ +/*============================================================================*/ +/* Purpose: */ +/* Header file information for application */ +/* */ +/*============================================================================*/ +/* */ +/* Unless otherwise agreed upon in writing between your company and */ +/* Renesas Electronics Corporation the following shall apply! */ +/* */ +/* Warranty Disclaimer */ +/* */ +/* There is no warranty of any kind whatsoever granted by Renesas. Any */ +/* warranty is expressly disclaimed and excluded by Renesas, either expressed */ +/* or implied, including but not limited to those for non-infringement of */ +/* intellectual property, merchantability and/or fitness for the particular */ +/* purpose. */ +/* */ +/* Renesas shall not have any obligation to maintain, service or provide bug */ +/* fixes for the supplied Product(s) and/or the Application. */ +/* */ +/* Each User is solely responsible for determining the appropriateness of */ +/* using the Product(s) and assumes all risks associated with its exercise */ +/* of rights under this Agreement, including, but not limited to the risks */ +/* and costs of program errors, compliance with applicable laws, damage to */ +/* or loss of data, programs or equipment, and unavailability or */ +/* interruption of operations. */ +/* */ +/* Limitation of Liability */ +/* */ +/* In no event shall Renesas be liable to the User for any incidental, */ +/* consequential, indirect, or punitive damage (including but not limited */ +/* to lost profits) regardless of whether such liability is based on breach */ +/* of contract, tort, strict liability, breach of warranties, failure of */ +/* essential purpose or otherwise and even if advised of the possibility of */ +/* such damages. Renesas shall not be liable for any services or products */ +/* provided by third party vendors, developers or consultants identified or */ +/* referred to the User by Renesas in connection with the Product(s) and/or */ +/* the Application. */ +/* */ +/*============================================================================*/ +/* Environment: */ +/* Devices: V4M */ +/*============================================================================*/ + +/******************************************************************************* +** Revision Control History ** +*******************************************************************************/ +/* + * 1.1.14: 20/04/2023 : Initial Version + */ +/******************************************************************************/ +#ifndef APP_CAN_DEVICE_SAMPLE_H +#define APP_CAN_DEVICE_SAMPLE_H + +/******************************************************************************* +** Include Section ** +*******************************************************************************/ + +#include "Can.h" + +/******************************************************************************* +** Global Symbols ** +*******************************************************************************/ +/* GPIO Group 2 */ +/* Bus Domain 0 (PFSS) : +H0000 */ +#define PFC_DOMAIN_OFFSET (uint32)0x00000000UL +#define PFC_RW_OFFSET (uint32)0x00000000UL +#define PFC_SET_OFFSET (uint32)0x00000200UL +#define PFC_CLR_OFFSET (uint32)0x00000400UL +#define PFC_MCU_BASE (uint32)0xE6050000UL +#define PFC_PORT_GRP1 (0x00000800UL) /* Port Group1 */ +#define PFC_PORT_GRP2 (0x00008000UL) /* Port Group2 */ +#define PFC_GPSR2_RW *((volatile uint32 *)(PFC_MCU_BASE + PFC_PORT_GRP2 + PFC_RW_OFFSET + 0x0040U)) +#define PFC_IP0SR2_RW *((volatile uint32 *)(PFC_MCU_BASE + PFC_PORT_GRP2 + PFC_RW_OFFSET + 0x0060U)) +#define PFC_IP1SR2_RW *((volatile uint32 *)(PFC_MCU_BASE + PFC_PORT_GRP2 + PFC_RW_OFFSET + 0x0064U)) +#define PFC_IP2SR2_RW *((volatile uint32 *)(PFC_MCU_BASE + PFC_PORT_GRP2 + PFC_RW_OFFSET + 0x0068U)) +#define PFC_DRV1CTRL2_RW *((volatile uint32 *)(PFC_MCU_BASE + PFC_PORT_GRP2 + PFC_RW_OFFSET + 0x0084U)) +#define PFC_DRV2CTRL2_RW *((volatile uint32 *)(PFC_MCU_BASE + PFC_PORT_GRP2 + PFC_RW_OFFSET + 0x0088U)) +#define PFC_INOUTSEL2_RW *((volatile uint32 *)(PFC_MCU_BASE + PFC_PORT_GRP2 + PFC_RW_OFFSET + 0x0184U)) + +#define PFC_GPSR1_RW *((volatile uint32 *)(PFC_MCU_BASE + PFC_PORT_GRP1 + PFC_RW_OFFSET + 0x0040U)) +#define PFC_INOUTSEL1_RW *((volatile uint32 *)(PFC_MCU_BASE + PFC_PORT_GRP1 + PFC_RW_OFFSET + 0x0184U)) +#define PFC_OUTDT1_RW *((volatile uint32 *)(PFC_MCU_BASE + PFC_PORT_GRP1 + PFC_RW_OFFSET + 0x0188U)) +#define PFC_OUTDTSEL1_RW *((volatile uint32 *)(PFC_MCU_BASE + PFC_PORT_GRP1 + PFC_RW_OFFSET + 0x01C0U)) +#define PMMR1 *((volatile uint32 *)(PFC_MCU_BASE + PFC_PORT_GRP1 + 0x0000U)) +#define PMMR2 *((volatile uint32 *)(PFC_MCU_BASE + PFC_PORT_GRP2 + 0x0000U)) + +#define PFC_PMMR2 (PFC_MCU_BASE + PFC_PORT_GRP2 + 0x0000U) +#define PFC_GPSR2_RW_ADD (PFC_MCU_BASE + PFC_PORT_GRP2 + PFC_RW_OFFSET + 0x0040U) +#define PFC_IP0SR2_RW_ADD (PFC_MCU_BASE + PFC_PORT_GRP2 + PFC_RW_OFFSET + 0x0060U) +#define PFC_IP1SR2_RW_ADD (PFC_MCU_BASE + PFC_PORT_GRP2 + PFC_RW_OFFSET + 0x0064U) +#define PFC_IP2SR2_RW_ADD (PFC_MCU_BASE + PFC_PORT_GRP2 + PFC_RW_OFFSET + 0x0068U) +#define PFC_DRV1CTRL2_RW_ADD (PFC_MCU_BASE + PFC_PORT_GRP2 + PFC_RW_OFFSET + 0x0084U) +#define PFC_DRV2CTRL2_RW_ADD (PFC_MCU_BASE + PFC_PORT_GRP2 + PFC_RW_OFFSET + 0x0088U) +#define PFC_INOUTSEL2_RW_ADD (PFC_MCU_BASE + PFC_PORT_GRP2 + PFC_RW_OFFSET + 0x0184U) + +#define PFC_GPSR1_RW_ADD (PFC_MCU_BASE + PFC_PORT_GRP1 + PFC_RW_OFFSET + 0x0040U) +#define PFC_INOUTSEL1_RW_ADD (PFC_MCU_BASE + PFC_PORT_GRP1 + PFC_RW_OFFSET + 0x0184U) +#define PFC_OUTDT1_RW_ADD (PFC_MCU_BASE + PFC_PORT_GRP1 + PFC_RW_OFFSET + 0x0188U) +#define PFC_OUTDTSEL1_RW_ADD (PFC_MCU_BASE + PFC_PORT_GRP1 + PFC_RW_OFFSET + 0x01C0U) + +/* Bit MASK for CAN */ +#define ALL_BIT (uint32)0xFFFFFFFFUL +#define ALL_0 (uint32)0x00000000UL +#define ALL_3 (uint32)0x33333333UL +#define ALL_1 (uint32)0x11111111UL +#define ALL_5 (uint32)0x55555555UL +#define BIT0 (uint32)0x00000001UL +#define BIT3 (uint32)0x00000008UL +#define BIT3_0 (uint32)0x0000000FUL +#define BIT7 (uint32)0x00000080UL +#define BIT8 (uint32)0x00000100UL +#define BIT11_10 (uint32)0x00000C00UL +#define BIT11_8 (uint32)0x00000F00UL +#define BIT15_12 (uint32)0x0000F000UL +#define BIT19_16 (uint32)0x000F0000UL +#define BIT23_20 (uint32)0x00F00000UL +#define BIT27_24 (uint32)0x0F000000UL +#define BIT31_28 (uint32)0xF0000000UL +#define BIT31_28_15_0 (uint32)0x10001111UL +#define BIT15_0 (uint32)0x0000FFFFUL +#define BIT19_10 (uint32)0xF00FFC00UL +#define BIT31_8_EQ_3 (uint32)0x33333300UL +#define BIT15_0_EQ_3 (uint32)0x00003333UL +#define BIT31_8_EQ_6 (uint32)0x66666600UL +#define BIT15_0_EQ_6 (uint32)0x00006666UL +#define BIT31_1 (uint32)0xFFFFFF0EUL +#define BIT_IN_OUT (uint32)0x00055485UL +/* clock protect */ + +/* Enable all modules in this MSR register */ +#define CAN_MSR_ACTIVE 0x00000000UL + +/* Protection key codes */ +#define CAN_KCPROT_CLR 0xA5A5A500UL +#define CAN_KCPROT_SET 0xA5A5A501UL + +/* Enable all modules in this MSR register */ +#define CAN_MSR_ACTIVE 0x00000000UL +/* Disable all modules in this MSR register */ +#define CAN_MSR_STOP 0xFFFFFFFFUL + + +/* PCLK(LSB): 40MHz */ +#define CAN_PCLK_HZ 40000000UL +/* Interval of Can_MainFunction_Handling: 10ms */ +#define CAN_POLLING_INTERVAL_MS 10UL + +/* clock setting */ + +#define CPGWPR *((volatile uint32 *)(0xE6150000UL)) /* CPG Write Protect Register */ +#define MSTPCR3 *((volatile uint32 *)(0xE6152D0CUL)) /* Module Stop Control Register 3 (MSTPCR3) */ +#define MSTPCR3_ADDR 0xE6152D0CUL /* Module Stop Control Register 3 (MSTPCR3) */ +#define CAN_MASK_CLOCK (uint32)(0x01 << 28) +#define CANFDCKCR *((volatile uint32 *)(0xE6150878UL)) /* CAN-FD Clock Frequency Control Register */ +#define CANFDCKCR_ADDR 0xE6150878UL /* CAN-FD Clock Frequency Control Register (CANFDCKCR) */ +#define CAN_SUPPLY_CLOCK (uint32)(9) + +#define SRCR3 *((volatile uint32 *)(0xE6152C0CUL)) /* Software Reset Control register SRCR3*/ +#define SRCR3_ADDR (0xE6152C0CUL) /* Address of Software Reset Control register SRCR3*/ +#define CAN_MASK_RESET (uint32)(0x01 << 28) +#define SRSTCLR3 *((volatile uint32 *)(0xE6152C8CUL)) /* Software Reset Clearing register SRSTCLR3*/ + +/* Timer unit 0 TMU0 related clock */ +#define MSTPCR7 *((volatile uint32 *)(0xE6152D1CUL)) /* Module Stop Control Register 3 (MSTPCR7) */ +#define MSTPCR7_ADDR 0xE6152D1CUL /* Module Stop Control Register 3 (MSTPCR7) */ +#define TMU0_MASK_CLOCK (uint32)(0x01 << 13) +#define TMU_TCR0 (uint32)0x00000020UL + +#define REG_TSTR0 (*((volatile uint8 *) 0xE61E0004UL)) +#define REG_TCOR0 (*((volatile uint32 *) 0xE61E0008UL)) +#define REG_TCNT0 (*((volatile uint32 *) 0xE61E000CUL)) +#define REG_TCR0 (*((volatile uint16 *) 0xE61E0010UL)) +#define REG_TSTR0_TMU0_ENABLE (0x01U) + +/* Interrupt ID */ +#define CAN_CHANNEL_INT_ID (uint32)(444) /* INTID: 0x01BC : 412 + 32 */ +#define CAN_GLOBAL_INT_ID (uint32)(445) /* INTID: 0x01BD : 413 + 32 */ +#define TMU_CHANNEL0_INT_ID (uint32)(321) /* INTID: 0x0141 : 289 + 32 */ + + +/******************************************************************************* +** Function Prototypes ** +*******************************************************************************/ + +extern void Clock_Init(void); +/* Timer Initialization */ +extern void Gpt_Init(void); +/* Controller Port(s) Initialization */ +extern void Port_Init(void); +/* System Initialization */ +extern void Mcu_Init(void); +/* Sub Initialization */ +extern void Can_sub_Init(void); +/* TMU setting */ +extern void Gpt_Init(void); + +extern void Timer_irq_end(void); + +#endif /* APP_CAN_DEVICE_SAMPLE_H */ + +/******************************************************************************* +** End of File ** +*******************************************************************************/ diff --git a/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/V4M/src/arm/App_ALL_V4M_Sample.c b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/V4M/src/arm/App_ALL_V4M_Sample.c new file mode 100644 index 0000000..01832a5 --- /dev/null +++ b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/V4M/src/arm/App_ALL_V4M_Sample.c @@ -0,0 +1,319 @@ +/*============================================================================*/ +/* Project = R-Car Gen4 AR19-11 MCAL */ +/* Module = App_CAN_V4M_Sample.c */ +/* SW-VERSION = 1.1.17 */ +/*============================================================================*/ +/* COPYRIGHT */ +/*============================================================================*/ +/* Copyright(c) 2023 Renesas Electronics Corporation. */ +/*============================================================================*/ +/* Purpose: */ +/* This application file contains execution sequences to demonstrate the usage*/ +/* of CAN Driver APIs. */ +/* */ +/*============================================================================*/ +/* */ +/* Unless otherwise agreed upon in writing between your company and */ +/* Renesas Electronics Corporation the following shall apply! */ +/* */ +/* Warranty Disclaimer */ +/* */ +/* There is no warranty of any kind whatsoever granted by Renesas. Any */ +/* warranty is expressly disclaimed and excluded by Renesas, either expressed */ +/* or implied, including but not limited to those for non-infringement of */ +/* intellectual property, merchantability and/or fitness for the particular */ +/* purpose. */ +/* */ +/* Renesas shall not have any obligation to maintain, service or provide bug */ +/* fixes for the supplied Product(s) and/or the Application. */ +/* */ +/* Each User is solely responsible for determining the appropriateness of */ +/* using the Product(s) and assumes all risks associated with its exercise */ +/* of rights under this Agreement, including, but not limited to the risks */ +/* and costs of program errors, compliance with applicable laws, damage to */ +/* or loss of data, programs or equipment, and unavailability or */ +/* interruption of operations. */ +/* */ +/* Limitation of Liability */ +/* */ +/* In no event shall Renesas be liable to the User for any incidental, */ +/* consequential, indirect, or punitive damage (including but not limited */ +/* to lost profits) regardless of whether such liability is based on breach */ +/* of contract, tort, strict liability, breach of warranties, failure of */ +/* essential purpose or otherwise and even if advised of the possibility of */ +/* such damages. Renesas shall not be liable for any services or products */ +/* provided by third party vendors, developers or consultants identified or */ +/* referred to the User by Renesas in connection with the Product(s) and/or */ +/* the Application. */ +/* */ +/*============================================================================*/ +/* Environment: */ +/* Devices: V4M */ +/*============================================================================*/ + +/******************************************************************************* +** Revision Control History ** +*******************************************************************************/ +/* + * 1.1.14: 18/04/2023 : Initial Version + */ +/******************************************************************************/ +/******************************************************************************* +** Include Section ** +*******************************************************************************/ + +#include "App_CAN_Device_Sample.h" +#include "Interrupt.h" +#include "log.h" +#include "scif.h" + +/******************************************************************************* +** Local Definitions ** +*******************************************************************************/ + +/******************************************************************************* +* Global Variables ** +*******************************************************************************/ +/******************************************************************************* +** Function Prototypes ** +*******************************************************************************/ + +/****************************************************************************** +* Function Definitions ** +******************************************************************************/ + +/* + * Turn off interrupts in the ARM processor + * Turn off IRQ and FIQ interrupt + */ +void cpuirq_disable (void) +{ + __asm("cpsid i\n\t"); +} +/* + * Turn on interrupts in the ARM processor + * Turn on IRQ interrupt & turn off FIQ interrupt + */ +void cpuirq_enable (void) +{ + __asm("cpsie i\n\t"); +} + + +/****************************************************************************** + System Initialization +******************************************************************************/ +void Clock_Init(void) +{ + + Console_Print("[V4M:CAN] Clock_Init start\r\n"); + /**********************************************/ + /* Setting Clock for CANFD */ + /**********************************************/ + /* Get Module stop control register */ + volatile uint32 *reg = (volatile uint32 *)MSTPCR3_ADDR; + + /* Unlock MSTPCR3 register */ + CPGWPR = ~((MSTPCR3 & ~(CAN_MASK_CLOCK))); + + /* Enable Supply clock for CANFD module */ + *reg = (MSTPCR3 & ~(CAN_MASK_CLOCK)); + /* Wait for the status of MSTPCR3 is correct */ + while(CAN_MASK_CLOCK & MSTPCR3); + + /* Reset CANFD by writing to 1 to SRCR3 Register */ + CPGWPR = ~(CAN_MASK_RESET); + reg = (volatile uint32 *)SRCR3_ADDR; + *reg = CAN_MASK_RESET; + while(!(CAN_MASK_RESET & SRCR3)); + + /* Write to software reset clearing register to clearing SRCR3 */ + CPGWPR = ~CAN_MASK_RESET; + SRSTCLR3 = CAN_MASK_RESET; + while(CAN_MASK_RESET & SRCR3); + + /* Unlock CANFDCKCR register */ + CPGWPR = ~((CANFDCKCR & (CAN_SUPPLY_CLOCK))); + /* Supply clock for CANFD module */ + reg = (volatile uint32 *)CANFDCKCR_ADDR; + *reg = (CANFDCKCR & CAN_SUPPLY_CLOCK); + while(!(CAN_SUPPLY_CLOCK & CANFDCKCR)); + + /**********************************************/ + /* Setting internal clock for timer unit TMU0 */ + /**********************************************/ + reg = (volatile uint32 *)MSTPCR7_ADDR ; + /* Unlock TMU0 register */ + CPGWPR = ~((MSTPCR7 & ~(TMU0_MASK_CLOCK))); + /* Enable supply clock for TMU0 */ + *reg = (MSTPCR7 & ~(TMU0_MASK_CLOCK)); +} + + +/* Perform the System initialization */ +void Mcu_Init(void) +{ +} + +/******************************************************************************* +** Watchdog Initialization ** +*******************************************************************************/ +void Wdg_Init(void) +{ + /* call the function */ +} +/****************************************************************************** +* Port Initialization ** +******************************************************************************/ + +void Port_Init(void) +{ + volatile uint32 *regval; + Console_Print("[V4M:CAN] Port_Init start\r\n"); + + /* Set INOUTSEL2 register to select input/ output mode for each TX/RX port */ + PMMR2 = ~(PFC_INOUTSEL2_RW | (BIT_IN_OUT)); + regval = (volatile uint32 *)PFC_INOUTSEL2_RW_ADD; + *regval = (PFC_INOUTSEL2_RW | (BIT_IN_OUT)); + + /* + * GP1_03 -------GPIO * + * GP2_10 -------CANFD0_TX | GP2_16 -------CANFD4_TX * + * GP2_11 -------CANFD0_RX | GP2_17 -------CANFD4_RX * + * GP2_00 -------CANFD1_TX | GP2_02 -------CANFD5_TX * + * GP2_01 -------CANFD1_RX | GP2_03 -------CANFD5_RX * + * GP2_12 -------CANFD2_TX | GP2_07 -------CANFD6_TX * + * GP2_13 -------CANFD2_RX | GP2_08 -------CANFD6_RX * + * GP2_14 -------CANFD3_TX | GP2_18 -------CANFD7_TX * + * GP2_15 -------CANFD3_RX | GP2_19 -------CANFD7_RX * + */ + /* Set the GPSR2 register */ + PMMR2 = ~(PFC_GPSR2_RW | (BIT3_0|BIT7|BIT8|BIT11_10|BIT15_12|BIT19_16)); + regval = (volatile uint32 *)PFC_GPSR2_RW_ADD; + *regval = (PFC_GPSR2_RW | (BIT3_0|BIT7|BIT8|BIT11_10|BIT15_12|BIT19_16)); + + /* Set the IP0SR2 register */ + /* IP0SR2[31:28]: CANFD6_TX: 0x1 */ + /* IP0SR2[15:12]: CANFD5_RX: 0x1 */ + /* IP0SR2[11:8]: CANFD5_TX: 0x1 */ + /* IP0SR2[7:4]: CANFD1_RX: 0x1 */ + /* IP0SR2[3:0]: CANFD1_TX: 0x1 */ + PMMR2 = ~(PFC_IP0SR2_RW | BIT31_28_15_0); + regval = (volatile uint32 *)PFC_IP0SR2_RW_ADD; + *regval = (PFC_IP0SR2_RW | BIT31_28_15_0); + + /* Set the IP1SR2 register */ + /* IP1SR2[31:28]: CANFD3_RX: 0x0 */ + /* IP1SR2[27:24]: CANFD3_TX: 0x0 */ + /* IP1SR2[23:20]: CANFD2_RX: 0x0 */ + /* IP1SR2[19:16]: CANFD2_TX: 0x0 */ + /* IP1SR2[15:12]: CANFD0_RX: 0x0 */ + /* IP1SR2[11:8]: CANFD0_TX: 0x0 */ + /* IP1SR2[3:0]: CANFD6_RX: 0x1 */ + PMMR2 = ~((PFC_IP1SR2_RW & ~(BIT31_1)) | (BIT0)); + regval = (volatile uint32 *)PFC_IP1SR2_RW_ADD; + *regval = ((PFC_IP1SR2_RW & ~(BIT31_1)) | (BIT0)); + + /* Set the IP2SR2 register */ + /* IP2SR2[15:12]: CANFD7_RX: 0x0 */ + /* IP2SR2[11:8]: CANFD7_TX: 0x0 */ + /* IP2SR2[7:4]: CANFD4_RX: 0x0 */ + /* IP2SR2[3:0]: CANFD4_TX: 0x0 */ + PMMR2 = ~(PFC_IP2SR2_RW & ~(ALL_BIT)); + regval = (volatile uint32 *)PFC_IP2SR2_RW_ADD; + *regval = (PFC_IP2SR2_RW & ~(ALL_BIT)); + + /* Set bellow registers to configure Port GP1_03 as Output with high level value */ + /* to enable transceiver for channel 0 */ + /* Set the INOUTSEL1 register to select GP1_03 as Output mode */ + PMMR1 = ~(PFC_INOUTSEL1_RW | BIT3); + regval = (volatile uint32 *)PFC_INOUTSEL1_RW_ADD; + *regval = (PFC_INOUTSEL1_RW | BIT3); + + /* Set the GPSR1 register to select GP1_03 as GPIO */ + PMMR1 = ~(PFC_GPSR1_RW & ~BIT3); + regval = (volatile uint32 *)PFC_GPSR1_RW_ADD; + *regval = (PFC_GPSR1_RW & ~BIT3); + + /* Set the OUTDTSEL1 register */ + PMMR1 = ~(PFC_OUTDTSEL1_RW & ~BIT3); + regval = (volatile uint32 *)PFC_OUTDTSEL1_RW_ADD; + *regval = (PFC_OUTDTSEL1_RW & ~BIT3); + + /* Set the OUTDT1 register */ + PMMR1 = ~(PFC_OUTDT1_RW | BIT3); + regval = (volatile uint32 *)PFC_OUTDT1_RW_ADD; + *regval = (PFC_OUTDT1_RW |BIT3); +} + +/***************************************************************************** + Timer Initialization +*****************************************************************************/ +void Gpt_Init(void) +{ +} + + +void Tmu_Init(uint32 CounterValue) +{ + Console_Print("[V4M:CAN] Tmu_Init start\r\n"); + REG_TSTR0 &= ~(REG_TSTR0_TMU0_ENABLE); + REG_TCR0 |= TMU_TCR0; + REG_TCOR0 = 0x00000000UL; + REG_TCNT0 = 0x00000000UL; + + REG_TCOR0 = CounterValue; + REG_TCNT0 = CounterValue; + + /* To start CH0 timer */ + REG_TSTR0 |= (uint8) 0x01; + +} + +void Timer_irq_end(void) +{ + REG_TCR0 &= (uint16) 0xFEFF; +} + +void Timer_End(void) +{ + /* To stop CH0 timer */ + REG_TSTR0 &= (uint8) 0x06; +} + +/******************************************************************************* + CAN Module Initialization +*******************************************************************************/ + +void Can_sub_Init(void) +{ + Console_Print("[V4M:CAN] Can_sub_Init start\r\n"); + + /* Disable interrupts in the R52 processor */ + cpuirq_disable(); + + Interrupt_Config(); + /* Enable CAN channel Interrupt */ + Interrupt_Enable(CAN_CHANNEL_INT_ID); + /* Set CAN channel Interrupt to IRQ (Group 1) */ + Interrupt_SetGroup(CAN_CHANNEL_INT_ID, 1); + + /* Enable CAN global Interrupt */ + Interrupt_Enable(CAN_GLOBAL_INT_ID); + /* Set CAN global Interrupt to IRQ (Group 1) */ + Interrupt_SetGroup(CAN_GLOBAL_INT_ID, 1); + + /* Enable the interrupt of TMU0 channel 0 */ + Interrupt_Enable(TMU_CHANNEL0_INT_ID); + Interrupt_SetGroup(TMU_CHANNEL0_INT_ID, 1); + + /* Initialize timer TMU0 */ + Tmu_Init(3000000); + + /* enable interrupts in the R52 processor */ + cpuirq_enable(); +} + +/******************************************************************************* + End of the file +*******************************************************************************/ diff --git a/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/include/App_All_Common_Sample.h b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/include/App_All_Common_Sample.h new file mode 100644 index 0000000..32a7176 --- /dev/null +++ b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/include/App_All_Common_Sample.h @@ -0,0 +1,114 @@ +/*============================================================================*/ +/* Project = R-Car Gen4 AR19-11 MCAL */ +/* Module = App_CAN_Common_Sample.h */ +/* SW-VERSION = 1.1.17 */ +/*============================================================================*/ +/* COPYRIGHT */ +/*============================================================================*/ +/* Copyright(c) 2021-2023 Renesas Electronics Corporation. */ +/*============================================================================*/ +/* Purpose: */ +/* Header file information for application */ +/* */ +/*============================================================================*/ +/* */ +/* Unless otherwise agreed upon in writing between your company and */ +/* Renesas Electronics Corporation the following shall apply! */ +/* */ +/* Warranty Disclaimer */ +/* */ +/* There is no warranty of any kind whatsoever granted by Renesas. Any */ +/* warranty is expressly disclaimed and excluded by Renesas, either expressed */ +/* or implied, including but not limited to those for non-infringement of */ +/* intellectual property, merchantability and/or fitness for the particular */ +/* purpose. */ +/* */ +/* Renesas shall not have any obligation to maintain, service or provide bug */ +/* fixes for the supplied Product(s) and/or the Application. */ +/* */ +/* Each User is solely responsible for determining the appropriateness of */ +/* using the Product(s) and assumes all risks associated with its exercise */ +/* of rights under this Agreement, including, but not limited to the risks */ +/* and costs of program errors, compliance with applicable laws, damage to */ +/* or loss of data, programs or equipment, and unavailability or */ +/* interruption of operations. */ +/* */ +/* Limitation of Liability */ +/* */ +/* In no event shall Renesas be liable to the User for any incidental, */ +/* consequential, indirect, or punitive damage (including but not limited */ +/* to lost profits) regardless of whether such liability is based on breach */ +/* of contract, tort, strict liability, breach of warranties, failure of */ +/* essential purpose or otherwise and even if advised of the possibility of */ +/* such damages. Renesas shall not be liable for any services or products */ +/* provided by third party vendors, developers or consultants identified or */ +/* referred to the User by Renesas in connection with the Product(s) and/or */ +/* the Application. */ +/* */ +/*============================================================================*/ +/* Environment: */ +/* Devices: R-Car S4, V4H, V4M */ +/*============================================================================*/ + +/******************************************************************************* +** Revision Control History ** +*******************************************************************************/ +/* + * 1.0.5: 18/04/2023 : Update SampleApp timer interrupt for V4M device. + * 1.1.4: 08/08/2022 : Add extern call-out function Can_IcomCallOut(). + * 1.1.3: 09/05/2022 : Update new method for CAN_CR52_PROC + * 1.1.0: 08/04/2022 : Add start stop section APPL_CODE for Timer_Task + * 1.0.2: 14/02/2022 : Update SampleApp timer interrupt for V4H device. + * 1.0.1: 18/06/2021 : Support CR52 interrupt + * 1.0.0: 10/06/2021 : Initial Version + */ +/******************************************************************************/ +#ifndef APP_CAN_COMMON_SAMPLE_H +#define APP_CAN_COMMON_SAMPLE_H + +/******************************************************************************* +** Include Section ** +*******************************************************************************/ + +#include "Can.h" + +/******************************************************************************* +** Function Prototypes ** +*******************************************************************************/ + +extern void Clock_Init(void); +/* Timer Initialization */ +extern void Gpt_Init(void); +/* Controller Port(s) Initialization */ +extern void Port_Init(void); +/* Watchdog Initialization */ +extern void Wdg_Init(void); +/* System Initialization */ +extern void Mcu_Init(void); +#define CAN_RSCAN_START_SEC_APPL_CODE +#include "Can_MemMap.h" +/* Timer Task */ +extern _INTERRUPT_ FUNC(void, CAN_RSCAN_APPL_CODE) Timer_Task(void); + +#if ((CAN_PUBLIC_ICOM_SUPPORT == STD_ON) && \ + (CAN_ICOM_PAYLOAD_LENGTH_ERROR_SUPPORT == STD_ON)) +extern FUNC(void, CAN_RSCAN_APPL_CODE) Can_IcomCallOut(uint8 Controller, + IcomConfigIdType IcomConfigurationId); +#endif + +#define CAN_RSCAN_STOP_SEC_APPL_CODE +#include "Can_MemMap.h" +/* Sub Initialization */ +extern void Can_sub_Init(void); + +#if (CAN_CR52_PROC == STD_ON) || defined(CAN_V4H_PROC) || defined(CAN_V4M_PROC) +extern void Timer_irq_end(void); +extern void Timer_End(void); +#endif +extern void Tmu_Init(uint32 CounterValue); + +#endif /* APP_CAN_COMMON_SAMPLE_H */ + +/******************************************************************************* +** End of File ** +*******************************************************************************/ diff --git a/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/make/arm/App_ALL_Common_Sample.mak b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/make/arm/App_ALL_Common_Sample.mak new file mode 100644 index 0000000..5a66086 --- /dev/null +++ b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/make/arm/App_ALL_Common_Sample.mak @@ -0,0 +1,140 @@ +################################################################################ +# Makefile to compile and build the Sample Application with the AUTOSAR CAN # +# Driver Component (For Test purposes only) # +# Compatible with GNU Make 3.81 for Win32. # +################################################################################ + +################################################################################ +# Definitions of global environment variables # +################################################################################ + +############################################################################### +# MULTI CORE SAMPLE +# +MODULE_USE_MULTIINSTANCE = no +MODULE_USE_INSTANCE0 = no +MODULE_USE_INSTANCE1 = no + +# FLAGS OF MULTI INSTANCE +ifeq ($(MODULE_USE_MULTIINSTANCE),yes) +CFLAGS += -D$(MSN_MODULE_NAME)_USE_MULTIINSTANCE +ifeq ($(MODULE_USE_INSTANCE0),yes) +CFLAGS += -D$(MSN_MODULE_NAME)_USE_INSTANCE0 +endif +ifeq ($(MODULE_USE_INSTANCE1),yes) +CFLAGS += -D$(MSN_MODULE_NAME)_USE_INSTANCE1 +CC_FILES_TO_BUILD += $(STARTUP_$(MICRO_SUB_VARIANT)_CORE_PATH)\src\arm\Interrupt_VectorTable.c +CPP_FILES_TO_BUILD += $(STARTUP_$(MICRO_SUB_VARIANT)_CORE_PATH)\src\arm\Interrupt_VectorTable.c +endif +endif + +# Database to be linked together with the current application +# Define 'no' to isolate database from the application +MODULE_DBASE_REQ = yes + +# Get the name of the SRECORD file +CURRENT_APPL_SRECORD = $(CURRENT_APPL)_$(MICRO_SUB_VARIANT)_Sample + +# Name of the database if generated separately +MODULE_DB = $(MODULE_NAME)_PBcfg + +# Map common variables to module variables +CAN_MODULE_NAME = $(MODULE_NAME) +CAN_MODULE_CORE_PATH = $(MODULE_CORE_PATH) +CAN_MODULE_CONFIG_PATH = $(MODULE_CONFIG_PATH) +CAN_MODULE_CONFIG_FILE = $(MODULE_CONFIG_FILE) +CAN_MODULE_DBASE_REQ = $(MODULE_DBASE_REQ) +CAN_MODULE_BSWMDT_CONFIG_FILE = $(MODULE_BSWMDT_CONFIG_FILE) +CAN_DEM_CONFIG_FILE = $(DEM_CONFIG_FILE) +CAN_ECUM_CONFIG_FILE = $(ECUM_CONFIG_FILE) +CAN_OS_CONFIG_FILE = $(OS_CONFIG_FILE) + +################################################################################ +# Modules to be included in the project # +################################################################################ + +################################################################################ + +################################################################################ +# DET Module Core Path +# +DET_CORE_PATH = $(STUBS_PATH)\Det +include $(DET_CORE_PATH)\make\det_defs.mak +include $(DET_CORE_PATH)\make\det_rules.mak + +################################################################################ + +################################################################################ +# OS Module Core Path +# +OS_CORE_PATH = $(STUBS_PATH)\Os +include $(OS_CORE_PATH)\make\os_defs.mak +include $(OS_CORE_PATH)\make\os_rules.mak + +################################################################################ + +################################################################################ +# DEM Module Core Path +# +DEM_CORE_PATH = $(STUBS_PATH)\Dem +include $(DEM_CORE_PATH)\make\dem_defs.mak +include $(DEM_CORE_PATH)\make\dem_rules.mak + +################################################################################ + +################################################################################ +# Scheduler Manager Module Core Path +# +RTE_CORE_PATH = $(STUBS_PATH)\Rte +include $(RTE_CORE_PATH)\make\rte_defs.mak +include $(RTE_CORE_PATH)\make\rte_rules.mak + +################################################################################ +# ECUM Module Core Path +# +ECUM_CORE_PATH = $(STUBS_PATH)\EcuM +include $(ECUM_CORE_PATH)\make\ecum_defs.mak +include $(ECUM_CORE_PATH)\make\ecum_rules.mak + +################################################################################ + +################################################################################ +# Driver Component +# +MODULE_CORE_PATH = $(PROJECT_ROOT)\$(MICRO_FAMILY)\modules\$(MODULE_NAME) +include $(MODULE_CORE_PATH)\make\renesas_$(MODULE_NAME)_defs.mak +include $(MODULE_CORE_PATH)\make\renesas_$(MODULE_NAME)_check.mak +include $(MODULE_CORE_PATH)\make\renesas_$(MODULE_NAME)_rules.mak + +################################################################################ +# Can_General Module Core Path +# +CANGENERAL_CORE_PATH = $(STUBS_PATH)\CanGeneral +include $(CANGENERAL_CORE_PATH)\make\cangeneral_defs.mak +include $(CANGENERAL_CORE_PATH)\make\cangeneral_rules.mak + +################################################################################ +# CanIf Module Core Path +# +CANIF_CORE_PATH = $(STUBS_PATH)\CanIf +include $(CANIF_CORE_PATH)\make\canif_defs.mak +include $(CANIF_CORE_PATH)\make\canif_rules.mak + +################################################################################ +# Command to generate standalone database # +################################################################################ +$(MODULE_DB).$(S_RECORD_SUFFIX):$(MODULE_DB).$(OBJ_FILE_SUFFIX) $(LNKFILE_DB) + @echo ********************************************************************* + @echo Building the standalone database ... + $(DBLINKER) $(LNKFILE_DB) $(LNKFILE_COMMON) \ + "$(OBJECT_OUTPUT_PATH)\$(MODULE_DB).$(OBJ_FILE_SUFFIX)" \ + -map="$(OBJECT_OUTPUT_PATH)\$(MODULE_DB).$(MAP_FILE_SUFFIX)" \ + -o "$(OBJECT_OUTPUT_PATH)\$(MODULE_DB).$(EXE_FILE_SUFFIX)" + @echo Generating Motorola S-Record file... + $(CONVERTER) $(SFLAGS) "$(OBJECT_OUTPUT_PATH)\$(MODULE_DB).$(EXE_FILE_SUFFIX)" \ + -o "$(OBJECT_OUTPUT_PATH)\$(MODULE_DB).$(S_RECORD_SUFFIX)" + @echo Done ... + +################################################################################ +# End of the Base Make script # +################################################################################ diff --git a/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/src/App_ALL_Common_Sample.c b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/src/App_ALL_Common_Sample.c new file mode 100644 index 0000000..f898c2f --- /dev/null +++ b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/sample_application/src/App_ALL_Common_Sample.c @@ -0,0 +1,1081 @@ +/*============================================================================*/ +/* Project = R-Car Gen4 AR19-11 MCAL */ +/* Module = App_CAN_Common_Sample.c */ +/* SW-VERSION = 1.1.17 */ +/*============================================================================*/ +/* COPYRIGHT */ +/*============================================================================*/ +/* Copyright(c) 2021-2023 Renesas Electronics Corporation. */ +/*============================================================================*/ +/* Purpose: */ +/* This application file contains execution sequences to demonstrate the usage*/ +/* of CAN Driver APIs. */ +/* */ +/*============================================================================*/ +/* */ +/* Unless otherwise agreed upon in writing between your company and */ +/* Renesas Electronics Corporation the following shall apply! */ +/* */ +/* Warranty Disclaimer */ +/* */ +/* There is no warranty of any kind whatsoever granted by Renesas. Any */ +/* warranty is expressly disclaimed and excluded by Renesas, either expressed */ +/* or implied, including but not limited to those for non-infringement of */ +/* intellectual property, merchantability and/or fitness for the particular */ +/* purpose. */ +/* */ +/* Renesas shall not have any obligation to maintain, service or provide bug */ +/* fixes for the supplied Product(s) and/or the Application. */ +/* */ +/* Each User is solely responsible for determining the appropriateness of */ +/* using the Product(s) and assumes all risks associated with its exercise */ +/* of rights under this Agreement, including, but not limited to the risks */ +/* and costs of program errors, compliance with applicable laws, damage to */ +/* or loss of data, programs or equipment, and unavailability or */ +/* interruption of operations. */ +/* */ +/* Limitation of Liability */ +/* */ +/* In no event shall Renesas be liable to the User for any incidental, */ +/* consequential, indirect, or punitive damage (including but not limited */ +/* to lost profits) regardless of whether such liability is based on breach */ +/* of contract, tort, strict liability, breach of warranties, failure of */ +/* essential purpose or otherwise and even if advised of the possibility of */ +/* such damages. Renesas shall not be liable for any services or products */ +/* provided by third party vendors, developers or consultants identified or */ +/* referred to the User by Renesas in connection with the Product(s) and/or */ +/* the Application. */ +/* */ +/*============================================================================*/ +/* Environment: */ +/* Devices: S4, V4H, V4M */ +/*============================================================================*/ + +/******************************************************************************* +** Revision Control History ** +*******************************************************************************/ +/* + * 1.1.15:19/06/2023 : Update logic for new macro CAN_V4M_PROC. + * 1.1.14:18/04/2023 : Support V4M device. + * 1.1.9: 17/11/2022 : Update function Appl_Can_Set_Baudrate to change + * baudrate of controller1 to 500kbps + * 1.1.8: 19/08/2022 : Add definition of Can_RXTSUserCalloutFunction and + * Can_TXTSUserCalloutFunction + * : Add Can_SetIcomConfiguration() to main function to + * support Pretended Networking function. + * Add Can_RAMTest() function. + * Add definition call-out function Can_IcomCallOut(). + * : Update main() function to support Can_SelfTestChannel + * Update main() function to support + * Can_GetControllerTxErrorCounter(), + * Can_GetControllerRxErrorCounter() and + * Can_SelfTestChannel() APIs. + * 1.1.7: 27/06/2022 : Add Can_RAMTest function + * : Update main() function to support + * Can_EnableControllerInterrupts() and + * Can_DisableControllerInterrupts() API for V4H device + * : Update new method for CAN_CR52_PROC + * : Remove the while(1) at the end of SampleApplication. + * : Update SampleApp to support transmit/receive interrupt. + * for V4H device. + * 1.1.6: 08/04/2022 : Add section APPL_CODE for Timer_Task + * and UserCalloutFunction + * Change memclass from CAN_RSCAN_APPL_DATA into + * AUTOMATIC for argument VAR type in UserCalloutFunction + * 1.1.5: 05/03/2022 : Add Icom function and remove redundant global variable + * 03/03/2022 : Add Cover block testing for Channel 1 for Sprint1. + * 1.1.4: 14/02/2022 : Update SampleApp for V4H device. + * 1.1.3: 11/01/2022 : Update SampleApp to support CI job of G4MH core + * 1.1.2: 05/12/2021 : Added features: interrupt transmit/receive, check wakeup + * for Alpha2 Release + * 22/11/2021 : Supported checkpoints for CICD running. + * 1.1.1: 22/09/2021 : Supported AUTOSAR version R19-11. + * 1.1.0: 07/04/2021 : Supported Interrupts. + * 1.0.0: 15/03/2021 : Initial Version + */ +/******************************************************************************/ +/******************************************************************************* +** Include Section ** +*******************************************************************************/ +#include "App_Can_Common_Sample.h" +#include "CanIf.h" +#include "Can_Ram.h" +#if (CAN_CR52_PROC == STD_ON) || defined(CAN_V4H_PROC) || defined(CAN_V4M_PROC) +#include "log.h" +#include "scif.h" +#endif +/******************************************************************************* +** Global Variables ** +*******************************************************************************/ + +#define CAN_PASS '1' +#define CAN_FAIL '0' + +/******************************************************************************* +* Global Symbols ** +*******************************************************************************/ + +/* Variable used to store the result of version information check*/ +uint8 GucVerCheckStatus; + +void Appl_Can_Init(void); +void Appl_Can_Mode_Start(void); +void Appl_Can_Set_Baudrate(void); +void Appl_Can_Mode_Stop(void); +void Appl_Can_Get_Mode(void); +void Appl_Scheduler_Task(void); + +const uint8 GaaByteArray0[] = { 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08}; +const uint8 GaaByteArray1[] = { 0x02, 0x04, 0x06, 0x08, 0x01, 0x03, 0x05, 0x07}; + +#if (CAN_AR_VERSION == CAN_AR_422_VERSION) +Can_ReturnType GenCanReturn; +#elif (CAN_AR_VERSION == CAN_AR_431_VERSION) || (CAN_AR_VERSION == CAN_AR_1911_VERSION) +Std_ReturnType GenCanReturn; +#endif /* (CAN_AR_VERSION == CAN_AR_422_VERSION) */ +/* Support collecting checkpoint status */ +uint8 GaaTestResult[100]; +uint8 GucTestResultCount; +volatile uint8 LucFlagFinalResult; +/* Count transmit, receive error */ +uint8 GaaTestErrTransmit[2]; +uint8 GaaTestErrReceive[2]; +/* Support G4MH CI specific */ +#if (CAN_CR52_PROC == STD_OFF) && !(defined(CAN_V4H_PROC) && !defined(CAN_V4M_PROC)) +const char *GucProgramStart; +const char *GucProgramStop; +const char *GucFinalResult; +#endif +/****************************************************************************** +* Function Definitions ** +******************************************************************************/ +void sample_end(void) +{ + volatile uint8 i; + + /* Init Result value */ + LucFlagFinalResult = TRUE; + /* Check final result of all checked points */ + for(i = 0; i < GucTestResultCount; i++) + { + if (GaaTestResult[i] == FALSE) + { + LucFlagFinalResult = FALSE; + break; + } + } + /* send result out */ + if (LucFlagFinalResult == TRUE) + { +#if (CAN_CR52_PROC == STD_ON) || defined(CAN_V4H_PROC) || defined(CAN_V4M_PROC) + Console_Print("EXECUTED OK\n"); +#else + GucFinalResult = "EXECUTED OK"; +#endif + } + else + { +#if (CAN_CR52_PROC == STD_ON) || defined(CAN_V4H_PROC) || defined(CAN_V4M_PROC) + Console_Print("EXECUTED NOT OK\n"); +#else + GucFinalResult = "EXECUTED NOT OK"; +#endif + } + /* End of program */ +#if (CAN_CR52_PROC == STD_ON) || defined(CAN_V4H_PROC) || defined(CAN_V4M_PROC) + Console_Print("PROGRAM STOP\n"); + Timer_End(); +#else /* G4MH */ + GucProgramStop = "PROGRAM STOP"; +#endif +} + +int main(void) +{ + Can_PduType LddCanPduType; + Std_VersionInfoType versionInfo; +#if (CAN_WAKEUP_SUPPORT == STD_ON) + Can_ControllerStateType LenCanCntlState; +#endif + uint8 LucHthId; + volatile uint32 LulCount; + volatile uint8 i; + /* Init count of checkpoint */ + GucTestResultCount = 0; + GucTransmitCount = 0; + GucReceiveCount = 0; + GucWakeupCount = 0; + GucBusOffCount = 0; + + /* System Initialization + (Clock Initialization, Programmable Peripheral I/O register, + Selecting the clock for the CAN Module ETC..) */ +#if (CAN_CR52_PROC == STD_ON) || defined(CAN_V4H_PROC) || defined(CAN_V4M_PROC) + Scif_Init(); + /* PROGRAM START */ + Console_Print("PROGRAM START\n"); +#else + /* PROGRAM START */ + GucProgramStart = "PROGRAM START"; +#endif + Clock_Init(); + + /* Initialize MCU */ + Mcu_Init(); + + /* CAN Port Pin Configuration */ + Port_Init(); + /* Initialize Watchdog */ + Wdg_Init(); + + + /* CAN global as well as controller initialization and put the Controller + into START mode */ + Appl_Can_Init(); + + LulCount = 10000; + while (LulCount--); + + /* To get the CAN Driver version information */ + Can_GetVersionInfo(&versionInfo); + /* Check for the correctness of version information */ + if ((versionInfo.vendorID == CAN_VENDOR_ID) && + (versionInfo.moduleID == CAN_MODULE_ID) && + (versionInfo.sw_major_version == CAN_SW_MAJOR_VERSION) && + (versionInfo.sw_minor_version == CAN_SW_MINOR_VERSION) && + (versionInfo.sw_patch_version == CAN_SW_PATCH_VERSION)) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + + ENABLE_INTERRUPT(); + + /* Timer 0 Initialization */ + Gpt_Init(); + + /* To test CAN driver goes back to normal operation after Activate and De-activate PN feature */ + #if (CAN_PUBLIC_ICOM_SUPPORT == STD_ON) + /* Activate PN: CONTROLLER0 & ICOMID != 0 */ + GenCanReturn = Can_SetIcomConfiguration(CanConf_CanController_CanController0, /* IconfigID */0x01); + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + /* De-activate PN: CONTROLLER0 & ICOMID = 0 */ + GenCanReturn = Can_SetIcomConfiguration(CanConf_CanController_CanController0, /* IconfigID */0x00); + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + #endif + + /***************************************/ + /* Transmit an L-PDU for Controller 0 */ + /* Polling send FD00 obj:2 */ + /***************************************/ + LucHthId = 2; + LddCanPduType.length = 0x08; + LddCanPduType.swPduHandle = 0x02; + LddCanPduType.id = 0x100; + LddCanPduType.sdu = (uint8 *)&GaaByteArray1[0]; + GenCanReturn = Can_Write(LucHthId, &LddCanPduType); + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + + /***************************************/ + /* Receive FD00 obj:0 ID: 0x101 */ + /* Polling Transmit FD00 */ + /* Polling Receive FD00 */ + /***************************************/ + /* Confirm transmission */ + LulCount = 2000000; + while ((LulCount--) && (GucTransmitCount != 1)) + { + Can_MainFunction_Write(); + } + + LulCount = 2000000; + while ((LulCount--) && (GucReceiveCount != 1)) + { + Can_MainFunction_Read(); + } + + /* Transmit and Receive Success */ + if ((GucReceiveCount == 1) && (GucTransmitCount == 1)) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + + /***************************************/ + /* SetControllerMode START -> STOP */ + /* FD00 */ + /***************************************/ + /* Put the Controller 0 into STOP Mode. + CAN Controller will stop transmitting and receiving L-PDUs after this */ + + Appl_Can_Mode_Stop(); + + LulCount = 2000000; + while (LulCount--); + + Appl_Can_Get_Mode(); + + /***************************************/ + /* Checking Wakeup feature */ + /***************************************/ +#if (CAN_WAKEUP_SUPPORT == STD_ON) + GenCanReturn = Can_SetControllerMode( + CanConf_CanController_CanController0, CAN_CS_SLEEP); + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + /* Wait for mode transition */ + LulCount = 100000; + while (LulCount--){} + + GenCanReturn = Can_GetControllerMode( + CanConf_CanController_CanController0, &LenCanCntlState); + if (E_OK == GenCanReturn && CAN_CS_SLEEP == LenCanCntlState) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + + /* Put the Controller 0 to STOP Mode from SLEEP mode + Note: Following API can be invoked to put the Controller into STOP mode + from SLEEP mode */ + GenCanReturn = Can_SetControllerMode( + CanConf_CanController_CanController0, CAN_CS_STOPPED); + if (E_OK == GenCanReturn) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + /* Wait for mode transition */ + LulCount = 100000; + while (LulCount--){} + GenCanReturn = Can_GetControllerMode( + CanConf_CanController_CanController0, &LenCanCntlState); + if (E_OK == GenCanReturn && CAN_CS_STOPPED == LenCanCntlState) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + /* Following API detects the wakeup event for controller 0 */ + GenCanReturn = Can_CheckWakeup(CanConf_CanController_CanController0); + if (E_NOT_OK == GenCanReturn) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } +#endif /* #if (CAN_WAKEUP_SUPPORT == STD_ON) */ + /***************************************/ + /* SetControllerMode STOP -> START */ + /* FD00 */ + /***************************************/ + /* Put the Controller 0 to START mode from STOP mode + Note: Following API can be invoked to put the Controller into START mode + from STOP mode. CAN Controller can receive/transmit an L-PDU after this */ + Appl_Can_Mode_Start(); + + /***************************************/ + /* Transmit an L-PDU for Controller 0 */ + /* Polling send FD00 obj:2 (again) */ + /***************************************/ + + /* Transmit an L-PDU for Controller 0 */ + /* Polling send FD00 obj:2 */ + LucHthId = 2; + LddCanPduType.length = 0x08; + LddCanPduType.swPduHandle = 0x02; + LddCanPduType.id = 0x100; + LddCanPduType.sdu = (uint8 *)&GaaByteArray1[0]; + GenCanReturn = Can_Write(LucHthId, &LddCanPduType); + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + /***************************************/ + /* Receive FD00 obj:0 ID: 0x101 */ + /* Polling Transmit FD00 */ + /* Polling Receive FD00 */ + /***************************************/ + LulCount = 2000000; + while ((LulCount--) && (GucTransmitCount < 2)) + { + Can_MainFunction_Write(); + } + + LulCount = 2000000; + while ((LulCount--) && (GucReceiveCount < 2)) + { + Can_MainFunction_Read(); + } + /* Transmit and Receive Success */ + if ((GucReceiveCount == 2) && (GucTransmitCount == 2)) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + + /***************************************/ + /* Set stop for all channel */ + /* STOP -> DEINIT -> INIT -> START */ + /***************************************/ + Appl_Can_Mode_Stop(); + + LulCount = 2000000; + while (LulCount--); + + Can_DeInit(); + + /* Reinitialize CAN driver */ + Can_Init(Can_Config); + + + LulCount = 2000000; + while (LulCount--); + /* Put the Controller 0 to START mode from STOP mode + Note: Following API can be invoked to put the Controller into START mode + from STOP mode. CAN Controller can receive/transmit an L-PDU after this */ + Appl_Can_Mode_Start(); + + /***************************************/ + /* Transmit an L-PDU for Controller 1 */ + /* Interrupt send FD01 obj:3 */ + /***************************************/ + LucHthId = 3; + LddCanPduType.length = 8; + LddCanPduType.swPduHandle = 0x02; + LddCanPduType.id = 0x058; + LddCanPduType.sdu = (uint8 *)&GaaByteArray0[0]; + GenCanReturn = Can_Write(LucHthId, &LddCanPduType); + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + /* Confirm transmission */ + LulCount = 5000000; + while (LulCount--); + + /* Transmit and Receive Success */ + if ((GucReceiveCount == 3) && (GucTransmitCount == 3)) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + + /* Following API can be invoked while entering a critical area where + controller interrupts need to be disabled */ + Can_DisableControllerInterrupts(1); + + LulCount = 5000000; + while (LulCount--); + + /***************************************/ + /* Transmit an L-PDU for Controller 1 */ + /* Interrupt send FD01 obj:3 (again) */ + /***************************************/ + LucHthId = 3; + LddCanPduType.length = 8; + LddCanPduType.swPduHandle = 0x02; + LddCanPduType.id = 0x058; + LddCanPduType.sdu = (uint8 *)&GaaByteArray0[0]; + GenCanReturn = Can_Write(LucHthId, &LddCanPduType); + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + + LulCount = 5000000; + while (LulCount--); + + /* Transmit Confirmation and Receive Indication are not success */ + /* Because interrupt is disable */ + if ((GucReceiveCount == 3) && (GucTransmitCount == 3)) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + + /***************************************/ + /* Re-Enable Controller 1 */ + /***************************************/ + Can_EnableControllerInterrupts(1); + + + LulCount = 5000000; + while (LulCount--); + + /* Transmit Confirmation and Receive Indication are success */ + /* Because interrupt is enable */ + if ((GucReceiveCount == 4) && (GucTransmitCount == 4)) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + + /* Get Transmit, Receive error counter */ + for (i=0; i<2; i++) + { + /* Init value before reading */ + GaaTestErrTransmit[i] = 0xff; + GenCanReturn = Can_GetControllerTxErrorCounter(i, &GaaTestErrTransmit[i]); + /* Checking if Read value is OK */ + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + /* Expect no error durring transmit */ + if (0x00 == GaaTestErrTransmit[i]) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + + /* Init value before reading */ + GaaTestErrReceive[i] = 0xff; + GenCanReturn = Can_GetControllerRxErrorCounter(i, &GaaTestErrReceive[i]); + /* Checking if Read value is OK */ + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + /* Expect no error durring receiving */ + if (0x00 == GaaTestErrReceive[i]) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + } + + /* Set Controller 0 to self-Test internal Loop back mode. */ + /* Perform Self-Test in Controller 0, transmitted message is received by own CAN node. */ + /* At this stage, CANalyzer/CANoe can be turned down. */ + GenCanReturn = Can_SelfTestChannel(CanConf_CanController_CanController0, CAN_T_SELF_INTERNAL); + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + /***************************************/ + /* Transmit an L-PDU for Controller 0 */ + /* Polling send FD00 obj:2 */ + /***************************************/ + LucHthId = 2; + LddCanPduType.length = 0x08; + LddCanPduType.swPduHandle = 0x02; + LddCanPduType.id = 0x100; + LddCanPduType.sdu = (uint8 *)&GaaByteArray1[0]; + GenCanReturn = Can_Write(LucHthId, &LddCanPduType); + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + + /***************************************/ + /* Receive FD00 obj:0 ID: 0x100 */ + /* Polling Transmit FD00 */ + /* Polling Receive FD00 */ + /***************************************/ + /* Confirm transmission */ + LulCount = 2000000; + while ((LulCount--) && (GucTransmitCount != 5)) + { + Can_MainFunction_Write(); + } + + LulCount = 2000000; + while ((LulCount--) && (GucReceiveCount != 5)) + { + Can_MainFunction_Read(); + } + + /* Transmit and Receive Success */ + if ((GucReceiveCount == 5) && (GucTransmitCount == 5)) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + + /* Set Controller 0 to self-Test external Loop back mode. */ + GenCanReturn = Can_SelfTestChannel(CanConf_CanController_CanController0, CAN_T_SELF_EXTERNAL); + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + + /***************************************/ + /* Transmit an L-PDU for Controller 0 */ + /* Polling send FD00 obj:2 */ + /***************************************/ + LucHthId = 2; + LddCanPduType.length = 0x08; + LddCanPduType.swPduHandle = 0x02; + LddCanPduType.id = 0x100; + LddCanPduType.sdu = (uint8 *)&GaaByteArray1[0]; + GenCanReturn = Can_Write(LucHthId, &LddCanPduType); + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + + /****************************************/ + /* Receive FD00 obj:0 ID: 0x100 */ + /* Polling Transmit FD00 */ + /* Polling Receive FD00 */ + /****************************************/ + /* Confirm transmission */ + LulCount = 2000000; + while ((LulCount--) && (GucTransmitCount != 6)) + { + Can_MainFunction_Write(); + } + + LulCount = 2000000; + while ((LulCount--) && (GucReceiveCount != 6)) + { + Can_MainFunction_Read(); + } + + /* Transmit and Receive Success */ + if ((GucReceiveCount == 6) && (GucTransmitCount == 6)) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + /* turn off Self-Test mode, Controller 0 comes back to normal mode. */ + GenCanReturn = Can_SelfTestChannel(CanConf_CanController_CanController0, CAN_T_SELF_OFF); + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + + Appl_Can_Mode_Stop(); + Appl_Can_Get_Mode(); + /* end program */ + sample_end(); +} + +/******************************************************************************* + CAN Module Initialization +*******************************************************************************/ + +void Appl_Can_Init(void) +{ + + Can_sub_Init(); +#if(CAN_RAMTEST_API == STD_ON) + /* Perform RAM testing */ + GenCanReturn = Can_RAMTest(0,10); + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } +#endif + /* Global Initialization */ + Can_Init(Can_Config); + + Appl_Can_Set_Baudrate(); + + Appl_Can_Mode_Start(); + +} +void Appl_Can_Mode_Start(void) +{ + /* Set Controller Mode to START Mode for Controller 0 and 1*/ + GenCanReturn = Can_SetControllerMode(CanConf_CanController_CanController0, CAN_CS_STARTED); + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + + GenCanReturn = Can_SetControllerMode(CanConf_CanController_CanController1, CAN_CS_STARTED); + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + +} + +void Appl_Can_Set_Baudrate(void) +{ + /* Channel Initialization */ + /* Change baudrate of Controller 1 to 250kbps */ + GenCanReturn = Can_SetBaudrate(CanConf_CanController_CanController0, 0); + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + /* Change baudrate of Controller 1 to 500kbps */ + GenCanReturn = Can_SetBaudrate(CanConf_CanController_CanController1, 1); + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + +} +void Appl_Can_Mode_Stop(void) +{ + + Can_SetControllerMode(CanConf_CanController_CanController0, CAN_CS_STOPPED); + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + + Can_SetControllerMode(CanConf_CanController_CanController1, CAN_CS_STOPPED); + if (GenCanReturn == E_OK) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + +} +void Appl_Can_Get_Mode(void) +{ + Can_ControllerStateType LenCanCntlState; + + GenCanReturn = Can_GetControllerMode(CanConf_CanController_CanController0, &LenCanCntlState); + if (E_OK == GenCanReturn && CAN_CS_STOPPED == LenCanCntlState) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + + GenCanReturn = Can_GetControllerMode(CanConf_CanController_CanController1, &LenCanCntlState); + if (E_OK == GenCanReturn && CAN_CS_STOPPED == LenCanCntlState) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + +} +/******************************************************************************* + Scheduler Task +*******************************************************************************/ +#define CAN_RSCAN_START_SEC_APPL_CODE +#include "Can_MemMap.h" +/* This is an example Scheduler Task. Invocation of following APIs might vary + depending upon the mode and functionality */ +_INTERRUPT_ FUNC(void, CAN_RSCAN_APPL_CODE) Timer_Task(void) +{ + Can_MainFunction_Read(); + Can_MainFunction_Write(); + Can_MainFunction_BusOff(); +/* Can_MainFunction_Wakeup(); */ + Can_MainFunction_Mode(); +#if (CAN_CR52_PROC == STD_ON) || defined(CAN_V4H_PROC) || defined(CAN_V4M_PROC) + Timer_irq_end(); +#endif +} + +#if defined(CAN_LPDU_RECEIVE_CALLOUT_FUNCTION) +/* Callout function */ +FUNC(boolean, CAN_RSCAN_APPL_CODE) UserCalloutFunction( + uint16 Hrh, Can_IdType CanId, +#if (CAN_AR_VERSION == CAN_AR_422_VERSION) + uint8 CanDlc, +#elif (CAN_AR_VERSION == CAN_AR_431_VERSION) || (CAN_AR_VERSION == CAN_AR_1911_VERSION) + uint8 CanDataLength, +#endif + P2CONST(uint8, AUTOMATIC, AUTOMATIC) CanSduPtr) +{ + uint8 lulDlc; + uint8 LucCnt; + uint8 *LpData; + + /* Unused Parameters */ + (void)Hrh; + + lulDlc = CanDataLength; + + if ((CanId & 0x000007ff) == 0x068) + { + LpData = (uint8 *)&GaaByteArray0[0]; + } + else if((CanId & 0x000007ff) == 0x101) + { + LpData = (uint8 *)&GaaByteArray1[0]; + } + else + { + LpData = (uint8 *)&GaaByteArray1[0]; + } + + for (LucCnt = 0; LucCnt < lulDlc; LucCnt++) + { + if (LpData[LucCnt] != CanSduPtr[LucCnt]) + { + break; + } + } + + if (LucCnt == lulDlc) + { + GaaTestResult[GucTestResultCount] = TRUE; + GucTestResultCount++; + } + else + { + GaaTestResult[GucTestResultCount] = FALSE; + GucTestResultCount++; + } + /* return TRUE unconditionally */ + return TRUE; +} +#endif + +#if (CAN_TIME_SYNC_CAPTURE_EN == STD_ON) +/* Call out function to forware the captured timestamp of Received frame to upper layer */ +FUNC(void, CAN_RSCAN_APPL_CODE) Can_RXTSUserCalloutFunction( + VAR(Can_IdType, AUTOMATIC) LdCanId, + VAR(uint8, AUTOMATIC) LucControllerId, + VAR(uint32, AUTOMATIC) LulTimeStampL, + VAR(uint32, AUTOMATIC) LulTimeStampH, + VAR(Can_TimeStampProtolType, AUTOMATIC) LdProtolType) +{ + (void)LdCanId; + (void)LucControllerId; + (void)LdProtolType; + (void)LulTimeStampL; + (void)LulTimeStampH; +} + +/* Call out function to forware the captured timestamp of Transmitted frame to upper layer */ +FUNC(void, CAN_RSCAN_APPL_CODE) Can_TXTSUserCalloutFunction( + VAR(PduIdType, AUTOMATIC) CanTxPduId, + VAR(uint32, AUTOMATIC) LulTimeStampL, + VAR(uint32, AUTOMATIC) LulTimeStampH, + VAR(Can_TimeStampProtolType, AUTOMATIC) LdProtolType) +{ + (void)CanTxPduId; + (void)LulTimeStampL; + (void)LulTimeStampH; + (void)LdProtolType; +} +#endif /* #if (CAN_TIME_SYNC_CAPTURE_EN == STD_ON) */ + +#if ((CAN_PUBLIC_ICOM_SUPPORT == STD_ON) && \ + (CAN_ICOM_PAYLOAD_LENGTH_ERROR_SUPPORT == STD_ON)) +FUNC(void, CAN_RSCAN_APPL_CODE) Can_IcomCallOut(uint8 Controller, IcomConfigIdType IcomConfigurationId) +{ + (void) Controller; + (void) IcomConfigurationId; +} +#endif + +#define CAN_RSCAN_STOP_SEC_APPL_CODE +#include "Can_MemMap.h" +/******************************************************************************* + End of the file +*******************************************************************************/ diff --git a/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/src/All.c b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/src/All.c new file mode 100644 index 0000000..3a04850 --- /dev/null +++ b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/src/All.c @@ -0,0 +1,3963 @@ +/*============================================================================*/ +/* Project = R-Car Gen4 AR19-11 MCAL */ +/* Module = Can.c */ +/* SW-VERSION = 1.1.17 */ +/*============================================================================*/ +/* COPYRIGHT */ +/*============================================================================*/ +/* Copyright(c) 2021-2024 Renesas Electronics Corporation. */ +/*============================================================================*/ +/* Purpose: */ +/* Provision of Initialization, ReInitialization and Version Control */ +/* Functionality. */ +/* */ +/*============================================================================*/ +/* */ +/* Unless otherwise agreed upon in writing between your company and */ +/* Renesas Electronics Corporation the following shall apply! */ +/* */ +/* Warranty Disclaimer */ +/* */ +/* There is no warranty of any kind whatsoever granted by Renesas. Any */ +/* warranty is expressly disclaimed and excluded by Renesas, either expressed */ +/* or implied, including but not limited to those for non-infringement of */ +/* intellectual property, merchantability and/or fitness for the particular */ +/* purpose. */ +/* */ +/* Renesas shall not have any obligation to maintain, service or provide bug */ +/* fixes for the supplied Product(s) and/or the Application. */ +/* */ +/* Each User is solely responsible for determining the appropriateness of */ +/* using the Product(s) and assumes all risks associated with its exercise */ +/* of rights under this Agreement, including, but not limited to the risks */ +/* and costs of program errors, compliance with applicable laws, damage to */ +/* or loss of data, programs or equipment, and unavailability or */ +/* interruption of operations. */ +/* */ +/* Limitation of Liability */ +/* */ +/* In no event shall Renesas be liable to the User for any incidental, */ +/* consequential, indirect, or punitive damage (including but not limited */ +/* to lost profits) regardless of whether such liability is based on breach */ +/* of contract, tort, strict liability, breach of warranties, failure of */ +/* essential purpose or otherwise and even if advised of the possibility of */ +/* such damages. Renesas shall not be liable for any services or products */ +/* provided by third party vendors, developers or consultants identified or */ +/* referred to the User by Renesas in connection with the Product(s) and/or */ +/* the Application. */ +/* */ +/*============================================================================*/ +/* Environment: */ +/* Devices: RCarS4, RcarV4H, V4M */ +/*============================================================================*/ + +/******************************************************************************* +** Revision Control History ** +*******************************************************************************/ +/* + * 1.1.17: 19/12/2023 : Fix QAC message 4461 in function + * Can_GetControllerTxErrorCounter, + * Can_GetControllerRxErrorCounter. + * 1.1.15: 17/06/2023 : Update logic for macro CAN_V4M_PROC + * 1.1.14: 18/04/2023 : Add preprocessor directive CAN_V4M_PROC + * 1.1.9: 08/11/2022 : Add new MISRA messages (2:1006) + * Simlar check and Update fuction invoke and register + * used for consistency with Driver_UD and Driver_FD + * 03/11/2022 : Re-map refer ID for Can_InitModule and Can_InitController + * 1.1.8: 18/10/2022 : Update Misra-C rules messages + * 1.1.7: 09/09/2022 : Correct address of VM ISR in Can_InitModule. + * 07/09/2022 : Add the setting ECC control register to function + * Can_InitModule() to support ECC safety mechanism. + * Remove preprocessor directive CAN_V4H_PROC in Can_DeInit + * 1.1.6: 22/08/2022 : Update Misra-C rules and QAC warning messages + * 08/08/2022 : Add callee function Can_TSCapUnitDeInit and + * Can_TSCapUnitInit to support Can Time Sync + * Capture feature + * Add global variable assignment "Can_GblIcomStatus" to + * API Can_Init(). + * Add inclusion Can_Icom.h when prentended network + * function is enable. + * Add CWE rule ID to QA-C messages header. + * 06/08/2022 : Update CWE Rule Violation + * 05/08/2022 : Update Can_Init and Can_InitModule and Can_InitController + * to support FFI Mode -multicore use case + * 1.1.5: 18/07/2022 : Update Registers Used for Can_InitModule function + * 1.1.4: 20/06/2022 : Update Can_InitModule function + * for Virtual Machine code as an independent case. + * 06/06/2022 : Update Can_EnableControllerInterrupts() and + * Can_DisableControllerInterrupts() APIs to enable/disable + * interrupt for specific controller. + * Update QAC START/END for current code. + * 1.1.3: 20/05/2022 : Update Can_InitModule function to support VM feature + * 11/05/2022 : Corrected Misra-C rules and QAC warning messages + * 09/05/2022 : Update new method for CAN_CR52_PROC + * 1.1.2: 20/04/2022 : Corrected Misra-C rules and QAC warning messages + * : 08/04/2022 : Change all memclass from CAN_RSCAN_APPL_DATA into + * AUTOMATIC for all API argument VAR type + * Change memclass from CAN_RSCAN_PUBLIC_CONST into + * AUTOMATIC for argument P2CONST type in Can_Init + * Change memclass from CAN_RSCAN_VAR_NO_INIT into + * AUTOMATIC when casting with P2CONST in Can_Init + * 07/04/2022 : Update justification of QAC message (1:3384),(2:3469) + * with baseline. Add new message (3:3387),(2:2016) + * 1.1.1: 18/03/2022 : Update to correct passed argument of EcuM_SetWakeupEvent + * functions for Can_ChangeBaudrate, Can_CheckWakeup. + * 17/03/2022 : Added "Can_GblIcomStatus" in Global Variables Used + * of init function + * 1.1.0: 05/03/2022 : Added Can_GblIcomStatus to init function + * 1.0.4: 24/02/2022 : Add new MISRA messages (2:3469), (4:4461), (2:2814), + * (2:2824), (2:2844), (1:3383), (1:3384). + * Remove redundant QAC message (2:0491), (2:3227), + * (2:3141), (2:3138), (2:2016), (3:3352). + * 1.0.3: 08/12/2021 : Updated Implementation for setting pICWakeup for + * CR52 core for Can_DisableControllerInterrupts + * Can_EnableControllerInterrupts and Can_DeInit + * 27/11/2021 : In Can_CheckWakeup API, cast data type of unused + * parameters to void + * 26/11/2021 : Add new API: Can_GetControllerTxErrorCounter(). + * Add new API: Can_GetControllerRxErrorCounter(). + * 17/11/2021 : Change data type of the second argument + * in function Can_SetBaudrate + * 1.0.2: 10/09/2021 : Add AUTOSAR release version information AR1911 + * 1.0.1: 18/06/2021 : Support CR52 interrupts. + * 1.0.0: 10/06/2021 : Initial version. + */ +/******************************************************************************* +** Include Section ** +*******************************************************************************/ +/* CAN module header file */ +/* MISRA Violation: START Msg(2:0857)-6 */ +#include "Can.h" +/* Included for RAM variable declarations */ +#include "Can_Ram.h" +#include "Can_Irq.h" +/* END Msg(2:0857)-6 */ +/* including DEM header file */ +#include "Dem.h" + +/* Included for the declaration of Det_ReportError() */ +#if (CAN_DEV_ERROR_DETECT == STD_ON) +#include "Det.h" +#endif +#if (CAN_PUBLIC_ICOM_SUPPORT == STD_ON) +#include "Can_Icom.h" +#endif +#if !defined(CAN_V4H_PROC) && !defined(CAN_V4M_PROC) +#include "rh850_Types.h" +#endif +#if (CAN_TIME_SYNC_CAPTURE_EN == STD_ON) +#include "Can_TSCapture.h" +#endif +/******************************************************************************* +** Version Information ** +*******************************************************************************/ +/* AUTOSAR release version information */ +#define CAN_C_AR_RELEASE_MAJOR_VERSION CAN_AR_RELEASE_MAJOR_VERSION_VALUE +#define CAN_C_AR_RELEASE_MINOR_VERSION CAN_AR_RELEASE_MINOR_VERSION_VALUE +#define CAN_C_AR_RELEASE_REVISION_VERSION CAN_AR_RELEASE_REVISION_VERSION_VALUE + +/* File version information */ +#define CAN_C_SW_MAJOR_VERSION CAN_SW_MAJOR_VERSION_VALUE +#define CAN_C_SW_MINOR_VERSION CAN_SW_MINOR_VERSION_VALUE + +/******************************************************************************* +** Version Check ** +*******************************************************************************/ +#if (CAN_C_AR_RELEASE_MAJOR_VERSION != CAN_AR_RELEASE_MAJOR_VERSION) + #error "Can.c : Mismatch in Release Major Version" +#endif +#if (CAN_C_AR_RELEASE_MINOR_VERSION != CAN_AR_RELEASE_MINOR_VERSION) + #error "Can.c : Mismatch in Release Minor Version" +#endif +#if (CAN_C_AR_RELEASE_REVISION_VERSION != CAN_AR_RELEASE_REVISION_VERSION) + #error "Can.c : Mismatch in Release Revision Version" +#endif + +#if (CAN_C_SW_MAJOR_VERSION != CAN_SW_MAJOR_VERSION) + #error "Can.c : Mismatch in Software Major Version" +#endif + +#if (CAN_C_SW_MINOR_VERSION != CAN_SW_MINOR_VERSION) + #error "Can.c : Mismatch in Software Minor Version" +#endif + +/******************************************************************************* +** MISRA C Rule Violations ** +*******************************************************************************/ + +/* 1. MISRA C RULE VIOLATION: */ +/* Message : (2:0316) Cast from a pointer to void to a pointer to */ +/* object type . */ +/* Rule : MISRA-C:2012 Rule-11.5, CWE-188, CWE-398, CWE-569 */ +/* Justification : A cast should not be performed between a pointer */ +/* to object type and a different pointer to object type. */ +/* Verification : However, part of the code is verified manually and */ +/* it is not having any impact. */ +/* Reference : Look for START Msg(2:0316)-1 and */ +/* END Msg(2:0316)-1 tags in the code. */ +/******************************************************************************/ + +/* 2. MISRA C RULE VIOLATION: */ +/* Message : (2:2982) This assignment is redundant. The value of this */ +/* object is never used before being modified. */ +/* Rule : MISRA-C:2012 Rule-2.2, CERTCCM MSC07, MSC13, CWE-14, */ +/* CWE-398, CWE-561, CWE-563, CWE-569, CWE-633 */ +/* Justification : The variable needs to be initialized before using it. */ +/* Verification : However, part of the code is verified manually and it is */ +/* not having any impact. */ +/* Reference : Look for START Msg(2:2982)-2 and */ +/* END Msg(2:2982)-2 tags in the code. */ +/******************************************************************************/ + +/* 3. MISRA C RULE VIOLATION: */ +/* Message : (2:3432) Simple macro argument expression is not */ +/* parenthesized. */ +/* Rule : MISRA-C:2012 Rule-20.7, CWE-398, CWE-569 */ +/* Justification : Compiler keyword (macro) is defined and used followed */ +/* AUTOSAR standard rule. It is accepted. */ +/* Verification : However, part of the code is verified manually */ +/* and it is not having any impact. */ +/* Reference : Look for START Msg(2:3432)-3 and */ +/* END Msg(2:3432)-3 tags in the code. */ +/******************************************************************************/ + +/* 4. MISRA C RULE VIOLATION: */ +/* Message : (4:5087) Use of #include directive after code fragment. */ +/* Rule : MISRA-C:2012 Rule-20.1 */ +/* Justification : This is done as per Memory Requirement, */ +/* (MEMMAP003 - Specification of Memory Mapping). */ +/* Verification : However, part of the code is verified manually and */ +/* it is not having any impact. */ +/* Reference : Look for START Msg(4:5087)-4 and */ +/* END Msg(4:5087)-4 tags in the code. */ +/******************************************************************************/ + +/* 5. MISRA C RULE VIOLATION: */ +/* Message : (1:1503) The function 'function name' is defined */ +/* but is not used within this project. */ +/* Rule : MISRA-C:2012 Rule-2.1, CERTCCM MSC07, CWE-398, CWE-569 */ +/* Justification : This is accepted, due to the module's API is exported */ +/* for user's usage. */ +/* Verification : However, part of the code is verified manually */ +/* and it is not having any impact. */ +/* Reference : Look for START Msg(1:1503)-5 and */ +/* END Msg(1:1503)-5 tags in the code. */ +/******************************************************************************/ + +/* 6. MISRA C RULE VIOLATION: */ +/* Message : (2:0857): Number of macro definitions exceeds 1024 - */ +/* program does not conform strictly to ISO:C90. */ +/* Rule : MISRA-C:2012 Dir-1.1 */ +/* Justification : The number of macro depend on module code size. */ +/* There is no issue when number of macro is over 1024 */ +/* Verification : However, part of the code is verified manually and */ +/* it is not having any impact. */ +/* Reference : Look for START Msg(2:0857)-6 and */ +/* END Msg(2:0857)-6 tags in the code. */ +/******************************************************************************/ + +/* 7. MISRA C RULE VIOLATION: */ +/* Message : (3:3387): A full expression containing an increment (++) */ +/* or decrement (--) operator should have no potential */ +/* side effects other than that caused by the increment or */ +/* decrement operator. */ +/* Rule : MISRA C:2012 Rule-13.3 */ +/* REFERENCE - ISO:C90-5.1.2.3 Program Execution */ +/* Justification : An increment/decrement is created a side affect. */ +/* In this case it's accessing a volatile object. */ +/* This can be accepted. */ +/* Verification : However, part of the code is verified manually and */ +/* it is not having any impact. */ +/* Reference : Look for START Msg(3:3387)-7 and */ +/* END Msg(3:3387)-7 tags in the code. */ +/******************************************************************************/ + +/* 9. MISRA C RULE VIOLATION: */ +/* Message : (2:3469): This usage of a function-like macro looks like */ +/* it could be replaced by an equivalent function call. */ +/* Rule : MISRA C:2012 Dir-4.9 */ +/* Justification : This message indicates that a candidate macro may be */ +/* suitable for replacement by a function, based on an actual */ +/* call-site and the arguments passed to it there. (Other */ +/* uses of the macro may not necessarily be suitable for */ +/* replacement.) */ +/* Verification : However, part of the code is verified manually and */ +/* it is not having any impact. */ +/* Reference : Look for START Msg(2:3469)-9 and */ +/* END Msg(2:3469)-9 tags in the code. */ +/******************************************************************************/ + +/* 10. MISRA C RULE VIOLATION: */ +/* Message : (2:2016): This 'switch' statement 'default' */ +/* clause is empty. */ +/* Rule : MISRA-C:2012 Rule-16.4, CWE-398, CWE-569 */ +/* Justification : The "default" clause in the "switch" statement is not empty*/ +/* Verification : However, part of the code is verified manually and */ +/* it is not having any impact. */ +/* Reference : Look for START Msg(2:2016)-10 and */ +/* END Msg(2:2016)-10 tags in the code. */ +/******************************************************************************/ + +/* 11. MISRA C RULE VIOLATION: */ +/* Message : (6:3305) Pointer cast to stricter alignment. */ +/* Rule : MISRA-C:2012 Rule-11.3, CERTCCM EXP36, EXP39, CWE-188, */ +/* CWE-737. */ +/* Justification : Pointer alignment is changed by casting, but it's necessary*/ +/* for embedded programming */ +/* Verification : However, part of the code is verified manually and it is */ +/* not having any impact. */ +/* Reference : Look for START Msg(6:3305)-11 and */ +/* END Msg(6:3305)-11 tags in the code. */ +/******************************************************************************/ + +/* 12. MISRA C RULE VIOLATION: */ +/* Message : (2:0310) Casting to different object pointer type. */ +/* Rule : MISRA-C:2012 Rule-11.3, CERTCCM EXP39, EXP11, CWE-188, */ +/* CWE-398, CWE-468, CWE-588, CWE-465, CWE-569, CWE-737 */ +/* Justification : For accessing 8-bit and 16-bit PNOT and JPNOT register */ +/* respectively, the 32-bit pointer is typecasted. */ +/* Verification : However, part of the code is verified manually and it is */ +/* not having any impact. */ +/* Reference : Look for START Msg(2:0310)-12 and */ +/* END Msg(2:0310)-12 tags in the code. */ +/******************************************************************************/ + +/* 13. MISRA C RULE VIOLATION: */ +/* Message : (2:0488)Performing pointer arithmetic. */ +/* Rule : MISRA-C:2012 Rule-18.4, CERTCCM EXP08, CWE-188, CWE-398, */ +/* CWE-569. */ +/* REFERENCE - ISO:C90-6.3.6 Additive Operators - Constraints */ +/* Justification : This is to get the ID in the data structure in the code. */ +/* Verification : However, part of the code is verified manually and it is */ +/* not having any impact. */ +/* Reference : Look for START Msg(2:0488)-13 and */ +/* END Msg(2:0488)-13 tags in the code. */ +/******************************************************************************/ + +/* 14. MISRA C RULE VIOLATION: */ +/* Message : (2:0303) Cast between a pointer to volatile object and */ +/* an integral type. */ +/* Rule : MISRA C:2012 Rule 11.4 */ +/* REFERENCE - ISO:C90-6.3.4 Cast Operators - Semantics */ +/* Justification : Typecasting is done as per the register size, to access */ +/* hardware registers. */ +/* Verification : However, part of the code is verified manually and it is */ +/* not having any impact. */ +/* Reference : Look for START Msg(2:0303)-14 and */ +/* END Msg(2:0303)-14 tags in the code. */ +/******************************************************************************/ + +/* 15. MISRA C RULE VIOLATION: */ +/* Message : (2:0715) [L] Nesting of control structures (statements) */ +/* exceeds 15 - program does not conform strictly to ISO:C90. */ +/* Rule : MISRA-C:2012 Dir-1.1 */ +/* REFERENCE - ISO:C90-5.2.4.1 Translation Limits */ +/* Justification : This is limitation. Because it impact to big scope (source */ +/* code is ported from baseline */ +/* Verification : However, part of the code is verified manually and it is */ +/* not having any impact. */ +/* Reference : Look for START Msg(2:0715)-15 and */ +/* END Msg(2:0715)-15 tags in the code. */ +/******************************************************************************/ + +/* 16. MISRA C RULE VIOLATION: */ +/* Message : (2:1006) [E] This in-line assembler construct is a */ +/* language extension. The code has been ignored. */ +/* Rule : MISRA-C:2012 Rule-1.2 */ +/* Justification : Assembly instruction is ignored by QAC. */ +/* Verification : However, part of the code is verified manually */ +/* and it is not having any impact. */ +/* Reference : Look for START Msg(2:1006)-16 and */ +/* END Msg(2:1006)-16 tags in the code. */ +/******************************************************************************/ + +/******************************************************************************/ +/** QAC warning **/ +/******************************************************************************/ + +/* 1. QAC Warning: */ +/* Message : (3:3416) Logical operation performed on expression with */ +/* persistent side effects. */ +/* Rule : CERTCCM EXP45, CWE-398, CWE-569, CWE-737 */ +/* Justification : Logical operation accesses volatile object which is a */ +/* register access. All register addresses are generated with */ +/* volatile qualifier. There is no impact on the functionality*/ +/* due to this conditional check for mode change. */ +/* Verification : However, part of the code is verified manually and it is */ +/* not having any impact. */ +/* Reference : Look for START Msg(3:3416)-1 and */ +/* END Msg(3:3416)-1 tags in the code. */ +/******************************************************************************/ + +/* 2. QAC Warning: */ +/* Message : (2:2844) Possible: Dereference of an invalid pointer value.*/ +/* Rule : CERTCCM ARR30, CWE-120, CWE-121, CWE-122, CWE-124, CWE-125,*/ +/* CWE-126, CWE-127, CWE-129, CWE-131, CWE-466, CWE-786, */ +/* CWE-787, CWE-788, CWE-805, CWE-465, CWE-633, CWE-740 */ +/* Justification : It is specific for device register accessing and */ +/* confirmed has no issue in software behavior. */ +/* Verification : However, part of the code is verified manually and */ +/* it is not having any impact. */ +/* Reference : Look for START Msg(2:2844)-2 and */ +/* END Msg(2:2844)-2 tags in the code. */ +/******************************************************************************/ + +/* 3. QAC Warning: */ +/* Message : (2:2824) Possible: Arithmetic operation on NULL pointer. */ +/* Rule : CERTCCM EXP34, CWE-468, CWE-476, CWE-465, CWE-737 */ +/* Justification : This is accepted, due to the implementation is following */ +/* hardware specification. */ +/* Verification : However, part of the code is verified manually and */ +/* it is not having any impact. */ +/* Reference : Look for START Msg(2:2824)-3 and */ +/* END Msg(2:2824)-3 tags in the code. */ +/******************************************************************************/ + +/* 4. QAC Warning: */ +/* Message : (2:2814) Possible: Dereference of NULL pointer. */ +/* Rule : CERTCCM EXP34, CWE-476, CWE-465, CWE-737, CWE-690 */ +/* Justification : This is accepted, due to the implementation is */ +/* following hardware specification. */ +/* Verification : However, part of the code is verified manually and */ +/* it is not having any impact. */ +/* Reference : Look for START Msg(2:2814)-4 and */ +/* END Msg(2:2814)-4 tags in the code. */ +/******************************************************************************/ + +/* 5. QAC Warning: */ +/* Message : (2:0751) Casting to char pointer type. */ +/* Rule : CERTCCM EXP39, EXP11, CWE-188, CWE-398, CWE-468, CWE-588, */ +/* CWE-465, CWE-569, CWE-737. */ +/* Justification : Using void due to specific requirement of input parameter. */ +/* So, this can be skipped */ +/* Verification : However, part of the code is verified manually and */ +/* it is not having any impact. */ +/* Reference : Look for START Msg(2:0751)-5 and */ +/* END Msg(2:0751)-5 tags in the code. */ +/******************************************************************************/ + +/* 6. QAC Warning: */ +/* Message : (1:3383) Cannot identify wraparound guard for */ +/* unsigned arithmetic expression. */ +/* Rule : CERTCCM INT30 */ +/* Justification : It can still result in values that are out of range for */ +/* the intended use, as intuitive "invariants" may not hold */ +/* Verification : However, part of the code is verified manually and */ +/* it is not having any impact. */ +/* Reference : Look for START Msg(1:3383)-6 and */ +/* END Msg(1:3383)-6 tags in the code. */ +/******************************************************************************/ + +/* 7. QAC Warning: */ +/* Message : (1:3384) Cannot identify wraparound guard for */ +/* dependent unsigned arithmetic expression. */ +/* Rule : CERTCCM INT30 */ +/* Justification : In order to effectively guard against overflow and */ +/* wraparound at all stages, the expression should be split */ +/* up into individual dynamic operations, with their own */ +/* guards where applicable */ +/* Verification : However, part of the code is verified manually and */ +/* it is not having any impact. */ +/* Reference : Look for START Msg(1:3384)-7 and */ +/* END Msg(1:3384)-7 tags in the code. */ +/******************************************************************************/ + +/* 6. QAC Warning: */ +/* Message : (2:3464) Argument to macro 'RH850_SV_MODE_ICR_AND' */ +/* contains a side effect that will be evaluated */ +/* more than once. */ +/* Rule : MISRA-C:2012 Rules */ +/* Justification : This message is only emitted for expressions expanded */ +/* from argument tokens written out at the top level, that */ +/* did not themselves originate from a macro expansion. */ +/* Verification : However, part of the code is verified manually and */ +/* it is not having any impact. */ +/* Reference : Look for START Msg(2:3464)-6 and */ +/* END Msg(2:3464)-6 tags in the code. */ +/******************************************************************************/ + +/******************************************************************************* +** Global Data ** +*******************************************************************************/ + +/******************************************************************************* +** Function Definitions ** +*******************************************************************************/ +#define CAN_RSCAN_START_SEC_PRIVATE_CODE +#include "Can_MemMap.h" +/* Set global status */ +STATIC FUNC(void, CAN_RSCAN_PRIVATE_CODE) Can_SetStatus( + CONST(boolean, AUTOMATIC) LblStatus); +#if (CAN_ACCESS_HW_ENABLE == STD_ON) +/* Sub function to initialize RSCANn module */ +STATIC FUNC(boolean, CAN_RSCAN_PRIVATE_CODE) Can_InitModule( + CONST(uint8, AUTOMATIC) LucUnit); +/* Sub function to initialize Controller */ +STATIC FUNC(boolean, CAN_RSCAN_PRIVATE_CODE) Can_InitController( + CONST(uint8, AUTOMATIC) LucCtrlIndex); +#endif /* #if (CAN_ACCESS_HW_ENABLE == STD_ON) */ +#if ((CAN_AR_VERSION == CAN_AR_431_VERSION) || \ + (CAN_AR_VERSION == CAN_AR_1911_VERSION)) +/* Sub function to de-initialize RSCANn module */ +STATIC FUNC(boolean, CAN_RSCAN_PRIVATE_CODE) Can_DeInitModule( + CONST(uint8, AUTOMATIC) LucUnit); +/* Sub function to de-initialize Controller */ +STATIC FUNC(boolean, CAN_RSCAN_PRIVATE_CODE) Can_DeInitController( + CONST(uint8, AUTOMATIC) LucCtrlIndex); +#endif +#if ((CAN_AR_422_VERSION == CAN_AR_VERSION) && \ + (STD_ON == CAN_CHANGE_BAUDRATE_API)) +/* Sub function to get index of baudrate config table with baudrate */ +STATIC FUNC(uint32, CAN_RSCAN_PRIVATE_CODE) Can_SearchBaudrate( + CONST(uint8, AUTOMATIC) LucCtrlIndex, + CONST(uint16, AUTOMATIC) LusBaudrate); +#endif + +#if (CAN_SET_BAUDRATE_API == STD_ON) +/* Sub function to get index of baudrate config table with ID */ +STATIC FUNC(uint32, CAN_RSCAN_PRIVATE_CODE) Can_SearchBaudrateID( + CONST(uint8, AUTOMATIC) LucCtrlIndex, CONST(uint16, AUTOMATIC) LusBaudrateID); +#endif + +#define CAN_RSCAN_STOP_SEC_PRIVATE_CODE +/* MISRA Violation: START Msg(4:5087)-4 */ +#include "Can_MemMap.h" +/* END Msg(4:5087)-4 */ + + +#define CAN_RSCAN_START_SEC_PUBLIC_CODE +/* MISRA Violation: START Msg(4:5087)-4 */ +#include "Can_MemMap.h" +/* END Msg(4:5087)-4 */ + +/******************************************************************************* +** Function Name : Can_GetVersionInfo +** +** Service ID : 0x07 +** +** Description : This function returns the version information of CAN +** driver component. +** +** Sync/Async : Synchronous +** +** Reentrancy : Reentrant +** +** Input Parameters : None +** +** InOut Parameters : None +** +** Output Parameters : versioninfo +** +** Return parameter : None +** +** Preconditions : CanVersionInfoApi is configured as true. +** +** Global Variables : None +** +** Functions invoked : Det_ReportError +** +** Registers Used : None +** +** Reference ID : CAN_DUD_ACT_007 +** Reference ID : CAN_DUD_ACT_007_ERR001 +*******************************************************************************/ +#if (CAN_VERSION_INFO_API == STD_ON) +/* MISRA Violation: START Msg(1:1503)-5 */ +/* MISRA Violation: START Msg(2:3432)-3 */ +FUNC(void, CAN_RSCAN_PUBLIC_CODE) Can_GetVersionInfo( + P2VAR(Std_VersionInfoType, AUTOMATIC, CAN_RSCAN_APPL_DATA) versioninfo) +/* END Msg(2:3432)-3 */ +/* END Msg(1:1503)-5 */ +{ +#if (CAN_DEV_ERROR_DETECT == STD_ON) + /* Check if parameter passed is equal to Null pointer */ + if (NULL_PTR == versioninfo) + { + /* Report to DET */ + (void)Det_ReportError(CAN_MODULE_ID, CAN_INSTANCE_ID, + CAN_GET_VERSIONINFO_SID, CAN_E_PARAM_POINTER); + } + else +#endif /* (CAN_DEV_ERROR_DETECT == STD_ON) */ + { + /* Copy the vendor Id */ + versioninfo->vendorID = CAN_VENDOR_ID; + /* Copy the module Id */ + versioninfo->moduleID = CAN_MODULE_ID; + /* Copy Software Major Version */ + versioninfo->sw_major_version = CAN_SW_MAJOR_VERSION; + /* Copy Software Minor Version */ + versioninfo->sw_minor_version = CAN_SW_MINOR_VERSION; + /* Copy Software Patch Version */ + versioninfo->sw_patch_version = CAN_SW_PATCH_VERSION; + } +} +#endif /* (CAN_VERSION_INFO_API == STD_ON) */ + +/******************************************************************************* +** Function Name : Can_Init +** +** Service ID : 0x00 +** +** Description : This function initializes the static variables and +** CAN HW Unit global hardware settings for the further +** processing and initiates the setup of all CAN +** Controller specific settings. +** +** Sync/Async : Synchronous +** +** Reentrancy : Non-Reentrant +** +** Input Parameters : Config : Pointer to the configuration structure +** +** InOut Parameters : None +** +** Output Parameters : None +** +** Return Parameter : None +** +** Preconditions : CAN_Driver must be uninitialized. +** +** Global Variables Used : Can_GblInitialized, Can_GaaRegs +** Can_GpConfig, Can_GpPCController +** Can_GpPBController, Can_GpHohConfig +** Can_GaaActiveControllers, +** Can_GaaGlobalStateTransition, +** Can_GaaGlobalIntCount, Can_GaaCtrlState, +** Can_GblIcomStatus +** +** Functions Invoked : Det_ReportError, Dem_ErrorReportStatus, +** Can_SetStatus, Can_InitModule, Can_InitController, +** Can_GlobalModeChange, Can_TSCapUnitInit +** +** Registers Used : (CFD)CmSTS +** +** Reference ID : CAN_DUD_ACT_001 +** Reference ID : CAN_DUD_ACT_001_ERR001, CAN_DUD_ACT_001_ERR002, +** Reference ID : CAN_DUD_ACT_001_ERR003, CAN_DUD_ACT_001_ERR004, +** Reference ID : CAN_DUD_ACT_001_ERR005, CAN_DUD_ACT_001_GBL001, +** Reference ID : CAN_DUD_ACT_001_GBL002, CAN_DUD_ACT_001_GBL003, +** Reference ID : CAN_DUD_ACT_001_GBL004, CAN_DUD_ACT_001_GBL005, +** Reference ID : CAN_DUD_ACT_001_GBL006, CAN_DUD_ACT_001_GBL007, +** Reference ID : CAN_DUD_ACT_001_GBL008, CAN_DUD_ACT_001_GBL009, +** Reference ID : CAN_DUD_ACT_001_GBL010, CAN_DUD_ACT_001_GBL011, +** Reference ID : CAN_DUD_ACT_001_GBL012, CAN_DUD_ACT_001_GBL013, +** Reference ID : CAN_DUD_ACT_001_GBL014, CAN_DUD_ACT_001_GBL015 +*******************************************************************************/ +/* MISRA Violation: START Msg(1:1503)-5 */ +/* MISRA Violation: START Msg(2:3432)-3 */ +FUNC(void, CAN_RSCAN_PUBLIC_CODE) Can_Init( + P2CONST(Can_ConfigType, AUTOMATIC, CAN_RSCAN_APPL_DATA) Config) +/* END Msg(2:3432)-3 */ +/* END Msg(1:1503)-5 */ +{ + VAR(uint8, AUTOMATIC) LucIndex; + VAR(boolean, AUTOMATIC) LblErrFlag; +#if (CAN_ACCESS_HW_ENABLE == STD_ON) + VAR(uint32, AUTOMATIC) LulTimeoutDuration; + VAR(Std_ReturnType, AUTOMATIC) LucTimeoutResult; +#endif +#if ((CAN_TX_BUFFER == STD_ON) || (CAN_TX_COMFIFO == STD_ON) ||\ + (CAN_TX_QUEUE == STD_ON)) + VAR(uint16, AUTOMATIC) LusHohIndex; +#endif +#if ((CAN_DEV_ERROR_DETECT == STD_ON) && (CAN_ACCESS_HW_ENABLE == STD_ON)) + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(Can_ControllerPCConfigType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA) + LpPCController; + /* END Msg(2:3432)-3 */ +#endif + + LblErrFlag = CAN_FALSE; +#if (CAN_DEV_ERROR_DETECT == STD_ON) +#if (CAN_ALREADY_INIT_DET_CHECK == STD_ON) + /* QAC Warning: START Msg(3:3416)-1 */ + /* Report to DET, if module is initialized */ + if (CAN_TRUE == Can_GblInitialized) + /* END Msg(3:3416)-1 */ + { + (void)Det_ReportError(CAN_MODULE_ID, CAN_INSTANCE_ID, CAN_INIT_SID, + CAN_E_TRANSITION); + /* Set the error status flag to true */ + LblErrFlag = CAN_TRUE; + } + else +#endif + /* Report to DET, if Configure pointer is equal to Null */ + if (NULL_PTR == Config) + { + (void)Det_ReportError(CAN_MODULE_ID, CAN_INSTANCE_ID, CAN_INIT_SID, + CAN_E_PARAM_POINTER); + /* Set the error status flag to true */ + LblErrFlag = CAN_TRUE; + } + /* Report to DET, if database is not valid */ + else if ((uint32)CAN_DBTOC_VALUE != Config->ulStartOfDbToc) + { + (void)Det_ReportError(CAN_MODULE_ID, CAN_INSTANCE_ID, + CAN_INIT_SID, CAN_E_INVALID_DATABASE); + /* Set the error status flag to true */ + LblErrFlag = CAN_TRUE; + } + else + { + /* If hw access permission is enable */ +#if (CAN_ACCESS_HW_ENABLE == STD_ON) + /* MISRA Violation: START Msg(2:0316)-1 */ + /* MISRA Violation: START Msg(2:3432)-3 */ + LpPCController = + (P2CONST(Can_ControllerPCConfigType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA)) + Config->pControllerPCConfig; + /* END Msg(2:3432)-3 */ + /* END Msg(2:0316)-1 */ + for (LucIndex = 0U; + (LucIndex < Config->ucNoOfControllers) && (CAN_FALSE == LblErrFlag); + LucIndex++) + { + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2824)-3 */ + /* QAC Warning: START Msg(2:2814)-4 */ + /* report Det if channels are not in uninitialized state */ + if (CAN_T_UNINIT != (Can_GaaRegs[LpPCController[LucIndex].ucUnit] + .pCmn->aaChReg[LpPCController[LucIndex].ucCh].ulSTS)) + /* END Msg(2:2814)-4 */ + /* END Msg(2:2824)-3 */ + /* END Msg(2:2844)-2 */ + { + (void)Det_ReportError(CAN_MODULE_ID, CAN_INSTANCE_ID, + CAN_INIT_SID, CAN_E_TRANSITION); + /* Set the error status flag to true */ + LblErrFlag = CAN_TRUE; + } + else + { + /* Do nothing */ + } + } +#endif /* #if (CAN_ACCESS_HW_ENABLE == STD_ON) */ + } + + /* Check whether any development error occurred */ + if (CAN_FALSE == LblErrFlag) +#endif /*#if (CAN_DEV_ERROR_DETECT == STD_ON) */ + { + /*********************************************************************** + * INITIALIZE GLOBAL VARIABLES * + ***********************************************************************/ + /* Get pointers to configuration tables */ + Can_GpConfig = Config; + /* MISRA Violation: START Msg(2:0316)-1 */ + /* MISRA Violation: START Msg(2:3432)-3 */ + /* QAC Warning: START Msg(2:2814)-4 */ + Can_GpPCController = + (P2CONST(Can_ControllerPCConfigType, + AUTOMATIC, CAN_RSCAN_CONFIG_DATA)) + Config->pControllerPCConfig; + Can_GpPBController = + (P2CONST(Can_ControllerPBConfigType, + AUTOMATIC, CAN_RSCAN_CONFIG_DATA)) + Config->pControllerPBConfig; + Can_GpHohConfig = + (P2CONST(Can_HohConfigType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA)) + Config->pHohConfig; + /* END Msg(2:2814)-4 */ + /* END Msg(2:3432)-3 */ + /* END Msg(2:0316)-1 */ + + /*********************************************************************** + * INITIALIZATION OF RSCANn MODULES * + ***********************************************************************/ + for (LucIndex = 0U; + (LucIndex < Config->ucNoOfUnits) && (CAN_FALSE == LblErrFlag); + LucIndex++) + { +#if (CAN_WAKEUP_SUPPORT == STD_ON) + /* Initialize variables to handle the global stop */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaActiveControllers[LucIndex] = 0UL; + /* END Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaGlobalStateTransition[LucIndex] = CAN_FALSE; + /* END Msg(2:2844)-2 */ +#endif +#if ((CAN_RSCAN0_RXFIFO_INTERRUPT == STD_ON) || \ + (CAN_RSCAN1_RXFIFO_INTERRUPT == STD_ON)) + /* Initialize Global interruption disable count */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaGlobalIntCount[LucIndex] = 0UL; + /* END Msg(2:2844)-2 */ +#endif + /* If hw access permission is enable */ +#if (CAN_ACCESS_HW_ENABLE == STD_ON) + /* Initialize module and enter GLOBAL_RESET mode */ + LblErrFlag = Can_InitModule(LucIndex); +#endif + } + /*********************************************************************** + * INITIALIZATION OF GLOBAL CAN TIME SYNC CAPTURE * + ************************************************************************/ +#if (CAN_TIME_SYNC_CAPTURE_EN == STD_ON) + if (CAN_FALSE == LblErrFlag) + { + /* If hw access permission is enable */ +#if (CAN_ACCESS_HW_ENABLE == STD_ON) + LblErrFlag = Can_TSCapUnitInit(Config->ucNoOfUnits); +#endif + } + else + { + /* Do nothing */ + } +#endif + + /*********************************************************************** + * INITIALIZATION OF CONTROLLERS * + ***********************************************************************/ + for (LucIndex = 0U; + (LucIndex < Config->ucNoOfControllers) && (CAN_FALSE == LblErrFlag); + LucIndex++) + { + /* Initialize status variables */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaCtrlState[LucIndex].enMode = COMMON_STATE_STOPPED; + /* END Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaCtrlState[LucIndex].enSubState = CAN_NO_PENDING_TRANSITION; + /* END Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaCtrlState[LucIndex].blBusOff = CAN_FALSE; + /* END Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaCtrlState[LucIndex].ulBaudrateIndex = 0U; + /* END Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaCtrlState[LucIndex].ulIntCount = 0U; + /* END Msg(2:2844)-2 */ +#if (CAN_WAKEUP_SUPPORT == STD_ON) + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaCtrlState[LucIndex].blWakeupEventOccurred = CAN_FALSE; + /* END Msg(2:2844)-2 */ +#endif + + if (CAN_TRUE == Can_GpPCController[LucIndex].blActivation) + { +#if (CAN_ACCESS_HW_ENABLE == STD_ON) + /* Initialize Controller and enter CHANNEL_RESET mode */ + LblErrFlag = Can_InitController(LucIndex); +#endif + } + else + { + /* Nothing to do */ + } + } + + /*********************************************************************** + * INITIALIZATION OF Can_GaaHwAccessFlag * + ***********************************************************************/ +#if ((CAN_TX_BUFFER == STD_ON) || (CAN_TX_COMFIFO == STD_ON) ||\ + (CAN_TX_QUEUE == STD_ON)) + for (LusHohIndex = 0U; (LusHohIndex < CAN_NO_OF_HOHS); LusHohIndex++) + { + /* Clear flags which indicates HOH is being accessed by a Can_Write */ + Can_GaaHwAccessFlag[LusHohIndex] = CAN_FALSE; + } +#endif + + /*********************************************************************** + * ENTER GLOBAL_OPERATING MODE * + ***********************************************************************/ + /* if access hw is enable */ +#if (CAN_ACCESS_HW_ENABLE == STD_ON) + for (LucIndex = 0U; + (LucIndex < Config->ucNoOfUnits) && (CAN_FALSE == LblErrFlag); + LucIndex++) + { + /* Change to GLOBAL_OPERATING mode */ + LulTimeoutDuration = CAN_TIMEOUT_COUNT; + LucTimeoutResult = Can_GlobalModeChange( + LucIndex, CAN_RSCAN_GMDC_OP, &LulTimeoutDuration); + /* If mode changed was not finished, report error */ + if (E_OK != LucTimeoutResult) + { +#if defined(CAN_E_TIMEOUT_FAILURE) + CAN_DEM_REPORT_ERROR(CAN_E_TIMEOUT_FAILURE, + DEM_EVENT_STATUS_FAILED); +#endif + LblErrFlag = CAN_TRUE; + } + else + { + /* No action required */ + } + } +#endif + + /* If no error occurred, set the CAN status as initialized */ + if (CAN_FALSE == LblErrFlag) + { + Can_SetStatus(CAN_TRUE); + /* SWS_Can_00497: Setting ICOM status as deactivation */ +#if (CAN_PUBLIC_ICOM_SUPPORT == STD_ON) + Can_GblIcomStatus = CAN_ICOM_DEACTIVATION; +#endif + } + else + { + /* Nothing to do */ + } + } +#if (CAN_DEV_ERROR_DETECT == STD_ON) + else + { + /* Nothing to do */ + } +#endif /*#if (CAN_DEV_ERROR_DETECT == STD_ON) */ +} + +/******************************************************************************* +** Function Name : Can_DeInit +** +** Service ID : 0x10 +** +** Description : This function de-initializes the static variables and +** CAN HW Unit global hardware settings then +** de-initializes all specific CAN controllers. +** +** Sync/Async : Synchronous +** +** Reentrancy : Non-Reentrant +** +** Input Parameters : None +** +** InOut Parameters : None +** +** Output Parameters : None +** +** Return Parameter : None +** +** Preconditions : CAN Driver must be initialized and no CAN Controller +** is in state STARTED. +** +** Global Variables Used : Can_GblInitialized, Can_GpConfig +** Can_GaaCtrlState, Can_GpPCController +** Can_GaaRegs, Can_GaaGlobalIntCount +** Can_GaaActiveControllers, +** Can_GaaGlobalStateTransition +** +** Functions Invoked : Det_ReportError, CAN_DEM_REPORT_ERROR, Can_SetStatus, +** Can_DeInitModule, Can_DeInitController, +** Can_GlobalModeChange, Can_WaitRegisterChange, +** Can_TSCapUnitDeInit +** +** Registers Used : CFDGSTS, CFDGCTR, EIC Register +** +** Reference ID : CAN_DUD_ACT_018 +** Reference ID : CAN_DUD_ACT_018_ERR001, CAN_DUD_ACT_018_ERR002, +** Reference ID : CAN_DUD_ACT_018_GBL001, CAN_DUD_ACT_018_GBL002, +** Reference ID : CAN_DUD_ACT_018_GBL003, CAN_DUD_ACT_018_GBL004, +** Reference ID : CAN_DUD_ACT_018_GBL005, CAN_DUD_ACT_018_GBL006, +** Reference ID : CAN_DUD_ACT_018_GBL007, CAN_DUD_ACT_018_GBL008, +** Reference ID : CAN_DUD_ACT_018_GBL009, CAN_DUD_ACT_018_ERR003, +** Reference ID : CAN_DUD_ACT_018_REG001 +*******************************************************************************/ +#if ((CAN_AR_VERSION == CAN_AR_431_VERSION) || \ + (CAN_AR_VERSION == CAN_AR_1911_VERSION)) +/* MISRA Violation: START Msg(1:1503)-5 */ +FUNC(void, CAN_RSCAN_PUBLIC_CODE) Can_DeInit(void) +/* END Msg(1:1503)-5 */ +{ + VAR(uint8, AUTOMATIC) LucIndex; + VAR(boolean, AUTOMATIC) LblErrFlag; + VAR(uint32, AUTOMATIC) LulTimeoutDuration; + VAR(Std_ReturnType, AUTOMATIC) LucTimeoutResult; +#if (CAN_WAKEUP_SUPPORT == STD_ON) + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(Can_ControllerPCConfigType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA) + LpPCController; + /* END Msg(2:3432)-3 */ +#endif + + LblErrFlag = CAN_FALSE; + /* MISRA Violation: START Msg(2:2982)-2 */ + LucTimeoutResult = E_OK; + /* END Msg(2:2982)-2 */ +#if (CAN_DEV_ERROR_DETECT == STD_ON) + /* QAC Warning: START Msg(3:3416)-1 */ + /* Report to DET, if module is not initialized */ + if (CAN_FALSE == Can_GblInitialized) + /* END Msg(3:3416)-1 */ + { + (void)Det_ReportError(CAN_MODULE_ID, CAN_INSTANCE_ID, CAN_DEINIT_SID, + CAN_E_TRANSITION); + /* Set the error status flag to true */ + LblErrFlag = CAN_TRUE; + } + else + { + for (LucIndex = 0U; + (LucIndex < Can_GpConfig->ucNoOfControllers) && (CAN_FALSE == LblErrFlag); + LucIndex++) + { + /* QAC Warning: START Msg(2:2844)-2 */ + /* Report Det if any channel is in STARTED state */ + if ((CAN_CS_STARTED == Can_GaaCtrlState[LucIndex].enMode) || + (CAN_PENDING_START_WAIT_COM == Can_GaaCtrlState[LucIndex].enSubState)) + /* END Msg(2:2844)-2 */ + { + (void)Det_ReportError(CAN_MODULE_ID, CAN_INSTANCE_ID, + CAN_DEINIT_SID, CAN_E_TRANSITION); + /* Set the error status flag to true */ + LblErrFlag = CAN_TRUE; + } + else + { + /* Do nothing */ + } + } + } + + /* Check whether any development error occurred */ + if (CAN_FALSE == LblErrFlag) +#endif /*#if (CAN_DEV_ERROR_DETECT == STD_ON) */ + { + /* Change the module state to CAN_UNINIT before de-initializing all */ + /* controllers inside the HW unit. */ + Can_SetStatus(CAN_FALSE); + /*************************************************************************** + * DISABLE CONTROLLER WAKEUP INTERRUPTS * + ***************************************************************************/ +#if (CAN_WAKEUP_SUPPORT == STD_ON) + for (LucIndex = 0U; (LucIndex < Can_GpConfig->ucNoOfControllers); + LucIndex++) + { + LpPCController = &Can_GpPCController[LucIndex]; + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2814)-4 */ + if (NULL_PTR != LpPCController->pICWakeup) + /* END Msg(2:2814)-4 */ + /* END Msg(2:2844)-2 */ + { + /* Disable interrupt for wakeup hardware event. */ +#if (CAN_CR52_PROC == STD_ON) +#if !defined(CAN_V4H_PROC) && !defined(CAN_V4M_PROC) + /* Clear INTPnMSK bit for APPPINTMSKrn */ + /* MISRA Violation: START Msg(2:0310)-12 */ + /* MISRA Violation: START Msg(6:3305)-11 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_AND(32, LpPCController->pICWakeup, + (uint32)(~(CAN_EIC_EIMK_MASK_W << (LpPCController->ucCh + (LpPCController->ucUnit * ((uint8)8)))))); + /* END Msg(2:2814)-4 */ + /* END Msg(6:3305)-11 */ + /* END Msg(2:0310)-12 */ +#endif /* #if !defined(CAN_V4H_PROC) && !defined(CAN_V4M_PROC) */ +#else + /* set EIMK bit in EIC */ + /* QAC Warning: START Msg(2:0751)-5 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_OR(8, LpPCController->pICWakeup, CAN_EIC_EIMK_MASK); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0751)-5 */ +#endif /* #if (CAN_CR52_PROC == STD_ON) */ + } + else + { + /* No action is required. */ + } + } +#endif + + /*************************************************************************** + * ENTER GLOBAL_RESET MODE * + ***************************************************************************/ + for (LucIndex = 0U; + (LucIndex < Can_GpConfig->ucNoOfUnits) && (CAN_FALSE == LblErrFlag); + LucIndex++) + { +#if (CAN_WAKEUP_SUPPORT == STD_ON) + /* Check whether the global mode is in transition duration from */ + /* GLOBAL_RESET to GLOBAL_STOP. */ + LulTimeoutDuration = CAN_TIMEOUT_COUNT; + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2814)-4 */ + if((CAN_RSCAN_GRSTSTS == + (Can_GaaRegs[LucIndex].pCmn->ulGSTS & CAN_RSCAN_GSTSMASK)) && + (CAN_RSCAN_GSLPR == + (Can_GaaRegs[LucIndex].pCmn->ulGCTR & CAN_RSCAN_GSLPR))) + /* END Msg(2:2814)-4 */ + /* END Msg(2:2844)-2 */ + { + /* Wait for the transition to GLOBAL_STOP completed. */ + LucTimeoutResult = Can_WaitRegisterChange( + &Can_GaaRegs[LucIndex].pCmn->ulGSTS, + CAN_RSCAN_GSLPSTS, CAN_RSCAN_GSLPSTS, &LulTimeoutDuration); + } + /* Check whether the global mode is in transition duration from */ + /* GLOBAL_RESET to GLOBAL_OPERATING. */ + else if((CAN_RSCAN_GRSTSTS == + (Can_GaaRegs[LucIndex].pCmn->ulGSTS & CAN_RSCAN_GSTSMASK)) && + (CAN_RSCAN_GMDC_OP == + (Can_GaaRegs[LucIndex].pCmn->ulGCTR & CAN_RSCAN_GMDC_MASK))) + { + /* Wait for the transition to GLOBAL_OPERATING completed. */ + LucTimeoutResult = Can_WaitRegisterChange( + &Can_GaaRegs[LucIndex].pCmn->ulGSTS, + CAN_RSCAN_GSTSMASK, CAN_RSCAN_GMDC_OP, &LulTimeoutDuration); + } + else + { + /* Do nothing. */ + } + + /* Change to GLOBAL_RESET mode if no timeout occurs. */ + if (E_OK != LucTimeoutResult) + { + /* Do nothing. */ + } + else +#endif + { + LulTimeoutDuration = CAN_TIMEOUT_COUNT; + LucTimeoutResult = Can_GlobalModeChange( + LucIndex, CAN_RSCAN_GMDC_RESET, &LulTimeoutDuration); + } + + /* Report to Dem and set error flag if timeout occurs. */ + if (E_OK != LucTimeoutResult) + { +#if defined(CAN_E_TIMEOUT_FAILURE) + CAN_DEM_REPORT_ERROR(CAN_E_TIMEOUT_FAILURE, DEM_EVENT_STATUS_FAILED); +#endif + LblErrFlag = CAN_TRUE; + } + else + { + /* Do nothing. */ + } + } + + /*************************************************************************** + * DE-INITIALIZATION OF CONTROLLERS * + ***************************************************************************/ + for (LucIndex = 0U; + (LucIndex < Can_GpConfig->ucNoOfControllers) && (CAN_FALSE == LblErrFlag); + LucIndex++) + { + if (CAN_TRUE == Can_GpPCController[LucIndex].blActivation) + { + /* De-initialize Controller */ + LblErrFlag = Can_DeInitController(LucIndex); + } + else + { + /* Nothing to do */ + } + + /* Reset status variables */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaCtrlState[LucIndex].enMode = COMMON_STATE_UNINIT; + /* END Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaCtrlState[LucIndex].enSubState = CAN_NO_PENDING_TRANSITION; + /* END Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaCtrlState[LucIndex].blBusOff = CAN_FALSE; + /* END Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaCtrlState[LucIndex].ulBaudrateIndex = 0U; + /* END Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaCtrlState[LucIndex].ulIntCount = 0U; + /* END Msg(2:2844)-2 */ +#if (CAN_WAKEUP_SUPPORT == STD_ON) + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaCtrlState[LucIndex].blWakeupEventOccurred = CAN_FALSE; + /* END Msg(2:2844)-2 */ +#endif + } + + /*************************************************************************** + * DE-INITIALIZATION OF RSCANn MODULES * + ***************************************************************************/ + for (LucIndex = 0U; + (LucIndex < Can_GpConfig->ucNoOfUnits) && (CAN_FALSE == LblErrFlag); + LucIndex++) + { +#if ((CAN_RSCAN0_RXFIFO_INTERRUPT == STD_ON) || \ + (CAN_RSCAN1_RXFIFO_INTERRUPT == STD_ON)) + /* Reset disabled interrupt global counter */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaGlobalIntCount[LucIndex] = 0UL; + /* END Msg(2:2844)-2 */ +#endif +#if (CAN_WAKEUP_SUPPORT == STD_ON) + /* Reset variables to handle the global stop */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaActiveControllers[LucIndex] = 0UL; + /* END Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaGlobalStateTransition[LucIndex] = CAN_FALSE; + /* END Msg(2:2844)-2 */ +#endif +#if (CAN_TIME_SYNC_CAPTURE_EN == STD_ON) + /* De-initialize Can Time Sync Capture Unit. */ + Can_TSCapUnitDeInit(LucIndex); +#endif + /* De-initialize module and enter GLOBAL_RESET mode. */ + LblErrFlag = Can_DeInitModule(LucIndex); + } + } +#if (CAN_DEV_ERROR_DETECT == STD_ON) + else + { + /* Nothing to do */ + } +#endif /*#if (CAN_DEV_ERROR_DETECT == STD_ON) */ +} +#endif + +/******************************************************************************* +** Function Name : Can_ChangeBaudrate +** +** Service ID : 0x0D +** +** Description : This function set baudrate of CAN Controller. +** +** Sync/Async : Synchronous +** +** Reentrancy : Non-Reentrant +** +** Input Parameters : Controller : Controller ID +** Baudrate : Baudrate in kbps, it maust be in +** baudrate cofiguration of this Controller. +** +** InOut Parameters : None +** +** Output Parameters : None +** +** Return parameter : Std_ReturnType(E_OK/E_NOT_OK) +** +** Preconditions : CanDriver module must be initialized and +** the state of Controller must be COMMON_STATE_STOPPED. +** +** Global Variables Used : Can_GaaCtrlState, Can_GpPBController, +** Can_GpPCController, Can_GaaRegs +** +** Functions Invoked : Can_CommonDetCheck, Det_ReportError, +** Can_SearchBaudrate +** +** Registers Used : (CFD)CmCFG, CFDCmDCFG, CFDCmFDCFG +** +** Reference ID : CAN_DUD_ACT_013 +** Reference ID : CAN_DUD_ACT_013_ERR001, CAN_DUD_ACT_013_ERR002, +** Reference ID : CAN_DUD_ACT_013_GBL001, CAN_DUD_ACT_013_GBL002, +** Reference ID : CAN_DUD_ACT_013_REG001, CAN_DUD_ACT_013_REG002 +** Reference ID : CAN_DUD_ACT_013_REG003 +*******************************************************************************/ +#if ((CAN_AR_422_VERSION == CAN_AR_VERSION) && \ + (STD_ON == CAN_CHANGE_BAUDRATE_API)) +FUNC(Std_ReturnType, CAN_RSCAN_PUBLIC_CODE) Can_ChangeBaudrate( + VAR(uint8, AUTOMATIC) Controller, + CONST(uint16, CAN_RSCAN_APPL_CONST) Baudrate) +{ + VAR(Std_ReturnType, AUTOMATIC) LucReturnValue; + P2CONST(Can_BaudrateConfigType, AUTOMATIC, CAN_RSCAN_APPL_DATA) + LpBaudrateConfig; + VAR(uint8, AUTOMATIC) LucUnit; + VAR(uint8, AUTOMATIC) LucCh; + VAR(uint32, AUTOMATIC) LulBaudrateIndex; + +#if (CAN_DEV_ERROR_DETECT == STD_ON) + VAR(Common_ReturnType, AUTOMATIC) LenCommonResult; + LenCommonResult = Can_CommonDetCheck(CAN_CHANGE_BAUDRATE_SID, Controller); + if (COMMON_OK != LenCommonResult) + { + LucReturnValue = E_NOT_OK; + } + /* Check whether the Controller is in stop mode */ + else if (COMMON_STATE_STOPPED != Can_GaaCtrlState[Controller].enMode) + { + (void)Det_ReportError(CAN_MODULE_ID, CAN_INSTANCE_ID, + CAN_CHANGE_BAUDRATE_SID, CAN_E_TRANSITION); + LucReturnValue = E_NOT_OK; + } + else +#endif /* #if (CAN_DEV_ERROR_DETECT == STD_ON) */ + { + /* Search the baud rates configured for the CAN controller*/ + LulBaudrateIndex = Can_SearchBaudrate(Controller, Baudrate); +#if (CAN_DEV_ERROR_DETECT == STD_ON) + /* Report to DET, if parameter Baud rate is an invalid value */ + if (CAN_INVALID_INDEX == LulBaudrateIndex) + { + (void)Det_ReportError(CAN_MODULE_ID, CAN_INSTANCE_ID, + CAN_CHANGE_BAUDRATE_SID, CAN_E_PARAM_BAUDRATE); + LucReturnValue = E_NOT_OK; + } + else +#endif + { + LpBaudrateConfig = + &Can_GpPBController[Controller].pBaudrateConfig[LulBaudrateIndex]; + LucUnit = Can_GpPCController[Controller].ucUnit; + LucCh = Can_GpPCController[Controller].ucCh; + /* Update current baudrate status */ + Can_GaaCtrlState[Controller].ulBaudrateIndex = LulBaudrateIndex; + /* Initialization of baud rate and time setting related parameters*/ + Can_GaaRegs[LucUnit].pCmn->aaChReg[LucCh].ulCFG = LpBaudrateConfig->ulCFG; +#if ((CAN_RSCAN_CONFIGURED == STD_ON) && (CAN_RSCANFD_CONFIGURED == STD_ON)) + if (CAN_MACRO_RSCANFD == Can_GaaRegs[LucUnit].enMacroType) +#endif + { +#if (CAN_RSCANFD_CONFIGURED == STD_ON) + Can_GaaRegs[LucUnit].pFD->aaFDChReg[LucCh].ulDCFG = + LpBaudrateConfig->ulDCFG; + Can_GaaRegs[LucUnit].pFD->aaFDChReg[LucCh].ulFDCFG = + LpBaudrateConfig->ulFDCFG; +#endif + } +#if ((CAN_RSCAN_CONFIGURED == STD_ON) && (CAN_RSCANFD_CONFIGURED == STD_ON)) + else +#endif + { + /* Nothing to do */ + } + +#if (CAN_WAKEUP_SUPPORT == STD_ON) + /* Check wakeup event according to SWS_Can_00461 */ + if (CAN_TRUE == Can_GaaCtrlState[Controller].blWakeupEventOccurred) + { + /* Clear event flag */ + Can_GaaCtrlState[Controller].blWakeupEventOccurred = CAN_FALSE; + /* Invoke the EcuM Set Wakeup API*/ + EcuM_SetWakeupEvent((EcuM_WakeupSourceType)(CAN_ONE << Can_GpPCController[Controller].ulWakeupSourceId)); + } + else + { + /* Nothing to do */ + } +#endif /* (CAN_WAKEUP_SUPPORT == STD_ON) */ + LucReturnValue = E_OK; + } + } + return LucReturnValue; +} +#endif /* #if ((CAN_AR_422_VERSION == CAN_AR_VERSION) && \ + (STD_ON == CAN_CHANGE_BAUDRATE_API)) */ + +/******************************************************************************* +** Function Name : Can_CheckBaudrate +** +** Service ID : 0x0E +** +** Description : This function checks the baud rates configured for +** CAN Controller. +** +** Sync/Async : Synchronous +** +** Reentrancy : Reentrant +** +** Input Parameters : Controller : Controller ID +** Baudrate : Baudrate in kbps +** +** InOut Parameters : None +** +** Output Parameters : None +** +** Return parameter : Std_ReturnType(E_OK/E_NOT_OK) +** +** Preconditions : CanDriver module must be initialized. +** +** Global Variables Used : Can_GpConfig +** +** Functions Invoked : Can_CommonDetCheck, Can_SearchBaudrate +** +** Registers Used : None +** +** Reference ID : CAN_DUD_ACT_014 +** Reference ID : CAN_DUD_ACT_014_ERR001 +*******************************************************************************/ +#if ((CAN_AR_422_VERSION == CAN_AR_VERSION) && \ + (STD_ON == CAN_CHANGE_BAUDRATE_API)) +FUNC(Std_ReturnType, CAN_RSCAN_PUBLIC_CODE) Can_CheckBaudrate( + VAR(uint8, AUTOMATIC) Controller, + CONST(uint16, AUTOMATIC) Baudrate) +{ + VAR(Std_ReturnType, AUTOMATIC) LucReturnValue; + VAR(uint32,AUTOMATIC) LulBaudrateIndex; + +#if (CAN_DEV_ERROR_DETECT == STD_ON) + VAR(Common_ReturnType, AUTOMATIC) LenCommonResult; + LenCommonResult = Can_CommonDetCheck(CAN_CHECK_BAUDRATE_SID, Controller); + if (COMMON_OK != LenCommonResult) + { + LucReturnValue = E_NOT_OK; + } + else +#endif /* #if (CAN_DEV_ERROR_DETECT == STD_ON) */ + { + /* Search the baud rates configured for the CAN controller*/ + LulBaudrateIndex = Can_SearchBaudrate(Controller, Baudrate); + if (CAN_INVALID_INDEX != LulBaudrateIndex) + { + LucReturnValue = E_OK; + } + else + { +#if (CAN_DEV_ERROR_DETECT == STD_ON) + /* Report to DET */ + (void)Det_ReportError(CAN_MODULE_ID, CAN_INSTANCE_ID, + CAN_CHECK_BAUDRATE_SID, CAN_E_PARAM_BAUDRATE); +#endif + LucReturnValue = E_NOT_OK; + } + } + + return(LucReturnValue); +} +#endif /* #if ((CAN_AR_422_VERSION == CAN_AR_VERSION) && \ + (STD_ON == CAN_CHANGE_BAUDRATE_API)) */ + +/******************************************************************************* +** Function Name : Can_SetBaudrate +** +** Service ID : 0x0F +** +** Description : This function set baudrate of CAN Controller. +** +** Sync/Async : Synchronous +** +** Reentrancy : Reentrant for different Controller, +** Non-Reentrant for the same Controller +** +** Input Parameters : Controller : Controller ID +** Baudrate : Baudrate ID +** +** InOut Parameters : None +** +** Output Parameters : None +** +** Return parameter : Std_ReturnType(E_OK/E_NOT_OK) +** +** Preconditions : CanDriver module must be initialized and +** the state of Controller must be COMMON_STATE_STOPPED. +** +** Global Variables Used : Can_GaaCtrlState, Can_GpPBController +** Can_GpPCController, Can_GaaRegs +** +** Functions Invoked : Can_CommonDetCheck, Can_SearchBaudrateID +** +** Registers Used : (CFD)CmCFG, CFDCmDCFG [E2M, E2H, E2UH, U2A16, U2A8] +** (CFD)CnCFG, CFDCnDCFG [S4_G4MH, S4_CR52, V4H, V4M] +** +** Reference ID : CAN_DUD_ACT_015 +** Reference ID : CAN_DUD_ACT_015_ERR001, CAN_DUD_ACT_015_ERR002, +** Reference ID : CAN_DUD_ACT_015_GBL001, CAN_DUD_ACT_015_REG001, +** Reference ID : CAN_DUD_ACT_015_REG002, CAN_DUD_ACT_015_REG003 +*******************************************************************************/ +#if (CAN_SET_BAUDRATE_API == STD_ON) +/* MISRA Violation: START Msg(1:1503)-5 */ +FUNC(Std_ReturnType, CAN_RSCAN_PUBLIC_CODE) Can_SetBaudrate( + VAR(uint8, AUTOMATIC) Controller, + VAR(uint16, AUTOMATIC) BaudRateConfigID) +/* END Msg(1:1503)-5 */ +{ + VAR(Std_ReturnType, AUTOMATIC) LucReturnValue; + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(Can_BaudrateConfigType, AUTOMATIC, CAN_RSCAN_APPL_DATA) + LpBaudrateConfig; + /* END Msg(2:3432)-3 */ + VAR(uint8, AUTOMATIC) LucUnit; + VAR(uint8, AUTOMATIC) LucCh; + VAR(uint32, AUTOMATIC) LulBaudrateIndex; + +#if (CAN_DEV_ERROR_DETECT == STD_ON) + VAR(Common_ReturnType, AUTOMATIC) LenCommonResult; + LenCommonResult = Can_CommonDetCheck(CAN_SET_BAUDRATE_SID, Controller); + if (COMMON_OK != LenCommonResult) + { + LucReturnValue = E_NOT_OK; + } + /* QAC Warning: START Msg(2:2844)-2 */ + /* Check whether the Controller is in stop mode */ + else if ((COMMON_STATE_STOPPED != Can_GaaCtrlState[Controller].enMode) || + (CAN_NO_PENDING_TRANSITION != Can_GaaCtrlState[Controller].enSubState)) + /* END Msg(2:2844)-2 */ + { + /* Report to DET */ + (void)Det_ReportError(CAN_MODULE_ID, CAN_INSTANCE_ID, + CAN_SET_BAUDRATE_SID, CAN_E_TRANSITION); + /* Set the error status flag to true */ + LucReturnValue = E_NOT_OK; + } + else +#endif /* #if (CAN_DEV_ERROR_DETECT == STD_ON) */ + { + /* Search the baud rates configured for the CAN controller*/ + LulBaudrateIndex = Can_SearchBaudrateID( + Controller, BaudRateConfigID); +#if (CAN_DEV_ERROR_DETECT == STD_ON) + /* Report to DET, if parameter Baud rate is an invalid value */ + if (CAN_INVALID_INDEX == LulBaudrateIndex) + { + /* Report to DET */ + (void)Det_ReportError(CAN_MODULE_ID, CAN_INSTANCE_ID, + CAN_SET_BAUDRATE_SID, CAN_E_PARAM_BAUDRATE); + LucReturnValue = E_NOT_OK; + } + else +#endif + { + /* QAC Warning: START Msg(2:2824)-3 */ + LpBaudrateConfig = + &Can_GpPBController[Controller].pBaudrateConfig[LulBaudrateIndex]; + /* END Msg(2:2824)-3 */ + LucUnit = Can_GpPCController[Controller].ucUnit; + LucCh = Can_GpPCController[Controller].ucCh; + /* Update current baudrate status */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaCtrlState[Controller].ulBaudrateIndex = LulBaudrateIndex; + /* END Msg(2:2844)-2 */ + /* Initialization of baud rate and time setting related parameters*/ + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2814)-4 */ + Can_GaaRegs[LucUnit].pCmn->aaChReg[LucCh].ulCFG = LpBaudrateConfig->ulCFG; + /* END Msg(2:2814)-4 */ + /* END Msg(2:2844)-2 */ +#if ((CAN_RSCAN_CONFIGURED == STD_ON) && (CAN_RSCANFD_CONFIGURED == STD_ON)) + if (CAN_MACRO_RSCANFD == Can_GaaRegs[LucUnit].enMacroType) +#endif + { +#if (CAN_RSCANFD_CONFIGURED == STD_ON) + Can_GaaRegs[LucUnit].pFD->aaFDChReg[LucCh].ulDCFG = + LpBaudrateConfig->ulDCFG; + Can_GaaRegs[LucUnit].pFD->aaFDChReg[LucCh].ulFDCFG = + LpBaudrateConfig->ulFDCFG; +#endif + } +#if ((CAN_RSCAN_CONFIGURED == STD_ON) && (CAN_RSCANFD_CONFIGURED == STD_ON)) + else +#endif + { + /* Nothing to do */ + } + LucReturnValue = E_OK; + } + } + + return LucReturnValue; +} +#endif /* (CAN_SET_BAUDRATE_API == STD_ON) */ + +/******************************************************************************* +** Function Name : Can_DisableControllerInterrupts +** +** Service ID : 0x04 +** +** Description : This function disables all interrupts for this CAN +** Controller. +** If interrupt event occurs after this API, it is kept +** and handled after Can_EnableControllerInterrupts. +** Note that RxFIFO interruption is not disabled +** since it is global interruption. +** +** Sync/Async : Synchronous +** +** Reentrancy : Reentrant +** +** Input Parameters : Controller : Controller ID +** +** InOut Parameters : None +** +** Output Parameters : None +** +** Return parameter : None +** +** Preconditions : The CAN Driver must be initialized. +** +** Global Variables Used : Can_GpPCController, Can_GaaCtrlState, Can_GaaRegs, +** Can_GaaGlobalIntCount, Can_GpConfig, Can_GpHohConfig +** +** Functions Invoked : Can_CommonDetCheck, CAN_ENTER_CRITICAL_SECTION, +** CAN_EXIT_CRITICAL_SECTION +** +** Registers Used : EICn registers (S4) +** (CFD)CFCCd, (CFD)TXQCCn, (CFD)RFCCa, (CFD)CnCTR +** (CFD)THLCCn, (CFD)TMIECf (V4H, V4M). +** +** Reference ID : CAN_DUD_ACT_004 +** Reference ID : CAN_DUD_ACT_004_CRT001, CAN_DUD_ACT_004_CRT002, +** Reference ID : CAN_DUD_ACT_004_GBL001, CAN_DUD_ACT_004_GBL002, +** Reference ID : CAN_DUD_ACT_004_REG001, CAN_DUD_ACT_004_REG002, +** Reference ID : CAN_DUD_ACT_004_REG003, CAN_DUD_ACT_004_REG004, +** Reference ID : CAN_DUD_ACT_004_REG005, CAN_DUD_ACT_004_REG006, +** Reference ID : CAN_DUD_ACT_004_REG007, CAN_DUD_ACT_004_REG008, +** Reference ID : CAN_DUD_ACT_004_REG009, CAN_DUD_ACT_004_REG010, +** Reference ID : CAN_DUD_ACT_004_REG011, CAN_DUD_ACT_004_REG012 +*******************************************************************************/ +/* MISRA Violation: START Msg(1:1503)-5 */ +FUNC(void, CAN_RSCAN_PUBLIC_CODE) Can_DisableControllerInterrupts( + VAR(uint8, AUTOMATIC) Controller) +/* END Msg(1:1503)-5 */ +{ + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(Can_ControllerPCConfigType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA) + LpPCController; + /* END Msg(2:3432)-3 */ +#if defined(CAN_V4H_PROC) || defined(CAN_V4M_PROC) + VAR(uint8, AUTOMATIC) LucUnit; + VAR(uint8, AUTOMATIC) LucCh; +#if (CAN_TX_BUFFER == STD_ON) + VAR(uint8, AUTOMATIC) LucTMIECIndex; + VAR(uint8, AUTOMATIC) LucCount; + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(Can_HWUnitInfoType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA) LpHWInfo; + /* END Msg(2:3432)-3 */ +#endif + VAR(uint16, AUTOMATIC) LusHohIndex; + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(Can_HohConfigType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA) LpHoh; + /* END Msg(2:3432)-3 */ +#if (CAN_TX_QUEUE == STD_ON) + VAR(uint32, AUTOMATIC) LulTxQCh; + VAR(uint32, AUTOMATIC) LulTxQIdx; +#endif +#endif /* #if defined(CAN_V4H_PROC) || defined(CAN_V4M_PROC) */ + +#if (CAN_DEV_ERROR_DETECT == STD_ON) + VAR(Common_ReturnType, AUTOMATIC) LenCommonResult; + LenCommonResult = Can_CommonDetCheck(CAN_DISABLE_CNTRL_INT_SID, Controller); + if (COMMON_OK != LenCommonResult) + { + /* Nothing to do */ + } + else +#endif + { + LpPCController = &Can_GpPCController[Controller]; + + /* QAC Warning: START Msg(2:2814)-4 */ + /* QAC Warning: START Msg(2:2844)-2 */ + /* If this Controller is configuread as polling mode for all events, + do nothing */ + if (CAN_INT_DISABLED != LpPCController->ucIntEnable) + /* END Msg(2:2844)-2 */ + /* END Msg(2:2814)-4 */ + { + /* Critical section is required to protect updating of ulIntCount + and to prevent the interruption during manipulating EIMK flag */ + CAN_ENTER_CRITICAL_SECTION(CAN_INTERRUPT_CONTROL_PROTECTION); + /* QAC Warning: START Msg(2:2844)-2 */ + if (0UL != Can_GaaCtrlState[Controller].ulIntCount) + /* END Msg(2:2844)-2 */ + { + /* When this function is called recursively, do nothing */ + } + else + { +#if !defined(CAN_V4H_PROC) && !defined(CAN_V4M_PROC) +#if ((CAN_RSCAN0_RXFIFO_INTERRUPT == STD_ON) || \ + (CAN_RSCAN1_RXFIFO_INTERRUPT == STD_ON)) + /* Disable Global interruption */ +#if (CAN_CR52_PROC == STD_ON) + /* MISRA Violation: START Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(2:0310)-12 */ + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_AND(32, + Can_GaaRegs[LpPCController->ucUnit].pICRxFIFO, + (uint32)(~CAN_EIC_EIMK_MASK)); + /* END Msg(2:2814)-4 */ + /* END Msg(2:2844)-2 */ + /* END Msg(2:0310)-12 */ + /* END Msg(6:3305)-11 */ +#else + /* QAC Warning: START Msg(2:0751)-5 */ + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_OR(8, Can_GaaRegs[LpPCController->ucUnit].pICRxFIFO, + CAN_EIC_EIMK_MASK); + /* END Msg(2:2814)-4 */ + /* END Msg(2:2844)-2 */ + /* END Msg(2:0751)-5 */ +#endif /* #ifdef CAN_CR52_PROC */ + /* Increment Global interruption disable count */ + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(1:3383)-6 */ + /* MISRA Violation: START Msg(3:3387)-7 */ + Can_GaaGlobalIntCount[LpPCController->ucUnit]++; + /* END Msg(3:3387)-7 */ + /* END Msg(1:3383)-6 */ + /* END Msg(2:2844)-2 */ +#endif +#if (CAN_CR52_PROC == STD_ON) + /* Disable Channel interruption */ + + /* MISRA Violation: START Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(2:0310)-12 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_AND(32, LpPCController->pICErr, + (uint32)(~(CAN_EIC_EIMK_MASK_E << (LpPCController->ucCh * ((uint8)3))))); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0310)-12 */ + /* END Msg(6:3305)-11 */ + + /* MISRA Violation: START Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(2:0310)-12 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_AND(32, LpPCController->pICRec, + (uint32)(~(CAN_EIC_EIMK_MASK_R << (LpPCController->ucCh * ((uint8)3))))); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0310)-12 */ + /* END Msg(6:3305)-11 */ + + /* MISRA Violation: START Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(2:0310)-12 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_AND(32, LpPCController->pICTx, + (uint32)(~(CAN_EIC_EIMK_MASK_T << (LpPCController->ucCh * ((uint8)3))))); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0310)-12 */ + /* END Msg(6:3305)-11 */ + +#else + /* Disable Channel interruption */ + /* QAC Warning: START Msg(2:0751)-5 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_OR(8, LpPCController->pICErr, CAN_EIC_EIMK_MASK); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0751)-5 */ + /* QAC Warning: START Msg(2:2814)-4 */ + /* QAC Warning: START Msg(2:0751)-5 */ + RH850_SV_MODE_ICR_OR(8, LpPCController->pICRec, CAN_EIC_EIMK_MASK); + /* END Msg(2:0751)-5 */ + /* END Msg(2:2814)-4 */ + /* QAC Warning: START Msg(2:0751)-5 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_OR(8, LpPCController->pICTx, CAN_EIC_EIMK_MASK); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0751)-5 */ +#endif /* #ifdef CAN_CR52_PROC */ + +#if (CAN_WAKEUP_SUPPORT == STD_ON) + if (NULL_PTR != LpPCController->pICWakeup) + { +#if (CAN_CR52_PROC == STD_ON) + /* Clear INTPnMSK bit for APPPINTMSKrn */ + + /* MISRA Violation: START Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(2:0310)-12 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_AND(32, LpPCController->pICWakeup, + (uint32)(~(CAN_EIC_EIMK_MASK_W << (LpPCController->ucCh + (LpPCController->ucUnit * ((uint8)8)))))); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0310)-12 */ + /* END Msg(6:3305)-11 */ +#else + /* To modify EIMK flag without affecting EIRF flag, + access the lower 8 bit only */ + /* QAC Warning: START Msg(2:0751)-5 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_OR(8, LpPCController->pICWakeup, CAN_EIC_EIMK_MASK); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0751)-5 */ +#endif /* CAN_CR52_PROC */ + + } + else + { + /* No action is Required */ + } +#endif + /* DummyRead & SYNCP are required to guarantee that + any interruption never occurs after this function returns. */ + RH850_SV_MODE_REG_READ_ONLY(16, LpPCController->pICTx); + /* MISRA Violation: START Msg(2:1006)-16 */ + EXECUTE_SYNCP(); + /* END Msg(2:1006)-16 */ +#else /* For V4H/V4M only */ + + LucUnit = LpPCController->ucUnit; + LucCh = LpPCController->ucCh; + /*************************************************************************** + * Disable Controller Error Interrupt * + ***************************************************************************/ + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2814)-4 */ + Can_GaaRegs[LucUnit].pCmn->aaChReg[LucCh].ulCTR &= (~CAN_RSCAN_BOEIE); + /* END Msg(2:2814)-4 */ + /* END Msg(2:2844)-2 */ + +#if (CAN_TX_BUFFER == STD_ON) + /************************************************************************** + * Disable transmit message buffer Interrupt * + ***************************************************************************/ + if (CAN_CHECK_INT_TX == (LpPCController->ucIntEnable & CAN_CHECK_INT_TX)) + { + /* Get PBConfig data for this RSCAN(FD) unit */ + /* MISRA Violation: START Msg(2:0316)-1 */ + /* MISRA Violation: START Msg(2:3432)-3 */ + LpHWInfo = (P2CONST(Can_HWUnitInfoType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA)) + Can_GpConfig->pHWUnitInfo; + /* END Msg(2:3432)-3 */ + /* END Msg(2:0316)-1 */ + /* Loop for number of (CFD)TMIECf registers assigned to Controller */ + /* QAC Warning: START Msg(2:2824)-3 */ + LpHWInfo = &LpHWInfo[LucUnit]; + /* END Msg(2:2824)-3 */ + /* Maximum 2 (CFD)TMIECf registers will be assigned to each CAN channel. */ + /* QAC Warning: START Msg(1:3383)-6 */ + LucTMIECIndex = LucCh*2U; + /* END Msg(1:3383)-6 */ + /* QAC Warning: START Msg(1:3383)-6 */ + for (LucCount = LucTMIECIndex; LucCount < (LucTMIECIndex + 2U); LucCount++) + /* END Msg(1:3383)-6 */ + { + /* QAC Warning: START Msg(2:2814)-4 */ + /* QAC Warning: START Msg(2:2824)-3 */ + Can_GaaRegs[LucUnit].pCmn->aaTMIEC[LucCount] &= (~LpHWInfo->pTMIEC[LucCount]); + /* END Msg(2:2824)-3 */ + /* END Msg(2:2814)-4 */ + } + } + else + { + /* No Action Required */ + } +#endif /* #if (CAN_TX_BUFFER == STD_ON) */ + /******************************************************************* + * Disable transmit history list interrupt * + *******************************************************************/ + Can_GaaRegs[LucUnit].pCmn->aaTHLCC[LucCh] &= (~CAN_RSCAN_THLIE); + + /*************************************************************************** + * Disable Receive FIFO/COM FIFO RX Interrupt * + ***************************************************************************/ + /* Scan all HOH objects */ + for (LusHohIndex = 0U; + LusHohIndex < Can_GpConfig->usNoOfHohs; LusHohIndex++) + { + LpHoh = &Can_GpHohConfig[LusHohIndex]; + /* QAC Warning: START Msg(2:2814)-4 */ + /* QAC Warning: START Msg(2:2844)-2 */ + if (LpHoh->ucController == Controller) + /* END Msg(2:2844)-2 */ + /* END Msg(2:2814)-4 */ + { + /* Check each HRH object */ + if (CAN_HOH_HRH == LpHoh->enHoh) + { +#if ((CAN_RX_FIFO == STD_ON) || (CAN_RX_COMFIFO == STD_ON)) + switch (LpHoh->enBufferType) + { +#if (CAN_RX_FIFO == STD_ON) + case CAN_BUFFERTYPE_RXFIFO: + /* Disable Receive FIFO interrupt */ + Can_GaaRegs[LucUnit].pCmn->aaRFCC[LpHoh->usBufferIndex] &= + (~CAN_RSCAN_RFIE); + break; +#endif /* #if (CAN_RX_FIFO == STD_ON) */ +#if (CAN_RX_COMFIFO == STD_ON) + case CAN_BUFFERTYPE_TXRXFIFO: + /* Disable RX COM FIFO interrupt */ + Can_GaaRegs[LucUnit].pCmn->aaCFCC[LpHoh->usBufferIndex] &= + (~CAN_RSCAN_CFRXIE); + break; +#endif /* #if (CAN_RX_COMFIFO == STD_ON) */ + /* Receive buffer and (COM FIFO or TXQ in Gateway mode) + don't enable interrupt, so no action required. */ + /* MISRA Violation: START Msg(2:2016)-12 */ + default: + /* END Msg(2:2016)-12 */ + break; + } /* switch (LpHoh->enBufferType) */ +#endif /* if ((CAN_RX_FIFO == STD_ON) || (CAN_RX_COMFIFO == STD_ON)) */ + } + else + { + /*************************************************************************** + * Disable Transmit Queue/COM FIFO TX Interrupt * + ***************************************************************************/ + /* Check each HTH object */ +#if ((CAN_TX_COMFIFO == STD_ON) || (CAN_TX_QUEUE == STD_ON)) + switch (LpHoh->enBufferType) + { +#if (CAN_TX_COMFIFO == STD_ON) + case CAN_BUFFERTYPE_TXRXFIFO: + /* Disable TX COM FIFO interrupt */ + Can_GaaRegs[LucUnit].pCmn->aaCFCC[LpHoh->usBufferIndex] &= + (~CAN_RSCAN_CFTXIE); + break; +#endif /* #if (CAN_TX_COMFIFO == STD_ON) */ +#if (CAN_TX_QUEUE == STD_ON) + case CAN_BUFFERTYPE_TXQUEUE: + LulTxQCh = (uint32)LpHoh->usBufferIndex / CAN_RSCAN_TXQUEUE_PER_CH; + LulTxQIdx = (uint32)LpHoh->usBufferIndex % CAN_RSCAN_TXQUEUE_PER_CH; + /* Disable TX Queue interrupt */ + Can_GaaRegs[LucUnit].pCmn->aaTQueueReg[LulTxQIdx].aaTXQCC[LulTxQCh] &= + (~CAN_RSCAN_TXQTXIE); + break; +#endif /* #if (CAN_TX_QUEUE == STD_ON) */ + /* MISRA Violation: START Msg(2:2016)-12 */ + default: + /* END Msg(2:2016)-12 */ + break; + } +#endif /* #if ((CAN_TX_COMFIFO == STD_ON) || (CAN_TX_QUEUE == STD_ON)) */ + } + } + else + { + /* No Action Required */ + } + } +#endif /* #if !defined(CAN_V4H_PROC) && !defined(CAN_V4M_PROC) */ + } + /* Increment recursive count */ + /* MISRA Violation: START Msg(3:3387)-7 */ + /* QAC Warning: START Msg(1:3383)-6 */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaCtrlState[Controller].ulIntCount++; + /* END Msg(2:2844)-2 */ + /* END Msg(1:3383)-6 */ + /* END Msg(3:3387)-7 */ + CAN_EXIT_CRITICAL_SECTION(CAN_INTERRUPT_CONTROL_PROTECTION); + } + else + { + /* Nothing to do */ + } + } +} + +/******************************************************************************* +** Function Name : Can_EnableControllerInterrupts +** +** Service ID : 0x05 +** +** Description : This function enables all interrupts for this CAN +** Controller. +** If Can_DisableControllerInterrupt has been called +** multiple times, this function should be called +** same times to enable interrupts. +** If this function when interrupts already enabled, +** nothing is done. +** +** Sync/Async : Synchronous +** +** Reentrancy : Reentrant +** +** Input Parameters : Controller : Controller ID +** +** InOut Parameters : None +** +** Output Parameters : None +** +** Return parameter : None +** +** Preconditions : The CAN Driver must be initialized. +** +** Global Variables Used : Can_GpPCController, Can_GaaCtrlState, Can_GaaRegs, +** Can_GaaGlobalIntCount, Can_GpConfig, Can_GpHohConfig +** +** Functions Invoked : Can_CommonDetCheck, CAN_ENTER_CRITICAL_SECTION, +** CAN_EXIT_CRITICAL_SECTION +** +** Registers Used : EICn registers (S4) +** (CFD)CFCCd, (CFD)TXQCCn, (CFD)RFCCa, (CFD)CnCTR +** (CFD)THLCCn, (CFD)TMIECf (V4H, V4M). +** +** Reference ID : CAN_DUD_ACT_005 +** Reference ID : CAN_DUD_ACT_005_CRT001, CAN_DUD_ACT_005_CRT002, +** Reference ID : CAN_DUD_ACT_005_GBL001, CAN_DUD_ACT_005_GBL002, +** Reference ID : CAN_DUD_ACT_005_REG001, CAN_DUD_ACT_005_REG002, +** Reference ID : CAN_DUD_ACT_005_REG003, CAN_DUD_ACT_005_REG004, +** Reference ID : CAN_DUD_ACT_005_REG005, CAN_DUD_ACT_005_REG006, +** Reference ID : CAN_DUD_ACT_005_REG007, CAN_DUD_ACT_005_REG008, +** Reference ID : CAN_DUD_ACT_005_REG009, CAN_DUD_ACT_005_REG010, +** Reference ID : CAN_DUD_ACT_005_REG011, CAN_DUD_ACT_005_REG012. +*******************************************************************************/ +/* MISRA Violation: START Msg(1:1503)-5 */ +FUNC(void, CAN_RSCAN_PUBLIC_CODE) Can_EnableControllerInterrupts( + VAR(uint8, AUTOMATIC) Controller) +/* END Msg(1:1503)-5 */ +{ + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(Can_ControllerPCConfigType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA) + LpPCController; + /* END Msg(2:3432)-3 */ +#if defined(CAN_V4H_PROC) || defined(CAN_V4M_PROC) + VAR(uint8, AUTOMATIC) LucUnit; + VAR(uint8, AUTOMATIC) LucCh; +#if (CAN_TX_BUFFER == STD_ON) + VAR(uint8, AUTOMATIC) LucTMIECIndex; + VAR(uint8, AUTOMATIC) LucCount; + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(Can_HWUnitInfoType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA) LpHWInfo; + /* END Msg(2:3432)-3 */ +#endif + VAR(uint16, AUTOMATIC) LusHohIndex; + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(Can_HohConfigType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA) LpHoh; + /* END Msg(2:3432)-3 */ +#if (CAN_TX_QUEUE == STD_ON) + VAR(uint32, AUTOMATIC) LulTxQCh; + VAR(uint32, AUTOMATIC) LulTxQIdx; +#endif +#endif + +#if (CAN_DEV_ERROR_DETECT == STD_ON) + VAR(Common_ReturnType, AUTOMATIC) LenCommonResult; + LenCommonResult = Can_CommonDetCheck(CAN_ENABLE_CNTRL_INT_SID, Controller); + if (COMMON_OK != LenCommonResult) + { + /* Do nothing */ + } + else +#endif + { + LpPCController = &Can_GpPCController[Controller]; + + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2814)-4 */ + /* If this Controller is configuread as polling mode for all events, + do nothing */ + if (CAN_INT_DISABLED != LpPCController->ucIntEnable) + /* END Msg(2:2814)-4 */ + /* END Msg(2:2844)-2 */ + { + /* Critical section is required to protect updating of ulIntCount */ + CAN_ENTER_CRITICAL_SECTION(CAN_INTERRUPT_CONTROL_PROTECTION); + + /* QAC Warning: START Msg(2:2844)-2 */ + if (0UL == Can_GaaCtrlState[Controller].ulIntCount) + /* END Msg(2:2844)-2 */ + { + /* If interruption is already enabled, do nothing */ + } + else + { + /* Decrement recursive count */ + /* MISRA Violation: START Msg(3:3387)-7 */ + /* QAC Warning: START Msg(1:3384)-7 */ + Can_GaaCtrlState[Controller].ulIntCount--; + /* END Msg(1:3384)-7 */ + /* END Msg(3:3387)-7 */ + + /* QAC Warning: START Msg(2:2844)-2 */ + if (0UL != Can_GaaCtrlState[Controller].ulIntCount) + /* END Msg(2:2844)-2 */ + { + /* Recursive count is still remained, do nothing */ + } + else + { +#if !defined(CAN_V4H_PROC) && !defined(CAN_V4M_PROC) +#if ((CAN_RSCAN0_RXFIFO_INTERRUPT == STD_ON) || \ + (CAN_RSCAN1_RXFIFO_INTERRUPT == STD_ON)) + /* Decrement Global interruption disable count */ + /* QAC Warning: START Msg(2:2844)-2 */ + /* MISRA Violation: START Msg(3:3387)-7 */ + /* QAC Warning: START Msg(1:3384)-7 */ + Can_GaaGlobalIntCount[LpPCController->ucUnit]--; + /* END Msg(1:3384)-7 */ + /* END Msg(3:3387)-7 */ + /* END Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2844)-2 */ + /* Enable Global interruption */ + if (0UL == Can_GaaGlobalIntCount[LpPCController->ucUnit]) + /* END Msg(2:2844)-2 */ + { +#if (CAN_CR52_PROC == STD_ON) + /* MISRA Violation: START Msg(2:0310)-12 */ + /* MISRA Violation: START Msg(6:3305)-11 */ + /* QAC Warning: START Msg(2:2814)-4 */ + /* QAC Warning: START Msg(2:2844)-2 */ + RH850_SV_MODE_ICR_OR(32, Can_GaaRegs[LpPCController->ucUnit].pICRxFIFO, + CAN_EIC_EIMK_MASK); + /* END Msg(2:2844)-2 */ + /* END Msg(2:2814)-4 */ + /* END Msg(6:3305)-11 */ + /* END Msg(2:0310)-12 */ +#else + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:0751)-5 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_AND(8, + Can_GaaRegs[LpPCController->ucUnit].pICRxFIFO, + (uint8)(~CAN_EIC_EIMK_MASK)); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0751)-5 */ + /* END Msg(2:2844)-2 */ +#endif /* CAN_CR52_PROC */ + } + else + { + /* Nothing to do */ + } +#endif +#if (CAN_CR52_PROC == STD_ON) + /* Enable Channel interrupts */ + /* MISRA Violation: START Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(2:0310)-12 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_OR(32, LpPCController->pICErr, + (uint32)((CAN_EIC_EIMK_MASK_E << (LpPCController->ucCh * ((uint8)3))))); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0310)-12 */ + /* END Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(2:0310)-12 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_OR(32, LpPCController->pICRec, + (uint32)((CAN_EIC_EIMK_MASK_R << (LpPCController->ucCh * ((uint8)3))))); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0310)-12 */ + /* END Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(2:0310)-12 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_OR(32, LpPCController->pICTx, + (uint32)((CAN_EIC_EIMK_MASK_T << (LpPCController->ucCh * ((uint8)3))))); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0310)-12 */ + /* END Msg(6:3305)-11 */ +#else + /* Enable Channel interrupts */ + /* QAC Warning: START Msg(2:2814)-4 */ + /* QAC Warning: START Msg(2:0751)-5 */ + RH850_SV_MODE_ICR_AND(8, LpPCController->pICErr, + (uint8)(~CAN_EIC_EIMK_MASK)); + RH850_SV_MODE_ICR_AND(8, LpPCController->pICRec, + (uint8)(~CAN_EIC_EIMK_MASK)); + RH850_SV_MODE_ICR_AND(8, LpPCController->pICTx, + (uint8)(~CAN_EIC_EIMK_MASK)); + /* END Msg(2:0751)-5 */ + /* END Msg(2:2814)-4 */ +#endif /* CAN_CR52_PROC */ +#if (CAN_WAKEUP_SUPPORT == STD_ON) + /* If waiting wake-up interrupt now, enable it */ + if ((COMMON_STATE_SLEEP == Can_GaaCtrlState[Controller].enMode) && + (CAN_NO_PENDING_TRANSITION == + Can_GaaCtrlState[Controller].enSubState) && + (0U != (LpPCController->ucIntEnable & CAN_CHECK_INT_WAKEUP)) && + (NULL_PTR != LpPCController->pICWakeup)) + { +#if (CAN_CR52_PROC == STD_ON) + /* Set INTPnMSK bit for APPPINTMSKRn */ + /* MISRA Violation: START Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(2:0310)-12 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_OR(32, LpPCController->pICWakeup, + (uint32)((CAN_EIC_EIMK_MASK_W << (LpPCController->ucCh + (LpPCController->ucUnit * ((uint8)8)))))); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0310)-12 */ + /* END Msg(6:3305)-11 */ +#else + /* To modify EIMK flag without affecting EIRF flag, + access the lower 8 bit only */ + /* QAC Warning: START Msg(2:0751)-5 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_AND(8, LpPCController->pICWakeup, + (uint8)(~CAN_EIC_EIMK_MASK)); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0751)-5 */ +#endif /* #if (CAN_CR52_PROC == STD_ON) */ + } + else + { + /* No action is Required */ + } +#endif + /* DummyRead & SYNCP are not required when opening Interrupt Mask. + Because even though there is a pending interrupt, + it should not necessarily be accepted on the next instruction. */ +#else /* For V4H/V4M only */ + LucUnit = LpPCController->ucUnit; + LucCh = LpPCController->ucCh; + /*************************************************************************** + * Enable Controller Error Interrupt * + ***************************************************************************/ + if (CAN_CHECK_INT_BUSOFF == (LpPCController->ucIntEnable & CAN_CHECK_INT_BUSOFF)) + { + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2814)-4 */ + Can_GaaRegs[LucUnit].pCmn->aaChReg[LucCh].ulCTR |= CAN_RSCAN_BOEIE; + /* END Msg(2:2814)-4 */ + /* END Msg(2:2844)-2 */ + } + else + { + /* No action is Required */ + } +#if (CAN_TX_BUFFER == STD_ON) + /************************************************************************** + * Enable transmit message buffer Interrupt * + ***************************************************************************/ + if (CAN_CHECK_INT_TX == (LpPCController->ucIntEnable & CAN_CHECK_INT_TX)) + { + /* Get PBConfig data for this RSCAN(FD) unit */ + /* MISRA Violation: START Msg(2:0316)-1 */ + /* MISRA Violation: START Msg(2:3432)-3 */ + LpHWInfo = (P2CONST(Can_HWUnitInfoType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA)) + Can_GpConfig->pHWUnitInfo; + /* END Msg(2:3432)-3 */ + /* END Msg(2:0316)-1 */ + /* Loop for number of (CFD)TMIECf registers assigned to Controller */ + /* QAC Warning: START Msg(2:2824)-3 */ + LpHWInfo = &LpHWInfo[LucUnit]; + /* END Msg(2:2824)-3 */ + /* Maximum 2 (CFD)TMIECf registers will be assigned to each CAN channel. */ + /* QAC Warning: START Msg(1:3383)-6 */ + LucTMIECIndex = LucCh*2U; + /* END Msg(1:3383)-6 */ + /* QAC Warning: START Msg(1:3383)-6 */ + for (LucCount = LucTMIECIndex; LucCount < (LucTMIECIndex + 2U); LucCount++) + /* END Msg(1:3383)-6 */ + { + /* QAC Warning: START Msg(2:2814)-4 */ + /* QAC Warning: START Msg(2:2824)-3 */ + Can_GaaRegs[LucUnit].pCmn->aaTMIEC[LucCount] |= LpHWInfo->pTMIEC[LucCount]; + /* END Msg(2:2824)-3 */ + /* END Msg(2:2814)-4 */ + } + } + else + { + /* No Action Required */ + } +#endif /* #if (CAN_TX_BUFFER == STD_ON) */ + /******************************************************************* + * Enable transmit history list interrupt * + *******************************************************************/ + if (CAN_RSCAN_THLIE == (CAN_RSCAN_THLIE & LpPCController->ulTHLCC)) + { + Can_GaaRegs[LucUnit].pCmn->aaTHLCC[LucCh] |= CAN_RSCAN_THLIE; + } + else + { + /* No Action Required */ + } + + /*************************************************************************** + * Enable Receive FIFO/COM FIFO Interrupt * + ***************************************************************************/ + /* Scan all HOH objects */ + for (LusHohIndex = 0U; LusHohIndex < Can_GpConfig->usNoOfHohs; LusHohIndex++) + { + LpHoh = &Can_GpHohConfig[LusHohIndex]; + /* QAC Warning: START Msg(2:2814)-4 */ + /* QAC Warning: START Msg(2:2844)-2 */ + if (LpHoh->ucController == Controller) + /* END Msg(2:2844)-2 */ + /* END Msg(2:2814)-4 */ + { + /* Check each HRH object */ + if (CAN_HOH_HRH == LpHoh->enHoh) + { +#if ((CAN_RX_FIFO == STD_ON) || (CAN_RX_COMFIFO == STD_ON)) + /* MISRA Violation: START Msg(2:0715)-15 */ + switch (LpHoh->enBufferType) + { + /* END Msg(2:0715)-15 */ +#if (CAN_RX_FIFO == STD_ON) + case CAN_BUFFERTYPE_RXFIFO: + /* MISRA Violation: START Msg(2:0715)-15 */ + if (CAN_RSCAN_RFIE == (LpHoh->ulXXCCRegValue & CAN_RSCAN_RFIE)) + { + /* END Msg(2:0715)-15 */ + /* Enable Receive FIFO interrupt */ + Can_GaaRegs[LucUnit].pCmn->aaRFCC[LpHoh->usBufferIndex] |= CAN_RSCAN_RFIE; + } + else + { + /* No Action Required */ + } + break; +#endif /* #if (CAN_RX_FIFO == STD_ON) */ +#if (CAN_RX_COMFIFO == STD_ON) + case CAN_BUFFERTYPE_TXRXFIFO: + /* MISRA Violation: START Msg(2:0715)-15 */ + if (CAN_RSCAN_CFRXIE == (LpHoh->ulXXCCRegValue & CAN_RSCAN_CFRXIE)) + { + /* END Msg(2:0715)-15 */ + /* Enable RX COM FIFO interrupt */ + Can_GaaRegs[LucUnit].pCmn->aaCFCC[LpHoh->usBufferIndex] |= CAN_RSCAN_CFRXIE; + } + else + { + /* No Action Required */ + } + break; +#endif /* #if (CAN_RX_COMFIFO == STD_ON) */ + /* Receive buffer and (COM FIFO or TXQ in Gateway mode) + don't enable interrupt, so no action required. */ + /* MISRA Violation: START Msg(2:2016)-12 */ + default: + /* END Msg(2:2016)-12 */ + break; + } /* switch (LpHoh->enBufferType) */ +#endif /* if ((CAN_RX_FIFO == STD_ON) || (CAN_RX_COMFIFO == STD_ON)) */ + } + else + { + /*************************************************************************** + * Enable Transmit Queue/COM FIFO Interrupt * + ***************************************************************************/ + /* Check each HTH object */ +#if ((CAN_TX_COMFIFO == STD_ON) || (CAN_TX_QUEUE == STD_ON)) + /* MISRA Violation: START Msg(2:0715)-15 */ + switch (LpHoh->enBufferType) + { + /* END Msg(2:0715)-15 */ +#if (CAN_TX_COMFIFO == STD_ON) + case CAN_BUFFERTYPE_TXRXFIFO: + if (CAN_RSCAN_CFTXIE == (LpHoh->ulXXCCRegValue & CAN_RSCAN_CFTXIE)) + { + /* Enable TX COM FIFO interrupt */ + Can_GaaRegs[LucUnit].pCmn->aaCFCC[LpHoh->usBufferIndex] |= + CAN_RSCAN_CFTXIE; + } + else + { + /* No Action Required */ + } + break; +#endif /* #if (CAN_TX_COMFIFO == STD_ON) */ +#if (CAN_TX_QUEUE == STD_ON) + case CAN_BUFFERTYPE_TXQUEUE: + if (CAN_RSCAN_TXQTXIE == (LpHoh->ulXXCCRegValue & CAN_RSCAN_TXQTXIE)) + { + LulTxQCh = (uint32)LpHoh->usBufferIndex / CAN_RSCAN_TXQUEUE_PER_CH; + LulTxQIdx = (uint32)LpHoh->usBufferIndex % CAN_RSCAN_TXQUEUE_PER_CH; + /* Enable TX Queue interrupt */ + Can_GaaRegs[LucUnit].pCmn->aaTQueueReg[LulTxQIdx].aaTXQCC[LulTxQCh] |= + CAN_RSCAN_TXQTXIE; + } + else + { + /* No Action Required */ + } + break; +#endif /* #if (CAN_TX_QUEUE == STD_ON) */ + /* MISRA Violation: START Msg(2:2016)-12 */ + default: + /* END Msg(2:2016)-12 */ + break; + } +#endif /* #if ((CAN_TX_COMFIFO == STD_ON) || (CAN_TX_QUEUE == STD_ON)) */ + } + } + else + { + /* No Action Required */ + } + } +#endif /* #if !defined(CAN_V4H_PROC) && !defined(CAN_V4M_PROC) */ + } + } + /* Enable Interruption */ + CAN_EXIT_CRITICAL_SECTION(CAN_INTERRUPT_CONTROL_PROTECTION); + } + else + { + /* Nothing to do */ + } + } +} + +/******************************************************************************* +** Function Name : Can_CheckWakeup +** +** Service ID : 0x0B +** +** Description : This function checks if a wakeup has occurred for the +** given controller. +** +** Sync/Async : Synchronous +** +** Reentrancy : Non-Reentrant +** +** Input Parameters : Controller +** +** InOut Parameters : None +** +** Output Parameters : None +** +** Return parameter : Common_ReturnType (COMMON_OK / COMMON_NOT_OK) +** +** Preconditions : CanWakeupFunctionalityAPI of controllers must be +** configured as true. +** The CAN Driver must be initialized. +** +** Global Variables Used : Can_GaaCtrlState, Can_GpPCController +** +** Functions Invoked : Can_CommonDetCheck, EcuM_SetWakeupEvent +** +** Registers Used : None +** +** Reference ID : CAN_DUD_ACT_011 +** Reference ID : CAN_DUD_ACT_011_GBL001 +*******************************************************************************/ +#if (CAN_CHECK_WAKEUP_API == STD_ON) +/* MISRA Violation: START Msg(1:1503)-5 */ +FUNC(Common_ReturnType, CAN_RSCAN_PUBLIC_CODE) Can_CheckWakeup( + VAR(uint8, AUTOMATIC) Controller) +/* END Msg(1:1503)-5 */ +{ + VAR(Common_ReturnType, AUTOMATIC) LenReturnValue; +#if (CAN_DEV_ERROR_DETECT == STD_ON) + LenReturnValue = + Can_CommonDetCheck(CAN_CHECK_WAKEUP_SID, Controller); + if (COMMON_OK != LenReturnValue) + { + /* Nothing to do */ + } + else +#endif /* (CAN_DEV_ERROR_DETECT == STD_ON) */ + { +#if (CAN_WAKEUP_SUPPORT == STD_ON) + /* QAC Warning: START Msg(2:2844)-2 */ + /* Check, if the wakeup status is set */ + if (CAN_TRUE == Can_GaaCtrlState[Controller].blWakeupEventOccurred) + /* END Msg(2:2844)-2 */ + { + /* Clear event flag */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaCtrlState[Controller].blWakeupEventOccurred = CAN_FALSE; + /* END Msg(2:2844)-2 */ + /* Invoke the EcuM Set Wakeup API*/ + EcuM_SetWakeupEvent((EcuM_WakeupSourceType)(CAN_ONE << Can_GpPCController[Controller].ulWakeupSourceId)); + LenReturnValue = COMMON_OK; + } + else +#endif /* (CAN_WAKEUP_SUPPORT == STD_ON) */ + { + /* Set LenReturnValue to COMMON_NOT_OK */ + LenReturnValue = COMMON_NOT_OK; + } + } +#if ((CAN_WAKEUP_SUPPORT == STD_OFF) && (CAN_DEV_ERROR_DETECT == STD_OFF)) + /* Avoid compiler warning for arm core */ + (void) Controller; +#endif + /* returning the development error occurred */ + return(LenReturnValue); +} +#endif /* (CAN_CHECK_WAKEUP_API == STD_ON) */ + +/******************************************************************************* +** Function Name : Can_GetControllerTxErrorCounter +** +** Service ID : 0x31 +** +** Description : Returns the Tx error counter for a CAN controller. +** This value might not be available for all CAN controllers, +** in which case E_NOT_OK would be returned. +** Please note that the value of the counter might not be +** correct at the moment the API returns it, because the +** Tx counter is handled asynchronously in hardware. +** Applications should not trust this value for any +** assumption about the current bus state. +** +** Sync/Async : Synchronous +** +** Reentrancy : Non Reentrant for the same ControllerId +** +** Input Parameters : ControllerId : CAN controller, whose current +** Tx error counter shall be acquired. +** +** InOut Parameters : None +** +** Output Parameters : TxErrorCounterPtr : Pointer to a memory location, +** where the current Tx error counter of the CAN controller +** will be stored. +** +** Return parameter : Std_ReturnType +** E_OK: Tx error counter available. +** E_NOT_OK: Wrong ControllerId, or Tx error counter not available. +** +** Preconditions : None +** +** Global Variables Used : Can_GblInitialized, Can_GpConfig, Can_GpPCController, +** Can_GaaRegs +** +** Functions Invoked : Can_CommonDetCheck, Det_ReportError +** +** Registers Used : CFDCnSTS +** +** Reference ID : CAN_DUD_ACT_061 +** Reference ID : CAN_DUD_ACT_061_ERR001 +*******************************************************************************/ +#if (CAN_AR_VERSION == CAN_AR_1911_VERSION) +/* MISRA Violation: START Msg(1:1503)-5 */ +/* MISRA Violation: START Msg(2:3432)-3 */ +FUNC(Std_ReturnType, CAN_RSCAN_PUBLIC_CODE) Can_GetControllerTxErrorCounter( + VAR(uint8, AUTOMATIC) ControllerId, + P2VAR(uint8, AUTOMATIC, CAN_RSCAN_APPL_DATA) TxErrorCounterPtr) +/* END Msg(2:3432)-3 */ +/* END Msg(1:1503)-5 */ +{ + VAR(Std_ReturnType, AUTOMATIC) LenReturnValue; + VAR(uint8, AUTOMATIC) LucUnit; + VAR(uint8, AUTOMATIC) LucCh; + +#if (CAN_DEV_ERROR_DETECT == STD_ON) + LenReturnValue = + Can_CommonDetCheck(CAN_GET_CONTROLLER_TXERROR_COUNTER_SID, ControllerId); + if (E_OK!= LenReturnValue) + { + /* Nothing to do */ + } + else if(NULL_PTR == TxErrorCounterPtr) + { + /* SWS_Can_00514 */ + (void)Det_ReportError(CAN_MODULE_ID, CAN_INSTANCE_ID, + CAN_GET_CONTROLLER_TXERROR_COUNTER_SID, CAN_E_PARAM_POINTER); + LenReturnValue = E_NOT_OK; + } + else +#endif /* (CAN_DEV_ERROR_DETECT == STD_ON) */ + { + LucUnit = Can_GpPCController[ControllerId].ucUnit; + LucCh = Can_GpPCController[ControllerId].ucCh; + /* SWS_Can_00515 */ + /* Read Tx Error counter from CFDCnSTS register */ + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2814)-4 */ + *TxErrorCounterPtr = (uint8)((Can_GaaRegs[LucUnit].pCmn->aaChReg[LucCh].ulSTS + & CAN_RSCAN_TEC_MASK) >> CAN_RSCAN_TEC_OFFSET); + /* END Msg(2:2814)-4 */ + /* END Msg(2:2844)-2 */ + /* Init return value */ + LenReturnValue = E_OK; + } + /* return final value */ + return(LenReturnValue); +} +#endif +/******************************************************************************* +** Function Name : Can_GetControllerRxErrorCounter +** +** Service ID : 0x30 +** +** Description : Returns the Rx error counter for a CAN controller. +** This value might not be available for all CAN controllers, +** in which case E_NOT_OK would be returned. +** Please note that the value of the counter might not be +** correct at the moment the API returns it, because the +** Rx counter is handled asynchronously in hardware. +** Applications should not trust this value for any +** assumption about the current bus state. +** +** Sync/Async : Synchronous +** +** Reentrancy : Non Reentrant for the same ControllerId +** +** Input Parameters : ControllerId : CAN controller, whose current +** Rx error counter shall be acquired. +** +** InOut Parameters : None +** +** Output Parameters : RxErrorCounterPtr : Pointer to a memory location, +** where the current Rx error counter of the CAN controller +** will be stored. +** +** Return parameter : Std_ReturnType +** E_OK: Rx error counter available. +** E_NOT_OK: Wrong ControllerId, or Rx error counter not available. +** +** Preconditions : None +** +** Global Variables Used : Can_GblInitialized, Can_GpConfig, Can_GpPCController, +** Can_GaaRegs +** +** Functions Invoked : Can_CommonDetCheck, Det_ReportError +** +** Registers Used : CFDCnSTS +** +** Reference ID : CAN_DUD_ACT_062 +** Reference ID : CAN_DUD_ACT_062_ERR001 +*******************************************************************************/ +#if (CAN_AR_VERSION == CAN_AR_1911_VERSION) +/* MISRA Violation: START Msg(1:1503)-5 */ +/* MISRA Violation: START Msg(2:3432)-3 */ +FUNC(Std_ReturnType, CAN_RSCAN_PUBLIC_CODE) Can_GetControllerRxErrorCounter( + VAR(uint8, AUTOMATIC) ControllerId, + P2VAR(uint8, AUTOMATIC, CAN_RSCAN_APPL_DATA) RxErrorCounterPtr) +/* END Msg(2:3432)-3 */ +/* END Msg(1:1503)-5 */ +{ + VAR(Std_ReturnType, AUTOMATIC) LenReturnValue; + VAR(uint8, AUTOMATIC) LucUnit; + VAR(uint8, AUTOMATIC) LucCh; + +#if (CAN_DEV_ERROR_DETECT == STD_ON) + LenReturnValue = + Can_CommonDetCheck(CAN_GET_CONTROLLER_RXERROR_COUNTER_SID, ControllerId); + if (E_OK!= LenReturnValue) + { + /* Nothing to do */ + } + else if(NULL_PTR == RxErrorCounterPtr) + { + /* SWS_Can_00514 */ + (void)Det_ReportError(CAN_MODULE_ID, CAN_INSTANCE_ID, + CAN_GET_CONTROLLER_RXERROR_COUNTER_SID, CAN_E_PARAM_POINTER); + LenReturnValue = E_NOT_OK; + } + else +#endif /* (CAN_DEV_ERROR_DETECT == STD_ON) */ + { + LucUnit = Can_GpPCController[ControllerId].ucUnit; + LucCh = Can_GpPCController[ControllerId].ucCh; + /* SWS_Can_00515 */ + /* Read Rx Error counter from CFDCnSTS register */ + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2814)-4 */ + *RxErrorCounterPtr = (uint8)((Can_GaaRegs[LucUnit].pCmn->aaChReg[LucCh].ulSTS + & CAN_RSCAN_REC_MASK) >> CAN_RSCAN_REC_OFFSET); + /* END Msg(2:2814)-4 */ + /* END Msg(2:2844)-2 */ + /* Init return value */ + LenReturnValue = E_OK; + } + /* return final value */ + return(LenReturnValue); +} +#endif + +#define CAN_RSCAN_STOP_SEC_PUBLIC_CODE +/* MISRA Violation: START Msg(4:5087)-4 */ +#include "Can_MemMap.h" +/* END Msg(4:5087)-4 */ + + +#define CAN_RSCAN_START_SEC_PRIVATE_CODE +/* MISRA Violation: START Msg(4:5087)-4 */ +#include "Can_MemMap.h" +/* END Msg(4:5087)-4 */ + +/******************************************************************************* +** Function Name : Can_SetStatus +** +** Service ID : Not Applicable +** +** Description : This function updates Can_GblInitialized. +** The puporse of this function is to prevent the order of +** instructions being changed by the compiler. +** +** Sync/Async : Synchronous +** +** Reentrancy : Non-Reentrant +** +** Input Parameters : LblStatus: New status value +** +** InOut Parameters : None +** +** Output Parameters : None +** +** Return parameter : None +** +** Preconditions : Can_GpConfig must be initialized. +** +** Global Variable : Can_GblInitialized +** +** Function invoked : None +** +** Registers Used : None +** +** Reference ID : CAN_DUD_ACT_045 +** Reference ID : CAN_DUD_ACT_045_GBL001 +*******************************************************************************/ +STATIC FUNC(void, CAN_RSCAN_PRIVATE_CODE) Can_SetStatus( + CONST(boolean, AUTOMATIC) LblStatus) +{ + Can_GblInitialized = LblStatus; +} + +/******************************************************************************* +** Function Name : Can_InitModule +** +** Service ID : Not applicable +** +** Description : Initialize RSCANn module. +** After this function, module becomes GLOBAL_RESET. +** +** Sync/Async : Synchronous +** +** Reentrancy : Non-Reentrant +** +** Input Parameters : LucUnit : Index of Can_GaaRegs for the target unit +** +** InOut Parameters : None +** +** Output Parameters : None +** +** Return parameter : When any error occurred CAN_TRUE, otherwise CAN_FALSE +** +** Preconditions : Can_GpConfig must be initialized +** +** Global Variables Used : Can_GpConfig, Can_GaaRegs +** +** Functions Invoked : CAN_DEM_REPORT_ERROR, Can_WaitRegisterChange, +** Can_GlobalModeChange +** +** Registers Used : (CFD)GSTS, CFDGRMCFG, CFDGFDCFG, (CFD)RMNB, +** (CFD)GAFLCFG, (CFD)GCFG, (CFD)TMIECy, +** (CFD)GAFLECTR, (CFD)GAFLIDj, (CFD)GAFLMj, +** (CFD)GAFLP0_j, (CFD)GAFLP1_j, +** EIC registers [E2M, E2H, E2UH, U2A16, U2A8, S4_G4MH, +** S4_CR52] +** +** (CFD)GSTS, CFDGRMCFG, CFDGFDCFG, (CFD)RMNB, +** (CFD)GAFLCFG, (CFD)GCFG, +** (CFD)GAFLECTR, (CFD)GAFLIDr, (CFD)GAFLMr, +** (CFD)GAFLP0r, (CFD)GAFLP1r, +** EIC registers [S4_G4MH, S4_CR52, V4H, V4M] +** RSCFDnCFDGFFIMC, RSCFDnVMRFCFG, RSCFDnVMCFGn +** +** Reference ID : CAN_DUD_ACT_026 +** Reference ID : CAN_DUD_ACT_026_ERR001, CAN_DUD_ACT_026_ERR002, +** Reference ID : CAN_DUD_ACT_026_REG001, CAN_DUD_ACT_026_REG002, +** Reference ID : CAN_DUD_ACT_026_REG003, CAN_DUD_ACT_026_REG004, +** Reference ID : CAN_DUD_ACT_026_REG006, +** Reference ID : CAN_DUD_ACT_026_REG007, CAN_DUD_ACT_026_REG008, +** Reference ID : CAN_DUD_ACT_026_REG009, CAN_DUD_ACT_026_REG010, +** Reference ID : CAN_DUD_ACT_026_REG011, CAN_DUD_ACT_026_REG012, +** Reference ID : CAN_DUD_ACT_026_REG013, CAN_DUD_ACT_026_REG014, +** Reference ID : CAN_DUD_ACT_026_REG015, CAN_DUD_ACT_026_REG016, +** Reference ID : CAN_DUD_ACT_026_REG017, CAN_DUD_ACT_026_REG018, +** Reference ID : CAN_DUD_ACT_026_REG019, CAN_DUD_ACT_026_REG020 +*******************************************************************************/ +#if (CAN_ACCESS_HW_ENABLE == STD_ON) +STATIC FUNC(boolean, CAN_RSCAN_PRIVATE_CODE) Can_InitModule( + CONST(uint8, AUTOMATIC) LucUnit) +{ + VAR(boolean, AUTOMATIC) LblErrFlag; + VAR(uint32, AUTOMATIC) LulTimeoutDuration; + VAR(Std_ReturnType, AUTOMATIC) LucTimeoutResult; + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(Can_HWUnitInfoType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA) LpHWInfo; + /* END Msg(2:3432)-3 */ + VAR(uint32, AUTOMATIC) LulCount; +#if ((CAN_RX_OBJECT == STD_ON) || (CAN_GATEWAY_COMFIFO == STD_ON) || \ + (CAN_GATEWAY_QUEUE == STD_ON)) + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(Can_FilterType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA) LpFilter; + /* END Msg(2:3432)-3 */ + VAR(uint32, AUTOMATIC) LulRulePage; + VAR(uint32, AUTOMATIC) LulRuleIndex; +#endif + + /* Get PBConfig data for this RSCAN(FD) unit */ + /* MISRA Violation: START Msg(2:0316)-1 */ + /* MISRA Violation: START Msg(2:3432)-3 */ + LpHWInfo = + (P2CONST(Can_HWUnitInfoType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA)) + Can_GpConfig->pHWUnitInfo; + /* END Msg(2:3432)-3 */ + /* END Msg(2:0316)-1 */ + /* QAC Warning: START Msg(2:2824)-3 */ + LpHWInfo = &LpHWInfo[LucUnit]; + /* END Msg(2:2824)-3 */ + + /* Wait until GRAMINIT flag is set */ + LulTimeoutDuration = CAN_TIMEOUT_COUNT; + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2814)-4 */ + LucTimeoutResult = Can_WaitRegisterChange( + &Can_GaaRegs[LucUnit].pCmn->ulGSTS, + CAN_RSCAN_GRAMINIT, 0UL, &LulTimeoutDuration); + /* END Msg(2:2814)-4 */ + /* END Msg(2:2844)-2 */ + /* If GRAMINIT flag was not set, report error */ + if (E_OK != LucTimeoutResult) + { +#if defined(CAN_E_TIMEOUT_FAILURE) + CAN_DEM_REPORT_ERROR(CAN_E_TIMEOUT_FAILURE, DEM_EVENT_STATUS_FAILED); +#endif + LblErrFlag = CAN_TRUE; + } + else + { + /*********************************************************************** + * ENTER GLOBAL_RESET MODE * + ***********************************************************************/ + /* Change to GLOBAL_RESET mode */ + LulTimeoutDuration = CAN_TIMEOUT_COUNT; + LucTimeoutResult = Can_GlobalModeChange(LucUnit, + CAN_RSCAN_GMDC_RESET, &LulTimeoutDuration); + /* If mode changed was not finished, report error */ + if (E_OK != LucTimeoutResult) + { +#if defined(CAN_E_TIMEOUT_FAILURE) + CAN_DEM_REPORT_ERROR(CAN_E_TIMEOUT_FAILURE, DEM_EVENT_STATUS_FAILED); +#endif + LblErrFlag = CAN_TRUE; + } + else + { +#if ((CAN_RSCAN_CONFIGURED == STD_ON) && (CAN_RSCANFD_CONFIGURED == STD_ON)) + if (CAN_MACRO_RSCANFD == Can_GaaRegs[LucUnit].enMacroType) +#endif + { +#if (CAN_RSCANFD_CONFIGURED == STD_ON) +#if (CAN_INTERFACE_MODE_SELECTION_LOCATION == GRMCFG_REG) + /* Set RCMC bit to activate RSCANFD with CANFD mode */ + Can_GaaRegs[LucUnit].pCmn->ulGRMCFG = CAN_RSCAN_RCMC; +#endif + /* Fix TSCCFG=0 and RPED=0, these functions are not used in MCAL */ + Can_GaaRegs[LucUnit].pCmn->ulGFDCFG = CAN_RSCAN_GFDCFG_DEFAULT; +#endif + } +#if ((CAN_RSCAN_CONFIGURED == STD_ON) && (CAN_RSCANFD_CONFIGURED == STD_ON)) + else +#endif + { + /* Nothing to do */ + } + /*********************************************************************** + * INITIALIZATION OF BUFFER SETTINGS * + ***********************************************************************/ + /* Set payload size and buffer number of RxBuffer */ + /* QAC Warning: START Msg(2:2814)-4 */ + Can_GaaRegs[LucUnit].pCmn->ulRMNB = LpHWInfo->ulRMNB; + /* END Msg(2:2814)-4 */ + /* Set the value of global configuration register */ + Can_GaaRegs[LucUnit].pCmn->ulGCFG = LpHWInfo->ulGCFG; + /*********************************************************************** + * INITIALIZATION OF ACCEPTANCE FILTER LIST * + ************************************************************************/ + /* Set number of receive rules */ + for (LulCount = 0U; + LulCount < (uint32)LpHWInfo->ucNoOfGAFLCFG; LulCount++) + { + /* QAC Warning: START Msg(2:2824)-3 */ + Can_GaaRegs[LucUnit].pCmn->aaGAFLCFG[LulCount] = + LpHWInfo->pGAFLCFG[LulCount]; + /* END Msg(2:2824)-3 */ + } +#if ((CAN_RX_OBJECT == STD_ON) || (CAN_GATEWAY_COMFIFO == STD_ON) || \ + (CAN_GATEWAY_QUEUE == STD_ON)) + LulCount = 0U; + LulRulePage = 0U; + /* Set all receive rules to the receive filter registers */ + while (LulCount < (uint32)LpHWInfo->usNoOfFilters) + { + /* Set page index for each 16 rules */ + /* MISRA Violation: START Msg(2:3469)-9 */ + Can_GaaRegs[LucUnit].pCmn->ulGAFLECTR = + CAN_RSCAN_AFLDAE | CAN_RSCAN_AFLPN(LulRulePage); + /* END Msg(2:3469)-9 */ + + LulRuleIndex = 0U; + /* Set up to 16 rules to the receive filter registers in this page */ + while (((uint32)CAN_RSCAN_RULES_PER_PAGE > LulRuleIndex) && + (LulCount < (uint32)LpHWInfo->usNoOfFilters)) + { + /* QAC Warning: START Msg(2:2824)-3 */ + LpFilter = &LpHWInfo->pFilterConfig[LulCount]; + /* END Msg(2:2824)-3 */ + /* QAC Warning: START Msg(2:2824)-3 */ + /* QAC Warning: START Msg(2:2814)-4 */ + Can_GaaRegs[LucUnit].pRR[LulRuleIndex].ulGAFLID = + LpFilter->ulGAFLID; + Can_GaaRegs[LucUnit].pRR[LulRuleIndex].ulGAFLM = + LpFilter->ulGAFLM; + Can_GaaRegs[LucUnit].pRR[LulRuleIndex].aaGAFLP[CAN_RSCAN_GAFLP_PAGE0] + = LpFilter->aaGAFLP[CAN_RSCAN_GAFLP_PAGE0]; + Can_GaaRegs[LucUnit].pRR[LulRuleIndex].aaGAFLP[CAN_RSCAN_GAFLP_PAGE1] + = LpFilter->aaGAFLP[CAN_RSCAN_GAFLP_PAGE1]; + /* END Msg(2:2814)-4 */ + /* END Msg(2:2824)-3 */ + LulRuleIndex++; + LulCount++; + } + /* Increment page */ + /* QAC Warning: START Msg(1:3383)-6 */ + LulRulePage++; + /* END Msg(1:3383)-6 */ + } + /* Write disabling the Acceptance Filter List*/ + Can_GaaRegs[LucUnit].pCmn->ulGAFLECTR = CAN_RSCAN_AFLDAE_OFF; + /*********************************************************************** + * INITIALIZATION OF GLOBAL INTERRUPTION * + ************************************************************************/ +#if ((CAN_RSCAN0_RXFIFO_INTERRUPT == STD_ON) || \ + (CAN_RSCAN1_RXFIFO_INTERRUPT == STD_ON)) + /* Enable RxFIFO interrupt */ +#if !defined(CAN_V4H_PROC) && !defined(CAN_V4M_PROC) +#if (CAN_CR52_PROC == STD_ON) + /* MISRA Violation: START Msg(2:0310)-12 */ + /* MISRA Violation: START Msg(6:3305)-11 */ + RH850_SV_MODE_ICR_OR(32, Can_GaaRegs[LucUnit].pICRxFIFO, + CAN_EIC_EIMK_MASK); + /* END Msg(6:3305)-11 */ + /* END Msg(2:0310)-12 */ +#else + /* QAC Warning: START Msg(2:0751)-5 */ + RH850_SV_MODE_ICR_AND(8, Can_GaaRegs[LucUnit].pICRxFIFO, + (uint8)(~CAN_EIC_EIMK_MASK)); + /* END Msg(2:0751)-5 */ +#endif /* CAN_CR52_PROC */ + /* DummyRead & SYNCP */ + RH850_SV_MODE_REG_READ_ONLY(16, Can_GaaRegs[LucUnit].pICRxFIFO); + /* MISRA Violation: START Msg(2:1006)-16 */ + EXECUTE_SYNCP(); + /* END Msg(2:1006)-16 */ +#endif /* #if !defined(CAN_V4H_PROC) && !defined(CAN_V4M_PROC) */ +#endif +#endif /* #if ((CAN_RX_OBJECT == STD_ON) || (CAN_GATEWAY_COMFIFO == STD_ON)) */ + /*********************************************************************** + * INITIALIZATION OF GLOBAL VIRTUAL MACHINE * + ************************************************************************/ +#if (CAN_VIRTUAL_MACHINE_ENABLE == STD_ON) + if(CAN_TRUE == LpHWInfo->blFFIModeEnable) + { + /* Enable FFI mode for VM ISR */ + Can_GaaRegs[LucUnit].pCmn->ulGFFIMC = (uint32)(CAN_CFDGFFIMC_FFIEN | CAN_CFDGFFIMC_KEY); + /* Setting target Virtual Manchien channel for Rx FIFO */ + Can_GaaRegs[LucUnit].pCmn->ulVMRFCFG = LpHWInfo->ulVMRFCFG; + /* Setting target Virtual Manchine channel for TxFX FIFO and Tx Queue */ + for (LulCount = 0UL; LulCount < CAN_MAX_NO_VM_CH; LulCount++) + { + /* QAC Warning: START Msg(2:2824)-3 */ + Can_GaaRegs[LucUnit].pCmn->aaVMCFGn[LulCount] = LpHWInfo->pVMCFGn[LulCount]; + /* END Msg(2:2824)-3 */ + } + } + else + { + /* Disable FFI mode */ + Can_GaaRegs[LucUnit].pCmn->ulGFFIMC = (uint32)CAN_CFDGFFIMC_KEY; + /* Reset target Virtual Manchien channel for Rx FIFO */ + Can_GaaRegs[LucUnit].pCmn->ulVMRFCFG = CAN_VMN_INVALID; + /* Reset target Virtual Manchien channel for TxFX FIFO and Tx Queue */ + for (LulCount = 0UL; LulCount < CAN_MAX_NO_VM_CH; LulCount++) + { + Can_GaaRegs[LucUnit].pCmn->aaVMCFGn[LulCount] = CAN_VMN_INVALID; + } + } + /*********************************************************************** + * INITIALIZATION OF GLOBAL VIRTUAL MACHINE INTERRUPTION * + ************************************************************************/ + if(CAN_TRUE == LpHWInfo->blFFIModeEnable) + { + /**** Enable Virtual Machine APPLINTMSKR11-RSCAN00/APPLINTMSKR12-RSCAN01 interrupt */ + /* QAC Warning: START Msg(2:0751)-5 */ + /* Tx and Rx interrupt */ + /* MISRA Violation: START Msg(2:0310)-12 */ + /* MISRA Violation: START Msg(6:3305)-11 */ + RH850_SV_MODE_ICR_OR(32, Can_GaaRegs[LucUnit].pIn2AppTxRxVMInt, LpHWInfo->ulInt2AppVMIntMaskValue); + /* END Msg(6:3305)-11 */ + /* END Msg(2:0310)-12 */ + /**** Setting interrupt register EIC ****/ + for (LulCount = 0UL; LulCount < CAN_MAX_NO_VM_CH; LulCount++) + { + /* Enable Virtual Machine EIC TX interrupt (EIC720-RSCAN00/EIC744-RSCAN01)*/ + /* MISRA Violation: START Msg(2:0303)-14 */ + /* QAC Warning: START Msg(2:0751)-5 */ + /* MISRA Violation: START Msg(2:0488)-13 */ + /* QAC Warning: START Msg(2:3464)-6 */ + RH850_SV_MODE_ICR_AND(8, &Can_GaaRegs[LucUnit].pICTxVMInt[LulCount], + /* END Msg(2:3464)-6 */ + /* shift to LulCount get channel mask respectively + shift to 7 to get the interrup mask EIMKn */ + (uint8)(~((((uint32)LpHWInfo->ucEicVMTxIntMaskValue >> LulCount) << 7UL) & CAN_EIC_EIMK_MASK))); + /* END Msg(2:0488)-13 */ + /* END Msg(2:0751)-5 */ + /* END Msg(2:0303)-14 */ + /* Enable Virtual Machine EIC RX interrupt */ + /* MISRA Violation: START Msg(2:0303)-14 */ + /* QAC Warning: START Msg(2:0751)-5 */ + /* MISRA Violation: START Msg(2:0488)-13 */ + /* QAC Warning: START Msg(2:3464)-6 */ + RH850_SV_MODE_ICR_AND(8, &Can_GaaRegs[LucUnit].pICRxVMInt[LulCount], + /* END Msg(2:3464)-6 */ + /* shift to LulCount get channel mask respectively + shift to 7 to get the interrup mask EIMKn */ + (uint8)(~((((uint32)LpHWInfo->ucEicVMRxIntMaskValue >> LulCount) << 7UL) & CAN_EIC_EIMK_MASK))); + /* END Msg(2:0488)-13 */ + /* END Msg(2:0751)-5 */ + /* END Msg(2:0303)-14 */ + } + /* DummyRead & SYNCP for G4MH core only */ +#if (CAN_CR52_PROC == STD_OFF) + RH850_SV_MODE_REG_READ_ONLY(16, Can_GaaRegs[LucUnit].pICRxVMInt); + /* MISRA Violation: START Msg(2:1006)-16 */ + EXECUTE_SYNCP(); + /* END Msg(2:1006)-16 */ +#endif /* #if (CAN_CR52_PROC == STD_ON) */ + } + else + { + /* do nothing */ + } +#endif /* #if (CAN_VIRTUAL_MACHINE_ENABLE == STD_ON) */ + /*********************************************************************** + * INITIALIZATION OF ECC safety mechanism * + ************************************************************************/ +#if defined(CAN_V4H_PROC) || defined(CAN_V4M_PROC) +#if (CAN_ECC_ERROR_CORRECT == STD_ON) + /* Set ECC control register */ + /* + + Set bit 15, 14 to 2B'01 (ECERVF write enable). + + Set bit 6 to 1 (error judgement enabled). + + Set bit 4 to 1 (2 bit error detection enabled). + + Set bit 3 to 1 (1 bit error detection enabled). + + Keep the initial value of bit 5 of EC710CTL to enable ECC. + */ + *Can_GaaRegs[LucUnit].pEC710CTLReg = CAN_RSCAN_EC710CTL_EN; +#endif +#endif /* #if !defined(CAN_V4H_PROC) && !defined(CAN_V4M_PROC) */ + LblErrFlag = CAN_FALSE; + } + } + return LblErrFlag; +} +#endif /* #if (CAN_ACCESS_HW_ENABLE == STD_ON) */ +/******************************************************************************* +** Function Name : Can_DeInitModule +** +** Service ID : Not applicable +** +** Description : De-initialize RSCANn module. +** +** Sync/Async : Synchronous +** +** Reentrancy : Non-Reentrant +** +** Input Parameters : LucUnit : Index of Can_GaaRegs for the target unit +** +** InOut Parameters : None +** +** Output Parameters : None +** +** Return parameter : When any error occurred CAN_TRUE, otherwise CAN_FALSE +** +** Preconditions : Can_GpConfig must be initialized. +** +** Global Variables Used : Can_GpConfig, Can_GaaRegs +** +** Functions Invoked : Can_GlobalModeChange, CAN_DEM_REPORT_ERROR +** +** Registers Used : EIC registers, CFDGAFLECTR, +** CFDGAFLIDj, CFDGAFLMj, CFDGAFLP0j, CFDGAFLP1j, +** CFDRMNB, CFDGCFG, CFDTMIECy, (CFD)GRMCFG, CFDGFDCFG [U2A16, U2A8] +** +** EIC registers, CFDGAFLECTR, +** CFDGAFLIDr, CFDGAFLMr, CFDGAFLP0r, CFDGAFLP1r, +** CFDRMNB, CFDGCFG, CFDTMIECf, (CFD)GRMCFG, CFDGFDCFG [S4_G4MH, S4_CR52, V4H, V4M] +** +** Reference ID : CAN_DUD_ACT_034 +** Reference ID : CAN_DUD_ACT_034_ERR001, CAN_DUD_ACT_034_REG001, +** Reference ID : CAN_DUD_ACT_034_REG002, CAN_DUD_ACT_034_REG003, +** Reference ID : CAN_DUD_ACT_034_REG004, CAN_DUD_ACT_034_REG005, +** Reference ID : CAN_DUD_ACT_034_REG006, CAN_DUD_ACT_034_REG007, +** Reference ID : CAN_DUD_ACT_034_REG008, CAN_DUD_ACT_034_REG009, +** Reference ID : CAN_DUD_ACT_034_REG010, CAN_DUD_ACT_034_REG011, +** Reference ID : CAN_DUD_ACT_034_REG012, CAN_DUD_ACT_034_REG013 +*******************************************************************************/ +#if ((CAN_AR_VERSION == CAN_AR_431_VERSION) \ + ||(CAN_AR_VERSION == CAN_AR_1911_VERSION)) +STATIC FUNC(boolean, CAN_RSCAN_PRIVATE_CODE) Can_DeInitModule( + CONST(uint8, AUTOMATIC) LucUnit) +{ + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(Can_HWUnitInfoType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA) LpHWInfo; + /* END Msg(2:3432)-3 */ + VAR(uint32, AUTOMATIC) LulCount; + VAR(boolean, AUTOMATIC) LblErrFlag; + VAR(uint32, AUTOMATIC) LulTimeoutDuration; + VAR(Std_ReturnType, AUTOMATIC) LucTimeoutResult; +#if ((CAN_RX_OBJECT == STD_ON) || (CAN_GATEWAY_COMFIFO == STD_ON) || \ + (CAN_GATEWAY_QUEUE == STD_ON)) + VAR(uint32, AUTOMATIC) LulRulePage; + VAR(uint32, AUTOMATIC) LulRuleIndex; +#endif + + LblErrFlag = CAN_FALSE; + /* Get PBConfig data for this RSCAN(FD) unit */ + /* MISRA Violation: START Msg(2:0316)-1 */ + /* MISRA Violation: START Msg(2:3432)-3 */ + LpHWInfo = + (P2CONST(Can_HWUnitInfoType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA)) + Can_GpConfig->pHWUnitInfo; + /* END Msg(2:3432)-3 */ + /* END Msg(2:0316)-1 */ + /* QAC Warning: START Msg(2:2824)-3 */ + LpHWInfo = &LpHWInfo[LucUnit]; + /* END Msg(2:2824)-3 */ + +#if ((CAN_RX_OBJECT == STD_ON) || (CAN_GATEWAY_COMFIFO == STD_ON) || \ + (CAN_GATEWAY_QUEUE == STD_ON)) + /***************************************************************************** + * DE-INITIALIZATION OF GLOBAL INTERRUPTION * + *****************************************************************************/ +#if ((CAN_RSCAN0_RXFIFO_INTERRUPT == STD_ON) || \ + (CAN_RSCAN1_RXFIFO_INTERRUPT == STD_ON)) + /* Disable RxFIFO interrupt */ +#if !defined(CAN_V4H_PROC) && !defined(CAN_V4M_PROC) +#if (CAN_CR52_PROC == STD_ON) + /* MISRA Violation: START Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(2:0310)-12 */ + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_AND(32, + Can_GaaRegs[LucUnit].pICRxFIFO, + (uint32)(~CAN_EIC_EIMK_MASK)); + /* END Msg(2:2814)-4 */ + /* END Msg(2:2844)-2 */ + /* END Msg(2:0310)-12 */ + /* END Msg(6:3305)-11 */ +#else + /* QAC Warning: START Msg(2:0751)-5 */ + /* QAC Warning: START Msg(2:2814)-4 */ + /* QAC Warning: START Msg(2:2844)-2 */ + RH850_SV_MODE_ICR_OR(8, Can_GaaRegs[LucUnit].pICRxFIFO, CAN_EIC_EIMK_MASK); + /* END Msg(2:2844)-2 */ + /* END Msg(2:2814)-4 */ + /* END Msg(2:0751)-5 */ +#endif /* CAN_CR52_PROC */ + /* DummyRead & SYNCP */ + RH850_SV_MODE_REG_READ_ONLY(16, Can_GaaRegs[LucUnit].pICRxFIFO); + /* MISRA Violation: START Msg(2:1006)-16 */ + EXECUTE_SYNCP(); + /* END Msg(2:1006)-16 */ +#endif /* #if !defined(CAN_V4H_PROC) && !defined(CAN_V4M_PROC) */ +#endif + + /***************************************************************************** + * DE-INITIALIZATION OF ACCEPTANCE FILTER LIST * + *****************************************************************************/ + LulCount = 0U; + LulRulePage = 0U; + /* QAC Warning: START Msg(2:2814)-4 */ + /* Reset all receive rules to the receive filter registers */ + while (LulCount < (uint32)LpHWInfo->usNoOfFilters) + /* END Msg(2:2814)-4 */ + { + /* Set page index for each 16 rules */ + /* MISRA Violation: START Msg(2:3469)-9 */ + /* QAC Warning: START Msg(2:2814)-4 */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaRegs[LucUnit].pCmn->ulGAFLECTR = + CAN_RSCAN_AFLDAE | CAN_RSCAN_AFLPN(LulRulePage); + /* END Msg(2:2844)-2 */ + /* END Msg(2:2814)-4 */ + /* END Msg(2:3469)-9 */ + + LulRuleIndex = 0U; + /* Reset 16 rules of the receive filter registers in this page */ + while (((uint32)CAN_RSCAN_RULES_PER_PAGE > LulRuleIndex) && + (LulCount < (uint32)LpHWInfo->usNoOfFilters)) + { + /* QAC Warning: START Msg(2:2824)-3 */ + Can_GaaRegs[LucUnit].pRR[LulRuleIndex].ulGAFLID = + CAN_RSCAN_GAFLID_DEFAULT; + Can_GaaRegs[LucUnit].pRR[LulRuleIndex].ulGAFLM = + CAN_RSCAN_GAFLM_DEFAULT; + Can_GaaRegs[LucUnit].pRR[LulRuleIndex].aaGAFLP[CAN_RSCAN_GAFLP_PAGE0] = + CAN_RSCAN_GAFLP0_DEFAULT; + Can_GaaRegs[LucUnit].pRR[LulRuleIndex].aaGAFLP[CAN_RSCAN_GAFLP_PAGE1] = + CAN_RSCAN_GAFLP1_DEFAULT; + /* END Msg(2:2824)-3 */ + LulRuleIndex++; + LulCount++; + } + /* Increment page */ + /* QAC Warning: START Msg(1:3383)-6 */ + LulRulePage++; + /* END Msg(1:3383)-6 */ + } + /* Write disabling the Acceptance Filter List*/ + Can_GaaRegs[LucUnit].pCmn->ulGAFLECTR = CAN_RSCAN_AFLDAE_OFF; +#endif /* #if ((CAN_RX_OBJECT == STD_ON) || (CAN_GATEWAY_COMFIFO == STD_ON)) */ + + /* Reset number of receive rules */ + /* QAC Warning: START Msg(2:2814)-4 */ + for (LulCount = 0U; + LulCount < (uint32)LpHWInfo->ucNoOfGAFLCFG; LulCount++) + /* END Msg(2:2814)-4 */ + { + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2814)-4 */ + Can_GaaRegs[LucUnit].pCmn->aaGAFLCFG[LulCount] = + CAN_RSCAN_GAFLCFG_DEFAULT; + /* END Msg(2:2814)-4 */ + /* END Msg(2:2844)-2 */ + } + + /***************************************************************************** + * DE-INITIALIZATION OF BUFFER REGISTERS * + *****************************************************************************/ + /* Reset payload size and buffer number of RxBuffer */ + Can_GaaRegs[LucUnit].pCmn->ulRMNB = CAN_RSCAN_RMNB_DEFAULT; + /* Reset the value of global configuration register */ + Can_GaaRegs[LucUnit].pCmn->ulGCFG = CAN_RSCAN_GCFG_DEFAULT; + + /* Reset transmission buffer interruption enable/disable */ + for (LulCount = 0UL; + LulCount < (uint32)LpHWInfo->ucNoOfTMIEC; LulCount++) + { + Can_GaaRegs[LucUnit].pCmn->aaTMIEC[LulCount] = CAN_RSCAN_TMIEC_DEFAULT; + } + +#if ((CAN_RSCAN_CONFIGURED == STD_ON) && (CAN_RSCANFD_CONFIGURED == STD_ON)) + if (CAN_MACRO_RSCANFD == Can_GaaRegs[LucUnit].enMacroType) +#endif + { +#if (CAN_RSCANFD_CONFIGURED == STD_ON) +#if (CAN_INTERFACE_MODE_SELECTION_LOCATION == GRMCFG_REG) + /* Reset RCMC bit for Global Interface Mode Select Register. */ + Can_GaaRegs[LucUnit].pCmn->ulGRMCFG = CAN_RSCAN_GRMCFG_DEFAULT; +#endif + /* Reset Global FD Configuration Register. */ + Can_GaaRegs[LucUnit].pCmn->ulGFDCFG = CAN_RSCAN_GFDCFG_DEFAULT; +#endif + } +#if ((CAN_RSCAN_CONFIGURED == STD_ON) && (CAN_RSCANFD_CONFIGURED == STD_ON)) + else +#endif + { + /* Nothing to do */ + } + + /***************************************************************************** + * ENTER GLOBAL_STOP MODE * + *****************************************************************************/ + /* Change to GLOBAL_STOP mode */ + LulTimeoutDuration = CAN_TIMEOUT_COUNT; + LucTimeoutResult = Can_GlobalModeChange(LucUnit, + CAN_RSCAN_GSLPR | CAN_RSCAN_GMDC_RESET, &LulTimeoutDuration); + /* If mode changed was not finished, report error */ + if (E_OK != LucTimeoutResult) + { +#if defined(CAN_E_TIMEOUT_FAILURE) + CAN_DEM_REPORT_ERROR(CAN_E_TIMEOUT_FAILURE, DEM_EVENT_STATUS_FAILED); +#endif + LblErrFlag = CAN_TRUE; + } + else + { + /* No action required */ + } + + return LblErrFlag; +} +#endif + +/******************************************************************************* +** Function Name : Can_InitController +** +** Service ID : Not applicable +** +** Description : Initialize a Controller. +** +** Sync/Async : Synchronous +** +** Reentrancy : Non-Reentrant +** +** Input Parameters : LucCtrlIndex : Index of Controller +** +** InOut Parameters : None +** +** Output Parameters : None +** +** Return parameter : When any error occurred CAN_TRUE, otherwise CAN_FALSE +** +** Preconditions : Can_GpConfig must be initialized +** Global state must be GLOBAL_RESET mode +** +** Global Variables Used : Can_GpPCController, Can_GpPBController +** Can_GaaActiveControllers, Can_GaaRegs +** Can_GpConfig, Can_GpHohConfig +** +** Functions Invoked : CAN_DEM_REPORT_ERROR, +** Can_ChannelModeChange +** +** Registers Used : (CFD)CFCCk, (CFD)TXQCCm, (CFD)RFCCx, +** (CFD)Cm(N)CFG, CFDCmFDCFG, CFDCmDCFG, (CFD)CmCTR, +** EIC registers [E2M, E2H, E2UH, U2A16, U2A8] +** +** (CFD)CFCCd, (CFD)TXQCCn, (CFD)RFCCa, (CFD)TMIECf +** (CFD)CnNCFG, CFDCnFDCFG, CFDCnDCFG, (CFD)CnCTR, +** EIC registers [S4_G4MH, S4_CR52, V4H, V4M] +** +** Reference ID : CAN_DUD_ACT_027 +** Reference ID : CAN_DUD_ACT_027_ERR001, CAN_DUD_ACT_027_GBL001, +** Reference ID : CAN_DUD_ACT_027_REG001, CAN_DUD_ACT_027_REG002, +** Reference ID : CAN_DUD_ACT_027_REG003, CAN_DUD_ACT_027_REG004, +** Reference ID : CAN_DUD_ACT_027_REG005, CAN_DUD_ACT_027_REG006, +** Reference ID : CAN_DUD_ACT_027_REG007, CAN_DUD_ACT_027_REG008, +** Reference ID : CAN_DUD_ACT_027_REG009, CAN_DUD_ACT_027_REG010, +** Reference ID : CAN_DUD_ACT_027_REG011, CAN_DUD_ACT_027_REG012, +** Reference ID : CAN_DUD_ACT_027_REG013 +*******************************************************************************/ +#if (CAN_ACCESS_HW_ENABLE == STD_ON) +STATIC FUNC(boolean, CAN_RSCAN_PRIVATE_CODE) Can_InitController( + CONST(uint8, AUTOMATIC) LucCtrlIndex) +{ + VAR(boolean, AUTOMATIC) LblErrFlag; + VAR(uint8, AUTOMATIC) LucUnit; + VAR(uint8, AUTOMATIC) LucCh; + VAR(uint16, AUTOMATIC) LusHohIndex; + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(Can_HohConfigType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA) LpHoh; + /* END Msg(2:3432)-3 */ + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(Can_ControllerPCConfigType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA) + LpPCController; + P2CONST(Can_ControllerPBConfigType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA) + LpPBController; + P2CONST(Can_BaudrateConfigType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA) + LpBaudrateConfig; + /* END Msg(2:3432)-3 */ + uint32 LulTimeoutDuration; + Std_ReturnType LucTimeoutResult; + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(Can_HWUnitInfoType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA) LpHWInfo; + /* END Msg(2:3432)-3 */ + VAR(uint32, AUTOMATIC) LulCount; +#if ((CAN_TX_QUEUE == STD_ON) || (CAN_GATEWAY_QUEUE == STD_ON)) + uint32 LulTxQCh; + uint32 LulTxQIdx; +#endif + + /* Get pointer to configuration table */ + LpPCController = &Can_GpPCController[LucCtrlIndex]; + LpPBController = &Can_GpPBController[LucCtrlIndex]; + + /* QAC Warning: START Msg(2:2814)-4 */ + /* QAC Warning: START Msg(2:2844)-2 */ + LucUnit = LpPCController->ucUnit; + /* END Msg(2:2844)-2 */ + /* END Msg(2:2814)-4 */ + LucCh = LpPCController->ucCh; +#if (CAN_WAKEUP_SUPPORT == STD_ON) + /* Since initial state is not SLEEP, set active flag */ + /* QAC Warning: START Msg(2:2844)-2 */ + Can_GaaActiveControllers[LucUnit] |= (1UL << LucCtrlIndex); + /* END Msg(2:2844)-2 */ +#endif + + /*********************************************************************** + * ENTER CHANNEL_RESET MODE * + ***********************************************************************/ + LulTimeoutDuration = CAN_TIMEOUT_COUNT; + LucTimeoutResult = + Can_ChannelModeChange(LucUnit, LucCh, CAN_RSCAN_CHMDC_RESET, + &LulTimeoutDuration); + if (E_OK != LucTimeoutResult) + { +#if defined(CAN_E_TIMEOUT_FAILURE) + CAN_DEM_REPORT_ERROR(CAN_E_TIMEOUT_FAILURE, DEM_EVENT_STATUS_FAILED); +#endif + LblErrFlag = CAN_TRUE; + } + else + { + /* Get PBConfig data for this RSCAN(FD) unit */ + /* MISRA Violation: START Msg(2:0316)-1 */ + /* MISRA Violation: START Msg(2:3432)-3 */ + LpHWInfo = + (P2CONST(Can_HWUnitInfoType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA)) + Can_GpConfig->pHWUnitInfo; + /* END Msg(2:3432)-3 */ + /* END Msg(2:0316)-1 */ + /* Initialize transmission buffer interruption enable/disable */ + /* QAC Warning: START Msg(2:2824)-3 */ + LpHWInfo = &LpHWInfo[LucUnit]; + /* END Msg(2:2824)-3 */ + /* QAC Warning: START Msg(2:2814)-4 */ + for (LulCount = 0UL; + LulCount < (uint32)LpHWInfo->ucNoOfTMIEC; LulCount++) + /* END Msg(2:2814)-4 */ + { + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2814)-4 */ + /* QAC Warning: START Msg(2:2824)-3 */ + Can_GaaRegs[LucUnit].pCmn->aaTMIEC[LulCount] = + LpHWInfo->pTMIEC[LulCount]; + /* END Msg(2:2824)-3 */ + /* END Msg(2:2814)-4 */ + /* END Msg(2:2844)-2 */ + } + /******************************************************************* + * INITIALIZATION OF BAUDRATE * + *******************************************************************/ + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2814)-4 */ + /* QAC Warning: START Msg(2:2824)-3 */ + LpBaudrateConfig = + &LpPBController->pBaudrateConfig[CAN_DEFAULT_BAUDRATE_INDEX]; + /* END Msg(2:2824)-3 */ + /* END Msg(2:2814)-4 */ + /* END Msg(2:2844)-2 */ + /* Setting the value for nBTP into the nominal channel register */ + /* QAC Warning: START Msg(2:2814)-4 */ + Can_GaaRegs[LucUnit].pCmn->aaChReg[LucCh].ulCFG = + LpBaudrateConfig->ulCFG; + /* END Msg(2:2814)-4 */ + +#if ((CAN_RSCAN_CONFIGURED == STD_ON) && (CAN_RSCANFD_CONFIGURED == STD_ON)) + if (CAN_MACRO_RSCANFD == Can_GaaRegs[LucUnit].enMacroType) +#endif + { +#if (CAN_RSCANFD_CONFIGURED == STD_ON) + /* Configuring FDCFG register*/ + Can_GaaRegs[LucUnit].pFD->aaFDChReg[LucCh].ulFDCFG = + LpBaudrateConfig->ulFDCFG; + /* Setting the value for dBTP into the register */ + Can_GaaRegs[LucUnit].pFD->aaFDChReg[LucCh].ulDCFG = + LpBaudrateConfig->ulDCFG; +#endif + } +#if ((CAN_RSCAN_CONFIGURED == STD_ON) && (CAN_RSCANFD_CONFIGURED == STD_ON)) + else +#endif + { + /* Nothing to do */ + } + /******************************************************************* + * INITIALIZATION OF HTH/HRH BUFFERS * + *******************************************************************/ + for (LusHohIndex = 0U; + LusHohIndex < Can_GpConfig->usNoOfHohs; LusHohIndex++) + { + LpHoh = &Can_GpHohConfig[LusHohIndex]; + /* QAC Warning: START Msg(2:2814)-4 */ + /* QAC Warning: START Msg(2:2844)-2 */ + if (LpHoh->ucController == LucCtrlIndex) + /* END Msg(2:2844)-2 */ + /* END Msg(2:2814)-4 */ + { + switch (LpHoh->enBufferType) + { +#if ((CAN_TX_BUFFER == STD_ON) || (CAN_RX_BUFFER == STD_ON)) + case CAN_BUFFERTYPE_BUFFER: + /* Nothing is required */ + break; +#endif +#if (CAN_RX_FIFO == STD_ON) + case CAN_BUFFERTYPE_RXFIFO: + Can_GaaRegs[LucUnit].pCmn->aaRFCC[LpHoh->usBufferIndex] = + LpHoh->ulXXCCRegValue; + break; +#endif +#if ((CAN_TX_QUEUE == STD_ON) || (CAN_GATEWAY_QUEUE == STD_ON)) + case CAN_BUFFERTYPE_TXQUEUE: + LulTxQCh = (uint32)LpHoh->usBufferIndex / CAN_RSCAN_TXQUEUE_PER_CH; + LulTxQIdx = (uint32)LpHoh->usBufferIndex % CAN_RSCAN_TXQUEUE_PER_CH; + Can_GaaRegs[LucUnit].pCmn->aaTQueueReg[LulTxQIdx].aaTXQCC[LulTxQCh] = + LpHoh->ulXXCCRegValue; + break; +#endif + /* MISRA Violation: START Msg(2:2016)-10 */ + default: + /* END Msg(2:2016)-10 */ +#if ((CAN_RX_COMFIFO == STD_ON) || (CAN_TX_COMFIFO == STD_ON) || \ + (CAN_GATEWAY_COMFIFO == STD_ON)) + Can_GaaRegs[LucUnit].pCmn->aaCFCC[LpHoh->usBufferIndex] = + LpHoh->ulXXCCRegValue; +#ifdef CAN_COMFIFO_ENHANCEMENT_SUPPORT + Can_GaaRegs[LucUnit].pCmn->aaCFCCE[LpHoh->usBufferIndex] = + LpHoh->ulXXCCERegValue; +#endif +#endif + break; + } + } + else + { + /* Nothing to do */ + } + } + + /******************************************************************* + * SETTING OF TRANSMIT HISTORY BUFFER * + *******************************************************************/ + Can_GaaRegs[LucUnit].pCmn->aaTHLCC[LucCh] = LpPCController->ulTHLCC; + + /******************************************************************* + * SETTING OF ERROR INTERRUPTS * + *******************************************************************/ + /* Disabling Interrupts in can controller control register*/ + Can_GaaRegs[LucUnit].pCmn->aaChReg[LucCh].ulCTR = + LpPCController->ulCTR; + + /******************************************************************* + * ENABLING OF INTERRUPTS * + *******************************************************************/ +#if !defined(CAN_V4H_PROC) && !defined(CAN_V4M_PROC) +#if (CAN_CR52_PROC == STD_ON) + /* Enable interrupts */ + /* MISRA Violation: START Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(2:0310)-12 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_OR(32, LpPCController->pICErr, + (uint32)((CAN_EIC_EIMK_MASK_E << (LpPCController->ucCh * ((uint8)3))))); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0310)-12 */ + /* END Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(2:0310)-12 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_OR(32, LpPCController->pICRec, + (uint32)((CAN_EIC_EIMK_MASK_R << (LpPCController->ucCh * ((uint8)3))))); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0310)-12 */ + /* END Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(2:0310)-12 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_OR(32, LpPCController->pICTx, + (uint32)((CAN_EIC_EIMK_MASK_T << (LpPCController->ucCh * ((uint8)3))))); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0310)-12 */ + /* END Msg(6:3305)-11 */ +#else + /* Enable interrupts */ + /* QAC Warning: START Msg(2:2814)-4 */ + /* QAC Warning: START Msg(2:0751)-5 */ + RH850_SV_MODE_ICR_AND(8, LpPCController->pICErr, + (uint8)(~CAN_EIC_EIMK_MASK)); + RH850_SV_MODE_ICR_AND(8, LpPCController->pICRec, + (uint8)(~CAN_EIC_EIMK_MASK)); + RH850_SV_MODE_ICR_AND(8, LpPCController->pICTx, + (uint8)(~CAN_EIC_EIMK_MASK)); + /* END Msg(2:0751)-5 */ + /* END Msg(2:2814)-4 */ + /* DummyRead & SYNCP */ + RH850_SV_MODE_REG_READ_ONLY(16, LpPCController->pICTx); + /* MISRA Violation: START Msg(2:1006)-16 */ + EXECUTE_SYNCP(); + /* END Msg(2:1006)-16 */ +#endif +#endif /* #if !defined(CAN_V4H_PROC) && !defined(CAN_V4M_PROC) */ + LblErrFlag = CAN_FALSE; + } + + return LblErrFlag; +} +#endif /* #if (CAN_ACCESS_HW_ENABLE == STD_ON) */ + +/******************************************************************************* +** Function Name : Can_DeInitController +** +** Service ID : Not applicable +** +** Description : De-initialize a Controller. +** +** Sync/Async : Synchronous +** +** Reentrancy : Non-Reentrant +** +** Input Parameters : LucCtrlIndex : Index of Controller +** +** InOut Parameters : None +** +** Output Parameters : None +** +** Return parameter : When any error occurred CAN_TRUE, otherwise CAN_FALSE +** +** Preconditions : Can_GpConfig must be initialized. +** Global state must be global reset mode. +** +** Global Variables Used : Can_GpPCController, Can_GaaRegs, +** Can_GpConfig, Can_GpHohConfig +** +** Functions Invoked : CAN_DEM_REPORT_ERROR, +** Can_ChannelModeChange +** +** Registers Used : CFDCmCTR, CFDTHLCCm, CFDRFCCx, CFDTXQCC, +** CFDCFCCk, CFDCFCCEk, CFDCmNCFG, CFDCmFDCFG +** CFDCmDCFG, EIC registers [U2A16, U2A8] +** +** CFDCnCTR, CFDTHLCCn, CFDRFCCa, CFDTXQCC, CFDCFCCd, +** CFDCFCCEd, CFDCnNCFG, CFDCnFDCFG, CFDCnDCFG, +** EIC registers [S4_G4MH, S4_CR52, V4H, V4M] +** +** Reference ID : CAN_DUD_ACT_042 +** Reference ID : CAN_DUD_ACT_042_ERR001, CAN_DUD_ACT_042_ERR002, +** Reference ID : CAN_DUD_ACT_042_REG001, CAN_DUD_ACT_042_REG002, +** Reference ID : CAN_DUD_ACT_042_REG003, CAN_DUD_ACT_042_REG004, +** Reference ID : CAN_DUD_ACT_042_REG005, CAN_DUD_ACT_042_REG006, +** Reference ID : CAN_DUD_ACT_042_REG007, CAN_DUD_ACT_042_REG008, +** Reference ID : CAN_DUD_ACT_042_REG009, CAN_DUD_ACT_042_REG010, +** Reference ID : CAN_DUD_ACT_042_REG011, CAN_DUD_ACT_042_REG012 +*******************************************************************************/ +#if ((CAN_AR_VERSION == CAN_AR_431_VERSION) || \ + (CAN_AR_VERSION == CAN_AR_1911_VERSION)) +STATIC FUNC(boolean, CAN_RSCAN_PRIVATE_CODE) Can_DeInitController( + CONST(uint8, AUTOMATIC) LucCtrlIndex) +{ + VAR(boolean, AUTOMATIC) LblErrFlag; + VAR(uint8, AUTOMATIC) LucUnit; + VAR(uint8, AUTOMATIC) LucCh; + VAR(uint16, AUTOMATIC) LusHohIndex; + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(Can_HohConfigType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA) LpHoh; + /* END Msg(2:3432)-3 */ + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(Can_ControllerPCConfigType, AUTOMATIC, CAN_RSCAN_CONFIG_DATA) + LpPCController; + /* END Msg(2:3432)-3 */ + uint32 LulTimeoutDuration; + Std_ReturnType LucTimeoutResult; +#if ((CAN_TX_QUEUE == STD_ON) || (CAN_GATEWAY_QUEUE == STD_ON)) + uint32 LulTxQCh; + uint32 LulTxQIdx; +#endif + + LblErrFlag = CAN_FALSE; + /* Get pointer to configuration table */ + LpPCController = &Can_GpPCController[LucCtrlIndex]; + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2814)-4 */ + LucUnit = LpPCController->ucUnit; + /* END Msg(2:2814)-4 */ + /* END Msg(2:2844)-2 */ + LucCh = LpPCController->ucCh; + /***************************************************************************** + * ENTER CHANNEL_RESET MODE * + *****************************************************************************/ + LulTimeoutDuration = CAN_TIMEOUT_COUNT; + LucTimeoutResult = + Can_ChannelModeChange(LucUnit, LucCh, CAN_RSCAN_CHMDC_RESET, + &LulTimeoutDuration); + if (E_OK != LucTimeoutResult) + { +#if defined(CAN_E_TIMEOUT_FAILURE) + CAN_DEM_REPORT_ERROR(CAN_E_TIMEOUT_FAILURE, DEM_EVENT_STATUS_FAILED); +#endif + LblErrFlag = CAN_TRUE; + } + else + { + + /*************************************************************************** + * DISABLING OF INTERRUPTS * + ***************************************************************************/ +#if !defined(CAN_V4H_PROC) && !defined(CAN_V4M_PROC) +#if (CAN_CR52_PROC == STD_ON) + /* Disable interrupts */ + /* MISRA Violation: START Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(2:0310)-12 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_AND(32, LpPCController->pICErr, + (uint32)(~(CAN_EIC_EIMK_MASK_E << (LpPCController->ucCh * ((uint8)3))))); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0310)-12 */ + /* END Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(2:0310)-12 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_AND(32, LpPCController->pICRec, + (uint32)(~(CAN_EIC_EIMK_MASK_R << (LpPCController->ucCh * ((uint8)3))))); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0310)-12 */ + /* END Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(6:3305)-11 */ + /* MISRA Violation: START Msg(2:0310)-12 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_AND(32, LpPCController->pICTx, + (uint32)(~(CAN_EIC_EIMK_MASK_T << (LpPCController->ucCh * ((uint8)3))))); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0310)-12 */ + /* END Msg(6:3305)-11 */ +#else + /* Disable interrupts */ + /* QAC Warning: START Msg(2:0751)-5 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_OR(8, LpPCController->pICErr, CAN_EIC_EIMK_MASK); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0751)-5 */ + /* QAC Warning: START Msg(2:0751)-5 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_OR(8, LpPCController->pICRec, CAN_EIC_EIMK_MASK); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0751)-5 */ + /* QAC Warning: START Msg(2:0751)-5 */ + /* QAC Warning: START Msg(2:2814)-4 */ + RH850_SV_MODE_ICR_OR(8, LpPCController->pICTx, CAN_EIC_EIMK_MASK); + /* END Msg(2:2814)-4 */ + /* END Msg(2:0751)-5 */ + /* DummyRead & SYNCP */ + RH850_SV_MODE_REG_READ_ONLY(16, LpPCController->pICTx); + /* MISRA Violation: START Msg(2:1006)-16 */ + EXECUTE_SYNCP(); + /* END Msg(2:1006)-16 */ +#endif /* #ifdef CAN_CR52_PROC */ +#endif /* #if !defined(CAN_V4H_PROC) && !defined(CAN_V4M_PROC) */ + + /*************************************************************************** + * RESET ERROR INTERRUPTS * + ***************************************************************************/ + /* Reset Interrupts in can controller control register */ + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2814)-4 */ + Can_GaaRegs[LucUnit].pCmn->aaChReg[LucCh].ulCTR = CAN_RSCAN_CTR_DEFAULT; + /* END Msg(2:2814)-4 */ + /* END Msg(2:2844)-2 */ + /*************************************************************************** + * RESET TRANSMIT HISTORY BUFFER * + ***************************************************************************/ + Can_GaaRegs[LucUnit].pCmn->aaTHLCC[LucCh] = CAN_RSCAN_THLCC_DEFAULT; + /*************************************************************************** + * DE-INITIALIZATION OF HTH/HRH BUFFERS * + ***************************************************************************/ + for (LusHohIndex = 0U; + LusHohIndex < Can_GpConfig->usNoOfHohs; LusHohIndex++) + { + LpHoh = &Can_GpHohConfig[LusHohIndex]; + /* QAC Warning: START Msg(2:2844)-2 */ + /* QAC Warning: START Msg(2:2814)-4 */ + if (LpHoh->ucController == LucCtrlIndex) + /* END Msg(2:2814)-4 */ + /* END Msg(2:2844)-2 */ + { + switch (LpHoh->enBufferType) + { +#if ((CAN_TX_BUFFER == STD_ON) || (CAN_RX_BUFFER == STD_ON)) + case CAN_BUFFERTYPE_BUFFER: + /* Nothing is required */ + break; +#endif +#if (CAN_RX_FIFO == STD_ON) + case CAN_BUFFERTYPE_RXFIFO: + Can_GaaRegs[LucUnit].pCmn->aaRFCC[LpHoh->usBufferIndex] = + CAN_RSCAN_RFCC_DEFAULT; + break; +#endif +#if ((CAN_TX_QUEUE == STD_ON) || (CAN_GATEWAY_QUEUE == STD_ON)) + case CAN_BUFFERTYPE_TXQUEUE: + LulTxQCh = (uint32)LpHoh->usBufferIndex / CAN_RSCAN_TXQUEUE_PER_CH; + LulTxQIdx = (uint32)LpHoh->usBufferIndex % CAN_RSCAN_TXQUEUE_PER_CH; + Can_GaaRegs[LucUnit].pCmn->aaTQueueReg[LulTxQIdx].aaTXQCC[LulTxQCh] = + CAN_RSCAN_TXQCC_DEFAULT; + break; +#endif + /* MISRA Violation: START Msg(2:2016)-10 */ + default: + /* END Msg(2:2016)-10 */ +#if ((CAN_RX_COMFIFO == STD_ON) || (CAN_TX_COMFIFO == STD_ON) || \ + (CAN_GATEWAY_COMFIFO == STD_ON)) + Can_GaaRegs[LucUnit].pCmn->aaCFCC[LpHoh->usBufferIndex] = + CAN_RSCAN_CFCC_DEFAULT; +#ifdef CAN_COMFIFO_ENHANCEMENT_SUPPORT + Can_GaaRegs[LucUnit].pCmn->aaCFCCE[LpHoh->usBufferIndex] = + CAN_RSCAN_CFCCE_DEFAULT; +#endif +#endif + break; + } + } + else + { + /* Nothing to do */ + } + } + /*************************************************************************** + * DE-INITIALIZATION OF BAUDRATE * + ***************************************************************************/ + /* Reset the value for nBTP into the nominal channel register */ + Can_GaaRegs[LucUnit].pCmn->aaChReg[LucCh].ulCFG = CAN_RSCAN_CFG_DEFAULT; + +#if ((CAN_RSCAN_CONFIGURED == STD_ON) && (CAN_RSCANFD_CONFIGURED == STD_ON)) + if (CAN_MACRO_RSCANFD == Can_GaaRegs[LucUnit].enMacroType) +#endif + { +#if (CAN_RSCANFD_CONFIGURED == STD_ON) + /* Reset FDCFG register */ + Can_GaaRegs[LucUnit].pFD->aaFDChReg[LucCh].ulFDCFG = + CAN_RSCAN_FDCFG_DEFAULT; + /* Reset DCFG register */ + Can_GaaRegs[LucUnit].pFD->aaFDChReg[LucCh].ulDCFG = + CAN_RSCAN_DCFG_DEFAULT; +#endif + } +#if ((CAN_RSCAN_CONFIGURED == STD_ON) && (CAN_RSCANFD_CONFIGURED == STD_ON)) + else +#endif + { + /* Nothing to do */ + } + } + + /***************************************************************************** + * ENTER CHANNEL_STOP MODE * + *****************************************************************************/ + if (CAN_FALSE == LblErrFlag) + { + LulTimeoutDuration = CAN_TIMEOUT_COUNT; + LucTimeoutResult = + Can_ChannelModeChange(LucUnit, LucCh, + CAN_RSCAN_CSLPR | CAN_RSCAN_CHMDC_RESET, &LulTimeoutDuration); + if (E_OK != LucTimeoutResult) + { +#if defined(CAN_E_TIMEOUT_FAILURE) + CAN_DEM_REPORT_ERROR(CAN_E_TIMEOUT_FAILURE, DEM_EVENT_STATUS_FAILED); +#endif + LblErrFlag = CAN_TRUE; + } + else + { + /* Do nothing */ + } + } + else + { + /* Do nothing */ + } + return LblErrFlag; +} +#endif + +/******************************************************************************* +** Function Name : Can_SearchBaudrate +** +** Service ID : Not Applicable +** +** Description : This function searches the baudrate configured for +** CAN Controller. +** +** Sync/Async : Synchronous +** +** Reentrancy : Non-Reentrant +** +** Input Parameters : LucCtrlIndex : Index of Controller config table +** LusBaudrate : Baudrate in kbps +** +** InOut Parameters : None +** +** Output Parameters : None +** +** Return parameter : If specified baudrate is found, its index. +** Otherwise CAN_INALID_INDEX. +** +** Preconditions : The availability of the index must be guaranteed +** by the upper layer. +** +** Global Variables Used : Can_GpPBController +** +** Functions Invoked : None +** +** Registers Used : None +** +** Reference ID : CAN_DUD_ACT_024 +*******************************************************************************/ +#if ((CAN_AR_422_VERSION == CAN_AR_VERSION) && \ + (STD_ON == CAN_CHANGE_BAUDRATE_API)) +STATIC FUNC(uint32, CAN_RSCAN_PRIVATE_CODE) Can_SearchBaudrate( + CONST(uint8, AUTOMATIC) LucCtrlIndex, + CONST(uint16, AUTOMATIC) LusBaudrate) +{ + P2CONST(Can_BaudrateConfigType, AUTOMATIC, CAN_RSCAN_APPL_DATA) + LpBaudrateConfig; + uint32 LulReturnValue; + uint32 LulBaudrateConfigCount; + uint32 LulCount; + + LpBaudrateConfig = Can_GpPBController[LucCtrlIndex].pBaudrateConfig; + LulBaudrateConfigCount = Can_GpPBController[LucCtrlIndex].usNoOfBaudrate; + LulReturnValue = CAN_INVALID_INDEX; + LulCount = 0UL; + /* Seek a baudrate setting until end of the table or a setting is found */ + while ((LulCount < LulBaudrateConfigCount) && + (CAN_INVALID_INDEX == LulReturnValue)) + { + if (LpBaudrateConfig[LulCount].usBaudrateConfig == LusBaudrate) + { + /* Update the global variable for the configuration structure index */ + LulReturnValue = LulCount; + } + else + { + /* No action required */ + } + LulCount++; + } + return(LulReturnValue); +} +#endif + +/******************************************************************************* +** Function Name : Can_SearchBaudrateID +** +** Service ID : Not Applicable +** +** Description : This function searches the baud rate configured for +** CAN Controller. +** +** Sync/Async : Synchronous +** +** Reentrancy : Non-Reentrant +** +** Input Parameters : LucCtrlIndex : Index of Controller config table +** LulBaudrateID : Baudrate ID +** +** InOut Parameters : None +** +** Output Parameters : None +** +** Return parameter : If specified baudrate is found, its index. +** Otherwise CAN_INALID_INDEX. +** +** Preconditions : The availability of the index must be guaranteed +** by the upper layer. +** +** Global Variables Used : Can_GpPBController +** +** Functions Invoked : None +** +** Registers Used : None +** +** Reference ID : CAN_DUD_ACT_025 +*******************************************************************************/ +#if (CAN_SET_BAUDRATE_API == STD_ON) +STATIC FUNC(uint32, CAN_RSCAN_PRIVATE_CODE) Can_SearchBaudrateID( + CONST(uint8, AUTOMATIC) LucCtrlIndex, CONST(uint16, AUTOMATIC) LusBaudrateID) +{ + /* MISRA Violation: START Msg(2:3432)-3 */ + P2CONST(Can_BaudrateConfigType, AUTOMATIC, CAN_RSCAN_APPL_DATA) + LpBaudrateConfig; + /* END Msg(2:3432)-3 */ + VAR(uint32, AUTOMATIC) LulReturnValue; + VAR(uint32, AUTOMATIC) LulBaudrateConfigCount; + VAR(uint32, AUTOMATIC) LulCount; + + LpBaudrateConfig = Can_GpPBController[LucCtrlIndex].pBaudrateConfig; + LulBaudrateConfigCount = Can_GpPBController[LucCtrlIndex].usNoOfBaudrate; + LulReturnValue = CAN_INVALID_INDEX; + LulCount = 0UL; + /* Seek a baudrate setting until end of the table or a setting is found */ + while ((LulCount < LulBaudrateConfigCount) && + (CAN_INVALID_INDEX == LulReturnValue)) + { + /* QAC Warning: START Msg(2:2824)-3 */ + if (LpBaudrateConfig[LulCount].usBaudrateConfigID == LusBaudrateID) + /* END Msg(2:2824)-3 */ + { + /* Update the global variable for the configuration structure index */ + LulReturnValue = LulCount; + } + else + { + /* No action required */ + } + LulCount++; + } + return(LulReturnValue); +} +#endif /* (CAN_SET_BAUDRATE_API == STD_ON) */ + +#define CAN_RSCAN_STOP_SEC_PRIVATE_CODE +/* MISRA Violation: START Msg(4:5087)-4 */ +#include "Can_MemMap.h" +/* END Msg(4:5087)-4 */ + +/******************************************************************************* +** End of File ** +*******************************************************************************/ diff --git a/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/src/All_Version.c b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/src/All_Version.c new file mode 100644 index 0000000..732d463 --- /dev/null +++ b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/all/src/All_Version.c @@ -0,0 +1,218 @@ +/*============================================================================*/ +/* Project = R-Car Gen4 AR19-11 MCAL */ +/* Module = Can_Version.c */ +/* SW-VERSION = 1.1.17 */ +/*============================================================================*/ +/* COPYRIGHT */ +/*============================================================================*/ +/* Copyright(c) 2021-2022 Renesas Electronics Corporation. */ +/*============================================================================*/ +/* Purpose: */ +/* This file contains code for version checking for modules included by CAN */ +/* Driver */ +/* */ +/*============================================================================*/ +/* */ +/* Unless otherwise agreed upon in writing between your company and */ +/* Renesas Electronics Corporation the following shall apply! */ +/* */ +/* Warranty Disclaimer */ +/* */ +/* There is no warranty of any kind whatsoever granted by Renesas. Any */ +/* warranty is expressly disclaimed and excluded by Renesas, either expressed */ +/* or implied, including but not limited to those for non-infringement of */ +/* intellectual property, merchantability and/or fitness for the particular */ +/* purpose. */ +/* */ +/* Renesas shall not have any obligation to maintain, service or provide bug */ +/* fixes for the supplied Product(s) and/or the Application. */ +/* */ +/* Each User is solely responsible for determining the appropriateness of */ +/* using the Product(s) and assumes all risks associated with its exercise */ +/* of rights under this Agreement, including, but not limited to the risks */ +/* and costs of program errors, compliance with applicable laws, damage to */ +/* or loss of data, programs or equipment, and unavailability or */ +/* interruption of operations. */ +/* */ +/* Limitation of Liability */ +/* */ +/* In no event shall Renesas be liable to the User for any incidental, */ +/* consequential, indirect, or punitive damage (including but not limited */ +/* to lost profits) regardless of whether such liability is based on breach */ +/* of contract, tort, strict liability, breach of warranties, failure of */ +/* essential purpose or otherwise and even if advised of the possibility of */ +/* such damages. Renesas shall not be liable for any services or products */ +/* provided by third party vendors, developers or consultants identified or */ +/* referred to the User by Renesas in connection with the Product(s) and/or */ +/* the Application. */ +/* */ +/*============================================================================*/ +/* Environment: */ +/* Devices: RCarS4, RcarV4H, V4M */ +/*============================================================================*/ + +/******************************************************************************* +** Revision History ** +*******************************************************************************/ +/* + * 1.1.2: 20/04/2022 : Corrected Misra-C rules and QAC warning messages + * 1.0.0: 10/06/2021 : Initial version. + */ + +/******************************************************************************/ +/** MISRA C Rule Violations **/ +/******************************************************************************/ + +/* 1. MISRA C RULE VIOLATION: */ +/* Message : (2:0857): [L] Number of macro definitions exceeds 1024 - */ +/* program does not conform strictly to ISO:C90. */ +/* Rule : MISRA C:2012 Dir-1.1 */ +/* Justification : The number of macro depend on module code size. There is */ +/* no issue when number of macro is over 1024. */ +/* Verification : However, part of the code is verified manually and */ +/* it is not having any impact. */ +/* Reference : Look for START Msg(2:0857)-1 and */ +/* END Msg(2:0857)-1 tags in the code. */ +/******************************************************************************/ + +/******************************************************************************* +** Include Section ** +*******************************************************************************/ +/* CAN module version information is required for inter module version check */ +/* MISRA Violation: START Msg(2:0857)-1 */ +#include "Can.h" +/* END Msg(2:0857)-1 */ +/* + * Included for CAN module version information and other modules version + * information + */ +#include "Can_Version.h" + +/* Following is required only when external modules version check is enabled */ +#if (CAN_VERSION_CHECK_EXT_MODULES == STD_ON) + +/* CanIf module version information is required */ +/* MISRA Violation: START Msg(2:0857)-1 */ +#include "CanIf.h" +/* END Msg(2:0857)-1 */ + +/* DEM module version information is required */ +/* MISRA Violation: START Msg(2:0857)-1 */ +#include "Dem.h" +/* END Msg(2:0857)-1 */ + +#if (CAN_DEV_ERROR_DETECT == STD_ON) +/* DET module version information is required only when DET is enabled */ +/* MISRA Violation: START Msg(2:0857)-1 */ +#include "Det.h" +/* END Msg(2:0857)-1 */ +#endif + +#if (CAN_WAKEUP_SUPPORT == STD_ON) +/* + * EcuM module version information is required only when wakeup source is + * enabled + */ +/* MISRA Violation: START Msg(2:0857)-1 */ +#include "EcuM.h" +/* END Msg(2:0857)-1 */ +#endif + +/* OS module version information is required */ +#include "Os.h" + +#if (CAN_CRITICAL_SECTION_PROTECTION == STD_ON) +/* +* RTE module version information is required only when critical section +* protection is enabled +*/ +#include "Rte.h" +#endif + +#endif + +/******************************************************************************* +** Version Information ** +*******************************************************************************/ +/* AUTOSAR release version information */ +#define CAN_VERSION_C_AR_RELEASE_MAJOR_VERSION\ + CAN_AR_RELEASE_MAJOR_VERSION_VALUE +#define CAN_VERSION_C_AR_RELEASE_MINOR_VERSION\ + CAN_AR_RELEASE_MINOR_VERSION_VALUE +#define CAN_VERSION_C_AR_RELEASE_REVISION_VERSION\ + CAN_AR_RELEASE_REVISION_VERSION_VALUE + +/* File version information */ +#define CAN_VERSION_C_SW_MAJOR_VERSION CAN_SW_MAJOR_VERSION_VALUE +#define CAN_VERSION_C_SW_MINOR_VERSION CAN_SW_MINOR_VERSION_VALUE + +/******************************************************************************* +** Version Check ** +*******************************************************************************/ +/* Functionality related to R4.0 */ +#if (CAN_VERSION_C_AR_RELEASE_MAJOR_VERSION != \ + CAN_VERSION_AR_RELEASE_MAJOR_VERSION) + #error "Can_Version.c : Mismatch in Release Major Version" +#endif + +#if (CAN_VERSION_C_AR_RELEASE_MINOR_VERSION != \ + CAN_VERSION_AR_RELEASE_MINOR_VERSION) + #error "Can_Version.c : Mismatch in Release Minor Version" +#endif + +#if (CAN_VERSION_C_AR_RELEASE_REVISION_VERSION != \ + CAN_VERSION_AR_RELEASE_REVISION_VERSION) + #error "Can_Version.c : Mismatch in Release Revision Version" +#endif + +#if (CAN_VERSION_C_SW_MAJOR_VERSION != CAN_VERSION_SW_MAJOR_VERSION) + #error "Can_Version.c : Mismatch in Software Major Version" +#endif +#if (CAN_VERSION_C_SW_MINOR_VERSION != CAN_VERSION_SW_MINOR_VERSION) + #error "Can_Version.c : Mismatch in Software Minor Version" +#endif + +#if (CAN_VERSION_CHECK_EXT_MODULES == STD_ON) +#if ((CANIF_AR_RELEASE_MAJOR_VERSION != CAN_AR_RELEASE_MAJOR_VERSION) || \ + (CANIF_AR_RELEASE_MINOR_VERSION != CAN_AR_RELEASE_MINOR_VERSION)) + #error "The AR version of CanIf.h does not match the expected version" +#endif + +#if (CAN_DEV_ERROR_DETECT == STD_ON) +#if ((DET_AR_RELEASE_MAJOR_VERSION != CAN_AR_RELEASE_MAJOR_VERSION) || \ + (DET_AR_RELEASE_MINOR_VERSION != CAN_AR_RELEASE_MINOR_VERSION)) + #error "The AR version of Det.h does not match the expected version" +#endif +#endif + +#if ((DEM_AR_RELEASE_MAJOR_VERSION != CAN_AR_RELEASE_MAJOR_VERSION) || \ + (DEM_AR_RELEASE_MINOR_VERSION != CAN_AR_RELEASE_MINOR_VERSION)) + #error "The AR version of Dem.h does not match the expected version" +#endif + +#if(CAN_CRITICAL_SECTION_PROTECTION == STD_ON) +#if ((RTE_AR_RELEASE_MAJOR_VERSION != CAN_AR_RELEASE_MAJOR_VERSION) || \ + (RTE_AR_RELEASE_MINOR_VERSION != CAN_AR_RELEASE_MINOR_VERSION)) + #error "The AR version of Rte.h does not match the expected version" +#endif +#endif /* End of CAN_CRITICAL_SECTION_PROTECTION */ + +#if(CAN_WAKEUP_SUPPORT == STD_ON) +#if ((ECUM_AR_RELEASE_MAJOR_VERSION != CAN_AR_RELEASE_MAJOR_VERSION) || \ + (ECUM_AR_RELEASE_MINOR_VERSION != CAN_AR_RELEASE_MINOR_VERSION)) + #error "The AR version of EcuM.h does not match the expected version" +#endif +#endif + +#if ((OS_AR_RELEASE_MAJOR_VERSION != CAN_AR_RELEASE_MAJOR_VERSION) || \ + (OS_AR_RELEASE_MINOR_VERSION != CAN_AR_RELEASE_MINOR_VERSION)) + #error "The AR version of Os.h does not match the expected version" +#endif + + + +#endif /* (CAN_VERSION_CHECK_EXT_MODULES == STD_ON) */ + +/******************************************************************************* +** End of File ** +*******************************************************************************/