From c79fcbae2d8cdc421de5bfe64d71d926577e048b Mon Sep 17 00:00:00 2001 From: woody Date: Thu, 18 Dec 2025 19:45:46 +0900 Subject: [PATCH] update --- .../V4M/src/arm/App_Woody_V4M_Sample.c | 319 ------------------ 1 file changed, 319 deletions(-) delete mode 100644 4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/woody/sample_application/V4M/src/arm/App_Woody_V4M_Sample.c diff --git a/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/woody/sample_application/V4M/src/arm/App_Woody_V4M_Sample.c b/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/woody/sample_application/V4M/src/arm/App_Woody_V4M_Sample.c deleted file mode 100644 index 01832a5..0000000 --- a/4_Trunk/MCAL-v4m-1_19.0.11.D_release/rel/modules/woody/sample_application/V4M/src/arm/App_Woody_V4M_Sample.c +++ /dev/null @@ -1,319 +0,0 @@ -/*============================================================================*/ -/* Project = R-Car Gen4 AR19-11 MCAL */ -/* Module = App_CAN_V4M_Sample.c */ -/* SW-VERSION = 1.1.17 */ -/*============================================================================*/ -/* COPYRIGHT */ -/*============================================================================*/ -/* Copyright(c) 2023 Renesas Electronics Corporation. */ -/*============================================================================*/ -/* Purpose: */ -/* This application file contains execution sequences to demonstrate the usage*/ -/* of CAN Driver APIs. */ -/* */ -/*============================================================================*/ -/* */ -/* Unless otherwise agreed upon in writing between your company and */ -/* Renesas Electronics Corporation the following shall apply! */ -/* */ -/* Warranty Disclaimer */ -/* */ -/* There is no warranty of any kind whatsoever granted by Renesas. Any */ -/* warranty is expressly disclaimed and excluded by Renesas, either expressed */ -/* or implied, including but not limited to those for non-infringement of */ -/* intellectual property, merchantability and/or fitness for the particular */ -/* purpose. */ -/* */ -/* Renesas shall not have any obligation to maintain, service or provide bug */ -/* fixes for the supplied Product(s) and/or the Application. */ -/* */ -/* Each User is solely responsible for determining the appropriateness of */ -/* using the Product(s) and assumes all risks associated with its exercise */ -/* of rights under this Agreement, including, but not limited to the risks */ -/* and costs of program errors, compliance with applicable laws, damage to */ -/* or loss of data, programs or equipment, and unavailability or */ -/* interruption of operations. */ -/* */ -/* Limitation of Liability */ -/* */ -/* In no event shall Renesas be liable to the User for any incidental, */ -/* consequential, indirect, or punitive damage (including but not limited */ -/* to lost profits) regardless of whether such liability is based on breach */ -/* of contract, tort, strict liability, breach of warranties, failure of */ -/* essential purpose or otherwise and even if advised of the possibility of */ -/* such damages. Renesas shall not be liable for any services or products */ -/* provided by third party vendors, developers or consultants identified or */ -/* referred to the User by Renesas in connection with the Product(s) and/or */ -/* the Application. */ -/* */ -/*============================================================================*/ -/* Environment: */ -/* Devices: V4M */ -/*============================================================================*/ - -/******************************************************************************* -** Revision Control History ** -*******************************************************************************/ -/* - * 1.1.14: 18/04/2023 : Initial Version - */ -/******************************************************************************/ -/******************************************************************************* -** Include Section ** -*******************************************************************************/ - -#include "App_CAN_Device_Sample.h" -#include "Interrupt.h" -#include "log.h" -#include "scif.h" - -/******************************************************************************* -** Local Definitions ** -*******************************************************************************/ - -/******************************************************************************* -* Global Variables ** -*******************************************************************************/ -/******************************************************************************* -** Function Prototypes ** -*******************************************************************************/ - -/****************************************************************************** -* Function Definitions ** -******************************************************************************/ - -/* - * Turn off interrupts in the ARM processor - * Turn off IRQ and FIQ interrupt - */ -void cpuirq_disable (void) -{ - __asm("cpsid i\n\t"); -} -/* - * Turn on interrupts in the ARM processor - * Turn on IRQ interrupt & turn off FIQ interrupt - */ -void cpuirq_enable (void) -{ - __asm("cpsie i\n\t"); -} - - -/****************************************************************************** - System Initialization -******************************************************************************/ -void Clock_Init(void) -{ - - Console_Print("[V4M:CAN] Clock_Init start\r\n"); - /**********************************************/ - /* Setting Clock for CANFD */ - /**********************************************/ - /* Get Module stop control register */ - volatile uint32 *reg = (volatile uint32 *)MSTPCR3_ADDR; - - /* Unlock MSTPCR3 register */ - CPGWPR = ~((MSTPCR3 & ~(CAN_MASK_CLOCK))); - - /* Enable Supply clock for CANFD module */ - *reg = (MSTPCR3 & ~(CAN_MASK_CLOCK)); - /* Wait for the status of MSTPCR3 is correct */ - while(CAN_MASK_CLOCK & MSTPCR3); - - /* Reset CANFD by writing to 1 to SRCR3 Register */ - CPGWPR = ~(CAN_MASK_RESET); - reg = (volatile uint32 *)SRCR3_ADDR; - *reg = CAN_MASK_RESET; - while(!(CAN_MASK_RESET & SRCR3)); - - /* Write to software reset clearing register to clearing SRCR3 */ - CPGWPR = ~CAN_MASK_RESET; - SRSTCLR3 = CAN_MASK_RESET; - while(CAN_MASK_RESET & SRCR3); - - /* Unlock CANFDCKCR register */ - CPGWPR = ~((CANFDCKCR & (CAN_SUPPLY_CLOCK))); - /* Supply clock for CANFD module */ - reg = (volatile uint32 *)CANFDCKCR_ADDR; - *reg = (CANFDCKCR & CAN_SUPPLY_CLOCK); - while(!(CAN_SUPPLY_CLOCK & CANFDCKCR)); - - /**********************************************/ - /* Setting internal clock for timer unit TMU0 */ - /**********************************************/ - reg = (volatile uint32 *)MSTPCR7_ADDR ; - /* Unlock TMU0 register */ - CPGWPR = ~((MSTPCR7 & ~(TMU0_MASK_CLOCK))); - /* Enable supply clock for TMU0 */ - *reg = (MSTPCR7 & ~(TMU0_MASK_CLOCK)); -} - - -/* Perform the System initialization */ -void Mcu_Init(void) -{ -} - -/******************************************************************************* -** Watchdog Initialization ** -*******************************************************************************/ -void Wdg_Init(void) -{ - /* call the function */ -} -/****************************************************************************** -* Port Initialization ** -******************************************************************************/ - -void Port_Init(void) -{ - volatile uint32 *regval; - Console_Print("[V4M:CAN] Port_Init start\r\n"); - - /* Set INOUTSEL2 register to select input/ output mode for each TX/RX port */ - PMMR2 = ~(PFC_INOUTSEL2_RW | (BIT_IN_OUT)); - regval = (volatile uint32 *)PFC_INOUTSEL2_RW_ADD; - *regval = (PFC_INOUTSEL2_RW | (BIT_IN_OUT)); - - /* - * GP1_03 -------GPIO * - * GP2_10 -------CANFD0_TX | GP2_16 -------CANFD4_TX * - * GP2_11 -------CANFD0_RX | GP2_17 -------CANFD4_RX * - * GP2_00 -------CANFD1_TX | GP2_02 -------CANFD5_TX * - * GP2_01 -------CANFD1_RX | GP2_03 -------CANFD5_RX * - * GP2_12 -------CANFD2_TX | GP2_07 -------CANFD6_TX * - * GP2_13 -------CANFD2_RX | GP2_08 -------CANFD6_RX * - * GP2_14 -------CANFD3_TX | GP2_18 -------CANFD7_TX * - * GP2_15 -------CANFD3_RX | GP2_19 -------CANFD7_RX * - */ - /* Set the GPSR2 register */ - PMMR2 = ~(PFC_GPSR2_RW | (BIT3_0|BIT7|BIT8|BIT11_10|BIT15_12|BIT19_16)); - regval = (volatile uint32 *)PFC_GPSR2_RW_ADD; - *regval = (PFC_GPSR2_RW | (BIT3_0|BIT7|BIT8|BIT11_10|BIT15_12|BIT19_16)); - - /* Set the IP0SR2 register */ - /* IP0SR2[31:28]: CANFD6_TX: 0x1 */ - /* IP0SR2[15:12]: CANFD5_RX: 0x1 */ - /* IP0SR2[11:8]: CANFD5_TX: 0x1 */ - /* IP0SR2[7:4]: CANFD1_RX: 0x1 */ - /* IP0SR2[3:0]: CANFD1_TX: 0x1 */ - PMMR2 = ~(PFC_IP0SR2_RW | BIT31_28_15_0); - regval = (volatile uint32 *)PFC_IP0SR2_RW_ADD; - *regval = (PFC_IP0SR2_RW | BIT31_28_15_0); - - /* Set the IP1SR2 register */ - /* IP1SR2[31:28]: CANFD3_RX: 0x0 */ - /* IP1SR2[27:24]: CANFD3_TX: 0x0 */ - /* IP1SR2[23:20]: CANFD2_RX: 0x0 */ - /* IP1SR2[19:16]: CANFD2_TX: 0x0 */ - /* IP1SR2[15:12]: CANFD0_RX: 0x0 */ - /* IP1SR2[11:8]: CANFD0_TX: 0x0 */ - /* IP1SR2[3:0]: CANFD6_RX: 0x1 */ - PMMR2 = ~((PFC_IP1SR2_RW & ~(BIT31_1)) | (BIT0)); - regval = (volatile uint32 *)PFC_IP1SR2_RW_ADD; - *regval = ((PFC_IP1SR2_RW & ~(BIT31_1)) | (BIT0)); - - /* Set the IP2SR2 register */ - /* IP2SR2[15:12]: CANFD7_RX: 0x0 */ - /* IP2SR2[11:8]: CANFD7_TX: 0x0 */ - /* IP2SR2[7:4]: CANFD4_RX: 0x0 */ - /* IP2SR2[3:0]: CANFD4_TX: 0x0 */ - PMMR2 = ~(PFC_IP2SR2_RW & ~(ALL_BIT)); - regval = (volatile uint32 *)PFC_IP2SR2_RW_ADD; - *regval = (PFC_IP2SR2_RW & ~(ALL_BIT)); - - /* Set bellow registers to configure Port GP1_03 as Output with high level value */ - /* to enable transceiver for channel 0 */ - /* Set the INOUTSEL1 register to select GP1_03 as Output mode */ - PMMR1 = ~(PFC_INOUTSEL1_RW | BIT3); - regval = (volatile uint32 *)PFC_INOUTSEL1_RW_ADD; - *regval = (PFC_INOUTSEL1_RW | BIT3); - - /* Set the GPSR1 register to select GP1_03 as GPIO */ - PMMR1 = ~(PFC_GPSR1_RW & ~BIT3); - regval = (volatile uint32 *)PFC_GPSR1_RW_ADD; - *regval = (PFC_GPSR1_RW & ~BIT3); - - /* Set the OUTDTSEL1 register */ - PMMR1 = ~(PFC_OUTDTSEL1_RW & ~BIT3); - regval = (volatile uint32 *)PFC_OUTDTSEL1_RW_ADD; - *regval = (PFC_OUTDTSEL1_RW & ~BIT3); - - /* Set the OUTDT1 register */ - PMMR1 = ~(PFC_OUTDT1_RW | BIT3); - regval = (volatile uint32 *)PFC_OUTDT1_RW_ADD; - *regval = (PFC_OUTDT1_RW |BIT3); -} - -/***************************************************************************** - Timer Initialization -*****************************************************************************/ -void Gpt_Init(void) -{ -} - - -void Tmu_Init(uint32 CounterValue) -{ - Console_Print("[V4M:CAN] Tmu_Init start\r\n"); - REG_TSTR0 &= ~(REG_TSTR0_TMU0_ENABLE); - REG_TCR0 |= TMU_TCR0; - REG_TCOR0 = 0x00000000UL; - REG_TCNT0 = 0x00000000UL; - - REG_TCOR0 = CounterValue; - REG_TCNT0 = CounterValue; - - /* To start CH0 timer */ - REG_TSTR0 |= (uint8) 0x01; - -} - -void Timer_irq_end(void) -{ - REG_TCR0 &= (uint16) 0xFEFF; -} - -void Timer_End(void) -{ - /* To stop CH0 timer */ - REG_TSTR0 &= (uint8) 0x06; -} - -/******************************************************************************* - CAN Module Initialization -*******************************************************************************/ - -void Can_sub_Init(void) -{ - Console_Print("[V4M:CAN] Can_sub_Init start\r\n"); - - /* Disable interrupts in the R52 processor */ - cpuirq_disable(); - - Interrupt_Config(); - /* Enable CAN channel Interrupt */ - Interrupt_Enable(CAN_CHANNEL_INT_ID); - /* Set CAN channel Interrupt to IRQ (Group 1) */ - Interrupt_SetGroup(CAN_CHANNEL_INT_ID, 1); - - /* Enable CAN global Interrupt */ - Interrupt_Enable(CAN_GLOBAL_INT_ID); - /* Set CAN global Interrupt to IRQ (Group 1) */ - Interrupt_SetGroup(CAN_GLOBAL_INT_ID, 1); - - /* Enable the interrupt of TMU0 channel 0 */ - Interrupt_Enable(TMU_CHANNEL0_INT_ID); - Interrupt_SetGroup(TMU_CHANNEL0_INT_ID, 1); - - /* Initialize timer TMU0 */ - Tmu_Init(3000000); - - /* enable interrupts in the R52 processor */ - cpuirq_enable(); -} - -/******************************************************************************* - End of the file -*******************************************************************************/