72 lines
2.4 KiB
Plaintext
72 lines
2.4 KiB
Plaintext
/*******************************************************************************
|
|
** Global Symbols **
|
|
*******************************************************************************/
|
|
|
|
/* CPG */
|
|
#define CPG_BASE_ADDR (0xE6150000)
|
|
#define CPG_SCIF *((volatile uint32 *)(CPG_BASE_ADDR + 0x2D1C))
|
|
#define CPG_HSCIF *((volatile uint32 *)(CPG_BASE_ADDR + 0x2D14))
|
|
#define CPG_PFC *((volatile uint32 *)(CPG_BASE_ADDR + 0x2D24))
|
|
#define CPG_TMU0 *((volatile uint32 *)(CPG_BASE_ADDR + 0x2D1C))
|
|
#define CPG_CPGWPR *((volatile uint32 *)(CPG_BASE_ADDR + 0x0000))
|
|
#define CPG_SCIF_MASK ((uint32)(1 << 2))
|
|
#define CPG_HSCIF_MASK ((uint32)(1 << 14))
|
|
#define CPG_PFC_MASK ((uint32)(1 << 16))
|
|
#define CPG_TMU0_MASK ((uint32)(1 << 13))
|
|
|
|
/* Using SCIF HWIP for MCAL Console print */
|
|
/* PFC */
|
|
#define PFC_PMMR1 *((volatile uint32 *)(PFC_GP1_BASE + 0x0000))
|
|
#define PFC_GPSR1_TX *((volatile uint32 *)(PFC_GP1_BASE + 0x0040))
|
|
#define PFC_GPSR1_RX *((volatile uint32 *)(PFC_GP1_BASE + 0x0040))
|
|
#define PFC_IP1SR1_TX *((volatile uint32 *)(PFC_GP1_BASE + 0x0064))
|
|
#define PFC_IP2SR1_RX *((volatile uint32 *)(PFC_GP1_BASE + 0x0068))
|
|
|
|
#define PFC_GPSR1_TX_MASK ((uint32)(1 << 12))
|
|
#define PFC_GPSR1_RX_MASK ((uint32)(1 << 16))
|
|
#define PFC_IP1SR1_TX_MASK ((uint32)(0xF << 16))
|
|
#define PFC_IP1SR1_TX_VAL ((uint32)(1 << 16))
|
|
#define PFC_IP2SR1_RX_MASK ((uint32)(0xF << 0))
|
|
#define PFC_IP2SR1_RX_VAL ((uint32)(1 << 0))
|
|
/* Initialize clocks and pins */
|
|
static void Clock_Pin_Init()
|
|
{
|
|
uint32 Value;
|
|
|
|
/* CPG setting */
|
|
CPG_CPGWPR = ~(CPG_TMU0 & ~CPG_TMU0_MASK);
|
|
CPG_TMU0 &= ~CPG_TMU0_MASK;
|
|
|
|
/* Using SCIF HWIP for MCAL Console print */
|
|
/* CPG setting */
|
|
CPG_CPGWPR = ~(CPG_SCIF & ~CPG_SCIF_MASK);
|
|
CPG_SCIF &= ~CPG_SCIF_MASK;
|
|
CPG_CPGWPR = ~(CPG_PFC & ~CPG_PFC_MASK);
|
|
CPG_PFC &= ~CPG_PFC_MASK;
|
|
|
|
/* PFC setting */
|
|
/* SCIF TX */
|
|
Value = PFC_IP1SR1_TX;
|
|
Value &= (~PFC_IP1SR1_TX_MASK);
|
|
Value |= PFC_IP1SR1_TX_VAL;
|
|
PFC_PMMR1 = ~Value;
|
|
PFC_IP1SR1_TX = Value;
|
|
|
|
Value = PFC_GPSR1_TX;
|
|
Value |= PFC_GPSR1_TX_MASK;
|
|
PFC_PMMR1 = ~Value;
|
|
PFC_GPSR1_TX = Value;
|
|
|
|
/* SCIF RX */
|
|
Value = PFC_IP2SR1_RX;
|
|
Value &= (~PFC_IP2SR1_RX_MASK);
|
|
Value |= PFC_IP2SR1_RX_VAL;
|
|
PFC_PMMR1 = ~Value;
|
|
PFC_IP2SR1_RX = Value;
|
|
|
|
Value = PFC_GPSR1_RX;
|
|
Value |= PFC_GPSR1_RX_MASK;
|
|
PFC_PMMR1 = ~Value;
|
|
PFC_GPSR1_RX = Value;
|
|
|
|
} |